/* 
 
 helloWorld example for CUDA
 
 compile with:
 
 > nvcc -arch=sm_20 hello_cuda.cu
 
 run with:
 
 > ./a.out
 
*/

#include <stdio.h>
#include <stdlib.h>

#include <cuda.h>

#define N 10

// cuda kernel (runs on GPU)

__global__ void sum_kernel(float* A,float* B, float* C, float* sum, int nmax)
{

  // thread id      
  int id = blockIdx.x*blockDim.x + threadIdx.x;
  
  // sums values
  if( id < nmax ){
    C[id] = A[id] + B[id];
    
    // no atomic summation -> wrong results...
    //*sum += C[id];

    // atomic operation to avoid race-conditions
    atomicAdd(sum,C[id]);    
    
  }
}

// main program (runs on CPU)

int main(void)
{

  float *A, *B, *C;
  float *A_d, *B_d, *C_d;

  float sum;
  float *sum_d;

  printf("hello CUDA: \n");
  
  // array on CPU (host)
  A = (float *) malloc(N*sizeof(float));
  B = (float *) malloc(N*sizeof(float));
  C = (float *) malloc(N*sizeof(float));
  
  // initializes
  for(int i=0; i<N; i++){
    A[i] = 1.0;
    B[i] = 2.0;
    C[i] = 0.0;
  }
  
  sum = 0.0f;
  
  // GPU preparation:
  
  // array on GPU (device)
  cudaMalloc((void **) &A_d, N*sizeof(float));
  cudaMalloc((void **) &B_d, N*sizeof(float));
  cudaMalloc((void **) &C_d, N*sizeof(float));
  cudaMalloc((void **) &sum_d, sizeof(float));
  
  // initializes on GPU with zero
  cudaMemset(sum_d,0,sizeof(float));
  
  // copies arrays from CPU to GPU
  cudaMemcpy(A_d,A,N*sizeof(float),cudaMemcpyHostToDevice);
  cudaMemcpy(B_d,B,N*sizeof(float),cudaMemcpyHostToDevice);
  
  // cuda kernel dimensions ( 3 blocks x 4 threads )
  int blocksize = 4;
  int nblock = N/blocksize+(N%blocksize==0?0:1);

  // launches cuda kernel  
  sum_kernel<<<nblock,blocksize>>>(A_d,B_d,C_d,sum_d,N);
  
  // copies back from GPU to CPU
  cudaMemcpy(C,C_d,N*sizeof(float),cudaMemcpyDeviceToHost);
  cudaMemcpy(&sum,sum_d,sizeof(float),cudaMemcpyDeviceToHost);
  
  // user output
  printf("result: \n");  
  for(int i=0;i<N;i++){
    printf("  %f \n",C[i]);
  }  
  printf("\n");
  printf("  sum = %f\n\n",sum);
  
  // releases memory on CPU
  free(A);
  free(B);
  free(C);
  
  // releases memory on GPU
  cudaFree(A_d);   
  cudaFree(B_d);   
  cudaFree(C_d);   
  cudaFree(sum_d);
}

	.file	"tmpxft_0023b3c0_00000000-6_hello_cuda.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2030:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z37__device_stub__Z10sum_kernelPfS_S_S_iPfS_S_S_i
	.type	_Z37__device_stub__Z10sum_kernelPfS_S_S_iPfS_S_S_i, @function
_Z37__device_stub__Z10sum_kernelPfS_S_S_iPfS_S_S_i:
.LFB2052:
	.cfi_startproc
	endbr64
	subq	$168, %rsp
	.cfi_def_cfa_offset 176
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	56(%rsp), %rcx
	movl	%r8d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 144(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	56(%rsp)
	.cfi_def_cfa_offset 184
	leaq	_Z10sum_kernelPfS_S_S_i(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 192
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L2:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$168, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2052:
	.size	_Z37__device_stub__Z10sum_kernelPfS_S_S_iPfS_S_S_i, .-_Z37__device_stub__Z10sum_kernelPfS_S_S_iPfS_S_S_i
	.globl	_Z10sum_kernelPfS_S_S_i
	.type	_Z10sum_kernelPfS_S_S_i, @function
_Z10sum_kernelPfS_S_S_i:
.LFB2053:
	.cfi_startproc
	endbr64
	jmp	_Z37__device_stub__Z10sum_kernelPfS_S_S_iPfS_S_S_i
	.cfi_endproc
.LFE2053:
	.size	_Z10sum_kernelPfS_S_S_i, .-_Z10sum_kernelPfS_S_S_i
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"hello CUDA: \n"
.LC4:
	.string	"result: \n"
.LC5:
	.string	"  %f \n"
.LC6:
	.string	"\n"
.LC7:
	.string	"  sum = %f\n\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$40, %edi
	call	malloc@PLT
	movl	$40, %edi
	movq	%rax, %r12
	call	malloc@PLT
	movl	$40, %edi
	movq	%rax, %rbp
	call	malloc@PLT
	movss	.LC1(%rip), %xmm1
	movss	.LC2(%rip), %xmm0
	movq	%rax, %rbx
	xorl	%eax, %eax
.L9:
	movss	%xmm1, (%r12,%rax)
	movss	%xmm0, 0(%rbp,%rax)
	addq	$4, %rax
	cmpq	$40, %rax
	jne	.L9
	xorl	%eax, %eax
	movl	$10, %ecx
	movq	%rbx, %rdi
	movl	$40, %esi
	rep stosl
	leaq	16(%rsp), %rdi
	movl	$0x00000000, 12(%rsp)
	call	cudaMalloc@PLT
	leaq	24(%rsp), %rdi
	movl	$40, %esi
	call	cudaMalloc@PLT
	leaq	32(%rsp), %rdi
	movl	$40, %esi
	call	cudaMalloc@PLT
	leaq	40(%rsp), %rdi
	movl	$4, %esi
	call	cudaMalloc@PLT
	movq	40(%rsp), %rdi
	xorl	%esi, %esi
	movl	$4, %edx
	call	cudaMemset@PLT
	movq	16(%rsp), %rdi
	movl	$1, %ecx
	movq	%r12, %rsi
	movl	$40, %edx
	call	cudaMemcpy@PLT
	movq	24(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	movl	$40, %edx
	call	cudaMemcpy@PLT
	movl	$1073741825, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$2, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	movabsq	$4294967299, %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L10
	movq	40(%rsp), %rcx
	movq	32(%rsp), %rdx
	movl	$10, %r8d
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdi
	call	_Z37__device_stub__Z10sum_kernelPfS_S_S_iPfS_S_S_i
.L10:
	movq	32(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbx, %rdi
	xorl	%r13d, %r13d
	movl	$40, %edx
	leaq	.LC5(%rip), %r14
	call	cudaMemcpy@PLT
	movq	40(%rsp), %rsi
	leaq	12(%rsp), %rdi
	movl	$2, %ecx
	movl	$4, %edx
	call	cudaMemcpy@PLT
	leaq	.LC4(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L11:
	cvtss2sd	(%rbx,%r13,4), %xmm0
	movq	%r14, %rsi
	movl	$2, %edi
	movb	$1, %al
	call	__printf_chk@PLT
	incq	%r13
	cmpq	$10, %r13
	jne	.L11
	leaq	.LC6(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC7(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	12(%rsp), %xmm0
	call	__printf_chk@PLT
	movq	%r12, %rdi
	call	free@PLT
	movq	%rbp, %rdi
	call	free@PLT
	movq	%rbx, %rdi
	call	free@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L12
	call	__stack_chk_fail@PLT
.L12:
	addq	$80, %rsp
	.cfi_def_cfa_offset 48
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	main, .-main
	.section	.rodata.str1.1
.LC8:
	.string	"_Z10sum_kernelPfS_S_S_i"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2055:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC8(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z10sum_kernelPfS_S_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2055:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC1:
	.long	1065353216
	.align 4
.LC2:
	.long	1073741824
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

/* 
 
 helloWorld example for CUDA
 
 compile with:
 
 > nvcc -arch=sm_20 hello_cuda.cu
 
 run with:
 
 > ./a.out
 
*/

#include <stdio.h>
#include <stdlib.h>

#include <hip/hip_runtime.h>

#define N 10

// cuda kernel (runs on GPU)

__global__ void sum_kernel(float* A,float* B, float* C, float* sum, int nmax)
{

  // thread id      
  int id = blockIdx.x*blockDim.x + threadIdx.x;
  
  // sums values
  if( id < nmax ){
    C[id] = A[id] + B[id];
    
    // no atomic summation -> wrong results...
    //*sum += C[id];

    // atomic operation to avoid race-conditions
    atomicAdd(sum,C[id]);    
    
  }
}

// main program (runs on CPU)

int main(void)
{

  float *A, *B, *C;
  float *A_d, *B_d, *C_d;

  float sum;
  float *sum_d;

  printf("hello CUDA: \n");
  
  // array on CPU (host)
  A = (float *) malloc(N*sizeof(float));
  B = (float *) malloc(N*sizeof(float));
  C = (float *) malloc(N*sizeof(float));
  
  // initializes
  for(int i=0; i<N; i++){
    A[i] = 1.0;
    B[i] = 2.0;
    C[i] = 0.0;
  }
  
  sum = 0.0f;
  
  // GPU preparation:
  
  // array on GPU (device)
  hipMalloc((void **) &A_d, N*sizeof(float));
  hipMalloc((void **) &B_d, N*sizeof(float));
  hipMalloc((void **) &C_d, N*sizeof(float));
  hipMalloc((void **) &sum_d, sizeof(float));
  
  // initializes on GPU with zero
  hipMemset(sum_d,0,sizeof(float));
  
  // copies arrays from CPU to GPU
  hipMemcpy(A_d,A,N*sizeof(float),hipMemcpyHostToDevice);
  hipMemcpy(B_d,B,N*sizeof(float),hipMemcpyHostToDevice);
  
  // cuda kernel dimensions ( 3 blocks x 4 threads )
  int blocksize = 4;
  int nblock = N/blocksize+(N%blocksize==0?0:1);

  // launches cuda kernel  
  sum_kernel<<<nblock,blocksize>>>(A_d,B_d,C_d,sum_d,N);
  
  // copies back from GPU to CPU
  hipMemcpy(C,C_d,N*sizeof(float),hipMemcpyDeviceToHost);
  hipMemcpy(&sum,sum_d,sizeof(float),hipMemcpyDeviceToHost);
  
  // user output
  printf("result: \n");  
  for(int i=0;i<N;i++){
    printf("  %f \n",C[i]);
  }  
  printf("\n");
  printf("  sum = %f\n\n",sum);
  
  // releases memory on CPU
  free(A);
  free(B);
  free(C);
  
  // releases memory on GPU
  hipFree(A_d);   
  hipFree(B_d);   
  hipFree(C_d);   
  hipFree(sum_d);
}

	.text
	.file	"hello_cuda.hip"
	.globl	_Z25__device_stub__sum_kernelPfS_S_S_i # -- Begin function _Z25__device_stub__sum_kernelPfS_S_S_i
	.type	_Z25__device_stub__sum_kernelPfS_S_S_i,@function
_Z25__device_stub__sum_kernelPfS_S_S_i: # @_Z25__device_stub__sum_kernelPfS_S_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	12(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10sum_kernelPfS_S_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z25__device_stub__sum_kernelPfS_S_S_i, .Lfunc_end0-_Z25__device_stub__sum_kernelPfS_S_S_i
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$.Lstr, %edi
	callq	puts@PLT
	movl	$40, %edi
	callq	malloc
	movq	%rax, %rbx
	movl	$40, %edi
	callq	malloc
	movq	%rax, %r14
	movl	$1, %edi
	movl	$40, %esi
	callq	calloc@PLT
	movq	%rax, %r15
	xorl	%eax, %eax
.LBB1_1:                                # =>This Inner Loop Header: Depth=1
	movl	$1065353216, (%rbx,%rax,4)      # imm = 0x3F800000
	movl	$1073741824, (%r14,%rax,4)      # imm = 0x40000000
	incq	%rax
	cmpq	$10, %rax
	jne	.LBB1_1
# %bb.2:
	movl	$0, 4(%rsp)
	leaq	32(%rsp), %r13
	movl	$40, %esi
	movq	%r13, %rdi
	callq	hipMalloc
	leaq	24(%rsp), %r12
	movl	$40, %esi
	movq	%r12, %rdi
	callq	hipMalloc
	leaq	16(%rsp), %rdi
	movl	$40, %esi
	callq	hipMalloc
	leaq	8(%rsp), %rbp
	movl	$4, %esi
	movq	%rbp, %rdi
	callq	hipMalloc
	movq	(%rbp), %rdi
	movl	$4, %edx
	xorl	%esi, %esi
	callq	hipMemset
	movq	(%r13), %rdi
	movl	$40, %edx
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r12), %rdi
	movl	$40, %edx
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movabsq	$4294967299, %rdi               # imm = 0x100000003
	leaq	1(%rdi), %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_4
# %bb.3:
	movq	32(%rsp), %rdi
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdx
	movq	8(%rsp), %rcx
	movl	$10, %r8d
	callq	_Z25__device_stub__sum_kernelPfS_S_S_i
.LBB1_4:
	movq	16(%rsp), %rsi
	movl	$40, %edx
	movq	%r15, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	8(%rsp), %rsi
	leaq	4(%rsp), %rdi
	movl	$4, %edx
	movl	$2, %ecx
	callq	hipMemcpy
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	xorl	%r12d, %r12d
.LBB1_5:                                # =>This Inner Loop Header: Depth=1
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r15,%r12,4), %xmm0
	movl	$.L.str.2, %edi
	movb	$1, %al
	callq	printf
	incq	%r12
	cmpq	$10, %r12
	jne	.LBB1_5
# %bb.6:
	movl	$10, %edi
	callq	putchar@PLT
	xorps	%xmm0, %xmm0
	cvtss2sd	4(%rsp), %xmm0
	movl	$.L.str.4, %edi
	movb	$1, %al
	callq	printf
	movq	%rbx, %rdi
	callq	free
	movq	%r14, %rdi
	callq	free
	movq	%r15, %rdi
	callq	free
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10sum_kernelPfS_S_S_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z10sum_kernelPfS_S_S_i,@object # @_Z10sum_kernelPfS_S_S_i
	.section	.rodata,"a",@progbits
	.globl	_Z10sum_kernelPfS_S_S_i
	.p2align	3, 0x0
_Z10sum_kernelPfS_S_S_i:
	.quad	_Z25__device_stub__sum_kernelPfS_S_S_i
	.size	_Z10sum_kernelPfS_S_S_i, 8

	.type	.L.str.2,@object                # @.str.2
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.2:
	.asciz	"  %f \n"
	.size	.L.str.2, 7

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"  sum = %f\n\n"
	.size	.L.str.4, 13

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z10sum_kernelPfS_S_S_i"
	.size	.L__unnamed_1, 24

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"hello CUDA: "
	.size	.Lstr, 13

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"result: "
	.size	.Lstr.1, 9

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z25__device_stub__sum_kernelPfS_S_S_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z10sum_kernelPfS_S_S_i
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z10sum_kernelPfS_S_S_i ; -- Begin function _Z10sum_kernelPfS_S_S_i
	.globl	_Z10sum_kernelPfS_S_S_i
	.p2align	8
	.type	_Z10sum_kernelPfS_S_S_i,@function
_Z10sum_kernelPfS_S_S_i:                ; @_Z10sum_kernelPfS_S_S_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x34
	s_load_b32 s3, s[0:1], 0x20
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB0_6
; %bb.1:
	s_load_b256 s[0:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_mov_b32 s8, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v3, vcc_lo, s0, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, s1, v2, vcc_lo
	v_add_co_u32 v5, vcc_lo, s2, v1
	v_add_co_ci_u32_e32 v6, vcc_lo, s3, v2, vcc_lo
	global_load_b32 v0, v[3:4], off
	global_load_b32 v3, v[5:6], off
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v0, v0, v3
	v_add_co_u32 v3, vcc_lo, s4, v1
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v2, vcc_lo
	v_bfrev_b32_e32 v2, 1
	global_store_b32 v[3:4], v0, off
.LBB0_2:                                ; %ComputeLoop
                                        ; =>This Inner Loop Header: Depth=1
	s_ctz_i32_b32 s0, s8
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_readlane_b32 s1, v0, s0
	s_lshl_b32 s0, 1, s0
	s_and_not1_b32 s8, s8, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_cmp_lg_u32 s8, 0
	v_add_f32_e32 v2, s1, v2
	s_cbranch_scc1 .LBB0_2
; %bb.3:                                ; %ComputeEnd
	v_mbcnt_lo_u32_b32 v0, exec_lo, 0
	s_mov_b32 s0, 0
	s_mov_b32 s1, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v0
	s_xor_b32 s1, exec_lo, s1
	s_cbranch_execz .LBB0_6
; %bb.4:
	v_mov_b32_e32 v3, 0
	global_load_b32 v1, v3, s[6:7]
.LBB0_5:                                ; %atomicrmw.start
                                        ; =>This Inner Loop Header: Depth=1
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v0, v1, v2
	global_atomic_cmpswap_b32 v0, v3, v[0:1], s[6:7] glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, v0, v1
	v_mov_b32_e32 v1, v0
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB0_5
.LBB0_6:                                ; %Flow28
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10sum_kernelPfS_S_S_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z10sum_kernelPfS_S_S_i, .Lfunc_end0-_Z10sum_kernelPfS_S_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 308
; NumSgprs: 18
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         44
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         52
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         54
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         56
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         58
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         60
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         62
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         104
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 296
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z10sum_kernelPfS_S_S_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z10sum_kernelPfS_S_S_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     7
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
