
#include "cuda_runtime.h"
#include "device_launch_parameters.h"

#include <stdio.h>
#include <stdlib.h>

#define WIDTH 10
#define HEIGHT 10
#define channels 3
#define Mask_width  5
#define Mask_radius Mask_width/2
#define O_TILE_WIDTH 12
#define BLOCK_WIDTH (O_TILE_WIDTH+Mask_width-1)
#define min(x,y) ((x)<(y)?(x):(y))
#define max(x,y) ((x)>(y)?(x):(y))
#define clamp(x) (min(max((x),0.0),1.0))

void imageConvolution(float *input,float *output,const float* __restrict__ M,int width, int height, int ch)
{
	int i=0,j=0,k=0,x=0,y=0,xOffset=0,yOffset=0;
   float accum =0.0,maskValue =0.0,imagePixel =0.0;
   
	for( i=0 ;i<height;i++){
      for( j=0;j< width;j++){
        for(k=0;k<ch;k++){
          accum = 0;
          for(y = 0 ;y< Mask_width;y++){
            for(x= 0;x< Mask_width; x++){
              xOffset = j + x - Mask_radius;
              yOffset = i + y - Mask_radius;
              if (xOffset>=0 && xOffset < width && yOffset>=0 && yOffset < height){
                imagePixel = input[(yOffset * width + xOffset) * channels + k];
                maskValue  = M[y*Mask_width+x];
                accum += imagePixel * maskValue;
              }
			  else
				  accum +=0;
            }			
          }
          output[(i * width + j)*channels + k] = accum;// (float) clamp(accum);
          
        }
      }
    }
}

__global__ void imageTiledConvolution_kernel(float *input,float *output,const float * __restrict__ M,int width, int height, int ch)
{
	int i=0,j=0;
	int tx = threadIdx.x;
	int ty = threadIdx.y;
	int row_o = blockIdx.y*O_TILE_WIDTH+ty;
	int col_o = blockIdx.x*O_TILE_WIDTH+tx;
	int row_i = row_o - Mask_radius;
	int col_i = col_o - Mask_radius;
	float cValue = 0.0f;
	__shared__ float Ns[BLOCK_WIDTH][BLOCK_WIDTH][channels]; 
	
	for(int chIdx=0;chIdx<ch;chIdx++){
		
		if(row_i>=0 && row_i<height && col_i>=0 && col_i<width){
				Ns[ty][tx][chIdx] = input[(row_i*width+col_i)*ch+chIdx];		
		}else{
				Ns[ty][tx][chIdx] = 0.0f;
		}
		__syncthreads();
		
		cValue = 0.0f;
		if(ty<O_TILE_WIDTH && tx<O_TILE_WIDTH){
			for( i=0;i<Mask_width;i++){
				for( j=0;j<Mask_width;j++){
					cValue +=M[i*Mask_width+j]*Ns[ty+i][tx+j][chIdx];
				}
			}
		}			
		
		__syncthreads();
		
		if(row_o<height && col_o<width && ty<O_TILE_WIDTH && tx<O_TILE_WIDTH)
			output[(row_o*width+col_o)*ch+chIdx] = cValue;//min(max(cValue,0),1);
		
	}	
	
}


void loadData(float *input,float *output,float *maskData)
{
  int i=0; 
  for(i=0;i<WIDTH*HEIGHT*channels;i++)
    input[i] = 1.0;
  
  for(i=0;i<WIDTH*HEIGHT*channels;i++)
    output[i] = 0.0;


  for(i=0;i<Mask_width *Mask_width ;i++)
    maskData[i] = 1.0;


}

void dispRes(float *arr)
{
	int i=0,j=0,k=0;
	printf("Results of the calculation\n");
	for(k=0;k<channels;k++){
		for(i=0;i<HEIGHT;i++){
			for(j=0;j<WIDTH;j++){
				printf("%2.1f ",arr[(i*WIDTH+j)*channels+k]);
			}
			
			printf("\n");
		}
		printf("k = %d\n",k);system("pause");
	}
}
int main(void)
{
	int maskRows = Mask_width;
	int maskColumns = Mask_width;
	int imageChannels = channels;
	int imageWidth = WIDTH;
	int imageHeight = HEIGHT;
    float * hostInputImageData;
    float * hostOutputImageData;
	float * hostOutputImageDataCPU;
    float * hostMaskData;
    float * deviceInputImageData;
    float * deviceOutputImageData;
    float * deviceMaskData;

	
	//allocate Memory on the host
	hostInputImageData = (float*)malloc(imageWidth*imageHeight*channels*sizeof(float));
	hostOutputImageData = (float*)malloc(imageWidth*imageHeight*channels*sizeof(float));
	hostOutputImageDataCPU = (float*)malloc(imageWidth*imageHeight*channels*sizeof(float));
	hostMaskData = (float*)malloc(Mask_width*Mask_width*sizeof(float));

	//load data to host memory
	loadData(hostInputImageData,hostOutputImageData,hostMaskData);


	//cuda memory allocation on the device
	cudaMalloc((void **) &deviceInputImageData, imageWidth * imageHeight * imageChannels * sizeof(float));
    cudaMalloc((void **) &deviceOutputImageData, imageWidth * imageHeight * imageChannels * sizeof(float));
    cudaMalloc((void **) &deviceMaskData, maskRows * maskColumns * sizeof(float));


	//cuda memory copy from host to device
	cudaMemcpy(deviceInputImageData,hostInputImageData,imageWidth * imageHeight * imageChannels * sizeof(float),cudaMemcpyHostToDevice);
    cudaMemcpy(deviceMaskData,hostMaskData,maskRows * maskColumns * sizeof(float),cudaMemcpyHostToDevice);

	
	dim3 DimGrid((imageWidth-1)/O_TILE_WIDTH+1,(imageHeight-1)/O_TILE_WIDTH+1,1);
	dim3 DimBlock(BLOCK_WIDTH,	BLOCK_WIDTH,1);	

	imageTiledConvolution_kernel<<<DimGrid,DimBlock>>>(deviceInputImageData,deviceOutputImageData,deviceMaskData,imageWidth,imageHeight,imageChannels);

	imageConvolution(hostInputImageData,hostOutputImageDataCPU,hostMaskData,imageWidth,imageHeight,imageChannels);

	//cuda memory copy from device to host
	cudaMemcpy(hostOutputImageData,deviceOutputImageData,imageWidth * imageHeight * imageChannels * sizeof(float),cudaMemcpyDeviceToHost);

	//dispRes(hostOutputImageDataCPU);
	dispRes(hostOutputImageData);

	free(hostInputImageData);
	free(hostOutputImageData);
	free(hostOutputImageDataCPU);
	free(hostMaskData);

	cudaFree(deviceInputImageData);
    cudaFree(deviceOutputImageData);
    cudaFree(deviceMaskData);
	return 0;

}
	.file	"tmpxft_003570b7_00000000-6_kernel.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2033:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2033:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z16imageConvolutionPfS_PKfiii
	.type	_Z16imageConvolutionPfS_PKfiii, @function
_Z16imageConvolutionPfS_PKfiii:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	%ecx, %eax
	xorps	%xmm2, %xmm2
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	imull	$-2, %ecx, %ebx
	movl	%ebx, -16(%rsp)
	imull	$-3, %ecx, %ebx
	movq	%rdi, -40(%rsp)
	movq	%rsi, -32(%rsp)
	movl	%ebx, -4(%rsp)
	movq	%rdx, -24(%rsp)
	xorl	%edx, %edx
	movl	%r9d, -12(%rsp)
	xorl	%r9d, %r9d
.L3:
	cmpl	%r8d, %r9d
	jge	.L2
	movl	-16(%rsp), %ecx
	leal	(%rdx,%rdx,2), %ebx
	addl	%edx, %ecx
	movl	%ecx, -48(%rsp)
	xorl	%ecx, %ecx
.L13:
	cmpl	%eax, %ecx
	jge	.L10
	leal	3(%rcx), %edi
	movq	-32(%rsp), %rsi
	movslq	%ebx, %rdx
	movl	%edi, -8(%rsp)
	leaq	(%rsi,%rdx,4), %r15
	xorl	%esi, %esi
.L11:
	cmpl	%esi, -12(%rsp)
	jle	.L8
	movl	-48(%rsp), %ebp
	leal	-2(%r9), %r11d
	xorl	%r10d, %r10d
	xorps	%xmm0, %xmm0
.L9:
	leal	0(%rbp,%rbp,2), %r13d
	leal	-2(%rcx), %edx
	movl	%r10d, %r12d
	leal	0(%r13,%rsi), %edi
	movl	%edi, -44(%rsp)
.L6:
	movl	%edx, %edi
	orl	%r11d, %edi
	js	.L4
	cmpl	%edx, %eax
	jle	.L4
	cmpl	%r11d, %r8d
	jle	.L4
	movl	-44(%rsp), %r14d
	leal	(%rdx,%rdx,2), %edi
	movq	-40(%rsp), %r13
	addl	%r14d, %edi
	movslq	%r12d, %r14
	movslq	%edi, %rdi
	movss	0(%r13,%rdi,4), %xmm1
	movq	-24(%rsp), %rdi
	mulss	(%rdi,%r14,4), %xmm1
	addss	%xmm1, %xmm0
	jmp	.L5
.L4:
	addss	%xmm2, %xmm0
.L5:
	movl	-8(%rsp), %edi
	incl	%edx
	incl	%r12d
	cmpl	%edi, %edx
	jne	.L6
	addl	$5, %r10d
	addl	%eax, %ebp
	incl	%r11d
	cmpl	$25, %r10d
	jne	.L9
	movss	%xmm0, (%r15,%rsi,4)
	incq	%rsi
	jmp	.L11
.L8:
	incl	%ecx
	addl	$3, %ebx
	jmp	.L13
.L10:
	movl	-48(%rsp), %edx
	movl	-4(%rsp), %ebx
	incl	%r9d
	subl	%ebx, %edx
	jmp	.L3
.L2:
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z16imageConvolutionPfS_PKfiii, .-_Z16imageConvolutionPfS_PKfiii
	.globl	_Z8loadDataPfS_S_
	.type	_Z8loadDataPfS_S_, @function
_Z8loadDataPfS_S_:
.LFB2028:
	.cfi_startproc
	endbr64
	movss	.LC1(%rip), %xmm0
	xorl	%ecx, %ecx
.L21:
	movss	%xmm0, (%rdi,%rcx,4)
	incq	%rcx
	cmpq	$300, %rcx
	jne	.L21
	xorl	%eax, %eax
	movq	%rsi, %rdi
	rep stosl
	xorl	%eax, %eax
.L22:
	movss	%xmm0, (%rdx,%rax,4)
	incq	%rax
	cmpq	$25, %rax
	jne	.L22
	ret
	.cfi_endproc
.LFE2028:
	.size	_Z8loadDataPfS_S_, .-_Z8loadDataPfS_S_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC2:
	.string	"Results of the calculation\n"
.LC3:
	.string	"%2.1f "
.LC4:
	.string	"\n"
.LC5:
	.string	"k = %d\n"
.LC6:
	.string	"pause"
	.text
	.globl	_Z7dispResPf
	.type	_Z7dispResPf, @function
_Z7dispResPf:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	leaq	.LC2(%rip), %rsi
	xorl	%eax, %eax
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rdi, %r13
	movl	$2, %edi
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	xorl	%ebx, %ebx
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	call	__printf_chk@PLT
.L26:
	movl	%ebx, 12(%rsp)
	leaq	0(%r13,%rbx,4), %r12
	xorl	%ebp, %ebp
.L30:
	movq	%r12, %r15
	xorl	%r14d, %r14d
.L27:
	leaq	.LC3(%rip), %rsi
	movb	$1, %al
	incl	%r14d
	addq	$12, %r15
	movl	$2, %edi
	cvtss2sd	-12(%r15), %xmm0
	call	__printf_chk@PLT
	cmpl	$10, %r14d
	jne	.L27
	leaq	.LC4(%rip), %rsi
	xorl	%eax, %eax
	addl	$10, %ebp
	addq	$120, %r12
	movl	$2, %edi
	call	__printf_chk@PLT
	cmpl	$100, %ebp
	jne	.L30
	movl	12(%rsp), %edx
	leaq	.LC5(%rip), %rsi
	xorl	%eax, %eax
	incq	%rbx
	movl	$2, %edi
	call	__printf_chk@PLT
	leaq	.LC6(%rip), %rdi
	call	system@PLT
	cmpq	$3, %rbx
	jne	.L26
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2029:
	.size	_Z7dispResPf, .-_Z7dispResPf
	.globl	_Z56__device_stub__Z28imageTiledConvolution_kernelPfS_PKfiiiPfS_PKfiii
	.type	_Z56__device_stub__Z28imageTiledConvolution_kernelPfS_PKfiiiPfS_PKfiii, @function
_Z56__device_stub__Z28imageTiledConvolution_kernelPfS_PKfiiiPfS_PKfiii:
.LFB2055:
	.cfi_startproc
	endbr64
	subq	$168, %rsp
	.cfi_def_cfa_offset 176
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%ecx, 12(%rsp)
	leaq	48(%rsp), %rcx
	movl	%r8d, 8(%rsp)
	movl	%r9d, 4(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movq	%rdx, 32(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 144(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movl	$1, 64(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L33
	pushq	48(%rsp)
	.cfi_def_cfa_offset 184
	leaq	_Z28imageTiledConvolution_kernelPfS_PKfiii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 192
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L33:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L35
	call	__stack_chk_fail@PLT
.L35:
	addq	$168, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2055:
	.size	_Z56__device_stub__Z28imageTiledConvolution_kernelPfS_PKfiiiPfS_PKfiii, .-_Z56__device_stub__Z28imageTiledConvolution_kernelPfS_PKfiiiPfS_PKfiii
	.globl	_Z28imageTiledConvolution_kernelPfS_PKfiii
	.type	_Z28imageTiledConvolution_kernelPfS_PKfiii, @function
_Z28imageTiledConvolution_kernelPfS_PKfiii:
.LFB2056:
	.cfi_startproc
	endbr64
	jmp	_Z56__device_stub__Z28imageTiledConvolution_kernelPfS_PKfiiiPfS_PKfiii
	.cfi_endproc
.LFE2056:
	.size	_Z28imageTiledConvolution_kernelPfS_PKfiii, .-_Z28imageTiledConvolution_kernelPfS_PKfiii
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2030:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	$1200, %edi
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	subq	$72, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	call	malloc@PLT
	movl	$1200, %edi
	movq	%rax, %r12
	call	malloc@PLT
	movl	$1200, %edi
	movq	%rax, %rbp
	call	malloc@PLT
	movl	$100, %edi
	movq	%rax, %r13
	call	malloc@PLT
	movq	%rbp, %rsi
	movq	%r12, %rdi
	movq	%rax, %rdx
	movq	%rax, %rbx
	call	_Z8loadDataPfS_S_
	leaq	8(%rsp), %rdi
	movl	$1200, %esi
	call	cudaMalloc@PLT
	leaq	16(%rsp), %rdi
	movl	$1200, %esi
	call	cudaMalloc@PLT
	leaq	24(%rsp), %rdi
	movl	$100, %esi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movq	%r12, %rsi
	movl	$1200, %edx
	call	cudaMemcpy@PLT
	movq	24(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	movl	$100, %edx
	call	cudaMemcpy@PLT
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	movabsq	$68719476752, %rdx
	movl	$1, %esi
	movabsq	$4294967297, %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L39
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rsi
	movl	$3, %r9d
	movl	$10, %r8d
	movq	8(%rsp), %rdi
	movl	$10, %ecx
	call	_Z56__device_stub__Z28imageTiledConvolution_kernelPfS_PKfiiiPfS_PKfiii
.L39:
	movl	$3, %r9d
	movq	%rbx, %rdx
	movq	%r13, %rsi
	movq	%r12, %rdi
	movl	$10, %r8d
	movl	$10, %ecx
	call	_Z16imageConvolutionPfS_PKfiii
	movq	16(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbp, %rdi
	movl	$1200, %edx
	call	cudaMemcpy@PLT
	movq	%rbp, %rdi
	call	_Z7dispResPf
	movq	%r12, %rdi
	call	free@PLT
	movq	%rbp, %rdi
	call	free@PLT
	movq	%r13, %rdi
	call	free@PLT
	movq	%rbx, %rdi
	call	free@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L40
	call	__stack_chk_fail@PLT
.L40:
	addq	$72, %rsp
	.cfi_def_cfa_offset 40
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2030:
	.size	main, .-main
	.section	.rodata.str1.1
.LC7:
	.string	"_Z28imageTiledConvolution_kernelPfS_PKfiii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2058:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC7(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z28imageTiledConvolution_kernelPfS_PKfiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2058:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC1:
	.long	1065353216
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include "hip/hip_runtime.h"


#include <stdio.h>
#include <stdlib.h>

#define WIDTH 10
#define HEIGHT 10
#define channels 3
#define Mask_width  5
#define Mask_radius Mask_width/2
#define O_TILE_WIDTH 12
#define BLOCK_WIDTH (O_TILE_WIDTH+Mask_width-1)
#define min(x,y) ((x)<(y)?(x):(y))
#define max(x,y) ((x)>(y)?(x):(y))
#define clamp(x) (min(max((x),0.0),1.0))

void imageConvolution(float *input,float *output,const float* __restrict__ M,int width, int height, int ch)
{
	int i=0,j=0,k=0,x=0,y=0,xOffset=0,yOffset=0;
   float accum =0.0,maskValue =0.0,imagePixel =0.0;
   
	for( i=0 ;i<height;i++){
      for( j=0;j< width;j++){
        for(k=0;k<ch;k++){
          accum = 0;
          for(y = 0 ;y< Mask_width;y++){
            for(x= 0;x< Mask_width; x++){
              xOffset = j + x - Mask_radius;
              yOffset = i + y - Mask_radius;
              if (xOffset>=0 && xOffset < width && yOffset>=0 && yOffset < height){
                imagePixel = input[(yOffset * width + xOffset) * channels + k];
                maskValue  = M[y*Mask_width+x];
                accum += imagePixel * maskValue;
              }
			  else
				  accum +=0;
            }			
          }
          output[(i * width + j)*channels + k] = accum;// (float) clamp(accum);
          
        }
      }
    }
}

__global__ void imageTiledConvolution_kernel(float *input,float *output,const float * __restrict__ M,int width, int height, int ch)
{
	int i=0,j=0;
	int tx = threadIdx.x;
	int ty = threadIdx.y;
	int row_o = blockIdx.y*O_TILE_WIDTH+ty;
	int col_o = blockIdx.x*O_TILE_WIDTH+tx;
	int row_i = row_o - Mask_radius;
	int col_i = col_o - Mask_radius;
	float cValue = 0.0f;
	__shared__ float Ns[BLOCK_WIDTH][BLOCK_WIDTH][channels]; 
	
	for(int chIdx=0;chIdx<ch;chIdx++){
		
		if(row_i>=0 && row_i<height && col_i>=0 && col_i<width){
				Ns[ty][tx][chIdx] = input[(row_i*width+col_i)*ch+chIdx];		
		}else{
				Ns[ty][tx][chIdx] = 0.0f;
		}
		__syncthreads();
		
		cValue = 0.0f;
		if(ty<O_TILE_WIDTH && tx<O_TILE_WIDTH){
			for( i=0;i<Mask_width;i++){
				for( j=0;j<Mask_width;j++){
					cValue +=M[i*Mask_width+j]*Ns[ty+i][tx+j][chIdx];
				}
			}
		}			
		
		__syncthreads();
		
		if(row_o<height && col_o<width && ty<O_TILE_WIDTH && tx<O_TILE_WIDTH)
			output[(row_o*width+col_o)*ch+chIdx] = cValue;//min(max(cValue,0),1);
		
	}	
	
}


void loadData(float *input,float *output,float *maskData)
{
  int i=0; 
  for(i=0;i<WIDTH*HEIGHT*channels;i++)
    input[i] = 1.0;
  
  for(i=0;i<WIDTH*HEIGHT*channels;i++)
    output[i] = 0.0;


  for(i=0;i<Mask_width *Mask_width ;i++)
    maskData[i] = 1.0;


}

void dispRes(float *arr)
{
	int i=0,j=0,k=0;
	printf("Results of the calculation\n");
	for(k=0;k<channels;k++){
		for(i=0;i<HEIGHT;i++){
			for(j=0;j<WIDTH;j++){
				printf("%2.1f ",arr[(i*WIDTH+j)*channels+k]);
			}
			
			printf("\n");
		}
		printf("k = %d\n",k);system("pause");
	}
}
int main(void)
{
	int maskRows = Mask_width;
	int maskColumns = Mask_width;
	int imageChannels = channels;
	int imageWidth = WIDTH;
	int imageHeight = HEIGHT;
    float * hostInputImageData;
    float * hostOutputImageData;
	float * hostOutputImageDataCPU;
    float * hostMaskData;
    float * deviceInputImageData;
    float * deviceOutputImageData;
    float * deviceMaskData;

	
	//allocate Memory on the host
	hostInputImageData = (float*)malloc(imageWidth*imageHeight*channels*sizeof(float));
	hostOutputImageData = (float*)malloc(imageWidth*imageHeight*channels*sizeof(float));
	hostOutputImageDataCPU = (float*)malloc(imageWidth*imageHeight*channels*sizeof(float));
	hostMaskData = (float*)malloc(Mask_width*Mask_width*sizeof(float));

	//load data to host memory
	loadData(hostInputImageData,hostOutputImageData,hostMaskData);


	//cuda memory allocation on the device
	hipMalloc((void **) &deviceInputImageData, imageWidth * imageHeight * imageChannels * sizeof(float));
    hipMalloc((void **) &deviceOutputImageData, imageWidth * imageHeight * imageChannels * sizeof(float));
    hipMalloc((void **) &deviceMaskData, maskRows * maskColumns * sizeof(float));


	//cuda memory copy from host to device
	hipMemcpy(deviceInputImageData,hostInputImageData,imageWidth * imageHeight * imageChannels * sizeof(float),hipMemcpyHostToDevice);
    hipMemcpy(deviceMaskData,hostMaskData,maskRows * maskColumns * sizeof(float),hipMemcpyHostToDevice);

	
	dim3 DimGrid((imageWidth-1)/O_TILE_WIDTH+1,(imageHeight-1)/O_TILE_WIDTH+1,1);
	dim3 DimBlock(BLOCK_WIDTH,	BLOCK_WIDTH,1);	

	imageTiledConvolution_kernel<<<DimGrid,DimBlock>>>(deviceInputImageData,deviceOutputImageData,deviceMaskData,imageWidth,imageHeight,imageChannels);

	imageConvolution(hostInputImageData,hostOutputImageDataCPU,hostMaskData,imageWidth,imageHeight,imageChannels);

	//cuda memory copy from device to host
	hipMemcpy(hostOutputImageData,deviceOutputImageData,imageWidth * imageHeight * imageChannels * sizeof(float),hipMemcpyDeviceToHost);

	//dispRes(hostOutputImageDataCPU);
	dispRes(hostOutputImageData);

	free(hostInputImageData);
	free(hostOutputImageData);
	free(hostOutputImageDataCPU);
	free(hostMaskData);

	hipFree(deviceInputImageData);
    hipFree(deviceOutputImageData);
    hipFree(deviceMaskData);
	return 0;

}
	.text
	.file	"kernel.hip"
	.globl	_Z16imageConvolutionPfS_PKfiii  # -- Begin function _Z16imageConvolutionPfS_PKfiii
	.type	_Z16imageConvolutionPfS_PKfiii,@function
_Z16imageConvolutionPfS_PKfiii:         # @_Z16imageConvolutionPfS_PKfiii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r9d, -76(%rsp)                 # 4-byte Spill
	movl	%ecx, -80(%rsp)                 # 4-byte Spill
	movq	%rdx, -24(%rsp)                 # 8-byte Spill
	movq	%rsi, -56(%rsp)                 # 8-byte Spill
	movq	%rdi, -72(%rsp)                 # 8-byte Spill
	testl	%r8d, %r8d
	jle	.LBB0_18
# %bb.1:                                # %.preheader53.lr.ph
	movslq	-80(%rsp), %rax                 # 4-byte Folded Reload
	movl	%r8d, %r8d
	movl	%eax, %ecx
	movq	%rcx, -40(%rsp)                 # 8-byte Spill
	movl	-76(%rsp), %ecx                 # 4-byte Reload
	movq	%rcx, -32(%rsp)                 # 8-byte Spill
	leaq	(,%rax,8), %rcx
	leaq	(%rcx,%rcx,2), %rcx
	subq	%rcx, -72(%rsp)                 # 8-byte Folded Spill
	leaq	(,%rax,4), %rcx
	leaq	(%rcx,%rcx,2), %rbx
	xorl	%r14d, %r14d
.LBB0_2:                                # %.preheader53
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB0_4 Depth 2
                                        #       Child Loop BB0_6 Depth 3
                                        #         Child Loop BB0_7 Depth 4
                                        #           Child Loop BB0_8 Depth 5
	cmpl	$0, -80(%rsp)                   # 4-byte Folded Reload
	jle	.LBB0_17
# %bb.3:                                # %.preheader52.lr.ph
                                        #   in Loop: Header=BB0_2 Depth=1
	movq	%r14, %rcx
	imulq	%rax, %rcx
	movq	%rcx, -48(%rsp)                 # 8-byte Spill
	movq	-72(%rsp), %rcx                 # 8-byte Reload
	movq	%rcx, -64(%rsp)                 # 8-byte Spill
	xorl	%r11d, %r11d
.LBB0_4:                                # %.preheader52
                                        #   Parent Loop BB0_2 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB0_6 Depth 3
                                        #         Child Loop BB0_7 Depth 4
                                        #           Child Loop BB0_8 Depth 5
	cmpl	$0, -76(%rsp)                   # 4-byte Folded Reload
	jle	.LBB0_16
# %bb.5:                                # %.preheader51.lr.ph
                                        #   in Loop: Header=BB0_4 Depth=2
	movq	-48(%rsp), %rcx                 # 8-byte Reload
	addq	%r11, %rcx
	leaq	(%rcx,%rcx,2), %rcx
	movq	-56(%rsp), %rdx                 # 8-byte Reload
	leaq	(%rdx,%rcx,4), %rcx
	movq	%rcx, -16(%rsp)                 # 8-byte Spill
	movq	-64(%rsp), %r12                 # 8-byte Reload
	xorl	%ecx, %ecx
.LBB0_6:                                # %.preheader51
                                        #   Parent Loop BB0_2 Depth=1
                                        #     Parent Loop BB0_4 Depth=2
                                        # =>    This Loop Header: Depth=3
                                        #         Child Loop BB0_7 Depth 4
                                        #           Child Loop BB0_8 Depth 5
	xorps	%xmm0, %xmm0
	movq	%r12, -8(%rsp)                  # 8-byte Spill
	movq	-24(%rsp), %rbp                 # 8-byte Reload
	xorl	%esi, %esi
.LBB0_7:                                # %.preheader
                                        #   Parent Loop BB0_2 Depth=1
                                        #     Parent Loop BB0_4 Depth=2
                                        #       Parent Loop BB0_6 Depth=3
                                        # =>      This Loop Header: Depth=4
                                        #           Child Loop BB0_8 Depth 5
	leaq	(%rsi,%r14), %r9
	leaq	(%rsi,%r14), %r15
	addq	$-2, %r15
	movq	$-6, %r10
	movq	%r11, %r13
	movq	%rbp, %rdx
.LBB0_8:                                #   Parent Loop BB0_2 Depth=1
                                        #     Parent Loop BB0_4 Depth=2
                                        #       Parent Loop BB0_6 Depth=3
                                        #         Parent Loop BB0_7 Depth=4
                                        # =>        This Inner Loop Header: Depth=5
	xorps	%xmm1, %xmm1
	cmpq	$2, %r13
	jb	.LBB0_13
# %bb.9:                                #   in Loop: Header=BB0_8 Depth=5
	leaq	-2(%r13), %rdi
	cmpq	%rax, %rdi
	jge	.LBB0_13
# %bb.10:                               #   in Loop: Header=BB0_8 Depth=5
	cmpq	$2, %r9
	jb	.LBB0_13
# %bb.11:                               #   in Loop: Header=BB0_8 Depth=5
	cmpq	%r8, %r15
	jge	.LBB0_13
# %bb.12:                               #   in Loop: Header=BB0_8 Depth=5
	movss	(%r12,%r10,4), %xmm1            # xmm1 = mem[0],zero,zero,zero
	mulss	(%rdx), %xmm1
.LBB0_13:                               #   in Loop: Header=BB0_8 Depth=5
	addss	%xmm1, %xmm0
	addq	$4, %rdx
	incq	%r13
	addq	$3, %r10
	cmpq	$9, %r10
	jne	.LBB0_8
# %bb.14:                               #   in Loop: Header=BB0_7 Depth=4
	incq	%rsi
	addq	$20, %rbp
	addq	%rbx, %r12
	cmpq	$5, %rsi
	jne	.LBB0_7
# %bb.15:                               #   in Loop: Header=BB0_6 Depth=3
	movq	-16(%rsp), %rdx                 # 8-byte Reload
	movss	%xmm0, (%rdx,%rcx,4)
	incq	%rcx
	movq	-8(%rsp), %r12                  # 8-byte Reload
	addq	$4, %r12
	cmpq	-32(%rsp), %rcx                 # 8-byte Folded Reload
	jne	.LBB0_6
.LBB0_16:                               # %._crit_edge
                                        #   in Loop: Header=BB0_4 Depth=2
	incq	%r11
	addq	$12, -64(%rsp)                  # 8-byte Folded Spill
	cmpq	-40(%rsp), %r11                 # 8-byte Folded Reload
	jne	.LBB0_4
.LBB0_17:                               # %._crit_edge60
                                        #   in Loop: Header=BB0_2 Depth=1
	incq	%r14
	addq	%rbx, -72(%rsp)                 # 8-byte Folded Spill
	cmpq	%r8, %r14
	jne	.LBB0_2
.LBB0_18:                               # %._crit_edge62
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z16imageConvolutionPfS_PKfiii, .Lfunc_end0-_Z16imageConvolutionPfS_PKfiii
	.cfi_endproc
                                        # -- End function
	.globl	_Z43__device_stub__imageTiledConvolution_kernelPfS_PKfiii # -- Begin function _Z43__device_stub__imageTiledConvolution_kernelPfS_PKfiii
	.type	_Z43__device_stub__imageTiledConvolution_kernelPfS_PKfiii,@function
_Z43__device_stub__imageTiledConvolution_kernelPfS_PKfiii: # @_Z43__device_stub__imageTiledConvolution_kernelPfS_PKfiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	20(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	16(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z28imageTiledConvolution_kernelPfS_PKfiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z43__device_stub__imageTiledConvolution_kernelPfS_PKfiii, .Lfunc_end1-_Z43__device_stub__imageTiledConvolution_kernelPfS_PKfiii
	.cfi_endproc
                                        # -- End function
	.globl	_Z8loadDataPfS_S_               # -- Begin function _Z8loadDataPfS_S_
	.type	_Z8loadDataPfS_S_,@function
_Z8loadDataPfS_S_:                      # @_Z8loadDataPfS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	pushq	%rax
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	movq	%rdx, %rbx
	xorl	%eax, %eax
.LBB2_1:                                # =>This Inner Loop Header: Depth=1
	movl	$1065353216, (%rdi,%rax,4)      # imm = 0x3F800000
	incq	%rax
	cmpq	$300, %rax                      # imm = 0x12C
	jne	.LBB2_1
# %bb.2:                                # %.preheader11.preheader
	xorl	%r14d, %r14d
	movl	$1200, %edx                     # imm = 0x4B0
	movq	%rsi, %rdi
	xorl	%esi, %esi
	callq	memset@PLT
.LBB2_3:                                # %.preheader
                                        # =>This Inner Loop Header: Depth=1
	movl	$1065353216, (%rbx,%r14,4)      # imm = 0x3F800000
	incq	%r14
	cmpq	$25, %r14
	jne	.LBB2_3
# %bb.4:
	addq	$8, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z8loadDataPfS_S_, .Lfunc_end2-_Z8loadDataPfS_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z7dispResPf                    # -- Begin function _Z7dispResPf
	.type	_Z7dispResPf,@function
_Z7dispResPf:                           # @_Z7dispResPf
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdi, %rbx
	movl	$.Lstr, %edi
	callq	puts@PLT
	xorl	%r14d, %r14d
.LBB3_1:                                # %.preheader12
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_2 Depth 2
                                        #       Child Loop BB3_3 Depth 3
	movq	%rbx, %r15
	xorl	%r12d, %r12d
.LBB3_2:                                # %.preheader
                                        #   Parent Loop BB3_1 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB3_3 Depth 3
	movq	$-120, %r13
.LBB3_3:                                #   Parent Loop BB3_1 Depth=1
                                        #     Parent Loop BB3_2 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	xorps	%xmm0, %xmm0
	cvtss2sd	120(%r15,%r13), %xmm0
	movl	$.L.str.1, %edi
	movb	$1, %al
	callq	printf
	addq	$12, %r13
	jne	.LBB3_3
# %bb.4:                                #   in Loop: Header=BB3_2 Depth=2
	movl	$10, %edi
	callq	putchar@PLT
	incq	%r12
	addq	$120, %r15
	cmpq	$10, %r12
	jne	.LBB3_2
# %bb.5:                                #   in Loop: Header=BB3_1 Depth=1
	movl	$.L.str.3, %edi
	movl	%r14d, %esi
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.4, %edi
	callq	system
	incq	%r14
	addq	$4, %rbx
	cmpq	$3, %r14
	jne	.LBB3_1
# %bb.6:
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z7dispResPf, .Lfunc_end3-_Z7dispResPf
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$1200, %edi                     # imm = 0x4B0
	callq	malloc
	movq	%rax, %rbx
	movl	$1200, %edi                     # imm = 0x4B0
	callq	malloc
	movq	%rax, %r14
	movl	$1200, %edi                     # imm = 0x4B0
	callq	malloc
	movq	%rax, %r15
	movl	$100, %edi
	callq	malloc
	movq	%rax, %r12
	xorl	%eax, %eax
.LBB4_1:                                # =>This Inner Loop Header: Depth=1
	movl	$1065353216, (%rbx,%rax,4)      # imm = 0x3F800000
	incq	%rax
	cmpq	$300, %rax                      # imm = 0x12C
	jne	.LBB4_1
# %bb.2:                                # %.preheader11.preheader.i
	xorl	%r13d, %r13d
	movl	$1200, %edx                     # imm = 0x4B0
	movq	%r14, %rdi
	xorl	%esi, %esi
	callq	memset@PLT
.LBB4_3:                                # %.preheader.i
                                        # =>This Inner Loop Header: Depth=1
	movl	$1065353216, (%r12,%r13,4)      # imm = 0x3F800000
	incq	%r13
	cmpq	$25, %r13
	jne	.LBB4_3
# %bb.4:                                # %_Z8loadDataPfS_S_.exit
	leaq	16(%rsp), %r13
	movl	$1200, %esi                     # imm = 0x4B0
	movq	%r13, %rdi
	callq	hipMalloc
	movq	%rsp, %rdi
	movl	$1200, %esi                     # imm = 0x4B0
	callq	hipMalloc
	leaq	8(%rsp), %rbp
	movl	$100, %esi
	movq	%rbp, %rdi
	callq	hipMalloc
	movq	(%r13), %rdi
	movl	$1200, %edx                     # imm = 0x4B0
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%rbp), %rdi
	movl	$100, %edx
	movq	%r12, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movabsq	$4294967297, %rdi               # imm = 0x100000001
	movabsq	$68719476752, %rdx              # imm = 0x1000000010
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB4_6
# %bb.5:
	movq	16(%rsp), %rdi
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdx
	movl	$10, %ecx
	movl	$10, %r8d
	movl	$3, %r9d
	callq	_Z43__device_stub__imageTiledConvolution_kernelPfS_PKfiii
.LBB4_6:
	movq	%rbx, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movl	$10, %ecx
	movl	$10, %r8d
	movl	$3, %r9d
	callq	_Z16imageConvolutionPfS_PKfiii
	movq	(%rsp), %rsi
	movl	$1200, %edx                     # imm = 0x4B0
	movq	%r14, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	%r14, %rdi
	callq	_Z7dispResPf
	movq	%rbx, %rdi
	callq	free
	movq	%r14, %rdi
	callq	free
	movq	%r15, %rdi
	callq	free
	movq	%r12, %rdi
	callq	free
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	main, .Lfunc_end4-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB5_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB5_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z28imageTiledConvolution_kernelPfS_PKfiii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end5:
	.size	__hip_module_ctor, .Lfunc_end5-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB6_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB6_2:
	retq
.Lfunc_end6:
	.size	__hip_module_dtor, .Lfunc_end6-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z28imageTiledConvolution_kernelPfS_PKfiii,@object # @_Z28imageTiledConvolution_kernelPfS_PKfiii
	.section	.rodata,"a",@progbits
	.globl	_Z28imageTiledConvolution_kernelPfS_PKfiii
	.p2align	3, 0x0
_Z28imageTiledConvolution_kernelPfS_PKfiii:
	.quad	_Z43__device_stub__imageTiledConvolution_kernelPfS_PKfiii
	.size	_Z28imageTiledConvolution_kernelPfS_PKfiii, 8

	.type	.L.str.1,@object                # @.str.1
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.1:
	.asciz	"%2.1f "
	.size	.L.str.1, 7

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"k = %d\n"
	.size	.L.str.3, 8

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"pause"
	.size	.L.str.4, 6

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z28imageTiledConvolution_kernelPfS_PKfiii"
	.size	.L__unnamed_1, 43

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"Results of the calculation"
	.size	.Lstr, 27

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z43__device_stub__imageTiledConvolution_kernelPfS_PKfiii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z28imageTiledConvolution_kernelPfS_PKfiii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z28imageTiledConvolution_kernelPfS_PKfiii ; -- Begin function _Z28imageTiledConvolution_kernelPfS_PKfiii
	.globl	_Z28imageTiledConvolution_kernelPfS_PKfiii
	.p2align	8
	.type	_Z28imageTiledConvolution_kernelPfS_PKfiii,@function
_Z28imageTiledConvolution_kernelPfS_PKfiii: ; @_Z28imageTiledConvolution_kernelPfS_PKfiii
; %bb.0:
	s_load_b128 s[4:7], s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s6, 1
	s_cbranch_scc1 .LBB0_12
; %bb.1:                                ; %.lr.ph
	v_and_b32_e32 v1, 0x3ff, v0
	v_bfe_u32 v4, v0, 10, 10
	s_clause 0x1
	s_load_b64 s[12:13], s[0:1], 0x10
	s_load_b128 s[8:11], s[0:1], 0x0
	s_mov_b32 s7, 0
	v_mad_u64_u32 v[2:3], null, s14, 12, v[1:2]
	v_mad_u64_u32 v[5:6], null, s15, 12, v[4:5]
	v_max_u32_e32 v3, v4, v1
	v_mul_u32_u24_e32 v0, 12, v1
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v1, -2, v2
	v_cmp_gt_u32_e32 vcc_lo, 12, v3
	v_add_nc_u32_e32 v9, -2, v5
	v_mad_u64_u32 v[6:7], null, v5, s4, v[2:3]
	v_min_i32_e32 v3, v2, v5
	v_cmp_gt_i32_e64 s0, s5, v5
	s_delay_alu instid0(VALU_DEP_4)
	v_mad_u64_u32 v[7:8], null, v9, s4, v[1:2]
	v_cmp_gt_i32_e64 s1, s5, v9
	v_cmp_gt_i32_e64 s2, s4, v1
	v_cmp_gt_i32_e64 s3, s4, v2
	v_mul_lo_u32 v1, v6, s6
	v_cmp_lt_i32_e64 s4, 1, v3
	v_mad_u32_u24 v3, 0xc0, v4, v0
	v_mul_lo_u32 v2, v7, s6
	v_mul_u32_u24_e32 v4, 0xc0, v4
	s_and_b32 s1, s1, s2
	s_and_b32 s0, s3, s0
	s_and_b32 s4, s1, s4
	s_and_b32 s5, vcc_lo, s0
.LBB0_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_6 Depth 2
                                        ;       Child Loop BB0_7 Depth 3
	v_dual_mov_b32 v5, 0 :: v_dual_mov_b32 v6, 0
	s_and_saveexec_b32 s1, s4
	s_cbranch_execz .LBB0_4
; %bb.3:                                ;   in Loop: Header=BB0_2 Depth=1
	v_add_nc_u32_e32 v6, s7, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v7, 31, v6
	v_lshlrev_b64 v[6:7], 2, v[6:7]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v6, s0, s8, v6
	v_add_co_ci_u32_e64 v7, s0, s9, v7, s0
	global_load_b32 v6, v[6:7], off
.LBB0_4:                                ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_lshl_b32 s0, s7, 2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add3_u32 v7, v4, v0, s0
	s_waitcnt vmcnt(0)
	ds_store_b32 v7, v6
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s14, vcc_lo
	s_cbranch_execz .LBB0_9
; %bb.5:                                ; %.preheader.preheader
                                        ;   in Loop: Header=BB0_2 Depth=1
	v_dual_mov_b32 v5, 0 :: v_dual_mov_b32 v6, v3
	s_mov_b32 s15, 0
	s_mov_b64 s[0:1], s[12:13]
.LBB0_6:                                ; %.preheader
                                        ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB0_7 Depth 3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b64 s[2:3], s[0:1]
	s_mov_b32 s16, 0
.LBB0_7:                                ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_nc_u32_e32 v7, s16, v6
	s_load_b32 s17, s[2:3], 0x0
	s_add_i32 s16, s16, 12
	s_add_u32 s2, s2, 4
	s_addc_u32 s3, s3, 0
	ds_load_b32 v7, v7
	s_cmp_lg_u32 s16, 60
	s_waitcnt lgkmcnt(0)
	v_fmac_f32_e32 v5, s17, v7
	s_cbranch_scc1 .LBB0_7
; %bb.8:                                ;   in Loop: Header=BB0_6 Depth=2
	s_add_i32 s15, s15, 1
	v_add_nc_u32_e32 v6, 0xc0, v6
	s_add_u32 s0, s0, 20
	s_addc_u32 s1, s1, 0
	s_cmp_lg_u32 s15, 5
	s_cbranch_scc1 .LBB0_6
.LBB0_9:                                ; %Flow109
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s14
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s1, s5
	s_cbranch_execz .LBB0_11
; %bb.10:                               ;   in Loop: Header=BB0_2 Depth=1
	v_add_nc_u32_e32 v6, s7, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v7, 31, v6
	v_lshlrev_b64 v[6:7], 2, v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v6, s0, s10, v6
	v_add_co_ci_u32_e64 v7, s0, s11, v7, s0
	global_store_b32 v[6:7], v5, off
.LBB0_11:                               ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	v_add_nc_u32_e32 v3, 4, v3
	s_add_i32 s7, s7, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s7, s6
	s_cbranch_scc0 .LBB0_2
.LBB0_12:                               ; %._crit_edge
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z28imageTiledConvolution_kernelPfS_PKfiii
		.amdhsa_group_segment_fixed_size 3072
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 36
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 18
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z28imageTiledConvolution_kernelPfS_PKfiii, .Lfunc_end0-_Z28imageTiledConvolution_kernelPfS_PKfiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 560
; NumSgprs: 20
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 3072 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 20
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .actual_access:  read_only
        .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 3072
    .kernarg_segment_align: 8
    .kernarg_segment_size: 36
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z28imageTiledConvolution_kernelPfS_PKfiii
    .private_segment_fixed_size: 0
    .sgpr_count:     20
    .sgpr_spill_count: 0
    .symbol:         _Z28imageTiledConvolution_kernelPfS_PKfiii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     10
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
