#include<iostream>
#include<ctime>
#define Size 512
using namespace std;
template<typename T, unsigned int BlockSize>
void __global__ add(const T* lhs,const T *rhs ,T*sum, const unsigned int n) {
  unsigned int idx = threadIdx.x + blockIdx.x * blockDim.x*4;
  if(idx + 3*blockDim.x < n) {
    sum[idx] = lhs[idx] + rhs[idx];
    sum[idx + blockDim.x] = lhs[idx + blockDim.x] + rhs[idx + blockDim.x];
    sum[idx + blockDim.x*2] = lhs[idx + blockDim.x*2] + rhs[idx + blockDim.x*2];
    sum[idx + blockDim.x*3] = lhs[idx + blockDim.x*3] + rhs[idx + blockDim.x*3];
  }
}
int main() {
  int N = 1 << 19;
  dim3 block(Size,1);
  dim3 grid( (N + Size - 1)/Size/4 ,1);
  float  a[N],b[N],c[N] ,*a_dev,*b_dev,*c_dev;
  clock_t start, end;
  memset(c, 0 , sizeof(c));
  auto init = [&](auto* a,unsigned int n) {
    for (int i = 0;i < n;i++) {
      a[i] = (float)(rand()&0xff) / 100.0f;
    }
  };
  init(a,N);
  init(b,N);
  cudaMalloc((void**)&a_dev, sizeof(float)*N);
  cudaMalloc((void**)&b_dev, sizeof(float)*N);
  cudaMalloc((void**)&c_dev, sizeof(float)*N);
  cudaMemcpy(a_dev ,a , sizeof(a),cudaMemcpyHostToDevice);
  cudaMemcpy(b_dev ,b , sizeof(b),cudaMemcpyHostToDevice);
  start = clock();
  add<float,Size><<<grid, block>>>(a_dev, b_dev, c_dev,N);
  cudaDeviceSynchronize();
  end = clock();
  cout << "sum time on gpu:" << end - start << endl;

  cudaMemcpy(c, c_dev,sizeof(c),cudaMemcpyDeviceToHost);
  for (int i = 0;i < N;i++) {
    if(a[i] + b[i] != c[i]) {
      cout << "failed" <<endl;
    }
  }
  return 0;
}

	.file	"tmpxft_00311526_00000000-6_add.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3642:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3642:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.type	_ZL42__device_stub__Z3addIfLj512EEvPKT_S2_PS0_jPKfS0_Pfj, @function
_ZL42__device_stub__Z3addIfLj512EEvPKT_S2_PS0_jPKfS0_Pfj:
.LFB3664:
	.cfi_startproc
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z3addIfLj512EEvPKT_S2_PS0_j(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L2:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3664:
	.size	_ZL42__device_stub__Z3addIfLj512EEvPKT_S2_PS0_jPKfS0_Pfj, .-_ZL42__device_stub__Z3addIfLj512EEvPKT_S2_PS0_jPKfS0_Pfj
	.section	.text._Z3addIfLj512EEvPKT_S2_PS0_j,"axG",@progbits,_Z3addIfLj512EEvPKT_S2_PS0_j,comdat
	.weak	_Z3addIfLj512EEvPKT_S2_PS0_j
	.type	_Z3addIfLj512EEvPKT_S2_PS0_j, @function
_Z3addIfLj512EEvPKT_S2_PS0_j:
.LFB3967:
	.cfi_startproc
	endbr64
	jmp	_ZL42__device_stub__Z3addIfLj512EEvPKT_S2_PS0_jPKfS0_Pfj
	.cfi_endproc
.LFE3967:
	.size	_Z3addIfLj512EEvPKT_S2_PS0_j, .-_Z3addIfLj512EEvPKT_S2_PS0_j
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"sum time on gpu:"
.LC2:
	.string	"failed"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3637:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register 6
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$88, %rsp
	.cfi_offset 15, -24
	.cfi_offset 14, -32
	.cfi_offset 13, -40
	.cfi_offset 12, -48
	.cfi_offset 3, -56
	movq	%fs:40, %rax
	movq	%rax, -56(%rbp)
	movabsq	$4294967808, %rax
	movl	$1, -72(%rbp)
	movl	$1, -60(%rbp)
	movq	%rax, -80(%rbp)
	subq	$256, %rax
	movq	%rax, -68(%rbp)
	leaq	-2097152(%rsp), %rax
.L9:
	cmpq	%rax, %rsp
	je	.L10
	subq	$4096, %rsp
	orq	$0, 4088(%rsp)
	jmp	.L9
.L10:
	movq	%rsp, %r12
	leaq	-2097152(%rsp), %rax
.L12:
	cmpq	%rax, %rsp
	je	.L13
	subq	$4096, %rsp
	orq	$0, 4088(%rsp)
	jmp	.L12
.L13:
	movq	%rsp, %r13
	leaq	-2097152(%rsp), %rax
.L15:
	cmpq	%rax, %rsp
	je	.L16
	subq	$4096, %rsp
	orq	$0, 4088(%rsp)
	jmp	.L15
.L16:
	movl	$524288, %ecx
	xorl	%eax, %eax
	xorl	%ebx, %ebx
	movq	%rsp, %rdi
	movq	%rsp, -120(%rbp)
	rep stosl
.L18:
	call	rand@PLT
	movzbl	%al, %eax
	cvtsi2ssl	%eax, %xmm0
	divss	.LC0(%rip), %xmm0
	movss	%xmm0, (%r12,%rbx,4)
	incq	%rbx
	cmpq	$524288, %rbx
	jne	.L18
	xorl	%ebx, %ebx
.L19:
	call	rand@PLT
	movzbl	%al, %eax
	cvtsi2ssl	%eax, %xmm0
	divss	.LC0(%rip), %xmm0
	movss	%xmm0, 0(%r13,%rbx,4)
	incq	%rbx
	cmpq	$524288, %rbx
	jne	.L19
	leaq	-104(%rbp), %rdi
	movl	$2097152, %esi
	call	cudaMalloc@PLT
	leaq	-96(%rbp), %rdi
	movl	$2097152, %esi
	call	cudaMalloc@PLT
	leaq	-88(%rbp), %rdi
	movl	$2097152, %esi
	call	cudaMalloc@PLT
	movq	-104(%rbp), %rdi
	movl	$1, %ecx
	movq	%r12, %rsi
	movl	$2097152, %edx
	call	cudaMemcpy@PLT
	movq	-96(%rbp), %rdi
	movl	$1, %ecx
	movq	%r13, %rsi
	movl	$2097152, %edx
	call	cudaMemcpy@PLT
	call	clock@PLT
	movl	-72(%rbp), %ecx
	movq	-80(%rbp), %rdx
	xorl	%r9d, %r9d
	movq	-68(%rbp), %rdi
	movl	-60(%rbp), %esi
	xorl	%r8d, %r8d
	movq	%rax, %r14
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L20
	movq	-88(%rbp), %rdx
	movq	-96(%rbp), %rsi
	movl	$524288, %ecx
	movq	-104(%rbp), %rdi
	call	_ZL42__device_stub__Z3addIfLj512EEvPKT_S2_PS0_jPKfS0_Pfj
.L20:
	call	cudaDeviceSynchronize@PLT
	leaq	_ZSt4cout(%rip), %r15
	call	clock@PLT
	leaq	.LC1(%rip), %rsi
	movq	%r15, %rdi
	movq	%rax, %rbx
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	subq	%r14, %rbx
	xorl	%r14d, %r14d
	movq	%rbx, %rsi
	movq	%rax, %rdi
	leaq	.LC2(%rip), %rbx
	call	_ZNSo9_M_insertIlEERSoT_@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	movq	-88(%rbp), %rsi
	movq	-120(%rbp), %rdi
	movl	$2, %ecx
	movl	$2097152, %edx
	call	cudaMemcpy@PLT
.L23:
	movq	-120(%rbp), %rax
	movss	(%r12,%r14), %xmm0
	addss	0(%r13,%r14), %xmm0
	ucomiss	(%rax,%r14), %xmm0
	jp	.L25
	je	.L21
.L25:
	movq	%r15, %rdi
	movq	%rbx, %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
.L21:
	addq	$4, %r14
	cmpq	$2097152, %r14
	jne	.L23
	movq	-56(%rbp), %rax
	subq	%fs:40, %rax
	je	.L24
	call	__stack_chk_fail@PLT
.L24:
	leaq	-40(%rbp), %rsp
	xorl	%eax, %eax
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE3637:
	.size	main, .-main
	.section	.rodata.str1.1
.LC3:
	.string	"_Z3addIfLj512EEvPKT_S2_PS0_j"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3667:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC3(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z3addIfLj512EEvPKT_S2_PS0_j(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3667:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC0:
	.long	1120403456
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include<iostream>
#include<ctime>
#define Size 512
using namespace std;
template<typename T, unsigned int BlockSize>
void __global__ add(const T* lhs,const T *rhs ,T*sum, const unsigned int n) {
  unsigned int idx = threadIdx.x + blockIdx.x * blockDim.x*4;
  if(idx + 3*blockDim.x < n) {
    sum[idx] = lhs[idx] + rhs[idx];
    sum[idx + blockDim.x] = lhs[idx + blockDim.x] + rhs[idx + blockDim.x];
    sum[idx + blockDim.x*2] = lhs[idx + blockDim.x*2] + rhs[idx + blockDim.x*2];
    sum[idx + blockDim.x*3] = lhs[idx + blockDim.x*3] + rhs[idx + blockDim.x*3];
  }
}
int main() {
  int N = 1 << 19;
  dim3 block(Size,1);
  dim3 grid( (N + Size - 1)/Size/4 ,1);
  float  a[N],b[N],c[N] ,*a_dev,*b_dev,*c_dev;
  clock_t start, end;
  memset(c, 0 , sizeof(c));
  auto init = [&](auto* a,unsigned int n) {
    for (int i = 0;i < n;i++) {
      a[i] = (float)(rand()&0xff) / 100.0f;
    }
  };
  init(a,N);
  init(b,N);
  hipMalloc((void**)&a_dev, sizeof(float)*N);
  hipMalloc((void**)&b_dev, sizeof(float)*N);
  hipMalloc((void**)&c_dev, sizeof(float)*N);
  hipMemcpy(a_dev ,a , sizeof(a),hipMemcpyHostToDevice);
  hipMemcpy(b_dev ,b , sizeof(b),hipMemcpyHostToDevice);
  start = clock();
  add<float,Size><<<grid, block>>>(a_dev, b_dev, c_dev,N);
  hipDeviceSynchronize();
  end = clock();
  cout << "sum time on gpu:" << end - start << endl;

  hipMemcpy(c, c_dev,sizeof(c),hipMemcpyDeviceToHost);
  for (int i = 0;i < N;i++) {
    if(a[i] + b[i] != c[i]) {
      cout << "failed" <<endl;
    }
  }
  return 0;
}

	.text
	.file	"add.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI0_0:
	.long	0x42c80000                      # float 100
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$6291488, %rsp                  # imm = 0x600020
	.cfi_def_cfa_offset 6291520
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	32(%rsp), %rdi
	xorl	%ebx, %ebx
	movl	$2097152, %edx                  # imm = 0x200000
	xorl	%esi, %esi
	callq	memset@PLT
.LBB0_1:                                # =>This Inner Loop Header: Depth=1
	callq	rand
	movss	.LCPI0_0(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	movzbl	%al, %eax
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	divss	%xmm1, %xmm0
	movss	%xmm0, 4194336(%rsp,%rbx,4)
	incq	%rbx
	cmpq	$524288, %rbx                   # imm = 0x80000
	jne	.LBB0_1
# %bb.2:                                # %_ZZ4mainENKUlPT_jE_clIfEEDaS0_j.exit.preheader
	xorl	%ebx, %ebx
.LBB0_3:                                # %_ZZ4mainENKUlPT_jE_clIfEEDaS0_j.exit
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	movzbl	%al, %eax
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	divss	.LCPI0_0(%rip), %xmm0
	movss	%xmm0, 2097184(%rsp,%rbx,4)
	incq	%rbx
	cmpq	$524288, %rbx                   # imm = 0x80000
	jne	.LBB0_3
# %bb.4:                                # %_ZZ4mainENKUlPT_jE_clIfEEDaS0_j.exit28
	leaq	24(%rsp), %rbx
	movl	$2097152, %esi                  # imm = 0x200000
	movq	%rbx, %rdi
	callq	hipMalloc
	leaq	16(%rsp), %r14
	movl	$2097152, %esi                  # imm = 0x200000
	movq	%r14, %rdi
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	movl	$2097152, %esi                  # imm = 0x200000
	callq	hipMalloc
	movq	(%rbx), %rdi
	leaq	4194336(%rsp), %rsi
	movl	$2097152, %edx                  # imm = 0x200000
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r14), %rdi
	leaq	2097184(%rsp), %rsi
	movl	$2097152, %edx                  # imm = 0x200000
	movl	$1, %ecx
	callq	hipMemcpy
	callq	clock
	movq	%rax, %rbx
	movabsq	$4294967552, %rdi               # imm = 0x100000100
	leaq	256(%rdi), %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB0_6
# %bb.5:
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
	movl	$524288, %ecx                   # imm = 0x80000
	callq	_Z18__device_stub__addIfLj512EEvPKT_S2_PS0_j
.LBB0_6:
	callq	hipDeviceSynchronize
	callq	clock
	movq	%rax, %r14
	movl	$_ZSt4cout, %r15d
	movl	$_ZSt4cout, %edi
	movl	$.L.str, %esi
	movl	$16, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	subq	%rbx, %r14
	movl	$_ZSt4cout, %edi
	movq	%r14, %rsi
	callq	_ZNSo9_M_insertIlEERSoT_
	movq	%rax, %rbx
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	8(%rsp), %rsi
	leaq	32(%rsp), %rdi
	movl	$2097152, %edx                  # imm = 0x200000
	movl	$2, %ecx
	callq	hipMemcpy
	xorl	%ebx, %ebx
.LBB0_7:                                # =>This Inner Loop Header: Depth=1
	movss	4194336(%rsp,%rbx,4), %xmm0     # xmm0 = mem[0],zero,zero,zero
	addss	2097184(%rsp,%rbx,4), %xmm0
	ucomiss	32(%rsp,%rbx,4), %xmm0
	jne	.LBB0_8
	jnp	.LBB0_9
.LBB0_8:                                #   in Loop: Header=BB0_7 Depth=1
	movl	$_ZSt4cout, %edi
	movl	$.L.str.1, %esi
	movl	$6, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%r15, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.LBB0_9:                                #   in Loop: Header=BB0_7 Depth=1
	incq	%rbx
	cmpq	$524288, %rbx                   # imm = 0x80000
	jne	.LBB0_7
# %bb.10:
	xorl	%eax, %eax
	addq	$6291488, %rsp                  # imm = 0x600020
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	main, .Lfunc_end0-main
	.cfi_endproc
                                        # -- End function
	.section	.text._Z18__device_stub__addIfLj512EEvPKT_S2_PS0_j,"axG",@progbits,_Z18__device_stub__addIfLj512EEvPKT_S2_PS0_j,comdat
	.weak	_Z18__device_stub__addIfLj512EEvPKT_S2_PS0_j # -- Begin function _Z18__device_stub__addIfLj512EEvPKT_S2_PS0_j
	.type	_Z18__device_stub__addIfLj512EEvPKT_S2_PS0_j,@function
_Z18__device_stub__addIfLj512EEvPKT_S2_PS0_j: # @_Z18__device_stub__addIfLj512EEvPKT_S2_PS0_j
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z3addIfLj512EEvPKT_S2_PS0_j, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z18__device_stub__addIfLj512EEvPKT_S2_PS0_j, .Lfunc_end1-_Z18__device_stub__addIfLj512EEvPKT_S2_PS0_j
	.cfi_endproc
                                        # -- End function
	.text
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z3addIfLj512EEvPKT_S2_PS0_j, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z3addIfLj512EEvPKT_S2_PS0_j,@object # @_Z3addIfLj512EEvPKT_S2_PS0_j
	.section	.rodata._Z3addIfLj512EEvPKT_S2_PS0_j,"aG",@progbits,_Z3addIfLj512EEvPKT_S2_PS0_j,comdat
	.weak	_Z3addIfLj512EEvPKT_S2_PS0_j
	.p2align	3, 0x0
_Z3addIfLj512EEvPKT_S2_PS0_j:
	.quad	_Z18__device_stub__addIfLj512EEvPKT_S2_PS0_j
	.size	_Z3addIfLj512EEvPKT_S2_PS0_j, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"sum time on gpu:"
	.size	.L.str, 17

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"failed"
	.size	.L.str.1, 7

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z3addIfLj512EEvPKT_S2_PS0_j"
	.size	.L__unnamed_1, 29

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z18__device_stub__addIfLj512EEvPKT_S2_PS0_j
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z3addIfLj512EEvPKT_S2_PS0_j
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.section	.text._Z3addIfLj512EEvPKT_S2_PS0_j,"axG",@progbits,_Z3addIfLj512EEvPKT_S2_PS0_j,comdat
	.protected	_Z3addIfLj512EEvPKT_S2_PS0_j ; -- Begin function _Z3addIfLj512EEvPKT_S2_PS0_j
	.globl	_Z3addIfLj512EEvPKT_S2_PS0_j
	.p2align	8
	.type	_Z3addIfLj512EEvPKT_S2_PS0_j,@function
_Z3addIfLj512EEvPKT_S2_PS0_j:           ; @_Z3addIfLj512EEvPKT_S2_PS0_j
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s15, s15, s2
	v_lshl_add_u32 v0, s15, 2, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, s2, 3, v[0:1]
	v_cmp_gt_u32_e32 vcc_lo, s3, v2
	s_and_saveexec_b32 s3, vcc_lo
	s_cbranch_execz .LBB0_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_mov_b32_e32 v1, 0
	s_load_b64 s[0:1], s[0:1], 0x10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[3:4], 2, v[0:1]
	v_add_nc_u32_e32 v0, s2, v0
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v5, vcc_lo, s4, v3
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v6, vcc_lo, s5, v4, vcc_lo
	v_add_co_u32 v7, vcc_lo, s6, v3
	v_add_co_ci_u32_e32 v8, vcc_lo, s7, v4, vcc_lo
	v_add_co_u32 v3, vcc_lo, s0, v3
	global_load_b32 v9, v[5:6], off
	global_load_b32 v10, v[7:8], off
	v_lshlrev_b64 v[5:6], 2, v[0:1]
	v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
	v_add_nc_u32_e32 v0, s2, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v7, vcc_lo, s4, v5
	v_add_co_ci_u32_e32 v8, vcc_lo, s5, v6, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v11, v9, v10
	v_add_co_u32 v9, vcc_lo, s6, v5
	v_add_co_ci_u32_e32 v10, vcc_lo, s7, v6, vcc_lo
	global_store_b32 v[3:4], v11, off
	global_load_b32 v11, v[7:8], off
	global_load_b32 v9, v[9:10], off
	v_lshlrev_b64 v[7:8], 2, v[0:1]
	v_add_co_u32 v3, vcc_lo, s0, v5
	v_add_co_ci_u32_e32 v4, vcc_lo, s1, v6, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v5, vcc_lo, s4, v7
	v_add_co_ci_u32_e32 v6, vcc_lo, s5, v8, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v0, v11, v9
	v_add_co_u32 v9, vcc_lo, s6, v7
	v_add_co_ci_u32_e32 v10, vcc_lo, s7, v8, vcc_lo
	global_store_b32 v[3:4], v0, off
	v_mov_b32_e32 v3, v1
	global_load_b32 v6, v[5:6], off
	global_load_b32 v9, v[9:10], off
	v_lshlrev_b64 v[0:1], 2, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s0, v7
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v8, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v8, v6, v9
	v_add_co_u32 v6, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v7, vcc_lo, s7, v1, vcc_lo
	global_store_b32 v[4:5], v8, off
	global_load_b32 v2, v[2:3], off
	global_load_b32 v3, v[6:7], off
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v2, v2, v3
	global_store_b32 v[0:1], v2, off
.LBB0_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z3addIfLj512EEvPKT_S2_PS0_j
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 12
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z3addIfLj512EEvPKT_S2_PS0_j,"axG",@progbits,_Z3addIfLj512EEvPKT_S2_PS0_j,comdat
.Lfunc_end0:
	.size	_Z3addIfLj512EEvPKT_S2_PS0_j, .Lfunc_end0-_Z3addIfLj512EEvPKT_S2_PS0_j
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 444
; NumSgprs: 18
; NumVgprs: 12
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 12
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z3addIfLj512EEvPKT_S2_PS0_j
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z3addIfLj512EEvPKT_S2_PS0_j.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     12
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
