#include <cmath>
#include <cstdlib>
#include <cstdio>
#include <sys/time.h>

#define M 1024

__global__ void matmul(float *A, float *B, float *C, int N) {
  int i = blockIdx.y;
  int j = threadIdx.x + blockDim.x * blockIdx.x;
  float sum = 0.0f;
  __shared__ float s_A[M];
  for (int ks=0; ks<N; ks+=M) {
    __syncthreads();
    s_A[threadIdx.x] = A[N*i+ks+threadIdx.x];
    __syncthreads();
    for (int k=ks; k<ks+M; k++) {
      sum += s_A[k-ks] * B[N*k+j];
    }
  }
  C[N*i+j] = sum;
}

int main(int argc, char **argv) {
  int N = atoi(argv[1]);
  float * h_A = new float [N*N];
  float * h_B = new float [N*N];
  float * h_C = new float [N*N];
  float *d_A, *d_B, *d_C;
  int size = N * N * sizeof(float);
  cudaMalloc((void **) &d_A, size);
  cudaMalloc((void **) &d_B, size);
  cudaMalloc((void **) &d_C, size);

  for (int i=0; i<N; i++) {
    for (int j=0; j<N; j++) {
      h_A[N*i+j] = drand48();
      h_B[N*i+j] = drand48();
      h_C[N*i+j] = 0;
    }
  }
  cudaMemcpy(d_A, h_A, size, cudaMemcpyHostToDevice);
  cudaMemcpy(d_B, h_B, size, cudaMemcpyHostToDevice);
  cudaMemcpy(d_C, h_C, size, cudaMemcpyHostToDevice);
  dim3 grid(N/M, N);
  struct timeval tic, toc;
  gettimeofday(&tic, NULL);
  matmul<<<grid,M>>>(d_A, d_B, d_C, N);
  cudaDeviceSynchronize();
  gettimeofday(&toc, NULL);
  double time = toc.tv_sec-tic.tv_sec+(toc.tv_usec-tic.tv_usec)*1e-6;
  printf("N=%d: %lf s (%lf GFlops)\n",N,time,2.*N*N*N/time/1e9);
  cudaMemcpy(h_A, d_A, size, cudaMemcpyDeviceToHost);
  cudaMemcpy(h_B, d_B, size, cudaMemcpyDeviceToHost);
  cudaMemcpy(h_C, d_C, size, cudaMemcpyDeviceToHost);

  gettimeofday(&tic, NULL);
#pragma omp parallel for
  for (int i=0; i<N; i++) {
    for (int k=0; k<N; k++) {
      for (int j=0; j<N; j++) {
        h_C[N*i+j] -= h_A[N*i+k] * h_B[N*k+j];
      }
    }
  }
  gettimeofday(&toc, NULL);
  time = toc.tv_sec-tic.tv_sec+(toc.tv_usec-tic.tv_usec)*1e-6;
  printf("N=%d: %lf s (%lf GFlops)\n",N,time,2.*N*N*N/time/1e9);
  float err = 0;
  for (int i=0; i<N; i++) {
    for (int j=0; j<N; j++) {
      err += fabs(h_C[N*i+j]);
    }
  }
  printf("error: %f\n",err/N/N);
  delete[] h_A;
  delete[] h_B;
  delete[] h_C;
}

	.file	"tmpxft_002bfa33_00000000-6_03_gpu.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2030:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z30__device_stub__Z6matmulPfS_S_iPfS_S_i
	.type	_Z30__device_stub__Z6matmulPfS_S_iPfS_S_i, @function
_Z30__device_stub__Z6matmulPfS_S_iPfS_S_i:
.LFB2052:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z6matmulPfS_S_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L2:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2052:
	.size	_Z30__device_stub__Z6matmulPfS_S_iPfS_S_i, .-_Z30__device_stub__Z6matmulPfS_S_iPfS_S_i
	.globl	_Z6matmulPfS_S_i
	.type	_Z6matmulPfS_S_i, @function
_Z6matmulPfS_S_i:
.LFB2053:
	.cfi_startproc
	endbr64
	jmp	_Z30__device_stub__Z6matmulPfS_S_iPfS_S_i
	.cfi_endproc
.LFE2053:
	.size	_Z6matmulPfS_S_i, .-_Z6matmulPfS_S_i
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC3:
	.string	"N=%d: %lf s (%lf GFlops)\n"
.LC5:
	.string	"error: %f\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	xorl	%r15d, %r15d
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$120, %rsp
	.cfi_def_cfa_offset 176
	movq	8(%rsi), %rdi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	call	atoi@PLT
	movslq	%eax, %r14
	movl	%r14d, %ebp
	movq	%r14, %rbx
	imull	%r14d, %ebp
	salq	$2, %r14
	movslq	%ebp, %r12
	sall	$2, %ebp
	salq	$2, %r12
	movq	%r12, %rdi
	call	_Znam@PLT
	movq	%r12, %rdi
	movq	%rax, %r13
	call	_Znam@PLT
	movq	%r12, %rdi
	movq	%rax, 16(%rsp)
	call	_Znam@PLT
	leaq	32(%rsp), %rdi
	movq	%rax, %r12
	movslq	%ebp, %rax
	xorl	%ebp, %ebp
	movq	%rax, %rsi
	movq	%rax, 8(%rsp)
	call	cudaMalloc@PLT
	movq	8(%rsp), %rsi
	leaq	40(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rsi
	leaq	48(%rsp), %rdi
	call	cudaMalloc@PLT
.L9:
	cmpl	%ebx, %ebp
	jge	.L26
	leaq	(%r15,%r14), %rdx
.L10:
	movq	%rdx, 24(%rsp)
	call	drand48@PLT
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, 0(%r13,%r15)
	call	drand48@PLT
	movq	16(%rsp), %rax
	movq	24(%rsp), %rdx
	movl	$0x00000000, (%r12,%r15)
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, (%rax,%r15)
	addq	$4, %r15
	cmpq	%rdx, %r15
	jne	.L10
	incl	%ebp
	jmp	.L9
.L26:
	movq	8(%rsp), %rdx
	movq	32(%rsp), %rdi
	movl	$1, %ecx
	movq	%r13, %rsi
	leaq	72(%rsp), %r15
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rdx
	movq	16(%rsp), %rsi
	movl	$1, %ecx
	movq	40(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rdx
	movq	48(%rsp), %rdi
	movq	%r12, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movl	%ebx, %eax
	movl	$1024, %ecx
	xorl	%esi, %esi
	cltd
	movq	%r15, %rdi
	movl	%ebx, 64(%rsp)
	idivl	%ecx
	movl	$1, 68(%rsp)
	movl	%eax, 60(%rsp)
	call	gettimeofday@PLT
	movl	$4194305, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	60(%rsp), %rdi
	movl	68(%rsp), %esi
	salq	$10, %rdx
	movl	$1, %ecx
	movq	%rdx, 88(%rsp)
	movl	$1, 96(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L12
	movq	48(%rsp), %rdx
	movq	40(%rsp), %rsi
	movl	%ebx, %ecx
	movq	32(%rsp), %rdi
	call	_Z30__device_stub__Z6matmulPfS_S_iPfS_S_i
.L12:
	call	cudaDeviceSynchronize@PLT
	leaq	88(%rsp), %rax
	xorl	%esi, %esi
	movq	%rax, %rdi
	movq	%rax, 24(%rsp)
	call	gettimeofday@PLT
	movq	96(%rsp), %rax
	subq	80(%rsp), %rax
	movl	%ebx, %edx
	cvtsi2sdq	%rax, %xmm0
	movq	88(%rsp), %rax
	subq	72(%rsp), %rax
	leaq	.LC3(%rip), %rsi
	mulsd	.LC1(%rip), %xmm0
	cvtsi2sdq	%rax, %xmm1
	movl	$2, %edi
	movb	$2, %al
	addsd	%xmm1, %xmm0
	cvtsi2sdl	%ebx, %xmm1
	movaps	%xmm1, %xmm2
	addsd	%xmm1, %xmm2
	mulsd	%xmm1, %xmm2
	mulsd	%xmm1, %xmm2
	movaps	%xmm2, %xmm1
	movq	%xmm2, %rbp
	divsd	%xmm0, %xmm1
	divsd	.LC2(%rip), %xmm1
	call	__printf_chk@PLT
	movq	%r13, %rdi
	movq	8(%rsp), %rdx
	movq	32(%rsp), %rsi
	movl	$2, %ecx
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rdx
	movq	40(%rsp), %rsi
	movl	$2, %ecx
	movq	16(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rdx
	movq	48(%rsp), %rsi
	movq	%r12, %rdi
	movl	$2, %ecx
	call	cudaMemcpy@PLT
	xorl	%esi, %esi
	movq	%r15, %rdi
	call	gettimeofday@PLT
	xorl	%eax, %eax
	xorl	%r8d, %r8d
.L13:
	cmpl	%ebx, %r8d
	jge	.L16
	movq	16(%rsp), %rdi
	xorl	%edx, %edx
	leaq	0(%r13,%rax), %r9
.L17:
	movss	(%r9,%rdx,4), %xmm1
	leaq	(%r12,%rax), %rsi
	xorl	%ecx, %ecx
.L14:
	movss	(%rdi,%rcx,4), %xmm2
	movss	(%rsi), %xmm0
	incq	%rcx
	addq	$4, %rsi
	mulss	%xmm1, %xmm2
	subss	%xmm2, %xmm0
	movss	%xmm0, -4(%rsi)
	cmpl	%ecx, %ebx
	jg	.L14
	incq	%rdx
	addq	%r14, %rdi
	cmpl	%edx, %ebx
	jg	.L17
	incl	%r8d
	addq	%r14, %rax
	jmp	.L13
.L16:
	movq	24(%rsp), %rdi
	xorl	%esi, %esi
	call	gettimeofday@PLT
	movq	96(%rsp), %rax
	subq	80(%rsp), %rax
	movl	%ebx, %edx
	cvtsi2sdq	%rax, %xmm0
	movq	88(%rsp), %rax
	subq	72(%rsp), %rax
	leaq	.LC3(%rip), %rsi
	mulsd	.LC1(%rip), %xmm0
	cvtsi2sdq	%rax, %xmm1
	movl	$2, %edi
	movb	$2, %al
	addsd	%xmm1, %xmm0
	movq	%rbp, %xmm1
	divsd	%xmm0, %xmm1
	divsd	.LC2(%rip), %xmm1
	call	__printf_chk@PLT
	movq	%r12, %rcx
	xorl	%edx, %edx
	xorps	%xmm0, %xmm0
	movss	.LC4(%rip), %xmm2
.L18:
	cmpl	%ebx, %edx
	jge	.L27
	xorl	%eax, %eax
.L19:
	movss	(%rcx,%rax,4), %xmm1
	incq	%rax
	andps	%xmm2, %xmm1
	addss	%xmm1, %xmm0
	cmpl	%eax, %ebx
	jg	.L19
	incl	%edx
	addq	%r14, %rcx
	jmp	.L18
.L27:
	cvtsi2ssl	%ebx, %xmm1
	leaq	.LC5(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	divss	%xmm1, %xmm0
	divss	%xmm1, %xmm0
	cvtss2sd	%xmm0, %xmm0
	call	__printf_chk@PLT
	movq	%r13, %rdi
	call	_ZdaPv@PLT
	movq	16(%rsp), %rdi
	call	_ZdaPv@PLT
	movq	%r12, %rdi
	call	_ZdaPv@PLT
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L20
	call	__stack_chk_fail@PLT
.L20:
	addq	$120, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	main, .-main
	.section	.rodata.str1.1
.LC6:
	.string	"_Z6matmulPfS_S_i"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2055:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC6(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z6matmulPfS_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2055:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC1:
	.long	-1598689907
	.long	1051772663
	.align 8
.LC2:
	.long	0
	.long	1104006501
	.section	.rodata.cst16,"aM",@progbits,16
	.align 16
.LC4:
	.long	2147483647
	.long	0
	.long	0
	.long	0
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <cmath>
#include <cstdlib>
#include <cstdio>
#include <sys/time.h>

#define M 1024

__global__ void matmul(float *A, float *B, float *C, int N) {
  int i = blockIdx.y;
  int j = threadIdx.x + blockDim.x * blockIdx.x;
  float sum = 0.0f;
  __shared__ float s_A[M];
  for (int ks=0; ks<N; ks+=M) {
    __syncthreads();
    s_A[threadIdx.x] = A[N*i+ks+threadIdx.x];
    __syncthreads();
    for (int k=ks; k<ks+M; k++) {
      sum += s_A[k-ks] * B[N*k+j];
    }
  }
  C[N*i+j] = sum;
}

int main(int argc, char **argv) {
  int N = atoi(argv[1]);
  float * h_A = new float [N*N];
  float * h_B = new float [N*N];
  float * h_C = new float [N*N];
  float *d_A, *d_B, *d_C;
  int size = N * N * sizeof(float);
  hipMalloc((void **) &d_A, size);
  hipMalloc((void **) &d_B, size);
  hipMalloc((void **) &d_C, size);

  for (int i=0; i<N; i++) {
    for (int j=0; j<N; j++) {
      h_A[N*i+j] = drand48();
      h_B[N*i+j] = drand48();
      h_C[N*i+j] = 0;
    }
  }
  hipMemcpy(d_A, h_A, size, hipMemcpyHostToDevice);
  hipMemcpy(d_B, h_B, size, hipMemcpyHostToDevice);
  hipMemcpy(d_C, h_C, size, hipMemcpyHostToDevice);
  dim3 grid(N/M, N);
  struct timeval tic, toc;
  gettimeofday(&tic, NULL);
  matmul<<<grid,M>>>(d_A, d_B, d_C, N);
  hipDeviceSynchronize();
  gettimeofday(&toc, NULL);
  double time = toc.tv_sec-tic.tv_sec+(toc.tv_usec-tic.tv_usec)*1e-6;
  printf("N=%d: %lf s (%lf GFlops)\n",N,time,2.*N*N*N/time/1e9);
  hipMemcpy(h_A, d_A, size, hipMemcpyDeviceToHost);
  hipMemcpy(h_B, d_B, size, hipMemcpyDeviceToHost);
  hipMemcpy(h_C, d_C, size, hipMemcpyDeviceToHost);

  gettimeofday(&tic, NULL);
#pragma omp parallel for
  for (int i=0; i<N; i++) {
    for (int k=0; k<N; k++) {
      for (int j=0; j<N; j++) {
        h_C[N*i+j] -= h_A[N*i+k] * h_B[N*k+j];
      }
    }
  }
  gettimeofday(&toc, NULL);
  time = toc.tv_sec-tic.tv_sec+(toc.tv_usec-tic.tv_usec)*1e-6;
  printf("N=%d: %lf s (%lf GFlops)\n",N,time,2.*N*N*N/time/1e9);
  float err = 0;
  for (int i=0; i<N; i++) {
    for (int j=0; j<N; j++) {
      err += fabs(h_C[N*i+j]);
    }
  }
  printf("error: %f\n",err/N/N);
  delete[] h_A;
  delete[] h_B;
  delete[] h_C;
}

	.text
	.file	"03_gpu.hip"
	.globl	_Z21__device_stub__matmulPfS_S_i # -- Begin function _Z21__device_stub__matmulPfS_S_i
	.type	_Z21__device_stub__matmulPfS_S_i,@function
_Z21__device_stub__matmulPfS_S_i:       # @_Z21__device_stub__matmulPfS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z6matmulPfS_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z21__device_stub__matmulPfS_S_i, .Lfunc_end0-_Z21__device_stub__matmulPfS_S_i
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI1_0:
	.quad	0x3eb0c6f7a0b5ed8d              # double 9.9999999999999995E-7
.LCPI1_1:
	.quad	0x41cdcd6500000000              # double 1.0E+9
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0
.LCPI1_2:
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$104, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	8(%rsi), %rdi
	callq	atoi
	movl	%eax, %ebp
	movl	%eax, %ebx
	imull	%ebx, %ebx
	leaq	(,%rbx,4), %r15
	movq	%r15, %rdi
	callq	_Znam
	movq	%rax, %r14
	movq	%r15, %rdi
	callq	_Znam
	movq	%rax, 48(%rsp)                  # 8-byte Spill
	movq	%r15, %rdi
	callq	_Znam
	movq	%rax, %r15
	shll	$2, %ebx
	movslq	%ebx, %rbx
	leaq	32(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	leaq	24(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	leaq	16(%rsp), %rdi
	movq	%rbx, 40(%rsp)                  # 8-byte Spill
	movq	%rbx, %rsi
	callq	hipMalloc
	movl	%ebp, %r12d
	testl	%ebp, %ebp
	jle	.LBB1_5
# %bb.1:                                # %.lr.ph.preheader
	xorl	%eax, %eax
	xorl	%ebp, %ebp
	movq	%r14, 80(%rsp)                  # 8-byte Spill
	movq	%r15, 72(%rsp)                  # 8-byte Spill
.LBB1_2:                                # %.lr.ph
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_3 Depth 2
	movq	%rax, 8(%rsp)                   # 8-byte Spill
	movl	%eax, %eax
	leaq	(%r15,%rax,4), %rbx
	movq	48(%rsp), %rcx                  # 8-byte Reload
	leaq	(%rcx,%rax,4), %r15
	leaq	(%r14,%rax,4), %r14
	xorl	%r13d, %r13d
.LBB1_3:                                #   Parent Loop BB1_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	callq	drand48
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, (%r14,%r13,4)
	callq	drand48
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, (%r15,%r13,4)
	movl	$0, (%rbx,%r13,4)
	incq	%r13
	cmpq	%r13, %r12
	jne	.LBB1_3
# %bb.4:                                # %._crit_edge
                                        #   in Loop: Header=BB1_2 Depth=1
	incq	%rbp
	movq	8(%rsp), %rax                   # 8-byte Reload
	addl	%r12d, %eax
	cmpq	%r12, %rbp
	movq	80(%rsp), %r14                  # 8-byte Reload
	movq	72(%rsp), %r15                  # 8-byte Reload
	jne	.LBB1_2
.LBB1_5:                                # %._crit_edge113
	movq	32(%rsp), %rdi
	movq	%r14, %rsi
	movq	40(%rsp), %r13                  # 8-byte Reload
	movq	%r13, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	24(%rsp), %rdi
	movq	48(%rsp), %rbx                  # 8-byte Reload
	movq	%rbx, %rsi
	movq	%r13, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	16(%rsp), %rdi
	movq	%r15, %rsi
	movq	%r13, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leal	1023(%r12), %eax
	testl	%r12d, %r12d
	cmovnsl	%r12d, %eax
	sarl	$10, %eax
	movq	%r12, %rbp
	shlq	$32, %rbp
	orq	%rax, %rbp
	leaq	56(%rsp), %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	movabsq	$4294968320, %rdx               # imm = 0x100000400
	movq	%rbp, %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_7
# %bb.6:
	movq	32(%rsp), %rdi
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdx
	movl	%r12d, %ecx
	callq	_Z21__device_stub__matmulPfS_S_i
.LBB1_7:
	callq	hipDeviceSynchronize
	xorl	%r13d, %r13d
	leaq	88(%rsp), %rbp
	movq	%rbp, %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	movq	(%rbp), %rax
	movq	8(%rbp), %rcx
	leaq	56(%rsp), %rdx
	subq	(%rdx), %rax
	cvtsi2sd	%rax, %xmm1
	subq	8(%rdx), %rcx
	xorps	%xmm0, %xmm0
	cvtsi2sd	%rcx, %xmm0
	mulsd	.LCPI1_0(%rip), %xmm0
	addsd	%xmm1, %xmm0
	xorps	%xmm1, %xmm1
	cvtsi2sd	%r12d, %xmm1
	movapd	%xmm1, %xmm2
	addsd	%xmm1, %xmm2
	mulsd	%xmm1, %xmm2
	mulsd	%xmm1, %xmm2
	movsd	%xmm2, 8(%rsp)                  # 8-byte Spill
	movapd	%xmm2, %xmm1
	divsd	%xmm0, %xmm1
	divsd	.LCPI1_1(%rip), %xmm1
	movl	$.L.str, %edi
	movl	%r12d, %esi
	movb	$2, %al
	callq	printf
	movq	32(%rsp), %rsi
	movq	%r14, %rdi
	movq	40(%rsp), %rbp                  # 8-byte Reload
	movq	%rbp, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	24(%rsp), %rsi
	movq	%rbx, %rdi
	movq	%rbp, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	16(%rsp), %rsi
	movq	%r15, %rdi
	movq	%rbp, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	leaq	56(%rsp), %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	testl	%r12d, %r12d
	jle	.LBB1_14
# %bb.8:                                # %.preheader108.lr.ph.preheader
	xorl	%eax, %eax
.LBB1_9:                                # %.preheader108.lr.ph
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_10 Depth 2
                                        #       Child Loop BB1_11 Depth 3
	movl	%r13d, %ecx
	leaq	(%r15,%rcx,4), %rcx
	movl	%r12d, %edx
	imull	%eax, %edx
	leaq	(%r14,%rdx,4), %rdx
	xorl	%esi, %esi
	xorl	%edi, %edi
.LBB1_10:                               # %.preheader108
                                        #   Parent Loop BB1_9 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB1_11 Depth 3
	movl	%esi, %r8d
	leaq	(%rbx,%r8,4), %r8
	movss	(%rdx,%rdi,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	xorl	%r9d, %r9d
.LBB1_11:                               #   Parent Loop BB1_9 Depth=1
                                        #     Parent Loop BB1_10 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movss	(%r8,%r9,4), %xmm1              # xmm1 = mem[0],zero,zero,zero
	mulss	%xmm0, %xmm1
	movss	(%rcx,%r9,4), %xmm2             # xmm2 = mem[0],zero,zero,zero
	subss	%xmm1, %xmm2
	movss	%xmm2, (%rcx,%r9,4)
	incq	%r9
	cmpq	%r9, %r12
	jne	.LBB1_11
# %bb.12:                               # %._crit_edge116
                                        #   in Loop: Header=BB1_10 Depth=2
	incq	%rdi
	addl	%r12d, %esi
	cmpq	%r12, %rdi
	jne	.LBB1_10
# %bb.13:                               # %._crit_edge118
                                        #   in Loop: Header=BB1_9 Depth=1
	incq	%rax
	addl	%r12d, %r13d
	cmpq	%r12, %rax
	jne	.LBB1_9
.LBB1_14:                               # %._crit_edge120
	xorl	%ebp, %ebp
	leaq	88(%rsp), %r13
	movq	%r13, %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	movq	(%r13), %rax
	movq	8(%r13), %rcx
	subq	56(%rsp), %rax
	xorps	%xmm1, %xmm1
	cvtsi2sd	%rax, %xmm1
	subq	64(%rsp), %rcx
	xorps	%xmm0, %xmm0
	cvtsi2sd	%rcx, %xmm0
	mulsd	.LCPI1_0(%rip), %xmm0
	addsd	%xmm1, %xmm0
	movsd	8(%rsp), %xmm1                  # 8-byte Reload
                                        # xmm1 = mem[0],zero
	divsd	%xmm0, %xmm1
	divsd	.LCPI1_1(%rip), %xmm1
	movl	$.L.str, %edi
	movl	%r12d, %esi
	movb	$2, %al
	callq	printf
	xorpd	%xmm0, %xmm0
	testl	%r12d, %r12d
	jle	.LBB1_19
# %bb.15:                               # %.lr.ph123.preheader
	movaps	.LCPI1_2(%rip), %xmm1           # xmm1 = [NaN,NaN,NaN,NaN]
	xorl	%eax, %eax
.LBB1_16:                               # %.lr.ph123
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_17 Depth 2
	movl	%ebp, %ecx
	leaq	(%r15,%rcx,4), %rcx
	xorl	%edx, %edx
.LBB1_17:                               #   Parent Loop BB1_16 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movss	(%rcx,%rdx,4), %xmm2            # xmm2 = mem[0],zero,zero,zero
	andps	%xmm1, %xmm2
	addss	%xmm2, %xmm0
	incq	%rdx
	cmpq	%rdx, %r12
	jne	.LBB1_17
# %bb.18:                               # %._crit_edge124
                                        #   in Loop: Header=BB1_16 Depth=1
	incq	%rax
	addl	%r12d, %ebp
	cmpq	%r12, %rax
	jne	.LBB1_16
.LBB1_19:                               # %._crit_edge127
	xorps	%xmm1, %xmm1
	cvtsi2ss	%r12d, %xmm1
	divss	%xmm1, %xmm0
	divss	%xmm1, %xmm0
	cvtss2sd	%xmm0, %xmm0
	movl	$.L.str.1, %edi
	movb	$1, %al
	callq	printf
	movq	%r14, %rdi
	callq	_ZdaPv
	movq	%rbx, %rdi
	callq	_ZdaPv
	movq	%r15, %rdi
	callq	_ZdaPv
	xorl	%eax, %eax
	addq	$104, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z6matmulPfS_S_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z6matmulPfS_S_i,@object        # @_Z6matmulPfS_S_i
	.section	.rodata,"a",@progbits
	.globl	_Z6matmulPfS_S_i
	.p2align	3, 0x0
_Z6matmulPfS_S_i:
	.quad	_Z21__device_stub__matmulPfS_S_i
	.size	_Z6matmulPfS_S_i, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"N=%d: %lf s (%lf GFlops)\n"
	.size	.L.str, 26

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"error: %f\n"
	.size	.L.str.1, 11

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z6matmulPfS_S_i"
	.size	.L__unnamed_1, 17

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z21__device_stub__matmulPfS_S_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z6matmulPfS_S_i
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z6matmulPfS_S_i        ; -- Begin function _Z6matmulPfS_S_i
	.globl	_Z6matmulPfS_S_i
	.p2align	8
	.type	_Z6matmulPfS_S_i,@function
_Z6matmulPfS_S_i:                       ; @_Z6matmulPfS_S_i
; %bb.0:
	s_clause 0x3
	s_load_b32 s3, s[0:1], 0x2c
	s_load_b32 s2, s[0:1], 0x18
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s3, s3, 0xffff
	s_cmp_lt_i32 s2, 1
	v_mad_u64_u32 v[1:2], null, s14, s3, v[0:1]
	s_mul_i32 s15, s15, s2
	s_cbranch_scc1 .LBB0_5
; %bb.1:                                ; %.lr.ph
	v_dual_mov_b32 v3, 0 :: v_dual_add_nc_u32 v6, s15, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_dual_mov_b32 v8, v1 :: v_dual_lshlrev_b32 v7, 2, v0
	v_mov_b32_e32 v0, 0
	s_lshl_b32 s3, s2, 10
	s_mov_b32 s8, 0
.LBB0_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_3 Depth 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v2, s8, v6
	s_barrier
	buffer_gl0_inv
	s_mov_b32 s9, 0
	v_lshlrev_b64 v[4:5], 2, v[2:3]
	v_add_co_u32 v4, vcc_lo, s4, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v5, vcc_lo
	global_load_b32 v2, v[4:5], off
	v_mov_b32_e32 v4, v8
	s_waitcnt vmcnt(0)
	ds_store_b32 v7, v2
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB0_3:                                ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_ashrrev_i32_e32 v5, 31, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_lshlrev_b64 v[9:10], 2, v[4:5]
	v_dual_mov_b32 v5, s9 :: v_dual_add_nc_u32 v4, s2, v4
	s_add_i32 s9, s9, 4
	s_cmpk_eq_i32 s9, 0x1000
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v9, vcc_lo, s6, v9
	v_add_co_ci_u32_e32 v10, vcc_lo, s7, v10, vcc_lo
	ds_load_b32 v5, v5
	global_load_b32 v2, v[9:10], off
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_fmac_f32_e32 v0, v5, v2
	s_cbranch_scc0 .LBB0_3
; %bb.4:                                ; %.loopexit
                                        ;   in Loop: Header=BB0_2 Depth=1
	v_add_nc_u32_e32 v8, s3, v8
	s_addk_i32 s8, 0x400
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lt_i32 s8, s2
	s_cbranch_scc1 .LBB0_2
	s_branch .LBB0_6
.LBB0_5:
	v_mov_b32_e32 v0, 0
.LBB0_6:                                ; %Flow48
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v1, s15, v1
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, vcc_lo, s0, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
	global_store_b32 v[1:2], v0, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z6matmulPfS_S_i
		.amdhsa_group_segment_fixed_size 4096
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 11
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z6matmulPfS_S_i, .Lfunc_end0-_Z6matmulPfS_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 352
; NumSgprs: 18
; NumVgprs: 11
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 4096 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 11
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 4096
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z6matmulPfS_S_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z6matmulPfS_S_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     11
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
