#include <stdio.h>

const int N = 33 * 1024;
const int threadsPerBlock = 256; 
const int blocksPerGrid = ( (N+threadsPerBlock-1) / threadsPerBlock );

static void HandleError( cudaError_t err )
{
  if (err != cudaSuccess) {
    printf( "%s \n", cudaGetErrorString( err ));
    exit( 1 );
  }
}

__global__ void dot( float *a, float *b, float *c ) { 
   __shared__ float cache[threadsPerBlock];
   int idx = threadIdx.x + blockIdx.x * blockDim.x; 
   int cacheIndex = threadIdx.x;
  
  // set the cache values
  cache[cacheIndex] = a[idx] * b[idx];
  
  // synchronize threads in this block
  __syncthreads();
  // for reductions, threadsPerBlock must be a power of 2 
  // because of the following code
  int i = blockDim.x/2;
  while (i != 0) {
    if (cacheIndex < i)
      cache[cacheIndex] += cache[cacheIndex + i];
    __syncthreads();
    i /= 2; 
  }
  if (cacheIndex == 0) 
     c[blockIdx.x] = cache[0];
}


int main( void ) {
  float *a, *b, c, *partial_c;
  float *dev_a, *dev_b, *dev_partial_c;

  // allocate memory on the CPU side
  a = (float*)malloc( N*sizeof(float) );
  b = (float*)malloc( N*sizeof(float) );
  partial_c = (float*)malloc( blocksPerGrid*sizeof(float) );

  // allocate the memory on the GPU
  HandleError( cudaMalloc( (void**)&dev_a, 
			    N*sizeof(float) ) );
  HandleError( cudaMalloc( (void**)&dev_b,
			    N*sizeof(float) ) );
  HandleError( cudaMalloc( (void**)&dev_partial_c, 
			    blocksPerGrid*sizeof(float) ) );

  // fill in the host memory with data
  for (int i=0; i<N; i++) 
  { 
    a[i] = i;
    b[i] = i*2; 
  }

  // copy the arrays ‘a’ and ‘b’ to the GPU
  HandleError( cudaMemcpy( dev_a, a, N*sizeof(float), 
			    cudaMemcpyHostToDevice ) );
  HandleError( cudaMemcpy( dev_b, b, N*sizeof(float), 
			    cudaMemcpyHostToDevice ) );
  dot<<<blocksPerGrid,threadsPerBlock>>>( dev_a, dev_b,
						   dev_partial_c );

 // copy the array 'c' back from the GPU to the CPU
 HandleError( cudaMemcpy( partial_c, dev_partial_c, 
			   blocksPerGrid*sizeof(float),
			   cudaMemcpyDeviceToHost ) );

 // finish up on the CPU side
 c = 0;
 for (int i=0; i<blocksPerGrid; i++) 
 {
   c += partial_c[i];
 }

 #define sum_squares(x) (x*(x+1)*(2*x+1)/6) 
 printf( "Does GPU value %.6g = %.6g ?\n", c,
	2 * sum_squares( (float)(N - 1) ) );


 // free memory on the GPU side
 HandleError( cudaFree( dev_a ) );
 HandleError( cudaFree( dev_b ) );
 HandleError( cudaFree( dev_partial_c ) );

 // free memory on the CPU side
 free( a );
 free( b );
 free( partial_c );
}

	.file	"tmpxft_0039db0d_00000000-6_dotprod_soln.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2031:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2031:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"%s \n"
	.text
	.type	_ZL11HandleError9cudaError, @function
_ZL11HandleError9cudaError:
.LFB2027:
	.cfi_startproc
	testl	%edi, %edi
	je	.L2
	pushq	%rax
	.cfi_def_cfa_offset 16
	call	cudaGetErrorString@PLT
	movl	$2, %edi
	leaq	.LC0(%rip), %rsi
	movq	%rax, %rdx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$1, %edi
	call	exit@PLT
.L2:
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	_ZL11HandleError9cudaError, .-_ZL11HandleError9cudaError
	.globl	_Z26__device_stub__Z3dotPfS_S_PfS_S_
	.type	_Z26__device_stub__Z3dotPfS_S_PfS_S_, @function
_Z26__device_stub__Z3dotPfS_S_PfS_S_:
.LFB2053:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z3dotPfS_S_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L8:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2053:
	.size	_Z26__device_stub__Z3dotPfS_S_PfS_S_, .-_Z26__device_stub__Z3dotPfS_S_PfS_S_
	.globl	_Z3dotPfS_S_
	.type	_Z3dotPfS_S_, @function
_Z3dotPfS_S_:
.LFB2054:
	.cfi_startproc
	endbr64
	jmp	_Z26__device_stub__Z3dotPfS_S_PfS_S_
	.cfi_endproc
.LFE2054:
	.size	_Z3dotPfS_S_, .-_Z3dotPfS_S_
	.section	.rodata.str1.1
.LC3:
	.string	"Does GPU value %.6g = %.6g ?\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movl	$135168, %edi
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	subq	$64, %rsp
	.cfi_def_cfa_offset 96
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	call	malloc@PLT
	movl	$135168, %edi
	movq	%rax, %r12
	call	malloc@PLT
	movl	$528, %edi
	movq	%rax, %rbp
	call	malloc@PLT
	movl	$135168, %esi
	leaq	8(%rsp), %rdi
	movq	%rax, %rbx
	call	cudaMalloc@PLT
	movl	%eax, %edi
	call	_ZL11HandleError9cudaError
	movl	$135168, %esi
	leaq	16(%rsp), %rdi
	call	cudaMalloc@PLT
	movl	%eax, %edi
	call	_ZL11HandleError9cudaError
	leaq	24(%rsp), %rdi
	movl	$528, %esi
	call	cudaMalloc@PLT
	movl	%eax, %edi
	call	_ZL11HandleError9cudaError
	xorl	%eax, %eax
.L14:
	cvtsi2ssl	%eax, %xmm0
	leal	(%rax,%rax), %edx
	movss	%xmm0, (%r12,%rax,4)
	cvtsi2ssl	%edx, %xmm0
	movss	%xmm0, 0(%rbp,%rax,4)
	incq	%rax
	cmpq	$33792, %rax
	jne	.L14
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movl	$135168, %edx
	movq	%r12, %rsi
	call	cudaMemcpy@PLT
	movl	%eax, %edi
	call	_ZL11HandleError9cudaError
	movq	16(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	movl	$135168, %edx
	call	cudaMemcpy@PLT
	movl	%eax, %edi
	call	_ZL11HandleError9cudaError
	movl	$16777217, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1073741857, %edi
	salq	$8, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	salq	$2, %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L15
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdi
	call	_Z26__device_stub__Z3dotPfS_S_PfS_S_
.L15:
	movq	24(%rsp), %rsi
	movl	$2, %ecx
	movl	$528, %edx
	movq	%rbx, %rdi
	call	cudaMemcpy@PLT
	movl	%eax, %edi
	call	_ZL11HandleError9cudaError
	xorl	%eax, %eax
	xorps	%xmm0, %xmm0
.L16:
	addss	(%rbx,%rax,4), %xmm0
	incq	%rax
	cmpq	$132, %rax
	jne	.L16
	movsd	.LC2(%rip), %xmm1
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	movb	$2, %al
	cvtss2sd	%xmm0, %xmm0
	call	__printf_chk@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movl	%eax, %edi
	call	_ZL11HandleError9cudaError
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movl	%eax, %edi
	call	_ZL11HandleError9cudaError
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movl	%eax, %edi
	call	_ZL11HandleError9cudaError
	movq	%r12, %rdi
	call	free@PLT
	movq	%rbp, %rdi
	call	free@PLT
	movq	%rbx, %rdi
	call	free@PLT
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L17
	call	__stack_chk_fail@PLT
.L17:
	addq	$64, %rsp
	.cfi_def_cfa_offset 32
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	main, .-main
	.section	.rodata.str1.1
.LC4:
	.string	"_Z3dotPfS_S_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2056:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC4(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z3dotPfS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2056:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC2:
	.long	0
	.long	1119315260
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <stdio.h>

const int N = 33 * 1024;
const int threadsPerBlock = 256; 
const int blocksPerGrid = ( (N+threadsPerBlock-1) / threadsPerBlock );

static void HandleError( hipError_t err )
{
  if (err != hipSuccess) {
    printf( "%s \n", hipGetErrorString( err ));
    exit( 1 );
  }
}

__global__ void dot( float *a, float *b, float *c ) { 
   __shared__ float cache[threadsPerBlock];
   int idx = threadIdx.x + blockIdx.x * blockDim.x; 
   int cacheIndex = threadIdx.x;
  
  // set the cache values
  cache[cacheIndex] = a[idx] * b[idx];
  
  // synchronize threads in this block
  __syncthreads();
  // for reductions, threadsPerBlock must be a power of 2 
  // because of the following code
  int i = blockDim.x/2;
  while (i != 0) {
    if (cacheIndex < i)
      cache[cacheIndex] += cache[cacheIndex + i];
    __syncthreads();
    i /= 2; 
  }
  if (cacheIndex == 0) 
     c[blockIdx.x] = cache[0];
}


int main( void ) {
  float *a, *b, c, *partial_c;
  float *dev_a, *dev_b, *dev_partial_c;

  // allocate memory on the CPU side
  a = (float*)malloc( N*sizeof(float) );
  b = (float*)malloc( N*sizeof(float) );
  partial_c = (float*)malloc( blocksPerGrid*sizeof(float) );

  // allocate the memory on the GPU
  HandleError( hipMalloc( (void**)&dev_a, 
			    N*sizeof(float) ) );
  HandleError( hipMalloc( (void**)&dev_b,
			    N*sizeof(float) ) );
  HandleError( hipMalloc( (void**)&dev_partial_c, 
			    blocksPerGrid*sizeof(float) ) );

  // fill in the host memory with data
  for (int i=0; i<N; i++) 
  { 
    a[i] = i;
    b[i] = i*2; 
  }

  // copy the arrays ‘a’ and ‘b’ to the GPU
  HandleError( hipMemcpy( dev_a, a, N*sizeof(float), 
			    hipMemcpyHostToDevice ) );
  HandleError( hipMemcpy( dev_b, b, N*sizeof(float), 
			    hipMemcpyHostToDevice ) );
  dot<<<blocksPerGrid,threadsPerBlock>>>( dev_a, dev_b,
						   dev_partial_c );

 // copy the array 'c' back from the GPU to the CPU
 HandleError( hipMemcpy( partial_c, dev_partial_c, 
			   blocksPerGrid*sizeof(float),
			   hipMemcpyDeviceToHost ) );

 // finish up on the CPU side
 c = 0;
 for (int i=0; i<blocksPerGrid; i++) 
 {
   c += partial_c[i];
 }

 #define sum_squares(x) (x*(x+1)*(2*x+1)/6) 
 printf( "Does GPU value %.6g = %.6g ?\n", c,
	2 * sum_squares( (float)(N - 1) ) );


 // free memory on the GPU side
 HandleError( hipFree( dev_a ) );
 HandleError( hipFree( dev_b ) );
 HandleError( hipFree( dev_partial_c ) );

 // free memory on the CPU side
 free( a );
 free( b );
 free( partial_c );
}

	.text
	.file	"dotprod_soln.hip"
	.globl	_Z18__device_stub__dotPfS_S_    # -- Begin function _Z18__device_stub__dotPfS_S_
	.type	_Z18__device_stub__dotPfS_S_,@function
_Z18__device_stub__dotPfS_S_:           # @_Z18__device_stub__dotPfS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z3dotPfS_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z18__device_stub__dotPfS_S_, .Lfunc_end0-_Z18__device_stub__dotPfS_S_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI1_0:
	.quad	0x42b7653c00000000              # double 25723565768704
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$32, %rsp
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	$135168, %edi                   # imm = 0x21000
	callq	malloc
	movq	%rax, %rbx
	movl	$135168, %edi                   # imm = 0x21000
	callq	malloc
	movq	%rax, %r14
	movl	$528, %edi                      # imm = 0x210
	callq	malloc
	movq	%rax, %r15
	leaq	24(%rsp), %rdi
	movl	$135168, %esi                   # imm = 0x21000
	callq	hipMalloc
	movl	%eax, %edi
	callq	_ZL11HandleError10hipError_t
	leaq	16(%rsp), %rdi
	movl	$135168, %esi                   # imm = 0x21000
	callq	hipMalloc
	movl	%eax, %edi
	callq	_ZL11HandleError10hipError_t
	leaq	8(%rsp), %rdi
	movl	$528, %esi                      # imm = 0x210
	callq	hipMalloc
	movl	%eax, %edi
	callq	_ZL11HandleError10hipError_t
	xorl	%eax, %eax
	xorl	%ecx, %ecx
.LBB1_1:                                # =>This Inner Loop Header: Depth=1
	xorps	%xmm0, %xmm0
	cvtsi2ss	%ecx, %xmm0
	movss	%xmm0, (%rbx,%rcx,4)
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	movss	%xmm0, (%r14,%rcx,4)
	incq	%rcx
	addl	$2, %eax
	cmpq	$33792, %rcx                    # imm = 0x8400
	jne	.LBB1_1
# %bb.2:
	movq	24(%rsp), %rdi
	movl	$135168, %edx                   # imm = 0x21000
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movl	%eax, %edi
	callq	_ZL11HandleError10hipError_t
	movq	16(%rsp), %rdi
	movl	$135168, %edx                   # imm = 0x21000
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movl	%eax, %edi
	callq	_ZL11HandleError10hipError_t
	movabsq	$4294967428, %rdi               # imm = 0x100000084
	leaq	124(%rdi), %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_4
# %bb.3:
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
	callq	_Z18__device_stub__dotPfS_S_
.LBB1_4:
	movq	8(%rsp), %rsi
	movl	$528, %edx                      # imm = 0x210
	movq	%r15, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movl	%eax, %edi
	callq	_ZL11HandleError10hipError_t
	xorps	%xmm0, %xmm0
	xorl	%eax, %eax
.LBB1_5:                                # =>This Inner Loop Header: Depth=1
	addss	(%r15,%rax,4), %xmm0
	incq	%rax
	cmpq	$132, %rax
	jne	.LBB1_5
# %bb.6:
	cvtss2sd	%xmm0, %xmm0
	movsd	.LCPI1_0(%rip), %xmm1           # xmm1 = mem[0],zero
	movl	$.L.str, %edi
	movb	$2, %al
	callq	printf
	movq	24(%rsp), %rdi
	callq	hipFree
	movl	%eax, %edi
	callq	_ZL11HandleError10hipError_t
	movq	16(%rsp), %rdi
	callq	hipFree
	movl	%eax, %edi
	callq	_ZL11HandleError10hipError_t
	movq	8(%rsp), %rdi
	callq	hipFree
	movl	%eax, %edi
	callq	_ZL11HandleError10hipError_t
	movq	%rbx, %rdi
	callq	free
	movq	%r14, %rdi
	callq	free
	movq	%r15, %rdi
	callq	free
	xorl	%eax, %eax
	addq	$32, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.type	_ZL11HandleError10hipError_t,@function # -- Begin function _ZL11HandleError10hipError_t
_ZL11HandleError10hipError_t:           # @_ZL11HandleError10hipError_t
	.cfi_startproc
# %bb.0:
	testl	%edi, %edi
	jne	.LBB2_2
# %bb.1:
	retq
.LBB2_2:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	hipGetErrorString
	movl	$.L.str.1, %edi
	movq	%rax, %rsi
	xorl	%eax, %eax
	callq	printf
	movl	$1, %edi
	callq	exit
.Lfunc_end2:
	.size	_ZL11HandleError10hipError_t, .Lfunc_end2-_ZL11HandleError10hipError_t
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z3dotPfS_S_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z3dotPfS_S_,@object            # @_Z3dotPfS_S_
	.section	.rodata,"a",@progbits
	.globl	_Z3dotPfS_S_
	.p2align	3, 0x0
_Z3dotPfS_S_:
	.quad	_Z18__device_stub__dotPfS_S_
	.size	_Z3dotPfS_S_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Does GPU value %.6g = %.6g ?\n"
	.size	.L.str, 30

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"%s \n"
	.size	.L.str.1, 5

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z3dotPfS_S_"
	.size	.L__unnamed_1, 13

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z18__device_stub__dotPfS_S_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z3dotPfS_S_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z3dotPfS_S_            ; -- Begin function _Z3dotPfS_S_
	.globl	_Z3dotPfS_S_
	.p2align	8
	.type	_Z3dotPfS_S_,@function
_Z3dotPfS_S_:                           ; @_Z3dotPfS_S_
; %bb.0:
	s_clause 0x1
	s_load_b32 s3, s[0:1], 0x24
	s_load_b128 s[4:7], s[0:1], 0x0
	s_mov_b32 s2, s15
	s_waitcnt lgkmcnt(0)
	s_and_b32 s3, s3, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s2, s3, v[0:1]
	s_cmp_lt_u32 s3, 2
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v3, vcc_lo, s4, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v2, vcc_lo
	v_add_co_u32 v1, vcc_lo, s6, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s7, v2, vcc_lo
	global_load_b32 v3, v[3:4], off
	global_load_b32 v2, v[1:2], off
	s_waitcnt vmcnt(0)
	v_dual_mul_f32 v2, v3, v2 :: v_dual_lshlrev_b32 v1, 2, v0
	ds_store_b32 v1, v2
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB0_4
.LBB0_1:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_lshr_b32 s4, s3, 1
	s_mov_b32 s5, exec_lo
	v_cmpx_gt_u32_e64 s4, v0
	s_cbranch_execz .LBB0_3
; %bb.2:                                ;   in Loop: Header=BB0_1 Depth=1
	v_lshl_add_u32 v2, s4, 2, v1
	ds_load_b32 v2, v2
	ds_load_b32 v3, v1
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v2, v2, v3
	ds_store_b32 v1, v2
.LBB0_3:                                ;   in Loop: Header=BB0_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	s_cmp_gt_u32 s3, 3
	s_mov_b32 s3, s4
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB0_1
.LBB0_4:                                ; %._crit_edge
	s_mov_b32 s3, 0
	s_mov_b32 s4, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB0_6
; %bb.5:
	v_mov_b32_e32 v0, 0
	s_load_b64 s[0:1], s[0:1], 0x10
	s_lshl_b64 s[2:3], s[2:3], 2
	ds_load_b32 v1, v0
	s_waitcnt lgkmcnt(0)
	s_add_u32 s0, s0, s2
	s_addc_u32 s1, s1, s3
	global_store_b32 v0, v1, s[0:1]
.LBB0_6:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z3dotPfS_S_
		.amdhsa_group_segment_fixed_size 1024
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z3dotPfS_S_, .Lfunc_end0-_Z3dotPfS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 316
; NumSgprs: 18
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 1024 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 1024
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z3dotPfS_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z3dotPfS_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     5
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
