
#include <cuda.h>
#include "cuda_runtime.h"
#include "device_launch_parameters.h"
#include <cuda_runtime_api.h>
#include "utils.cuh"
#include "rbm_helpers.cuh"

using namespace utils;

__global__
void contrastive_divergence(curandState *globalState,int *input, double *weights, double *bh, double *bv, bool *mask, double *ph_mean, int *ph_sample, double *nv_means, int *nv_samples, double *nh_means, int *nh_samples, int n_hidden, int n_visible, double lr, int N) {
	//printf("in cuda kernel");
	int row = blockIdx.y * blockDim.y + threadIdx.y;
	int col = blockIdx.x * blockDim.x + threadIdx.x;
	if (row > n_visible || col > n_hidden) return;

	/* CD-k */
	//mtx.lock();
	//printf("start CD \n");

		curandState state = globalState[row*blockDim.y * 32 + col];
	sample_h_given_v(state,input, ph_mean, ph_sample, bh, weights, n_hidden, n_visible);
	__syncthreads();
	//sample_v_given_h(state, ph_sample, nv_means, nv_samples, weights, bv, n_visible, n_hidden);
	for (int step = 0; step<1; step++) {
		if (step == 0) {
			//printf("only do it once \n");
			gibbs_hvh(state,ph_sample, nv_means, nv_samples, nh_means, nh_samples, weights, bv, bv, n_visible, n_hidden);
		}
		
	}
	__syncthreads();
	
	if (mask[row*n_hidden + col]) {
		//printf("yes it was masked \n");
		//printf("%d, ", ph_mean[i]); printf("%d, ", input[j]); printf("%d, ", nh_means[i]); printf("%d, ", nv_samples[j]);
		weights[row*n_hidden + col] += lr * (ph_mean[col] * input[row] - nh_means[col] * nv_samples[row]) / N;
		//bh[col] += lr * (ph_sample[col] - nh_means[col]) / N;
		//bv[row] += lr * (input[row] - nv_samples[row]) / N;
		//printf("|%d|", weights[i*n_visible + j]);
	}
	else {
		//penalty if not masked
		//weights[row*n_hidden + col] += lr * lr * lr* (ph_mean[col] * input[row] - nh_means[col] * nv_samples[row]) / N;
		//bh[col] += lr *lr * (ph_sample[col] - nh_means[col]) / N;
		//bv[row] += lr*lr * (input[row] - nv_samples[row]) / N;
	}
}

__device__
void sample_h_given_v(curandState globalState,int *v0_sample, double *mean, int *sample, double *hbias, double *weights, int n_hidden, int n_visible) {
	int row = blockIdx.y * blockDim.y + threadIdx.y;
	int col = blockIdx.x * blockDim.x + threadIdx.x;
	if (row > n_visible || col > n_hidden) return;
		double val = propup(v0_sample, weights, hbias[col], n_visible, n_hidden);
		mean[col] = val;
		int state = binomial(1, mean[col], globalState);
		sample[col] = state;
		//printf("%f -> %d\n",val,state);
	
}

__device__
void sample_v_given_h(curandState globalState,int *h0_sample, double *mean, int *sample, double *weights, double *vbias, int n_visible, int n_hidden) {
	int row = blockIdx.y * blockDim.y + threadIdx.y;
	int col = blockIdx.x * blockDim.x + threadIdx.x;
	if (row > n_visible || col > n_hidden) return;

	mean[row] = propdown(h0_sample, vbias[row],n_hidden,n_visible,weights);
	sample[row] = binomial(1, mean[row], globalState);
	
}

__device__
double propup(int *v, double *w, double bh, int n_visible, int n_hidden) {
	int row = blockIdx.y * blockDim.y + threadIdx.y;
	int col = blockIdx.x * blockDim.x + threadIdx.x;
	if (row > n_visible || col > n_hidden) return;

	double pre_sigmoid_activation = 0.0;
	for (int j = 0; j<n_visible; j++) {
		pre_sigmoid_activation +=v[j] * w[j*n_hidden + col];
	}
	//pre_sigmoid_activation += bh;
	return sigmoid(pre_sigmoid_activation);
}

__device__
double propdown(int *h, double bv, int n_hidden, int n_visible, double *W) {
	int row = blockIdx.y * blockDim.y + threadIdx.y;
	int col = blockIdx.x * blockDim.x + threadIdx.x;
	if (row > n_visible || col > n_hidden) return;
	double pre_sigmoid_activation = 0.0;
	for (int j = 0; j<n_hidden; j++) {
		pre_sigmoid_activation += W[row*n_hidden + j] * h[j];
	}
	//pre_sigmoid_activation += bv;
	return sigmoid(pre_sigmoid_activation);
}

__device__
void gibbs_hvh(curandState globalState,int *h0_sample, double *nv_means, int *nv_samples, double *nh_means, int *nh_samples, double *weights, double *vbias, double *hbias, int n_visible, int n_hidden) {
	sample_v_given_h(globalState,h0_sample, nv_means, nv_samples, weights, vbias, n_visible, n_hidden);
	__syncthreads();
	sample_h_given_v(globalState,nv_samples, nh_means, nh_samples, hbias, weights, n_hidden, n_visible);
}

	.file	"tmpxft_002db88c_00000000-6_rbm_helpers.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3859:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3859:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_ZN5utils7uniformEdd17curandStateXORWOW
	.type	_ZN5utils7uniformEdd17curandStateXORWOW, @function
_ZN5utils7uniformEdd17curandStateXORWOW:
.LFB3849:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE3849:
	.size	_ZN5utils7uniformEdd17curandStateXORWOW, .-_ZN5utils7uniformEdd17curandStateXORWOW
	.globl	_ZN5utils8binomialEid17curandStateXORWOW
	.type	_ZN5utils8binomialEid17curandStateXORWOW, @function
_ZN5utils8binomialEid17curandStateXORWOW:
.LFB3850:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE3850:
	.size	_ZN5utils8binomialEid17curandStateXORWOW, .-_ZN5utils8binomialEid17curandStateXORWOW
	.globl	_ZN5utils7sigmoidEd
	.type	_ZN5utils7sigmoidEd, @function
_ZN5utils7sigmoidEd:
.LFB3851:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE3851:
	.size	_ZN5utils7sigmoidEd, .-_ZN5utils7sigmoidEd
	.globl	_Z16sample_h_given_v17curandStateXORWOWPiPdS0_S1_S1_ii
	.type	_Z16sample_h_given_v17curandStateXORWOWPiPdS0_S1_S1_ii, @function
_Z16sample_h_given_v17curandStateXORWOWPiPdS0_S1_S1_ii:
.LFB3852:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE3852:
	.size	_Z16sample_h_given_v17curandStateXORWOWPiPdS0_S1_S1_ii, .-_Z16sample_h_given_v17curandStateXORWOWPiPdS0_S1_S1_ii
	.globl	_Z16sample_v_given_h17curandStateXORWOWPiPdS0_S1_S1_ii
	.type	_Z16sample_v_given_h17curandStateXORWOWPiPdS0_S1_S1_ii, @function
_Z16sample_v_given_h17curandStateXORWOWPiPdS0_S1_S1_ii:
.LFB4504:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE4504:
	.size	_Z16sample_v_given_h17curandStateXORWOWPiPdS0_S1_S1_ii, .-_Z16sample_v_given_h17curandStateXORWOWPiPdS0_S1_S1_ii
	.globl	_Z6propupPiPddii
	.type	_Z6propupPiPddii, @function
_Z6propupPiPddii:
.LFB3854:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE3854:
	.size	_Z6propupPiPddii, .-_Z6propupPiPddii
	.globl	_Z8propdownPidiiPd
	.type	_Z8propdownPidiiPd, @function
_Z8propdownPidiiPd:
.LFB3855:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE3855:
	.size	_Z8propdownPidiiPd, .-_Z8propdownPidiiPd
	.globl	_Z9gibbs_hvh17curandStateXORWOWPiPdS0_S1_S0_S1_S1_S1_ii
	.type	_Z9gibbs_hvh17curandStateXORWOWPiPdS0_S1_S0_S1_S1_S1_ii, @function
_Z9gibbs_hvh17curandStateXORWOWPiPdS0_S1_S0_S1_S1_S1_ii:
.LFB3856:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE3856:
	.size	_Z9gibbs_hvh17curandStateXORWOWPiPdS0_S1_S0_S1_S1_S1_ii, .-_Z9gibbs_hvh17curandStateXORWOWPiPdS0_S1_S0_S1_S1_S1_ii
	.globl	_Z94__device_stub__Z22contrastive_divergenceP17curandStateXORWOWPiPdS2_S2_PbS2_S1_S2_S1_S2_S1_iidiP17curandStateXORWOWPiPdS2_S2_PbS2_S1_S2_S1_S2_S1_iidi
	.type	_Z94__device_stub__Z22contrastive_divergenceP17curandStateXORWOWPiPdS2_S2_PbS2_S1_S2_S1_S2_S1_iidiP17curandStateXORWOWPiPdS2_S2_PbS2_S1_S2_S1_S2_S1_iidi, @function
_Z94__device_stub__Z22contrastive_divergenceP17curandStateXORWOWPiPdS2_S2_PbS2_S1_S2_S1_S2_S1_iidiP17curandStateXORWOWPiPdS2_S2_PbS2_S1_S2_S1_S2_S1_iidi:
.LFB3881:
	.cfi_startproc
	endbr64
	subq	$328, %rsp
	.cfi_def_cfa_offset 336
	movq	336(%rsp), %rax
	movq	%rdi, 104(%rsp)
	leaq	136(%rsp), %rdi
	movq	%rsi, 96(%rsp)
	leaq	148(%rsp), %rsi
	movq	%rax, 56(%rsp)
	movq	344(%rsp), %rax
	movq	%rdx, 88(%rsp)
	leaq	120(%rsp), %rdx
	movq	%rax, 48(%rsp)
	movq	352(%rsp), %rax
	movq	%rcx, 80(%rsp)
	leaq	128(%rsp), %rcx
	movq	%rax, 40(%rsp)
	movq	360(%rsp), %rax
	movq	%r8, 72(%rsp)
	movq	%rax, 32(%rsp)
	movq	368(%rsp), %rax
	movq	%r9, 64(%rsp)
	movq	%rax, 24(%rsp)
	movq	376(%rsp), %rax
	movsd	%xmm0, 8(%rsp)
	movq	%rax, 16(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 312(%rsp)
	xorl	%eax, %eax
	leaq	104(%rsp), %rax
	movq	%rax, 184(%rsp)
	leaq	96(%rsp), %rax
	movq	%rax, 192(%rsp)
	leaq	88(%rsp), %rax
	movq	%rax, 200(%rsp)
	leaq	80(%rsp), %rax
	movq	%rax, 208(%rsp)
	leaq	72(%rsp), %rax
	movq	%rax, 216(%rsp)
	leaq	64(%rsp), %rax
	movq	%rax, 224(%rsp)
	leaq	56(%rsp), %rax
	movq	%rax, 232(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 240(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 248(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 256(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 264(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 272(%rsp)
	leaq	384(%rsp), %rax
	movq	%rax, 280(%rsp)
	leaq	392(%rsp), %rax
	movq	%rax, 288(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 296(%rsp)
	leaq	400(%rsp), %rax
	movq	%rax, 304(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 136(%rsp)
	movl	$1, 144(%rsp)
	movq	%rax, 148(%rsp)
	movl	$1, 156(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L18
	pushq	128(%rsp)
	.cfi_def_cfa_offset 344
	leaq	_Z22contrastive_divergenceP17curandStateXORWOWPiPdS2_S2_PbS2_S1_S2_S1_S2_S1_iidi(%rip), %rdi
	pushq	128(%rsp)
	.cfi_def_cfa_offset 352
	movq	164(%rsp), %rcx
	movl	172(%rsp), %r8d
	movq	152(%rsp), %rsi
	movl	160(%rsp), %edx
	leaq	200(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 344
	popq	%rdx
	.cfi_def_cfa_offset 336
.L18:
	movq	312(%rsp), %rax
	subq	%fs:40, %rax
	je	.L20
	call	__stack_chk_fail@PLT
.L20:
	addq	$328, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3881:
	.size	_Z94__device_stub__Z22contrastive_divergenceP17curandStateXORWOWPiPdS2_S2_PbS2_S1_S2_S1_S2_S1_iidiP17curandStateXORWOWPiPdS2_S2_PbS2_S1_S2_S1_S2_S1_iidi, .-_Z94__device_stub__Z22contrastive_divergenceP17curandStateXORWOWPiPdS2_S2_PbS2_S1_S2_S1_S2_S1_iidiP17curandStateXORWOWPiPdS2_S2_PbS2_S1_S2_S1_S2_S1_iidi
	.globl	_Z22contrastive_divergenceP17curandStateXORWOWPiPdS2_S2_PbS2_S1_S2_S1_S2_S1_iidi
	.type	_Z22contrastive_divergenceP17curandStateXORWOWPiPdS2_S2_PbS2_S1_S2_S1_S2_S1_iidi, @function
_Z22contrastive_divergenceP17curandStateXORWOWPiPdS2_S2_PbS2_S1_S2_S1_S2_S1_iidi:
.LFB3882:
	.cfi_startproc
	endbr64
	jmp	_Z94__device_stub__Z22contrastive_divergenceP17curandStateXORWOWPiPdS2_S2_PbS2_S1_S2_S1_S2_S1_iidiP17curandStateXORWOWPiPdS2_S2_PbS2_S1_S2_S1_S2_S1_iidi
	.cfi_endproc
.LFE3882:
	.size	_Z22contrastive_divergenceP17curandStateXORWOWPiPdS2_S2_PbS2_S1_S2_S1_S2_S1_iidi, .-_Z22contrastive_divergenceP17curandStateXORWOWPiPdS2_S2_PbS2_S1_S2_S1_S2_S1_iidi
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z22contrastive_divergenceP17curandStateXORWOWPiPdS2_S2_PbS2_S1_S2_S1_S2_S1_iidi"
.LC1:
	.string	"precalc_xorwow_matrix"
.LC2:
	.string	"precalc_xorwow_offset_matrix"
.LC3:
	.string	"mrg32k3aM1"
.LC4:
	.string	"mrg32k3aM2"
.LC5:
	.string	"mrg32k3aM1SubSeq"
.LC6:
	.string	"mrg32k3aM2SubSeq"
.LC7:
	.string	"mrg32k3aM1Seq"
.LC8:
	.string	"mrg32k3aM2Seq"
.LC9:
	.string	"__cr_lgamma_table"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3884:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z22contrastive_divergenceP17curandStateXORWOWPiPdS2_S2_PbS2_S1_S2_S1_S2_S1_iidi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC1(%rip), %rdx
	movl	$102400, %r9d
	leaq	_ZL21precalc_xorwow_matrix(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC2(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$102400, %r9d
	leaq	_ZL28precalc_xorwow_offset_matrix(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC3(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2304, %r9d
	leaq	_ZL10mrg32k3aM1(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC4(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2304, %r9d
	leaq	_ZL10mrg32k3aM2(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC5(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2016, %r9d
	leaq	_ZL16mrg32k3aM1SubSeq(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r11
	.cfi_def_cfa_offset 24
	popq	%rax
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC6(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2016, %r9d
	leaq	_ZL16mrg32k3aM2SubSeq(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC7(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2304, %r9d
	leaq	_ZL13mrg32k3aM1Seq(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC8(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2304, %r9d
	leaq	_ZL13mrg32k3aM2Seq(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$1
	.cfi_def_cfa_offset 32
	leaq	.LC9(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movl	$72, %r9d
	movq	%rdx, %rcx
	leaq	_ZL17__cr_lgamma_table(%rip), %rsi
	call	__cudaRegisterVar@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3884:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.local	_ZL17__cr_lgamma_table
	.comm	_ZL17__cr_lgamma_table,72,32
	.local	_ZL13mrg32k3aM2Seq
	.comm	_ZL13mrg32k3aM2Seq,2304,32
	.local	_ZL13mrg32k3aM1Seq
	.comm	_ZL13mrg32k3aM1Seq,2304,32
	.local	_ZL16mrg32k3aM2SubSeq
	.comm	_ZL16mrg32k3aM2SubSeq,2016,32
	.local	_ZL16mrg32k3aM1SubSeq
	.comm	_ZL16mrg32k3aM1SubSeq,2016,32
	.local	_ZL10mrg32k3aM2
	.comm	_ZL10mrg32k3aM2,2304,32
	.local	_ZL10mrg32k3aM1
	.comm	_ZL10mrg32k3aM1,2304,32
	.local	_ZL28precalc_xorwow_offset_matrix
	.comm	_ZL28precalc_xorwow_offset_matrix,102400,32
	.local	_ZL21precalc_xorwow_matrix
	.comm	_ZL21precalc_xorwow_matrix,102400,32
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:



#include <hip/hip_runtime.h>
#include <hiprand/hiprand_kernel.h>

__global__ void contrastive_divergence(hiprandState *globalState,int *input, double *weights, double *bh, double *bv, bool *mask, double *ph_mean, int *ph_sample, double *nv_means, int *nv_samples, double *nh_means, int *nh_samples, int n_hidden, int n_visible, double lr = 0.01, int N=1);
__device__ void sample_h_given_v(hiprandState globalState,int *v0_sample, double *mean, int *sample, double *hbias, double *weights, int n_hidden, int n_visible);
__device__ double propup(int *v, double *w, double b, int n_visible, int n_hidden);
__device__ double propdown(int *h, double b, int n_hidden, int n_visible, double *W);
__device__ void gibbs_hvh(hiprandState globalState,int *h0_sample, double *nv_means, int *nv_samples, double *nh_means, int *nh_samples, double *weights, double *vbias, double *hbias, int n_visible, int n_hidden);

	.text
	.file	"rbm_helpers.hip"
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_

	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.amdgpu_metadata
---
amdhsa.kernels:  []
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
