/**
* Author:易培淮
* Mail:yiph@ihep.ac.cn
* Function:Accelerate simulation with Single GPU
* 2018/11/27
*/

#include <cuda.h>
#include <cuda_runtime_api.h>
#include <curand.h>
#include <curand_kernel.h>
#include <stdio.h>
#include <math_constants.h>
#include <assert.h>

typedef struct res_arr
{
    double *arr;
    int *pmt_list;
    int index;
    int id;
    int max;
} Res_Arr;


__device__ double generateRandom(curandState *state);
__device__ void generateRandomInit(curandState *state,int seed);
__device__ int sampling(curandState *state,double *histo,int max,int id);
__device__ int binarySearch(double *histo,double target,int max,int id);
__device__ double calculateAngle(double x,double y,double z,double a,double b,double c);
__device__ void generateHits(double r,double theta, double ratio,double start_time,\
    double *hittime_histo,double *npe,curandState *state,Res_Arr *p_r_arr);
__device__ int get_hittime(double r, double theta, int mode, double *hittime_histo, curandState *state);
__device__ int get_hittime_bin(int binx, int biny, int mode, double *hittime_histo, curandState *state);
__device__ int get_hittime_all(int binx, int biny,double *hittime_histo, curandState *state);
__device__ int get_bin_x(double r);
__device__ int get_bin_y(double theta);
__device__ int r_findBin(double r);
__device__ int get_npe(double r,double theta,double *npe,curandState *state);
__device__ int r3_findBin(double r3);
__device__ int theta_findBin(double theta);
__device__ int get_npe_num(int binx,int biny,double *npe,curandState *state);
__device__ int generateRandomInt(curandState *state,int begin,int end);

__global__ void pmt_calculate(double r,double pos_x,double pos_y,double pos_z,\
    double *pmt_x,double *pmt_y,double *pmt_z,double intPart,double fractionPart,\
    double start_time,int numElements,double *hittime_histo,double *npe,int *seed,\
    double *result,int *pmt_res_list,int size);
__device__ void calculate_by_step(double r,double pos_x,double pos_y,double pos_z,\
    double pmt_x,double pmt_y,double pmt_z,double intPart,double fractionPart,\
    double start_time,double *hittime_histo,double *npe,curandState *state,Res_Arr *p_pmt_arr);
__global__ void step_calculate_every_pmt(double *r,double *pos_x,double *pos_y,\
    double *pos_z,double *pmt_x,double *pmt_y,double *pmt_z,double *intPart,\
    double *fractionPart,double *start_time, int numElements,double *hittime_histo,\
    double *npe,int *seed,double *result,int *pmt_res_list,int size);

__device__ void append_res_arr(Res_Arr *p, double val);
__device__ void init_res_arr(Res_Arr *p,double *result,int *pmt_res_list,int pmtid,int size);

// float CDF_Sampling_Wrapping(double *h_pmt,double *h_hit,double *h_result, int *seed,int total_num, int nBytes,int max_n,int max_time);

#define CHECK(call) \
{\
    const cudaError_t error = call;\
    if (error != cudaSuccess)\
    {\
        printf("Error:%s:%d, ", __FILE__, __LINE__);\
        printf("code:%d, reason: %s\n", error, cudaGetErrorString(error));\
        exit(1);\
    }\
}
#define pmt_num 17746
#define pmt_mem 10000
#define CUDART_PI_F 3.141592654f



__global__ void
pmt_calculate(double r,double pos_x,double pos_y,double pos_z,double *pmt_x,double *pmt_y,\
    double *pmt_z,double intPart,double fractionPart,double start_time,int numElements,\
    double *hittime_histo,double *npe,int *seed,double *result,int *pmt_res_list,int size)
{
    int id = blockIdx.x*blockDim.x+threadIdx.x;   
    //numElements = pmt numbers
    if (id < numElements){
        curandState state;
        generateRandomInit(&state, seed[id]);
        Res_Arr pmt_arr;
        init_res_arr(&pmt_arr,result,pmt_res_list,id,size);
        double theta = calculateAngle(pmt_x[id],pmt_y[id],pmt_z[id],pos_x,pos_y,pos_z);
        // printf("theta = %lf\n",theta);
        for(int j = 0; j < intPart; ++j){
            //r 单位 米
        	generateHits(r,theta,1,start_time,hittime_histo,npe,&state,&pmt_arr);
        }
        generateHits(r,theta,fractionPart,start_time,hittime_histo,npe,&state,&pmt_arr);
    }
}


__global__ void
step_calculate_every_pmt(double *r,double *pos_x,double *pos_y,double *pos_z,double *pmt_x,\
    double *pmt_y,double *pmt_z,double *intPart,double *fractionPart,double *start_time, \
    int numElements,double *hittime_histo,double *npe,int *seed,double *result, \
    int *pmt_res_list,int size)
{
    int id = blockIdx.x*blockDim.x+threadIdx.x;   
    //numElements = pmt numbers
    if (id < numElements){
        curandState state;
        generateRandomInit(&state,seed[id]);
        Res_Arr pmt_arr;
        init_res_arr(&pmt_arr,result,pmt_res_list,id,size);
        for(int i=0;i<size;i++)
        {
            int index = i*numElements+id;
            calculate_by_step(r[index],pos_x[index],pos_y[index],pos_z[index],pmt_x[id],pmt_y[id],\
                pmt_z[id],intPart[index],fractionPart[index],start_time[index],hittime_histo,\
                npe,&state,&pmt_arr);
        }
    }
}

__device__ void
calculate_by_step(double r,double pos_x,double pos_y,double pos_z,double pmt_x,double pmt_y,\
    double pmt_z,double intPart,double fractionPart,double start_time,double *hittime_histo,\
    double *npe,curandState *state,Res_Arr *p_pmt_arr)
{
    double theta = calculateAngle(pmt_x,pmt_y,pmt_z,pos_x,pos_y,pos_z);
    for(int j = 0;j<intPart; ++j){
        //r(m)
        generateHits(r,theta,1,start_time,hittime_histo,npe,state,p_pmt_arr);
    }
    generateHits(r,theta,fractionPart,start_time,hittime_histo,npe,state,p_pmt_arr);
}



__device__ double
calculateAngle(double x,double y,double z,double a,double b,double c)
{
    //  printf("x=%lf,y=%lf,z=%lf,a=%lf,b=%lf,c=%lf\n",x,y,z,a,b,c);
    double result = 0;
    if (a == 0 and b == 0 and c == 0){
        return result;
    }
    else{
        result = acos((a*x+b*y+c*z)/(norm3d(x,y,z)*norm3d(a,b,c)));
        //printf("result theta = %lf",result);
        return result;
    }
}

__device__ void 
generateHits(double r,double theta, double ratio,double start_time,double *hittime_histo,\
    double *npe,curandState *state,Res_Arr *p_r_arr)
{
    
    int npe_histo_id = get_npe(r,theta,npe,state);
    if (npe_histo_id>0)
    {
        // printf("npe_histo_id = %d,r = %lf,theta = %lf\n",npe_histo_id,r,theta);
        for (int hitj = 0; hitj < npe_histo_id; ++hitj) 
        {
            // printf("ratio=%lf\n",ratio);
            // skip the photon according to the energy deposit
            if (ratio<1 and generateRandom(state)>ratio) 
            {
                continue;
            }
            double hittime_single = start_time;
            // (m_flag_time) 
            hittime_single += (double)get_hittime(r, theta, 0, hittime_histo, state);
            printf("hittime = %lf\n",hittime_single);
            // generated hit
            // (m_flag_savehits) 
            append_res_arr(p_r_arr,hittime_single);
            // save_hits(pmtid, hittime_single,result);
        }
    }
}

 // __device__ void 
 // save_hits(Res_Arr *p,double val){
 // 	append_res_arr(p,val);
 // }

__device__ int
get_hittime(double r, double theta, int mode, double *hittime_histo, curandState *state) {
    int binx = get_bin_x(r);
    int biny = get_bin_y(theta);
    
    return get_hittime_bin(binx, biny, mode, hittime_histo, state);
}

__device__ int 
get_hittime_bin(int binx, int biny, int mode, double *hittime_histo, curandState *state) {
    // hit time = tmean + tres
    int hittime_single = 0;
    if (mode == 0) {
        hittime_single = get_hittime_all(binx,biny,hittime_histo,state);
    }
    return hittime_single;
}

__device__ int 
get_hittime_all(int binx, int biny,double *hittime_histo, curandState *state) {
    // TH1F* h = get_hist(binx, biny);
    const int xbinnum = 200;
    const int ybinnum = 180;
    if (binx<1) { binx = 1; }
    else if (binx > xbinnum) { binx = xbinnum;}
    if (biny<1) { biny = 1; }
    else if (biny > ybinnum) { biny = ybinnum;}
    int idx = (binx-1)*ybinnum+(biny-1);
    int hittime_single = sampling(state,hittime_histo,3000,idx);
    return hittime_single;
}


__device__ int 
get_bin_x(double r) 
{
    int binx = 1;
    int xmode = 2;
    if (xmode == 2) //KR
    {
        binx = r_findBin(r);
    } 
    return binx;
}

__device__ int 
get_bin_y(double theta) {
    int biny = 1;
    int ymode = 4;
    if (ymode == 4) {
        biny = theta_findBin(theta);
    }
    return biny;
}

__device__ int 
r_findBin(double r)
{
    const int binnum = 200;
    const double begin = 0;
    const double end = 17.7;
    if(r==0){
        return 1;
    }
    else{
        return (int)ceil((r-begin)/(end-begin)*binnum); 
    }
}

__device__ int 
get_npe(double r,double theta,double *npe,curandState *state)
{
    int binx = r3_findBin(pow(r,3));
    int biny = theta_findBin(theta);
    return get_npe_num(binx,biny,npe,state);
}

__device__ int 
r3_findBin(double r3)
{
    const int binnum = 100;
    const double begin = 0;
    const double end = 5600;
    if(r3 == 0){
        return 1;
    }
    else{
        return (int)ceil((r3-begin)/(end-begin)*binnum);
    }
}


__device__ int 
theta_findBin(double theta)
{
    const int binnum = 180;
    const double begin = 0; 
    const double end = 180.01*CUDART_PI_F/180.0;
    if(theta == 0){
        
        return 1;
    }
    else{
        return (int)ceil((theta-begin)/(end-begin)*binnum);
    }
}

__device__ int 
get_npe_num(int binx,int biny,double *npe,curandState *state)
{
    int npe_from_single = 0;
    if (1 <= binx and binx <= 100 and 1 <= biny and biny <= 180) {
        npe_from_single = sampling(state,npe,33,(binx-1)*180+(biny-1));	
    } else if (binx==1 and (biny<1 or biny>180)) {
        biny = generateRandomInt(state,1,180);
        npe_from_single = sampling(state,npe,33,(binx-1)*180+(biny-1));	
    } else if (binx>1 and (biny<1 or biny>180)) {
        if (biny>180) { biny = 180; }
        else if (biny<1){ biny = 1; }
        npe_from_single = sampling(state,npe,33,(binx-1)*180+(biny-1));
    } else {
        static long warning = 0;
        ++warning;
        if (warning < 10) {
            printf("npe lost: %d/%d\n", binx,biny);
        } else if (warning == 10) {
            printf("too many npe lost complains.\n");
        }
    }
    return npe_from_single;
}

__device__ double
generateRandom(curandState *state)
{
    // int id = blockIdx.x*blockDim.x+threadIdx.x;   
    double result = abs(curand_uniform_double(state));
    return result;
}

__device__ int
generateRandomInt(curandState *state,int begin,int end)
{
    int result = begin+int(ceil(abs(curand_uniform_double(state))*(end-begin)));
    return result;
}

__device__ void
generateRandomInit(curandState *state,int seed)
{
    // printf("seed = %d\n",seed);
    // int id = blockIdx.x*blockDim.x+threadIdx.x;   
    curand_init(seed, 0, 0, state);
}

__device__ int 
sampling(curandState *state,double *histo,int max,int id)
{
    double prob; 
    prob = generateRandom(state);
    return binarySearch(histo,prob,max,id);
}

__device__ int
binarySearch(double *histo,double target,int max,int id)
{

    // int result_for = -1;
    // int result_bin = 0;
    // for (int i=0;i<max;i++){
    //     if (target<=histo[id*max+i]){
    //         // printf("[debug]histo = %lf,%lf\n",histo[id*max],histo[id*max+i]);
    //         // printf("[debug]target=%lf,max=%d,id =%d,i=%d\n",target,max,id,i);
    //         return i;
    //     }
    // }
    // return -1;
 
    int start = 0;
    int end = max-1;
    int mid;
    while(start+1<end){
        mid = start+(end-start)/2;
        if (histo[id*max+mid]==target){
            end = mid;
        } 
        else if (histo[id*max+mid] < target){
            start = mid;
        }
        else if (histo[id*max+mid] > target){
            end = mid;
        }
    }
    if (target <= histo[id*max+start]){
        return start;
    }
    else if (histo[id*max+start] < target){
        return end;
    }
    
    return -1;
}

__device__ void
append_res_arr(Res_Arr *p, double val)//追加，可能成功，可能失败
{
    p->arr[p->index+p->pmt_list[p->id]] = val;
    p->pmt_list[p->id] += 1;
    assert(p->pmt_list[p->id]<=p->max);
    
    return;

}

__device__ void
init_res_arr(Res_Arr *p,double *result,int *pmt_res_list,int pmtid,int size){
    p->arr = result;//存储的内存空间
    p->pmt_list = pmt_res_list;//存储每个pmt内存空间使用量
    p->index = pmtid*pmt_mem;//存储该pmt在数组中的起始存取点
    p->id = pmtid;
    p->max = pmt_mem;
    // p->begin = begin;
    // p->len = len;
    return;
}

extern "C"
{
    float GPU_Sampling_wrapper(double *r,double *pos_x,double *pos_y,double *pos_z, \
        double *intPart, double *fractionPart,double *start_time,double *pmt_x,double *pmt_y,\
        double *pmt_z,double *data_hit,double *data_npe,int *seed,int *size,double* h_result)
    {
        //GPU计时，设置开始和结束事件
        cudaEvent_t start, stop;
        cudaEvent_t gpu_start,gpu_stop,data_start,data_stop;
        CHECK(cudaEventCreate(&start));
        CHECK(cudaEventCreate(&stop));
        cudaEventCreate(&gpu_start);
        cudaEventCreate(&gpu_stop);
        cudaEventCreate(&data_start);
        cudaEventCreate(&data_stop);
        cudaEventRecord(start);
        cudaEventRecord(data_start);
        //申请GPU内存
        double *d_r, *d_pos_x,*d_pos_y,*d_pos_z,*d_intPart,*d_fractionPart,*d_start_time;
        double *d_pmt_x,*d_pmt_y,*d_pmt_z,*d_data_hit,*d_data_npe;
        double *d_result;
        int *d_seed,*d_pmt_res_list;
        CHECK(cudaMalloc((double**)&d_r,size[0]));
        CHECK(cudaMalloc((double**)&d_pos_x,size[0]));
        CHECK(cudaMalloc((double**)&d_pos_y,size[0]));
        CHECK(cudaMalloc((double**)&d_pos_z,size[0]));
        CHECK(cudaMalloc((double**)&d_intPart,size[0]));
        CHECK(cudaMalloc((double**)&d_fractionPart,size[0]));
        CHECK(cudaMalloc((double**)&d_start_time,size[0]));
        CHECK(cudaMalloc((double**)&d_pmt_x,size[1]));
        CHECK(cudaMalloc((double**)&d_pmt_y,size[1]));
        CHECK(cudaMalloc((double**)&d_pmt_z,size[1]));
        CHECK(cudaMalloc((double**)&d_data_hit,size[2]));
        CHECK(cudaMalloc((double**)&d_data_npe,size[3]));
        CHECK(cudaMalloc((int**)&d_seed,size[4]));
        CHECK(cudaMalloc((double**)&d_result,pmt_num*pmt_mem*sizeof(double)));
        CHECK(cudaMalloc((int**)&d_pmt_res_list,pmt_num*sizeof(int)));

        //设置内存
        CHECK(cudaMemset(d_pmt_res_list,0,pmt_num*sizeof(int)));
        CHECK(cudaMemset(d_result,0,pmt_num*pmt_mem*sizeof(double)));
        //将CPU内存拷贝到GPU
        CHECK(cudaMemcpy(d_r, r, size[0], cudaMemcpyHostToDevice));
        CHECK(cudaMemcpy(d_pos_x, pos_x, size[0], cudaMemcpyHostToDevice));
        CHECK(cudaMemcpy(d_pos_y, pos_y, size[0], cudaMemcpyHostToDevice));
        CHECK(cudaMemcpy(d_pos_z, pos_z, size[0], cudaMemcpyHostToDevice));
        CHECK(cudaMemcpy(d_intPart, intPart, size[0], cudaMemcpyHostToDevice));
        CHECK(cudaMemcpy(d_fractionPart, fractionPart, size[0], cudaMemcpyHostToDevice));
        CHECK(cudaMemcpy(d_start_time, start_time, size[0], cudaMemcpyHostToDevice));
        CHECK(cudaMemcpy(d_pmt_x, pmt_x, size[1], cudaMemcpyHostToDevice));
        CHECK(cudaMemcpy(d_pmt_y, pmt_y, size[1], cudaMemcpyHostToDevice));
        CHECK(cudaMemcpy(d_pmt_z, pmt_z, size[1], cudaMemcpyHostToDevice));
        CHECK(cudaMemcpy(d_data_hit, data_hit, size[2], cudaMemcpyHostToDevice));
        CHECK(cudaMemcpy(d_data_npe, data_npe, size[3], cudaMemcpyHostToDevice));
        CHECK(cudaMemcpy(d_seed, seed, size[4], cudaMemcpyHostToDevice));
        
        cudaEventRecord(data_stop);
        cudaEventSynchronize(data_stop);
        // printf("[GPU]GPU数据拷贝完成\n");
        //设置使用编号为0的GPU
        CHECK(cudaSetDevice(0));
        // //设置线程数量
        int threadPerBlock= 1024;
        int blocksPerGrid = 18;
        dim3 block(threadPerBlock);
        //设置块数量
        dim3 grid(blocksPerGrid);//blocksPerGrid
        //调用核函数
        cudaEventRecord(gpu_start);
        // for(int i = 0;i<size[0]/8;i++) {
        //     CHECK(cudaDeviceSynchronize());
        //     // printf("[GPU]核函数开始运行[%d]\n",i);
        //     pmt_calculate<<<grid, block>>>(r[i],pos_x[i],pos_y[i],pos_z[i],d_pmt_x,d_pmt_y,\
        //         d_pmt_z,intPart[i],fractionPart[i],start_time[i],17746,d_data_hit,d_data_npe,\
        //         (int*)(d_seed+i*pmt_num),d_result,d_pmt_res_list,(int)size[0]/8);
        // }
        step_calculate_every_pmt<<<grid, block>>>(d_r,d_pos_x,d_pos_y,d_pos_z,d_pmt_x,d_pmt_y,\
            d_pmt_z,d_intPart,d_fractionPart,d_start_time,pmt_num,d_data_hit,d_data_npe,d_seed,\
            d_result,d_pmt_res_list,(int)size[0]/sizeof(double));
        cudaEventRecord(gpu_stop);
        cudaEventSynchronize(gpu_stop);
        
        // printf("[GPU]核函数运行完成\n");
        // CHECK(cudaDeviceSynchronize());

        CHECK(cudaMemcpy(h_result, d_result, pmt_num*pmt_mem*sizeof(double), cudaMemcpyDeviceToHost));
        
        // printf("threadPerBlock:%d\n",threadPerBlock);
        // printf("blocksPerGrid；%d\n",blocksPerGrid);
        

        //释放GPU内存
        CHECK(cudaFree(d_data_hit));
        CHECK(cudaFree(d_data_npe));
        CHECK(cudaFree(d_pmt_x));
        CHECK(cudaFree(d_pmt_y));
        CHECK(cudaFree(d_pmt_z));
        CHECK(cudaFree(d_seed));
        CHECK(cudaFree(d_result));
        // printf("[GPU]GPU运行完成\n");

        cudaEventRecord(stop);
        cudaEventSynchronize(stop);
        float total_time,gputime,datatime;
        //计算用时，精度0.5us
        cudaEventElapsedTime(&datatime, data_start, data_stop);
        cudaEventElapsedTime(&gputime, gpu_start, gpu_stop);
        cudaEventElapsedTime(&total_time, start, stop);
        cudaEventDestroy(gpu_start);
        cudaEventDestroy(gpu_stop);
        cudaEventDestroy(data_start);
        cudaEventDestroy(data_stop);
        cudaEventDestroy(start);
        cudaEventDestroy(stop);        
        printf("total use time %f ms\n", total_time);
        printf("gpu use time %f ms\n",gputime);
        printf("data use time %f ms\n",datatime);
        printf("data transport back use time %f ms\n",total_time - datatime - gputime);
        CHECK(cudaDeviceReset());        
        return total_time;
        // return 0.0;
    }
}
	.file	"tmpxft_002d6833_00000000-6_check.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2264:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2264:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z17calculate_by_stepddddddddddPdS_P17curandStateXORWOWP7res_arr
	.type	_Z17calculate_by_stepddddddddddPdS_P17curandStateXORWOWP7res_arr, @function
_Z17calculate_by_stepddddddddddPdS_P17curandStateXORWOWP7res_arr:
.LFB2241:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2241:
	.size	_Z17calculate_by_stepddddddddddPdS_P17curandStateXORWOWP7res_arr, .-_Z17calculate_by_stepddddddddddPdS_P17curandStateXORWOWP7res_arr
	.globl	_Z14calculateAngledddddd
	.type	_Z14calculateAngledddddd, @function
_Z14calculateAngledddddd:
.LFB2242:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2242:
	.size	_Z14calculateAngledddddd, .-_Z14calculateAngledddddd
	.globl	_Z12generateHitsddddPdS_P17curandStateXORWOWP7res_arr
	.type	_Z12generateHitsddddPdS_P17curandStateXORWOWP7res_arr, @function
_Z12generateHitsddddPdS_P17curandStateXORWOWP7res_arr:
.LFB2243:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2243:
	.size	_Z12generateHitsddddPdS_P17curandStateXORWOWP7res_arr, .-_Z12generateHitsddddPdS_P17curandStateXORWOWP7res_arr
	.globl	_Z11get_hittimeddiPdP17curandStateXORWOW
	.type	_Z11get_hittimeddiPdP17curandStateXORWOW, @function
_Z11get_hittimeddiPdP17curandStateXORWOW:
.LFB2244:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2244:
	.size	_Z11get_hittimeddiPdP17curandStateXORWOW, .-_Z11get_hittimeddiPdP17curandStateXORWOW
	.globl	_Z15get_hittime_biniiiPdP17curandStateXORWOW
	.type	_Z15get_hittime_biniiiPdP17curandStateXORWOW, @function
_Z15get_hittime_biniiiPdP17curandStateXORWOW:
.LFB2245:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2245:
	.size	_Z15get_hittime_biniiiPdP17curandStateXORWOW, .-_Z15get_hittime_biniiiPdP17curandStateXORWOW
	.globl	_Z15get_hittime_alliiPdP17curandStateXORWOW
	.type	_Z15get_hittime_alliiPdP17curandStateXORWOW, @function
_Z15get_hittime_alliiPdP17curandStateXORWOW:
.LFB2246:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2246:
	.size	_Z15get_hittime_alliiPdP17curandStateXORWOW, .-_Z15get_hittime_alliiPdP17curandStateXORWOW
	.globl	_Z9get_bin_xd
	.type	_Z9get_bin_xd, @function
_Z9get_bin_xd:
.LFB2247:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2247:
	.size	_Z9get_bin_xd, .-_Z9get_bin_xd
	.globl	_Z9get_bin_yd
	.type	_Z9get_bin_yd, @function
_Z9get_bin_yd:
.LFB2410:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	pushq	%rax
	.cfi_def_cfa_offset 16
	call	_Z9get_bin_xd
	.cfi_endproc
.LFE2410:
	.size	_Z9get_bin_yd, .-_Z9get_bin_yd
	.globl	_Z9r_findBind
	.type	_Z9r_findBind, @function
_Z9r_findBind:
.LFB2412:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	pushq	%rax
	.cfi_def_cfa_offset 16
	call	_Z9get_bin_xd
	.cfi_endproc
.LFE2412:
	.size	_Z9r_findBind, .-_Z9r_findBind
	.globl	_Z7get_npeddPdP17curandStateXORWOW
	.type	_Z7get_npeddPdP17curandStateXORWOW, @function
_Z7get_npeddPdP17curandStateXORWOW:
.LFB2250:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2250:
	.size	_Z7get_npeddPdP17curandStateXORWOW, .-_Z7get_npeddPdP17curandStateXORWOW
	.globl	_Z10r3_findBind
	.type	_Z10r3_findBind, @function
_Z10r3_findBind:
.LFB2414:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	pushq	%rax
	.cfi_def_cfa_offset 16
	call	_Z9get_bin_xd
	.cfi_endproc
.LFE2414:
	.size	_Z10r3_findBind, .-_Z10r3_findBind
	.globl	_Z13theta_findBind
	.type	_Z13theta_findBind, @function
_Z13theta_findBind:
.LFB2416:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	pushq	%rax
	.cfi_def_cfa_offset 16
	call	_Z9get_bin_xd
	.cfi_endproc
.LFE2416:
	.size	_Z13theta_findBind, .-_Z13theta_findBind
	.globl	_Z11get_npe_numiiPdP17curandStateXORWOW
	.type	_Z11get_npe_numiiPdP17curandStateXORWOW, @function
_Z11get_npe_numiiPdP17curandStateXORWOW:
.LFB2418:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2418:
	.size	_Z11get_npe_numiiPdP17curandStateXORWOW, .-_Z11get_npe_numiiPdP17curandStateXORWOW
	.globl	_Z14generateRandomP17curandStateXORWOW
	.type	_Z14generateRandomP17curandStateXORWOW, @function
_Z14generateRandomP17curandStateXORWOW:
.LFB2254:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2254:
	.size	_Z14generateRandomP17curandStateXORWOW, .-_Z14generateRandomP17curandStateXORWOW
	.globl	_Z17generateRandomIntP17curandStateXORWOWii
	.type	_Z17generateRandomIntP17curandStateXORWOWii, @function
_Z17generateRandomIntP17curandStateXORWOWii:
.LFB2255:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2255:
	.size	_Z17generateRandomIntP17curandStateXORWOWii, .-_Z17generateRandomIntP17curandStateXORWOWii
	.globl	_Z18generateRandomInitP17curandStateXORWOWi
	.type	_Z18generateRandomInitP17curandStateXORWOWi, @function
_Z18generateRandomInitP17curandStateXORWOWi:
.LFB2256:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2256:
	.size	_Z18generateRandomInitP17curandStateXORWOWi, .-_Z18generateRandomInitP17curandStateXORWOWi
	.globl	_Z8samplingP17curandStateXORWOWPdii
	.type	_Z8samplingP17curandStateXORWOWPdii, @function
_Z8samplingP17curandStateXORWOWPdii:
.LFB2257:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2257:
	.size	_Z8samplingP17curandStateXORWOWPdii, .-_Z8samplingP17curandStateXORWOWPdii
	.globl	_Z12binarySearchPddii
	.type	_Z12binarySearchPddii, @function
_Z12binarySearchPddii:
.LFB2258:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2258:
	.size	_Z12binarySearchPddii, .-_Z12binarySearchPddii
	.globl	_Z14append_res_arrP7res_arrd
	.type	_Z14append_res_arrP7res_arrd, @function
_Z14append_res_arrP7res_arrd:
.LFB2259:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2259:
	.size	_Z14append_res_arrP7res_arrd, .-_Z14append_res_arrP7res_arrd
	.globl	_Z12init_res_arrP7res_arrPdPiii
	.type	_Z12init_res_arrP7res_arrPdPiii, @function
_Z12init_res_arrP7res_arrPdPiii:
.LFB2260:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2260:
	.size	_Z12init_res_arrP7res_arrPdPiii, .-_Z12init_res_arrP7res_arrPdPiii
	.globl	_Z57__device_stub__Z13pmt_calculateddddPdS_S_dddiS_S_PiS_S0_iddddPdS_S_dddiS_S_PiS_S0_i
	.type	_Z57__device_stub__Z13pmt_calculateddddPdS_S_dddiS_S_PiS_S0_iddddPdS_S_dddiS_S_PiS_S0_i, @function
_Z57__device_stub__Z13pmt_calculateddddPdS_S_dddiS_S_PiS_S0_iddddPdS_S_dddiS_S_PiS_S0_i:
.LFB2286:
	.cfi_startproc
	endbr64
	subq	$344, %rsp
	.cfi_def_cfa_offset 352
	movq	352(%rsp), %rax
	movq	%rdi, 88(%rsp)
	leaq	144(%rsp), %rdi
	movq	%rsi, 80(%rsp)
	leaq	156(%rsp), %rsi
	movq	%rax, 16(%rsp)
	movq	360(%rsp), %rax
	movq	%rdx, 72(%rsp)
	leaq	128(%rsp), %rdx
	movq	%rax, 8(%rsp)
	movq	368(%rsp), %rax
	movl	%ecx, 44(%rsp)
	leaq	136(%rsp), %rcx
	movq	%r8, 32(%rsp)
	movq	%r9, 24(%rsp)
	movq	%rax, (%rsp)
	movsd	%xmm0, 120(%rsp)
	movsd	%xmm1, 112(%rsp)
	movsd	%xmm2, 104(%rsp)
	movsd	%xmm3, 96(%rsp)
	movsd	%xmm4, 64(%rsp)
	movsd	%xmm5, 56(%rsp)
	movsd	%xmm6, 48(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 328(%rsp)
	xorl	%eax, %eax
	leaq	120(%rsp), %rax
	movq	%rax, 192(%rsp)
	leaq	112(%rsp), %rax
	movq	%rax, 200(%rsp)
	leaq	104(%rsp), %rax
	movq	%rax, 208(%rsp)
	leaq	96(%rsp), %rax
	movq	%rax, 216(%rsp)
	leaq	88(%rsp), %rax
	movq	%rax, 224(%rsp)
	leaq	80(%rsp), %rax
	movq	%rax, 232(%rsp)
	leaq	72(%rsp), %rax
	movq	%rax, 240(%rsp)
	leaq	64(%rsp), %rax
	movq	%rax, 248(%rsp)
	leaq	56(%rsp), %rax
	movq	%rax, 256(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 264(%rsp)
	leaq	44(%rsp), %rax
	movq	%rax, 272(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 280(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 288(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 296(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 304(%rsp)
	movq	%rsp, %rax
	movq	%rax, 312(%rsp)
	leaq	376(%rsp), %rax
	movq	%rax, 320(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 144(%rsp)
	movl	$1, 152(%rsp)
	movq	%rax, 156(%rsp)
	movl	$1, 164(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L42
	pushq	136(%rsp)
	.cfi_def_cfa_offset 360
	leaq	_Z13pmt_calculateddddPdS_S_dddiS_S_PiS_S0_i(%rip), %rdi
	pushq	136(%rsp)
	.cfi_def_cfa_offset 368
	movq	172(%rsp), %rcx
	movl	180(%rsp), %r8d
	movq	160(%rsp), %rsi
	movl	168(%rsp), %edx
	leaq	208(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 360
	popq	%rdx
	.cfi_def_cfa_offset 352
.L42:
	movq	328(%rsp), %rax
	subq	%fs:40, %rax
	je	.L44
	call	__stack_chk_fail@PLT
.L44:
	addq	$344, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2286:
	.size	_Z57__device_stub__Z13pmt_calculateddddPdS_S_dddiS_S_PiS_S0_iddddPdS_S_dddiS_S_PiS_S0_i, .-_Z57__device_stub__Z13pmt_calculateddddPdS_S_dddiS_S_PiS_S0_iddddPdS_S_dddiS_S_PiS_S0_i
	.globl	_Z13pmt_calculateddddPdS_S_dddiS_S_PiS_S0_i
	.type	_Z13pmt_calculateddddPdS_S_dddiS_S_PiS_S0_i, @function
_Z13pmt_calculateddddPdS_S_dddiS_S_PiS_S0_i:
.LFB2287:
	.cfi_startproc
	endbr64
	jmp	_Z57__device_stub__Z13pmt_calculateddddPdS_S_dddiS_S_PiS_S0_iddddPdS_S_dddiS_S_PiS_S0_i
	.cfi_endproc
.LFE2287:
	.size	_Z13pmt_calculateddddPdS_S_dddiS_S_PiS_S0_i, .-_Z13pmt_calculateddddPdS_S_dddiS_S_PiS_S0_i
	.globl	_Z75__device_stub__Z24step_calculate_every_pmtPdS_S_S_S_S_S_S_S_S_iS_S_PiS_S0_iPdS_S_S_S_S_S_S_S_S_iS_S_PiS_S0_i
	.type	_Z75__device_stub__Z24step_calculate_every_pmtPdS_S_S_S_S_S_S_S_S_iS_S_PiS_S0_iPdS_S_S_S_S_S_S_S_S_iS_S_PiS_S0_i, @function
_Z75__device_stub__Z24step_calculate_every_pmtPdS_S_S_S_S_S_S_S_S_iS_S_PiS_S0_iPdS_S_S_S_S_S_S_S_S_iS_S_PiS_S0_i:
.LFB2288:
	.cfi_startproc
	endbr64
	subq	$344, %rsp
	.cfi_def_cfa_offset 352
	movq	352(%rsp), %rax
	movq	%rdi, 120(%rsp)
	leaq	144(%rsp), %rdi
	movq	%rsi, 112(%rsp)
	leaq	156(%rsp), %rsi
	movq	%rax, 72(%rsp)
	movq	360(%rsp), %rax
	movq	%rdx, 104(%rsp)
	leaq	128(%rsp), %rdx
	movq	%rax, 64(%rsp)
	movq	368(%rsp), %rax
	movq	%rcx, 96(%rsp)
	leaq	136(%rsp), %rcx
	movq	%rax, 56(%rsp)
	movq	376(%rsp), %rax
	movq	%r8, 88(%rsp)
	movq	%rax, 48(%rsp)
	movq	392(%rsp), %rax
	movq	%r9, 80(%rsp)
	movq	%rax, 40(%rsp)
	movq	400(%rsp), %rax
	movq	%rax, 32(%rsp)
	movq	408(%rsp), %rax
	movq	%rax, 24(%rsp)
	movq	416(%rsp), %rax
	movq	%rax, 16(%rsp)
	movq	424(%rsp), %rax
	movq	%rax, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 328(%rsp)
	xorl	%eax, %eax
	leaq	120(%rsp), %rax
	movq	%rax, 192(%rsp)
	leaq	112(%rsp), %rax
	movq	%rax, 200(%rsp)
	leaq	104(%rsp), %rax
	movq	%rax, 208(%rsp)
	leaq	96(%rsp), %rax
	movq	%rax, 216(%rsp)
	leaq	88(%rsp), %rax
	movq	%rax, 224(%rsp)
	leaq	80(%rsp), %rax
	movq	%rax, 232(%rsp)
	leaq	72(%rsp), %rax
	movq	%rax, 240(%rsp)
	leaq	64(%rsp), %rax
	movq	%rax, 248(%rsp)
	leaq	56(%rsp), %rax
	movq	%rax, 256(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 264(%rsp)
	leaq	384(%rsp), %rax
	movq	%rax, 272(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 280(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 288(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 296(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 304(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 312(%rsp)
	leaq	432(%rsp), %rax
	movq	%rax, 320(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 144(%rsp)
	movl	$1, 152(%rsp)
	movq	%rax, 156(%rsp)
	movl	$1, 164(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L48
	pushq	136(%rsp)
	.cfi_def_cfa_offset 360
	leaq	_Z24step_calculate_every_pmtPdS_S_S_S_S_S_S_S_S_iS_S_PiS_S0_i(%rip), %rdi
	pushq	136(%rsp)
	.cfi_def_cfa_offset 368
	movq	172(%rsp), %rcx
	movl	180(%rsp), %r8d
	movq	160(%rsp), %rsi
	movl	168(%rsp), %edx
	leaq	208(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 360
	popq	%rdx
	.cfi_def_cfa_offset 352
.L48:
	movq	328(%rsp), %rax
	subq	%fs:40, %rax
	je	.L50
	call	__stack_chk_fail@PLT
.L50:
	addq	$344, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2288:
	.size	_Z75__device_stub__Z24step_calculate_every_pmtPdS_S_S_S_S_S_S_S_S_iS_S_PiS_S0_iPdS_S_S_S_S_S_S_S_S_iS_S_PiS_S0_i, .-_Z75__device_stub__Z24step_calculate_every_pmtPdS_S_S_S_S_S_S_S_S_iS_S_PiS_S0_iPdS_S_S_S_S_S_S_S_S_iS_S_PiS_S0_i
	.globl	_Z24step_calculate_every_pmtPdS_S_S_S_S_S_S_S_S_iS_S_PiS_S0_i
	.type	_Z24step_calculate_every_pmtPdS_S_S_S_S_S_S_S_S_iS_S_PiS_S0_i, @function
_Z24step_calculate_every_pmtPdS_S_S_S_S_S_S_S_S_iS_S_PiS_S0_i:
.LFB2289:
	.cfi_startproc
	endbr64
	jmp	_Z75__device_stub__Z24step_calculate_every_pmtPdS_S_S_S_S_S_S_S_S_iS_S_PiS_S0_iPdS_S_S_S_S_S_S_S_S_iS_S_PiS_S0_i
	.cfi_endproc
.LFE2289:
	.size	_Z24step_calculate_every_pmtPdS_S_S_S_S_S_S_S_S_iS_S_PiS_S0_i, .-_Z24step_calculate_every_pmtPdS_S_S_S_S_S_S_S_S_iS_S_PiS_S0_i
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"/home/ubuntu/Datasets/stackv2/train-structured/advancc/gpulearn/master/MuonFastVoxel/check.cu"
.LC1:
	.string	"Error:%s:%d, "
.LC2:
	.string	"code:%d, reason: %s\n"
.LC3:
	.string	"total use time %f ms\n"
.LC4:
	.string	"gpu use time %f ms\n"
.LC5:
	.string	"data use time %f ms\n"
.LC6:
	.string	"data transport back use time %f ms\n"
	.text
	.globl	GPU_Sampling_wrapper
	.type	GPU_Sampling_wrapper, @function
GPU_Sampling_wrapper:
.LFB2261:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rdi, %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rsi, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rdx, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rcx, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$312, %rsp
	.cfi_def_cfa_offset 368
	movq	368(%rsp), %rax
	leaq	104(%rsp), %rdi
	movq	%r8, (%rsp)
	movq	%r9, 8(%rsp)
	movq	424(%rsp), %rbx
	movq	%rax, 16(%rsp)
	movq	376(%rsp), %rax
	movq	%rax, 24(%rsp)
	movq	384(%rsp), %rax
	movq	%rax, 32(%rsp)
	movq	392(%rsp), %rax
	movq	%rax, 40(%rsp)
	movq	400(%rsp), %rax
	movq	%rax, 48(%rsp)
	movq	408(%rsp), %rax
	movq	%rax, 56(%rsp)
	movq	416(%rsp), %rax
	movq	%rax, 64(%rsp)
	movq	432(%rsp), %rax
	movq	%rax, 72(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 296(%rsp)
	xorl	%eax, %eax
	call	cudaEventCreate@PLT
	testl	%eax, %eax
	je	.L54
	movl	%eax, %ebp
	movl	$423, %ecx
	jmp	.L99
.L54:
	leaq	112(%rsp), %rdi
	call	cudaEventCreate@PLT
	movl	%eax, %ebp
	testl	%eax, %eax
	je	.L55
	movl	$424, %ecx
.L99:
	leaq	.LC0(%rip), %rdx
	leaq	.LC1(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	%ebp, %edi
	call	cudaGetErrorString@PLT
	movl	%ebp, %edx
	movq	%rax, %rcx
.L100:
	movl	$2, %edi
	leaq	.LC2(%rip), %rsi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$1, %edi
	call	exit@PLT
.L55:
	leaq	120(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	128(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	136(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	144(%rsp), %rdi
	call	cudaEventCreate@PLT
	movq	104(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	136(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movslq	(%rbx), %rsi
	leaq	152(%rsp), %rdi
	call	cudaMalloc@PLT
	movl	$436, %ecx
	movl	%eax, %ebp
	testl	%eax, %eax
	jne	.L99
	movslq	(%rbx), %rsi
	leaq	160(%rsp), %rdi
	call	cudaMalloc@PLT
	movl	$437, %ecx
	movl	%eax, %ebp
	testl	%eax, %eax
	jne	.L99
	movslq	(%rbx), %rsi
	leaq	168(%rsp), %rdi
	call	cudaMalloc@PLT
	movl	$438, %ecx
	movl	%eax, %ebp
	testl	%eax, %eax
	jne	.L99
	movslq	(%rbx), %rsi
	leaq	176(%rsp), %rdi
	call	cudaMalloc@PLT
	movl	$439, %ecx
	movl	%eax, %ebp
	testl	%eax, %eax
	jne	.L99
	movslq	(%rbx), %rsi
	leaq	184(%rsp), %rdi
	call	cudaMalloc@PLT
	movl	$440, %ecx
	movl	%eax, %ebp
	testl	%eax, %eax
	jne	.L99
	movslq	(%rbx), %rsi
	leaq	192(%rsp), %rdi
	call	cudaMalloc@PLT
	movl	$441, %ecx
	movl	%eax, %ebp
	testl	%eax, %eax
	jne	.L99
	movslq	(%rbx), %rsi
	leaq	200(%rsp), %rdi
	call	cudaMalloc@PLT
	movl	$442, %ecx
	movl	%eax, %ebp
	testl	%eax, %eax
	jne	.L99
	movslq	4(%rbx), %rsi
	leaq	208(%rsp), %rdi
	call	cudaMalloc@PLT
	movl	$443, %ecx
	movl	%eax, %ebp
	testl	%eax, %eax
	jne	.L99
	movslq	4(%rbx), %rsi
	leaq	216(%rsp), %rdi
	call	cudaMalloc@PLT
	movl	$444, %ecx
	movl	%eax, %ebp
	testl	%eax, %eax
	jne	.L99
	movslq	4(%rbx), %rsi
	leaq	224(%rsp), %rdi
	call	cudaMalloc@PLT
	movl	$445, %ecx
	movl	%eax, %ebp
	testl	%eax, %eax
	jne	.L99
	movslq	8(%rbx), %rsi
	leaq	232(%rsp), %rdi
	call	cudaMalloc@PLT
	movl	$446, %ecx
	movl	%eax, %ebp
	testl	%eax, %eax
	jne	.L99
	movslq	12(%rbx), %rsi
	leaq	240(%rsp), %rdi
	call	cudaMalloc@PLT
	movl	$447, %ecx
	movl	%eax, %ebp
	testl	%eax, %eax
	jne	.L99
	movslq	16(%rbx), %rsi
	leaq	256(%rsp), %rdi
	call	cudaMalloc@PLT
	movl	$448, %ecx
	movl	%eax, %ebp
	testl	%eax, %eax
	jne	.L99
	leaq	248(%rsp), %rdi
	movl	$1419680000, %esi
	call	cudaMalloc@PLT
	movl	$449, %ecx
	movl	%eax, %ebp
	testl	%eax, %eax
	jne	.L99
	leaq	264(%rsp), %rdi
	movl	$70984, %esi
	call	cudaMalloc@PLT
	movl	$450, %ecx
	movl	%eax, %ebp
	testl	%eax, %eax
	jne	.L99
	movq	264(%rsp), %rdi
	movl	$70984, %edx
	xorl	%esi, %esi
	call	cudaMemset@PLT
	movl	$453, %ecx
	movl	%eax, %ebp
	testl	%eax, %eax
	jne	.L99
	movq	248(%rsp), %rdi
	movl	$1419680000, %edx
	xorl	%esi, %esi
	call	cudaMemset@PLT
	movl	$454, %ecx
	movl	%eax, %ebp
	testl	%eax, %eax
	jne	.L99
	movslq	(%rbx), %rdx
	movq	152(%rsp), %rdi
	movl	$1, %ecx
	movq	%r15, %rsi
	call	cudaMemcpy@PLT
	movl	$456, %ecx
	movl	%eax, %ebp
	testl	%eax, %eax
	jne	.L99
	movslq	(%rbx), %rdx
	movq	160(%rsp), %rdi
	movl	$1, %ecx
	movq	%r14, %rsi
	call	cudaMemcpy@PLT
	movl	$457, %ecx
	movl	%eax, %ebp
	testl	%eax, %eax
	jne	.L99
	movslq	(%rbx), %rdx
	movq	168(%rsp), %rdi
	movl	$1, %ecx
	movq	%r13, %rsi
	call	cudaMemcpy@PLT
	movl	$458, %ecx
	movl	%eax, %ebp
	testl	%eax, %eax
	jne	.L99
	movslq	(%rbx), %rdx
	movq	176(%rsp), %rdi
	movl	$1, %ecx
	movq	%r12, %rsi
	call	cudaMemcpy@PLT
	movl	$459, %ecx
	movl	%eax, %ebp
	testl	%eax, %eax
	jne	.L99
	movslq	(%rbx), %rdx
	movq	(%rsp), %rsi
	movl	$1, %ecx
	movq	184(%rsp), %rdi
	call	cudaMemcpy@PLT
	movl	$460, %ecx
	movl	%eax, %ebp
	testl	%eax, %eax
	jne	.L99
	movslq	(%rbx), %rdx
	movq	8(%rsp), %rsi
	movl	$1, %ecx
	movq	192(%rsp), %rdi
	call	cudaMemcpy@PLT
	movl	$461, %ecx
	movl	%eax, %ebp
	testl	%eax, %eax
	jne	.L99
	movslq	(%rbx), %rdx
	movq	16(%rsp), %rsi
	movl	$1, %ecx
	movq	200(%rsp), %rdi
	call	cudaMemcpy@PLT
	movl	$462, %ecx
	movl	%eax, %ebp
	testl	%eax, %eax
	jne	.L99
	movslq	4(%rbx), %rdx
	movq	24(%rsp), %rsi
	movl	$1, %ecx
	movq	208(%rsp), %rdi
	call	cudaMemcpy@PLT
	movl	$463, %ecx
	movl	%eax, %ebp
	testl	%eax, %eax
	jne	.L99
	movslq	4(%rbx), %rdx
	movq	32(%rsp), %rsi
	movl	$1, %ecx
	movq	216(%rsp), %rdi
	call	cudaMemcpy@PLT
	movl	$464, %ecx
	movl	%eax, %ebp
	testl	%eax, %eax
	jne	.L99
	movslq	4(%rbx), %rdx
	movq	40(%rsp), %rsi
	movl	$1, %ecx
	movq	224(%rsp), %rdi
	call	cudaMemcpy@PLT
	movl	$465, %ecx
	movl	%eax, %ebp
	testl	%eax, %eax
	jne	.L99
	movslq	8(%rbx), %rdx
	movq	48(%rsp), %rsi
	movl	$1, %ecx
	movq	232(%rsp), %rdi
	call	cudaMemcpy@PLT
	movl	$466, %ecx
	movl	%eax, %ebp
	testl	%eax, %eax
	jne	.L99
	movslq	12(%rbx), %rdx
	movq	56(%rsp), %rsi
	movl	$1, %ecx
	movq	240(%rsp), %rdi
	call	cudaMemcpy@PLT
	movl	$467, %ecx
	movl	%eax, %ebp
	testl	%eax, %eax
	jne	.L99
	movslq	16(%rbx), %rdx
	movq	64(%rsp), %rsi
	movl	$1, %ecx
	movq	256(%rsp), %rdi
	call	cudaMemcpy@PLT
	movl	$468, %ecx
	movl	%eax, %ebp
	testl	%eax, %eax
	jne	.L99
	movq	144(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	144(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	xorl	%edi, %edi
	call	cudaSetDevice@PLT
	movl	$474, %ecx
	movl	%eax, %ebp
	testl	%eax, %eax
	jne	.L99
	movl	$4194305, %eax
	movq	120(%rsp), %rdi
	xorl	%esi, %esi
	movl	$1, 280(%rsp)
	movl	$1, 292(%rsp)
	salq	$10, %rax
	movq	%rax, 272(%rsp)
	subq	$1006, %rax
	movq	%rax, 284(%rsp)
	call	cudaEventRecord@PLT
	movl	280(%rsp), %ecx
	xorl	%r9d, %r9d
	movq	272(%rsp), %rdx
	movq	284(%rsp), %rdi
	movl	292(%rsp), %esi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L87
	pushq	%rax
	.cfi_def_cfa_offset 376
	movslq	(%rbx), %rax
	shrq	$3, %rax
	pushq	%rax
	.cfi_def_cfa_offset 384
	pushq	280(%rsp)
	.cfi_def_cfa_offset 392
	pushq	272(%rsp)
	.cfi_def_cfa_offset 400
	pushq	288(%rsp)
	.cfi_def_cfa_offset 408
	pushq	280(%rsp)
	.cfi_def_cfa_offset 416
	pushq	280(%rsp)
	.cfi_def_cfa_offset 424
	pushq	$17746
	.cfi_def_cfa_offset 432
	pushq	264(%rsp)
	.cfi_def_cfa_offset 440
	pushq	264(%rsp)
	.cfi_def_cfa_offset 448
	pushq	264(%rsp)
	.cfi_def_cfa_offset 456
	pushq	312(%rsp)
	.cfi_def_cfa_offset 464
	movq	312(%rsp), %r9
	movq	304(%rsp), %r8
	movq	272(%rsp), %rcx
	movq	264(%rsp), %rdx
	movq	256(%rsp), %rsi
	movq	248(%rsp), %rdi
	call	_Z75__device_stub__Z24step_calculate_every_pmtPdS_S_S_S_S_S_S_S_S_iS_S_PiS_S0_iPdS_S_S_S_S_S_S_S_S_iS_S_PiS_S0_i
	addq	$96, %rsp
	.cfi_def_cfa_offset 368
.L87:
	movq	128(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	128(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	72(%rsp), %rdi
	movl	$2, %ecx
	movq	248(%rsp), %rsi
	movl	$1419680000, %edx
	call	cudaMemcpy@PLT
	movl	$499, %ecx
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L101
	movq	232(%rsp), %rdi
	call	cudaFree@PLT
	movl	$506, %ecx
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L101
	movq	240(%rsp), %rdi
	call	cudaFree@PLT
	movl	$507, %ecx
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L101
	movq	208(%rsp), %rdi
	call	cudaFree@PLT
	movl	$508, %ecx
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L101
	movq	216(%rsp), %rdi
	call	cudaFree@PLT
	movl	$509, %ecx
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L101
	movq	224(%rsp), %rdi
	call	cudaFree@PLT
	movl	$510, %ecx
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L101
	movq	256(%rsp), %rdi
	call	cudaFree@PLT
	movl	$511, %ecx
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L101
	movq	248(%rsp), %rdi
	call	cudaFree@PLT
	movl	$512, %ecx
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L101
	movq	112(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	112(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	144(%rsp), %rdx
	leaq	100(%rsp), %rdi
	movq	136(%rsp), %rsi
	call	cudaEventElapsedTime@PLT
	movq	120(%rsp), %rsi
	leaq	96(%rsp), %rdi
	movq	128(%rsp), %rdx
	call	cudaEventElapsedTime@PLT
	movq	112(%rsp), %rdx
	movq	104(%rsp), %rsi
	leaq	92(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	movq	120(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	128(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	136(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	144(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	104(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	112(%rsp), %rdi
	call	cudaEventDestroy@PLT
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	92(%rsp), %xmm0
	call	__printf_chk@PLT
	movl	$2, %edi
	movb	$1, %al
	leaq	.LC4(%rip), %rsi
	cvtss2sd	96(%rsp), %xmm0
	call	__printf_chk@PLT
	leaq	.LC5(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	100(%rsp), %xmm0
	call	__printf_chk@PLT
	movl	$2, %edi
	movb	$1, %al
	movss	92(%rsp), %xmm0
	subss	100(%rsp), %xmm0
	leaq	.LC6(%rip), %rsi
	subss	96(%rsp), %xmm0
	cvtss2sd	%xmm0, %xmm0
	call	__printf_chk@PLT
	call	cudaDeviceReset@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	je	.L96
	movl	$532, %ecx
.L101:
	leaq	.LC0(%rip), %rdx
	leaq	.LC1(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	%ebx, %edi
	call	cudaGetErrorString@PLT
	movl	%ebx, %edx
	movq	%rax, %rcx
	jmp	.L100
.L96:
	movss	92(%rsp), %xmm0
	movq	296(%rsp), %rax
	subq	%fs:40, %rax
	je	.L97
	call	__stack_chk_fail@PLT
.L97:
	addq	$312, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2261:
	.size	GPU_Sampling_wrapper, .-GPU_Sampling_wrapper
	.section	.rodata.str1.1
.LC7:
	.string	"_Z24step_calculate_every_pmtPdS_S_S_S_S_S_S_S_S_iS_S_PiS_S0_i"
.LC8:
	.string	"_Z13pmt_calculateddddPdS_S_dddiS_S_PiS_S0_i"
.LC9:
	.string	"precalc_xorwow_matrix"
.LC10:
	.string	"precalc_xorwow_offset_matrix"
.LC11:
	.string	"mrg32k3aM1"
.LC12:
	.string	"mrg32k3aM2"
.LC13:
	.string	"mrg32k3aM1SubSeq"
.LC14:
	.string	"mrg32k3aM2SubSeq"
.LC15:
	.string	"mrg32k3aM1Seq"
.LC16:
	.string	"mrg32k3aM2Seq"
.LC17:
	.string	"__cr_lgamma_table"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2291:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC7(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z24step_calculate_every_pmtPdS_S_S_S_S_S_S_S_S_iS_S_PiS_S0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC8(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z13pmt_calculateddddPdS_S_dddiS_S_PiS_S0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC9(%rip), %rdx
	movl	$102400, %r9d
	leaq	_ZL21precalc_xorwow_matrix(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC10(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$102400, %r9d
	leaq	_ZL28precalc_xorwow_offset_matrix(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC11(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2304, %r9d
	leaq	_ZL10mrg32k3aM1(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC12(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2304, %r9d
	leaq	_ZL10mrg32k3aM2(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC13(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2016, %r9d
	leaq	_ZL16mrg32k3aM1SubSeq(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r11
	.cfi_def_cfa_offset 24
	popq	%rax
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC14(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2016, %r9d
	leaq	_ZL16mrg32k3aM2SubSeq(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC15(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2304, %r9d
	leaq	_ZL13mrg32k3aM1Seq(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC16(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2304, %r9d
	leaq	_ZL13mrg32k3aM2Seq(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$1
	.cfi_def_cfa_offset 32
	leaq	.LC17(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movl	$72, %r9d
	movq	%rdx, %rcx
	leaq	_ZL17__cr_lgamma_table(%rip), %rsi
	call	__cudaRegisterVar@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2291:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.local	_ZL17__cr_lgamma_table
	.comm	_ZL17__cr_lgamma_table,72,32
	.local	_ZL13mrg32k3aM2Seq
	.comm	_ZL13mrg32k3aM2Seq,2304,32
	.local	_ZL13mrg32k3aM1Seq
	.comm	_ZL13mrg32k3aM1Seq,2304,32
	.local	_ZL16mrg32k3aM2SubSeq
	.comm	_ZL16mrg32k3aM2SubSeq,2016,32
	.local	_ZL16mrg32k3aM1SubSeq
	.comm	_ZL16mrg32k3aM1SubSeq,2016,32
	.local	_ZL10mrg32k3aM2
	.comm	_ZL10mrg32k3aM2,2304,32
	.local	_ZL10mrg32k3aM1
	.comm	_ZL10mrg32k3aM1,2304,32
	.local	_ZL28precalc_xorwow_offset_matrix
	.comm	_ZL28precalc_xorwow_offset_matrix,102400,32
	.local	_ZL21precalc_xorwow_matrix
	.comm	_ZL21precalc_xorwow_matrix,102400,32
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

/**
* Author:易培淮
* Mail:yiph@ihep.ac.cn
* Function:Accelerate simulation with Single GPU
* 2018/11/27
*/

#include <hip/hip_runtime.h>
#include <hip/hip_runtime_api.h>
#include <hiprand/hiprand.h>
#include <hiprand/hiprand_kernel.h>
#include <stdio.h>
#include <hip/hip_math_constants.h>
#include <assert.h>

typedef struct res_arr
{
    double *arr;
    int *pmt_list;
    int index;
    int id;
    int max;
} Res_Arr;


__device__ double generateRandom(hiprandState *state);
__device__ void generateRandomInit(hiprandState *state,int seed);
__device__ int sampling(hiprandState *state,double *histo,int max,int id);
__device__ int binarySearch(double *histo,double target,int max,int id);
__device__ double calculateAngle(double x,double y,double z,double a,double b,double c);
__device__ void generateHits(double r,double theta, double ratio,double start_time,\
    double *hittime_histo,double *npe,hiprandState *state,Res_Arr *p_r_arr);
__device__ int get_hittime(double r, double theta, int mode, double *hittime_histo, hiprandState *state);
__device__ int get_hittime_bin(int binx, int biny, int mode, double *hittime_histo, hiprandState *state);
__device__ int get_hittime_all(int binx, int biny,double *hittime_histo, hiprandState *state);
__device__ int get_bin_x(double r);
__device__ int get_bin_y(double theta);
__device__ int r_findBin(double r);
__device__ int get_npe(double r,double theta,double *npe,hiprandState *state);
__device__ int r3_findBin(double r3);
__device__ int theta_findBin(double theta);
__device__ int get_npe_num(int binx,int biny,double *npe,hiprandState *state);
__device__ int generateRandomInt(hiprandState *state,int begin,int end);

__global__ void pmt_calculate(double r,double pos_x,double pos_y,double pos_z,\
    double *pmt_x,double *pmt_y,double *pmt_z,double intPart,double fractionPart,\
    double start_time,int numElements,double *hittime_histo,double *npe,int *seed,\
    double *result,int *pmt_res_list,int size);
__device__ void calculate_by_step(double r,double pos_x,double pos_y,double pos_z,\
    double pmt_x,double pmt_y,double pmt_z,double intPart,double fractionPart,\
    double start_time,double *hittime_histo,double *npe,hiprandState *state,Res_Arr *p_pmt_arr);
__global__ void step_calculate_every_pmt(double *r,double *pos_x,double *pos_y,\
    double *pos_z,double *pmt_x,double *pmt_y,double *pmt_z,double *intPart,\
    double *fractionPart,double *start_time, int numElements,double *hittime_histo,\
    double *npe,int *seed,double *result,int *pmt_res_list,int size);

__device__ void append_res_arr(Res_Arr *p, double val);
__device__ void init_res_arr(Res_Arr *p,double *result,int *pmt_res_list,int pmtid,int size);

// float CDF_Sampling_Wrapping(double *h_pmt,double *h_hit,double *h_result, int *seed,int total_num, int nBytes,int max_n,int max_time);

#define CHECK(call) \
{\
    const hipError_t error = call;\
    if (error != hipSuccess)\
    {\
        printf("Error:%s:%d, ", __FILE__, __LINE__);\
        printf("code:%d, reason: %s\n", error, hipGetErrorString(error));\
        exit(1);\
    }\
}
#define pmt_num 17746
#define pmt_mem 10000
#define HIP_PI_F 3.141592654f



__global__ void
pmt_calculate(double r,double pos_x,double pos_y,double pos_z,double *pmt_x,double *pmt_y,\
    double *pmt_z,double intPart,double fractionPart,double start_time,int numElements,\
    double *hittime_histo,double *npe,int *seed,double *result,int *pmt_res_list,int size)
{
    int id = blockIdx.x*blockDim.x+threadIdx.x;   
    //numElements = pmt numbers
    if (id < numElements){
        hiprandState state;
        generateRandomInit(&state, seed[id]);
        Res_Arr pmt_arr;
        init_res_arr(&pmt_arr,result,pmt_res_list,id,size);
        double theta = calculateAngle(pmt_x[id],pmt_y[id],pmt_z[id],pos_x,pos_y,pos_z);
        // printf("theta = %lf\n",theta);
        for(int j = 0; j < intPart; ++j){
            //r 单位 米
        	generateHits(r,theta,1,start_time,hittime_histo,npe,&state,&pmt_arr);
        }
        generateHits(r,theta,fractionPart,start_time,hittime_histo,npe,&state,&pmt_arr);
    }
}


__global__ void
step_calculate_every_pmt(double *r,double *pos_x,double *pos_y,double *pos_z,double *pmt_x,\
    double *pmt_y,double *pmt_z,double *intPart,double *fractionPart,double *start_time, \
    int numElements,double *hittime_histo,double *npe,int *seed,double *result, \
    int *pmt_res_list,int size)
{
    int id = blockIdx.x*blockDim.x+threadIdx.x;   
    //numElements = pmt numbers
    if (id < numElements){
        hiprandState state;
        generateRandomInit(&state,seed[id]);
        Res_Arr pmt_arr;
        init_res_arr(&pmt_arr,result,pmt_res_list,id,size);
        for(int i=0;i<size;i++)
        {
            int index = i*numElements+id;
            calculate_by_step(r[index],pos_x[index],pos_y[index],pos_z[index],pmt_x[id],pmt_y[id],\
                pmt_z[id],intPart[index],fractionPart[index],start_time[index],hittime_histo,\
                npe,&state,&pmt_arr);
        }
    }
}

__device__ void
calculate_by_step(double r,double pos_x,double pos_y,double pos_z,double pmt_x,double pmt_y,\
    double pmt_z,double intPart,double fractionPart,double start_time,double *hittime_histo,\
    double *npe,hiprandState *state,Res_Arr *p_pmt_arr)
{
    double theta = calculateAngle(pmt_x,pmt_y,pmt_z,pos_x,pos_y,pos_z);
    for(int j = 0;j<intPart; ++j){
        //r(m)
        generateHits(r,theta,1,start_time,hittime_histo,npe,state,p_pmt_arr);
    }
    generateHits(r,theta,fractionPart,start_time,hittime_histo,npe,state,p_pmt_arr);
}



__device__ double
calculateAngle(double x,double y,double z,double a,double b,double c)
{
    //  printf("x=%lf,y=%lf,z=%lf,a=%lf,b=%lf,c=%lf\n",x,y,z,a,b,c);
    double result = 0;
    if (a == 0 and b == 0 and c == 0){
        return result;
    }
    else{
        result = acos((a*x+b*y+c*z)/(norm3d(x,y,z)*norm3d(a,b,c)));
        //printf("result theta = %lf",result);
        return result;
    }
}

__device__ void 
generateHits(double r,double theta, double ratio,double start_time,double *hittime_histo,\
    double *npe,hiprandState *state,Res_Arr *p_r_arr)
{
    
    int npe_histo_id = get_npe(r,theta,npe,state);
    if (npe_histo_id>0)
    {
        // printf("npe_histo_id = %d,r = %lf,theta = %lf\n",npe_histo_id,r,theta);
        for (int hitj = 0; hitj < npe_histo_id; ++hitj) 
        {
            // printf("ratio=%lf\n",ratio);
            // skip the photon according to the energy deposit
            if (ratio<1 and generateRandom(state)>ratio) 
            {
                continue;
            }
            double hittime_single = start_time;
            // (m_flag_time) 
            hittime_single += (double)get_hittime(r, theta, 0, hittime_histo, state);
            printf("hittime = %lf\n",hittime_single);
            // generated hit
            // (m_flag_savehits) 
            append_res_arr(p_r_arr,hittime_single);
            // save_hits(pmtid, hittime_single,result);
        }
    }
}

 // __device__ void 
 // save_hits(Res_Arr *p,double val){
 // 	append_res_arr(p,val);
 // }

__device__ int
get_hittime(double r, double theta, int mode, double *hittime_histo, hiprandState *state) {
    int binx = get_bin_x(r);
    int biny = get_bin_y(theta);
    
    return get_hittime_bin(binx, biny, mode, hittime_histo, state);
}

__device__ int 
get_hittime_bin(int binx, int biny, int mode, double *hittime_histo, hiprandState *state) {
    // hit time = tmean + tres
    int hittime_single = 0;
    if (mode == 0) {
        hittime_single = get_hittime_all(binx,biny,hittime_histo,state);
    }
    return hittime_single;
}

__device__ int 
get_hittime_all(int binx, int biny,double *hittime_histo, hiprandState *state) {
    // TH1F* h = get_hist(binx, biny);
    const int xbinnum = 200;
    const int ybinnum = 180;
    if (binx<1) { binx = 1; }
    else if (binx > xbinnum) { binx = xbinnum;}
    if (biny<1) { biny = 1; }
    else if (biny > ybinnum) { biny = ybinnum;}
    int idx = (binx-1)*ybinnum+(biny-1);
    int hittime_single = sampling(state,hittime_histo,3000,idx);
    return hittime_single;
}


__device__ int 
get_bin_x(double r) 
{
    int binx = 1;
    int xmode = 2;
    if (xmode == 2) //KR
    {
        binx = r_findBin(r);
    } 
    return binx;
}

__device__ int 
get_bin_y(double theta) {
    int biny = 1;
    int ymode = 4;
    if (ymode == 4) {
        biny = theta_findBin(theta);
    }
    return biny;
}

__device__ int 
r_findBin(double r)
{
    const int binnum = 200;
    const double begin = 0;
    const double end = 17.7;
    if(r==0){
        return 1;
    }
    else{
        return (int)ceil((r-begin)/(end-begin)*binnum); 
    }
}

__device__ int 
get_npe(double r,double theta,double *npe,hiprandState *state)
{
    int binx = r3_findBin(pow(r,3));
    int biny = theta_findBin(theta);
    return get_npe_num(binx,biny,npe,state);
}

__device__ int 
r3_findBin(double r3)
{
    const int binnum = 100;
    const double begin = 0;
    const double end = 5600;
    if(r3 == 0){
        return 1;
    }
    else{
        return (int)ceil((r3-begin)/(end-begin)*binnum);
    }
}


__device__ int 
theta_findBin(double theta)
{
    const int binnum = 180;
    const double begin = 0; 
    const double end = 180.01*HIP_PI_F/180.0;
    if(theta == 0){
        
        return 1;
    }
    else{
        return (int)ceil((theta-begin)/(end-begin)*binnum);
    }
}

__device__ int 
get_npe_num(int binx,int biny,double *npe,hiprandState *state)
{
    int npe_from_single = 0;
    if (1 <= binx and binx <= 100 and 1 <= biny and biny <= 180) {
        npe_from_single = sampling(state,npe,33,(binx-1)*180+(biny-1));	
    } else if (binx==1 and (biny<1 or biny>180)) {
        biny = generateRandomInt(state,1,180);
        npe_from_single = sampling(state,npe,33,(binx-1)*180+(biny-1));	
    } else if (binx>1 and (biny<1 or biny>180)) {
        if (biny>180) { biny = 180; }
        else if (biny<1){ biny = 1; }
        npe_from_single = sampling(state,npe,33,(binx-1)*180+(biny-1));
    } else {
        static long warning = 0;
        ++warning;
        if (warning < 10) {
            printf("npe lost: %d/%d\n", binx,biny);
        } else if (warning == 10) {
            printf("too many npe lost complains.\n");
        }
    }
    return npe_from_single;
}

__device__ double
generateRandom(hiprandState *state)
{
    // int id = blockIdx.x*blockDim.x+threadIdx.x;   
    double result = abs(hiprand_uniform_double(state));
    return result;
}

__device__ int
generateRandomInt(hiprandState *state,int begin,int end)
{
    int result = begin+int(ceil(abs(hiprand_uniform_double(state))*(end-begin)));
    return result;
}

__device__ void
generateRandomInit(hiprandState *state,int seed)
{
    // printf("seed = %d\n",seed);
    // int id = blockIdx.x*blockDim.x+threadIdx.x;   
    hiprand_init(seed, 0, 0, state);
}

__device__ int 
sampling(hiprandState *state,double *histo,int max,int id)
{
    double prob; 
    prob = generateRandom(state);
    return binarySearch(histo,prob,max,id);
}

__device__ int
binarySearch(double *histo,double target,int max,int id)
{

    // int result_for = -1;
    // int result_bin = 0;
    // for (int i=0;i<max;i++){
    //     if (target<=histo[id*max+i]){
    //         // printf("[debug]histo = %lf,%lf\n",histo[id*max],histo[id*max+i]);
    //         // printf("[debug]target=%lf,max=%d,id =%d,i=%d\n",target,max,id,i);
    //         return i;
    //     }
    // }
    // return -1;
 
    int start = 0;
    int end = max-1;
    int mid;
    while(start+1<end){
        mid = start+(end-start)/2;
        if (histo[id*max+mid]==target){
            end = mid;
        } 
        else if (histo[id*max+mid] < target){
            start = mid;
        }
        else if (histo[id*max+mid] > target){
            end = mid;
        }
    }
    if (target <= histo[id*max+start]){
        return start;
    }
    else if (histo[id*max+start] < target){
        return end;
    }
    
    return -1;
}

__device__ void
append_res_arr(Res_Arr *p, double val)//追加，可能成功，可能失败
{
    p->arr[p->index+p->pmt_list[p->id]] = val;
    p->pmt_list[p->id] += 1;
    assert(p->pmt_list[p->id]<=p->max);
    
    return;

}

__device__ void
init_res_arr(Res_Arr *p,double *result,int *pmt_res_list,int pmtid,int size){
    p->arr = result;//存储的内存空间
    p->pmt_list = pmt_res_list;//存储每个pmt内存空间使用量
    p->index = pmtid*pmt_mem;//存储该pmt在数组中的起始存取点
    p->id = pmtid;
    p->max = pmt_mem;
    // p->begin = begin;
    // p->len = len;
    return;
}

extern "C"
{
    float GPU_Sampling_wrapper(double *r,double *pos_x,double *pos_y,double *pos_z, \
        double *intPart, double *fractionPart,double *start_time,double *pmt_x,double *pmt_y,\
        double *pmt_z,double *data_hit,double *data_npe,int *seed,int *size,double* h_result)
    {
        //GPU计时，设置开始和结束事件
        hipEvent_t start, stop;
        hipEvent_t gpu_start,gpu_stop,data_start,data_stop;
        CHECK(hipEventCreate(&start));
        CHECK(hipEventCreate(&stop));
        hipEventCreate(&gpu_start);
        hipEventCreate(&gpu_stop);
        hipEventCreate(&data_start);
        hipEventCreate(&data_stop);
        hipEventRecord(start);
        hipEventRecord(data_start);
        //申请GPU内存
        double *d_r, *d_pos_x,*d_pos_y,*d_pos_z,*d_intPart,*d_fractionPart,*d_start_time;
        double *d_pmt_x,*d_pmt_y,*d_pmt_z,*d_data_hit,*d_data_npe;
        double *d_result;
        int *d_seed,*d_pmt_res_list;
        CHECK(hipMalloc((double**)&d_r,size[0]));
        CHECK(hipMalloc((double**)&d_pos_x,size[0]));
        CHECK(hipMalloc((double**)&d_pos_y,size[0]));
        CHECK(hipMalloc((double**)&d_pos_z,size[0]));
        CHECK(hipMalloc((double**)&d_intPart,size[0]));
        CHECK(hipMalloc((double**)&d_fractionPart,size[0]));
        CHECK(hipMalloc((double**)&d_start_time,size[0]));
        CHECK(hipMalloc((double**)&d_pmt_x,size[1]));
        CHECK(hipMalloc((double**)&d_pmt_y,size[1]));
        CHECK(hipMalloc((double**)&d_pmt_z,size[1]));
        CHECK(hipMalloc((double**)&d_data_hit,size[2]));
        CHECK(hipMalloc((double**)&d_data_npe,size[3]));
        CHECK(hipMalloc((int**)&d_seed,size[4]));
        CHECK(hipMalloc((double**)&d_result,pmt_num*pmt_mem*sizeof(double)));
        CHECK(hipMalloc((int**)&d_pmt_res_list,pmt_num*sizeof(int)));

        //设置内存
        CHECK(hipMemset(d_pmt_res_list,0,pmt_num*sizeof(int)));
        CHECK(hipMemset(d_result,0,pmt_num*pmt_mem*sizeof(double)));
        //将CPU内存拷贝到GPU
        CHECK(hipMemcpy(d_r, r, size[0], hipMemcpyHostToDevice));
        CHECK(hipMemcpy(d_pos_x, pos_x, size[0], hipMemcpyHostToDevice));
        CHECK(hipMemcpy(d_pos_y, pos_y, size[0], hipMemcpyHostToDevice));
        CHECK(hipMemcpy(d_pos_z, pos_z, size[0], hipMemcpyHostToDevice));
        CHECK(hipMemcpy(d_intPart, intPart, size[0], hipMemcpyHostToDevice));
        CHECK(hipMemcpy(d_fractionPart, fractionPart, size[0], hipMemcpyHostToDevice));
        CHECK(hipMemcpy(d_start_time, start_time, size[0], hipMemcpyHostToDevice));
        CHECK(hipMemcpy(d_pmt_x, pmt_x, size[1], hipMemcpyHostToDevice));
        CHECK(hipMemcpy(d_pmt_y, pmt_y, size[1], hipMemcpyHostToDevice));
        CHECK(hipMemcpy(d_pmt_z, pmt_z, size[1], hipMemcpyHostToDevice));
        CHECK(hipMemcpy(d_data_hit, data_hit, size[2], hipMemcpyHostToDevice));
        CHECK(hipMemcpy(d_data_npe, data_npe, size[3], hipMemcpyHostToDevice));
        CHECK(hipMemcpy(d_seed, seed, size[4], hipMemcpyHostToDevice));
        
        hipEventRecord(data_stop);
        hipEventSynchronize(data_stop);
        // printf("[GPU]GPU数据拷贝完成\n");
        //设置使用编号为0的GPU
        CHECK(hipSetDevice(0));
        // //设置线程数量
        int threadPerBlock= 1024;
        int blocksPerGrid = 18;
        dim3 block(threadPerBlock);
        //设置块数量
        dim3 grid(blocksPerGrid);//blocksPerGrid
        //调用核函数
        hipEventRecord(gpu_start);
        // for(int i = 0;i<size[0]/8;i++) {
        //     CHECK(cudaDeviceSynchronize());
        //     // printf("[GPU]核函数开始运行[%d]\n",i);
        //     pmt_calculate<<<grid, block>>>(r[i],pos_x[i],pos_y[i],pos_z[i],d_pmt_x,d_pmt_y,\
        //         d_pmt_z,intPart[i],fractionPart[i],start_time[i],17746,d_data_hit,d_data_npe,\
        //         (int*)(d_seed+i*pmt_num),d_result,d_pmt_res_list,(int)size[0]/8);
        // }
        step_calculate_every_pmt<<<grid, block>>>(d_r,d_pos_x,d_pos_y,d_pos_z,d_pmt_x,d_pmt_y,\
            d_pmt_z,d_intPart,d_fractionPart,d_start_time,pmt_num,d_data_hit,d_data_npe,d_seed,\
            d_result,d_pmt_res_list,(int)size[0]/sizeof(double));
        hipEventRecord(gpu_stop);
        hipEventSynchronize(gpu_stop);
        
        // printf("[GPU]核函数运行完成\n");
        // CHECK(cudaDeviceSynchronize());

        CHECK(hipMemcpy(h_result, d_result, pmt_num*pmt_mem*sizeof(double), hipMemcpyDeviceToHost));
        
        // printf("threadPerBlock:%d\n",threadPerBlock);
        // printf("blocksPerGrid；%d\n",blocksPerGrid);
        

        //释放GPU内存
        CHECK(hipFree(d_data_hit));
        CHECK(hipFree(d_data_npe));
        CHECK(hipFree(d_pmt_x));
        CHECK(hipFree(d_pmt_y));
        CHECK(hipFree(d_pmt_z));
        CHECK(hipFree(d_seed));
        CHECK(hipFree(d_result));
        // printf("[GPU]GPU运行完成\n");

        hipEventRecord(stop);
        hipEventSynchronize(stop);
        float total_time,gputime,datatime;
        //计算用时，精度0.5us
        hipEventElapsedTime(&datatime, data_start, data_stop);
        hipEventElapsedTime(&gputime, gpu_start, gpu_stop);
        hipEventElapsedTime(&total_time, start, stop);
        hipEventDestroy(gpu_start);
        hipEventDestroy(gpu_stop);
        hipEventDestroy(data_start);
        hipEventDestroy(data_stop);
        hipEventDestroy(start);
        hipEventDestroy(stop);        
        printf("total use time %f ms\n", total_time);
        printf("gpu use time %f ms\n",gputime);
        printf("data use time %f ms\n",datatime);
        printf("data transport back use time %f ms\n",total_time - datatime - gputime);
        CHECK(hipDeviceReset());        
        return total_time;
        // return 0.0;
    }
}
	.text
	.file	"check.hip"
	.globl	_Z28__device_stub__pmt_calculateddddPdS_S_dddiS_S_PiS_S0_i # -- Begin function _Z28__device_stub__pmt_calculateddddPdS_S_dddiS_S_PiS_S0_i
	.type	_Z28__device_stub__pmt_calculateddddPdS_S_dddiS_S_PiS_S0_i,@function
_Z28__device_stub__pmt_calculateddddPdS_S_dddiS_S_PiS_S0_i: # @_Z28__device_stub__pmt_calculateddddPdS_S_dddiS_S_PiS_S0_i
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$296, %rsp                      # imm = 0x128
	.cfi_def_cfa_offset 352
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	leaq	120(%rsp), %rax
	movsd	%xmm0, (%rax)
	leaq	112(%rsp), %r10
	movsd	%xmm1, (%r10)
	leaq	104(%rsp), %r11
	movsd	%xmm2, (%r11)
	leaq	96(%rsp), %r14
	movsd	%xmm3, (%r14)
	leaq	88(%rsp), %r15
	movq	%rdi, (%r15)
	leaq	80(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	72(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	64(%rsp), %rdx
	movsd	%xmm4, (%rdx)
	leaq	56(%rsp), %r12
	movsd	%xmm5, (%r12)
	leaq	48(%rsp), %r13
	movsd	%xmm6, (%r13)
	leaq	12(%rsp), %rbp
	movl	%ecx, (%rbp)
	leaq	40(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	32(%rsp), %r8
	movq	%r9, (%r8)
	leaq	160(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%r10, 8(%rbx)
	movq	%r11, 16(%rbx)
	movq	%r14, 24(%rbx)
	movq	%r15, 32(%rbx)
	movq	%rdi, 40(%rbx)
	movq	%rsi, 48(%rbx)
	movq	%rdx, 56(%rbx)
	movq	%r12, 64(%rbx)
	movq	%r13, 72(%rbx)
	movq	%rbp, 80(%rbx)
	movq	%rcx, 88(%rbx)
	movq	%r8, 96(%rbx)
	leaq	352(%rsp), %rax
	movq	%rax, 104(%rbx)
	leaq	360(%rsp), %rax
	movq	%rax, 112(%rbx)
	leaq	368(%rsp), %rax
	movq	%rax, 120(%rbx)
	leaq	376(%rsp), %rax
	movq	%rax, 128(%rbx)
	leaq	144(%rsp), %r14
	leaq	128(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z13pmt_calculateddddPdS_S_dddiS_S_PiS_S0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$312, %rsp                      # imm = 0x138
	.cfi_adjust_cfa_offset -312
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z28__device_stub__pmt_calculateddddPdS_S_dddiS_S_PiS_S0_i, .Lfunc_end0-_Z28__device_stub__pmt_calculateddddPdS_S_dddiS_S_PiS_S0_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z39__device_stub__step_calculate_every_pmtPdS_S_S_S_S_S_S_S_S_iS_S_PiS_S0_i # -- Begin function _Z39__device_stub__step_calculate_every_pmtPdS_S_S_S_S_S_S_S_S_iS_S_PiS_S0_i
	.type	_Z39__device_stub__step_calculate_every_pmtPdS_S_S_S_S_S_S_S_S_iS_S_PiS_S0_i,@function
_Z39__device_stub__step_calculate_every_pmtPdS_S_S_S_S_S_S_S_S_iS_S_PiS_S0_i: # @_Z39__device_stub__step_calculate_every_pmtPdS_S_S_S_S_S_S_S_S_iS_S_PiS_S0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$240, %rsp
	.cfi_def_cfa_offset 288
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	16(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	288(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	296(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	304(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	312(%rsp), %rax
	movq	%rax, 72(%rbx)
	leaq	320(%rsp), %rax
	movq	%rax, 80(%rbx)
	leaq	328(%rsp), %rax
	movq	%rax, 88(%rbx)
	leaq	336(%rsp), %rax
	movq	%rax, 96(%rbx)
	leaq	344(%rsp), %rax
	movq	%rax, 104(%rbx)
	leaq	352(%rsp), %rax
	movq	%rax, 112(%rbx)
	leaq	360(%rsp), %rax
	movq	%rax, 120(%rbx)
	leaq	368(%rsp), %rax
	movq	%rax, 128(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z24step_calculate_every_pmtPdS_S_S_S_S_S_S_S_S_iS_S_PiS_S0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$256, %rsp                      # imm = 0x100
	.cfi_adjust_cfa_offset -256
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z39__device_stub__step_calculate_every_pmtPdS_S_S_S_S_S_S_S_S_iS_S_PiS_S0_i, .Lfunc_end1-_Z39__device_stub__step_calculate_every_pmtPdS_S_S_S_S_S_S_S_S_iS_S_PiS_S0_i
	.cfi_endproc
                                        # -- End function
	.globl	GPU_Sampling_wrapper            # -- Begin function GPU_Sampling_wrapper
	.type	GPU_Sampling_wrapper,@function
GPU_Sampling_wrapper:                   # @GPU_Sampling_wrapper
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$200, %rsp
	.cfi_def_cfa_offset 256
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, %r14
	movq	%r8, 184(%rsp)                  # 8-byte Spill
	movq	%rcx, %r15
	movq	%rdx, %r12
	movq	%rsi, %r13
	movq	%rdi, %rbp
	leaq	88(%rsp), %rdi
	callq	hipEventCreate
	testl	%eax, %eax
	jne	.LBB2_1
# %bb.3:
	movq	%r14, 176(%rsp)                 # 8-byte Spill
	leaq	24(%rsp), %rdi
	callq	hipEventCreate
	testl	%eax, %eax
	jne	.LBB2_4
# %bb.5:
	movq	312(%rsp), %r14
	leaq	80(%rsp), %rdi
	callq	hipEventCreate
	leaq	16(%rsp), %rdi
	callq	hipEventCreate
	leaq	168(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipEventCreate
	leaq	8(%rsp), %rdi
	callq	hipEventCreate
	movq	88(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	(%rbx), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movslq	(%r14), %rsi
	leaq	160(%rsp), %rdi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB2_6
# %bb.7:
	movslq	(%r14), %rsi
	leaq	152(%rsp), %rdi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB2_8
# %bb.9:
	movslq	(%r14), %rsi
	leaq	144(%rsp), %rdi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB2_10
# %bb.11:
	movslq	(%r14), %rsi
	leaq	136(%rsp), %rdi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB2_12
# %bb.13:
	movslq	(%r14), %rsi
	leaq	128(%rsp), %rdi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB2_14
# %bb.15:
	movslq	(%r14), %rsi
	leaq	120(%rsp), %rdi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB2_16
# %bb.17:
	movslq	(%r14), %rsi
	leaq	112(%rsp), %rdi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB2_18
# %bb.19:
	movslq	4(%r14), %rsi
	leaq	72(%rsp), %rdi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB2_20
# %bb.21:
	movslq	4(%r14), %rsi
	leaq	64(%rsp), %rdi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB2_22
# %bb.23:
	movslq	4(%r14), %rsi
	leaq	56(%rsp), %rdi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB2_24
# %bb.25:
	movslq	8(%r14), %rsi
	leaq	48(%rsp), %rdi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB2_26
# %bb.27:
	movslq	12(%r14), %rsi
	leaq	40(%rsp), %rdi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB2_28
# %bb.29:
	movslq	16(%r14), %rsi
	leaq	32(%rsp), %rdi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB2_30
# %bb.31:
	movq	%rsp, %rdi
	movl	$1419680000, %esi               # imm = 0x549E9900
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB2_32
# %bb.33:
	leaq	104(%rsp), %rdi
	movl	$70984, %esi                    # imm = 0x11548
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB2_34
# %bb.35:
	movq	104(%rsp), %rdi
	movl	$70984, %edx                    # imm = 0x11548
	xorl	%esi, %esi
	callq	hipMemset
	testl	%eax, %eax
	jne	.LBB2_36
# %bb.37:
	movq	(%rsp), %rdi
	movl	$1419680000, %edx               # imm = 0x549E9900
	xorl	%esi, %esi
	callq	hipMemset
	testl	%eax, %eax
	jne	.LBB2_38
# %bb.39:
	movq	160(%rsp), %rdi
	movslq	(%r14), %rdx
	movq	%rbp, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB2_40
# %bb.41:
	movq	152(%rsp), %rdi
	movslq	(%r14), %rdx
	movq	%r13, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB2_42
# %bb.43:
	movq	144(%rsp), %rdi
	movslq	(%r14), %rdx
	movq	%r12, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB2_44
# %bb.45:
	movq	136(%rsp), %rdi
	movslq	(%r14), %rdx
	movq	%r15, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB2_46
# %bb.47:
	movq	128(%rsp), %rdi
	movslq	(%r14), %rdx
	movq	184(%rsp), %rsi                 # 8-byte Reload
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB2_48
# %bb.49:
	movq	120(%rsp), %rdi
	movslq	(%r14), %rdx
	movq	176(%rsp), %rsi                 # 8-byte Reload
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB2_50
# %bb.51:
	movq	256(%rsp), %rsi
	movq	112(%rsp), %rdi
	movslq	(%r14), %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB2_52
# %bb.53:
	movq	264(%rsp), %rsi
	movq	72(%rsp), %rdi
	movslq	4(%r14), %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB2_54
# %bb.55:
	movq	272(%rsp), %rsi
	movq	64(%rsp), %rdi
	movslq	4(%r14), %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB2_56
# %bb.57:
	movq	280(%rsp), %rsi
	movq	56(%rsp), %rdi
	movslq	4(%r14), %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB2_58
# %bb.59:
	movq	288(%rsp), %rsi
	movq	48(%rsp), %rdi
	movslq	8(%r14), %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB2_60
# %bb.61:
	movq	296(%rsp), %rsi
	movq	40(%rsp), %rdi
	movslq	12(%r14), %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB2_62
# %bb.63:
	movq	304(%rsp), %rsi
	movq	32(%rsp), %rdi
	movslq	16(%r14), %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB2_64
# %bb.65:
	movq	8(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	8(%rsp), %rdi
	callq	hipEventSynchronize
	xorl	%edi, %edi
	callq	hipSetDevice
	testl	%eax, %eax
	jne	.LBB2_66
# %bb.67:
	movq	320(%rsp), %rbx
	movq	80(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movabsq	$4294967314, %rdi               # imm = 0x100000012
	leaq	1006(%rdi), %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_69
# %bb.68:
	movq	160(%rsp), %rdi
	movq	152(%rsp), %rsi
	movq	144(%rsp), %rdx
	movq	136(%rsp), %rcx
	movq	72(%rsp), %r8
	movq	64(%rsp), %r9
	movl	(%r14), %eax
	sarl	$3, %eax
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	120(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	24(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	64(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	80(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	96(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	$17746                          # imm = 0x4552
	.cfi_adjust_cfa_offset 8
	pushq	176(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	192(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	208(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	144(%rsp)
	.cfi_adjust_cfa_offset 8
	callq	_Z39__device_stub__step_calculate_every_pmtPdS_S_S_S_S_S_S_S_S_iS_S_PiS_S0_i
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
.LBB2_69:
	movq	16(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	16(%rsp), %rdi
	callq	hipEventSynchronize
	movq	(%rsp), %rsi
	movl	$1419680000, %edx               # imm = 0x549E9900
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB2_70
# %bb.71:
	movq	48(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB2_72
# %bb.73:
	movq	40(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB2_74
# %bb.75:
	movq	72(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB2_76
# %bb.77:
	movq	64(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB2_78
# %bb.79:
	movq	56(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB2_80
# %bb.81:
	movq	32(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB2_82
# %bb.83:
	movq	(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB2_84
# %bb.85:
	movq	24(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	24(%rsp), %rdi
	callq	hipEventSynchronize
	movq	168(%rsp), %rsi
	movq	8(%rsp), %rdx
	leaq	192(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipEventElapsedTime
	movq	80(%rsp), %rsi
	movq	16(%rsp), %rdx
	leaq	196(%rsp), %r14
	movq	%r14, %rdi
	callq	hipEventElapsedTime
	movq	88(%rsp), %rsi
	movq	24(%rsp), %rdx
	leaq	100(%rsp), %r15
	movq	%r15, %rdi
	callq	hipEventElapsedTime
	movq	80(%rsp), %rdi
	callq	hipEventDestroy
	movq	16(%rsp), %rdi
	callq	hipEventDestroy
	movq	168(%rsp), %rdi
	callq	hipEventDestroy
	movq	8(%rsp), %rdi
	callq	hipEventDestroy
	movq	88(%rsp), %rdi
	callq	hipEventDestroy
	movq	24(%rsp), %rdi
	callq	hipEventDestroy
	cvtss2sd	(%r15), %xmm0
	movl	$.L.str.3, %edi
	movb	$1, %al
	callq	printf
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r14), %xmm0
	movl	$.L.str.4, %edi
	movb	$1, %al
	callq	printf
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rbx), %xmm0
	movl	$.L.str.5, %edi
	movb	$1, %al
	callq	printf
	movss	(%r15), %xmm0                   # xmm0 = mem[0],zero,zero,zero
	subss	(%rbx), %xmm0
	subss	(%r14), %xmm0
	cvtss2sd	%xmm0, %xmm0
	movl	$.L.str.6, %edi
	movb	$1, %al
	callq	printf
	callq	hipDeviceReset
	testl	%eax, %eax
	jne	.LBB2_86
# %bb.87:
	movss	100(%rsp), %xmm0                # xmm0 = mem[0],zero,zero,zero
	addq	$200, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB2_1:
	.cfi_def_cfa_offset 256
	movl	%eax, %ebx
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	movl	$423, %edx                      # imm = 0x1A7
	jmp	.LBB2_2
.LBB2_4:
	movl	%eax, %ebx
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	movl	$424, %edx                      # imm = 0x1A8
	jmp	.LBB2_2
.LBB2_6:
	movl	%eax, %ebx
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	movl	$436, %edx                      # imm = 0x1B4
	jmp	.LBB2_2
.LBB2_8:
	movl	%eax, %ebx
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	movl	$437, %edx                      # imm = 0x1B5
	jmp	.LBB2_2
.LBB2_10:
	movl	%eax, %ebx
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	movl	$438, %edx                      # imm = 0x1B6
	jmp	.LBB2_2
.LBB2_12:
	movl	%eax, %ebx
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	movl	$439, %edx                      # imm = 0x1B7
	jmp	.LBB2_2
.LBB2_14:
	movl	%eax, %ebx
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	movl	$440, %edx                      # imm = 0x1B8
	jmp	.LBB2_2
.LBB2_16:
	movl	%eax, %ebx
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	movl	$441, %edx                      # imm = 0x1B9
	jmp	.LBB2_2
.LBB2_18:
	movl	%eax, %ebx
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	movl	$442, %edx                      # imm = 0x1BA
	jmp	.LBB2_2
.LBB2_20:
	movl	%eax, %ebx
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	movl	$443, %edx                      # imm = 0x1BB
	jmp	.LBB2_2
.LBB2_22:
	movl	%eax, %ebx
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	movl	$444, %edx                      # imm = 0x1BC
	jmp	.LBB2_2
.LBB2_24:
	movl	%eax, %ebx
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	movl	$445, %edx                      # imm = 0x1BD
	jmp	.LBB2_2
.LBB2_26:
	movl	%eax, %ebx
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	movl	$446, %edx                      # imm = 0x1BE
	jmp	.LBB2_2
.LBB2_28:
	movl	%eax, %ebx
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	movl	$447, %edx                      # imm = 0x1BF
	jmp	.LBB2_2
.LBB2_30:
	movl	%eax, %ebx
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	movl	$448, %edx                      # imm = 0x1C0
	jmp	.LBB2_2
.LBB2_32:
	movl	%eax, %ebx
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	movl	$449, %edx                      # imm = 0x1C1
	jmp	.LBB2_2
.LBB2_34:
	movl	%eax, %ebx
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	movl	$450, %edx                      # imm = 0x1C2
	jmp	.LBB2_2
.LBB2_36:
	movl	%eax, %ebx
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	movl	$453, %edx                      # imm = 0x1C5
	jmp	.LBB2_2
.LBB2_38:
	movl	%eax, %ebx
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	movl	$454, %edx                      # imm = 0x1C6
	jmp	.LBB2_2
.LBB2_40:
	movl	%eax, %ebx
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	movl	$456, %edx                      # imm = 0x1C8
	jmp	.LBB2_2
.LBB2_42:
	movl	%eax, %ebx
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	movl	$457, %edx                      # imm = 0x1C9
	jmp	.LBB2_2
.LBB2_44:
	movl	%eax, %ebx
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	movl	$458, %edx                      # imm = 0x1CA
	jmp	.LBB2_2
.LBB2_46:
	movl	%eax, %ebx
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	movl	$459, %edx                      # imm = 0x1CB
	jmp	.LBB2_2
.LBB2_48:
	movl	%eax, %ebx
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	movl	$460, %edx                      # imm = 0x1CC
	jmp	.LBB2_2
.LBB2_50:
	movl	%eax, %ebx
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	movl	$461, %edx                      # imm = 0x1CD
	jmp	.LBB2_2
.LBB2_52:
	movl	%eax, %ebx
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	movl	$462, %edx                      # imm = 0x1CE
	jmp	.LBB2_2
.LBB2_54:
	movl	%eax, %ebx
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	movl	$463, %edx                      # imm = 0x1CF
	jmp	.LBB2_2
.LBB2_56:
	movl	%eax, %ebx
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	movl	$464, %edx                      # imm = 0x1D0
	jmp	.LBB2_2
.LBB2_58:
	movl	%eax, %ebx
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	movl	$465, %edx                      # imm = 0x1D1
	jmp	.LBB2_2
.LBB2_60:
	movl	%eax, %ebx
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	movl	$466, %edx                      # imm = 0x1D2
	jmp	.LBB2_2
.LBB2_62:
	movl	%eax, %ebx
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	movl	$467, %edx                      # imm = 0x1D3
	jmp	.LBB2_2
.LBB2_64:
	movl	%eax, %ebx
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	movl	$468, %edx                      # imm = 0x1D4
	jmp	.LBB2_2
.LBB2_66:
	movl	%eax, %ebx
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	movl	$474, %edx                      # imm = 0x1DA
	jmp	.LBB2_2
.LBB2_70:
	movl	%eax, %ebx
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	movl	$499, %edx                      # imm = 0x1F3
	jmp	.LBB2_2
.LBB2_72:
	movl	%eax, %ebx
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	movl	$506, %edx                      # imm = 0x1FA
	jmp	.LBB2_2
.LBB2_74:
	movl	%eax, %ebx
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	movl	$507, %edx                      # imm = 0x1FB
	jmp	.LBB2_2
.LBB2_76:
	movl	%eax, %ebx
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	movl	$508, %edx                      # imm = 0x1FC
	jmp	.LBB2_2
.LBB2_78:
	movl	%eax, %ebx
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	movl	$509, %edx                      # imm = 0x1FD
	jmp	.LBB2_2
.LBB2_80:
	movl	%eax, %ebx
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	movl	$510, %edx                      # imm = 0x1FE
	jmp	.LBB2_2
.LBB2_82:
	movl	%eax, %ebx
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	movl	$511, %edx                      # imm = 0x1FF
	jmp	.LBB2_2
.LBB2_84:
	movl	%eax, %ebx
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	movl	$512, %edx                      # imm = 0x200
	jmp	.LBB2_2
.LBB2_86:
	movl	%eax, %ebx
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	movl	$532, %edx                      # imm = 0x214
.LBB2_2:
	xorl	%eax, %eax
	callq	printf
	movl	%ebx, %edi
	callq	hipGetErrorString
	movl	$.L.str.2, %edi
	movl	%ebx, %esi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	printf
	movl	$1, %edi
	callq	exit
.Lfunc_end2:
	.size	GPU_Sampling_wrapper, .Lfunc_end2-GPU_Sampling_wrapper
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z13pmt_calculateddddPdS_S_dddiS_S_PiS_S0_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z24step_calculate_every_pmtPdS_S_S_S_S_S_S_S_S_iS_S_PiS_S0_i, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z13pmt_calculateddddPdS_S_dddiS_S_PiS_S0_i,@object # @_Z13pmt_calculateddddPdS_S_dddiS_S_PiS_S0_i
	.section	.rodata,"a",@progbits
	.globl	_Z13pmt_calculateddddPdS_S_dddiS_S_PiS_S0_i
	.p2align	3, 0x0
_Z13pmt_calculateddddPdS_S_dddiS_S_PiS_S0_i:
	.quad	_Z28__device_stub__pmt_calculateddddPdS_S_dddiS_S_PiS_S0_i
	.size	_Z13pmt_calculateddddPdS_S_dddiS_S_PiS_S0_i, 8

	.type	_Z24step_calculate_every_pmtPdS_S_S_S_S_S_S_S_S_iS_S_PiS_S0_i,@object # @_Z24step_calculate_every_pmtPdS_S_S_S_S_S_S_S_S_iS_S_PiS_S0_i
	.globl	_Z24step_calculate_every_pmtPdS_S_S_S_S_S_S_S_S_iS_S_PiS_S0_i
	.p2align	3, 0x0
_Z24step_calculate_every_pmtPdS_S_S_S_S_S_S_S_S_iS_S_PiS_S0_i:
	.quad	_Z39__device_stub__step_calculate_every_pmtPdS_S_S_S_S_S_S_S_S_iS_S_PiS_S0_i
	.size	_Z24step_calculate_every_pmtPdS_S_S_S_S_S_S_S_S_iS_S_PiS_S0_i, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Error:%s:%d, "
	.size	.L.str, 14

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"/home/ubuntu/Datasets/stackv2/train-structured-repos-hip-sm89/advancc/gpulearn/master/MuonFastVoxel/check.hip"
	.size	.L.str.1, 110

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"code:%d, reason: %s\n"
	.size	.L.str.2, 21

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"total use time %f ms\n"
	.size	.L.str.3, 22

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"gpu use time %f ms\n"
	.size	.L.str.4, 20

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"data use time %f ms\n"
	.size	.L.str.5, 21

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"data transport back use time %f ms\n"
	.size	.L.str.6, 36

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z13pmt_calculateddddPdS_S_dddiS_S_PiS_S0_i"
	.size	.L__unnamed_1, 44

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z24step_calculate_every_pmtPdS_S_S_S_S_S_S_S_S_iS_S_PiS_S0_i"
	.size	.L__unnamed_2, 62

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z28__device_stub__pmt_calculateddddPdS_S_dddiS_S_PiS_S0_i
	.addrsig_sym _Z39__device_stub__step_calculate_every_pmtPdS_S_S_S_S_S_S_S_S_iS_S_PiS_S0_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z13pmt_calculateddddPdS_S_dddiS_S_PiS_S0_i
	.addrsig_sym _Z24step_calculate_every_pmtPdS_S_S_S_S_S_S_S_S_iS_S_PiS_S0_i
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.p2align	2                               ; -- Begin function _Z14calculateAngledddddd
	.type	_Z14calculateAngledddddd,@function
_Z14calculateAngledddddd:               ; @_Z14calculateAngledddddd
; %bb.0:
	s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
	v_cmp_neq_f64_e32 vcc_lo, 0, v[6:7]
	v_cmp_neq_f64_e64 s0, 0, v[8:9]
	v_cmp_neq_f64_e64 s1, 0, v[10:11]
	v_mov_b32_e32 v12, 0
	v_mov_b32_e32 v13, 0
	s_delay_alu instid0(VALU_DEP_4)
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(VALU_DEP_3) | instid1(SALU_CYCLE_1)
	s_or_b32 s0, s0, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB0_4
; %bb.1:
	v_max_f64 v[12:13], |v[2:3]|, |v[2:3]|
	v_max_f64 v[14:15], |v[0:1]|, |v[0:1]|
	v_max_f64 v[16:17], |v[8:9]|, |v[8:9]|
	v_max_f64 v[18:19], |v[6:7]|, |v[6:7]|
	v_max_f64 v[20:21], |v[4:5]|, |v[4:5]|
	v_max_f64 v[24:25], |v[10:11]|, |v[10:11]|
	v_cmp_class_f64_e64 s5, v[2:3], 0x204
	v_cmp_u_f64_e64 s1, v[0:1], v[2:3]
	v_cmp_class_f64_e64 s3, v[0:1], 0x204
	v_cmp_u_f64_e64 s2, v[4:5], v[4:5]
	v_cmp_class_f64_e64 s8, v[4:5], 0x204
	v_cmp_class_f64_e64 s6, v[6:7], 0x204
	v_cmp_class_f64_e64 s7, v[8:9], 0x204
	v_cmp_class_f64_e64 s9, v[10:11], 0x204
	v_max_f64 v[22:23], v[14:15], v[12:13]
	v_min_f64 v[12:13], v[14:15], v[12:13]
	v_max_f64 v[26:27], v[18:19], v[16:17]
	v_min_f64 v[16:17], v[18:19], v[16:17]
	s_or_b32 s3, s3, s5
	s_or_b32 s1, s1, s2
	s_or_b32 s3, s3, s8
	s_or_b32 s2, s6, s7
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_max_f64 v[28:29], v[22:23], v[20:21]
	v_min_f64 v[14:15], v[22:23], v[20:21]
	v_max_f64 v[30:31], v[26:27], v[24:25]
	v_min_f64 v[18:19], v[26:27], v[24:25]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_frexp_exp_i32_f64_e32 v32, v[28:29]
	v_min_f64 v[20:21], v[12:13], v[14:15]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_frexp_exp_i32_f64_e32 v33, v[30:31]
	v_min_f64 v[22:23], v[16:17], v[18:19]
	v_max_f64 v[12:13], v[12:13], v[14:15]
	v_max_f64 v[16:17], v[16:17], v[18:19]
	v_sub_nc_u32_e32 v24, 0, v32
	v_sub_nc_u32_e32 v25, 0, v33
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_ldexp_f64 v[14:15], v[20:21], v24
	v_ldexp_f64 v[12:13], v[12:13], v24
	v_ldexp_f64 v[18:19], v[22:23], v25
	v_ldexp_f64 v[16:17], v[16:17], v25
	v_ldexp_f64 v[20:21], v[28:29], v24
	v_mul_f64 v[14:15], v[14:15], v[14:15]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[18:19], v[18:19], v[18:19]
	v_fma_f64 v[12:13], v[12:13], v[12:13], v[14:15]
	v_ldexp_f64 v[14:15], v[30:31], v25
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[16:17], v[16:17], v[16:17], v[18:19]
	v_fma_f64 v[12:13], v[20:21], v[20:21], v[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[14:15], v[14:15], v[14:15], v[16:17]
	v_rsq_f64_e32 v[16:17], v[12:13]
	v_cmp_eq_f64_e32 vcc_lo, 0, v[12:13]
	s_delay_alu instid0(VALU_DEP_2)
	v_rsq_f64_e32 v[18:19], v[14:15]
	v_cmp_eq_f64_e64 s0, 0, v[14:15]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[20:21], v[12:13], v[16:17]
	v_mul_f64 v[16:17], v[16:17], 0.5
	v_mul_f64 v[22:23], v[14:15], v[18:19]
	v_mul_f64 v[18:19], v[18:19], 0.5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[24:25], -v[16:17], v[20:21], 0.5
	v_fma_f64 v[26:27], -v[18:19], v[22:23], 0.5
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[20:21], v[20:21], v[24:25], v[20:21]
	v_fma_f64 v[16:17], v[16:17], v[24:25], v[16:17]
	v_fma_f64 v[22:23], v[22:23], v[26:27], v[22:23]
	v_fma_f64 v[18:19], v[18:19], v[26:27], v[18:19]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[24:25], -v[20:21], v[20:21], v[12:13]
	v_fma_f64 v[26:27], -v[22:23], v[22:23], v[14:15]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[16:17], v[24:25], v[16:17], v[20:21]
	v_mul_f64 v[20:21], v[2:3], v[8:9]
	v_fma_f64 v[18:19], v[26:27], v[18:19], v[22:23]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v3, v17, v13 :: v_dual_cndmask_b32 v2, v16, v12
	v_cndmask_b32_e64 v13, v19, v15, s0
	s_delay_alu instid0(VALU_DEP_3)
	v_cndmask_b32_e64 v12, v18, v14, s0
	v_cmp_u_f64_e32 vcc_lo, v[6:7], v[8:9]
	v_cmp_u_f64_e64 s0, v[10:11], v[10:11]
	v_ldexp_f64 v[2:3], v[2:3], v32
	v_fma_f64 v[0:1], v[0:1], v[6:7], v[20:21]
	v_ldexp_f64 v[8:9], v[12:13], v33
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	s_or_b32 s0, vcc_lo, s0
	v_cndmask_b32_e64 v3, v3, 0x7ff80000, s1
	s_or_b32 s1, s3, s1
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e64 v6, v9, 0x7ff80000, s0
	v_cndmask_b32_e64 v2, v2, 0, s1
	s_or_b32 s1, s2, s9
	v_cndmask_b32_e64 v3, v3, 0x7ff00000, s3
	s_or_b32 s0, s1, s0
	v_cndmask_b32_e64 v7, v6, 0x7ff00000, s1
	v_cndmask_b32_e64 v6, v8, 0, s0
	v_fma_f64 v[0:1], v[4:5], v[10:11], v[0:1]
	s_mov_b32 s0, 0x78a05eaf
	s_mov_b32 s2, 0x9fea6a70
	s_mov_b32 s1, 0xbf90a5a3
	v_mul_f64 v[2:3], v[2:3], v[6:7]
	s_mov_b32 s3, 0x3fa05985
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_scale_f64 v[4:5], null, v[2:3], v[2:3], v[0:1]
	v_div_scale_f64 v[10:11], vcc_lo, v[0:1], v[2:3], v[0:1]
	v_rcp_f64_e32 v[6:7], v[4:5]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[8:9], -v[4:5], v[6:7], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[6:7], v[6:7], v[8:9], v[6:7]
	v_fma_f64 v[8:9], -v[4:5], v[6:7], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[6:7], v[6:7], v[8:9], v[6:7]
	v_mul_f64 v[8:9], v[10:11], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[4:5], -v[4:5], v[8:9], v[10:11]
	v_div_fmas_f64 v[4:5], v[4:5], v[6:7], v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f64 v[0:1], v[4:5], v[2:3], v[0:1]
	v_fma_f64 v[2:3], |v[0:1]|, -0.5, 0.5
	v_mul_f64 v[4:5], v[0:1], v[0:1]
	v_cmp_ge_f64_e64 vcc_lo, |v[0:1]|, 0.5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v5, v5, v3 :: v_dual_cndmask_b32 v4, v4, v2
	v_fma_f64 v[6:7], v[4:5], s[2:3], s[0:1]
	s_mov_b32 s0, 0x37024d6a
	s_mov_b32 s1, 0x3f940521
	s_mov_b32 s3, 0x3fedd9ad
	s_mov_b32 s2, 0x336a0500
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[6:7], v[4:5], v[6:7], s[0:1]
	s_mov_b32 s0, 0x98a70509
	s_mov_b32 s1, 0x3f7ab3a0
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[6:7], v[4:5], v[6:7], s[0:1]
	s_mov_b32 s0, 0xa300c8d2
	s_mov_b32 s1, 0x3f88ed60
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[6:7], v[4:5], v[6:7], s[0:1]
	s_mov_b32 s0, 0x4b77012b
	s_mov_b32 s1, 0x3f8c6fa8
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[6:7], v[4:5], v[6:7], s[0:1]
	s_mov_b32 s0, 0x11dccb70
	s_mov_b32 s1, 0x3f91c6c1
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[6:7], v[4:5], v[6:7], s[0:1]
	s_mov_b32 s0, 0xa0adacf
	s_mov_b32 s1, 0x3f96e89f
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[6:7], v[4:5], v[6:7], s[0:1]
	s_mov_b32 s0, 0xc668963f
	s_mov_b32 s1, 0x3f9f1c72
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[6:7], v[4:5], v[6:7], s[0:1]
	s_mov_b32 s0, 0xb41ce4bd
	s_mov_b32 s1, 0x3fa6db6d
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[6:7], v[4:5], v[6:7], s[0:1]
	s_mov_b32 s0, 0x3336fd5b
	s_mov_b32 s1, 0x3fb33333
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[6:7], v[4:5], v[6:7], s[0:1]
	s_mov_b32 s0, 0x55555380
	s_mov_b32 s1, 0x3fc55555
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[6:7], v[4:5], v[6:7], s[0:1]
	s_mov_b32 s0, 0xeeb562d6
	s_mov_b32 s1, 0x3ffaf154
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[4:5], v[4:5], v[6:7]
	v_fma_f64 v[6:7], v[0:1], v[4:5], v[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[12:13], s[2:3], s[0:1], -v[6:7]
	s_and_saveexec_b32 s5, vcc_lo
	s_cbranch_execz .LBB0_3
; %bb.2:
	v_rsq_f64_e32 v[6:7], v[2:3]
	v_cmp_eq_f64_e32 vcc_lo, 0, v[2:3]
	s_mov_b32 s3, 0x3ffdd9ad
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[8:9], v[2:3], v[6:7]
	v_mul_f64 v[6:7], v[6:7], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[10:11], -v[6:7], v[8:9], 0.5
	v_fma_f64 v[8:9], v[8:9], v[10:11], v[8:9]
	v_fma_f64 v[6:7], v[6:7], v[10:11], v[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[10:11], -v[8:9], v[8:9], v[2:3]
	v_fma_f64 v[6:7], v[10:11], v[6:7], v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v7, v7, v3 :: v_dual_cndmask_b32 v6, v6, v2
	v_add_f64 v[8:9], v[6:7], v[6:7]
	v_mul_f64 v[10:11], v[6:7], v[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[12:13], v[8:9]
	v_add_f64 v[14:15], v[2:3], -v[10:11]
	v_fma_f64 v[18:19], v[6:7], v[6:7], -v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_add_f64 v[2:3], v[2:3], -v[14:15]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[16:17], -v[8:9], v[12:13], 1.0
	v_add_f64 v[2:3], v[2:3], -v[10:11]
	v_fma_f64 v[10:11], v[16:17], v[12:13], v[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[2:3], v[2:3], -v[18:19]
	v_fma_f64 v[12:13], -v[8:9], v[10:11], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[2:3], v[14:15], v[2:3]
	v_fma_f64 v[10:11], v[12:13], v[10:11], v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[12:13], v[2:3], v[10:11]
	v_fma_f64 v[2:3], -v[8:9], v[12:13], v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[2:3], v[2:3], v[10:11], v[12:13]
	v_cndmask_b32_e64 v3, v3, 0, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v2, v2, 0, vcc_lo
	v_cmp_gt_f64_e32 vcc_lo, 0, v[0:1]
	v_add_f64 v[8:9], v[6:7], v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[6:7], v[8:9], -v[6:7]
	v_add_f64 v[2:3], v[2:3], -v[6:7]
	v_fma_f64 v[6:7], v[8:9], v[4:5], v[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[2:3], v[8:9], v[4:5], v[2:3]
	v_mul_f64 v[4:5], v[6:7], -2.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[2:3], v[8:9], v[2:3]
	v_fma_f64 v[4:5], s[2:3], s[0:1], v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[2:3], v[2:3], v[2:3]
	v_dual_cndmask_b32 v3, v3, v5 :: v_dual_cndmask_b32 v2, v2, v4
	v_cmp_neq_f64_e32 vcc_lo, -1.0, v[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v2, 0x54442d18, v2, vcc_lo
	v_cndmask_b32_e32 v3, 0x400921fb, v3, vcc_lo
	v_cmp_neq_f64_e32 vcc_lo, 1.0, v[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_dual_cndmask_b32 v13, 0, v3 :: v_dual_cndmask_b32 v12, 0, v2
.LBB0_3:                                ; %Flow
	s_or_b32 exec_lo, exec_lo, s5
.LBB0_4:                                ; %_ZL4acosd.exit
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s4
	v_dual_mov_b32 v0, v12 :: v_dual_mov_b32 v1, v13
	s_setpc_b64 s[30:31]
.Lfunc_end0:
	.size	_Z14calculateAngledddddd, .Lfunc_end0-_Z14calculateAngledddddd
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Function info:
; codeLenInByte = 1752
; NumSgprs: 34
; NumVgprs: 34
; ScratchSize: 0
; MemoryBound: 0
	.text
	.p2align	2                               ; -- Begin function __ockl_printf_append_string_n
	.type	__ockl_printf_append_string_n,@function
__ockl_printf_append_string_n:          ; @__ockl_printf_append_string_n
; %bb.0:
	s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
	v_dual_mov_b32 v8, v3 :: v_dual_mov_b32 v7, v2
	v_or_b32_e32 v2, 2, v0
	v_cmp_eq_u32_e64 s0, 0, v6
	s_mov_b32 s11, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e64 v10, v2, v0, s0
	s_mov_b32 s0, exec_lo
	v_cmpx_ne_u64_e32 0, v[7:8]
	s_xor_b32 s10, exec_lo, s0
	s_cbranch_execz .LBB1_87
; %bb.1:
	s_load_b64 s[2:3], s[8:9], 0x50
	v_dual_mov_b32 v11, 2 :: v_dual_and_b32 v6, 2, v10
	v_mov_b32_e32 v30, 0
	v_and_b32_e32 v0, -3, v10
	v_mbcnt_lo_u32_b32 v33, -1, 0
	v_mov_b32_e32 v12, 1
	s_mov_b32 s12, 0
.LBB1_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB1_5 Depth 2
                                        ;     Child Loop BB1_13 Depth 2
                                        ;     Child Loop BB1_21 Depth 2
                                        ;     Child Loop BB1_29 Depth 2
                                        ;     Child Loop BB1_37 Depth 2
                                        ;     Child Loop BB1_45 Depth 2
                                        ;     Child Loop BB1_53 Depth 2
                                        ;     Child Loop BB1_61 Depth 2
                                        ;     Child Loop BB1_69 Depth 2
                                        ;     Child Loop BB1_75 Depth 2
                                        ;     Child Loop BB1_84 Depth 2
	v_cmp_gt_u64_e32 vcc_lo, 56, v[4:5]
                                        ; implicit-def: $vgpr2_vgpr3
                                        ; implicit-def: $sgpr4
	s_mov_b32 s0, exec_lo
	v_dual_cndmask_b32 v32, 0, v5 :: v_dual_cndmask_b32 v31, 56, v4
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e32 8, v31
	s_xor_b32 s1, exec_lo, s0
	s_cbranch_execz .LBB1_8
; %bb.3:                                ;   in Loop: Header=BB1_2 Depth=1
	s_waitcnt vmcnt(0)
	v_mov_b32_e32 v2, 0
	v_mov_b32_e32 v3, 0
	s_mov_b32 s6, exec_lo
	v_cmpx_ne_u32_e32 0, v31
	s_cbranch_execz .LBB1_7
; %bb.4:                                ; %.preheader31.preheader
                                        ;   in Loop: Header=BB1_2 Depth=1
	v_mov_b32_e32 v2, 0
	v_lshlrev_b64 v[9:10], 3, v[31:32]
	v_dual_mov_b32 v3, 0 :: v_dual_mov_b32 v14, v8
	v_mov_b32_e32 v13, v7
	s_mov_b64 s[4:5], 0
	s_mov_b32 s7, 0
.LBB1_5:                                ; %.preheader31
                                        ;   Parent Loop BB1_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	flat_load_u8 v10, v[13:14]
	v_mov_b32_e32 v16, s11
	v_add_co_u32 v13, vcc_lo, v13, 1
	v_add_co_ci_u32_e32 v14, vcc_lo, 0, v14, vcc_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_and_b32_e32 v15, 0xffff, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[15:16], s4, v[15:16]
	s_add_u32 s4, s4, 8
	s_addc_u32 s5, s5, 0
	v_cmp_eq_u32_e64 s0, s4, v9
	v_or_b32_e32 v3, v16, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_or_b32_e32 v2, v15, v2
	s_or_b32 s7, s0, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB1_5
; %bb.6:                                ; %Flow232
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s7
.LBB1_7:                                ; %Flow234
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s6
	s_mov_b32 s4, 0
.LBB1_8:                                ; %Flow236
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_or_saveexec_b32 s0, s1
	v_dual_mov_b32 v15, s4 :: v_dual_mov_b32 v10, v8
	v_mov_b32_e32 v9, v7
	s_xor_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB1_10
; %bb.9:                                ;   in Loop: Header=BB1_2 Depth=1
	s_waitcnt vmcnt(0)
	s_clause 0x5
	flat_load_u8 v2, v[7:8]
	flat_load_u8 v3, v[7:8] offset:1
	flat_load_u8 v9, v[7:8] offset:2
	flat_load_u8 v10, v[7:8] offset:3
	flat_load_u8 v13, v[7:8] offset:5
	flat_load_u8 v14, v[7:8] offset:4
	v_mov_b32_e32 v16, v30
	s_waitcnt vmcnt(5) lgkmcnt(0)
	v_and_b32_e32 v2, 0xffff, v2
	s_waitcnt vmcnt(4)
	v_lshlrev_b32_e32 v3, 8, v3
	s_clause 0x1
	flat_load_u8 v15, v[7:8] offset:7
	flat_load_d16_hi_u8 v16, v[7:8] offset:6
	s_waitcnt vmcnt(5)
	v_lshlrev_b32_e32 v9, 16, v9
	s_waitcnt vmcnt(4)
	v_lshlrev_b32_e32 v10, 24, v10
	v_or_b32_e32 v2, v3, v2
	s_waitcnt vmcnt(3)
	v_lshlrev_b32_e32 v3, 8, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_or3_b32 v2, v2, v9, v10
	s_waitcnt vmcnt(2)
	v_or3_b32 v3, 0, v14, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_or3_b32 v2, v2, 0, 0
	v_or3_b32 v2, v2, 0, 0
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_lshlrev_b32_e32 v9, 24, v15
	v_add_nc_u32_e32 v15, -8, v31
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2)
	v_or3_b32 v3, v3, v16, v9
	v_add_co_u32 v9, vcc_lo, v7, 8
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v8, vcc_lo
.LBB1_10:                               ; %.loopexit32
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $vgpr13_vgpr14
                                        ; implicit-def: $sgpr1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	v_cmpx_gt_u32_e32 8, v15
	s_xor_b32 s6, exec_lo, s0
	s_cbranch_execz .LBB1_16
; %bb.11:                               ;   in Loop: Header=BB1_2 Depth=1
	v_mov_b32_e32 v13, 0
	v_mov_b32_e32 v14, 0
	s_mov_b32 s7, exec_lo
	v_cmpx_ne_u32_e32 0, v15
	s_cbranch_execz .LBB1_15
; %bb.12:                               ; %.preheader29.preheader
                                        ;   in Loop: Header=BB1_2 Depth=1
	v_mov_b32_e32 v13, 0
	v_mov_b32_e32 v14, 0
	s_mov_b64 s[0:1], 0
	s_mov_b32 s13, 0
	s_mov_b64 s[4:5], 0
.LBB1_13:                               ; %.preheader29
                                        ;   Parent Loop BB1_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_co_u32 v16, vcc_lo, v9, s4
	v_add_co_ci_u32_e32 v17, vcc_lo, s5, v10, vcc_lo
	s_add_u32 s4, s4, 1
	s_addc_u32 s5, s5, 0
	v_cmp_eq_u32_e32 vcc_lo, s4, v15
	flat_load_u8 v16, v[16:17]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_dual_mov_b32 v17, s11 :: v_dual_and_b32 v16, 0xffff, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[16:17], s0, v[16:17]
	s_add_u32 s0, s0, 8
	s_addc_u32 s1, s1, 0
	s_or_b32 s13, vcc_lo, s13
	v_or_b32_e32 v14, v17, v14
	s_delay_alu instid0(VALU_DEP_2)
	v_or_b32_e32 v13, v16, v13
	s_and_not1_b32 exec_lo, exec_lo, s13
	s_cbranch_execnz .LBB1_13
; %bb.14:                               ; %Flow227
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s13
.LBB1_15:                               ; %Flow229
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s7
	s_mov_b32 s1, 0
                                        ; implicit-def: $vgpr15
.LBB1_16:                               ; %Flow231
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_or_saveexec_b32 s0, s6
	v_mov_b32_e32 v17, s1
	s_xor_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB1_18
; %bb.17:                               ;   in Loop: Header=BB1_2 Depth=1
	s_clause 0x5
	flat_load_u8 v13, v[9:10]
	flat_load_u8 v14, v[9:10] offset:1
	flat_load_u8 v16, v[9:10] offset:2
	flat_load_u8 v17, v[9:10] offset:3
	flat_load_u8 v18, v[9:10] offset:5
	flat_load_u8 v19, v[9:10] offset:4
	s_waitcnt vmcnt(5) lgkmcnt(0)
	v_dual_mov_b32 v20, v30 :: v_dual_and_b32 v13, 0xffff, v13
	s_clause 0x1
	flat_load_u8 v21, v[9:10] offset:7
	flat_load_d16_hi_u8 v20, v[9:10] offset:6
	s_waitcnt vmcnt(6)
	v_lshlrev_b32_e32 v14, 8, v14
	s_waitcnt vmcnt(5)
	v_lshlrev_b32_e32 v16, 16, v16
	s_waitcnt vmcnt(4)
	v_lshlrev_b32_e32 v17, 24, v17
	v_add_co_u32 v9, vcc_lo, v9, 8
	v_or_b32_e32 v13, v14, v13
	s_waitcnt vmcnt(3)
	v_lshlrev_b32_e32 v14, 8, v18
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_or3_b32 v13, v13, v16, v17
	s_waitcnt vmcnt(2)
	v_or3_b32 v14, 0, v19, v14
	v_add_nc_u32_e32 v17, -8, v15
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_or3_b32 v13, v13, 0, 0
	v_or3_b32 v13, v13, 0, 0
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_lshlrev_b32_e32 v16, 24, v21
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_or3_b32 v14, v14, v20, v16
.LBB1_18:                               ; %.loopexit30
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $sgpr1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	v_cmpx_gt_u32_e32 8, v17
	s_xor_b32 s6, exec_lo, s0
	s_cbranch_execz .LBB1_24
; %bb.19:                               ;   in Loop: Header=BB1_2 Depth=1
	v_mov_b32_e32 v15, 0
	v_mov_b32_e32 v16, 0
	s_mov_b32 s7, exec_lo
	v_cmpx_ne_u32_e32 0, v17
	s_cbranch_execz .LBB1_23
; %bb.20:                               ; %.preheader27.preheader
                                        ;   in Loop: Header=BB1_2 Depth=1
	v_mov_b32_e32 v15, 0
	v_mov_b32_e32 v16, 0
	s_mov_b64 s[0:1], 0
	s_mov_b32 s13, 0
	s_mov_b64 s[4:5], 0
.LBB1_21:                               ; %.preheader27
                                        ;   Parent Loop BB1_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_co_u32 v18, vcc_lo, v9, s4
	v_add_co_ci_u32_e32 v19, vcc_lo, s5, v10, vcc_lo
	s_add_u32 s4, s4, 1
	s_addc_u32 s5, s5, 0
	v_cmp_eq_u32_e32 vcc_lo, s4, v17
	flat_load_u8 v18, v[18:19]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_dual_mov_b32 v19, s11 :: v_dual_and_b32 v18, 0xffff, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[18:19], s0, v[18:19]
	s_add_u32 s0, s0, 8
	s_addc_u32 s1, s1, 0
	s_or_b32 s13, vcc_lo, s13
	v_or_b32_e32 v16, v19, v16
	s_delay_alu instid0(VALU_DEP_2)
	v_or_b32_e32 v15, v18, v15
	s_and_not1_b32 exec_lo, exec_lo, s13
	s_cbranch_execnz .LBB1_21
; %bb.22:                               ; %Flow222
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s13
.LBB1_23:                               ; %Flow224
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s7
	s_mov_b32 s1, 0
                                        ; implicit-def: $vgpr17
.LBB1_24:                               ; %Flow226
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_or_saveexec_b32 s0, s6
	v_mov_b32_e32 v19, s1
	s_xor_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB1_26
; %bb.25:                               ;   in Loop: Header=BB1_2 Depth=1
	s_clause 0x5
	flat_load_u8 v15, v[9:10]
	flat_load_u8 v16, v[9:10] offset:1
	flat_load_u8 v18, v[9:10] offset:2
	flat_load_u8 v19, v[9:10] offset:3
	flat_load_u8 v20, v[9:10] offset:5
	flat_load_u8 v21, v[9:10] offset:4
	s_waitcnt vmcnt(5) lgkmcnt(0)
	v_dual_mov_b32 v22, v30 :: v_dual_and_b32 v15, 0xffff, v15
	s_clause 0x1
	flat_load_u8 v23, v[9:10] offset:7
	flat_load_d16_hi_u8 v22, v[9:10] offset:6
	s_waitcnt vmcnt(6)
	v_lshlrev_b32_e32 v16, 8, v16
	s_waitcnt vmcnt(5)
	v_lshlrev_b32_e32 v18, 16, v18
	s_waitcnt vmcnt(4)
	v_lshlrev_b32_e32 v19, 24, v19
	v_add_co_u32 v9, vcc_lo, v9, 8
	v_or_b32_e32 v15, v16, v15
	s_waitcnt vmcnt(3)
	v_lshlrev_b32_e32 v16, 8, v20
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_or3_b32 v15, v15, v18, v19
	s_waitcnt vmcnt(2)
	v_or3_b32 v16, 0, v21, v16
	v_add_nc_u32_e32 v19, -8, v17
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_or3_b32 v15, v15, 0, 0
	v_or3_b32 v15, v15, 0, 0
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_lshlrev_b32_e32 v18, 24, v23
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_or3_b32 v16, v16, v22, v18
.LBB1_26:                               ; %.loopexit28
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $vgpr17_vgpr18
                                        ; implicit-def: $sgpr1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	v_cmpx_gt_u32_e32 8, v19
	s_xor_b32 s6, exec_lo, s0
	s_cbranch_execz .LBB1_32
; %bb.27:                               ;   in Loop: Header=BB1_2 Depth=1
	v_mov_b32_e32 v17, 0
	v_mov_b32_e32 v18, 0
	s_mov_b32 s7, exec_lo
	v_cmpx_ne_u32_e32 0, v19
	s_cbranch_execz .LBB1_31
; %bb.28:                               ; %.preheader25.preheader
                                        ;   in Loop: Header=BB1_2 Depth=1
	v_mov_b32_e32 v17, 0
	v_mov_b32_e32 v18, 0
	s_mov_b64 s[0:1], 0
	s_mov_b32 s13, 0
	s_mov_b64 s[4:5], 0
.LBB1_29:                               ; %.preheader25
                                        ;   Parent Loop BB1_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_co_u32 v20, vcc_lo, v9, s4
	v_add_co_ci_u32_e32 v21, vcc_lo, s5, v10, vcc_lo
	s_add_u32 s4, s4, 1
	s_addc_u32 s5, s5, 0
	v_cmp_eq_u32_e32 vcc_lo, s4, v19
	flat_load_u8 v20, v[20:21]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_dual_mov_b32 v21, s11 :: v_dual_and_b32 v20, 0xffff, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[20:21], s0, v[20:21]
	s_add_u32 s0, s0, 8
	s_addc_u32 s1, s1, 0
	s_or_b32 s13, vcc_lo, s13
	v_or_b32_e32 v18, v21, v18
	s_delay_alu instid0(VALU_DEP_2)
	v_or_b32_e32 v17, v20, v17
	s_and_not1_b32 exec_lo, exec_lo, s13
	s_cbranch_execnz .LBB1_29
; %bb.30:                               ; %Flow217
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s13
.LBB1_31:                               ; %Flow219
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s7
	s_mov_b32 s1, 0
                                        ; implicit-def: $vgpr19
.LBB1_32:                               ; %Flow221
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_or_saveexec_b32 s0, s6
	v_mov_b32_e32 v21, s1
	s_xor_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB1_34
; %bb.33:                               ;   in Loop: Header=BB1_2 Depth=1
	s_clause 0x5
	flat_load_u8 v17, v[9:10]
	flat_load_u8 v18, v[9:10] offset:1
	flat_load_u8 v20, v[9:10] offset:2
	flat_load_u8 v21, v[9:10] offset:3
	flat_load_u8 v22, v[9:10] offset:5
	flat_load_u8 v23, v[9:10] offset:4
	s_waitcnt vmcnt(5) lgkmcnt(0)
	v_dual_mov_b32 v24, v30 :: v_dual_and_b32 v17, 0xffff, v17
	s_clause 0x1
	flat_load_u8 v25, v[9:10] offset:7
	flat_load_d16_hi_u8 v24, v[9:10] offset:6
	s_waitcnt vmcnt(6)
	v_lshlrev_b32_e32 v18, 8, v18
	s_waitcnt vmcnt(5)
	v_lshlrev_b32_e32 v20, 16, v20
	s_waitcnt vmcnt(4)
	v_lshlrev_b32_e32 v21, 24, v21
	v_add_co_u32 v9, vcc_lo, v9, 8
	v_or_b32_e32 v17, v18, v17
	s_waitcnt vmcnt(3)
	v_lshlrev_b32_e32 v18, 8, v22
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_or3_b32 v17, v17, v20, v21
	s_waitcnt vmcnt(2)
	v_or3_b32 v18, 0, v23, v18
	v_add_nc_u32_e32 v21, -8, v19
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_or3_b32 v17, v17, 0, 0
	v_or3_b32 v17, v17, 0, 0
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_lshlrev_b32_e32 v20, 24, v25
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_or3_b32 v18, v18, v24, v20
.LBB1_34:                               ; %.loopexit26
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $sgpr1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	v_cmpx_gt_u32_e32 8, v21
	s_xor_b32 s6, exec_lo, s0
	s_cbranch_execz .LBB1_40
; %bb.35:                               ;   in Loop: Header=BB1_2 Depth=1
	v_mov_b32_e32 v19, 0
	v_mov_b32_e32 v20, 0
	s_mov_b32 s7, exec_lo
	v_cmpx_ne_u32_e32 0, v21
	s_cbranch_execz .LBB1_39
; %bb.36:                               ; %.preheader23.preheader
                                        ;   in Loop: Header=BB1_2 Depth=1
	v_mov_b32_e32 v19, 0
	v_mov_b32_e32 v20, 0
	s_mov_b64 s[0:1], 0
	s_mov_b32 s13, 0
	s_mov_b64 s[4:5], 0
.LBB1_37:                               ; %.preheader23
                                        ;   Parent Loop BB1_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_co_u32 v22, vcc_lo, v9, s4
	v_add_co_ci_u32_e32 v23, vcc_lo, s5, v10, vcc_lo
	s_add_u32 s4, s4, 1
	s_addc_u32 s5, s5, 0
	v_cmp_eq_u32_e32 vcc_lo, s4, v21
	flat_load_u8 v22, v[22:23]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_dual_mov_b32 v23, s11 :: v_dual_and_b32 v22, 0xffff, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[22:23], s0, v[22:23]
	s_add_u32 s0, s0, 8
	s_addc_u32 s1, s1, 0
	s_or_b32 s13, vcc_lo, s13
	v_or_b32_e32 v20, v23, v20
	s_delay_alu instid0(VALU_DEP_2)
	v_or_b32_e32 v19, v22, v19
	s_and_not1_b32 exec_lo, exec_lo, s13
	s_cbranch_execnz .LBB1_37
; %bb.38:                               ; %Flow212
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s13
.LBB1_39:                               ; %Flow214
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s7
	s_mov_b32 s1, 0
                                        ; implicit-def: $vgpr21
.LBB1_40:                               ; %Flow216
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_or_saveexec_b32 s0, s6
	v_mov_b32_e32 v23, s1
	s_xor_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB1_42
; %bb.41:                               ;   in Loop: Header=BB1_2 Depth=1
	s_clause 0x5
	flat_load_u8 v19, v[9:10]
	flat_load_u8 v20, v[9:10] offset:1
	flat_load_u8 v22, v[9:10] offset:2
	flat_load_u8 v23, v[9:10] offset:3
	flat_load_u8 v24, v[9:10] offset:5
	flat_load_u8 v25, v[9:10] offset:4
	s_waitcnt vmcnt(5) lgkmcnt(0)
	v_dual_mov_b32 v26, v30 :: v_dual_and_b32 v19, 0xffff, v19
	s_clause 0x1
	flat_load_u8 v27, v[9:10] offset:7
	flat_load_d16_hi_u8 v26, v[9:10] offset:6
	s_waitcnt vmcnt(6)
	v_lshlrev_b32_e32 v20, 8, v20
	s_waitcnt vmcnt(5)
	v_lshlrev_b32_e32 v22, 16, v22
	s_waitcnt vmcnt(4)
	v_lshlrev_b32_e32 v23, 24, v23
	v_add_co_u32 v9, vcc_lo, v9, 8
	v_or_b32_e32 v19, v20, v19
	s_waitcnt vmcnt(3)
	v_lshlrev_b32_e32 v20, 8, v24
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_or3_b32 v19, v19, v22, v23
	s_waitcnt vmcnt(2)
	v_or3_b32 v20, 0, v25, v20
	v_add_nc_u32_e32 v23, -8, v21
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_or3_b32 v19, v19, 0, 0
	v_or3_b32 v19, v19, 0, 0
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_lshlrev_b32_e32 v22, 24, v27
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_or3_b32 v20, v20, v26, v22
.LBB1_42:                               ; %.loopexit24
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $vgpr21_vgpr22
                                        ; implicit-def: $sgpr1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	v_cmpx_gt_u32_e32 8, v23
	s_xor_b32 s6, exec_lo, s0
	s_cbranch_execz .LBB1_48
; %bb.43:                               ;   in Loop: Header=BB1_2 Depth=1
	v_mov_b32_e32 v21, 0
	v_mov_b32_e32 v22, 0
	s_mov_b32 s7, exec_lo
	v_cmpx_ne_u32_e32 0, v23
	s_cbranch_execz .LBB1_47
; %bb.44:                               ; %.preheader21.preheader
                                        ;   in Loop: Header=BB1_2 Depth=1
	v_mov_b32_e32 v21, 0
	v_mov_b32_e32 v22, 0
	s_mov_b64 s[0:1], 0
	s_mov_b32 s13, 0
	s_mov_b64 s[4:5], 0
.LBB1_45:                               ; %.preheader21
                                        ;   Parent Loop BB1_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_co_u32 v24, vcc_lo, v9, s4
	v_add_co_ci_u32_e32 v25, vcc_lo, s5, v10, vcc_lo
	s_add_u32 s4, s4, 1
	s_addc_u32 s5, s5, 0
	v_cmp_eq_u32_e32 vcc_lo, s4, v23
	flat_load_u8 v24, v[24:25]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_dual_mov_b32 v25, s11 :: v_dual_and_b32 v24, 0xffff, v24
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[24:25], s0, v[24:25]
	s_add_u32 s0, s0, 8
	s_addc_u32 s1, s1, 0
	s_or_b32 s13, vcc_lo, s13
	v_or_b32_e32 v22, v25, v22
	s_delay_alu instid0(VALU_DEP_2)
	v_or_b32_e32 v21, v24, v21
	s_and_not1_b32 exec_lo, exec_lo, s13
	s_cbranch_execnz .LBB1_45
; %bb.46:                               ; %Flow207
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s13
.LBB1_47:                               ; %Flow209
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s7
	s_mov_b32 s1, 0
                                        ; implicit-def: $vgpr23
.LBB1_48:                               ; %Flow211
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_or_saveexec_b32 s0, s6
	v_mov_b32_e32 v25, s1
	s_xor_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB1_50
; %bb.49:                               ;   in Loop: Header=BB1_2 Depth=1
	s_clause 0x5
	flat_load_u8 v21, v[9:10]
	flat_load_u8 v22, v[9:10] offset:1
	flat_load_u8 v24, v[9:10] offset:2
	flat_load_u8 v25, v[9:10] offset:3
	flat_load_u8 v26, v[9:10] offset:5
	flat_load_u8 v27, v[9:10] offset:4
	s_waitcnt vmcnt(5) lgkmcnt(0)
	v_dual_mov_b32 v28, v30 :: v_dual_and_b32 v21, 0xffff, v21
	s_clause 0x1
	flat_load_u8 v29, v[9:10] offset:7
	flat_load_d16_hi_u8 v28, v[9:10] offset:6
	s_waitcnt vmcnt(6)
	v_lshlrev_b32_e32 v22, 8, v22
	s_waitcnt vmcnt(5)
	v_lshlrev_b32_e32 v24, 16, v24
	s_waitcnt vmcnt(4)
	v_lshlrev_b32_e32 v25, 24, v25
	v_add_co_u32 v9, vcc_lo, v9, 8
	v_or_b32_e32 v21, v22, v21
	s_waitcnt vmcnt(3)
	v_lshlrev_b32_e32 v22, 8, v26
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_or3_b32 v21, v21, v24, v25
	s_waitcnt vmcnt(2)
	v_or3_b32 v22, 0, v27, v22
	v_add_nc_u32_e32 v25, -8, v23
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_or3_b32 v21, v21, 0, 0
	v_or3_b32 v21, v21, 0, 0
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_lshlrev_b32_e32 v24, 24, v29
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_or3_b32 v22, v22, v28, v24
.LBB1_50:                               ; %.loopexit22
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	v_cmpx_gt_u32_e32 8, v25
	s_xor_b32 s4, exec_lo, s0
	s_cbranch_execz .LBB1_56
; %bb.51:                               ;   in Loop: Header=BB1_2 Depth=1
	v_mov_b32_e32 v23, 0
	v_mov_b32_e32 v24, 0
	s_mov_b32 s5, exec_lo
	v_cmpx_ne_u32_e32 0, v25
	s_cbranch_execz .LBB1_55
; %bb.52:                               ; %.preheader.preheader
                                        ;   in Loop: Header=BB1_2 Depth=1
	v_mov_b32_e32 v23, 0
	v_mov_b32_e32 v24, 0
	s_mov_b64 s[0:1], 0
	s_mov_b32 s6, 0
.LBB1_53:                               ; %.preheader
                                        ;   Parent Loop BB1_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	flat_load_u8 v26, v[9:10]
	v_mov_b32_e32 v27, s11
	v_add_nc_u32_e32 v25, -1, v25
	v_add_co_u32 v9, vcc_lo, v9, 1
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e32 vcc_lo, 0, v25
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_and_b32_e32 v26, 0xffff, v26
	v_lshlrev_b64 v[26:27], s0, v[26:27]
	s_add_u32 s0, s0, 8
	s_addc_u32 s1, s1, 0
	s_or_b32 s6, vcc_lo, s6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_or_b32_e32 v24, v27, v24
	v_or_b32_e32 v23, v26, v23
	s_and_not1_b32 exec_lo, exec_lo, s6
	s_cbranch_execnz .LBB1_53
; %bb.54:                               ; %Flow202
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
.LBB1_55:                               ; %Flow204
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s5
                                        ; implicit-def: $vgpr9_vgpr10
.LBB1_56:                               ; %Flow206
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_and_not1_saveexec_b32 s0, s4
	s_cbranch_execz .LBB1_58
; %bb.57:                               ;   in Loop: Header=BB1_2 Depth=1
	s_clause 0x5
	flat_load_u8 v23, v[9:10]
	flat_load_u8 v24, v[9:10] offset:1
	flat_load_u8 v25, v[9:10] offset:2
	flat_load_u8 v26, v[9:10] offset:3
	flat_load_u8 v27, v[9:10] offset:5
	flat_load_u8 v28, v[9:10] offset:4
	v_mov_b32_e32 v29, v30
	s_clause 0x1
	flat_load_u8 v34, v[9:10] offset:7
	flat_load_d16_hi_u8 v29, v[9:10] offset:6
	s_waitcnt vmcnt(7) lgkmcnt(0)
	v_and_b32_e32 v9, 0xffff, v23
	s_waitcnt vmcnt(6)
	v_lshlrev_b32_e32 v10, 8, v24
	s_waitcnt vmcnt(5)
	v_lshlrev_b32_e32 v23, 16, v25
	s_waitcnt vmcnt(3)
	v_lshlrev_b32_e32 v24, 8, v27
	v_or_b32_e32 v9, v10, v9
	v_lshlrev_b32_e32 v10, 24, v26
	s_delay_alu instid0(VALU_DEP_1)
	v_or3_b32 v9, v9, v23, v10
	s_waitcnt vmcnt(2)
	v_or3_b32 v10, 0, v28, v24
	s_waitcnt vmcnt(1)
	v_lshlrev_b32_e32 v23, 24, v34
	v_or3_b32 v9, v9, 0, 0
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_or3_b32 v24, v10, v29, v23
	v_or3_b32 v23, v9, 0, 0
.LBB1_58:                               ; %.loopexit
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	v_mov_b32_e32 v29, v33
	v_mov_b32_e32 v9, 0
	v_mov_b32_e32 v10, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s0, v29
	v_cmp_eq_u32_e64 s0, s0, v29
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_64
; %bb.59:                               ;   in Loop: Header=BB1_2 Depth=1
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[27:28], v30, s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[9:10], v30, s[2:3] offset:40
	global_load_b64 v[25:26], v30, s[2:3]
	s_mov_b32 s4, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v10, v10, v28
	v_and_b32_e32 v9, v9, v27
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v10, v10, 24
	v_mul_hi_u32 v34, v9, 24
	v_mul_lo_u32 v9, v9, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v10, v34, v10
	s_waitcnt vmcnt(0)
	v_add_co_u32 v9, vcc_lo, v25, v9
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v10, vcc_lo, v26, v10, vcc_lo
	global_load_b64 v[25:26], v[9:10], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[9:10], v30, v[25:28], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[9:10], v[27:28]
	s_cbranch_execz .LBB1_63
; %bb.60:                               ; %.preheader3.i.i19.preheader
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_mov_b32 s5, 0
.LBB1_61:                               ; %.preheader3.i.i19
                                        ;   Parent Loop BB1_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[25:26], v30, s[2:3] offset:40
	global_load_b64 v[34:35], v30, s[2:3]
	v_dual_mov_b32 v28, v10 :: v_dual_mov_b32 v27, v9
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v25, v25, v27
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[9:10], null, v25, 24, v[34:35]
	v_and_b32_e32 v34, v26, v28
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[25:26], null, v34, 24, v[10:11]
	v_mov_b32_e32 v10, v25
	global_load_b64 v[25:26], v[9:10], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[9:10], v30, v[25:28], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[27:28]
	s_or_b32 s5, vcc_lo, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s5
	s_cbranch_execnz .LBB1_61
; %bb.62:                               ; %Flow199
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
.LBB1_63:                               ; %Flow201
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s4
.LBB1_64:                               ; %.loopexit4.i.i14
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[34:35], v30, s[2:3] offset:40
	global_load_b128 v[25:28], v30, s[2:3]
	v_readfirstlane_b32 s4, v9
	v_readfirstlane_b32 s5, v10
	s_mov_b32 s15, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s6, v34
	v_readfirstlane_b32 s7, v35
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[6:7], s[4:5], s[6:7]
	s_mul_i32 s1, s7, 24
	s_mul_hi_u32 s13, s6, 24
	s_mul_i32 s14, s6, 24
	s_and_saveexec_b32 s16, s0
	s_cbranch_execz .LBB1_66
; %bb.65:                               ;   in Loop: Header=BB1_2 Depth=1
	s_add_i32 s17, s13, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v34, vcc_lo, v25, s14
	v_add_co_ci_u32_e32 v35, vcc_lo, s17, v26, vcc_lo
	v_dual_mov_b32 v9, s15 :: v_dual_mov_b32 v10, v30
	global_store_b128 v[34:35], v[9:12], off offset:8
.LBB1_66:                               ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s16
	v_cmp_lt_u64_e32 vcc_lo, 56, v[4:5]
	v_or_b32_e32 v9, 0, v1
	v_or_b32_e32 v10, v0, v6
	v_lshl_add_u32 v34, v31, 2, 28
	s_lshl_b64 s[6:7], s[6:7], 12
	s_delay_alu instid0(VALU_DEP_2)
	v_dual_cndmask_b32 v1, v9, v1 :: v_dual_cndmask_b32 v0, v10, v0
	v_lshlrev_b64 v[9:10], 6, v[29:30]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v27, vcc_lo, v27, s6
	v_and_b32_e32 v34, 0x1e0, v34
	v_add_co_ci_u32_e32 v28, vcc_lo, s7, v28, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v9, vcc_lo, v27, v9
	v_and_or_b32 v0, 0xffffff1f, v0, v34
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v10, vcc_lo, v28, v10, vcc_lo
	s_clause 0x3
	global_store_b128 v[9:10], v[0:3], off
	global_store_b128 v[9:10], v[13:16], off offset:16
	global_store_b128 v[9:10], v[17:20], off offset:32
	global_store_b128 v[9:10], v[21:24], off offset:48
	s_and_saveexec_b32 s6, s0
	s_cbranch_execz .LBB1_74
; %bb.67:                               ;   in Loop: Header=BB1_2 Depth=1
	s_clause 0x1
	global_load_b64 v[17:18], v30, s[2:3] offset:32 glc
	global_load_b64 v[0:1], v30, s[2:3] offset:40
	v_dual_mov_b32 v15, s4 :: v_dual_mov_b32 v16, s5
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s16, v0
	v_readfirstlane_b32 s17, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[16:17], s[16:17], s[4:5]
	s_mul_i32 s7, s17, 24
	s_mul_hi_u32 s15, s16, 24
	s_mul_i32 s16, s16, 24
	s_add_i32 s15, s15, s7
	v_add_co_u32 v13, vcc_lo, v25, s16
	v_add_co_ci_u32_e32 v14, vcc_lo, s15, v26, vcc_lo
	s_mov_b32 s7, exec_lo
	global_store_b64 v[13:14], v[17:18], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v30, v[15:18], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[2:3], v[17:18]
	s_cbranch_execz .LBB1_70
; %bb.68:                               ; %.preheader1.i.i17.preheader
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_mov_b32 s15, 0
.LBB1_69:                               ; %.preheader1.i.i17
                                        ;   Parent Loop BB1_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_dual_mov_b32 v0, s4 :: v_dual_mov_b32 v1, s5
	s_sleep 1
	global_store_b64 v[13:14], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[0:1], v30, v[0:3], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[2:3]
	v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0
	s_or_b32 s15, vcc_lo, s15
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s15
	s_cbranch_execnz .LBB1_69
.LBB1_70:                               ; %Flow197
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s7
	global_load_b64 v[0:1], v30, s[2:3] offset:16
	s_mov_b32 s15, exec_lo
	s_mov_b32 s7, exec_lo
	v_mbcnt_lo_u32_b32 v2, s15, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v2
	s_cbranch_execz .LBB1_72
; %bb.71:                               ;   in Loop: Header=BB1_2 Depth=1
	s_bcnt1_i32_b32 s15, s15
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v29, s15
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[0:1], v[29:30], off offset:8
.LBB1_72:                               ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s7
	s_waitcnt vmcnt(0)
	global_load_b64 v[2:3], v[0:1], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	s_cbranch_vccnz .LBB1_74
; %bb.73:                               ;   in Loop: Header=BB1_2 Depth=1
	global_load_b32 v29, v[0:1], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s7, v29
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[2:3], v[29:30], off
	s_and_b32 m0, s7, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB1_74:                               ; %Flow198
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	s_add_i32 s13, s13, s1
	v_add_co_u32 v0, vcc_lo, v25, s14
	v_add_co_ci_u32_e32 v1, vcc_lo, s13, v26, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB1_75:                               ;   Parent Loop BB1_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_77
; %bb.76:                               ;   in Loop: Header=BB1_75 Depth=2
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB1_77:                               ;   in Loop: Header=BB1_75 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB1_79
; %bb.78:                               ;   in Loop: Header=BB1_75 Depth=2
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB1_80
.LBB1_79:                               ;   in Loop: Header=BB1_75 Depth=2
	s_mov_b32 s1, -1
.LBB1_80:                               ; %Flow192
                                        ;   in Loop: Header=BB1_75 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB1_75
; %bb.81:                               ;   in Loop: Header=BB1_2 Depth=1
	global_load_b128 v[0:3], v[9:10], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_85
; %bb.82:                               ;   in Loop: Header=BB1_2 Depth=1
	s_clause 0x2
	global_load_b64 v[2:3], v30, s[2:3] offset:40
	global_load_b64 v[9:10], v30, s[2:3] offset:24 glc
	global_load_b64 v[15:16], v30, s[2:3]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v17, vcc_lo, v2, 1
	v_add_co_ci_u32_e32 v18, vcc_lo, 0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v13, vcc_lo, v17, s4
	v_add_co_ci_u32_e32 v14, vcc_lo, s5, v18, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[13:14]
	v_dual_cndmask_b32 v14, v14, v18 :: v_dual_cndmask_b32 v13, v13, v17
	v_and_b32_e32 v3, v14, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v2, v13, v2
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v17, v2, 24
	v_mul_lo_u32 v2, v2, 24
	v_add_nc_u32_e32 v3, v17, v3
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v2, vcc_lo, v15, v2
	v_mov_b32_e32 v15, v9
	v_add_co_ci_u32_e32 v3, vcc_lo, v16, v3, vcc_lo
	v_mov_b32_e32 v16, v10
	global_store_b64 v[2:3], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[15:16], v30, v[13:16], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[15:16], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_85
; %bb.83:                               ; %.preheader.i.i16.preheader
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_mov_b32 s0, 0
.LBB1_84:                               ; %.preheader.i.i16
                                        ;   Parent Loop BB1_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_sleep 1
	global_store_b64 v[2:3], v[15:16], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v30, v[13:16], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[15:16]
	v_dual_mov_b32 v16, v10 :: v_dual_mov_b32 v15, v9
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB1_84
.LBB1_85:                               ; %__ockl_hostcall_preview.exit20
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	v_sub_co_u32 v4, vcc_lo, v4, v31
	v_sub_co_ci_u32_e32 v5, vcc_lo, v5, v32, vcc_lo
	v_add_co_u32 v7, s0, v7, v31
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v8, s0, v8, v32, s0
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_or_b32 s12, vcc_lo, s12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s12
	s_cbranch_execnz .LBB1_2
; %bb.86:                               ; %Flow237
	s_or_b32 exec_lo, exec_lo, s12
                                        ; implicit-def: $vgpr10
.LBB1_87:                               ; %Flow253
	s_and_not1_saveexec_b32 s1, s10
	s_cbranch_execz .LBB1_116
; %bb.88:
	s_load_b64 s[2:3], s[8:9], 0x50
	s_waitcnt vmcnt(0)
	v_mbcnt_lo_u32_b32 v2, -1, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_readfirstlane_b32 s0, v2
	v_mov_b32_e32 v8, 0
	v_mov_b32_e32 v9, 0
	v_cmp_eq_u32_e64 s0, s0, v2
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB1_94
; %bb.89:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s5, exec_lo
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[5:6], v0, s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[3:4], v0, s[2:3] offset:40
	global_load_b64 v[7:8], v0, s[2:3]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v3, v3, v5
	v_and_b32_e32 v4, v4, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v9, v3, 24
	v_mul_lo_u32 v4, v4, 24
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v4, v9, v4
	s_waitcnt vmcnt(0)
	v_add_co_u32 v3, vcc_lo, v7, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, v8, v4, vcc_lo
	global_load_b64 v[3:4], v[3:4], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[8:9], v0, v[3:6], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[8:9], v[5:6]
	s_cbranch_execz .LBB1_93
; %bb.90:                               ; %.preheader3.i.i.preheader
	s_mov_b32 s6, 0
.LBB1_91:                               ; %.preheader3.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[3:4], v0, s[2:3] offset:40
	global_load_b64 v[11:12], v0, s[2:3]
	v_dual_mov_b32 v5, v8 :: v_dual_mov_b32 v6, v9
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v3, v3, v5
	v_and_b32_e32 v4, v4, v6
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[7:8], null, v3, 24, v[11:12]
	v_mov_b32_e32 v3, v8
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[8:9], null, v4, 24, v[3:4]
	global_load_b64 v[3:4], v[7:8], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[8:9], v0, v[3:6], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[8:9], v[5:6]
	s_or_b32 s6, vcc_lo, s6
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s6
	s_cbranch_execnz .LBB1_91
; %bb.92:                               ; %Flow249
	s_or_b32 exec_lo, exec_lo, s6
.LBB1_93:                               ; %Flow251
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s5
.LBB1_94:                               ; %.loopexit4.i.i
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s4
	v_mov_b32_e32 v3, 0
	v_readfirstlane_b32 s4, v8
	v_readfirstlane_b32 s5, v9
	s_mov_b32 s11, exec_lo
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[11:12], v3, s[2:3] offset:40
	global_load_b128 v[4:7], v3, s[2:3]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s6, v11
	v_readfirstlane_b32 s7, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[6:7], s[4:5], s[6:7]
	s_mul_i32 s8, s7, 24
	s_mul_hi_u32 s9, s6, 24
	s_mul_i32 s10, s6, 24
	s_and_saveexec_b32 s12, s0
	s_cbranch_execz .LBB1_96
; %bb.95:
	s_add_i32 s13, s9, s8
	s_waitcnt vmcnt(0)
	v_add_co_u32 v8, vcc_lo, v4, s10
	v_add_co_ci_u32_e32 v9, vcc_lo, s13, v5, vcc_lo
	v_dual_mov_b32 v11, s11 :: v_dual_mov_b32 v12, v3
	v_dual_mov_b32 v13, 2 :: v_dual_mov_b32 v14, 1
	global_store_b128 v[8:9], v[11:14], off offset:8
.LBB1_96:
	s_or_b32 exec_lo, exec_lo, s12
	s_lshl_b64 s[6:7], s[6:7], 12
	v_lshlrev_b64 v[8:9], 6, v[2:3]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v6, s6
	v_add_co_ci_u32_e32 v7, vcc_lo, s7, v7, vcc_lo
	s_mov_b32 s12, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v2, v8
	s_mov_b32 s13, s12
	s_mov_b32 s14, s12
	s_mov_b32 s15, s12
	v_and_or_b32 v0, 0xffffff1f, v10, 32
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v9, vcc_lo
	v_mov_b32_e32 v2, v3
	v_dual_mov_b32 v8, s12 :: v_dual_mov_b32 v11, s15
	v_dual_mov_b32 v9, s13 :: v_dual_mov_b32 v10, s14
	s_clause 0x3
	global_store_b128 v[6:7], v[0:3], off
	global_store_b128 v[6:7], v[8:11], off offset:16
	global_store_b128 v[6:7], v[8:11], off offset:32
	global_store_b128 v[6:7], v[8:11], off offset:48
	s_and_saveexec_b32 s6, s0
	s_cbranch_execz .LBB1_104
; %bb.97:
	v_mov_b32_e32 v10, 0
	s_mov_b32 s7, exec_lo
	s_clause 0x1
	global_load_b64 v[13:14], v10, s[2:3] offset:32 glc
	global_load_b64 v[0:1], v10, s[2:3] offset:40
	v_dual_mov_b32 v11, s4 :: v_dual_mov_b32 v12, s5
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v1, s5, v1
	v_and_b32_e32 v0, s4, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v1, v1, 24
	v_mul_hi_u32 v2, v0, 24
	v_mul_lo_u32 v0, v0, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v1, v2, v1
	v_add_co_u32 v8, vcc_lo, v4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v9, vcc_lo, v5, v1, vcc_lo
	global_store_b64 v[8:9], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v10, v[11:14], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[2:3], v[13:14]
	s_cbranch_execz .LBB1_100
; %bb.98:                               ; %.preheader1.i.i.preheader
	s_mov_b32 s11, 0
.LBB1_99:                               ; %.preheader1.i.i
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v0, s4 :: v_dual_mov_b32 v1, s5
	s_sleep 1
	global_store_b64 v[8:9], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[0:1], v10, v[0:3], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[2:3]
	v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0
	s_or_b32 s11, vcc_lo, s11
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s11
	s_cbranch_execnz .LBB1_99
.LBB1_100:                              ; %Flow247
	s_or_b32 exec_lo, exec_lo, s7
	v_mov_b32_e32 v3, 0
	s_mov_b32 s11, exec_lo
	s_mov_b32 s7, exec_lo
	v_mbcnt_lo_u32_b32 v2, s11, 0
	global_load_b64 v[0:1], v3, s[2:3] offset:16
	v_cmpx_eq_u32_e32 0, v2
	s_cbranch_execz .LBB1_102
; %bb.101:
	s_bcnt1_i32_b32 s11, s11
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v2, s11
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[0:1], v[2:3], off offset:8
.LBB1_102:
	s_or_b32 exec_lo, exec_lo, s7
	s_waitcnt vmcnt(0)
	global_load_b64 v[2:3], v[0:1], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	s_cbranch_vccnz .LBB1_104
; %bb.103:
	global_load_b32 v0, v[0:1], off offset:24
	v_mov_b32_e32 v1, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s7, v0
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[2:3], v[0:1], off
	s_and_b32 m0, s7, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB1_104:                              ; %Flow248
	s_or_b32 exec_lo, exec_lo, s6
	s_add_i32 s9, s9, s8
	v_add_co_u32 v0, vcc_lo, v4, s10
	v_add_co_ci_u32_e32 v1, vcc_lo, s9, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB1_105:                              ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s6, s0
	s_cbranch_execz .LBB1_107
; %bb.106:                              ;   in Loop: Header=BB1_105 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB1_107:                              ;   in Loop: Header=BB1_105 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s6, v2
	s_cmp_eq_u32 s6, 0
	s_cbranch_scc1 .LBB1_109
; %bb.108:                              ;   in Loop: Header=BB1_105 Depth=1
	s_mov_b32 s6, 0
	s_sleep 1
	s_branch .LBB1_110
.LBB1_109:                              ;   in Loop: Header=BB1_105 Depth=1
	s_mov_b32 s6, -1
.LBB1_110:                              ; %Flow242
                                        ;   in Loop: Header=BB1_105 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB1_105
; %bb.111:
	global_load_b128 v[0:3], v[6:7], off
	s_and_saveexec_b32 s6, s0
	s_cbranch_execz .LBB1_115
; %bb.112:
	v_mov_b32_e32 v8, 0
	s_clause 0x2
	global_load_b64 v[4:5], v8, s[2:3] offset:40
	global_load_b64 v[9:10], v8, s[2:3] offset:24 glc
	global_load_b64 v[6:7], v8, s[2:3]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v11, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v11, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v2, v4
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v4, 24
	v_mul_lo_u32 v4, v4, 24
	v_add_nc_u32_e32 v5, v11, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v10
	global_store_b64 v[6:7], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_115
; %bb.113:                              ; %.preheader.i.i.preheader
	s_mov_b32 s0, 0
.LBB1_114:                              ; %.preheader.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
	v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB1_114
.LBB1_115:                              ; %__ockl_hostcall_preview.exit
	s_or_b32 exec_lo, exec_lo, s6
.LBB1_116:                              ; %Flow254
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_setpc_b64 s[30:31]
.Lfunc_end1:
	.size	__ockl_printf_append_string_n, .Lfunc_end1-__ockl_printf_append_string_n
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Function info:
; codeLenInByte = 5708
; NumSgprs: 34
; NumVgprs: 36
; ScratchSize: 0
; MemoryBound: 0
	.text
	.protected	_Z13pmt_calculateddddPdS_S_dddiS_S_PiS_S0_i ; -- Begin function _Z13pmt_calculateddddPdS_S_dddiS_S_PiS_S0_i
	.globl	_Z13pmt_calculateddddPdS_S_dddiS_S_PiS_S0_i
	.p2align	8
	.type	_Z13pmt_calculateddddPdS_S_dddiS_S_PiS_S0_i,@function
_Z13pmt_calculateddddPdS_S_dddiS_S_PiS_S0_i: ; @_Z13pmt_calculateddddPdS_S_dddiS_S_PiS_S0_i
; %bb.0:
	s_mov_b64 s[18:19], s[0:1]
	s_load_b32 s0, s[0:1], 0x94
	s_load_b32 s1, s[18:19], 0x50
	s_add_u32 s34, s18, 0x88
	s_addc_u32 s35, s19, 0
	s_mov_b32 s32, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s0, s0, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[34:35], null, s15, s0, v[0:1]
	s_mov_b32 s0, exec_lo
	v_cmpx_gt_i32_e64 s1, v34
	s_cbranch_execz .LBB2_450
; %bb.1:
	s_load_b256 s[52:59], s[18:19], 0x58
	v_ashrrev_i32_e32 v35, 31, v34
	s_clause 0x1
	s_load_b512 s[36:51], s[18:19], 0x0
	s_load_b128 s[24:27], s[18:19], 0x40
	s_mov_b32 s10, -1
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, _Z14calculateAngledddddd@rel32@lo+4
	s_addc_u32 s1, s1, _Z14calculateAngledddddd@rel32@hi+12
	v_lshlrev_b64 v[49:50], 2, v[34:35]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s56, v49
	v_add_co_ci_u32_e32 v1, vcc_lo, s57, v50, vcc_lo
	v_dual_mov_b32 v10, s42 :: v_dual_mov_b32 v11, s43
	v_mov_b32_e32 v9, s41
	global_load_b32 v8, v[0:1], off
	v_lshlrev_b64 v[0:1], 3, v[34:35]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s44, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, s45, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s46, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s47, v1, vcc_lo
	v_add_co_u32 v6, vcc_lo, s48, v0
	v_add_co_ci_u32_e32 v7, vcc_lo, s49, v1, vcc_lo
	global_load_b64 v[0:1], v[2:3], off
	global_load_b64 v[2:3], v[4:5], off
	global_load_b64 v[4:5], v[6:7], off
	s_load_b64 s[44:45], s[18:19], 0x78
	v_mov_b32_e32 v7, 0x8a5d614f
	s_waitcnt vmcnt(3)
	v_xor_b32_e32 v6, 0x2c7f967f, v8
	v_cmp_lt_i32_e32 vcc_lo, -1, v8
	v_mov_b32_e32 v8, s40
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v6, 0x493c4aa1, v6
	v_cndmask_b32_e32 v7, 0xfa091aa4, v7, vcc_lo
	v_add_nc_u32_e32 v68, 0x1f123bb5, v7
	v_xor_b32_e32 v67, 0x5491333, v7
	s_delay_alu instid0(VALU_DEP_4)
	v_add_nc_u32_e32 v57, 0x75bcd15, v6
	v_xor_b32_e32 v70, 0x159a55e5, v6
	v_add_nc_u32_e32 v66, 0x583f19, v6
	v_add3_u32 v69, v6, v7, 0x64f0c9
	v_dual_mov_b32 v6, s38 :: v_dual_mov_b32 v7, s39
	s_swappc_b64 s[30:31], s[0:1]
	v_cmp_gt_f64_e64 s0, s[50:51], 0
	v_frexp_exp_i32_f64_e32 v63, s[36:37]
	v_dual_mov_b32 v43, v0 :: v_dual_mov_b32 v44, v1
	s_delay_alu instid0(VALU_DEP_3)
	s_and_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccnz .LBB2_3
; %bb.2:                                ; %.._crit_edge_crit_edge
	v_frexp_exp_i32_f64_e32 v0, s[36:37]
	s_mov_b32 s10, 0
	s_branch .LBB2_4
.LBB2_3:
                                        ; implicit-def: $vgpr0
.LBB2_4:                                ; %Flow845
	v_frexp_mant_f64_e64 v[51:52], |s[36:37]|
	v_cmp_class_f64_e64 s33, s[36:37], 0x204
	v_cmp_eq_f64_e64 s4, s[36:37], 0
	v_cmp_neq_f64_e64 s0, 0, v[43:44]
	v_mul_lo_u32 v58, 0x2710, v34
	v_mbcnt_lo_u32_b32 v59, -1, 0
	v_dual_mov_b32 v60, v66 :: v_dual_mov_b32 v61, v67
	v_dual_mov_b32 v40, v68 :: v_dual_mov_b32 v45, v70
	v_mov_b32_e32 v62, v69
	s_and_not1_b32 vcc_lo, exec_lo, s10
	s_cbranch_vccnz .LBB2_226
; %bb.5:                                ; %.lr.ph
	s_mov_b32 s3, 0x3fe55555
	s_mov_b32 s2, 0x55555555
	s_mov_b32 s6, 0x968915a9
	v_cmp_gt_f64_e32 vcc_lo, s[2:3], v[51:52]
	s_mov_b32 s8, 0x4222de17
	s_mov_b32 s7, 0x3fba6564
	s_mov_b32 s9, 0x3fbdee67
	s_mov_b32 s20, 0
	s_mov_b32 s48, 0
	s_mov_b32 s46, s20
	v_mov_b32_e32 v41, 2
	v_cndmask_b32_e64 v0, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[0:1], v[51:52], v0
	v_add_f64 v[2:3], v[0:1], 1.0
	v_add_f64 v[8:9], v[0:1], -1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[4:5], v[2:3]
	v_add_f64 v[10:11], v[2:3], -1.0
	v_add_f64 v[0:1], v[0:1], -v[10:11]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[6:7], -v[2:3], v[4:5], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[4:5], v[6:7], v[4:5], v[4:5]
	v_fma_f64 v[6:7], -v[2:3], v[4:5], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[4:5], v[6:7], v[4:5], v[4:5]
	v_mul_f64 v[6:7], v[8:9], v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[12:13], v[2:3], v[6:7]
	v_fma_f64 v[2:3], v[6:7], v[2:3], -v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[0:1], v[6:7], v[0:1], v[2:3]
	v_add_f64 v[2:3], v[12:13], v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[10:11], v[8:9], -v[2:3]
	v_add_f64 v[12:13], v[2:3], -v[12:13]
	v_add_f64 v[8:9], v[8:9], -v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[0:1], v[12:13], -v[0:1]
	v_add_f64 v[2:3], v[8:9], -v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[0:1], v[0:1], v[2:3]
	v_add_f64 v[0:1], v[10:11], v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[0:1], v[4:5], v[0:1]
	v_add_f64 v[2:3], v[6:7], v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[4:5], v[2:3], -v[6:7]
	v_mul_f64 v[6:7], v[2:3], v[2:3]
	v_add_f64 v[0:1], v[0:1], -v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[4:5], v[2:3], v[2:3], -v[6:7]
	v_add_f64 v[8:9], v[0:1], v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[4:5], v[2:3], v[8:9], v[4:5]
	v_add_f64 v[8:9], v[6:7], v[4:5]
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[10:11], v[8:9], s[8:9], s[6:7]
	s_mov_b32 s6, 0x3abe935a
	s_mov_b32 s7, 0x3fbe25e4
	v_add_f64 v[6:7], v[8:9], -v[6:7]
	v_mul_f64 v[16:17], v[2:3], v[8:9]
	s_mov_b32 s8, 0x652b82fe
	s_mov_b32 s9, 0x3ff71547
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[10:11], v[8:9], v[10:11], s[6:7]
	s_mov_b32 s6, 0x47e6c9c2
	s_mov_b32 s7, 0x3fc110ef
	v_add_f64 v[4:5], v[4:5], -v[6:7]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[10:11], v[8:9], v[10:11], s[6:7]
	s_mov_b32 s6, 0xcfa74449
	s_mov_b32 s7, 0x3fc3b13b
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[10:11], v[8:9], v[10:11], s[6:7]
	s_mov_b32 s6, 0x71bf3c30
	s_mov_b32 s7, 0x3fc745d1
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[10:11], v[8:9], v[10:11], s[6:7]
	s_mov_b32 s6, 0x1c7792ce
	s_mov_b32 s7, 0x3fcc71c7
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[10:11], v[8:9], v[10:11], s[6:7]
	s_mov_b32 s6, 0x924920da
	s_mov_b32 s7, 0x3fd24924
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[10:11], v[8:9], v[10:11], s[6:7]
	s_mov_b32 s6, 0x9999999c
	s_mov_b32 s7, 0x3fd99999
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[10:11], v[8:9], v[10:11], s[6:7]
	s_mov_b32 s7, 0x3c7abc9e
	s_mov_b32 s6, 0x3b39803f
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[12:13], v[8:9], v[10:11]
	v_fma_f64 v[6:7], v[8:9], v[10:11], -v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[6:7], v[4:5], v[10:11], v[6:7]
	v_add_f64 v[10:11], v[12:13], v[6:7]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[14:15], v[10:11], s[2:3]
	v_add_f64 v[12:13], v[10:11], -v[12:13]
	s_mov_b32 s3, 0xbfe55555
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_add_f64 v[18:19], v[14:15], s[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_add_f64 v[6:7], v[6:7], -v[12:13]
	v_fma_f64 v[12:13], v[8:9], v[2:3], -v[16:17]
	s_mov_b32 s2, 0xd5df274d
	s_mov_b32 s3, 0x3c8543b0
	v_add_f64 v[10:11], v[10:11], -v[18:19]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[6:7], v[6:7], s[2:3]
	v_fma_f64 v[8:9], v[8:9], v[0:1], v[12:13]
	s_mov_b32 s3, 0x3fe62e42
	s_mov_b32 s2, 0xfefa39ef
	v_ldexp_f64 v[0:1], v[0:1], 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[6:7], v[6:7], v[10:11]
	v_fma_f64 v[4:5], v[4:5], v[2:3], v[8:9]
	v_ldexp_f64 v[2:3], v[2:3], 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[8:9], v[14:15], v[6:7]
	v_add_f64 v[10:11], v[16:17], v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[12:13], v[14:15], -v[8:9]
	v_mul_f64 v[14:15], v[10:11], v[8:9]
	v_add_f64 v[16:17], v[10:11], -v[16:17]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[6:7], v[6:7], v[12:13]
	v_fma_f64 v[12:13], v[10:11], v[8:9], -v[14:15]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[4:5], v[4:5], -v[16:17]
	v_fma_f64 v[6:7], v[10:11], v[6:7], v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[4:5], v[4:5], v[8:9], v[6:7]
	v_subrev_co_ci_u32_e32 v8, vcc_lo, 0, v63, vcc_lo
	v_cvt_f64_i32_e32 v[8:9], v8
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[6:7], v[14:15], v[4:5]
	v_add_f64 v[10:11], v[2:3], v[6:7]
	v_add_f64 v[12:13], v[6:7], -v[14:15]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[14:15], v[8:9], s[2:3]
	v_add_f64 v[2:3], v[10:11], -v[2:3]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[4:5], v[4:5], -v[12:13]
	v_fma_f64 v[12:13], v[8:9], s[2:3], -v[14:15]
	s_mov_b32 s3, 0xbfe62e42
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[2:3], v[6:7], -v[2:3]
	v_add_f64 v[0:1], v[0:1], v[4:5]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[4:5], v[8:9], s[6:7], v[12:13]
	s_mov_b32 s7, 0xbc7abc9e
	v_add_f64 v[0:1], v[0:1], v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[2:3], v[14:15], v[4:5]
	v_add_f64 v[6:7], v[10:11], v[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[14:15], v[2:3], -v[14:15]
	v_add_f64 v[8:9], v[2:3], v[6:7]
	v_add_f64 v[10:11], v[6:7], -v[10:11]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[4:5], v[4:5], -v[14:15]
	v_add_f64 v[12:13], v[8:9], -v[2:3]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[0:1], v[0:1], -v[10:11]
	v_add_f64 v[16:17], v[8:9], -v[12:13]
	v_add_f64 v[6:7], v[6:7], -v[12:13]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[10:11], v[4:5], v[0:1]
	v_add_f64 v[2:3], v[2:3], -v[16:17]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[2:3], v[6:7], v[2:3]
	v_add_f64 v[6:7], v[10:11], -v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[2:3], v[10:11], v[2:3]
	v_add_f64 v[10:11], v[10:11], -v[6:7]
	v_add_f64 v[0:1], v[0:1], -v[6:7]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[12:13], v[8:9], v[2:3]
	v_add_f64 v[4:5], v[4:5], -v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[6:7], v[12:13], -v[8:9]
	v_add_f64 v[0:1], v[0:1], v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[2:3], v[2:3], -v[6:7]
	v_add_f64 v[0:1], v[0:1], v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[2:3], v[12:13], v[0:1]
	v_add_f64 v[4:5], v[2:3], -v[12:13]
	v_mul_f64 v[6:7], 0x40080000, v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[0:1], v[0:1], -v[4:5]
	v_fma_f64 v[2:3], 0x40080000, v[2:3], -v[6:7]
	v_cmp_class_f64_e64 vcc_lo, v[6:7], 0x204
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[0:1], 0x40080000, v[0:1], v[2:3]
	v_add_f64 v[2:3], v[6:7], v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v5, v3, v7 :: v_dual_cndmask_b32 v4, v2, v6
	v_add_f64 v[2:3], v[2:3], -v[6:7]
	v_mul_f64 v[8:9], v[4:5], s[8:9]
	v_cmp_nlt_f64_e64 s1, 0x40900000, v[4:5]
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[4:5]|
	s_mov_b32 s8, 0x33333333
	s_mov_b32 s9, 0x4031b333
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[0:1], v[0:1], -v[2:3]
	v_rndne_f64_e32 v[8:9], v[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v1, 0, v1 :: v_dual_cndmask_b32 v0, 0, v0
	v_fma_f64 v[10:11], v[8:9], s[2:3], v[4:5]
	s_mov_b32 s2, 0xfca7ab0c
	s_mov_b32 s3, 0x3e928af3
	v_cvt_i32_f64_e32 v14, v[8:9]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[10:11], v[8:9], s[6:7], v[10:11]
	s_mov_b32 s6, 0x6a5dcb37
	s_mov_b32 s7, 0x3e5ade15
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[12:13], v[10:11], s[6:7], s[2:3]
	s_mov_b32 s2, 0x623fde64
	s_mov_b32 s3, 0x3ec71dee
	s_mov_b32 s6, 0xe169d036
	s_mov_b32 s7, 0x40092256
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[12:13], v[10:11], v[12:13], s[2:3]
	s_mov_b32 s2, 0x7c89e6b0
	s_mov_b32 s3, 0x3efa0199
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[12:13], v[10:11], v[12:13], s[2:3]
	s_mov_b32 s2, 0x14761f6e
	s_mov_b32 s3, 0x3f2a01a0
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[12:13], v[10:11], v[12:13], s[2:3]
	s_mov_b32 s2, 0x1852b7b0
	s_mov_b32 s3, 0x3f56c16c
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[12:13], v[10:11], v[12:13], s[2:3]
	s_mov_b32 s2, 0x11122322
	s_mov_b32 s3, 0x3f811111
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[12:13], v[10:11], v[12:13], s[2:3]
	s_mov_b32 s2, 0x555502a1
	s_mov_b32 s3, 0x3fa55555
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[12:13], v[10:11], v[12:13], s[2:3]
	s_mov_b32 s2, 0x55555511
	s_mov_b32 s3, 0x3fc55555
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[12:13], v[10:11], v[12:13], s[2:3]
	s_mov_b32 s2, 11
	s_mov_b32 s3, 0x3fe00000
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[12:13], v[10:11], v[12:13], s[2:3]
	v_cmp_ngt_f64_e64 s2, 0xc090cc00, v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[12:13], v[10:11], v[12:13], 1.0
	s_and_b32 vcc_lo, s2, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[8:9], v[10:11], v[12:13], 1.0
	v_ldexp_f64 v[6:7], v[8:9], v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v2, 0x7ff00000, v7, s1
	v_cndmask_b32_e64 v3, 0, v2, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v2, 0, v6, vcc_lo
	v_div_scale_f64 v[6:7], null, s[8:9], s[8:9], s[36:37]
	v_fma_f64 v[0:1], v[2:3], v[0:1], v[2:3]
	v_cmp_class_f64_e64 vcc_lo, v[2:3], 0x204
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_rcp_f64_e32 v[12:13], v[6:7]
	v_dual_cndmask_b32 v1, v1, v3 :: v_dual_cndmask_b32 v0, v0, v2
	s_or_b32 vcc_lo, s4, s33
	s_and_b32 s1, s4, exec_lo
	s_cselect_b32 s1, 0, 0x7ff00000
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_bfi_b32 v1, 0x7fffffff, v1, s37
	v_mov_b32_e32 v4, s37
	v_cndmask_b32_e64 v0, v0, 0, vcc_lo
	v_bfi_b32 v2, 0x7fffffff, s1, v4
	v_div_scale_f64 v[4:5], null, s[6:7], s[6:7], v[43:44]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v1, v1, v2, vcc_lo
	v_div_scale_f64 v[2:3], null, 0x40b5e000, 0x40b5e000, v[0:1]
	v_div_scale_f64 v[20:21], vcc_lo, v[0:1], 0x40b5e000, v[0:1]
	s_delay_alu instid0(TRANS32_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[18:19], -v[6:7], v[12:13], 1.0
	v_rcp_f64_e32 v[10:11], v[4:5]
	v_rcp_f64_e32 v[8:9], v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	v_fma_f64 v[12:13], v[12:13], v[18:19], v[12:13]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[16:17], -v[4:5], v[10:11], 1.0
	v_fma_f64 v[14:15], -v[2:3], v[8:9], 1.0
	v_fma_f64 v[18:19], -v[6:7], v[12:13], 1.0
	v_fma_f64 v[10:11], v[10:11], v[16:17], v[10:11]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[8:9], v[8:9], v[14:15], v[8:9]
	v_fma_f64 v[12:13], v[12:13], v[18:19], v[12:13]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[16:17], -v[4:5], v[10:11], 1.0
	v_fma_f64 v[14:15], -v[2:3], v[8:9], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[10:11], v[10:11], v[16:17], v[10:11]
	v_div_scale_f64 v[16:17], s2, s[36:37], s[8:9], s[36:37]
	v_fma_f64 v[8:9], v[8:9], v[14:15], v[8:9]
	v_div_scale_f64 v[14:15], s1, v[43:44], s[6:7], v[43:44]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[24:25], v[16:17], v[12:13]
	v_mul_f64 v[18:19], v[20:21], v[8:9]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[22:23], v[14:15], v[10:11]
	v_fma_f64 v[6:7], -v[6:7], v[24:25], v[16:17]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[2:3], -v[2:3], v[18:19], v[20:21]
	v_fma_f64 v[4:5], -v[4:5], v[22:23], v[14:15]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_div_fmas_f64 v[2:3], v[2:3], v[8:9], v[18:19]
	s_mov_b32 vcc_lo, s1
	v_add_co_u32 v53, s1, s44, v49
	v_div_fmas_f64 v[4:5], v[4:5], v[10:11], v[22:23]
	s_mov_b32 vcc_lo, s2
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, .str.2@rel32@lo+4
	s_addc_u32 s3, s3, .str.2@rel32@hi+12
	v_div_fmas_f64 v[6:7], v[6:7], v[12:13], v[24:25]
	v_cmp_neq_f64_e32 vcc_lo, 0, v[0:1]
	s_cmp_lg_u64 s[2:3], 0
	v_add_co_ci_u32_e64 v54, s1, s45, v50, s1
	s_cselect_b32 s38, 30, 0
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, .str.1@rel32@lo+4
	s_addc_u32 s3, s3, .str.1@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u64 s[2:3], 0
	s_cselect_b32 s39, 17, 0
	s_and_b32 s1, s4, exec_lo
	v_div_fixup_f64 v[2:3], v[2:3], 0x40b5e000, v[0:1]
	v_div_fixup_f64 v[4:5], v[4:5], s[6:7], v[43:44]
	v_div_fixup_f64 v[6:7], v[6:7], s[8:9], s[36:37]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[2:3], 0x40590000, v[2:3]
	v_mul_f64 v[4:5], 0x40668000, v[4:5]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[6:7], 0x40690000, v[6:7]
	v_ceil_f64_e32 v[2:3], v[2:3]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ceil_f64_e32 v[4:5], v[4:5]
	v_ceil_f64_e32 v[6:7], v[6:7]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cvt_i32_f64_e32 v2, v[2:3]
	v_cvt_i32_f64_e32 v4, v[4:5]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cvt_i32_f64_e32 v5, v[6:7]
	v_readfirstlane_b32 s4, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v37, 1, v4, s0
	v_mov_b32_e32 v38, 0
	v_readfirstlane_b32 s0, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_nc_u32_e32 v1, -1, v37
	v_min_i32_e32 v0, 0xb4, v37
	v_max_i32_e32 v3, 1, v37
	s_cselect_b32 s0, 1, s0
	v_mov_b32_e32 v36, 33
	s_min_i32 s1, s0, 0xc8
	v_add_nc_u32_e32 v0, -1, v0
	s_mulk_i32 s1, 0xb4
	v_add_nc_u32_e32 v2, 0xffffff4b, v37
	s_addk_i32 s1, 0xff4c
	s_cmp_gt_i32 s0, 0
	v_cmp_lt_i32_e64 s0, 0, v37
	s_cselect_b32 s5, s1, 0
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, .str@rel32@lo+4
	s_addc_u32 s3, s3, .str@rel32@hi+12
	v_cmp_lt_u32_e64 s1, 0xffffff4b, v2
	s_cmp_lg_u64 s[2:3], 0
	v_cndmask_b32_e64 v0, 0, v0, s0
	s_cselect_b32 s40, 15, 0
	s_and_b32 s2, vcc_lo, exec_lo
	v_cmp_lt_u32_e64 s0, 0xb3, v1
	v_add_nc_u32_e32 v1, -1, v3
	s_cselect_b32 s41, s4, 1
	v_cmp_gt_i32_e32 vcc_lo, 0xb5, v37
	v_add_nc_u32_e32 v0, s5, v0
	s_add_i32 s2, s41, -1
	v_mov_b32_e32 v48, v38
	s_cmpk_gt_u32 s2, 0x63
	v_cndmask_b32_e32 v1, 0xb3, v1, vcc_lo
	s_mul_i32 s2, s41, 0xb4
	s_cselect_b32 s3, -1, 0
	v_mul_lo_u32 v64, 0xbb8, v0
	v_add_nc_u32_e32 v0, s2, v37
	s_or_b32 s42, s3, s0
	s_cmp_lg_u32 s41, 1
	v_add3_u32 v1, 0xffffff4c, s2, v1
	s_cselect_b32 s0, -1, 0
	v_mad_u64_u32 v[55:56], null, v0, 33, 0xffffffffffffe8ab
	s_or_b32 s43, s0, s1
	s_cmp_lt_i32 s41, 2
	v_dual_mov_b32 v42, 1 :: v_dual_mov_b32 v47, v37
	v_lshl_add_u32 v65, v1, 5, v1
	s_cselect_b32 s0, -1, 0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s47, s0, s1
.LBB2_6:                                ; %_Z10r3_findBind.exit.i.i39
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB2_14 Depth 2
                                        ;     Child Loop BB2_22 Depth 2
                                        ;     Child Loop BB2_28 Depth 2
                                        ;     Child Loop BB2_37 Depth 2
                                        ;     Child Loop BB2_45 Depth 2
                                        ;     Child Loop BB2_53 Depth 2
                                        ;     Child Loop BB2_59 Depth 2
                                        ;     Child Loop BB2_68 Depth 2
                                        ;     Child Loop BB2_72 Depth 2
                                        ;     Child Loop BB2_80 Depth 2
                                        ;     Child Loop BB2_86 Depth 2
                                        ;     Child Loop BB2_95 Depth 2
                                        ;     Child Loop BB2_99 Depth 2
                                        ;     Child Loop BB2_107 Depth 2
                                        ;     Child Loop BB2_113 Depth 2
                                        ;     Child Loop BB2_122 Depth 2
                                        ;     Child Loop BB2_127 Depth 2
                                        ;     Child Loop BB2_138 Depth 2
                                        ;     Child Loop BB2_149 Depth 2
                                        ;     Child Loop BB2_159 Depth 2
                                        ;       Child Loop BB2_160 Depth 3
                                        ;       Child Loop BB2_170 Depth 3
                                        ;       Child Loop BB2_178 Depth 3
                                        ;       Child Loop BB2_184 Depth 3
                                        ;       Child Loop BB2_193 Depth 3
                                        ;       Child Loop BB2_197 Depth 3
                                        ;       Child Loop BB2_205 Depth 3
                                        ;       Child Loop BB2_211 Depth 3
                                        ;       Child Loop BB2_220 Depth 3
                                        ; implicit-def: $vgpr71
                                        ; implicit-def: $vgpr60
                                        ; implicit-def: $vgpr61
                                        ; implicit-def: $vgpr40
                                        ; implicit-def: $vgpr45
                                        ; implicit-def: $vgpr62
	s_and_saveexec_b32 s0, s42
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s49, exec_lo, s0
	s_cbranch_execz .LBB2_147
; %bb.7:                                ;   in Loop: Header=BB2_6 Depth=1
                                        ; implicit-def: $vgpr71
                                        ; implicit-def: $vgpr60
                                        ; implicit-def: $vgpr61
                                        ; implicit-def: $vgpr40
                                        ; implicit-def: $vgpr45
                                        ; implicit-def: $vgpr62
	s_and_saveexec_b32 s0, s43
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s56, exec_lo, s0
	s_cbranch_execz .LBB2_136
; %bb.8:                                ;   in Loop: Header=BB2_6 Depth=1
                                        ; implicit-def: $sgpr1
                                        ; implicit-def: $vgpr60
                                        ; implicit-def: $vgpr61
                                        ; implicit-def: $vgpr40
                                        ; implicit-def: $vgpr45
                                        ; implicit-def: $vgpr62
	s_and_saveexec_b32 s0, s47
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s57, exec_lo, s0
	s_cbranch_execz .LBB2_125
; %bb.9:                                ;   in Loop: Header=BB2_6 Depth=1
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, _ZZ11get_npe_numiiPdP12hiprandStateE7warning@rel32@lo+4
	s_addc_u32 s3, s3, _ZZ11get_npe_numiiPdP12hiprandStateE7warning@rel32@hi+12
	global_load_b64 v[0:1], v38, s[2:3]
	s_waitcnt vmcnt(0)
	v_cmp_lt_i64_e32 vcc_lo, 8, v[0:1]
	v_add_co_u32 v0, s0, v0, 1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v1, s0, 0, v1, s0
	global_store_b64 v38, v[0:1], s[2:3]
	s_cbranch_vccz .LBB2_40
; %bb.10:                               ;   in Loop: Header=BB2_6 Depth=1
	v_cmp_ne_u64_e32 vcc_lo, 10, v[0:1]
	s_cbranch_vccnz .LBB2_39
; %bb.11:                               ;   in Loop: Header=BB2_6 Depth=1
	s_load_b64 s[2:3], s[34:35], 0x50
	v_dual_mov_b32 v37, v59 :: v_dual_mov_b32 v4, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s0, v37
	v_mov_b32_e32 v5, 0
	v_cmp_eq_u32_e64 s0, s0, v37
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_17
; %bb.12:                               ;   in Loop: Header=BB2_6 Depth=1
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[2:3], v38, s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[0:1], v38, s[2:3] offset:40
	global_load_b64 v[4:5], v38, s[2:3]
	s_mov_b32 s4, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v3
	v_and_b32_e32 v0, v0, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v1, v1, 24
	v_mul_hi_u32 v6, v0, 24
	v_mul_lo_u32 v0, v0, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v1, v6, v1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v0, vcc_lo, v4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, v5, v1, vcc_lo
	global_load_b64 v[0:1], v[0:1], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[4:5], v38, v[0:3], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[4:5], v[2:3]
	s_cbranch_execz .LBB2_16
; %bb.13:                               ; %.preheader3.i.i.i85.i.i.i102.preheader
                                        ;   in Loop: Header=BB2_6 Depth=1
	s_mov_b32 s5, 0
.LBB2_14:                               ; %.preheader3.i.i.i85.i.i.i102
                                        ;   Parent Loop BB2_6 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[0:1], v38, s[2:3] offset:40
	global_load_b64 v[6:7], v38, s[2:3]
	v_dual_mov_b32 v2, v4 :: v_dual_mov_b32 v3, v5
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v0, v0, v2
	v_and_b32_e32 v1, v1, v3
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[4:5], null, v0, 24, v[6:7]
	v_mov_b32_e32 v0, v5
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v1, 24, v[0:1]
	global_load_b64 v[0:1], v[4:5], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[4:5], v38, v[0:3], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[4:5], v[2:3]
	s_or_b32 s5, vcc_lo, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s5
	s_cbranch_execnz .LBB2_14
; %bb.15:                               ; %Flow771
                                        ;   in Loop: Header=BB2_6 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
.LBB2_16:                               ; %Flow773
                                        ;   in Loop: Header=BB2_6 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s4
.LBB2_17:                               ; %.loopexit4.i.i.i80.i.i.i95
                                        ;   in Loop: Header=BB2_6 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[6:7], v38, s[2:3] offset:40
	global_load_b128 v[0:3], v38, s[2:3]
	v_readfirstlane_b32 s4, v4
	v_readfirstlane_b32 s5, v5
	s_mov_b32 s10, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s6, v6
	v_readfirstlane_b32 s7, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[6:7], s[4:5], s[6:7]
	s_mul_i32 s1, s7, 24
	s_mul_hi_u32 s8, s6, 24
	s_mul_i32 s9, s6, 24
	s_and_saveexec_b32 s11, s0
	s_cbranch_execz .LBB2_19
; %bb.18:                               ;   in Loop: Header=BB2_6 Depth=1
	s_add_i32 s12, s8, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v4, vcc_lo, v0, s9
	v_add_co_ci_u32_e32 v5, vcc_lo, s12, v1, vcc_lo
	v_dual_mov_b32 v39, s10 :: v_dual_mov_b32 v40, v38
	global_store_b128 v[4:5], v[39:42], off offset:8
.LBB2_19:                               ;   in Loop: Header=BB2_6 Depth=1
	s_or_b32 exec_lo, exec_lo, s11
	s_lshl_b64 s[6:7], s[6:7], 12
	v_lshlrev_b64 v[4:5], 6, v[37:38]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s6
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v3, vcc_lo
	s_mov_b32 s21, s20
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v2, v4
	s_mov_b32 s22, s20
	s_mov_b32 s23, s20
	v_add_co_ci_u32_e32 v7, vcc_lo, v3, v5, vcc_lo
	v_dual_mov_b32 v37, v38 :: v_dual_mov_b32 v2, s20
	v_dual_mov_b32 v39, v38 :: v_dual_mov_b32 v4, s22
	v_mov_b32_e32 v3, s21
	v_mov_b32_e32 v5, s23
	s_clause 0x3
	global_store_b128 v[6:7], v[36:39], off
	global_store_b128 v[6:7], v[2:5], off offset:16
	global_store_b128 v[6:7], v[2:5], off offset:32
	global_store_b128 v[6:7], v[2:5], off offset:48
	s_and_saveexec_b32 s6, s0
	s_cbranch_execz .LBB2_27
; %bb.20:                               ;   in Loop: Header=BB2_6 Depth=1
	s_clause 0x1
	global_load_b64 v[12:13], v38, s[2:3] offset:32 glc
	global_load_b64 v[2:3], v38, s[2:3] offset:40
	s_mov_b32 s7, exec_lo
	v_dual_mov_b32 v10, s4 :: v_dual_mov_b32 v11, s5
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v3, s5, v3
	v_and_b32_e32 v2, s4, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v3, v3, 24
	v_mul_hi_u32 v4, v2, 24
	v_mul_lo_u32 v2, v2, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v4, v3
	v_add_co_u32 v8, vcc_lo, v0, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v9, vcc_lo, v1, v3, vcc_lo
	global_store_b64 v[8:9], v[12:13], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v38, v[10:13], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[12:13]
	s_cbranch_execz .LBB2_23
; %bb.21:                               ; %.preheader1.i.i.i83.i.i.i100.preheader
                                        ;   in Loop: Header=BB2_6 Depth=1
	s_mov_b32 s10, 0
.LBB2_22:                               ; %.preheader1.i.i.i83.i.i.i100
                                        ;   Parent Loop BB2_6 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_dual_mov_b32 v2, s4 :: v_dual_mov_b32 v3, s5
	s_sleep 1
	global_store_b64 v[8:9], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v38, v[2:5], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s10, vcc_lo, s10
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s10
	s_cbranch_execnz .LBB2_22
.LBB2_23:                               ; %Flow769
                                        ;   in Loop: Header=BB2_6 Depth=1
	s_or_b32 exec_lo, exec_lo, s7
	global_load_b64 v[2:3], v38, s[2:3] offset:16
	s_mov_b32 s10, exec_lo
	s_mov_b32 s7, exec_lo
	v_mbcnt_lo_u32_b32 v4, s10, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB2_25
; %bb.24:                               ;   in Loop: Header=BB2_6 Depth=1
	s_bcnt1_i32_b32 s10, s10
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v37, s10
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[37:38], off offset:8
.LBB2_25:                               ;   in Loop: Header=BB2_6 Depth=1
	s_or_b32 exec_lo, exec_lo, s7
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB2_27
; %bb.26:                               ;   in Loop: Header=BB2_6 Depth=1
	global_load_b32 v37, v[2:3], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s7, v37
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[37:38], off
	s_and_b32 m0, s7, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB2_27:                               ; %Flow770
                                        ;   in Loop: Header=BB2_6 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	s_add_i32 s8, s8, s1
	v_add_co_u32 v0, vcc_lo, v0, s9
	v_add_co_ci_u32_e32 v1, vcc_lo, s8, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB2_28:                               ;   Parent Loop BB2_6 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_30
; %bb.29:                               ;   in Loop: Header=BB2_28 Depth=2
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB2_30:                               ;   in Loop: Header=BB2_28 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB2_32
; %bb.31:                               ;   in Loop: Header=BB2_28 Depth=2
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB2_33
.LBB2_32:                               ;   in Loop: Header=BB2_28 Depth=2
	s_mov_b32 s1, -1
.LBB2_33:                               ; %Flow764
                                        ;   in Loop: Header=BB2_28 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB2_28
; %bb.34:                               ;   in Loop: Header=BB2_6 Depth=1
	global_load_b64 v[0:1], v[6:7], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_38
; %bb.35:                               ;   in Loop: Header=BB2_6 Depth=1
	s_clause 0x2
	global_load_b64 v[4:5], v38, s[2:3] offset:40
	global_load_b64 v[8:9], v38, s[2:3] offset:24 glc
	global_load_b64 v[6:7], v38, s[2:3]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v10, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v11, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v10, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v11, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v11 :: v_dual_cndmask_b32 v2, v2, v10
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v4, v2, v4
	v_mul_hi_u32 v10, v4, 24
	v_mul_lo_u32 v4, v4, 24
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v8
	v_mul_lo_u32 v5, v5, 24
	v_add_nc_u32_e32 v5, v10, v5
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v9
	global_store_b64 v[6:7], v[8:9], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v38, v[2:5], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[8:9]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB2_38
; %bb.36:                               ; %.preheader.i.i.i82.i.i.i99.preheader
                                        ;   in Loop: Header=BB2_6 Depth=1
	s_mov_b32 s0, 0
.LBB2_37:                               ; %.preheader.i.i.i82.i.i.i99
                                        ;   Parent Loop BB2_6 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[8:9], v38, v[2:5], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[8:9], v[4:5]
	v_dual_mov_b32 v4, v8 :: v_dual_mov_b32 v5, v9
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB2_37
.LBB2_38:                               ; %__ockl_printf_begin.exit86.i.i.i97
                                        ;   in Loop: Header=BB2_6 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_add_u32 s8, s18, 0x88
	s_addc_u32 s9, s19, 0
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str.2@rel32@lo+4
	s_addc_u32 s1, s1, .str.2@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	v_dual_mov_b32 v2, s0 :: v_dual_mov_b32 v3, s1
	v_dual_mov_b32 v4, s38 :: v_dual_mov_b32 v5, v38
	v_mov_b32_e32 v6, v42
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __ockl_printf_append_string_n@rel32@lo+4
	s_addc_u32 s3, s3, __ockl_printf_append_string_n@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[2:3]
.LBB2_39:                               ; %Flow774
                                        ;   in Loop: Header=BB2_6 Depth=1
	s_mov_b32 s0, 0
	s_mov_b32 s1, 0
	s_branch .LBB2_41
.LBB2_40:                               ;   in Loop: Header=BB2_6 Depth=1
	s_mov_b32 s0, -1
                                        ; implicit-def: $sgpr1
.LBB2_41:                               ; %Flow819
                                        ;   in Loop: Header=BB2_6 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccnz .LBB2_124
; %bb.42:                               ;   in Loop: Header=BB2_6 Depth=1
	s_load_b64 s[28:29], s[34:35], 0x50
	v_dual_mov_b32 v37, v59 :: v_dual_mov_b32 v4, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s0, v37
	v_mov_b32_e32 v5, 0
	v_cmp_eq_u32_e64 s0, s0, v37
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_48
; %bb.43:                               ;   in Loop: Header=BB2_6 Depth=1
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[2:3], v38, s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[0:1], v38, s[28:29] offset:40
	global_load_b64 v[4:5], v38, s[28:29]
	s_mov_b32 s2, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v3
	v_and_b32_e32 v0, v0, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v1, v1, 24
	v_mul_hi_u32 v6, v0, 24
	v_mul_lo_u32 v0, v0, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v1, v6, v1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v0, vcc_lo, v4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, v5, v1, vcc_lo
	global_load_b64 v[0:1], v[0:1], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[4:5], v38, v[0:3], s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[4:5], v[2:3]
	s_cbranch_execz .LBB2_47
; %bb.44:                               ; %.preheader3.i.i.i.i.i.i123.preheader
                                        ;   in Loop: Header=BB2_6 Depth=1
	s_mov_b32 s3, 0
.LBB2_45:                               ; %.preheader3.i.i.i.i.i.i123
                                        ;   Parent Loop BB2_6 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[0:1], v38, s[28:29] offset:40
	global_load_b64 v[6:7], v38, s[28:29]
	v_dual_mov_b32 v2, v4 :: v_dual_mov_b32 v3, v5
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v0, v0, v2
	v_and_b32_e32 v1, v1, v3
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[4:5], null, v0, 24, v[6:7]
	v_mov_b32_e32 v0, v5
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v1, 24, v[0:1]
	global_load_b64 v[0:1], v[4:5], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[4:5], v38, v[0:3], s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[4:5], v[2:3]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB2_45
; %bb.46:                               ; %Flow815
                                        ;   in Loop: Header=BB2_6 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
.LBB2_47:                               ; %Flow817
                                        ;   in Loop: Header=BB2_6 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB2_48:                               ; %.loopexit4.i.i.i.i.i.i103
                                        ;   in Loop: Header=BB2_6 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[6:7], v38, s[28:29] offset:40
	global_load_b128 v[0:3], v38, s[28:29]
	v_readfirstlane_b32 s2, v4
	v_readfirstlane_b32 s3, v5
	s_mov_b32 s8, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v6
	v_readfirstlane_b32 s5, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB2_50
; %bb.49:                               ;   in Loop: Header=BB2_6 Depth=1
	s_add_i32 s10, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v4, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v5, vcc_lo, s10, v1, vcc_lo
	v_dual_mov_b32 v39, s8 :: v_dual_mov_b32 v40, v38
	global_store_b128 v[4:5], v[39:42], off offset:8
.LBB2_50:                               ;   in Loop: Header=BB2_6 Depth=1
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[4:5], 6, v[37:38]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_mov_b32 s21, s20
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v2, v4
	s_mov_b32 s22, s20
	s_mov_b32 s23, s20
	v_add_co_ci_u32_e32 v7, vcc_lo, v3, v5, vcc_lo
	v_dual_mov_b32 v37, v38 :: v_dual_mov_b32 v2, s20
	v_dual_mov_b32 v39, v38 :: v_dual_mov_b32 v4, s22
	v_mov_b32_e32 v3, s21
	v_mov_b32_e32 v5, s23
	s_clause 0x3
	global_store_b128 v[6:7], v[36:39], off
	global_store_b128 v[6:7], v[2:5], off offset:16
	global_store_b128 v[6:7], v[2:5], off offset:32
	global_store_b128 v[6:7], v[2:5], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB2_58
; %bb.51:                               ;   in Loop: Header=BB2_6 Depth=1
	s_clause 0x1
	global_load_b64 v[12:13], v38, s[28:29] offset:32 glc
	global_load_b64 v[2:3], v38, s[28:29] offset:40
	s_mov_b32 s5, exec_lo
	v_dual_mov_b32 v10, s2 :: v_dual_mov_b32 v11, s3
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v3, s3, v3
	v_and_b32_e32 v2, s2, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v3, v3, 24
	v_mul_hi_u32 v4, v2, 24
	v_mul_lo_u32 v2, v2, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v4, v3
	v_add_co_u32 v8, vcc_lo, v0, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v9, vcc_lo, v1, v3, vcc_lo
	global_store_b64 v[8:9], v[12:13], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v38, v[10:13], s[28:29] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[12:13]
	s_cbranch_execz .LBB2_54
; %bb.52:                               ; %.preheader1.i.i.i.i.i.i121.preheader
                                        ;   in Loop: Header=BB2_6 Depth=1
	s_mov_b32 s8, 0
.LBB2_53:                               ; %.preheader1.i.i.i.i.i.i121
                                        ;   Parent Loop BB2_6 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
	s_sleep 1
	global_store_b64 v[8:9], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v38, v[2:5], s[28:29] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB2_53
.LBB2_54:                               ; %Flow813
                                        ;   in Loop: Header=BB2_6 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	global_load_b64 v[2:3], v38, s[28:29] offset:16
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v4, s8, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB2_56
; %bb.55:                               ;   in Loop: Header=BB2_6 Depth=1
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v37, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[37:38], off offset:8
.LBB2_56:                               ;   in Loop: Header=BB2_6 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB2_58
; %bb.57:                               ;   in Loop: Header=BB2_6 Depth=1
	global_load_b32 v37, v[2:3], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v37
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[37:38], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB2_58:                               ; %Flow814
                                        ;   in Loop: Header=BB2_6 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB2_59:                               ;   Parent Loop BB2_6 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_61
; %bb.60:                               ;   in Loop: Header=BB2_59 Depth=2
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB2_61:                               ;   in Loop: Header=BB2_59 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB2_63
; %bb.62:                               ;   in Loop: Header=BB2_59 Depth=2
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB2_64
.LBB2_63:                               ;   in Loop: Header=BB2_59 Depth=2
	s_mov_b32 s1, -1
.LBB2_64:                               ; %Flow808
                                        ;   in Loop: Header=BB2_59 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB2_59
; %bb.65:                               ;   in Loop: Header=BB2_6 Depth=1
	global_load_b64 v[0:1], v[6:7], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_69
; %bb.66:                               ;   in Loop: Header=BB2_6 Depth=1
	s_clause 0x2
	global_load_b64 v[4:5], v38, s[28:29] offset:40
	global_load_b64 v[8:9], v38, s[28:29] offset:24 glc
	global_load_b64 v[6:7], v38, s[28:29]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v10, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v11, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v10, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v11, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v11 :: v_dual_cndmask_b32 v2, v2, v10
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v4, v2, v4
	v_mul_hi_u32 v10, v4, 24
	v_mul_lo_u32 v4, v4, 24
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v8
	v_mul_lo_u32 v5, v5, 24
	v_add_nc_u32_e32 v5, v10, v5
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v9
	global_store_b64 v[6:7], v[8:9], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v38, v[2:5], s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[8:9]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB2_69
; %bb.67:                               ; %.preheader.i.i.i.i.i.i120.preheader
                                        ;   in Loop: Header=BB2_6 Depth=1
	s_mov_b32 s0, 0
.LBB2_68:                               ; %.preheader.i.i.i.i.i.i120
                                        ;   Parent Loop BB2_6 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[8:9], v38, v[2:5], s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[8:9], v[4:5]
	v_dual_mov_b32 v4, v8 :: v_dual_mov_b32 v5, v9
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB2_68
.LBB2_69:                               ; %__ockl_printf_begin.exit.i.i.i105
                                        ;   in Loop: Header=BB2_6 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_add_u32 s8, s18, 0x88
	s_addc_u32 s9, s19, 0
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str.1@rel32@lo+4
	s_addc_u32 s1, s1, .str.1@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	v_dual_mov_b32 v2, s0 :: v_dual_mov_b32 v3, s1
	v_dual_mov_b32 v4, s39 :: v_dual_mov_b32 v5, v38
	v_mov_b32_e32 v6, v38
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __ockl_printf_append_string_n@rel32@lo+4
	s_addc_u32 s3, s3, __ockl_printf_append_string_n@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_swappc_b64 s[30:31], s[2:3]
	v_dual_mov_b32 v37, v59 :: v_dual_mov_b32 v2, 0
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v37
	v_mov_b32_e32 v3, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v37
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_75
; %bb.70:                               ;   in Loop: Header=BB2_6 Depth=1
	global_load_b64 v[4:5], v38, s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[2:3], v38, s[28:29] offset:40
	global_load_b64 v[6:7], v38, s[28:29]
	s_mov_b32 s2, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v3, v3, v5
	v_and_b32_e32 v2, v2, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v3, v3, 24
	v_mul_hi_u32 v8, v2, 24
	v_mul_lo_u32 v2, v2, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v8, v3
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v6, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, v7, v3, vcc_lo
	global_load_b64 v[2:3], v[2:3], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[2:3], v38, v[2:5], s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[2:3], v[4:5]
	s_cbranch_execz .LBB2_74
; %bb.71:                               ; %.preheader3.i.i.i72.i.i.i119.preheader
                                        ;   in Loop: Header=BB2_6 Depth=1
	s_mov_b32 s3, 0
.LBB2_72:                               ; %.preheader3.i.i.i72.i.i.i119
                                        ;   Parent Loop BB2_6 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[6:7], v38, s[28:29] offset:40
	global_load_b64 v[8:9], v38, s[28:29]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v6, v6, v4
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[2:3], null, v6, 24, v[8:9]
	v_and_b32_e32 v8, v7, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[6:7], null, v8, 24, v[3:4]
	v_mov_b32_e32 v3, v6
	global_load_b64 v[2:3], v[2:3], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[2:3], v38, v[2:5], s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB2_72
; %bb.73:                               ; %Flow801
                                        ;   in Loop: Header=BB2_6 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
.LBB2_74:                               ; %Flow803
                                        ;   in Loop: Header=BB2_6 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB2_75:                               ; %.loopexit4.i.i.i67.i.i.i107
                                        ;   in Loop: Header=BB2_6 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_clause 0x1
	global_load_b64 v[8:9], v38, s[28:29] offset:40
	global_load_b128 v[4:7], v38, s[28:29]
	v_readfirstlane_b32 s2, v2
	v_readfirstlane_b32 s3, v3
	s_mov_b32 s8, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v8
	v_readfirstlane_b32 s5, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB2_77
; %bb.76:                               ;   in Loop: Header=BB2_6 Depth=1
	s_add_i32 s10, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v4, s7
	v_add_co_ci_u32_e32 v3, vcc_lo, s10, v5, vcc_lo
	v_dual_mov_b32 v39, s8 :: v_dual_mov_b32 v40, v38
	global_store_b128 v[2:3], v[39:42], off offset:8
.LBB2_77:                               ;   in Loop: Header=BB2_6 Depth=1
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[2:3], 6, v[37:38]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v6, vcc_lo, v6, s4
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v7, vcc_lo
	s_mov_b32 s21, s20
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v6, v2
	s_mov_b32 s22, s20
	s_mov_b32 s23, s20
	v_and_or_b32 v0, 0xffffff1f, v0, 32
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v3, vcc_lo
	v_dual_mov_b32 v2, s41 :: v_dual_mov_b32 v3, s46
	v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s21
	v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s23
	s_clause 0x3
	global_store_b128 v[6:7], v[0:3], off
	global_store_b128 v[6:7], v[8:11], off offset:16
	global_store_b128 v[6:7], v[8:11], off offset:32
	global_store_b128 v[6:7], v[8:11], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB2_85
; %bb.78:                               ;   in Loop: Header=BB2_6 Depth=1
	s_clause 0x1
	global_load_b64 v[12:13], v38, s[28:29] offset:32 glc
	global_load_b64 v[0:1], v38, s[28:29] offset:40
	v_dual_mov_b32 v10, s2 :: v_dual_mov_b32 v11, s3
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v0
	v_readfirstlane_b32 s9, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v8, vcc_lo, v4, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, s9, v5, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[8:9], v[12:13], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v38, v[10:13], s[28:29] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[2:3], v[12:13]
	s_cbranch_execz .LBB2_81
; %bb.79:                               ; %.preheader1.i.i.i70.i.i.i117.preheader
                                        ;   in Loop: Header=BB2_6 Depth=1
	s_mov_b32 s8, 0
.LBB2_80:                               ; %.preheader1.i.i.i70.i.i.i117
                                        ;   Parent Loop BB2_6 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s3
	s_sleep 1
	global_store_b64 v[8:9], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[0:1], v38, v[0:3], s[28:29] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[2:3]
	v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB2_80
.LBB2_81:                               ; %Flow799
                                        ;   in Loop: Header=BB2_6 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	global_load_b64 v[0:1], v38, s[28:29] offset:16
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v2, s8, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v2
	s_cbranch_execz .LBB2_83
; %bb.82:                               ;   in Loop: Header=BB2_6 Depth=1
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v37, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[0:1], v[37:38], off offset:8
.LBB2_83:                               ;   in Loop: Header=BB2_6 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[2:3], v[0:1], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	s_cbranch_vccnz .LBB2_85
; %bb.84:                               ;   in Loop: Header=BB2_6 Depth=1
	global_load_b32 v37, v[0:1], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v37
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[2:3], v[37:38], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB2_85:                               ; %Flow800
                                        ;   in Loop: Header=BB2_6 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v4, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB2_86:                               ;   Parent Loop BB2_6 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_88
; %bb.87:                               ;   in Loop: Header=BB2_86 Depth=2
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB2_88:                               ;   in Loop: Header=BB2_86 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB2_90
; %bb.89:                               ;   in Loop: Header=BB2_86 Depth=2
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB2_91
.LBB2_90:                               ;   in Loop: Header=BB2_86 Depth=2
	s_mov_b32 s1, -1
.LBB2_91:                               ; %Flow794
                                        ;   in Loop: Header=BB2_86 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB2_86
; %bb.92:                               ;   in Loop: Header=BB2_6 Depth=1
	global_load_b64 v[45:46], v[6:7], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_96
; %bb.93:                               ;   in Loop: Header=BB2_6 Depth=1
	s_clause 0x2
	global_load_b64 v[2:3], v38, s[28:29] offset:40
	global_load_b64 v[6:7], v38, s[28:29] offset:24 glc
	global_load_b64 v[4:5], v38, s[28:29]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v8, vcc_lo, v2, 1
	v_add_co_ci_u32_e32 v9, vcc_lo, 0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v8, s2
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v9, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[0:1]
	v_dual_cndmask_b32 v1, v1, v9 :: v_dual_cndmask_b32 v0, v0, v8
	v_and_b32_e32 v3, v1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v2, v0, v2
	v_mul_hi_u32 v8, v2, 24
	v_mul_lo_u32 v2, v2, 24
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_u32 v4, vcc_lo, v4, v2
	v_mov_b32_e32 v2, v6
	v_mul_lo_u32 v3, v3, 24
	v_add_nc_u32_e32 v3, v8, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e32 v5, vcc_lo, v5, v3, vcc_lo
	v_mov_b32_e32 v3, v7
	global_store_b64 v[4:5], v[6:7], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v38, v[0:3], s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[2:3], v[6:7]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB2_96
; %bb.94:                               ; %.preheader.i.i.i69.i.i.i116.preheader
                                        ;   in Loop: Header=BB2_6 Depth=1
	s_mov_b32 s0, 0
.LBB2_95:                               ; %.preheader.i.i.i69.i.i.i116
                                        ;   Parent Loop BB2_6 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_sleep 1
	global_store_b64 v[4:5], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[6:7], v38, v[0:3], s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[2:3]
	v_dual_mov_b32 v2, v6 :: v_dual_mov_b32 v3, v7
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB2_95
.LBB2_96:                               ; %__ockl_printf_append_args.exit.i.i.i109
                                        ;   in Loop: Header=BB2_6 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	v_dual_mov_b32 v37, v59 :: v_dual_mov_b32 v4, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s0, v37
	v_mov_b32_e32 v5, 0
	v_cmp_eq_u32_e64 s0, s0, v37
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_102
; %bb.97:                               ;   in Loop: Header=BB2_6 Depth=1
	global_load_b64 v[2:3], v38, s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[0:1], v38, s[28:29] offset:40
	global_load_b64 v[4:5], v38, s[28:29]
	s_mov_b32 s2, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v3
	v_and_b32_e32 v0, v0, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v1, v1, 24
	v_mul_hi_u32 v6, v0, 24
	v_mul_lo_u32 v0, v0, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v1, v6, v1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v0, vcc_lo, v4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, v5, v1, vcc_lo
	global_load_b64 v[0:1], v[0:1], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[4:5], v38, v[0:3], s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[4:5], v[2:3]
	s_cbranch_execz .LBB2_101
; %bb.98:                               ; %.preheader3.i.i.i78.i.i.i115.preheader
                                        ;   in Loop: Header=BB2_6 Depth=1
	s_mov_b32 s3, 0
.LBB2_99:                               ; %.preheader3.i.i.i78.i.i.i115
                                        ;   Parent Loop BB2_6 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[0:1], v38, s[28:29] offset:40
	global_load_b64 v[6:7], v38, s[28:29]
	v_dual_mov_b32 v2, v4 :: v_dual_mov_b32 v3, v5
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v0, v0, v2
	v_and_b32_e32 v1, v1, v3
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[4:5], null, v0, 24, v[6:7]
	v_mov_b32_e32 v0, v5
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v1, 24, v[0:1]
	global_load_b64 v[0:1], v[4:5], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[4:5], v38, v[0:3], s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[4:5], v[2:3]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB2_99
; %bb.100:                              ; %Flow787
                                        ;   in Loop: Header=BB2_6 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
.LBB2_101:                              ; %Flow789
                                        ;   in Loop: Header=BB2_6 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB2_102:                              ; %.loopexit4.i.i.i73.i.i.i110
                                        ;   in Loop: Header=BB2_6 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_clause 0x1
	global_load_b64 v[6:7], v38, s[28:29] offset:40
	global_load_b128 v[0:3], v38, s[28:29]
	v_readfirstlane_b32 s2, v4
	v_readfirstlane_b32 s3, v5
	s_mov_b32 s8, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v6
	v_readfirstlane_b32 s5, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB2_104
; %bb.103:                              ;   in Loop: Header=BB2_6 Depth=1
	s_add_i32 s10, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v4, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v5, vcc_lo, s10, v1, vcc_lo
	v_dual_mov_b32 v39, s8 :: v_dual_mov_b32 v40, v38
	global_store_b128 v[4:5], v[39:42], off offset:8
.LBB2_104:                              ;   in Loop: Header=BB2_6 Depth=1
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	s_mov_b32 s21, s20
	s_waitcnt vmcnt(0)
	v_add_co_u32 v4, vcc_lo, v2, s4
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v3, vcc_lo
	v_lshlrev_b64 v[2:3], 6, v[37:38]
	s_mov_b32 s22, s20
	s_mov_b32 s23, s20
	v_and_or_b32 v45, 0xffffff1d, v45, 34
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v4, v2
	v_add_co_ci_u32_e32 v7, vcc_lo, v5, v3, vcc_lo
	v_dual_mov_b32 v2, s20 :: v_dual_mov_b32 v3, s21
	v_dual_mov_b32 v4, s22 :: v_dual_mov_b32 v5, s23
	s_clause 0x3
	global_store_b128 v[6:7], v[45:48], off
	global_store_b128 v[6:7], v[2:5], off offset:16
	global_store_b128 v[6:7], v[2:5], off offset:32
	global_store_b128 v[6:7], v[2:5], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB2_112
; %bb.105:                              ;   in Loop: Header=BB2_6 Depth=1
	s_clause 0x1
	global_load_b64 v[10:11], v38, s[28:29] offset:32 glc
	global_load_b64 v[2:3], v38, s[28:29] offset:40
	v_dual_mov_b32 v8, s2 :: v_dual_mov_b32 v9, s3
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v2
	v_readfirstlane_b32 s9, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v6, vcc_lo, v0, s8
	v_add_co_ci_u32_e32 v7, vcc_lo, s9, v1, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[6:7], v[10:11], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v38, v[8:11], s[28:29] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[10:11]
	s_cbranch_execz .LBB2_108
; %bb.106:                              ; %.preheader1.i.i.i76.i.i.i113.preheader
                                        ;   in Loop: Header=BB2_6 Depth=1
	s_mov_b32 s8, 0
.LBB2_107:                              ; %.preheader1.i.i.i76.i.i.i113
                                        ;   Parent Loop BB2_6 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v38, v[2:5], s[28:29] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB2_107
.LBB2_108:                              ; %Flow785
                                        ;   in Loop: Header=BB2_6 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	global_load_b64 v[2:3], v38, s[28:29] offset:16
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v4, s8, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB2_110
; %bb.109:                              ;   in Loop: Header=BB2_6 Depth=1
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v37, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[37:38], off offset:8
.LBB2_110:                              ;   in Loop: Header=BB2_6 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB2_112
; %bb.111:                              ;   in Loop: Header=BB2_6 Depth=1
	global_load_b32 v37, v[2:3], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v37
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[37:38], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB2_112:                              ; %Flow786
                                        ;   in Loop: Header=BB2_6 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB2_113:                              ;   Parent Loop BB2_6 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_115
; %bb.114:                              ;   in Loop: Header=BB2_113 Depth=2
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB2_115:                              ;   in Loop: Header=BB2_113 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB2_117
; %bb.116:                              ;   in Loop: Header=BB2_113 Depth=2
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB2_118
.LBB2_117:                              ;   in Loop: Header=BB2_113 Depth=2
	s_mov_b32 s1, -1
.LBB2_118:                              ; %Flow780
                                        ;   in Loop: Header=BB2_113 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB2_113
; %bb.119:                              ;   in Loop: Header=BB2_6 Depth=1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_123
; %bb.120:                              ;   in Loop: Header=BB2_6 Depth=1
	s_clause 0x2
	global_load_b64 v[2:3], v38, s[28:29] offset:40
	global_load_b64 v[6:7], v38, s[28:29] offset:24 glc
	global_load_b64 v[4:5], v38, s[28:29]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v8, vcc_lo, v2, 1
	v_add_co_ci_u32_e32 v9, vcc_lo, 0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v8, s2
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v9, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[0:1]
	v_dual_cndmask_b32 v1, v1, v9 :: v_dual_cndmask_b32 v0, v0, v8
	v_and_b32_e32 v3, v1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v2, v0, v2
	v_mul_hi_u32 v8, v2, 24
	v_mul_lo_u32 v2, v2, 24
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_u32 v4, vcc_lo, v4, v2
	v_mov_b32_e32 v2, v6
	v_mul_lo_u32 v3, v3, 24
	v_add_nc_u32_e32 v3, v8, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e32 v5, vcc_lo, v5, v3, vcc_lo
	v_mov_b32_e32 v3, v7
	global_store_b64 v[4:5], v[6:7], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v38, v[0:3], s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[2:3], v[6:7]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB2_123
; %bb.121:                              ; %.preheader.i.i.i75.i.i.i112.preheader
                                        ;   in Loop: Header=BB2_6 Depth=1
	s_mov_b32 s0, 0
.LBB2_122:                              ; %.preheader.i.i.i75.i.i.i112
                                        ;   Parent Loop BB2_6 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_sleep 1
	global_store_b64 v[4:5], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[6:7], v38, v[0:3], s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[2:3]
	v_dual_mov_b32 v2, v6 :: v_dual_mov_b32 v3, v7
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB2_122
.LBB2_123:                              ; %Flow778
                                        ;   in Loop: Header=BB2_6 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_mov_b32 s1, 0
.LBB2_124:                              ; %Flow820
                                        ;   in Loop: Header=BB2_6 Depth=1
	v_dual_mov_b32 v60, v66 :: v_dual_mov_b32 v61, v67
	v_dual_mov_b32 v40, v68 :: v_dual_mov_b32 v45, v70
	v_mov_b32_e32 v62, v69
                                        ; implicit-def: $vgpr66
                                        ; implicit-def: $vgpr70
                                        ; implicit-def: $vgpr69
                                        ; implicit-def: $vgpr67
                                        ; implicit-def: $vgpr68
.LBB2_125:                              ; %Flow826
                                        ;   in Loop: Header=BB2_6 Depth=1
	s_or_saveexec_b32 s0, s57
	v_mov_b32_e32 v71, s1
	s_xor_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB2_135
; %bb.126:                              ;   in Loop: Header=BB2_6 Depth=1
	v_lshrrev_b32_e32 v0, 2, v57
	v_dual_mov_b32 v6, 32 :: v_dual_lshlrev_b32 v1, 4, v66
	v_lshrrev_b32_e32 v3, 2, v70
	v_add_nc_u32_e32 v62, 0xb0f8a, v69
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v0, v0, v57
	s_mov_b32 s1, 0
	v_mov_b32_e32 v4, 0
	v_lshlrev_b32_e32 v2, 1, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v1, v2, v1
	v_xor_b32_e32 v2, v3, v70
	v_xor3_b32 v61, v1, v0, v66
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v0, 1, v2
	v_lshlrev_b32_e32 v1, 4, v61
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v0, v0, v1
	v_xor3_b32 v60, v0, v2, v61
	v_add3_u32 v2, v69, v61, 0x587c5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v0, v60, v62
	v_cvt_f64_u32_e32 v[2:3], v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v0, 11, v0
	v_cvt_f64_u32_e32 v[0:1], v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[0:1], v[0:1], 32
	v_add_f64 v[0:1], v[0:1], v[2:3]
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[0:1], 0x3ca00000, v[0:1], 0x3ca00000
.LBB2_127:                              ; %.lr.ph.i.i59.i.i.i130
                                        ;   Parent Loop BB2_6 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_sub_nc_u32_e32 v2, v6, v4
	s_mov_b32 s2, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v3, 31, v2
	v_add_nc_u32_e32 v2, v2, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v2, 1, v2
	v_add_nc_u32_e32 v5, v2, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v2, v5, v65
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 3, v[2:3]
	v_add_co_u32 v2, vcc_lo, s54, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s55, v3, vcc_lo
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(0)
	v_cmpx_neq_f64_e32 v[2:3], v[0:1]
	s_cbranch_execz .LBB2_133
; %bb.128:                              ;   in Loop: Header=BB2_127 Depth=2
	s_mov_b32 s3, exec_lo
	v_cmpx_nlt_f64_e32 v[2:3], v[0:1]
	s_cbranch_execz .LBB2_132
; %bb.129:                              ;   in Loop: Header=BB2_127 Depth=2
	s_mov_b32 s4, exec_lo
	v_cmpx_gt_f64_e32 v[2:3], v[0:1]
; %bb.130:                              ;   in Loop: Header=BB2_127 Depth=2
	v_mov_b32_e32 v6, v5
; %bb.131:                              ; %Flow821
                                        ;   in Loop: Header=BB2_127 Depth=2
	s_or_b32 exec_lo, exec_lo, s4
	v_mov_b32_e32 v5, v4
.LBB2_132:                              ; %Flow823
                                        ;   in Loop: Header=BB2_127 Depth=2
	s_or_b32 exec_lo, exec_lo, s3
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v4, v5 :: v_dual_mov_b32 v5, v6
.LBB2_133:                              ;   in Loop: Header=BB2_127 Depth=2
	s_or_b32 exec_lo, exec_lo, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, 1, v4
	v_mov_b32_e32 v6, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ge_i32_e32 vcc_lo, v2, v5
	s_or_b32 s1, vcc_lo, s1
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB2_127
; %bb.134:                              ; %_Z8samplingP12hiprandStatePdii.exit66.i.i.i135
                                        ;   in Loop: Header=BB2_6 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	v_dual_mov_b32 v45, v67 :: v_dual_add_nc_u32 v2, v4, v65
	v_dual_mov_b32 v57, v68 :: v_dual_mov_b32 v40, v66
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[2:3], 3, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s54, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s55, v3, vcc_lo
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(0)
	v_cmp_lt_f64_e32 vcc_lo, v[2:3], v[0:1]
	v_cndmask_b32_e32 v5, -1, v5, vcc_lo
	v_cmp_nge_f64_e32 vcc_lo, v[2:3], v[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e32 v71, v4, v5, vcc_lo
.LBB2_135:                              ; %Flow827
                                        ;   in Loop: Header=BB2_6 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $vgpr66
                                        ; implicit-def: $vgpr70
                                        ; implicit-def: $vgpr69
                                        ; implicit-def: $vgpr68
                                        ; implicit-def: $vgpr67
.LBB2_136:                              ; %Flow833
                                        ;   in Loop: Header=BB2_6 Depth=1
	s_and_not1_saveexec_b32 s0, s56
	s_cbranch_execz .LBB2_146
; %bb.137:                              ;   in Loop: Header=BB2_6 Depth=1
	v_lshrrev_b32_e32 v0, 2, v57
	v_lshlrev_b32_e32 v1, 4, v66
	v_lshrrev_b32_e32 v3, 2, v70
	v_lshrrev_b32_e32 v4, 2, v68
	v_lshrrev_b32_e32 v5, 2, v67
	v_xor_b32_e32 v0, v0, v57
	v_add_nc_u32_e32 v62, 0x161f14, v69
	s_mov_b32 s1, 0
	v_xor_b32_e32 v4, v4, v68
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v7, 32 :: v_dual_lshlrev_b32 v2, 1, v0
	v_xor_b32_e32 v1, v2, v1
	v_xor_b32_e32 v2, v3, v70
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor3_b32 v45, v1, v0, v66
	v_lshlrev_b32_e32 v0, 1, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v1, 4, v45
	v_xor_b32_e32 v0, v0, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_xor3_b32 v40, v0, v2, v45
	v_add3_u32 v2, v69, v45, 0x587c5
	v_add3_u32 v0, v69, v40, 0xb0f8a
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_u32_e32 v[2:3], v2
	v_lshrrev_b32_e32 v0, 11, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f64_u32_e32 v[0:1], v0
	v_ldexp_f64 v[0:1], v[0:1], 32
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_f64 v[0:1], v[0:1], v[2:3]
	v_lshlrev_b32_e32 v2, 1, v4
	v_lshlrev_b32_e32 v3, 4, v40
	v_xor_b32_e32 v2, v2, v3
	v_xor_b32_e32 v3, v5, v67
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor3_b32 v61, v2, v4, v40
	v_lshlrev_b32_e32 v2, 1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v4, 4, v61
	v_xor_b32_e32 v2, v2, v4
	v_add3_u32 v4, v69, v61, 0x10974f
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor3_b32 v60, v2, v3, v61
	v_cvt_f64_u32_e32 v[4:5], v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v2, v60, v62
	v_lshrrev_b32_e32 v2, 11, v2
	v_fma_f64 v[0:1], 0x3ca00000, v[0:1], 0x3ca00000
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_u32_e32 v[2:3], v2
	v_mul_f64 v[0:1], 0x40666000, v[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[2:3], v[2:3], 32
	v_ceil_f64_e32 v[0:1], v[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[2:3], v[2:3], v[4:5]
	v_cvt_i32_f64_e32 v4, v[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[0:1], 0x3ca00000, v[2:3], 0x3ca00000
	v_lshl_add_u32 v5, v4, 5, v4
	v_mov_b32_e32 v4, 0
.LBB2_138:                              ; %.lr.ph.i.i47.i.i.i146
                                        ;   Parent Loop BB2_6 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v2, v7, v4
	s_mov_b32 s2, exec_lo
	v_lshrrev_b32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v2, v2, v3
	v_ashrrev_i32_e32 v2, 1, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v6, v2, v4
	v_add_nc_u32_e32 v2, v6, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[2:3], 3, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s54, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s55, v3, vcc_lo
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(0)
	v_cmpx_neq_f64_e32 v[2:3], v[0:1]
	s_cbranch_execz .LBB2_144
; %bb.139:                              ;   in Loop: Header=BB2_138 Depth=2
	s_mov_b32 s3, exec_lo
	v_cmpx_nlt_f64_e32 v[2:3], v[0:1]
	s_cbranch_execz .LBB2_143
; %bb.140:                              ;   in Loop: Header=BB2_138 Depth=2
	s_mov_b32 s4, exec_lo
	v_cmpx_gt_f64_e32 v[2:3], v[0:1]
; %bb.141:                              ;   in Loop: Header=BB2_138 Depth=2
	v_mov_b32_e32 v7, v6
; %bb.142:                              ; %Flow828
                                        ;   in Loop: Header=BB2_138 Depth=2
	s_or_b32 exec_lo, exec_lo, s4
	v_mov_b32_e32 v6, v4
.LBB2_143:                              ; %Flow830
                                        ;   in Loop: Header=BB2_138 Depth=2
	s_or_b32 exec_lo, exec_lo, s3
	s_delay_alu instid0(VALU_DEP_1)
	v_mov_b32_e32 v4, v6
	v_mov_b32_e32 v6, v7
.LBB2_144:                              ;   in Loop: Header=BB2_138 Depth=2
	s_or_b32 exec_lo, exec_lo, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v7, v6 :: v_dual_add_nc_u32 v2, 1, v4
	v_cmp_ge_i32_e32 vcc_lo, v2, v6
	s_or_b32 s1, vcc_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB2_138
; %bb.145:                              ; %_Z8samplingP12hiprandStatePdii.exit54.i.i.i151
                                        ;   in Loop: Header=BB2_6 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	v_dual_mov_b32 v57, v66 :: v_dual_add_nc_u32 v2, v4, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[2:3], 3, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s54, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s55, v3, vcc_lo
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(0)
	v_cmp_lt_f64_e32 vcc_lo, v[2:3], v[0:1]
	v_cndmask_b32_e32 v5, -1, v6, vcc_lo
	v_cmp_nge_f64_e32 vcc_lo, v[2:3], v[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e32 v71, v4, v5, vcc_lo
.LBB2_146:                              ; %Flow834
                                        ;   in Loop: Header=BB2_6 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $vgpr66
                                        ; implicit-def: $vgpr70
                                        ; implicit-def: $vgpr69
                                        ; implicit-def: $vgpr67
                                        ; implicit-def: $vgpr68
.LBB2_147:                              ; %Flow840
                                        ;   in Loop: Header=BB2_6 Depth=1
	s_and_not1_saveexec_b32 s0, s49
	s_cbranch_execz .LBB2_157
; %bb.148:                              ;   in Loop: Header=BB2_6 Depth=1
	v_lshrrev_b32_e32 v0, 2, v57
	v_dual_mov_b32 v6, 32 :: v_dual_lshlrev_b32 v1, 4, v66
	v_lshrrev_b32_e32 v3, 2, v70
	v_add_nc_u32_e32 v62, 0xb0f8a, v69
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v0, v0, v57
	s_mov_b32 s1, 0
	v_mov_b32_e32 v4, 0
	v_lshlrev_b32_e32 v2, 1, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v1, v2, v1
	v_xor_b32_e32 v2, v3, v70
	v_xor3_b32 v61, v1, v0, v66
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v0, 1, v2
	v_lshlrev_b32_e32 v1, 4, v61
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v0, v0, v1
	v_xor3_b32 v60, v0, v2, v61
	v_add3_u32 v2, v69, v61, 0x587c5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v0, v60, v62
	v_cvt_f64_u32_e32 v[2:3], v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v0, 11, v0
	v_cvt_f64_u32_e32 v[0:1], v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[0:1], v[0:1], 32
	v_add_f64 v[0:1], v[0:1], v[2:3]
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[0:1], 0x3ca00000, v[0:1], 0x3ca00000
.LBB2_149:                              ; %.lr.ph.i.i.i.i.i158
                                        ;   Parent Loop BB2_6 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_sub_nc_u32_e32 v2, v6, v4
	s_mov_b32 s2, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v3, 31, v2
	v_add_nc_u32_e32 v2, v2, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v2, 1, v2
	v_add_nc_u32_e32 v5, v2, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v2, v5, v55
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 3, v[2:3]
	v_add_co_u32 v2, vcc_lo, s54, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s55, v3, vcc_lo
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(0)
	v_cmpx_neq_f64_e32 v[2:3], v[0:1]
	s_cbranch_execz .LBB2_155
; %bb.150:                              ;   in Loop: Header=BB2_149 Depth=2
	s_mov_b32 s3, exec_lo
	v_cmpx_nlt_f64_e32 v[2:3], v[0:1]
	s_cbranch_execz .LBB2_154
; %bb.151:                              ;   in Loop: Header=BB2_149 Depth=2
	s_mov_b32 s4, exec_lo
	v_cmpx_gt_f64_e32 v[2:3], v[0:1]
; %bb.152:                              ;   in Loop: Header=BB2_149 Depth=2
	v_mov_b32_e32 v6, v5
; %bb.153:                              ; %Flow835
                                        ;   in Loop: Header=BB2_149 Depth=2
	s_or_b32 exec_lo, exec_lo, s4
	v_mov_b32_e32 v5, v4
.LBB2_154:                              ; %Flow837
                                        ;   in Loop: Header=BB2_149 Depth=2
	s_or_b32 exec_lo, exec_lo, s3
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v4, v5 :: v_dual_mov_b32 v5, v6
.LBB2_155:                              ;   in Loop: Header=BB2_149 Depth=2
	s_or_b32 exec_lo, exec_lo, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, 1, v4
	v_mov_b32_e32 v6, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ge_i32_e32 vcc_lo, v2, v5
	s_or_b32 s1, vcc_lo, s1
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB2_149
; %bb.156:                              ; %_Z8samplingP12hiprandStatePdii.exit.i.i.i163
                                        ;   in Loop: Header=BB2_6 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	v_add_nc_u32_e32 v2, v4, v55
	v_dual_mov_b32 v40, v66 :: v_dual_mov_b32 v45, v67
	v_mov_b32_e32 v57, v68
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[2:3], 3, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s54, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s55, v3, vcc_lo
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(0)
	v_cmp_lt_f64_e32 vcc_lo, v[2:3], v[0:1]
	v_cndmask_b32_e32 v5, -1, v5, vcc_lo
	v_cmp_nge_f64_e32 vcc_lo, v[2:3], v[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e32 v71, v4, v5, vcc_lo
.LBB2_157:                              ; %Flow841
                                        ;   in Loop: Header=BB2_6 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_mov_b32 s49, exec_lo
	v_cmpx_lt_i32_e32 0, v71
	s_cbranch_execz .LBB2_223
; %bb.158:                              ; %.preheader27.i50
                                        ;   in Loop: Header=BB2_6 Depth=1
	s_load_b64 s[28:29], s[34:35], 0x50
	s_mov_b32 s56, 0
	s_mov_b32 s57, 0
.LBB2_159:                              ;   Parent Loop BB2_6 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB2_160 Depth 3
                                        ;       Child Loop BB2_170 Depth 3
                                        ;       Child Loop BB2_178 Depth 3
                                        ;       Child Loop BB2_184 Depth 3
                                        ;       Child Loop BB2_193 Depth 3
                                        ;       Child Loop BB2_197 Depth 3
                                        ;       Child Loop BB2_205 Depth 3
                                        ;       Child Loop BB2_211 Depth 3
                                        ;       Child Loop BB2_220 Depth 3
	v_lshrrev_b32_e32 v0, 2, v57
	v_dual_mov_b32 v66, v60 :: v_dual_mov_b32 v67, v61
	v_lshrrev_b32_e32 v3, 2, v45
	s_mov_b32 s0, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_xor_b32_e32 v0, v0, v57
	v_dual_mov_b32 v68, v40 :: v_dual_lshlrev_b32 v1, 4, v66
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v69, 0 :: v_dual_lshlrev_b32 v2, 1, v0
	v_xor_b32_e32 v1, v2, v1
	v_xor_b32_e32 v2, v3, v45
	v_mov_b32_e32 v3, v62
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_xor3_b32 v61, v1, v0, v66
	v_lshlrev_b32_e32 v0, 1, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v62, 0xb0f8a, v3
	v_lshlrev_b32_e32 v1, 4, v61
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v0, v0, v1
	v_xor3_b32 v60, v0, v2, v61
	v_add3_u32 v2, v3, v61, 0x587c5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v0, v60, v62
	v_cvt_f64_u32_e32 v[2:3], v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v0, 11, v0
	v_cvt_f64_u32_e32 v[0:1], v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[0:1], v[0:1], 32
	v_add_f64 v[0:1], v[0:1], v[2:3]
	v_mov_b32_e32 v2, 0xbb7
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[45:46], 0x3ca00000, v[0:1], 0x3ca00000
.LBB2_160:                              ; %.lr.ph.i.i.i.i.i.i71
                                        ;   Parent Loop BB2_6 Depth=1
                                        ;     Parent Loop BB2_159 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v0, v2, v69
	s_mov_b32 s1, exec_lo
	v_lshrrev_b32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v0, v0, v1
	v_ashrrev_i32_e32 v0, 1, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v70, v0, v69
	v_add_nc_u32_e32 v0, v70, v64
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[0:1], 3, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s52, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s53, v1, vcc_lo
	global_load_b64 v[0:1], v[0:1], off
	s_waitcnt vmcnt(0)
	v_cmpx_neq_f64_e32 v[0:1], v[45:46]
	s_cbranch_execz .LBB2_166
; %bb.161:                              ;   in Loop: Header=BB2_160 Depth=3
	s_mov_b32 s2, exec_lo
	v_cmpx_nlt_f64_e32 v[0:1], v[45:46]
	s_cbranch_execz .LBB2_165
; %bb.162:                              ;   in Loop: Header=BB2_160 Depth=3
	s_mov_b32 s3, exec_lo
	v_cmpx_gt_f64_e32 v[0:1], v[45:46]
; %bb.163:                              ;   in Loop: Header=BB2_160 Depth=3
	v_mov_b32_e32 v2, v70
; %bb.164:                              ; %Flow753
                                        ;   in Loop: Header=BB2_160 Depth=3
	s_or_b32 exec_lo, exec_lo, s3
	v_mov_b32_e32 v70, v69
.LBB2_165:                              ; %Flow755
                                        ;   in Loop: Header=BB2_160 Depth=3
	s_or_b32 exec_lo, exec_lo, s2
	s_delay_alu instid0(VALU_DEP_1)
	v_mov_b32_e32 v69, v70
	v_mov_b32_e32 v70, v2
.LBB2_166:                              ;   in Loop: Header=BB2_160 Depth=3
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v0, 1, v69
	v_mov_b32_e32 v2, v70
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ge_i32_e32 vcc_lo, v0, v70
	s_or_b32 s0, vcc_lo, s0
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB2_160
; %bb.167:                              ; %_Z11get_hittimeddiPdP12hiprandState.exit.i76
                                        ;   in Loop: Header=BB2_159 Depth=2
	s_or_b32 exec_lo, exec_lo, s0
	v_dual_mov_b32 v37, v59 :: v_dual_add_nc_u32 v0, v69, v64
	v_mov_b32_e32 v4, 0
	v_mov_b32_e32 v5, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[0:1], 3, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s52, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s53, v1, vcc_lo
	global_load_b64 v[56:57], v[0:1], off
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v37
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v37
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_173
; %bb.168:                              ;   in Loop: Header=BB2_159 Depth=2
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[2:3], v38, s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[0:1], v38, s[28:29] offset:40
	global_load_b64 v[4:5], v38, s[28:29]
	s_mov_b32 s2, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v3
	v_and_b32_e32 v0, v0, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v1, v1, 24
	v_mul_hi_u32 v6, v0, 24
	v_mul_lo_u32 v0, v0, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v1, v6, v1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v0, vcc_lo, v4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, v5, v1, vcc_lo
	global_load_b64 v[0:1], v[0:1], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[4:5], v38, v[0:3], s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[4:5], v[2:3]
	s_cbranch_execz .LBB2_172
; %bb.169:                              ; %.preheader3.i.i.i.i94.preheader
                                        ;   in Loop: Header=BB2_159 Depth=2
	s_mov_b32 s3, 0
.LBB2_170:                              ; %.preheader3.i.i.i.i94
                                        ;   Parent Loop BB2_6 Depth=1
                                        ;     Parent Loop BB2_159 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[0:1], v38, s[28:29] offset:40
	global_load_b64 v[6:7], v38, s[28:29]
	v_dual_mov_b32 v2, v4 :: v_dual_mov_b32 v3, v5
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v0, v0, v2
	v_and_b32_e32 v1, v1, v3
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[4:5], null, v0, 24, v[6:7]
	v_mov_b32_e32 v0, v5
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v1, 24, v[0:1]
	global_load_b64 v[0:1], v[4:5], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[4:5], v38, v[0:3], s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[4:5], v[2:3]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB2_170
; %bb.171:                              ; %Flow750
                                        ;   in Loop: Header=BB2_159 Depth=2
	s_or_b32 exec_lo, exec_lo, s3
.LBB2_172:                              ; %Flow752
                                        ;   in Loop: Header=BB2_159 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB2_173:                              ; %.loopexit4.i.i.i.i79
                                        ;   in Loop: Header=BB2_159 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[6:7], v38, s[28:29] offset:40
	global_load_b128 v[0:3], v38, s[28:29]
	v_readfirstlane_b32 s2, v4
	v_readfirstlane_b32 s3, v5
	s_mov_b32 s8, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v6
	v_readfirstlane_b32 s5, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB2_175
; %bb.174:                              ;   in Loop: Header=BB2_159 Depth=2
	s_add_i32 s10, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v4, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v5, vcc_lo, s10, v1, vcc_lo
	v_dual_mov_b32 v39, s8 :: v_dual_mov_b32 v40, v38
	global_store_b128 v[4:5], v[39:42], off offset:8
.LBB2_175:                              ;   in Loop: Header=BB2_159 Depth=2
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[4:5], 6, v[37:38]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_mov_b32 s21, s20
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v2, v4
	s_mov_b32 s22, s20
	s_mov_b32 s23, s20
	v_add_co_ci_u32_e32 v7, vcc_lo, v3, v5, vcc_lo
	v_dual_mov_b32 v37, v38 :: v_dual_mov_b32 v2, s20
	v_dual_mov_b32 v39, v38 :: v_dual_mov_b32 v4, s22
	v_mov_b32_e32 v3, s21
	v_mov_b32_e32 v5, s23
	s_clause 0x3
	global_store_b128 v[6:7], v[36:39], off
	global_store_b128 v[6:7], v[2:5], off offset:16
	global_store_b128 v[6:7], v[2:5], off offset:32
	global_store_b128 v[6:7], v[2:5], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB2_183
; %bb.176:                              ;   in Loop: Header=BB2_159 Depth=2
	s_clause 0x1
	global_load_b64 v[12:13], v38, s[28:29] offset:32 glc
	global_load_b64 v[2:3], v38, s[28:29] offset:40
	v_dual_mov_b32 v10, s2 :: v_dual_mov_b32 v11, s3
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v2
	v_readfirstlane_b32 s9, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v8, vcc_lo, v0, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, s9, v1, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[8:9], v[12:13], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v38, v[10:13], s[28:29] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[12:13]
	s_cbranch_execz .LBB2_179
; %bb.177:                              ; %.preheader1.i.i.i.i92.preheader
                                        ;   in Loop: Header=BB2_159 Depth=2
	s_mov_b32 s8, 0
.LBB2_178:                              ; %.preheader1.i.i.i.i92
                                        ;   Parent Loop BB2_6 Depth=1
                                        ;     Parent Loop BB2_159 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
	s_sleep 1
	global_store_b64 v[8:9], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v38, v[2:5], s[28:29] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB2_178
.LBB2_179:                              ; %Flow748
                                        ;   in Loop: Header=BB2_159 Depth=2
	s_or_b32 exec_lo, exec_lo, s5
	global_load_b64 v[2:3], v38, s[28:29] offset:16
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v4, s8, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB2_181
; %bb.180:                              ;   in Loop: Header=BB2_159 Depth=2
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v37, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[37:38], off offset:8
.LBB2_181:                              ;   in Loop: Header=BB2_159 Depth=2
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB2_183
; %bb.182:                              ;   in Loop: Header=BB2_159 Depth=2
	global_load_b32 v37, v[2:3], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v37
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[37:38], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB2_183:                              ; %Flow749
                                        ;   in Loop: Header=BB2_159 Depth=2
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB2_184:                              ;   Parent Loop BB2_6 Depth=1
                                        ;     Parent Loop BB2_159 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_186
; %bb.185:                              ;   in Loop: Header=BB2_184 Depth=3
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB2_186:                              ;   in Loop: Header=BB2_184 Depth=3
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB2_188
; %bb.187:                              ;   in Loop: Header=BB2_184 Depth=3
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB2_189
.LBB2_188:                              ;   in Loop: Header=BB2_184 Depth=3
	s_mov_b32 s1, -1
.LBB2_189:                              ; %Flow743
                                        ;   in Loop: Header=BB2_184 Depth=3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB2_184
; %bb.190:                              ;   in Loop: Header=BB2_159 Depth=2
	global_load_b64 v[0:1], v[6:7], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_194
; %bb.191:                              ;   in Loop: Header=BB2_159 Depth=2
	s_clause 0x2
	global_load_b64 v[4:5], v38, s[28:29] offset:40
	global_load_b64 v[8:9], v38, s[28:29] offset:24 glc
	global_load_b64 v[6:7], v38, s[28:29]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v10, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v11, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v10, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v11, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v11 :: v_dual_cndmask_b32 v2, v2, v10
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v4, v2, v4
	v_mul_hi_u32 v10, v4, 24
	v_mul_lo_u32 v4, v4, 24
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v8
	v_mul_lo_u32 v5, v5, 24
	v_add_nc_u32_e32 v5, v10, v5
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v9
	global_store_b64 v[6:7], v[8:9], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v38, v[2:5], s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[8:9]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB2_194
; %bb.192:                              ; %.preheader.i.i.i.i91.preheader
                                        ;   in Loop: Header=BB2_159 Depth=2
	s_mov_b32 s0, 0
.LBB2_193:                              ; %.preheader.i.i.i.i91
                                        ;   Parent Loop BB2_6 Depth=1
                                        ;     Parent Loop BB2_159 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[8:9], v38, v[2:5], s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[8:9], v[4:5]
	v_dual_mov_b32 v4, v8 :: v_dual_mov_b32 v5, v9
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB2_193
.LBB2_194:                              ; %__ockl_printf_begin.exit.i81
                                        ;   in Loop: Header=BB2_159 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	s_add_u32 s8, s18, 0x88
	s_addc_u32 s9, s19, 0
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str@rel32@lo+4
	s_addc_u32 s1, s1, .str@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	v_dual_mov_b32 v2, s0 :: v_dual_mov_b32 v3, s1
	v_dual_mov_b32 v4, s40 :: v_dual_mov_b32 v5, 0
	v_mov_b32_e32 v6, 0
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __ockl_printf_append_string_n@rel32@lo+4
	s_addc_u32 s3, s3, __ockl_printf_append_string_n@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_swappc_b64 s[30:31], s[2:3]
	v_dual_mov_b32 v37, v59 :: v_dual_mov_b32 v2, 0
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v37
	v_mov_b32_e32 v3, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v37
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_200
; %bb.195:                              ;   in Loop: Header=BB2_159 Depth=2
	global_load_b64 v[4:5], v38, s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[2:3], v38, s[28:29] offset:40
	global_load_b64 v[6:7], v38, s[28:29]
	s_mov_b32 s2, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v3, v3, v5
	v_and_b32_e32 v2, v2, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v3, v3, 24
	v_mul_hi_u32 v8, v2, 24
	v_mul_lo_u32 v2, v2, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v8, v3
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v6, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, v7, v3, vcc_lo
	global_load_b64 v[2:3], v[2:3], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[2:3], v38, v[2:5], s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[2:3], v[4:5]
	s_cbranch_execz .LBB2_199
; %bb.196:                              ; %.preheader3.i.i.i26.i90.preheader
                                        ;   in Loop: Header=BB2_159 Depth=2
	s_mov_b32 s3, 0
.LBB2_197:                              ; %.preheader3.i.i.i26.i90
                                        ;   Parent Loop BB2_6 Depth=1
                                        ;     Parent Loop BB2_159 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[6:7], v38, s[28:29] offset:40
	global_load_b64 v[8:9], v38, s[28:29]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v6, v6, v4
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[2:3], null, v6, 24, v[8:9]
	v_and_b32_e32 v8, v7, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[6:7], null, v8, 24, v[3:4]
	v_mov_b32_e32 v3, v6
	global_load_b64 v[2:3], v[2:3], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[2:3], v38, v[2:5], s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB2_197
; %bb.198:                              ; %Flow736
                                        ;   in Loop: Header=BB2_159 Depth=2
	s_or_b32 exec_lo, exec_lo, s3
.LBB2_199:                              ; %Flow738
                                        ;   in Loop: Header=BB2_159 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB2_200:                              ; %.loopexit4.i.i.i21.i83
                                        ;   in Loop: Header=BB2_159 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_clause 0x1
	global_load_b64 v[8:9], v38, s[28:29] offset:40
	global_load_b128 v[4:7], v38, s[28:29]
	v_readfirstlane_b32 s2, v2
	v_readfirstlane_b32 s3, v3
	s_mov_b32 s8, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v8
	v_readfirstlane_b32 s5, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB2_202
; %bb.201:                              ;   in Loop: Header=BB2_159 Depth=2
	s_add_i32 s10, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v4, s7
	v_add_co_ci_u32_e32 v3, vcc_lo, s10, v5, vcc_lo
	v_dual_mov_b32 v39, s8 :: v_dual_mov_b32 v40, v38
	global_store_b128 v[2:3], v[39:42], off offset:8
.LBB2_202:                              ;   in Loop: Header=BB2_159 Depth=2
	s_or_b32 exec_lo, exec_lo, s9
	v_cmp_lt_f64_e32 vcc_lo, v[56:57], v[45:46]
	s_mov_b32 s21, s20
	s_mov_b32 s22, s20
	s_mov_b32 s23, s20
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[8:9], 6, v[37:38]
	v_and_or_b32 v0, 0xffffff1d, v0, 34
	v_cndmask_b32_e32 v2, -1, v70, vcc_lo
	v_cmp_nge_f64_e32 vcc_lo, v[56:57], v[45:46]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v2, v69, v2, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_co_u32 v6, vcc_lo, v6, s4
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v7, vcc_lo
	v_add_co_u32 v10, vcc_lo, v6, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v11, vcc_lo, v7, v9, vcc_lo
	v_dual_mov_b32 v6, s20 :: v_dual_mov_b32 v9, s23
	v_cvt_f64_i32_e32 v[2:3], v2
	v_dual_mov_b32 v7, s21 :: v_dual_mov_b32 v8, s22
	v_add_f64 v[2:3], v[2:3], s[26:27]
	s_clause 0x3
	global_store_b128 v[10:11], v[0:3], off
	global_store_b128 v[10:11], v[6:9], off offset:16
	global_store_b128 v[10:11], v[6:9], off offset:32
	global_store_b128 v[10:11], v[6:9], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB2_210
; %bb.203:                              ;   in Loop: Header=BB2_159 Depth=2
	s_clause 0x1
	global_load_b64 v[10:11], v38, s[28:29] offset:32 glc
	global_load_b64 v[0:1], v38, s[28:29] offset:40
	v_dual_mov_b32 v8, s2 :: v_dual_mov_b32 v9, s3
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v0
	v_readfirstlane_b32 s9, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v0, vcc_lo, v4, s8
	v_add_co_ci_u32_e32 v1, vcc_lo, s9, v5, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[0:1], v[10:11], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[8:9], v38, v[8:11], s[28:29] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[8:9], v[10:11]
	s_cbranch_execz .LBB2_206
; %bb.204:                              ; %.preheader1.i.i.i24.i88.preheader
                                        ;   in Loop: Header=BB2_159 Depth=2
	s_mov_b32 s8, 0
.LBB2_205:                              ; %.preheader1.i.i.i24.i88
                                        ;   Parent Loop BB2_6 Depth=1
                                        ;     Parent Loop BB2_159 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	v_dual_mov_b32 v6, s2 :: v_dual_mov_b32 v7, s3
	s_sleep 1
	global_store_b64 v[0:1], v[8:9], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[6:7], v38, v[6:9], s[28:29] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[8:9]
	v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB2_205
.LBB2_206:                              ; %Flow734
                                        ;   in Loop: Header=BB2_159 Depth=2
	s_or_b32 exec_lo, exec_lo, s5
	global_load_b64 v[0:1], v38, s[28:29] offset:16
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v6, s8, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v6
	s_cbranch_execz .LBB2_208
; %bb.207:                              ;   in Loop: Header=BB2_159 Depth=2
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v37, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[0:1], v[37:38], off offset:8
.LBB2_208:                              ;   in Loop: Header=BB2_159 Depth=2
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[6:7], v[0:1], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[6:7]
	s_cbranch_vccnz .LBB2_210
; %bb.209:                              ;   in Loop: Header=BB2_159 Depth=2
	global_load_b32 v37, v[0:1], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v37
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[6:7], v[37:38], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB2_210:                              ; %Flow735
                                        ;   in Loop: Header=BB2_159 Depth=2
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v4, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB2_211:                              ;   Parent Loop BB2_6 Depth=1
                                        ;     Parent Loop BB2_159 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	v_mov_b32_e32 v4, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_213
; %bb.212:                              ;   in Loop: Header=BB2_211 Depth=3
	global_load_b32 v4, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v4, 1, v4
.LBB2_213:                              ;   in Loop: Header=BB2_211 Depth=3
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v4
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB2_215
; %bb.214:                              ;   in Loop: Header=BB2_211 Depth=3
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB2_216
.LBB2_215:                              ;   in Loop: Header=BB2_211 Depth=3
	s_mov_b32 s1, -1
.LBB2_216:                              ; %Flow729
                                        ;   in Loop: Header=BB2_211 Depth=3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB2_211
; %bb.217:                              ;   in Loop: Header=BB2_159 Depth=2
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_221
; %bb.218:                              ;   in Loop: Header=BB2_159 Depth=2
	s_clause 0x2
	global_load_b64 v[0:1], v38, s[28:29] offset:40
	global_load_b64 v[8:9], v38, s[28:29] offset:24 glc
	global_load_b64 v[6:7], v38, s[28:29]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v10, vcc_lo, v0, 1
	v_add_co_ci_u32_e32 v11, vcc_lo, 0, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, v10, s2
	v_add_co_ci_u32_e32 v5, vcc_lo, s3, v11, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	v_dual_cndmask_b32 v5, v5, v11 :: v_dual_cndmask_b32 v4, v4, v10
	v_and_b32_e32 v1, v5, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v0, v4, v0
	v_mul_hi_u32 v10, v0, 24
	v_mul_lo_u32 v0, v0, 24
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_u32 v0, vcc_lo, v6, v0
	v_mov_b32_e32 v6, v8
	v_mul_lo_u32 v1, v1, 24
	v_add_nc_u32_e32 v1, v10, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e32 v1, vcc_lo, v7, v1, vcc_lo
	v_mov_b32_e32 v7, v9
	global_store_b64 v[0:1], v[8:9], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[6:7], v38, v[4:7], s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[6:7], v[8:9]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB2_221
; %bb.219:                              ; %.preheader.i.i.i23.i87.preheader
                                        ;   in Loop: Header=BB2_159 Depth=2
	s_mov_b32 s0, 0
.LBB2_220:                              ; %.preheader.i.i.i23.i87
                                        ;   Parent Loop BB2_6 Depth=1
                                        ;     Parent Loop BB2_159 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_sleep 1
	global_store_b64 v[0:1], v[6:7], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[8:9], v38, v[4:7], s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[8:9], v[6:7]
	v_dual_mov_b32 v6, v8 :: v_dual_mov_b32 v7, v9
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB2_220
.LBB2_221:                              ; %__ockl_printf_append_args.exit.i85
                                        ;   in Loop: Header=BB2_159 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	global_load_b32 v4, v[53:54], off
	s_add_i32 s57, s57, 1
	v_mov_b32_e32 v57, v68
	v_cmp_eq_u32_e32 vcc_lo, s57, v71
	v_dual_mov_b32 v40, v66 :: v_dual_mov_b32 v45, v67
	s_or_b32 s56, vcc_lo, s56
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v0, v4, v58
	v_add_nc_u32_e32 v4, 1, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[0:1], 3, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v0, s0, s58, v0
	v_add_co_ci_u32_e64 v1, s0, s59, v1, s0
	global_store_b64 v[0:1], v[2:3], off
	global_store_b32 v[53:54], v4, off
	s_and_not1_b32 exec_lo, exec_lo, s56
	s_cbranch_execnz .LBB2_159
; %bb.222:                              ; %Flow758
                                        ;   in Loop: Header=BB2_6 Depth=1
	s_or_b32 exec_lo, exec_lo, s56
	v_dual_mov_b32 v40, v66 :: v_dual_mov_b32 v45, v67
	v_mov_b32_e32 v57, v68
.LBB2_223:                              ; %Flow759
                                        ;   in Loop: Header=BB2_6 Depth=1
	s_or_b32 exec_lo, exec_lo, s49
	s_add_i32 s48, s48, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f64_i32_e32 v[0:1], s48
	v_cmp_ngt_f64_e32 vcc_lo, s[50:51], v[0:1]
	s_cbranch_vccnz .LBB2_225
; %bb.224:                              ;   in Loop: Header=BB2_6 Depth=1
	v_dual_mov_b32 v66, v60 :: v_dual_mov_b32 v67, v61
	v_dual_mov_b32 v68, v40 :: v_dual_mov_b32 v69, v62
	v_mov_b32_e32 v70, v45
	s_branch .LBB2_6
.LBB2_225:                              ; %Flow843
	v_mov_b32_e32 v0, v63
.LBB2_226:                              ; %._crit_edge
	s_mov_b32 s1, 0x3fe55555
	s_mov_b32 s0, 0x55555555
	s_mov_b32 s2, 0x968915a9
	v_cmp_gt_f64_e32 vcc_lo, s[0:1], v[51:52]
	s_mov_b32 s4, 0x4222de17
	s_mov_b32 s3, 0x3fba6564
	s_mov_b32 s5, 0x3fbdee67
	v_cmp_eq_f64_e64 s21, s[36:37], 0
	s_mov_b32 s28, 1
	v_cndmask_b32_e64 v1, 0, 1, vcc_lo
	v_subrev_co_ci_u32_e32 v0, vcc_lo, 0, v0, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[1:2], v[51:52], v1
	v_add_f64 v[3:4], v[1:2], 1.0
	v_add_f64 v[9:10], v[1:2], -1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[5:6], v[3:4]
	v_add_f64 v[11:12], v[3:4], -1.0
	v_add_f64 v[1:2], v[1:2], -v[11:12]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[7:8], -v[3:4], v[5:6], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[5:6], v[7:8], v[5:6], v[5:6]
	v_fma_f64 v[7:8], -v[3:4], v[5:6], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[5:6], v[7:8], v[5:6], v[5:6]
	v_mul_f64 v[7:8], v[9:10], v[5:6]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[13:14], v[3:4], v[7:8]
	v_fma_f64 v[3:4], v[7:8], v[3:4], -v[13:14]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[1:2], v[7:8], v[1:2], v[3:4]
	v_add_f64 v[3:4], v[13:14], v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[11:12], v[9:10], -v[3:4]
	v_add_f64 v[13:14], v[3:4], -v[13:14]
	v_add_f64 v[9:10], v[9:10], -v[11:12]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[1:2], v[13:14], -v[1:2]
	v_add_f64 v[3:4], v[9:10], -v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[1:2], v[1:2], v[3:4]
	v_add_f64 v[1:2], v[11:12], v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[1:2], v[5:6], v[1:2]
	v_add_f64 v[3:4], v[7:8], v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[5:6], v[3:4], -v[7:8]
	v_mul_f64 v[7:8], v[3:4], v[3:4]
	v_add_f64 v[1:2], v[1:2], -v[5:6]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[5:6], v[3:4], v[3:4], -v[7:8]
	v_add_f64 v[9:10], v[1:2], v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[5:6], v[3:4], v[9:10], v[5:6]
	v_add_f64 v[9:10], v[7:8], v[5:6]
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[11:12], v[9:10], s[4:5], s[2:3]
	s_mov_b32 s2, 0x3abe935a
	s_mov_b32 s3, 0x3fbe25e4
	v_add_f64 v[7:8], v[9:10], -v[7:8]
	v_mul_f64 v[17:18], v[3:4], v[9:10]
	s_mov_b32 s4, 0x652b82fe
	s_mov_b32 s5, 0x3ff71547
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[11:12], v[9:10], v[11:12], s[2:3]
	s_mov_b32 s2, 0x47e6c9c2
	s_mov_b32 s3, 0x3fc110ef
	v_add_f64 v[5:6], v[5:6], -v[7:8]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[11:12], v[9:10], v[11:12], s[2:3]
	s_mov_b32 s2, 0xcfa74449
	s_mov_b32 s3, 0x3fc3b13b
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[11:12], v[9:10], v[11:12], s[2:3]
	s_mov_b32 s2, 0x71bf3c30
	s_mov_b32 s3, 0x3fc745d1
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[11:12], v[9:10], v[11:12], s[2:3]
	s_mov_b32 s2, 0x1c7792ce
	s_mov_b32 s3, 0x3fcc71c7
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[11:12], v[9:10], v[11:12], s[2:3]
	s_mov_b32 s2, 0x924920da
	s_mov_b32 s3, 0x3fd24924
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[11:12], v[9:10], v[11:12], s[2:3]
	s_mov_b32 s2, 0x9999999c
	s_mov_b32 s3, 0x3fd99999
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[11:12], v[9:10], v[11:12], s[2:3]
	s_mov_b32 s3, 0x3c7abc9e
	s_mov_b32 s2, 0x3b39803f
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[13:14], v[9:10], v[11:12]
	v_fma_f64 v[7:8], v[9:10], v[11:12], -v[13:14]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[7:8], v[5:6], v[11:12], v[7:8]
	v_add_f64 v[11:12], v[13:14], v[7:8]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[15:16], v[11:12], s[0:1]
	v_add_f64 v[13:14], v[11:12], -v[13:14]
	s_mov_b32 s1, 0xbfe55555
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_add_f64 v[19:20], v[15:16], s[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_add_f64 v[7:8], v[7:8], -v[13:14]
	v_fma_f64 v[13:14], v[9:10], v[3:4], -v[17:18]
	s_mov_b32 s0, 0xd5df274d
	s_mov_b32 s1, 0x3c8543b0
	v_add_f64 v[11:12], v[11:12], -v[19:20]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[7:8], v[7:8], s[0:1]
	v_fma_f64 v[9:10], v[9:10], v[1:2], v[13:14]
	s_mov_b32 s1, 0x3fe62e42
	s_mov_b32 s0, 0xfefa39ef
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[7:8], v[7:8], v[11:12]
	v_fma_f64 v[5:6], v[5:6], v[3:4], v[9:10]
	v_ldexp_f64 v[3:4], v[3:4], 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[9:10], v[15:16], v[7:8]
	v_add_f64 v[11:12], v[17:18], v[5:6]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[13:14], v[15:16], -v[9:10]
	v_mul_f64 v[15:16], v[11:12], v[9:10]
	v_add_f64 v[17:18], v[11:12], -v[17:18]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[7:8], v[7:8], v[13:14]
	v_fma_f64 v[13:14], v[11:12], v[9:10], -v[15:16]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[5:6], v[5:6], -v[17:18]
	v_fma_f64 v[7:8], v[11:12], v[7:8], v[13:14]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[5:6], v[5:6], v[9:10], v[7:8]
	v_cvt_f64_i32_e32 v[9:10], v0
	v_ldexp_f64 v[0:1], v[1:2], 1
	v_add_f64 v[7:8], v[15:16], v[5:6]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_f64 v[11:12], v[3:4], v[7:8]
	v_add_f64 v[13:14], v[7:8], -v[15:16]
	v_mul_f64 v[15:16], v[9:10], s[0:1]
	v_add_f64 v[2:3], v[11:12], -v[3:4]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[4:5], v[5:6], -v[13:14]
	v_fma_f64 v[13:14], v[9:10], s[0:1], -v[15:16]
	s_mov_b32 s1, 0xbfe62e42
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[2:3], v[7:8], -v[2:3]
	v_add_f64 v[0:1], v[0:1], v[4:5]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[4:5], v[9:10], s[2:3], v[13:14]
	s_mov_b32 s3, 0xbc7abc9e
	v_add_f64 v[0:1], v[0:1], v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[2:3], v[15:16], v[4:5]
	v_add_f64 v[6:7], v[11:12], v[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[15:16], v[2:3], -v[15:16]
	v_add_f64 v[8:9], v[2:3], v[6:7]
	v_add_f64 v[10:11], v[6:7], -v[11:12]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[4:5], v[4:5], -v[15:16]
	v_add_f64 v[13:14], v[8:9], -v[2:3]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[0:1], v[0:1], -v[10:11]
	v_add_f64 v[17:18], v[8:9], -v[13:14]
	v_add_f64 v[6:7], v[6:7], -v[13:14]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[10:11], v[4:5], v[0:1]
	v_add_f64 v[2:3], v[2:3], -v[17:18]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[2:3], v[6:7], v[2:3]
	v_add_f64 v[6:7], v[10:11], -v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[2:3], v[10:11], v[2:3]
	v_add_f64 v[10:11], v[10:11], -v[6:7]
	v_add_f64 v[0:1], v[0:1], -v[6:7]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[12:13], v[8:9], v[2:3]
	v_add_f64 v[4:5], v[4:5], -v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[6:7], v[12:13], -v[8:9]
	v_add_f64 v[0:1], v[0:1], v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[2:3], v[2:3], -v[6:7]
	v_add_f64 v[0:1], v[0:1], v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[2:3], v[12:13], v[0:1]
	v_add_f64 v[4:5], v[2:3], -v[12:13]
	v_mul_f64 v[6:7], 0x40080000, v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[0:1], v[0:1], -v[4:5]
	v_fma_f64 v[2:3], 0x40080000, v[2:3], -v[6:7]
	v_cmp_class_f64_e64 vcc_lo, v[6:7], 0x204
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[0:1], 0x40080000, v[0:1], v[2:3]
	v_add_f64 v[2:3], v[6:7], v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v5, v3, v7 :: v_dual_cndmask_b32 v4, v2, v6
	v_add_f64 v[2:3], v[2:3], -v[6:7]
	v_mul_f64 v[8:9], v[4:5], s[4:5]
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[4:5]|
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[0:1], v[0:1], -v[2:3]
	v_rndne_f64_e32 v[8:9], v[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v1, 0, v1 :: v_dual_cndmask_b32 v0, 0, v0
	v_fma_f64 v[10:11], v[8:9], s[0:1], v[4:5]
	s_mov_b32 s0, 0xfca7ab0c
	s_mov_b32 s1, 0x3e928af3
	v_cvt_i32_f64_e32 v14, v[8:9]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[10:11], v[8:9], s[2:3], v[10:11]
	s_mov_b32 s2, 0x6a5dcb37
	s_mov_b32 s3, 0x3e5ade15
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[12:13], v[10:11], s[2:3], s[0:1]
	s_mov_b32 s0, 0x623fde64
	s_mov_b32 s1, 0x3ec71dee
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[12:13], v[10:11], v[12:13], s[0:1]
	s_mov_b32 s0, 0x7c89e6b0
	s_mov_b32 s1, 0x3efa0199
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[12:13], v[10:11], v[12:13], s[0:1]
	s_mov_b32 s0, 0x14761f6e
	s_mov_b32 s1, 0x3f2a01a0
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[12:13], v[10:11], v[12:13], s[0:1]
	s_mov_b32 s0, 0x1852b7b0
	s_mov_b32 s1, 0x3f56c16c
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[12:13], v[10:11], v[12:13], s[0:1]
	s_mov_b32 s0, 0x11122322
	s_mov_b32 s1, 0x3f811111
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[12:13], v[10:11], v[12:13], s[0:1]
	s_mov_b32 s0, 0x555502a1
	s_mov_b32 s1, 0x3fa55555
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[12:13], v[10:11], v[12:13], s[0:1]
	s_mov_b32 s0, 0x55555511
	s_mov_b32 s1, 0x3fc55555
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[12:13], v[10:11], v[12:13], s[0:1]
	s_mov_b32 s0, 11
	s_mov_b32 s1, 0x3fe00000
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[12:13], v[10:11], v[12:13], s[0:1]
	v_cmp_nlt_f64_e64 s0, 0x40900000, v[4:5]
	v_cmp_ngt_f64_e64 s1, 0xc090cc00, v[4:5]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[12:13], v[10:11], v[12:13], 1.0
	s_and_b32 vcc_lo, s1, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[8:9], v[10:11], v[12:13], 1.0
	v_ldexp_f64 v[6:7], v[8:9], v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v2, 0x7ff00000, v7, s0
	v_cndmask_b32_e64 v3, 0, v2, s1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v2, 0, v6, vcc_lo
	v_fma_f64 v[0:1], v[2:3], v[0:1], v[2:3]
	v_cmp_class_f64_e64 vcc_lo, v[2:3], 0x204
	s_delay_alu instid0(VALU_DEP_2)
	v_dual_cndmask_b32 v1, v1, v3 :: v_dual_cndmask_b32 v0, v0, v2
	v_mov_b32_e32 v2, s37
	s_or_b32 vcc_lo, s21, s33
	s_and_b32 s0, s21, exec_lo
	s_cselect_b32 s0, 0, 0x7ff00000
	v_bfi_b32 v1, 0x7fffffff, v1, s37
	v_bfi_b32 v2, 0x7fffffff, s0, v2
	v_cndmask_b32_e64 v0, v0, 0, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v1, v1, v2, vcc_lo
	v_cmp_eq_f64_e32 vcc_lo, 0, v[0:1]
	s_cbranch_vccnz .LBB2_228
; %bb.227:
	v_div_scale_f64 v[2:3], null, 0x40b5e000, 0x40b5e000, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[4:5], v[2:3]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[6:7], -v[2:3], v[4:5], 1.0
	v_fma_f64 v[4:5], v[4:5], v[6:7], v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[6:7], -v[2:3], v[4:5], 1.0
	v_fma_f64 v[4:5], v[4:5], v[6:7], v[4:5]
	v_div_scale_f64 v[6:7], vcc_lo, v[0:1], 0x40b5e000, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[8:9], v[6:7], v[4:5]
	v_fma_f64 v[2:3], -v[2:3], v[8:9], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f64 v[2:3], v[2:3], v[4:5], v[8:9]
	v_div_fixup_f64 v[0:1], v[2:3], 0x40b5e000, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[0:1], 0x40590000, v[0:1]
	v_ceil_f64_e32 v[0:1], v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_i32_f64_e32 v0, v[0:1]
	v_readfirstlane_b32 s28, v0
.LBB2_228:                              ; %_Z10r3_findBind.exit.i.i
	v_cmp_eq_f64_e64 s20, 0, v[43:44]
	v_mov_b32_e32 v38, 1
	s_mov_b32 s0, exec_lo
	v_cmpx_neq_f64_e32 0, v[43:44]
	s_cbranch_execz .LBB2_230
; %bb.229:
	s_mov_b32 s2, 0xe169d036
	s_mov_b32 s3, 0x40092256
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_scale_f64 v[0:1], null, s[2:3], s[2:3], v[43:44]
	v_rcp_f64_e32 v[2:3], v[0:1]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[4:5], -v[0:1], v[2:3], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[2:3], v[2:3], v[4:5], v[2:3]
	v_fma_f64 v[4:5], -v[0:1], v[2:3], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[2:3], v[2:3], v[4:5], v[2:3]
	v_div_scale_f64 v[4:5], vcc_lo, v[43:44], s[2:3], v[43:44]
	v_mul_f64 v[6:7], v[4:5], v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[0:1], -v[0:1], v[6:7], v[4:5]
	v_div_fmas_f64 v[0:1], v[0:1], v[2:3], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f64 v[0:1], v[0:1], s[2:3], v[43:44]
	v_mul_f64 v[0:1], 0x40668000, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ceil_f64_e32 v[0:1], v[0:1]
	v_cvt_i32_f64_e32 v38, v[0:1]
.LBB2_230:                              ; %_Z13theta_findBind.exit.i.i
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_add_nc_u32_e32 v0, -1, v38
	s_add_i32 s0, s28, -1
                                        ; implicit-def: $vgpr54
                                        ; implicit-def: $vgpr52
                                        ; implicit-def: $vgpr51
                                        ; implicit-def: $vgpr4
                                        ; implicit-def: $vgpr5
                                        ; implicit-def: $vgpr53
	s_cmpk_gt_u32 s0, 0x63
	s_cselect_b32 s0, -1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_lt_u32_e32 vcc_lo, 0xb3, v0
	s_or_b32 s0, s0, vcc_lo
	s_and_saveexec_b32 s1, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s29, exec_lo, s1
	s_cbranch_execz .LBB2_370
; %bb.231:
	v_add_nc_u32_e32 v0, 0xffffff4b, v38
	s_cmp_lg_u32 s28, 1
                                        ; implicit-def: $vgpr54
                                        ; implicit-def: $vgpr52
                                        ; implicit-def: $vgpr51
                                        ; implicit-def: $vgpr4
                                        ; implicit-def: $vgpr5
                                        ; implicit-def: $vgpr53
	s_cselect_b32 s1, -1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cmp_lt_u32_e64 s0, 0xffffff4b, v0
	v_cmp_gt_u32_e32 vcc_lo, 0xffffff4c, v0
	s_or_b32 s0, s1, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s1, s0
	s_xor_b32 s33, exec_lo, s1
	s_cbranch_execz .LBB2_359
; %bb.232:
	s_cmp_lt_i32 s28, 2
	s_mov_b32 s2, -1
	s_cselect_b32 s0, -1, 0
	s_xor_b32 s1, vcc_lo, -1
                                        ; implicit-def: $vgpr52
                                        ; implicit-def: $vgpr51
                                        ; implicit-def: $vgpr4
                                        ; implicit-def: $vgpr5
                                        ; implicit-def: $vgpr53
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s0, s0, s1
                                        ; implicit-def: $sgpr1
	s_and_saveexec_b32 s3, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s38, exec_lo, s3
	s_cbranch_execz .LBB2_348
; %bb.233:
	v_mov_b32_e32 v2, 0
	s_getpc_b64 s[4:5]
	s_add_u32 s4, s4, _ZZ11get_npe_numiiPdP12hiprandStateE7warning@rel32@lo+4
	s_addc_u32 s5, s5, _ZZ11get_npe_numiiPdP12hiprandStateE7warning@rel32@hi+12
	global_load_b64 v[0:1], v2, s[4:5]
	s_waitcnt vmcnt(0)
	v_cmp_lt_i64_e32 vcc_lo, 8, v[0:1]
	v_add_co_u32 v0, s0, v0, 1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v1, s0, 0, v1, s0
	global_store_b64 v2, v[0:1], s[4:5]
	s_cbranch_vccz .LBB2_264
; %bb.234:
	v_cmp_ne_u64_e32 vcc_lo, 10, v[0:1]
	s_cbranch_vccnz .LBB2_263
; %bb.235:
	s_load_b64 s[2:3], s[34:35], 0x50
	v_mov_b32_e32 v4, v59
	v_mov_b32_e32 v6, 0
	v_mov_b32_e32 v7, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s0, v4
	v_cmp_eq_u32_e64 s0, s0, v4
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_241
; %bb.236:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s4, exec_lo
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[8:9], v0, s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[2:3] offset:40
	global_load_b64 v[5:6], v0, s[2:3]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v2, v2, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v3, v1, 24
	v_mul_lo_u32 v2, v2, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v3, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v5, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v6, v2, vcc_lo
	global_load_b64 v[6:7], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[6:7], v[8:9]
	s_cbranch_execz .LBB2_240
; %bb.237:                              ; %.preheader3.i.i.i85.i.i.i.preheader
	s_mov_b32 s5, 0
.LBB2_238:                              ; %.preheader3.i.i.i85.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[2:3] offset:40
	global_load_b64 v[10:11], v0, s[2:3]
	v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v7, v2, v9
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v1, 24, v[10:11]
	v_mov_b32_e32 v1, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, v7, 24, v[1:2]
	v_mov_b32_e32 v6, v2
	global_load_b64 v[6:7], v[5:6], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[8:9]
	s_or_b32 s5, vcc_lo, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s5
	s_cbranch_execnz .LBB2_238
; %bb.239:                              ; %Flow652
	s_or_b32 exec_lo, exec_lo, s5
.LBB2_240:                              ; %Flow654
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s4
.LBB2_241:                              ; %.loopexit4.i.i.i80.i.i.i
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v5, 0
	v_readfirstlane_b32 s4, v6
	v_readfirstlane_b32 s5, v7
	s_mov_b32 s10, exec_lo
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[8:9], v5, s[2:3] offset:40
	global_load_b128 v[0:3], v5, s[2:3]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s6, v8
	v_readfirstlane_b32 s7, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[6:7], s[4:5], s[6:7]
	s_mul_i32 s1, s7, 24
	s_mul_hi_u32 s8, s6, 24
	s_mul_i32 s9, s6, 24
	s_and_saveexec_b32 s11, s0
	s_cbranch_execz .LBB2_243
; %bb.242:
	s_add_i32 s12, s8, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v10, vcc_lo, v0, s9
	v_add_co_ci_u32_e32 v11, vcc_lo, s12, v1, vcc_lo
	v_dual_mov_b32 v6, s10 :: v_dual_mov_b32 v7, v5
	v_dual_mov_b32 v8, 2 :: v_dual_mov_b32 v9, 1
	global_store_b128 v[10:11], v[6:9], off offset:8
.LBB2_243:
	s_or_b32 exec_lo, exec_lo, s11
	s_lshl_b64 s[6:7], s[6:7], 12
	v_lshlrev_b64 v[6:7], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s6
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v3, vcc_lo
	s_mov_b32 s12, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, v2, v6
	s_mov_b32 s13, s12
	s_mov_b32 s14, s12
	s_mov_b32 s15, s12
	v_add_co_ci_u32_e32 v9, vcc_lo, v3, v7, vcc_lo
	v_dual_mov_b32 v4, 33 :: v_dual_mov_b32 v7, v5
	v_mov_b32_e32 v6, v5
	v_dual_mov_b32 v10, s12 :: v_dual_mov_b32 v13, s15
	v_dual_mov_b32 v11, s13 :: v_dual_mov_b32 v12, s14
	s_clause 0x3
	global_store_b128 v[8:9], v[4:7], off
	global_store_b128 v[8:9], v[10:13], off offset:16
	global_store_b128 v[8:9], v[10:13], off offset:32
	global_store_b128 v[8:9], v[10:13], off offset:48
	s_and_saveexec_b32 s6, s0
	s_cbranch_execz .LBB2_251
; %bb.244:
	v_mov_b32_e32 v10, 0
	s_mov_b32 s7, exec_lo
	s_clause 0x1
	global_load_b64 v[13:14], v10, s[2:3] offset:32 glc
	global_load_b64 v[2:3], v10, s[2:3] offset:40
	v_dual_mov_b32 v11, s4 :: v_dual_mov_b32 v12, s5
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v3, s5, v3
	v_and_b32_e32 v2, s4, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v3, v3, 24
	v_mul_hi_u32 v4, v2, 24
	v_mul_lo_u32 v2, v2, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v4, v3
	v_add_co_u32 v6, vcc_lo, v0, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v7, vcc_lo, v1, v3, vcc_lo
	global_store_b64 v[6:7], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v10, v[11:14], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[13:14]
	s_cbranch_execz .LBB2_247
; %bb.245:                              ; %.preheader1.i.i.i83.i.i.i.preheader
	s_mov_b32 s10, 0
.LBB2_246:                              ; %.preheader1.i.i.i83.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v2, s4 :: v_dual_mov_b32 v3, s5
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v10, v[2:5], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s10, vcc_lo, s10
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s10
	s_cbranch_execnz .LBB2_246
.LBB2_247:                              ; %Flow650
	s_or_b32 exec_lo, exec_lo, s7
	v_mov_b32_e32 v5, 0
	s_mov_b32 s10, exec_lo
	s_mov_b32 s7, exec_lo
	v_mbcnt_lo_u32_b32 v4, s10, 0
	global_load_b64 v[2:3], v5, s[2:3] offset:16
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB2_249
; %bb.248:
	s_bcnt1_i32_b32 s10, s10
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s10
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[4:5], off offset:8
.LBB2_249:
	s_or_b32 exec_lo, exec_lo, s7
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB2_251
; %bb.250:
	global_load_b32 v2, v[2:3], off offset:24
	v_mov_b32_e32 v3, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s7, v2
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[2:3], off
	s_and_b32 m0, s7, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB2_251:                              ; %Flow651
	s_or_b32 exec_lo, exec_lo, s6
	s_add_i32 s8, s8, s1
	v_add_co_u32 v0, vcc_lo, v0, s9
	v_add_co_ci_u32_e32 v1, vcc_lo, s8, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB2_252:                              ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_254
; %bb.253:                              ;   in Loop: Header=BB2_252 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB2_254:                              ;   in Loop: Header=BB2_252 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB2_256
; %bb.255:                              ;   in Loop: Header=BB2_252 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB2_257
.LBB2_256:                              ;   in Loop: Header=BB2_252 Depth=1
	s_mov_b32 s1, -1
.LBB2_257:                              ; %Flow645
                                        ;   in Loop: Header=BB2_252 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB2_252
; %bb.258:
	global_load_b64 v[0:1], v[8:9], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_262
; %bb.259:
	v_mov_b32_e32 v8, 0
	s_clause 0x2
	global_load_b64 v[4:5], v8, s[2:3] offset:40
	global_load_b64 v[9:10], v8, s[2:3] offset:24 glc
	global_load_b64 v[6:7], v8, s[2:3]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v11, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v11, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v2, v4
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v4, 24
	v_mul_lo_u32 v4, v4, 24
	v_add_nc_u32_e32 v5, v11, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v10
	global_store_b64 v[6:7], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB2_262
; %bb.260:                              ; %.preheader.i.i.i82.i.i.i.preheader
	s_mov_b32 s0, 0
.LBB2_261:                              ; %.preheader.i.i.i82.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
	v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB2_261
.LBB2_262:                              ; %__ockl_printf_begin.exit86.i.i.i
	s_or_b32 exec_lo, exec_lo, s1
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str.2@rel32@lo+4
	s_addc_u32 s1, s1, .str.2@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	v_dual_mov_b32 v2, s0 :: v_dual_mov_b32 v3, s1
	s_cmp_lg_u64 s[0:1], 0
	v_mov_b32_e32 v6, 1
	s_cselect_b32 s4, 30, 0
	v_dual_mov_b32 v5, 0 :: v_dual_mov_b32 v4, s4
	s_add_u32 s8, s18, 0x88
	s_addc_u32 s9, s19, 0
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __ockl_printf_append_string_n@rel32@lo+4
	s_addc_u32 s3, s3, __ockl_printf_append_string_n@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[2:3]
.LBB2_263:                              ; %Flow655
	s_mov_b32 s2, 0
	s_mov_b32 s1, 0
	s_branch .LBB2_265
.LBB2_264:
                                        ; implicit-def: $sgpr1
.LBB2_265:                              ; %Flow700
	s_and_not1_b32 vcc_lo, exec_lo, s2
	s_cbranch_vccnz .LBB2_347
; %bb.266:
	s_load_b64 s[22:23], s[34:35], 0x50
	v_mov_b32_e32 v4, v59
	v_mov_b32_e32 v6, 0
	v_mov_b32_e32 v7, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s0, v4
	v_cmp_eq_u32_e64 s0, s0, v4
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_272
; %bb.267:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s2, exec_lo
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[8:9], v0, s[22:23] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[22:23] offset:40
	global_load_b64 v[5:6], v0, s[22:23]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v2, v2, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v3, v1, 24
	v_mul_lo_u32 v2, v2, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v3, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v5, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v6, v2, vcc_lo
	global_load_b64 v[6:7], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[22:23] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[6:7], v[8:9]
	s_cbranch_execz .LBB2_271
; %bb.268:                              ; %.preheader3.i.i.i.i.i.i.preheader
	s_mov_b32 s3, 0
.LBB2_269:                              ; %.preheader3.i.i.i.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[22:23] offset:40
	global_load_b64 v[10:11], v0, s[22:23]
	v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v7, v2, v9
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v1, 24, v[10:11]
	v_mov_b32_e32 v1, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, v7, 24, v[1:2]
	v_mov_b32_e32 v6, v2
	global_load_b64 v[6:7], v[5:6], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[22:23] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[8:9]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB2_269
; %bb.270:                              ; %Flow696
	s_or_b32 exec_lo, exec_lo, s3
.LBB2_271:                              ; %Flow698
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB2_272:                              ; %.loopexit4.i.i.i.i.i.i
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v5, 0
	v_readfirstlane_b32 s2, v6
	v_readfirstlane_b32 s3, v7
	s_mov_b32 s8, exec_lo
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[8:9], v5, s[22:23] offset:40
	global_load_b128 v[0:3], v5, s[22:23]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v8
	v_readfirstlane_b32 s5, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB2_274
; %bb.273:
	s_add_i32 s10, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v10, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v11, vcc_lo, s10, v1, vcc_lo
	v_dual_mov_b32 v6, s8 :: v_dual_mov_b32 v7, v5
	v_dual_mov_b32 v8, 2 :: v_dual_mov_b32 v9, 1
	global_store_b128 v[10:11], v[6:9], off offset:8
.LBB2_274:
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[6:7], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, v2, v6
	s_mov_b32 s11, s8
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, v3, v7, vcc_lo
	v_dual_mov_b32 v4, 33 :: v_dual_mov_b32 v7, v5
	v_dual_mov_b32 v6, v5 :: v_dual_mov_b32 v13, s11
	v_dual_mov_b32 v12, s10 :: v_dual_mov_b32 v11, s9
	v_mov_b32_e32 v10, s8
	s_clause 0x3
	global_store_b128 v[8:9], v[4:7], off
	global_store_b128 v[8:9], v[10:13], off offset:16
	global_store_b128 v[8:9], v[10:13], off offset:32
	global_store_b128 v[8:9], v[10:13], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB2_281
; %bb.275:
	v_mov_b32_e32 v10, 0
	s_mov_b32 s5, exec_lo
	s_clause 0x1
	global_load_b64 v[13:14], v10, s[22:23] offset:32 glc
	global_load_b64 v[2:3], v10, s[22:23] offset:40
	v_dual_mov_b32 v11, s2 :: v_dual_mov_b32 v12, s3
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v3, s3, v3
	v_and_b32_e32 v2, s2, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v3, v3, 24
	v_mul_hi_u32 v4, v2, 24
	v_mul_lo_u32 v2, v2, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v4, v3
	v_add_co_u32 v6, vcc_lo, v0, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v7, vcc_lo, v1, v3, vcc_lo
	global_store_b64 v[6:7], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v10, v[11:14], s[22:23] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[13:14]
	s_cbranch_execz .LBB2_277
.LBB2_276:                              ; %.preheader1.i.i.i.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v10, v[2:5], s[22:23] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB2_276
.LBB2_277:                              ; %Flow694
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v5, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v4, s8, 0
	global_load_b64 v[2:3], v5, s[22:23] offset:16
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB2_279
; %bb.278:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[4:5], off offset:8
.LBB2_279:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB2_281
; %bb.280:
	global_load_b32 v2, v[2:3], off offset:24
	v_mov_b32_e32 v3, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v2
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[2:3], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB2_281:                              ; %Flow695
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB2_282:                              ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_284
; %bb.283:                              ;   in Loop: Header=BB2_282 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB2_284:                              ;   in Loop: Header=BB2_282 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB2_286
; %bb.285:                              ;   in Loop: Header=BB2_282 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB2_287
.LBB2_286:                              ;   in Loop: Header=BB2_282 Depth=1
	s_mov_b32 s1, -1
.LBB2_287:                              ; %Flow689
                                        ;   in Loop: Header=BB2_282 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB2_282
; %bb.288:
	global_load_b64 v[0:1], v[8:9], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_292
; %bb.289:
	v_mov_b32_e32 v8, 0
	s_clause 0x2
	global_load_b64 v[4:5], v8, s[22:23] offset:40
	global_load_b64 v[9:10], v8, s[22:23] offset:24 glc
	global_load_b64 v[6:7], v8, s[22:23]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v11, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v11, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v2, v4
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v4, 24
	v_mul_lo_u32 v4, v4, 24
	v_add_nc_u32_e32 v5, v11, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v10
	global_store_b64 v[6:7], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[22:23] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB2_292
; %bb.290:                              ; %.preheader.i.i.i.i.i.i.preheader
	s_mov_b32 s0, 0
.LBB2_291:                              ; %.preheader.i.i.i.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[22:23] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
	v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB2_291
.LBB2_292:                              ; %__ockl_printf_begin.exit.i.i.i
	s_or_b32 exec_lo, exec_lo, s1
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str.1@rel32@lo+4
	s_addc_u32 s1, s1, .str.1@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	v_dual_mov_b32 v2, s0 :: v_dual_mov_b32 v3, s1
	s_cmp_lg_u64 s[0:1], 0
	v_mov_b32_e32 v6, 0
	s_cselect_b32 s4, 17, 0
	v_dual_mov_b32 v5, 0 :: v_dual_mov_b32 v4, s4
	s_add_u32 s8, s18, 0x88
	s_addc_u32 s9, s19, 0
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __ockl_printf_append_string_n@rel32@lo+4
	s_addc_u32 s3, s3, __ockl_printf_append_string_n@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	s_swappc_b64 s[30:31], s[2:3]
	v_mov_b32_e32 v2, v59
	v_mov_b32_e32 v8, 0
	v_mov_b32_e32 v9, 0
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v2
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_298
; %bb.293:
	v_mov_b32_e32 v3, 0
	s_mov_b32 s2, exec_lo
	global_load_b64 v[6:7], v3, s[22:23] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[4:5], v3, s[22:23] offset:40
	global_load_b64 v[8:9], v3, s[22:23]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v4, v4, v6
	v_and_b32_e32 v5, v5, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v10, v4, 24
	v_mul_lo_u32 v5, v5, 24
	v_mul_lo_u32 v4, v4, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v5, v10, v5
	s_waitcnt vmcnt(0)
	v_add_co_u32 v4, vcc_lo, v8, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, v9, v5, vcc_lo
	global_load_b64 v[4:5], v[4:5], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[8:9], v3, v[4:7], s[22:23] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[8:9], v[6:7]
	s_cbranch_execz .LBB2_297
; %bb.294:                              ; %.preheader3.i.i.i72.i.i.i.preheader
	s_mov_b32 s3, 0
.LBB2_295:                              ; %.preheader3.i.i.i72.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[4:5], v3, s[22:23] offset:40
	global_load_b64 v[10:11], v3, s[22:23]
	v_dual_mov_b32 v6, v8 :: v_dual_mov_b32 v7, v9
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v4, v6
	v_and_b32_e32 v5, v5, v7
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[8:9], null, v4, 24, v[10:11]
	v_mov_b32_e32 v4, v9
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[9:10], null, v5, 24, v[4:5]
	global_load_b64 v[4:5], v[8:9], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[8:9], v3, v[4:7], s[22:23] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[8:9], v[6:7]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB2_295
; %bb.296:                              ; %Flow682
	s_or_b32 exec_lo, exec_lo, s3
.LBB2_297:                              ; %Flow684
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB2_298:                              ; %.loopexit4.i.i.i67.i.i.i
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v3, 0
	v_readfirstlane_b32 s2, v8
	v_readfirstlane_b32 s3, v9
	s_mov_b32 s8, exec_lo
	s_clause 0x1
	global_load_b64 v[10:11], v3, s[22:23] offset:40
	global_load_b128 v[4:7], v3, s[22:23]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v10
	v_readfirstlane_b32 s5, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB2_300
; %bb.299:
	s_add_i32 s10, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v12, vcc_lo, v4, s7
	v_add_co_ci_u32_e32 v13, vcc_lo, s10, v5, vcc_lo
	v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, v3
	v_dual_mov_b32 v10, 2 :: v_dual_mov_b32 v11, 1
	global_store_b128 v[12:13], v[8:11], off offset:8
.LBB2_300:
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[8:9], 6, v[2:3]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v6, s4
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v7, vcc_lo
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v2, v8
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	s_mov_b32 s11, s8
	v_and_or_b32 v0, 0xffffff1f, v0, 32
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v9, vcc_lo
	v_mov_b32_e32 v2, s28
	v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v11, s11
	v_dual_mov_b32 v9, s9 :: v_dual_mov_b32 v10, s10
	s_clause 0x3
	global_store_b128 v[6:7], v[0:3], off
	global_store_b128 v[6:7], v[8:11], off offset:16
	global_store_b128 v[6:7], v[8:11], off offset:32
	global_store_b128 v[6:7], v[8:11], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB2_308
; %bb.301:
	v_dual_mov_b32 v10, 0 :: v_dual_mov_b32 v11, s2
	v_mov_b32_e32 v12, s3
	s_clause 0x1
	global_load_b64 v[13:14], v10, s[22:23] offset:32 glc
	global_load_b64 v[0:1], v10, s[22:23] offset:40
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v0
	v_readfirstlane_b32 s9, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v8, vcc_lo, v4, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, s9, v5, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[8:9], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v10, v[11:14], s[22:23] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[2:3], v[13:14]
	s_cbranch_execz .LBB2_304
; %bb.302:                              ; %.preheader1.i.i.i70.i.i.i.preheader
	s_mov_b32 s8, 0
.LBB2_303:                              ; %.preheader1.i.i.i70.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s3
	s_sleep 1
	global_store_b64 v[8:9], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[0:1], v10, v[0:3], s[22:23] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[2:3]
	v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB2_303
.LBB2_304:                              ; %Flow680
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v3, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v2, s8, 0
	global_load_b64 v[0:1], v3, s[22:23] offset:16
	v_cmpx_eq_u32_e32 0, v2
	s_cbranch_execz .LBB2_306
; %bb.305:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v2, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[0:1], v[2:3], off offset:8
.LBB2_306:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[2:3], v[0:1], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	s_cbranch_vccnz .LBB2_308
; %bb.307:
	global_load_b32 v0, v[0:1], off offset:24
	v_mov_b32_e32 v1, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v0
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[2:3], v[0:1], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB2_308:                              ; %Flow681
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v4, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB2_309:                              ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_311
; %bb.310:                              ;   in Loop: Header=BB2_309 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB2_311:                              ;   in Loop: Header=BB2_309 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB2_313
; %bb.312:                              ;   in Loop: Header=BB2_309 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB2_314
.LBB2_313:                              ;   in Loop: Header=BB2_309 Depth=1
	s_mov_b32 s1, -1
.LBB2_314:                              ; %Flow675
                                        ;   in Loop: Header=BB2_309 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB2_309
; %bb.315:
	global_load_b64 v[36:37], v[6:7], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_319
; %bb.316:
	v_mov_b32_e32 v6, 0
	s_clause 0x2
	global_load_b64 v[2:3], v6, s[22:23] offset:40
	global_load_b64 v[7:8], v6, s[22:23] offset:24 glc
	global_load_b64 v[4:5], v6, s[22:23]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v9, vcc_lo, v2, 1
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v9, s2
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[0:1]
	v_dual_cndmask_b32 v1, v1, v10 :: v_dual_cndmask_b32 v0, v0, v9
	v_and_b32_e32 v3, v1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v2, v0, v2
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v9, v2, 24
	v_mul_lo_u32 v2, v2, 24
	v_add_nc_u32_e32 v3, v9, v3
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v4, vcc_lo, v4, v2
	v_mov_b32_e32 v2, v7
	v_add_co_ci_u32_e32 v5, vcc_lo, v5, v3, vcc_lo
	v_mov_b32_e32 v3, v8
	global_store_b64 v[4:5], v[7:8], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v6, v[0:3], s[22:23] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[2:3], v[7:8]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB2_319
; %bb.317:                              ; %.preheader.i.i.i69.i.i.i.preheader
	s_mov_b32 s0, 0
.LBB2_318:                              ; %.preheader.i.i.i69.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[4:5], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[7:8], v6, v[0:3], s[22:23] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[7:8], v[2:3]
	v_dual_mov_b32 v2, v7 :: v_dual_mov_b32 v3, v8
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB2_318
.LBB2_319:                              ; %__ockl_printf_append_args.exit.i.i.i
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v4, v59
	v_mov_b32_e32 v6, 0
	v_mov_b32_e32 v7, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s0, v4
	v_cmp_eq_u32_e64 s0, s0, v4
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_325
; %bb.320:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s2, exec_lo
	global_load_b64 v[8:9], v0, s[22:23] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[22:23] offset:40
	global_load_b64 v[5:6], v0, s[22:23]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v2, v2, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v3, v1, 24
	v_mul_lo_u32 v2, v2, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v3, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v5, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v6, v2, vcc_lo
	global_load_b64 v[6:7], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[22:23] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[6:7], v[8:9]
	s_cbranch_execz .LBB2_324
; %bb.321:                              ; %.preheader3.i.i.i78.i.i.i.preheader
	s_mov_b32 s3, 0
.LBB2_322:                              ; %.preheader3.i.i.i78.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[22:23] offset:40
	global_load_b64 v[10:11], v0, s[22:23]
	v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v7, v2, v9
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v1, 24, v[10:11]
	v_mov_b32_e32 v1, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, v7, 24, v[1:2]
	v_mov_b32_e32 v6, v2
	global_load_b64 v[6:7], v[5:6], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[22:23] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[8:9]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB2_322
; %bb.323:                              ; %Flow668
	s_or_b32 exec_lo, exec_lo, s3
.LBB2_324:                              ; %Flow670
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB2_325:                              ; %.loopexit4.i.i.i73.i.i.i
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v5, 0
	v_readfirstlane_b32 s2, v6
	v_readfirstlane_b32 s3, v7
	s_mov_b32 s8, exec_lo
	s_clause 0x1
	global_load_b64 v[8:9], v5, s[22:23] offset:40
	global_load_b128 v[0:3], v5, s[22:23]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v8
	v_readfirstlane_b32 s5, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB2_327
; %bb.326:
	s_add_i32 s10, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v10, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v11, vcc_lo, s10, v1, vcc_lo
	v_dual_mov_b32 v6, s8 :: v_dual_mov_b32 v7, v5
	v_dual_mov_b32 v8, 2 :: v_dual_mov_b32 v9, 1
	global_store_b128 v[10:11], v[6:9], off offset:8
.LBB2_327:
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[6:7], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v2, v6
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	s_mov_b32 s11, s8
	v_and_or_b32 v36, 0xffffff1d, v36, 34
	v_add_co_ci_u32_e32 v7, vcc_lo, v3, v7, vcc_lo
	v_dual_mov_b32 v39, v5 :: v_dual_mov_b32 v2, s8
	v_dual_mov_b32 v3, s9 :: v_dual_mov_b32 v4, s10
	v_mov_b32_e32 v5, s11
	s_clause 0x3
	global_store_b128 v[6:7], v[36:39], off
	global_store_b128 v[6:7], v[2:5], off offset:16
	global_store_b128 v[6:7], v[2:5], off offset:32
	global_store_b128 v[6:7], v[2:5], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB2_335
; %bb.328:
	v_dual_mov_b32 v8, 0 :: v_dual_mov_b32 v9, s2
	v_mov_b32_e32 v10, s3
	s_clause 0x1
	global_load_b64 v[11:12], v8, s[22:23] offset:32 glc
	global_load_b64 v[2:3], v8, s[22:23] offset:40
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v2
	v_readfirstlane_b32 s9, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v6, vcc_lo, v0, s8
	v_add_co_ci_u32_e32 v7, vcc_lo, s9, v1, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[6:7], v[11:12], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[9:12], s[22:23] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[11:12]
	s_cbranch_execz .LBB2_331
; %bb.329:                              ; %.preheader1.i.i.i76.i.i.i.preheader
	s_mov_b32 s8, 0
.LBB2_330:                              ; %.preheader1.i.i.i76.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v8, v[2:5], s[22:23] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB2_330
.LBB2_331:                              ; %Flow666
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v5, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v4, s8, 0
	global_load_b64 v[2:3], v5, s[22:23] offset:16
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB2_333
; %bb.332:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[4:5], off offset:8
.LBB2_333:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB2_335
; %bb.334:
	global_load_b32 v2, v[2:3], off offset:24
	v_mov_b32_e32 v3, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v2
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[2:3], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB2_335:                              ; %Flow667
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB2_336:                              ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_338
; %bb.337:                              ;   in Loop: Header=BB2_336 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB2_338:                              ;   in Loop: Header=BB2_336 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB2_340
; %bb.339:                              ;   in Loop: Header=BB2_336 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB2_341
.LBB2_340:                              ;   in Loop: Header=BB2_336 Depth=1
	s_mov_b32 s1, -1
.LBB2_341:                              ; %Flow661
                                        ;   in Loop: Header=BB2_336 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB2_336
; %bb.342:
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_346
; %bb.343:
	v_mov_b32_e32 v6, 0
	s_clause 0x2
	global_load_b64 v[2:3], v6, s[22:23] offset:40
	global_load_b64 v[7:8], v6, s[22:23] offset:24 glc
	global_load_b64 v[4:5], v6, s[22:23]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v9, vcc_lo, v2, 1
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v9, s2
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[0:1]
	v_dual_cndmask_b32 v1, v1, v10 :: v_dual_cndmask_b32 v0, v0, v9
	v_and_b32_e32 v3, v1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v2, v0, v2
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v9, v2, 24
	v_mul_lo_u32 v2, v2, 24
	v_add_nc_u32_e32 v3, v9, v3
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v4, vcc_lo, v4, v2
	v_mov_b32_e32 v2, v7
	v_add_co_ci_u32_e32 v5, vcc_lo, v5, v3, vcc_lo
	v_mov_b32_e32 v3, v8
	global_store_b64 v[4:5], v[7:8], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v6, v[0:3], s[22:23] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[2:3], v[7:8]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB2_346
; %bb.344:                              ; %.preheader.i.i.i75.i.i.i.preheader
	s_mov_b32 s0, 0
.LBB2_345:                              ; %.preheader.i.i.i75.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[4:5], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[7:8], v6, v[0:3], s[22:23] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[7:8], v[2:3]
	v_dual_mov_b32 v2, v7 :: v_dual_mov_b32 v3, v8
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB2_345
.LBB2_346:                              ; %Flow659
	s_or_b32 exec_lo, exec_lo, s1
	s_mov_b32 s1, 0
.LBB2_347:                              ; %Flow701
	v_dual_mov_b32 v52, v60 :: v_dual_mov_b32 v51, v61
	v_dual_mov_b32 v4, v40 :: v_dual_mov_b32 v5, v45
	v_mov_b32_e32 v53, v62
                                        ; implicit-def: $vgpr38
                                        ; implicit-def: $vgpr60
                                        ; implicit-def: $vgpr45
                                        ; implicit-def: $vgpr62
                                        ; implicit-def: $vgpr61
                                        ; implicit-def: $vgpr40
.LBB2_348:                              ; %Flow707
	s_or_saveexec_b32 s0, s38
	v_mov_b32_e32 v54, s1
	s_xor_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB2_358
; %bb.349:
	v_lshrrev_b32_e32 v0, 2, v57
	v_cmp_gt_i32_e32 vcc_lo, 0xb5, v38
	v_lshlrev_b32_e32 v1, 4, v60
	v_lshrrev_b32_e32 v3, 2, v45
	v_add_nc_u32_e32 v53, 0xb0f8a, v62
	v_xor_b32_e32 v0, v0, v57
	s_mul_i32 s1, s28, 0xb4
	v_dual_mov_b32 v7, 32 :: v_dual_mov_b32 v6, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v2, 1, v0
	v_xor_b32_e32 v1, v2, v1
	v_xor_b32_e32 v2, v3, v45
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor3_b32 v51, v1, v0, v60
	v_lshlrev_b32_e32 v0, 1, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v1, 4, v51
	v_xor_b32_e32 v0, v0, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_xor3_b32 v52, v0, v2, v51
	v_add3_u32 v2, v62, v51, 0x587c5
	v_add_nc_u32_e32 v0, v52, v53
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_u32_e32 v[2:3], v2
	v_lshrrev_b32_e32 v0, 11, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f64_u32_e32 v[0:1], v0
	v_ldexp_f64 v[0:1], v[0:1], 32
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[0:1], v[0:1], v[2:3]
	v_max_i32_e32 v2, 1, v38
	v_add_nc_u32_e32 v2, -1, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v2, 0xb3, v2, vcc_lo
	v_add3_u32 v2, 0xffffff4c, s1, v2
	s_mov_b32 s1, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_lshl_add_u32 v4, v2, 5, v2
	v_fma_f64 v[0:1], 0x3ca00000, v[0:1], 0x3ca00000
.LBB2_350:                              ; %.lr.ph.i.i59.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	v_sub_nc_u32_e32 v2, v7, v6
	s_mov_b32 s2, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v3, 31, v2
	v_add_nc_u32_e32 v2, v2, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v2, 1, v2
	v_add_nc_u32_e32 v5, v2, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v2, v5, v4
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 3, v[2:3]
	v_add_co_u32 v2, vcc_lo, s54, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s55, v3, vcc_lo
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(0)
	v_cmpx_neq_f64_e32 v[2:3], v[0:1]
	s_cbranch_execz .LBB2_356
; %bb.351:                              ;   in Loop: Header=BB2_350 Depth=1
	s_mov_b32 s3, exec_lo
	v_cmpx_nlt_f64_e32 v[2:3], v[0:1]
	s_cbranch_execz .LBB2_355
; %bb.352:                              ;   in Loop: Header=BB2_350 Depth=1
	s_mov_b32 s4, exec_lo
	v_cmpx_gt_f64_e32 v[2:3], v[0:1]
; %bb.353:                              ;   in Loop: Header=BB2_350 Depth=1
	v_mov_b32_e32 v7, v5
; %bb.354:                              ; %Flow702
                                        ;   in Loop: Header=BB2_350 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	v_mov_b32_e32 v5, v6
.LBB2_355:                              ; %Flow704
                                        ;   in Loop: Header=BB2_350 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v6, v5 :: v_dual_mov_b32 v5, v7
.LBB2_356:                              ;   in Loop: Header=BB2_350 Depth=1
	s_or_b32 exec_lo, exec_lo, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v7, v5 :: v_dual_add_nc_u32 v2, 1, v6
	v_cmp_ge_i32_e32 vcc_lo, v2, v5
	s_or_b32 s1, vcc_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB2_350
; %bb.357:                              ; %_Z8samplingP12hiprandStatePdii.exit66.i.i.i
	s_or_b32 exec_lo, exec_lo, s1
	v_add_nc_u32_e32 v2, v6, v4
	v_mov_b32_e32 v4, v60
	v_mov_b32_e32 v57, v40
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[2:3], 3, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s54, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s55, v3, vcc_lo
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(0)
	v_cmp_lt_f64_e32 vcc_lo, v[2:3], v[0:1]
	v_cndmask_b32_e32 v7, -1, v5, vcc_lo
	v_mov_b32_e32 v5, v61
	v_cmp_nge_f64_e32 vcc_lo, v[2:3], v[0:1]
	s_delay_alu instid0(VALU_DEP_3)
	v_cndmask_b32_e32 v54, v6, v7, vcc_lo
.LBB2_358:                              ; %Flow708
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $vgpr60
                                        ; implicit-def: $vgpr45
                                        ; implicit-def: $vgpr62
                                        ; implicit-def: $vgpr40
                                        ; implicit-def: $vgpr61
.LBB2_359:                              ; %Flow714
	s_and_not1_saveexec_b32 s0, s33
	s_cbranch_execz .LBB2_369
; %bb.360:
	v_lshrrev_b32_e32 v0, 2, v57
	v_lshlrev_b32_e32 v1, 4, v60
	v_lshrrev_b32_e32 v3, 2, v45
	v_lshrrev_b32_e32 v6, 2, v40
	v_lshrrev_b32_e32 v7, 2, v61
	v_xor_b32_e32 v0, v0, v57
	v_add_nc_u32_e32 v53, 0x161f14, v62
	s_mov_b32 s1, 0
	v_xor_b32_e32 v6, v6, v40
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v9, 32 :: v_dual_lshlrev_b32 v2, 1, v0
	v_xor_b32_e32 v1, v2, v1
	v_xor_b32_e32 v2, v3, v45
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor3_b32 v5, v1, v0, v60
	v_lshlrev_b32_e32 v0, 1, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v1, 4, v5
	v_xor_b32_e32 v0, v0, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_xor3_b32 v4, v0, v2, v5
	v_add3_u32 v2, v62, v5, 0x587c5
	v_add3_u32 v0, v62, v4, 0xb0f8a
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_u32_e32 v[2:3], v2
	v_lshrrev_b32_e32 v0, 11, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f64_u32_e32 v[0:1], v0
	v_ldexp_f64 v[0:1], v[0:1], 32
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_f64 v[0:1], v[0:1], v[2:3]
	v_lshlrev_b32_e32 v2, 1, v6
	v_lshlrev_b32_e32 v3, 4, v4
	v_xor_b32_e32 v2, v2, v3
	v_xor_b32_e32 v3, v7, v61
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor3_b32 v51, v2, v6, v4
	v_lshlrev_b32_e32 v2, 1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v6, 4, v51
	v_xor_b32_e32 v2, v2, v6
	v_add3_u32 v6, v62, v51, 0x10974f
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor3_b32 v52, v2, v3, v51
	v_cvt_f64_u32_e32 v[6:7], v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v2, v52, v53
	v_lshrrev_b32_e32 v2, 11, v2
	v_fma_f64 v[0:1], 0x3ca00000, v[0:1], 0x3ca00000
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_u32_e32 v[2:3], v2
	v_mul_f64 v[0:1], 0x40666000, v[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[2:3], v[2:3], 32
	v_ceil_f64_e32 v[0:1], v[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[2:3], v[2:3], v[6:7]
	v_cvt_i32_f64_e32 v6, v[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[0:1], 0x3ca00000, v[2:3], 0x3ca00000
	v_lshl_add_u32 v7, v6, 5, v6
	v_mov_b32_e32 v6, 0
.LBB2_361:                              ; %.lr.ph.i.i47.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v2, v9, v6
	s_mov_b32 s2, exec_lo
	v_lshrrev_b32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v2, v2, v3
	v_ashrrev_i32_e32 v2, 1, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v8, v2, v6
	v_add_nc_u32_e32 v2, v8, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[2:3], 3, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s54, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s55, v3, vcc_lo
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(0)
	v_cmpx_neq_f64_e32 v[2:3], v[0:1]
	s_cbranch_execz .LBB2_367
; %bb.362:                              ;   in Loop: Header=BB2_361 Depth=1
	s_mov_b32 s3, exec_lo
	v_cmpx_nlt_f64_e32 v[2:3], v[0:1]
	s_cbranch_execz .LBB2_366
; %bb.363:                              ;   in Loop: Header=BB2_361 Depth=1
	s_mov_b32 s4, exec_lo
	v_cmpx_gt_f64_e32 v[2:3], v[0:1]
; %bb.364:                              ;   in Loop: Header=BB2_361 Depth=1
	v_mov_b32_e32 v9, v8
; %bb.365:                              ; %Flow709
                                        ;   in Loop: Header=BB2_361 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	v_mov_b32_e32 v8, v6
.LBB2_366:                              ; %Flow711
                                        ;   in Loop: Header=BB2_361 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	s_delay_alu instid0(VALU_DEP_1)
	v_mov_b32_e32 v6, v8
	v_mov_b32_e32 v8, v9
.LBB2_367:                              ;   in Loop: Header=BB2_361 Depth=1
	s_or_b32 exec_lo, exec_lo, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v9, v8 :: v_dual_add_nc_u32 v2, 1, v6
	v_cmp_ge_i32_e32 vcc_lo, v2, v8
	s_or_b32 s1, vcc_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB2_361
; %bb.368:                              ; %_Z8samplingP12hiprandStatePdii.exit54.i.i.i
	s_or_b32 exec_lo, exec_lo, s1
	v_dual_mov_b32 v57, v60 :: v_dual_add_nc_u32 v2, v6, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[2:3], 3, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s54, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s55, v3, vcc_lo
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(0)
	v_cmp_lt_f64_e32 vcc_lo, v[2:3], v[0:1]
	v_cndmask_b32_e32 v7, -1, v8, vcc_lo
	v_cmp_nge_f64_e32 vcc_lo, v[2:3], v[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e32 v54, v6, v7, vcc_lo
.LBB2_369:                              ; %Flow715
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $vgpr38
                                        ; implicit-def: $vgpr60
                                        ; implicit-def: $vgpr45
                                        ; implicit-def: $vgpr62
                                        ; implicit-def: $vgpr61
                                        ; implicit-def: $vgpr40
.LBB2_370:                              ; %Flow721
	s_and_not1_saveexec_b32 s0, s29
	s_cbranch_execz .LBB2_380
; %bb.371:
	v_lshrrev_b32_e32 v0, 2, v57
	v_dual_mov_b32 v6, 0 :: v_dual_lshlrev_b32 v1, 4, v60
	v_lshrrev_b32_e32 v3, 2, v45
	v_add_nc_u32_e32 v53, 0xb0f8a, v62
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v0, v0, v57
	v_mad_u64_u32 v[4:5], null, 0xb4, s28, v[38:39]
	s_mov_b32 s1, 0
	v_dual_mov_b32 v7, 32 :: v_dual_lshlrev_b32 v2, 1, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v1, v2, v1
	v_xor_b32_e32 v2, v3, v45
	v_xor3_b32 v51, v1, v0, v60
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v0, 1, v2
	v_lshlrev_b32_e32 v1, 4, v51
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v0, v0, v1
	v_xor3_b32 v52, v0, v2, v51
	v_add3_u32 v2, v62, v51, 0x587c5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v0, v52, v53
	v_cvt_f64_u32_e32 v[2:3], v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v0, 11, v0
	v_cvt_f64_u32_e32 v[0:1], v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[0:1], v[0:1], 32
	v_add_f64 v[0:1], v[0:1], v[2:3]
	v_mad_u64_u32 v[2:3], null, v4, 33, 0xffffffffffffe8ab
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[0:1], 0x3ca00000, v[0:1], 0x3ca00000
.LBB2_372:                              ; %.lr.ph.i.i.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	v_sub_nc_u32_e32 v3, v7, v6
	s_mov_b32 s2, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v4, 31, v3
	v_add_nc_u32_e32 v3, v3, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 1, v3
	v_add_nc_u32_e32 v5, v3, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v3, v5, v2
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 3, v[3:4]
	v_add_co_u32 v3, vcc_lo, s54, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, s55, v4, vcc_lo
	global_load_b64 v[3:4], v[3:4], off
	s_waitcnt vmcnt(0)
	v_cmpx_neq_f64_e32 v[3:4], v[0:1]
	s_cbranch_execz .LBB2_378
; %bb.373:                              ;   in Loop: Header=BB2_372 Depth=1
	s_mov_b32 s3, exec_lo
	v_cmpx_nlt_f64_e32 v[3:4], v[0:1]
	s_cbranch_execz .LBB2_377
; %bb.374:                              ;   in Loop: Header=BB2_372 Depth=1
	s_mov_b32 s4, exec_lo
	v_cmpx_gt_f64_e32 v[3:4], v[0:1]
; %bb.375:                              ;   in Loop: Header=BB2_372 Depth=1
	v_mov_b32_e32 v7, v5
; %bb.376:                              ; %Flow716
                                        ;   in Loop: Header=BB2_372 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	v_mov_b32_e32 v5, v6
.LBB2_377:                              ; %Flow718
                                        ;   in Loop: Header=BB2_372 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v6, v5 :: v_dual_mov_b32 v5, v7
.LBB2_378:                              ;   in Loop: Header=BB2_372 Depth=1
	s_or_b32 exec_lo, exec_lo, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, 1, v6
	v_mov_b32_e32 v7, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ge_i32_e32 vcc_lo, v3, v5
	s_or_b32 s1, vcc_lo, s1
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB2_372
; %bb.379:                              ; %_Z8samplingP12hiprandStatePdii.exit.i.i.i
	s_or_b32 exec_lo, exec_lo, s1
	v_add_nc_u32_e32 v2, v6, v2
	v_mov_b32_e32 v4, v60
	v_mov_b32_e32 v57, v40
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[2:3], 3, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s54, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s55, v3, vcc_lo
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(0)
	v_cmp_lt_f64_e32 vcc_lo, v[2:3], v[0:1]
	v_cndmask_b32_e32 v7, -1, v5, vcc_lo
	v_mov_b32_e32 v5, v61
	v_cmp_nge_f64_e32 vcc_lo, v[2:3], v[0:1]
	s_delay_alu instid0(VALU_DEP_3)
	v_cndmask_b32_e32 v54, v6, v7, vcc_lo
.LBB2_380:                              ; %Flow722
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_lt_i32_e32 vcc_lo, 0, v54
	s_mov_b32 s28, 0
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB2_450
; %bb.381:                              ; %.preheader27.i
	s_mov_b32 s2, 0x33333333
	s_mov_b32 s3, 0x4031b333
	s_mov_b32 s4, 0xe169d036
	v_div_scale_f64 v[0:1], null, s[2:3], s[2:3], s[36:37]
	s_mov_b32 s5, 0x40092256
	v_div_scale_f64 v[14:15], vcc_lo, s[36:37], s[2:3], s[36:37]
	v_div_scale_f64 v[2:3], null, s[4:5], s[4:5], v[43:44]
	v_cmp_nlt_f64_e64 s22, s[24:25], 1.0
	v_cmp_lt_f64_e64 s23, s[24:25], 1.0
	s_and_b32 s1, s21, exec_lo
	v_mov_b32_e32 v38, 0
	v_mov_b32_e32 v42, 1
	v_dual_mov_b32 v36, 33 :: v_dual_mov_b32 v41, 2
	v_rcp_f64_e32 v[6:7], v[0:1]
	v_rcp_f64_e32 v[8:9], v[2:3]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[10:11], -v[0:1], v[6:7], 1.0
	v_fma_f64 v[12:13], -v[2:3], v[8:9], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[6:7], v[6:7], v[10:11], v[6:7]
	v_fma_f64 v[8:9], v[8:9], v[12:13], v[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[10:11], -v[0:1], v[6:7], 1.0
	v_fma_f64 v[12:13], -v[2:3], v[8:9], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[6:7], v[6:7], v[10:11], v[6:7]
	v_div_scale_f64 v[10:11], s0, v[43:44], s[4:5], v[43:44]
	v_fma_f64 v[8:9], v[8:9], v[12:13], v[8:9]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[12:13], v[14:15], v[6:7]
	v_mul_f64 v[16:17], v[10:11], v[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[0:1], -v[0:1], v[12:13], v[14:15]
	v_fma_f64 v[2:3], -v[2:3], v[16:17], v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_fmas_f64 v[0:1], v[0:1], v[6:7], v[12:13]
	s_mov_b32 vcc_lo, s0
	v_div_fmas_f64 v[2:3], v[2:3], v[8:9], v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_div_fixup_f64 v[0:1], v[0:1], s[2:3], s[36:37]
	s_mov_b32 s36, 0
	s_mov_b32 s37, 0
	v_div_fixup_f64 v[2:3], v[2:3], s[4:5], v[43:44]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[0:1], 0x40690000, v[0:1]
	v_mul_f64 v[2:3], 0x40668000, v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ceil_f64_e32 v[0:1], v[0:1]
	v_ceil_f64_e32 v[2:3], v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_i32_f64_e32 v0, v[0:1]
	v_cvt_i32_f64_e32 v2, v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s0, v0
	v_cndmask_b32_e64 v1, v2, 1, s20
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_cselect_b32 s0, 1, s0
	s_min_i32 s1, s0, 0xc8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_min_i32_e32 v0, 0xb4, v1
	v_cmp_lt_i32_e32 vcc_lo, 0, v1
	s_mulk_i32 s1, 0xb4
	s_addk_i32 s1, 0xff4c
	s_delay_alu instid0(VALU_DEP_2)
	v_add_nc_u32_e32 v0, -1, v0
	s_cmp_gt_i32 s0, 0
	s_cselect_b32 s2, s1, 0
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str@rel32@lo+4
	s_addc_u32 s1, s1, .str@rel32@hi+12
	v_cndmask_b32_e32 v0, 0, v0, vcc_lo
	v_add_co_u32 v43, vcc_lo, s44, v49
	v_add_co_ci_u32_e32 v44, vcc_lo, s45, v50, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v0, s2, v0
	s_cmp_lg_u64 s[0:1], 0
	s_cselect_b32 s33, 15, 0
	v_mul_lo_u32 v49, 0xbb8, v0
.LBB2_382:                              ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB2_387 Depth 2
                                        ;     Child Loop BB2_397 Depth 2
                                        ;     Child Loop BB2_405 Depth 2
                                        ;     Child Loop BB2_411 Depth 2
                                        ;     Child Loop BB2_420 Depth 2
                                        ;     Child Loop BB2_424 Depth 2
                                        ;     Child Loop BB2_432 Depth 2
                                        ;     Child Loop BB2_438 Depth 2
                                        ;     Child Loop BB2_447 Depth 2
	s_and_not1_b32 vcc_lo, exec_lo, s23
	s_cbranch_vccnz .LBB2_384
; %bb.383:                              ;   in Loop: Header=BB2_382 Depth=1
	v_lshrrev_b32_e32 v0, 2, v57
	v_lshlrev_b32_e32 v1, 4, v52
	v_lshrrev_b32_e32 v3, 2, v5
	s_and_not1_b32 s0, s22, exec_lo
	v_mov_b32_e32 v56, v52
	v_xor_b32_e32 v0, v0, v57
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v2, 1, v0
	v_xor_b32_e32 v1, v2, v1
	v_xor_b32_e32 v2, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor3_b32 v50, v1, v0, v52
	v_lshlrev_b32_e32 v0, 1, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v1, 4, v50
	v_add3_u32 v3, v53, v50, 0x587c5
	v_xor_b32_e32 v1, v0, v1
	v_add_nc_u32_e32 v0, 0xb0f8a, v53
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cvt_f64_u32_e32 v[5:6], v3
	v_xor3_b32 v55, v1, v2, v50
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mov_b32_e32 v53, v0
	v_add_nc_u32_e32 v1, v55, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v1, 11, v1
	v_cvt_f64_u32_e32 v[1:2], v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[1:2], v[1:2], 32
	v_add_f64 v[1:2], v[1:2], v[5:6]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[1:2], 0x3ca00000, v[1:2], 0x3ca00000
	v_cmp_nlt_f64_e32 vcc_lo, s[24:25], v[1:2]
	v_dual_mov_b32 v2, v4 :: v_dual_mov_b32 v1, v51
	s_and_b32 s1, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s0, s0, s1
	s_branch .LBB2_385
.LBB2_384:                              ;   in Loop: Header=BB2_382 Depth=1
	v_dual_mov_b32 v2, v57 :: v_dual_mov_b32 v55, v52
	v_dual_mov_b32 v1, v5 :: v_dual_mov_b32 v56, v4
	v_mov_b32_e32 v50, v51
	v_mov_b32_e32 v0, v53
	s_mov_b32 s0, s22
.LBB2_385:                              ; %Flow637
                                        ;   in Loop: Header=BB2_382 Depth=1
	v_mov_b32_e32 v57, v4
	v_dual_mov_b32 v5, v51 :: v_dual_mov_b32 v4, v52
	v_dual_mov_b32 v52, v55 :: v_dual_mov_b32 v51, v50
	s_and_saveexec_b32 s38, s0
	s_cbranch_execz .LBB2_449
; %bb.386:                              ; %_Z9get_bin_xd.exit.i.i
                                        ;   in Loop: Header=BB2_382 Depth=1
	v_lshrrev_b32_e32 v3, 2, v2
	v_lshrrev_b32_e32 v5, 2, v1
	v_add_nc_u32_e32 v53, 0xb0f8a, v0
	s_mov_b32 s0, 0
	v_mov_b32_e32 v57, 0
	v_xor_b32_e32 v2, v3, v2
	v_lshlrev_b32_e32 v3, 4, v55
	v_xor_b32_e32 v1, v5, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v4, 1, v2
	v_xor_b32_e32 v3, v3, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_xor3_b32 v51, v3, v55, v2
	v_lshlrev_b32_e32 v2, 1, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v3, 4, v51
	v_xor_b32_e32 v2, v2, v3
	v_add3_u32 v3, v0, v51, 0x587c5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor3_b32 v52, v2, v1, v51
	v_add_nc_u32_e32 v1, v52, v53
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v1, 11, v1
	v_cvt_f64_u32_e32 v[1:2], v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[0:1], v[1:2], 32
	v_cvt_f64_u32_e32 v[2:3], v3
	v_add_f64 v[0:1], v[0:1], v[2:3]
	v_mov_b32_e32 v2, 0xbb7
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[45:46], 0x3ca00000, v[0:1], 0x3ca00000
.LBB2_387:                              ; %.lr.ph.i.i.i.i.i.i
                                        ;   Parent Loop BB2_382 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v0, v2, v57
	s_mov_b32 s1, exec_lo
	v_lshrrev_b32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v0, v0, v1
	v_ashrrev_i32_e32 v0, 1, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v60, v0, v57
	v_add_nc_u32_e32 v0, v60, v49
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[0:1], 3, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s52, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s53, v1, vcc_lo
	global_load_b64 v[0:1], v[0:1], off
	s_waitcnt vmcnt(0)
	v_cmpx_neq_f64_e32 v[0:1], v[45:46]
	s_cbranch_execz .LBB2_393
; %bb.388:                              ;   in Loop: Header=BB2_387 Depth=2
	s_mov_b32 s2, exec_lo
	v_cmpx_nlt_f64_e32 v[0:1], v[45:46]
	s_cbranch_execz .LBB2_392
; %bb.389:                              ;   in Loop: Header=BB2_387 Depth=2
	s_mov_b32 s3, exec_lo
	v_cmpx_gt_f64_e32 v[0:1], v[45:46]
; %bb.390:                              ;   in Loop: Header=BB2_387 Depth=2
	v_mov_b32_e32 v2, v60
; %bb.391:                              ; %Flow630
                                        ;   in Loop: Header=BB2_387 Depth=2
	s_or_b32 exec_lo, exec_lo, s3
	v_mov_b32_e32 v60, v57
.LBB2_392:                              ; %Flow632
                                        ;   in Loop: Header=BB2_387 Depth=2
	s_or_b32 exec_lo, exec_lo, s2
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v57, v60 :: v_dual_mov_b32 v60, v2
.LBB2_393:                              ;   in Loop: Header=BB2_387 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v0, 1, v57
	v_mov_b32_e32 v2, v60
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ge_i32_e32 vcc_lo, v0, v60
	s_or_b32 s0, vcc_lo, s0
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB2_387
; %bb.394:                              ; %_Z11get_hittimeddiPdP12hiprandState.exit.i
                                        ;   in Loop: Header=BB2_382 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	v_dual_mov_b32 v37, v59 :: v_dual_add_nc_u32 v0, v57, v49
	s_load_b64 s[20:21], s[34:35], 0x50
	v_mov_b32_e32 v4, 0
	v_mov_b32_e32 v5, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[0:1], 3, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s52, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s53, v1, vcc_lo
	global_load_b64 v[47:48], v[0:1], off
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v37
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v37
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_400
; %bb.395:                              ;   in Loop: Header=BB2_382 Depth=1
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[2:3], v38, s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[0:1], v38, s[20:21] offset:40
	global_load_b64 v[4:5], v38, s[20:21]
	s_mov_b32 s2, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v3
	v_and_b32_e32 v0, v0, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v1, v1, 24
	v_mul_hi_u32 v6, v0, 24
	v_mul_lo_u32 v0, v0, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v1, v6, v1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v0, vcc_lo, v4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, v5, v1, vcc_lo
	global_load_b64 v[0:1], v[0:1], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[4:5], v38, v[0:3], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[4:5], v[2:3]
	s_cbranch_execz .LBB2_399
; %bb.396:                              ; %.preheader3.i.i.i.i.preheader
                                        ;   in Loop: Header=BB2_382 Depth=1
	s_mov_b32 s3, 0
.LBB2_397:                              ; %.preheader3.i.i.i.i
                                        ;   Parent Loop BB2_382 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[0:1], v38, s[20:21] offset:40
	global_load_b64 v[6:7], v38, s[20:21]
	v_dual_mov_b32 v2, v4 :: v_dual_mov_b32 v3, v5
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v0, v0, v2
	v_and_b32_e32 v1, v1, v3
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[4:5], null, v0, 24, v[6:7]
	v_mov_b32_e32 v0, v5
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v1, 24, v[0:1]
	global_load_b64 v[0:1], v[4:5], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[4:5], v38, v[0:3], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[4:5], v[2:3]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB2_397
; %bb.398:                              ; %Flow627
                                        ;   in Loop: Header=BB2_382 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
.LBB2_399:                              ; %Flow629
                                        ;   in Loop: Header=BB2_382 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB2_400:                              ; %.loopexit4.i.i.i.i
                                        ;   in Loop: Header=BB2_382 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[6:7], v38, s[20:21] offset:40
	global_load_b128 v[0:3], v38, s[20:21]
	v_readfirstlane_b32 s2, v4
	v_readfirstlane_b32 s3, v5
	s_mov_b32 s8, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v6
	v_readfirstlane_b32 s5, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB2_402
; %bb.401:                              ;   in Loop: Header=BB2_382 Depth=1
	s_add_i32 s10, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v4, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v5, vcc_lo, s10, v1, vcc_lo
	v_dual_mov_b32 v39, s8 :: v_dual_mov_b32 v40, v38
	global_store_b128 v[4:5], v[39:42], off offset:8
.LBB2_402:                              ;   in Loop: Header=BB2_382 Depth=1
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[4:5], 6, v[37:38]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_mov_b32 s29, s28
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v2, v4
	s_mov_b32 s30, s28
	s_mov_b32 s31, s28
	v_add_co_ci_u32_e32 v7, vcc_lo, v3, v5, vcc_lo
	v_dual_mov_b32 v37, v38 :: v_dual_mov_b32 v2, s28
	v_dual_mov_b32 v39, v38 :: v_dual_mov_b32 v4, s30
	v_mov_b32_e32 v3, s29
	v_mov_b32_e32 v5, s31
	s_clause 0x3
	global_store_b128 v[6:7], v[36:39], off
	global_store_b128 v[6:7], v[2:5], off offset:16
	global_store_b128 v[6:7], v[2:5], off offset:32
	global_store_b128 v[6:7], v[2:5], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB2_410
; %bb.403:                              ;   in Loop: Header=BB2_382 Depth=1
	s_clause 0x1
	global_load_b64 v[12:13], v38, s[20:21] offset:32 glc
	global_load_b64 v[2:3], v38, s[20:21] offset:40
	s_mov_b32 s5, exec_lo
	v_dual_mov_b32 v10, s2 :: v_dual_mov_b32 v11, s3
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v3, s3, v3
	v_and_b32_e32 v2, s2, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v3, v3, 24
	v_mul_hi_u32 v4, v2, 24
	v_mul_lo_u32 v2, v2, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v4, v3
	v_add_co_u32 v8, vcc_lo, v0, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v9, vcc_lo, v1, v3, vcc_lo
	global_store_b64 v[8:9], v[12:13], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v38, v[10:13], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[12:13]
	s_cbranch_execz .LBB2_406
; %bb.404:                              ; %.preheader1.i.i.i.i.preheader
                                        ;   in Loop: Header=BB2_382 Depth=1
	s_mov_b32 s8, 0
.LBB2_405:                              ; %.preheader1.i.i.i.i
                                        ;   Parent Loop BB2_382 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
	s_sleep 1
	global_store_b64 v[8:9], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v38, v[2:5], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB2_405
.LBB2_406:                              ; %Flow625
                                        ;   in Loop: Header=BB2_382 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	global_load_b64 v[2:3], v38, s[20:21] offset:16
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v4, s8, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB2_408
; %bb.407:                              ;   in Loop: Header=BB2_382 Depth=1
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v37, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[37:38], off offset:8
.LBB2_408:                              ;   in Loop: Header=BB2_382 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB2_410
; %bb.409:                              ;   in Loop: Header=BB2_382 Depth=1
	global_load_b32 v37, v[2:3], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v37
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[37:38], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB2_410:                              ; %Flow626
                                        ;   in Loop: Header=BB2_382 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB2_411:                              ;   Parent Loop BB2_382 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_413
; %bb.412:                              ;   in Loop: Header=BB2_411 Depth=2
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB2_413:                              ;   in Loop: Header=BB2_411 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB2_415
; %bb.414:                              ;   in Loop: Header=BB2_411 Depth=2
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB2_416
.LBB2_415:                              ;   in Loop: Header=BB2_411 Depth=2
	s_mov_b32 s1, -1
.LBB2_416:                              ; %Flow620
                                        ;   in Loop: Header=BB2_411 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB2_411
; %bb.417:                              ;   in Loop: Header=BB2_382 Depth=1
	global_load_b64 v[0:1], v[6:7], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_421
; %bb.418:                              ;   in Loop: Header=BB2_382 Depth=1
	s_clause 0x2
	global_load_b64 v[4:5], v38, s[20:21] offset:40
	global_load_b64 v[8:9], v38, s[20:21] offset:24 glc
	global_load_b64 v[6:7], v38, s[20:21]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v10, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v11, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v10, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v11, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v11 :: v_dual_cndmask_b32 v2, v2, v10
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v4, v2, v4
	v_mul_hi_u32 v10, v4, 24
	v_mul_lo_u32 v4, v4, 24
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v8
	v_mul_lo_u32 v5, v5, 24
	v_add_nc_u32_e32 v5, v10, v5
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v9
	global_store_b64 v[6:7], v[8:9], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v38, v[2:5], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[8:9]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB2_421
; %bb.419:                              ; %.preheader.i.i.i.i.preheader
                                        ;   in Loop: Header=BB2_382 Depth=1
	s_mov_b32 s0, 0
.LBB2_420:                              ; %.preheader.i.i.i.i
                                        ;   Parent Loop BB2_382 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[8:9], v38, v[2:5], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[8:9], v[4:5]
	v_dual_mov_b32 v4, v8 :: v_dual_mov_b32 v5, v9
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB2_420
.LBB2_421:                              ; %__ockl_printf_begin.exit.i
                                        ;   in Loop: Header=BB2_382 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_add_u32 s8, s18, 0x88
	s_addc_u32 s9, s19, 0
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str@rel32@lo+4
	s_addc_u32 s1, s1, .str@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	v_dual_mov_b32 v2, s0 :: v_dual_mov_b32 v3, s1
	v_dual_mov_b32 v4, s33 :: v_dual_mov_b32 v5, 0
	v_mov_b32_e32 v6, 0
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __ockl_printf_append_string_n@rel32@lo+4
	s_addc_u32 s3, s3, __ockl_printf_append_string_n@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_swappc_b64 s[30:31], s[2:3]
	v_dual_mov_b32 v37, v59 :: v_dual_mov_b32 v2, 0
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v37
	v_mov_b32_e32 v3, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v37
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_427
; %bb.422:                              ;   in Loop: Header=BB2_382 Depth=1
	global_load_b64 v[4:5], v38, s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[2:3], v38, s[20:21] offset:40
	global_load_b64 v[6:7], v38, s[20:21]
	s_mov_b32 s2, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v3, v3, v5
	v_and_b32_e32 v2, v2, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v3, v3, 24
	v_mul_hi_u32 v8, v2, 24
	v_mul_lo_u32 v2, v2, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v8, v3
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v6, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, v7, v3, vcc_lo
	global_load_b64 v[2:3], v[2:3], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[2:3], v38, v[2:5], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[2:3], v[4:5]
	s_cbranch_execz .LBB2_426
; %bb.423:                              ; %.preheader3.i.i.i26.i.preheader
                                        ;   in Loop: Header=BB2_382 Depth=1
	s_mov_b32 s3, 0
.LBB2_424:                              ; %.preheader3.i.i.i26.i
                                        ;   Parent Loop BB2_382 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[6:7], v38, s[20:21] offset:40
	global_load_b64 v[8:9], v38, s[20:21]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v6, v6, v4
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[2:3], null, v6, 24, v[8:9]
	v_and_b32_e32 v8, v7, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[6:7], null, v8, 24, v[3:4]
	v_mov_b32_e32 v3, v6
	global_load_b64 v[2:3], v[2:3], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[2:3], v38, v[2:5], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB2_424
; %bb.425:                              ; %Flow613
                                        ;   in Loop: Header=BB2_382 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
.LBB2_426:                              ; %Flow615
                                        ;   in Loop: Header=BB2_382 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB2_427:                              ; %.loopexit4.i.i.i21.i
                                        ;   in Loop: Header=BB2_382 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_clause 0x1
	global_load_b64 v[8:9], v38, s[20:21] offset:40
	global_load_b128 v[4:7], v38, s[20:21]
	v_readfirstlane_b32 s2, v2
	v_readfirstlane_b32 s3, v3
	s_mov_b32 s8, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v8
	v_readfirstlane_b32 s5, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB2_429
; %bb.428:                              ;   in Loop: Header=BB2_382 Depth=1
	s_add_i32 s10, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v4, s7
	v_add_co_ci_u32_e32 v3, vcc_lo, s10, v5, vcc_lo
	v_dual_mov_b32 v39, s8 :: v_dual_mov_b32 v40, v38
	global_store_b128 v[2:3], v[39:42], off offset:8
.LBB2_429:                              ;   in Loop: Header=BB2_382 Depth=1
	s_or_b32 exec_lo, exec_lo, s9
	v_cmp_lt_f64_e32 vcc_lo, v[47:48], v[45:46]
	s_mov_b32 s29, s28
	s_mov_b32 s30, s28
	s_mov_b32 s31, s28
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[8:9], 6, v[37:38]
	v_and_or_b32 v0, 0xffffff1d, v0, 34
	v_cndmask_b32_e32 v2, -1, v60, vcc_lo
	v_cmp_nge_f64_e32 vcc_lo, v[47:48], v[45:46]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v2, v57, v2, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_co_u32 v6, vcc_lo, v6, s4
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v7, vcc_lo
	v_add_co_u32 v10, vcc_lo, v6, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v11, vcc_lo, v7, v9, vcc_lo
	v_dual_mov_b32 v6, s28 :: v_dual_mov_b32 v9, s31
	v_cvt_f64_i32_e32 v[2:3], v2
	v_dual_mov_b32 v7, s29 :: v_dual_mov_b32 v8, s30
	v_add_f64 v[2:3], v[2:3], s[26:27]
	s_clause 0x3
	global_store_b128 v[10:11], v[0:3], off
	global_store_b128 v[10:11], v[6:9], off offset:16
	global_store_b128 v[10:11], v[6:9], off offset:32
	global_store_b128 v[10:11], v[6:9], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB2_437
; %bb.430:                              ;   in Loop: Header=BB2_382 Depth=1
	s_clause 0x1
	global_load_b64 v[10:11], v38, s[20:21] offset:32 glc
	global_load_b64 v[0:1], v38, s[20:21] offset:40
	v_dual_mov_b32 v8, s2 :: v_dual_mov_b32 v9, s3
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v0
	v_readfirstlane_b32 s9, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v0, vcc_lo, v4, s8
	v_add_co_ci_u32_e32 v1, vcc_lo, s9, v5, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[0:1], v[10:11], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[8:9], v38, v[8:11], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[8:9], v[10:11]
	s_cbranch_execz .LBB2_433
; %bb.431:                              ; %.preheader1.i.i.i24.i.preheader
                                        ;   in Loop: Header=BB2_382 Depth=1
	s_mov_b32 s8, 0
.LBB2_432:                              ; %.preheader1.i.i.i24.i
                                        ;   Parent Loop BB2_382 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_dual_mov_b32 v6, s2 :: v_dual_mov_b32 v7, s3
	s_sleep 1
	global_store_b64 v[0:1], v[8:9], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[6:7], v38, v[6:9], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[8:9]
	v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB2_432
.LBB2_433:                              ; %Flow611
                                        ;   in Loop: Header=BB2_382 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	global_load_b64 v[0:1], v38, s[20:21] offset:16
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v6, s8, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v6
	s_cbranch_execz .LBB2_435
; %bb.434:                              ;   in Loop: Header=BB2_382 Depth=1
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v37, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[0:1], v[37:38], off offset:8
.LBB2_435:                              ;   in Loop: Header=BB2_382 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[6:7], v[0:1], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[6:7]
	s_cbranch_vccnz .LBB2_437
; %bb.436:                              ;   in Loop: Header=BB2_382 Depth=1
	global_load_b32 v37, v[0:1], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v37
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[6:7], v[37:38], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB2_437:                              ; %Flow612
                                        ;   in Loop: Header=BB2_382 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v4, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB2_438:                              ;   Parent Loop BB2_382 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_mov_b32_e32 v4, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_440
; %bb.439:                              ;   in Loop: Header=BB2_438 Depth=2
	global_load_b32 v4, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v4, 1, v4
.LBB2_440:                              ;   in Loop: Header=BB2_438 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v4
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB2_442
; %bb.441:                              ;   in Loop: Header=BB2_438 Depth=2
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB2_443
.LBB2_442:                              ;   in Loop: Header=BB2_438 Depth=2
	s_mov_b32 s1, -1
.LBB2_443:                              ; %Flow606
                                        ;   in Loop: Header=BB2_438 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB2_438
; %bb.444:                              ;   in Loop: Header=BB2_382 Depth=1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_448
; %bb.445:                              ;   in Loop: Header=BB2_382 Depth=1
	s_clause 0x2
	global_load_b64 v[0:1], v38, s[20:21] offset:40
	global_load_b64 v[8:9], v38, s[20:21] offset:24 glc
	global_load_b64 v[6:7], v38, s[20:21]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v10, vcc_lo, v0, 1
	v_add_co_ci_u32_e32 v11, vcc_lo, 0, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, v10, s2
	v_add_co_ci_u32_e32 v5, vcc_lo, s3, v11, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	v_dual_cndmask_b32 v5, v5, v11 :: v_dual_cndmask_b32 v4, v4, v10
	v_and_b32_e32 v1, v5, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v0, v4, v0
	v_mul_hi_u32 v10, v0, 24
	v_mul_lo_u32 v0, v0, 24
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_u32 v0, vcc_lo, v6, v0
	v_mov_b32_e32 v6, v8
	v_mul_lo_u32 v1, v1, 24
	v_add_nc_u32_e32 v1, v10, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e32 v1, vcc_lo, v7, v1, vcc_lo
	v_mov_b32_e32 v7, v9
	global_store_b64 v[0:1], v[8:9], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[6:7], v38, v[4:7], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[6:7], v[8:9]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB2_448
; %bb.446:                              ; %.preheader.i.i.i23.i.preheader
                                        ;   in Loop: Header=BB2_382 Depth=1
	s_mov_b32 s0, 0
.LBB2_447:                              ; %.preheader.i.i.i23.i
                                        ;   Parent Loop BB2_382 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_sleep 1
	global_store_b64 v[0:1], v[6:7], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[8:9], v38, v[4:7], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[8:9], v[6:7]
	v_dual_mov_b32 v6, v8 :: v_dual_mov_b32 v7, v9
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB2_447
.LBB2_448:                              ; %__ockl_printf_append_args.exit.i
                                        ;   in Loop: Header=BB2_382 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	global_load_b32 v6, v[43:44], off
	v_dual_mov_b32 v4, v55 :: v_dual_mov_b32 v5, v50
	s_waitcnt vmcnt(0)
	v_dual_mov_b32 v57, v56 :: v_dual_add_nc_u32 v0, v6, v58
	v_add_nc_u32_e32 v6, 1, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[0:1], 3, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s58, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s59, v1, vcc_lo
	global_store_b64 v[0:1], v[2:3], off
	global_store_b32 v[43:44], v6, off
.LBB2_449:                              ; %Flow638
                                        ;   in Loop: Header=BB2_382 Depth=1
	s_or_b32 exec_lo, exec_lo, s38
	s_add_i32 s37, s37, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_eq_u32_e32 vcc_lo, s37, v54
	s_or_b32 s36, vcc_lo, s36
	s_and_not1_b32 exec_lo, exec_lo, s36
	s_cbranch_execnz .LBB2_382
.LBB2_450:                              ; %_Z12generateHitsddddPdS_P12hiprandStateP7res_arr.exit
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z13pmt_calculateddddPdS_S_dddiS_S_PiS_S0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 392
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 72
		.amdhsa_next_free_sgpr 60
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z13pmt_calculateddddPdS_S_dddiS_S_PiS_S0_i, .Lfunc_end2-_Z13pmt_calculateddddPdS_S_dddiS_S_PiS_S0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 27560
; NumSgprs: 62
; NumVgprs: 72
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 7
; VGPRBlocks: 8
; NumSGPRsForWavesPerEU: 62
; NumVGPRsForWavesPerEU: 72
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z24step_calculate_every_pmtPdS_S_S_S_S_S_S_S_S_iS_S_PiS_S0_i ; -- Begin function _Z24step_calculate_every_pmtPdS_S_S_S_S_S_S_S_S_iS_S_PiS_S0_i
	.globl	_Z24step_calculate_every_pmtPdS_S_S_S_S_S_S_S_S_iS_S_PiS_S0_i
	.p2align	8
	.type	_Z24step_calculate_every_pmtPdS_S_S_S_S_S_S_S_S_iS_S_PiS_S0_i,@function
_Z24step_calculate_every_pmtPdS_S_S_S_S_S_S_S_S_iS_S_PiS_S0_i: ; @_Z24step_calculate_every_pmtPdS_S_S_S_S_S_S_S_S_iS_S_PiS_S0_i
; %bb.0:
	s_mov_b64 s[18:19], s[0:1]
	s_load_b32 s0, s[0:1], 0x94
	s_load_b32 s1, s[18:19], 0x50
	s_add_u32 s34, s18, 0x88
	s_addc_u32 s35, s19, 0
	s_mov_b32 s32, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s0, s0, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[53:54], null, s15, s0, v[0:1]
	s_mov_b32 s0, exec_lo
	v_cmpx_gt_i32_e64 s1, v53
	s_cbranch_execz .LBB3_452
; %bb.1:
	s_load_b32 s72, s[18:19], 0x80
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s72, 1
	s_cbranch_scc1 .LBB3_452
; %bb.2:                                ; %.lr.ph
	s_load_b256 s[52:59], s[18:19], 0x58
	v_ashrrev_i32_e32 v54, 31, v53
	v_dual_mov_b32 v5, 0x8a5d614f :: v_dual_mov_b32 v38, 0
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, .str.2@rel32@lo+4
	s_addc_u32 s3, s3, .str.2@rel32@hi+12
	v_mul_lo_u32 v75, 0x2710, v53
	v_lshlrev_b64 v[0:1], 2, v[53:54]
	s_cmp_lg_u64 s[2:3], 0
	v_dual_mov_b32 v42, 1 :: v_dual_mov_b32 v41, 2
	s_cselect_b32 s73, 30, 0
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, .str.1@rel32@lo+4
	s_addc_u32 s3, s3, .str.1@rel32@hi+12
	v_mbcnt_lo_u32_b32 v76, -1, 0
	s_cmp_lg_u64 s[2:3], 0
	s_mov_b32 s74, 0x924920da
	s_cselect_b32 s104, 17, 0
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, .str@rel32@lo+4
	s_addc_u32 s3, s3, .str@rel32@hi+12
	s_mov_b32 s76, 0x9999999c
	s_cmp_lg_u64 s[2:3], 0
	s_mov_b32 s78, 0xfefa39ef
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s56, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, s57, v1, vcc_lo
	s_mov_b32 s56, 0x55555555
	s_mov_b32 s80, 0x3b39803f
	s_mov_b32 s82, 0xd5df274d
	global_load_b32 v4, v[2:3], off
	s_clause 0x2
	s_load_b512 s[36:51], s[18:19], 0x0
	s_load_b128 s[24:27], s[18:19], 0x40
	s_load_b64 s[0:1], s[18:19], 0x78
	v_lshlrev_b64 v[2:3], 3, v[53:54]
	s_mov_b32 s84, 0x652b82fe
	s_mov_b32 s88, 0xfca7ab0c
	s_mov_b32 s90, 0x6a5dcb37
	s_mov_b32 s92, 0x623fde64
	s_mov_b32 s94, 0x7c89e6b0
	s_mov_b32 s96, 0x14761f6e
	s_mov_b32 s98, 0x1852b7b0
	s_mov_b32 s100, 0x11122322
	s_mov_b32 s102, 0x555502a1
	s_mov_b32 s60, 0x55555511
	s_mov_b32 s62, 11
	s_mov_b32 s64, 0xe169d036
	s_mov_b32 s66, 0x33333333
	s_mov_b32 s28, 0
	s_mov_b32 s57, 0x3fe55555
	s_mov_b32 s75, 0x3fd24924
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v54, vcc_lo, s44, v2
	v_add_co_ci_u32_e32 v55, vcc_lo, s45, v3, vcc_lo
	v_add_co_u32 v56, vcc_lo, s46, v2
	v_add_co_ci_u32_e32 v57, vcc_lo, s47, v3, vcc_lo
	v_add_co_u32 v58, vcc_lo, s48, v2
	v_add_co_ci_u32_e32 v59, vcc_lo, s49, v3, vcc_lo
	s_mov_b32 s77, 0x3fd99999
	s_mov_b32 s79, 0x3fe62e42
	s_mov_b32 s81, 0x3c7abc9e
	s_mov_b32 s23, 0xbfe55555
	s_mov_b32 s83, 0x3c8543b0
	s_mov_b32 s85, 0x3ff71547
	s_mov_b32 s87, 0xbfe62e42
	s_mov_b32 s89, 0x3e928af3
	s_mov_b32 s91, 0x3e5ade15
	s_mov_b32 s93, 0x3ec71dee
	s_mov_b32 s95, 0x3efa0199
	s_mov_b32 s97, 0x3f2a01a0
	s_mov_b32 s99, 0x3f56c16c
	s_mov_b32 s101, 0x3f811111
	s_mov_b32 s103, 0x3fa55555
	s_mov_b32 s61, 0x3fc55555
	s_mov_b32 s63, 0x3fe00000
	s_mov_b32 s65, 0x40092256
	s_mov_b32 s67, 0x4031b333
	s_cselect_b32 s48, 15, 0
	s_mov_b32 s45, 0xbc7abc9e
	s_mov_b32 s49, 0
	v_mov_b32_e32 v36, 33
	s_waitcnt vmcnt(0)
	v_xor_b32_e32 v6, 0x2c7f967f, v4
	v_cmp_lt_i32_e32 vcc_lo, -1, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_mul_lo_u32 v3, 0x493c4aa1, v6
	v_cndmask_b32_e32 v2, 0xfa091aa4, v5, vcc_lo
	v_add_co_u32 v60, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v61, vcc_lo, s1, v1, vcc_lo
	v_xor_b32_e32 v79, 0x5491333, v2
	v_add_nc_u32_e32 v80, 0x1f123bb5, v2
	v_add3_u32 v85, v3, v2, 0x64f0c9
	v_add_nc_u32_e32 v78, 0x583f19, v3
	v_xor_b32_e32 v86, 0x159a55e5, v3
	v_add_nc_u32_e32 v77, 0x75bcd15, v3
.LBB3_3:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB3_7 Depth 2
                                        ;       Child Loop BB3_15 Depth 3
                                        ;       Child Loop BB3_23 Depth 3
                                        ;       Child Loop BB3_29 Depth 3
                                        ;       Child Loop BB3_38 Depth 3
                                        ;       Child Loop BB3_46 Depth 3
                                        ;       Child Loop BB3_54 Depth 3
                                        ;       Child Loop BB3_60 Depth 3
                                        ;       Child Loop BB3_69 Depth 3
                                        ;       Child Loop BB3_73 Depth 3
                                        ;       Child Loop BB3_81 Depth 3
                                        ;       Child Loop BB3_87 Depth 3
                                        ;       Child Loop BB3_96 Depth 3
                                        ;       Child Loop BB3_100 Depth 3
                                        ;       Child Loop BB3_108 Depth 3
                                        ;       Child Loop BB3_114 Depth 3
                                        ;       Child Loop BB3_123 Depth 3
                                        ;       Child Loop BB3_128 Depth 3
                                        ;       Child Loop BB3_139 Depth 3
                                        ;       Child Loop BB3_150 Depth 3
                                        ;       Child Loop BB3_160 Depth 3
                                        ;         Child Loop BB3_161 Depth 4
                                        ;         Child Loop BB3_171 Depth 4
                                        ;         Child Loop BB3_179 Depth 4
                                        ;         Child Loop BB3_185 Depth 4
                                        ;         Child Loop BB3_194 Depth 4
                                        ;         Child Loop BB3_198 Depth 4
                                        ;         Child Loop BB3_206 Depth 4
                                        ;         Child Loop BB3_212 Depth 4
                                        ;         Child Loop BB3_221 Depth 4
                                        ;     Child Loop BB3_238 Depth 2
                                        ;     Child Loop BB3_246 Depth 2
                                        ;     Child Loop BB3_252 Depth 2
                                        ;     Child Loop BB3_261 Depth 2
                                        ;     Child Loop BB3_269 Depth 2
                                        ;     Child Loop BB3_277 Depth 2
                                        ;     Child Loop BB3_283 Depth 2
                                        ;     Child Loop BB3_292 Depth 2
                                        ;     Child Loop BB3_296 Depth 2
                                        ;     Child Loop BB3_304 Depth 2
                                        ;     Child Loop BB3_310 Depth 2
                                        ;     Child Loop BB3_319 Depth 2
                                        ;     Child Loop BB3_323 Depth 2
                                        ;     Child Loop BB3_331 Depth 2
                                        ;     Child Loop BB3_337 Depth 2
                                        ;     Child Loop BB3_346 Depth 2
                                        ;     Child Loop BB3_351 Depth 2
                                        ;     Child Loop BB3_362 Depth 2
                                        ;     Child Loop BB3_373 Depth 2
                                        ;     Child Loop BB3_383 Depth 2
                                        ;       Child Loop BB3_387 Depth 3
                                        ;       Child Loop BB3_397 Depth 3
                                        ;       Child Loop BB3_405 Depth 3
                                        ;       Child Loop BB3_411 Depth 3
                                        ;       Child Loop BB3_420 Depth 3
                                        ;       Child Loop BB3_424 Depth 3
                                        ;       Child Loop BB3_432 Depth 3
                                        ;       Child Loop BB3_438 Depth 3
                                        ;       Child Loop BB3_447 Depth 3
	s_load_b32 s0, s[18:19], 0x50
	s_waitcnt lgkmcnt(0)
	v_mad_u64_u32 v[0:1], null, s49, s0, v[53:54]
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, _Z14calculateAngledddddd@rel32@lo+4
	s_addc_u32 s1, s1, _Z14calculateAngledddddd@rel32@hi+12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[12:13], 3, v[0:1]
	global_load_b64 v[4:5], v[58:59], off
	global_load_b64 v[0:1], v[54:55], off
	global_load_b64 v[2:3], v[56:57], off
	v_add_co_u32 v14, vcc_lo, s36, v12
	v_add_co_ci_u32_e32 v15, vcc_lo, s37, v13, vcc_lo
	v_add_co_u32 v6, vcc_lo, s38, v12
	v_add_co_ci_u32_e32 v7, vcc_lo, s39, v13, vcc_lo
	v_add_co_u32 v8, vcc_lo, s40, v12
	v_add_co_ci_u32_e32 v9, vcc_lo, s41, v13, vcc_lo
	v_add_co_u32 v10, vcc_lo, s42, v12
	v_add_co_ci_u32_e32 v11, vcc_lo, s43, v13, vcc_lo
	v_add_co_u32 v16, vcc_lo, s50, v12
	v_add_co_ci_u32_e32 v17, vcc_lo, s51, v13, vcc_lo
	v_add_co_u32 v18, vcc_lo, s24, v12
	v_add_co_ci_u32_e32 v19, vcc_lo, s25, v13, vcc_lo
	v_add_co_u32 v12, vcc_lo, s26, v12
	v_add_co_ci_u32_e32 v13, vcc_lo, s27, v13, vcc_lo
	global_load_b64 v[6:7], v[6:7], off
	global_load_b64 v[8:9], v[8:9], off
	global_load_b64 v[10:11], v[10:11], off
	global_load_b64 v[66:67], v[14:15], off
	global_load_b64 v[68:69], v[16:17], off
	global_load_b64 v[62:63], v[18:19], off
	global_load_b64 v[64:65], v[12:13], off
	s_swappc_b64 s[30:31], s[0:1]
	v_frexp_exp_i32_f64_e32 v82, v[66:67]
	v_dual_mov_b32 v47, v0 :: v_dual_mov_b32 v48, v1
	s_mov_b32 s0, exec_lo
	v_cmpx_nlt_f64_e32 0, v[68:69]
	s_xor_b32 s0, exec_lo, s0
; %bb.4:                                ; %._Z17calculate_by_stepddddddddddPdS_P12hiprandStateP7res_arr.exit_crit_edge
                                        ;   in Loop: Header=BB3_3 Depth=1
	v_frexp_exp_i32_f64_e32 v82, v[66:67]
                                        ; implicit-def: $vgpr68_vgpr69
; %bb.5:                                ; %Flow856
                                        ;   in Loop: Header=BB3_3 Depth=1
	s_or_saveexec_b32 s47, s0
	v_frexp_mant_f64_e64 v[70:71], |v[66:67]|
	v_cmp_class_f64_e64 s46, v[66:67], 0x204
	v_dual_mov_b32 v74, v78 :: v_dual_mov_b32 v81, v79
	v_dual_mov_b32 v87, v80 :: v_dual_mov_b32 v88, v86
	v_mov_b32_e32 v83, v85
	s_xor_b32 exec_lo, exec_lo, s47
	s_cbranch_execz .LBB3_226
; %bb.6:                                ; %.lr.ph.i.preheader
                                        ;   in Loop: Header=BB3_3 Depth=1
	v_cmp_gt_f64_e32 vcc_lo, s[56:57], v[70:71]
	s_mov_b32 s0, 0x968915a9
	s_mov_b32 s2, 0x4222de17
	s_mov_b32 s1, 0x3fba6564
	s_mov_b32 s3, 0x3fbdee67
	s_mov_b32 s22, s56
	s_mov_b32 s86, s78
	s_mov_b32 s44, s80
	s_mov_b32 s68, 0
	v_mov_b32_e32 v52, v38
	v_cndmask_b32_e64 v0, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[0:1], v[70:71], v0
	v_add_f64 v[2:3], v[0:1], 1.0
	v_add_f64 v[8:9], v[0:1], -1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[4:5], v[2:3]
	v_add_f64 v[10:11], v[2:3], -1.0
	v_add_f64 v[0:1], v[0:1], -v[10:11]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[6:7], -v[2:3], v[4:5], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[4:5], v[6:7], v[4:5], v[4:5]
	v_fma_f64 v[6:7], -v[2:3], v[4:5], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[4:5], v[6:7], v[4:5], v[4:5]
	v_mul_f64 v[6:7], v[8:9], v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[12:13], v[2:3], v[6:7]
	v_fma_f64 v[2:3], v[6:7], v[2:3], -v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[0:1], v[6:7], v[0:1], v[2:3]
	v_add_f64 v[2:3], v[12:13], v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[10:11], v[8:9], -v[2:3]
	v_add_f64 v[12:13], v[2:3], -v[12:13]
	v_add_f64 v[8:9], v[8:9], -v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[0:1], v[12:13], -v[0:1]
	v_add_f64 v[2:3], v[8:9], -v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[0:1], v[0:1], v[2:3]
	v_add_f64 v[0:1], v[10:11], v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[0:1], v[4:5], v[0:1]
	v_add_f64 v[2:3], v[6:7], v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[4:5], v[2:3], -v[6:7]
	v_mul_f64 v[6:7], v[2:3], v[2:3]
	v_add_f64 v[0:1], v[0:1], -v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[4:5], v[2:3], v[2:3], -v[6:7]
	v_add_f64 v[8:9], v[0:1], v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[4:5], v[2:3], v[8:9], v[4:5]
	v_add_f64 v[8:9], v[6:7], v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	v_fma_f64 v[10:11], v[8:9], s[2:3], s[0:1]
	s_mov_b32 s0, 0x3abe935a
	s_mov_b32 s1, 0x3fbe25e4
	v_add_f64 v[6:7], v[8:9], -v[6:7]
	v_mul_f64 v[16:17], v[2:3], v[8:9]
	v_fma_f64 v[10:11], v[8:9], v[10:11], s[0:1]
	s_mov_b32 s0, 0x47e6c9c2
	s_mov_b32 s1, 0x3fc110ef
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[4:5], v[4:5], -v[6:7]
	v_fma_f64 v[10:11], v[8:9], v[10:11], s[0:1]
	s_mov_b32 s0, 0xcfa74449
	s_mov_b32 s1, 0x3fc3b13b
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[10:11], v[8:9], v[10:11], s[0:1]
	s_mov_b32 s0, 0x71bf3c30
	s_mov_b32 s1, 0x3fc745d1
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[10:11], v[8:9], v[10:11], s[0:1]
	s_mov_b32 s0, 0x1c7792ce
	s_mov_b32 s1, 0x3fcc71c7
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[10:11], v[8:9], v[10:11], s[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[10:11], v[8:9], v[10:11], s[74:75]
	v_fma_f64 v[10:11], v[8:9], v[10:11], s[76:77]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[12:13], v[8:9], v[10:11]
	v_fma_f64 v[6:7], v[8:9], v[10:11], -v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[6:7], v[4:5], v[10:11], v[6:7]
	v_add_f64 v[10:11], v[12:13], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[14:15], v[10:11], s[56:57]
	v_add_f64 v[12:13], v[10:11], -v[12:13]
	v_add_f64 v[18:19], v[14:15], s[22:23]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_f64 v[6:7], v[6:7], -v[12:13]
	v_fma_f64 v[12:13], v[8:9], v[2:3], -v[16:17]
	s_mov_b32 s22, 0
	v_add_f64 v[10:11], v[10:11], -v[18:19]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[6:7], v[6:7], s[82:83]
	v_fma_f64 v[8:9], v[8:9], v[0:1], v[12:13]
	v_ldexp_f64 v[0:1], v[0:1], 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[6:7], v[6:7], v[10:11]
	v_fma_f64 v[4:5], v[4:5], v[2:3], v[8:9]
	v_ldexp_f64 v[2:3], v[2:3], 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[8:9], v[14:15], v[6:7]
	v_add_f64 v[10:11], v[16:17], v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[12:13], v[14:15], -v[8:9]
	v_mul_f64 v[14:15], v[10:11], v[8:9]
	v_add_f64 v[16:17], v[10:11], -v[16:17]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[6:7], v[6:7], v[12:13]
	v_fma_f64 v[12:13], v[10:11], v[8:9], -v[14:15]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[4:5], v[4:5], -v[16:17]
	v_fma_f64 v[6:7], v[10:11], v[6:7], v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[4:5], v[4:5], v[8:9], v[6:7]
	v_subrev_co_ci_u32_e32 v8, vcc_lo, 0, v82, vcc_lo
	v_cvt_f64_i32_e32 v[8:9], v8
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[6:7], v[14:15], v[4:5]
	v_add_f64 v[10:11], v[2:3], v[6:7]
	v_add_f64 v[12:13], v[6:7], -v[14:15]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[14:15], v[8:9], s[78:79]
	v_add_f64 v[2:3], v[10:11], -v[2:3]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[4:5], v[4:5], -v[12:13]
	v_fma_f64 v[12:13], v[8:9], s[78:79], -v[14:15]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[2:3], v[6:7], -v[2:3]
	v_add_f64 v[0:1], v[0:1], v[4:5]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[4:5], v[8:9], s[80:81], v[12:13]
	v_add_f64 v[0:1], v[0:1], v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[2:3], v[14:15], v[4:5]
	v_add_f64 v[6:7], v[10:11], v[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[14:15], v[2:3], -v[14:15]
	v_add_f64 v[8:9], v[2:3], v[6:7]
	v_add_f64 v[10:11], v[6:7], -v[10:11]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[4:5], v[4:5], -v[14:15]
	v_add_f64 v[12:13], v[8:9], -v[2:3]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[0:1], v[0:1], -v[10:11]
	v_add_f64 v[16:17], v[8:9], -v[12:13]
	v_add_f64 v[6:7], v[6:7], -v[12:13]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[10:11], v[4:5], v[0:1]
	v_add_f64 v[2:3], v[2:3], -v[16:17]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[2:3], v[6:7], v[2:3]
	v_add_f64 v[6:7], v[10:11], -v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[2:3], v[10:11], v[2:3]
	v_add_f64 v[10:11], v[10:11], -v[6:7]
	v_add_f64 v[0:1], v[0:1], -v[6:7]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[12:13], v[8:9], v[2:3]
	v_add_f64 v[4:5], v[4:5], -v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[6:7], v[12:13], -v[8:9]
	v_add_f64 v[0:1], v[0:1], v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[2:3], v[2:3], -v[6:7]
	v_add_f64 v[0:1], v[0:1], v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[2:3], v[12:13], v[0:1]
	v_add_f64 v[4:5], v[2:3], -v[12:13]
	v_mul_f64 v[6:7], 0x40080000, v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[0:1], v[0:1], -v[4:5]
	v_fma_f64 v[2:3], 0x40080000, v[2:3], -v[6:7]
	v_cmp_class_f64_e64 vcc_lo, v[6:7], 0x204
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[0:1], 0x40080000, v[0:1], v[2:3]
	v_add_f64 v[2:3], v[6:7], v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v5, v3, v7 :: v_dual_cndmask_b32 v4, v2, v6
	v_add_f64 v[2:3], v[2:3], -v[6:7]
	v_mul_f64 v[8:9], v[4:5], s[84:85]
	v_cmp_nlt_f64_e64 s0, 0x40900000, v[4:5]
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[4:5]|
	v_cmp_ngt_f64_e64 s1, 0xc090cc00, v[4:5]
	v_add_f64 v[0:1], v[0:1], -v[2:3]
	v_rndne_f64_e32 v[8:9], v[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_dual_cndmask_b32 v1, 0, v1 :: v_dual_cndmask_b32 v0, 0, v0
	s_and_b32 vcc_lo, s1, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[10:11], v[8:9], s[86:87], v[4:5]
	v_cvt_i32_f64_e32 v14, v[8:9]
	v_fma_f64 v[10:11], v[8:9], s[44:45], v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[12:13], v[10:11], s[90:91], s[88:89]
	v_fma_f64 v[12:13], v[10:11], v[12:13], s[92:93]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[12:13], v[10:11], v[12:13], s[94:95]
	v_fma_f64 v[12:13], v[10:11], v[12:13], s[96:97]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[12:13], v[10:11], v[12:13], s[98:99]
	v_fma_f64 v[12:13], v[10:11], v[12:13], s[100:101]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[12:13], v[10:11], v[12:13], s[102:103]
	v_fma_f64 v[12:13], v[10:11], v[12:13], s[60:61]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[12:13], v[10:11], v[12:13], s[62:63]
	v_fma_f64 v[12:13], v[10:11], v[12:13], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[8:9], v[10:11], v[12:13], 1.0
	v_ldexp_f64 v[6:7], v[8:9], v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v2, 0x7ff00000, v7, s0
	v_cmp_eq_f64_e64 s0, 0, v[66:67]
	v_cndmask_b32_e64 v3, 0, v2, s1
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v2, 0, v6, vcc_lo
	v_div_scale_f64 v[6:7], null, s[66:67], s[66:67], v[66:67]
	v_fma_f64 v[0:1], v[2:3], v[0:1], v[2:3]
	v_cmp_class_f64_e64 vcc_lo, v[2:3], 0x204
	v_cndmask_b32_e64 v4, 0x7ff00000, 0, s0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_rcp_f64_e32 v[12:13], v[6:7]
	v_dual_cndmask_b32 v1, v1, v3 :: v_dual_cndmask_b32 v0, v0, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_bfi_b32 v2, 0x7fffffff, v4, v67
	s_or_b32 vcc_lo, s0, s46
	v_div_scale_f64 v[4:5], null, s[64:65], s[64:65], v[47:48]
	v_bfi_b32 v1, 0x7fffffff, v1, v67
	v_cndmask_b32_e64 v0, v0, 0, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v1, v1, v2, vcc_lo
	v_div_scale_f64 v[2:3], null, 0x40b5e000, 0x40b5e000, v[0:1]
	v_div_scale_f64 v[20:21], vcc_lo, v[0:1], 0x40b5e000, v[0:1]
	s_delay_alu instid0(TRANS32_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[18:19], -v[6:7], v[12:13], 1.0
	v_rcp_f64_e32 v[10:11], v[4:5]
	v_rcp_f64_e32 v[8:9], v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	v_fma_f64 v[12:13], v[12:13], v[18:19], v[12:13]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[16:17], -v[4:5], v[10:11], 1.0
	v_fma_f64 v[14:15], -v[2:3], v[8:9], 1.0
	v_fma_f64 v[18:19], -v[6:7], v[12:13], 1.0
	v_fma_f64 v[10:11], v[10:11], v[16:17], v[10:11]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[8:9], v[8:9], v[14:15], v[8:9]
	v_fma_f64 v[12:13], v[12:13], v[18:19], v[12:13]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[16:17], -v[4:5], v[10:11], 1.0
	v_fma_f64 v[14:15], -v[2:3], v[8:9], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[10:11], v[10:11], v[16:17], v[10:11]
	v_div_scale_f64 v[16:17], s2, v[66:67], s[66:67], v[66:67]
	v_fma_f64 v[8:9], v[8:9], v[14:15], v[8:9]
	v_div_scale_f64 v[14:15], s1, v[47:48], s[64:65], v[47:48]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[24:25], v[16:17], v[12:13]
	v_mul_f64 v[18:19], v[20:21], v[8:9]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[22:23], v[14:15], v[10:11]
	v_fma_f64 v[6:7], -v[6:7], v[24:25], v[16:17]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[2:3], -v[2:3], v[18:19], v[20:21]
	v_fma_f64 v[4:5], -v[4:5], v[22:23], v[14:15]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_div_fmas_f64 v[2:3], v[2:3], v[8:9], v[18:19]
	s_mov_b32 vcc_lo, s1
	s_movk_i32 s1, 0xb4
	v_div_fmas_f64 v[4:5], v[4:5], v[10:11], v[22:23]
	s_mov_b32 vcc_lo, s2
	v_div_fmas_f64 v[6:7], v[6:7], v[12:13], v[24:25]
	v_cmp_neq_f64_e32 vcc_lo, 0, v[0:1]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_div_fixup_f64 v[2:3], v[2:3], 0x40b5e000, v[0:1]
	v_div_fixup_f64 v[4:5], v[4:5], s[64:65], v[47:48]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_div_fixup_f64 v[6:7], v[6:7], s[66:67], v[66:67]
	v_mul_f64 v[2:3], 0x40590000, v[2:3]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[4:5], 0x40668000, v[4:5]
	v_mul_f64 v[6:7], 0x40690000, v[6:7]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ceil_f64_e32 v[2:3], v[2:3]
	v_ceil_f64_e32 v[4:5], v[4:5]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ceil_f64_e32 v[6:7], v[6:7]
	v_cvt_i32_f64_e32 v2, v[2:3]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cvt_i32_f64_e32 v3, v[4:5]
	v_cvt_i32_f64_e32 v4, v[6:7]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v37, 1, v2, vcc_lo
	v_cmp_neq_f64_e32 vcc_lo, 0, v[47:48]
	v_cndmask_b32_e64 v2, v4, 1, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_min_i32_e32 v4, 0xc8, v2
	v_cndmask_b32_e32 v51, 1, v3, vcc_lo
	v_min_i32_e32 v0, 0xb4, v51
	v_max_i32_e32 v5, 1, v51
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_nc_u32_e32 v7, -1, v0
	v_mad_u64_u32 v[0:1], null, v4, s1, 0xffffffffffffff4c
	v_cmp_lt_i32_e64 s1, 0, v51
	v_add_nc_u32_e32 v1, -1, v5
	v_add_nc_u32_e32 v4, -1, v51
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v5, 0, v7, s1
	v_cmp_gt_i32_e64 s1, 0xb5, v51
	v_cmp_lt_u32_e64 s2, 0xb3, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v1, 0xb3, v1, s1
	v_cmp_lt_i32_e64 s1, 0, v2
	v_add_nc_u32_e32 v2, 0xffffff4b, v51
	v_mul_lo_u32 v6, 0xb4, v37
	v_dual_mov_b32 v46, v38 :: v_dual_add_nc_u32 v3, -1, v37
	v_cndmask_b32_e64 v0, 0, v0, s1
	s_delay_alu instid0(VALU_DEP_4)
	v_cmp_lt_u32_e64 s3, 0xffffff4b, v2
	v_mov_b32_e32 v45, v37
	v_cmp_ne_u32_e32 vcc_lo, 1, v37
	v_cmp_gt_i32_e64 s0, 2, v37
	v_add_nc_u32_e32 v1, v6, v1
	v_add_nc_u32_e32 v0, v5, v0
	v_add_nc_u32_e32 v2, v51, v6
	v_cmp_lt_u32_e64 s1, 0x63, v3
	s_or_b32 s86, vcc_lo, s3
	v_mad_u64_u32 v[72:73], null, v1, 33, 0xffffffffffffe8cc
	v_mul_lo_u32 v84, 0xbb8, v0
	v_mad_u64_u32 v[73:74], null, v2, 33, 0xffffffffffffe8ab
	s_or_b32 s44, s1, s2
	s_or_b32 s33, s0, s3
.LBB3_7:                                ; %.lr.ph.i
                                        ;   Parent Loop BB3_3 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB3_15 Depth 3
                                        ;       Child Loop BB3_23 Depth 3
                                        ;       Child Loop BB3_29 Depth 3
                                        ;       Child Loop BB3_38 Depth 3
                                        ;       Child Loop BB3_46 Depth 3
                                        ;       Child Loop BB3_54 Depth 3
                                        ;       Child Loop BB3_60 Depth 3
                                        ;       Child Loop BB3_69 Depth 3
                                        ;       Child Loop BB3_73 Depth 3
                                        ;       Child Loop BB3_81 Depth 3
                                        ;       Child Loop BB3_87 Depth 3
                                        ;       Child Loop BB3_96 Depth 3
                                        ;       Child Loop BB3_100 Depth 3
                                        ;       Child Loop BB3_108 Depth 3
                                        ;       Child Loop BB3_114 Depth 3
                                        ;       Child Loop BB3_123 Depth 3
                                        ;       Child Loop BB3_128 Depth 3
                                        ;       Child Loop BB3_139 Depth 3
                                        ;       Child Loop BB3_150 Depth 3
                                        ;       Child Loop BB3_160 Depth 3
                                        ;         Child Loop BB3_161 Depth 4
                                        ;         Child Loop BB3_171 Depth 4
                                        ;         Child Loop BB3_179 Depth 4
                                        ;         Child Loop BB3_185 Depth 4
                                        ;         Child Loop BB3_194 Depth 4
                                        ;         Child Loop BB3_198 Depth 4
                                        ;         Child Loop BB3_206 Depth 4
                                        ;         Child Loop BB3_212 Depth 4
                                        ;         Child Loop BB3_221 Depth 4
                                        ; implicit-def: $vgpr89
                                        ; implicit-def: $vgpr74
                                        ; implicit-def: $vgpr81
                                        ; implicit-def: $vgpr87
                                        ; implicit-def: $vgpr88
                                        ; implicit-def: $vgpr83
	s_and_saveexec_b32 s0, s44
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s69, exec_lo, s0
	s_cbranch_execz .LBB3_148
; %bb.8:                                ;   in Loop: Header=BB3_7 Depth=2
                                        ; implicit-def: $vgpr89
                                        ; implicit-def: $vgpr74
                                        ; implicit-def: $vgpr81
                                        ; implicit-def: $vgpr87
                                        ; implicit-def: $vgpr88
                                        ; implicit-def: $vgpr83
	s_and_saveexec_b32 s0, s86
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s70, exec_lo, s0
	s_cbranch_execz .LBB3_137
; %bb.9:                                ;   in Loop: Header=BB3_7 Depth=2
                                        ; implicit-def: $sgpr1
                                        ; implicit-def: $vgpr74
                                        ; implicit-def: $vgpr81
                                        ; implicit-def: $vgpr87
                                        ; implicit-def: $vgpr88
                                        ; implicit-def: $vgpr83
	s_and_saveexec_b32 s0, s33
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s71, exec_lo, s0
	s_cbranch_execz .LBB3_126
; %bb.10:                               ;   in Loop: Header=BB3_7 Depth=2
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, _ZZ11get_npe_numiiPdP12hiprandStateE7warning@rel32@lo+4
	s_addc_u32 s3, s3, _ZZ11get_npe_numiiPdP12hiprandStateE7warning@rel32@hi+12
	global_load_b64 v[0:1], v38, s[2:3]
	s_waitcnt vmcnt(0)
	v_cmp_lt_i64_e32 vcc_lo, 8, v[0:1]
	v_add_co_u32 v0, s0, v0, 1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v1, s0, 0, v1, s0
	global_store_b64 v38, v[0:1], s[2:3]
	s_cbranch_vccz .LBB3_41
; %bb.11:                               ;   in Loop: Header=BB3_7 Depth=2
	v_cmp_ne_u64_e32 vcc_lo, 10, v[0:1]
	s_cbranch_vccnz .LBB3_40
; %bb.12:                               ;   in Loop: Header=BB3_7 Depth=2
	s_load_b64 s[2:3], s[34:35], 0x50
	v_dual_mov_b32 v37, v76 :: v_dual_mov_b32 v4, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s0, v37
	v_mov_b32_e32 v5, 0
	v_cmp_eq_u32_e64 s0, s0, v37
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB3_18
; %bb.13:                               ;   in Loop: Header=BB3_7 Depth=2
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[2:3], v38, s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[0:1], v38, s[2:3] offset:40
	global_load_b64 v[4:5], v38, s[2:3]
	s_mov_b32 s4, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v3
	v_and_b32_e32 v0, v0, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v1, v1, 24
	v_mul_hi_u32 v6, v0, 24
	v_mul_lo_u32 v0, v0, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v1, v6, v1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v0, vcc_lo, v4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, v5, v1, vcc_lo
	global_load_b64 v[0:1], v[0:1], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[4:5], v38, v[0:3], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[4:5], v[2:3]
	s_cbranch_execz .LBB3_17
; %bb.14:                               ; %.preheader3.i.i.i85.i.i.i.preheader
                                        ;   in Loop: Header=BB3_7 Depth=2
	s_mov_b32 s5, 0
.LBB3_15:                               ; %.preheader3.i.i.i85.i.i.i
                                        ;   Parent Loop BB3_3 Depth=1
                                        ;     Parent Loop BB3_7 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[0:1], v38, s[2:3] offset:40
	global_load_b64 v[6:7], v38, s[2:3]
	v_dual_mov_b32 v2, v4 :: v_dual_mov_b32 v3, v5
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v0, v0, v2
	v_and_b32_e32 v1, v1, v3
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[4:5], null, v0, 24, v[6:7]
	v_mov_b32_e32 v0, v5
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v1, 24, v[0:1]
	global_load_b64 v[0:1], v[4:5], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[4:5], v38, v[0:3], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[4:5], v[2:3]
	s_or_b32 s5, vcc_lo, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s5
	s_cbranch_execnz .LBB3_15
; %bb.16:                               ; %Flow782
                                        ;   in Loop: Header=BB3_7 Depth=2
	s_or_b32 exec_lo, exec_lo, s5
.LBB3_17:                               ; %Flow784
                                        ;   in Loop: Header=BB3_7 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s4
.LBB3_18:                               ; %.loopexit4.i.i.i80.i.i.i
                                        ;   in Loop: Header=BB3_7 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[6:7], v38, s[2:3] offset:40
	global_load_b128 v[0:3], v38, s[2:3]
	v_readfirstlane_b32 s4, v4
	v_readfirstlane_b32 s5, v5
	s_mov_b32 s10, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s6, v6
	v_readfirstlane_b32 s7, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[6:7], s[4:5], s[6:7]
	s_mul_i32 s1, s7, 24
	s_mul_hi_u32 s8, s6, 24
	s_mul_i32 s9, s6, 24
	s_and_saveexec_b32 s11, s0
	s_cbranch_execz .LBB3_20
; %bb.19:                               ;   in Loop: Header=BB3_7 Depth=2
	s_add_i32 s12, s8, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v4, vcc_lo, v0, s9
	v_add_co_ci_u32_e32 v5, vcc_lo, s12, v1, vcc_lo
	v_dual_mov_b32 v39, s10 :: v_dual_mov_b32 v40, v38
	global_store_b128 v[4:5], v[39:42], off offset:8
.LBB3_20:                               ;   in Loop: Header=BB3_7 Depth=2
	s_or_b32 exec_lo, exec_lo, s11
	s_lshl_b64 s[6:7], s[6:7], 12
	v_lshlrev_b64 v[4:5], 6, v[37:38]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s6
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v3, vcc_lo
	s_mov_b32 s29, s28
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v2, v4
	s_mov_b32 s30, s28
	s_mov_b32 s31, s28
	v_add_co_ci_u32_e32 v7, vcc_lo, v3, v5, vcc_lo
	v_dual_mov_b32 v2, s28 :: v_dual_mov_b32 v3, s29
	v_dual_mov_b32 v4, s30 :: v_dual_mov_b32 v5, s31
	v_mov_b32_e32 v37, v38
	v_mov_b32_e32 v39, v38
	s_clause 0x3
	global_store_b128 v[6:7], v[2:5], off offset:16
	global_store_b128 v[6:7], v[2:5], off offset:32
	global_store_b128 v[6:7], v[2:5], off offset:48
	global_store_b128 v[6:7], v[36:39], off
	s_and_saveexec_b32 s6, s0
	s_cbranch_execz .LBB3_28
; %bb.21:                               ;   in Loop: Header=BB3_7 Depth=2
	s_clause 0x1
	global_load_b64 v[12:13], v38, s[2:3] offset:32 glc
	global_load_b64 v[2:3], v38, s[2:3] offset:40
	s_mov_b32 s7, exec_lo
	v_dual_mov_b32 v10, s4 :: v_dual_mov_b32 v11, s5
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v3, s5, v3
	v_and_b32_e32 v2, s4, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v3, v3, 24
	v_mul_hi_u32 v4, v2, 24
	v_mul_lo_u32 v2, v2, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v4, v3
	v_add_co_u32 v8, vcc_lo, v0, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v9, vcc_lo, v1, v3, vcc_lo
	global_store_b64 v[8:9], v[12:13], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v38, v[10:13], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[12:13]
	s_cbranch_execz .LBB3_24
; %bb.22:                               ; %.preheader1.i.i.i83.i.i.i.preheader
                                        ;   in Loop: Header=BB3_7 Depth=2
	s_mov_b32 s10, 0
.LBB3_23:                               ; %.preheader1.i.i.i83.i.i.i
                                        ;   Parent Loop BB3_3 Depth=1
                                        ;     Parent Loop BB3_7 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	v_dual_mov_b32 v2, s4 :: v_dual_mov_b32 v3, s5
	s_sleep 1
	global_store_b64 v[8:9], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v38, v[2:5], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s10, vcc_lo, s10
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s10
	s_cbranch_execnz .LBB3_23
.LBB3_24:                               ; %Flow780
                                        ;   in Loop: Header=BB3_7 Depth=2
	s_or_b32 exec_lo, exec_lo, s7
	global_load_b64 v[2:3], v38, s[2:3] offset:16
	s_mov_b32 s10, exec_lo
	s_mov_b32 s7, exec_lo
	v_mbcnt_lo_u32_b32 v4, s10, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB3_26
; %bb.25:                               ;   in Loop: Header=BB3_7 Depth=2
	s_bcnt1_i32_b32 s10, s10
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v37, s10
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[37:38], off offset:8
.LBB3_26:                               ;   in Loop: Header=BB3_7 Depth=2
	s_or_b32 exec_lo, exec_lo, s7
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB3_28
; %bb.27:                               ;   in Loop: Header=BB3_7 Depth=2
	global_load_b32 v37, v[2:3], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s7, v37
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[37:38], off
	s_and_b32 m0, s7, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB3_28:                               ; %Flow781
                                        ;   in Loop: Header=BB3_7 Depth=2
	s_or_b32 exec_lo, exec_lo, s6
	s_add_i32 s8, s8, s1
	v_add_co_u32 v0, vcc_lo, v0, s9
	v_add_co_ci_u32_e32 v1, vcc_lo, s8, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB3_29:                               ;   Parent Loop BB3_3 Depth=1
                                        ;     Parent Loop BB3_7 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB3_31
; %bb.30:                               ;   in Loop: Header=BB3_29 Depth=3
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB3_31:                               ;   in Loop: Header=BB3_29 Depth=3
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB3_33
; %bb.32:                               ;   in Loop: Header=BB3_29 Depth=3
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB3_34
.LBB3_33:                               ;   in Loop: Header=BB3_29 Depth=3
	s_mov_b32 s1, -1
.LBB3_34:                               ; %Flow775
                                        ;   in Loop: Header=BB3_29 Depth=3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB3_29
; %bb.35:                               ;   in Loop: Header=BB3_7 Depth=2
	global_load_b64 v[0:1], v[6:7], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB3_39
; %bb.36:                               ;   in Loop: Header=BB3_7 Depth=2
	s_clause 0x2
	global_load_b64 v[4:5], v38, s[2:3] offset:40
	global_load_b64 v[8:9], v38, s[2:3] offset:24 glc
	global_load_b64 v[6:7], v38, s[2:3]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v10, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v11, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v10, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v11, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v11 :: v_dual_cndmask_b32 v2, v2, v10
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v4, v2, v4
	v_mul_hi_u32 v10, v4, 24
	v_mul_lo_u32 v4, v4, 24
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v8
	v_mul_lo_u32 v5, v5, 24
	v_add_nc_u32_e32 v5, v10, v5
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v9
	global_store_b64 v[6:7], v[8:9], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v38, v[2:5], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[8:9]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB3_39
; %bb.37:                               ; %.preheader.i.i.i82.i.i.i.preheader
                                        ;   in Loop: Header=BB3_7 Depth=2
	s_mov_b32 s0, 0
.LBB3_38:                               ; %.preheader.i.i.i82.i.i.i
                                        ;   Parent Loop BB3_3 Depth=1
                                        ;     Parent Loop BB3_7 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[8:9], v38, v[2:5], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[8:9], v[4:5]
	v_dual_mov_b32 v4, v8 :: v_dual_mov_b32 v5, v9
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB3_38
.LBB3_39:                               ; %__ockl_printf_begin.exit86.i.i.i
                                        ;   in Loop: Header=BB3_7 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	s_add_u32 s8, s18, 0x88
	s_addc_u32 s9, s19, 0
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str.2@rel32@lo+4
	s_addc_u32 s1, s1, .str.2@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	v_dual_mov_b32 v2, s0 :: v_dual_mov_b32 v3, s1
	v_dual_mov_b32 v4, s73 :: v_dual_mov_b32 v5, v38
	v_mov_b32_e32 v6, v42
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __ockl_printf_append_string_n@rel32@lo+4
	s_addc_u32 s3, s3, __ockl_printf_append_string_n@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[2:3]
.LBB3_40:                               ; %Flow785
                                        ;   in Loop: Header=BB3_7 Depth=2
	s_mov_b32 s0, 0
	s_mov_b32 s1, 0
	s_branch .LBB3_42
.LBB3_41:                               ;   in Loop: Header=BB3_7 Depth=2
	s_mov_b32 s0, -1
                                        ; implicit-def: $sgpr1
.LBB3_42:                               ; %Flow830
                                        ;   in Loop: Header=BB3_7 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccnz .LBB3_125
; %bb.43:                               ;   in Loop: Header=BB3_7 Depth=2
	s_load_b64 s[20:21], s[34:35], 0x50
	v_dual_mov_b32 v37, v76 :: v_dual_mov_b32 v4, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s0, v37
	v_mov_b32_e32 v5, 0
	v_cmp_eq_u32_e64 s0, s0, v37
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB3_49
; %bb.44:                               ;   in Loop: Header=BB3_7 Depth=2
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[2:3], v38, s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[0:1], v38, s[20:21] offset:40
	global_load_b64 v[4:5], v38, s[20:21]
	s_mov_b32 s2, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v3
	v_and_b32_e32 v0, v0, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v1, v1, 24
	v_mul_hi_u32 v6, v0, 24
	v_mul_lo_u32 v0, v0, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v1, v6, v1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v0, vcc_lo, v4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, v5, v1, vcc_lo
	global_load_b64 v[0:1], v[0:1], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[4:5], v38, v[0:3], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[4:5], v[2:3]
	s_cbranch_execz .LBB3_48
; %bb.45:                               ; %.preheader3.i.i.i.i.i.i.preheader
                                        ;   in Loop: Header=BB3_7 Depth=2
	s_mov_b32 s3, 0
.LBB3_46:                               ; %.preheader3.i.i.i.i.i.i
                                        ;   Parent Loop BB3_3 Depth=1
                                        ;     Parent Loop BB3_7 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[0:1], v38, s[20:21] offset:40
	global_load_b64 v[6:7], v38, s[20:21]
	v_dual_mov_b32 v2, v4 :: v_dual_mov_b32 v3, v5
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v0, v0, v2
	v_and_b32_e32 v1, v1, v3
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[4:5], null, v0, 24, v[6:7]
	v_mov_b32_e32 v0, v5
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v1, 24, v[0:1]
	global_load_b64 v[0:1], v[4:5], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[4:5], v38, v[0:3], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[4:5], v[2:3]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB3_46
; %bb.47:                               ; %Flow826
                                        ;   in Loop: Header=BB3_7 Depth=2
	s_or_b32 exec_lo, exec_lo, s3
.LBB3_48:                               ; %Flow828
                                        ;   in Loop: Header=BB3_7 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB3_49:                               ; %.loopexit4.i.i.i.i.i.i
                                        ;   in Loop: Header=BB3_7 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[6:7], v38, s[20:21] offset:40
	global_load_b128 v[0:3], v38, s[20:21]
	v_readfirstlane_b32 s2, v4
	v_readfirstlane_b32 s3, v5
	s_mov_b32 s8, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v6
	v_readfirstlane_b32 s5, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB3_51
; %bb.50:                               ;   in Loop: Header=BB3_7 Depth=2
	s_add_i32 s10, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v4, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v5, vcc_lo, s10, v1, vcc_lo
	v_dual_mov_b32 v39, s8 :: v_dual_mov_b32 v40, v38
	global_store_b128 v[4:5], v[39:42], off offset:8
.LBB3_51:                               ;   in Loop: Header=BB3_7 Depth=2
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[4:5], 6, v[37:38]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_mov_b32 s29, s28
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v2, v4
	s_mov_b32 s30, s28
	s_mov_b32 s31, s28
	v_add_co_ci_u32_e32 v7, vcc_lo, v3, v5, vcc_lo
	v_dual_mov_b32 v2, s28 :: v_dual_mov_b32 v3, s29
	v_dual_mov_b32 v4, s30 :: v_dual_mov_b32 v5, s31
	v_mov_b32_e32 v37, v38
	v_mov_b32_e32 v39, v38
	s_clause 0x3
	global_store_b128 v[6:7], v[2:5], off offset:16
	global_store_b128 v[6:7], v[2:5], off offset:32
	global_store_b128 v[6:7], v[2:5], off offset:48
	global_store_b128 v[6:7], v[36:39], off
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB3_59
; %bb.52:                               ;   in Loop: Header=BB3_7 Depth=2
	s_clause 0x1
	global_load_b64 v[12:13], v38, s[20:21] offset:32 glc
	global_load_b64 v[2:3], v38, s[20:21] offset:40
	s_mov_b32 s5, exec_lo
	v_dual_mov_b32 v10, s2 :: v_dual_mov_b32 v11, s3
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v3, s3, v3
	v_and_b32_e32 v2, s2, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v3, v3, 24
	v_mul_hi_u32 v4, v2, 24
	v_mul_lo_u32 v2, v2, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v4, v3
	v_add_co_u32 v8, vcc_lo, v0, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v9, vcc_lo, v1, v3, vcc_lo
	global_store_b64 v[8:9], v[12:13], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v38, v[10:13], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[12:13]
	s_cbranch_execz .LBB3_55
; %bb.53:                               ; %.preheader1.i.i.i.i.i.i.preheader
                                        ;   in Loop: Header=BB3_7 Depth=2
	s_mov_b32 s8, 0
.LBB3_54:                               ; %.preheader1.i.i.i.i.i.i
                                        ;   Parent Loop BB3_3 Depth=1
                                        ;     Parent Loop BB3_7 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
	s_sleep 1
	global_store_b64 v[8:9], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v38, v[2:5], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB3_54
.LBB3_55:                               ; %Flow824
                                        ;   in Loop: Header=BB3_7 Depth=2
	s_or_b32 exec_lo, exec_lo, s5
	global_load_b64 v[2:3], v38, s[20:21] offset:16
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v4, s8, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB3_57
; %bb.56:                               ;   in Loop: Header=BB3_7 Depth=2
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v37, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[37:38], off offset:8
.LBB3_57:                               ;   in Loop: Header=BB3_7 Depth=2
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB3_59
; %bb.58:                               ;   in Loop: Header=BB3_7 Depth=2
	global_load_b32 v37, v[2:3], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v37
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[37:38], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB3_59:                               ; %Flow825
                                        ;   in Loop: Header=BB3_7 Depth=2
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB3_60:                               ;   Parent Loop BB3_3 Depth=1
                                        ;     Parent Loop BB3_7 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB3_62
; %bb.61:                               ;   in Loop: Header=BB3_60 Depth=3
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB3_62:                               ;   in Loop: Header=BB3_60 Depth=3
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB3_64
; %bb.63:                               ;   in Loop: Header=BB3_60 Depth=3
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB3_65
.LBB3_64:                               ;   in Loop: Header=BB3_60 Depth=3
	s_mov_b32 s1, -1
.LBB3_65:                               ; %Flow819
                                        ;   in Loop: Header=BB3_60 Depth=3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB3_60
; %bb.66:                               ;   in Loop: Header=BB3_7 Depth=2
	global_load_b64 v[0:1], v[6:7], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB3_70
; %bb.67:                               ;   in Loop: Header=BB3_7 Depth=2
	s_clause 0x2
	global_load_b64 v[4:5], v38, s[20:21] offset:40
	global_load_b64 v[8:9], v38, s[20:21] offset:24 glc
	global_load_b64 v[6:7], v38, s[20:21]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v10, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v11, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v10, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v11, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v11 :: v_dual_cndmask_b32 v2, v2, v10
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v4, v2, v4
	v_mul_hi_u32 v10, v4, 24
	v_mul_lo_u32 v4, v4, 24
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v8
	v_mul_lo_u32 v5, v5, 24
	v_add_nc_u32_e32 v5, v10, v5
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v9
	global_store_b64 v[6:7], v[8:9], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v38, v[2:5], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[8:9]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB3_70
; %bb.68:                               ; %.preheader.i.i.i.i.i.i.preheader
                                        ;   in Loop: Header=BB3_7 Depth=2
	s_mov_b32 s0, 0
.LBB3_69:                               ; %.preheader.i.i.i.i.i.i
                                        ;   Parent Loop BB3_3 Depth=1
                                        ;     Parent Loop BB3_7 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[8:9], v38, v[2:5], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[8:9], v[4:5]
	v_dual_mov_b32 v4, v8 :: v_dual_mov_b32 v5, v9
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB3_69
.LBB3_70:                               ; %__ockl_printf_begin.exit.i.i.i
                                        ;   in Loop: Header=BB3_7 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	s_add_u32 s8, s18, 0x88
	s_addc_u32 s9, s19, 0
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str.1@rel32@lo+4
	s_addc_u32 s1, s1, .str.1@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	v_dual_mov_b32 v2, s0 :: v_dual_mov_b32 v3, s1
	v_dual_mov_b32 v4, s104 :: v_dual_mov_b32 v5, v38
	v_mov_b32_e32 v6, v38
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __ockl_printf_append_string_n@rel32@lo+4
	s_addc_u32 s3, s3, __ockl_printf_append_string_n@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_swappc_b64 s[30:31], s[2:3]
	v_dual_mov_b32 v44, v1 :: v_dual_mov_b32 v37, v76
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v37
	v_mov_b32_e32 v5, 0
	v_mov_b32_e32 v6, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v37
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB3_76
; %bb.71:                               ;   in Loop: Header=BB3_7 Depth=2
	global_load_b64 v[3:4], v38, s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v38, s[20:21] offset:40
	global_load_b64 v[5:6], v38, s[20:21]
	s_mov_b32 s2, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v2, v2, v4
	v_and_b32_e32 v1, v1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v2, v2, 24
	v_mul_hi_u32 v7, v1, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v7, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v5, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v6, v2, vcc_lo
	global_load_b64 v[1:2], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[5:6], v38, v[1:4], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[5:6], v[3:4]
	s_cbranch_execz .LBB3_75
; %bb.72:                               ; %.preheader3.i.i.i72.i.i.i.preheader
                                        ;   in Loop: Header=BB3_7 Depth=2
	s_mov_b32 s3, 0
.LBB3_73:                               ; %.preheader3.i.i.i72.i.i.i
                                        ;   Parent Loop BB3_3 Depth=1
                                        ;     Parent Loop BB3_7 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[1:2], v38, s[20:21] offset:40
	global_load_b64 v[7:8], v38, s[20:21]
	v_dual_mov_b32 v3, v5 :: v_dual_mov_b32 v4, v6
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v1, v1, v3
	v_and_b32_e32 v2, v2, v4
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v1, 24, v[7:8]
	v_mov_b32_e32 v1, v6
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[6:7], null, v2, 24, v[1:2]
	global_load_b64 v[1:2], v[5:6], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[5:6], v38, v[1:4], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[5:6], v[3:4]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB3_73
; %bb.74:                               ; %Flow812
                                        ;   in Loop: Header=BB3_7 Depth=2
	s_or_b32 exec_lo, exec_lo, s3
.LBB3_75:                               ; %Flow814
                                        ;   in Loop: Header=BB3_7 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB3_76:                               ; %.loopexit4.i.i.i67.i.i.i
                                        ;   in Loop: Header=BB3_7 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_clause 0x1
	global_load_b64 v[7:8], v38, s[20:21] offset:40
	global_load_b128 v[1:4], v38, s[20:21]
	v_readfirstlane_b32 s2, v5
	v_readfirstlane_b32 s3, v6
	s_mov_b32 s8, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v7
	v_readfirstlane_b32 s5, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB3_78
; %bb.77:                               ;   in Loop: Header=BB3_7 Depth=2
	s_add_i32 s10, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v5, vcc_lo, v1, s7
	v_add_co_ci_u32_e32 v6, vcc_lo, s10, v2, vcc_lo
	v_dual_mov_b32 v39, s8 :: v_dual_mov_b32 v40, v38
	global_store_b128 v[5:6], v[39:42], off offset:8
.LBB3_78:                               ;   in Loop: Header=BB3_7 Depth=2
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	s_mov_b32 s29, s28
	s_waitcnt vmcnt(0)
	v_add_co_u32 v5, vcc_lo, v3, s4
	v_add_co_ci_u32_e32 v6, vcc_lo, s5, v4, vcc_lo
	v_lshlrev_b64 v[3:4], 6, v[37:38]
	s_mov_b32 s30, s28
	s_mov_b32 s31, s28
	v_and_or_b32 v43, 0xffffff1f, v0, 32
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v7, vcc_lo, v5, v3
	v_add_co_ci_u32_e32 v8, vcc_lo, v6, v4, vcc_lo
	v_dual_mov_b32 v3, s28 :: v_dual_mov_b32 v4, s29
	v_dual_mov_b32 v5, s30 :: v_dual_mov_b32 v6, s31
	s_clause 0x3
	global_store_b128 v[7:8], v[3:6], off offset:16
	global_store_b128 v[7:8], v[3:6], off offset:32
	global_store_b128 v[7:8], v[3:6], off offset:48
	global_store_b128 v[7:8], v[43:46], off
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB3_86
; %bb.79:                               ;   in Loop: Header=BB3_7 Depth=2
	s_clause 0x1
	global_load_b64 v[13:14], v38, s[20:21] offset:32 glc
	global_load_b64 v[3:4], v38, s[20:21] offset:40
	v_dual_mov_b32 v11, s2 :: v_dual_mov_b32 v12, s3
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v3
	v_readfirstlane_b32 s9, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v9, vcc_lo, v1, s8
	v_add_co_ci_u32_e32 v10, vcc_lo, s9, v2, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[9:10], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[5:6], v38, v[11:14], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[5:6], v[13:14]
	s_cbranch_execz .LBB3_82
; %bb.80:                               ; %.preheader1.i.i.i70.i.i.i.preheader
                                        ;   in Loop: Header=BB3_7 Depth=2
	s_mov_b32 s8, 0
.LBB3_81:                               ; %.preheader1.i.i.i70.i.i.i
                                        ;   Parent Loop BB3_3 Depth=1
                                        ;     Parent Loop BB3_7 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	v_dual_mov_b32 v3, s2 :: v_dual_mov_b32 v4, s3
	s_sleep 1
	global_store_b64 v[9:10], v[5:6], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[3:4], v38, v[3:6], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[3:4], v[5:6]
	v_dual_mov_b32 v6, v4 :: v_dual_mov_b32 v5, v3
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB3_81
.LBB3_82:                               ; %Flow810
                                        ;   in Loop: Header=BB3_7 Depth=2
	s_or_b32 exec_lo, exec_lo, s5
	global_load_b64 v[3:4], v38, s[20:21] offset:16
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v0, s8, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB3_84
; %bb.83:                               ;   in Loop: Header=BB3_7 Depth=2
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v37, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[3:4], v[37:38], off offset:8
.LBB3_84:                               ;   in Loop: Header=BB3_7 Depth=2
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[5:6], v[3:4], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[5:6]
	s_cbranch_vccnz .LBB3_86
; %bb.85:                               ;   in Loop: Header=BB3_7 Depth=2
	global_load_b32 v37, v[3:4], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v37
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[5:6], v[37:38], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB3_86:                               ; %Flow811
                                        ;   in Loop: Header=BB3_7 Depth=2
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v1, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v2, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB3_87:                               ;   Parent Loop BB3_3 Depth=1
                                        ;     Parent Loop BB3_7 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB3_89
; %bb.88:                               ;   in Loop: Header=BB3_87 Depth=3
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB3_89:                               ;   in Loop: Header=BB3_87 Depth=3
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB3_91
; %bb.90:                               ;   in Loop: Header=BB3_87 Depth=3
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB3_92
.LBB3_91:                               ;   in Loop: Header=BB3_87 Depth=3
	s_mov_b32 s1, -1
.LBB3_92:                               ; %Flow805
                                        ;   in Loop: Header=BB3_87 Depth=3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB3_87
; %bb.93:                               ;   in Loop: Header=BB3_7 Depth=2
	global_load_b64 v[49:50], v[7:8], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB3_97
; %bb.94:                               ;   in Loop: Header=BB3_7 Depth=2
	s_clause 0x2
	global_load_b64 v[2:3], v38, s[20:21] offset:40
	global_load_b64 v[6:7], v38, s[20:21] offset:24 glc
	global_load_b64 v[4:5], v38, s[20:21]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v8, vcc_lo, v2, 1
	v_add_co_ci_u32_e32 v9, vcc_lo, 0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v8, s2
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v9, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[0:1]
	v_dual_cndmask_b32 v1, v1, v9 :: v_dual_cndmask_b32 v0, v0, v8
	v_and_b32_e32 v3, v1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v2, v0, v2
	v_mul_hi_u32 v8, v2, 24
	v_mul_lo_u32 v2, v2, 24
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_u32 v4, vcc_lo, v4, v2
	v_mov_b32_e32 v2, v6
	v_mul_lo_u32 v3, v3, 24
	v_add_nc_u32_e32 v3, v8, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e32 v5, vcc_lo, v5, v3, vcc_lo
	v_mov_b32_e32 v3, v7
	global_store_b64 v[4:5], v[6:7], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v38, v[0:3], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[2:3], v[6:7]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB3_97
; %bb.95:                               ; %.preheader.i.i.i69.i.i.i.preheader
                                        ;   in Loop: Header=BB3_7 Depth=2
	s_mov_b32 s0, 0
.LBB3_96:                               ; %.preheader.i.i.i69.i.i.i
                                        ;   Parent Loop BB3_3 Depth=1
                                        ;     Parent Loop BB3_7 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_sleep 1
	global_store_b64 v[4:5], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[6:7], v38, v[0:3], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[2:3]
	v_dual_mov_b32 v2, v6 :: v_dual_mov_b32 v3, v7
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB3_96
.LBB3_97:                               ; %__ockl_printf_append_args.exit.i.i.i
                                        ;   in Loop: Header=BB3_7 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	v_dual_mov_b32 v37, v76 :: v_dual_mov_b32 v4, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s0, v37
	v_mov_b32_e32 v5, 0
	v_cmp_eq_u32_e64 s0, s0, v37
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB3_103
; %bb.98:                               ;   in Loop: Header=BB3_7 Depth=2
	global_load_b64 v[2:3], v38, s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[0:1], v38, s[20:21] offset:40
	global_load_b64 v[4:5], v38, s[20:21]
	s_mov_b32 s2, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v3
	v_and_b32_e32 v0, v0, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v1, v1, 24
	v_mul_hi_u32 v6, v0, 24
	v_mul_lo_u32 v0, v0, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v1, v6, v1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v0, vcc_lo, v4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, v5, v1, vcc_lo
	global_load_b64 v[0:1], v[0:1], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[4:5], v38, v[0:3], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[4:5], v[2:3]
	s_cbranch_execz .LBB3_102
; %bb.99:                               ; %.preheader3.i.i.i78.i.i.i.preheader
                                        ;   in Loop: Header=BB3_7 Depth=2
	s_mov_b32 s3, 0
.LBB3_100:                              ; %.preheader3.i.i.i78.i.i.i
                                        ;   Parent Loop BB3_3 Depth=1
                                        ;     Parent Loop BB3_7 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[0:1], v38, s[20:21] offset:40
	global_load_b64 v[6:7], v38, s[20:21]
	v_dual_mov_b32 v2, v4 :: v_dual_mov_b32 v3, v5
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v0, v0, v2
	v_and_b32_e32 v1, v1, v3
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[4:5], null, v0, 24, v[6:7]
	v_mov_b32_e32 v0, v5
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v1, 24, v[0:1]
	global_load_b64 v[0:1], v[4:5], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[4:5], v38, v[0:3], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[4:5], v[2:3]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB3_100
; %bb.101:                              ; %Flow798
                                        ;   in Loop: Header=BB3_7 Depth=2
	s_or_b32 exec_lo, exec_lo, s3
.LBB3_102:                              ; %Flow800
                                        ;   in Loop: Header=BB3_7 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB3_103:                              ; %.loopexit4.i.i.i73.i.i.i
                                        ;   in Loop: Header=BB3_7 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_clause 0x1
	global_load_b64 v[6:7], v38, s[20:21] offset:40
	global_load_b128 v[0:3], v38, s[20:21]
	v_readfirstlane_b32 s2, v4
	v_readfirstlane_b32 s3, v5
	s_mov_b32 s8, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v6
	v_readfirstlane_b32 s5, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB3_105
; %bb.104:                              ;   in Loop: Header=BB3_7 Depth=2
	s_add_i32 s10, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v4, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v5, vcc_lo, s10, v1, vcc_lo
	v_dual_mov_b32 v39, s8 :: v_dual_mov_b32 v40, v38
	global_store_b128 v[4:5], v[39:42], off offset:8
.LBB3_105:                              ;   in Loop: Header=BB3_7 Depth=2
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	s_mov_b32 s29, s28
	s_waitcnt vmcnt(0)
	v_add_co_u32 v4, vcc_lo, v2, s4
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v3, vcc_lo
	v_lshlrev_b64 v[2:3], 6, v[37:38]
	s_mov_b32 s30, s28
	s_mov_b32 s31, s28
	v_and_or_b32 v49, 0xffffff1d, v49, 34
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v4, v2
	v_add_co_ci_u32_e32 v7, vcc_lo, v5, v3, vcc_lo
	v_dual_mov_b32 v2, s28 :: v_dual_mov_b32 v3, s29
	v_dual_mov_b32 v4, s30 :: v_dual_mov_b32 v5, s31
	s_clause 0x3
	global_store_b128 v[6:7], v[2:5], off offset:16
	global_store_b128 v[6:7], v[2:5], off offset:32
	global_store_b128 v[6:7], v[2:5], off offset:48
	global_store_b128 v[6:7], v[49:52], off
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB3_113
; %bb.106:                              ;   in Loop: Header=BB3_7 Depth=2
	s_clause 0x1
	global_load_b64 v[10:11], v38, s[20:21] offset:32 glc
	global_load_b64 v[2:3], v38, s[20:21] offset:40
	v_dual_mov_b32 v8, s2 :: v_dual_mov_b32 v9, s3
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v2
	v_readfirstlane_b32 s9, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v6, vcc_lo, v0, s8
	v_add_co_ci_u32_e32 v7, vcc_lo, s9, v1, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[6:7], v[10:11], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v38, v[8:11], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[10:11]
	s_cbranch_execz .LBB3_109
; %bb.107:                              ; %.preheader1.i.i.i76.i.i.i.preheader
                                        ;   in Loop: Header=BB3_7 Depth=2
	s_mov_b32 s8, 0
.LBB3_108:                              ; %.preheader1.i.i.i76.i.i.i
                                        ;   Parent Loop BB3_3 Depth=1
                                        ;     Parent Loop BB3_7 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v38, v[2:5], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB3_108
.LBB3_109:                              ; %Flow796
                                        ;   in Loop: Header=BB3_7 Depth=2
	s_or_b32 exec_lo, exec_lo, s5
	global_load_b64 v[2:3], v38, s[20:21] offset:16
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v4, s8, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB3_111
; %bb.110:                              ;   in Loop: Header=BB3_7 Depth=2
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v37, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[37:38], off offset:8
.LBB3_111:                              ;   in Loop: Header=BB3_7 Depth=2
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB3_113
; %bb.112:                              ;   in Loop: Header=BB3_7 Depth=2
	global_load_b32 v37, v[2:3], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v37
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[37:38], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB3_113:                              ; %Flow797
                                        ;   in Loop: Header=BB3_7 Depth=2
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB3_114:                              ;   Parent Loop BB3_3 Depth=1
                                        ;     Parent Loop BB3_7 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB3_116
; %bb.115:                              ;   in Loop: Header=BB3_114 Depth=3
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB3_116:                              ;   in Loop: Header=BB3_114 Depth=3
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB3_118
; %bb.117:                              ;   in Loop: Header=BB3_114 Depth=3
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB3_119
.LBB3_118:                              ;   in Loop: Header=BB3_114 Depth=3
	s_mov_b32 s1, -1
.LBB3_119:                              ; %Flow791
                                        ;   in Loop: Header=BB3_114 Depth=3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB3_114
; %bb.120:                              ;   in Loop: Header=BB3_7 Depth=2
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB3_124
; %bb.121:                              ;   in Loop: Header=BB3_7 Depth=2
	s_clause 0x2
	global_load_b64 v[2:3], v38, s[20:21] offset:40
	global_load_b64 v[6:7], v38, s[20:21] offset:24 glc
	global_load_b64 v[4:5], v38, s[20:21]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v8, vcc_lo, v2, 1
	v_add_co_ci_u32_e32 v9, vcc_lo, 0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v8, s2
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v9, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[0:1]
	v_dual_cndmask_b32 v1, v1, v9 :: v_dual_cndmask_b32 v0, v0, v8
	v_and_b32_e32 v3, v1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v2, v0, v2
	v_mul_hi_u32 v8, v2, 24
	v_mul_lo_u32 v2, v2, 24
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_u32 v4, vcc_lo, v4, v2
	v_mov_b32_e32 v2, v6
	v_mul_lo_u32 v3, v3, 24
	v_add_nc_u32_e32 v3, v8, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e32 v5, vcc_lo, v5, v3, vcc_lo
	v_mov_b32_e32 v3, v7
	global_store_b64 v[4:5], v[6:7], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v38, v[0:3], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[2:3], v[6:7]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB3_124
; %bb.122:                              ; %.preheader.i.i.i75.i.i.i.preheader
                                        ;   in Loop: Header=BB3_7 Depth=2
	s_mov_b32 s0, 0
.LBB3_123:                              ; %.preheader.i.i.i75.i.i.i
                                        ;   Parent Loop BB3_3 Depth=1
                                        ;     Parent Loop BB3_7 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_sleep 1
	global_store_b64 v[4:5], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[6:7], v38, v[0:3], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[2:3]
	v_dual_mov_b32 v2, v6 :: v_dual_mov_b32 v3, v7
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB3_123
.LBB3_124:                              ; %Flow789
                                        ;   in Loop: Header=BB3_7 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	s_mov_b32 s1, 0
.LBB3_125:                              ; %Flow831
                                        ;   in Loop: Header=BB3_7 Depth=2
	v_dual_mov_b32 v74, v78 :: v_dual_mov_b32 v81, v79
	v_dual_mov_b32 v87, v80 :: v_dual_mov_b32 v88, v86
	v_mov_b32_e32 v83, v85
                                        ; implicit-def: $vgpr78
                                        ; implicit-def: $vgpr86
                                        ; implicit-def: $vgpr85
                                        ; implicit-def: $vgpr79
                                        ; implicit-def: $vgpr80
.LBB3_126:                              ; %Flow837
                                        ;   in Loop: Header=BB3_7 Depth=2
	s_or_saveexec_b32 s0, s71
	v_mov_b32_e32 v89, s1
	s_xor_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB3_136
; %bb.127:                              ;   in Loop: Header=BB3_7 Depth=2
	v_lshrrev_b32_e32 v0, 2, v77
	v_dual_mov_b32 v6, 32 :: v_dual_lshlrev_b32 v1, 4, v78
	v_lshrrev_b32_e32 v3, 2, v86
	v_add_nc_u32_e32 v83, 0xb0f8a, v85
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v0, v0, v77
	s_mov_b32 s1, 0
	v_mov_b32_e32 v4, 0
	v_lshlrev_b32_e32 v2, 1, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v1, v2, v1
	v_xor_b32_e32 v2, v3, v86
	v_xor3_b32 v81, v1, v0, v78
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v0, 1, v2
	v_lshlrev_b32_e32 v1, 4, v81
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v0, v0, v1
	v_xor3_b32 v74, v0, v2, v81
	v_add3_u32 v2, v85, v81, 0x587c5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v0, v74, v83
	v_cvt_f64_u32_e32 v[2:3], v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v0, 11, v0
	v_cvt_f64_u32_e32 v[0:1], v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[0:1], v[0:1], 32
	v_add_f64 v[0:1], v[0:1], v[2:3]
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[0:1], 0x3ca00000, v[0:1], 0x3ca00000
.LBB3_128:                              ; %.lr.ph.i.i59.i.i.i
                                        ;   Parent Loop BB3_3 Depth=1
                                        ;     Parent Loop BB3_7 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	v_sub_nc_u32_e32 v2, v6, v4
	s_mov_b32 s2, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v3, 31, v2
	v_add_nc_u32_e32 v2, v2, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v2, 1, v2
	v_add_nc_u32_e32 v5, v2, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v2, v5, v72
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 3, v[2:3]
	v_add_co_u32 v2, vcc_lo, s54, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s55, v3, vcc_lo
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(0)
	v_cmpx_neq_f64_e32 v[2:3], v[0:1]
	s_cbranch_execz .LBB3_134
; %bb.129:                              ;   in Loop: Header=BB3_128 Depth=3
	s_mov_b32 s3, exec_lo
	v_cmpx_nlt_f64_e32 v[2:3], v[0:1]
	s_cbranch_execz .LBB3_133
; %bb.130:                              ;   in Loop: Header=BB3_128 Depth=3
	s_mov_b32 s4, exec_lo
	v_cmpx_gt_f64_e32 v[2:3], v[0:1]
; %bb.131:                              ;   in Loop: Header=BB3_128 Depth=3
	v_mov_b32_e32 v6, v5
; %bb.132:                              ; %Flow832
                                        ;   in Loop: Header=BB3_128 Depth=3
	s_or_b32 exec_lo, exec_lo, s4
	v_mov_b32_e32 v5, v4
.LBB3_133:                              ; %Flow834
                                        ;   in Loop: Header=BB3_128 Depth=3
	s_or_b32 exec_lo, exec_lo, s3
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v4, v5 :: v_dual_mov_b32 v5, v6
.LBB3_134:                              ;   in Loop: Header=BB3_128 Depth=3
	s_or_b32 exec_lo, exec_lo, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, 1, v4
	v_mov_b32_e32 v6, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ge_i32_e32 vcc_lo, v2, v5
	s_or_b32 s1, vcc_lo, s1
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB3_128
; %bb.135:                              ; %_Z8samplingP12hiprandStatePdii.exit66.i.i.i
                                        ;   in Loop: Header=BB3_7 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	v_dual_mov_b32 v87, v78 :: v_dual_add_nc_u32 v2, v4, v72
	v_dual_mov_b32 v88, v79 :: v_dual_mov_b32 v77, v80
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[2:3], 3, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s54, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s55, v3, vcc_lo
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(0)
	v_cmp_lt_f64_e32 vcc_lo, v[2:3], v[0:1]
	v_cndmask_b32_e32 v5, -1, v5, vcc_lo
	v_cmp_nge_f64_e32 vcc_lo, v[2:3], v[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e32 v89, v4, v5, vcc_lo
.LBB3_136:                              ; %Flow838
                                        ;   in Loop: Header=BB3_7 Depth=2
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $vgpr78
                                        ; implicit-def: $vgpr86
                                        ; implicit-def: $vgpr85
                                        ; implicit-def: $vgpr80
                                        ; implicit-def: $vgpr79
.LBB3_137:                              ; %Flow844
                                        ;   in Loop: Header=BB3_7 Depth=2
	s_and_not1_saveexec_b32 s0, s70
	s_cbranch_execz .LBB3_147
; %bb.138:                              ;   in Loop: Header=BB3_7 Depth=2
	v_lshrrev_b32_e32 v0, 2, v77
	v_lshlrev_b32_e32 v1, 4, v78
	v_lshrrev_b32_e32 v3, 2, v86
	v_lshrrev_b32_e32 v4, 2, v80
	v_lshrrev_b32_e32 v5, 2, v79
	v_xor_b32_e32 v0, v0, v77
	v_add_nc_u32_e32 v83, 0x161f14, v85
	s_mov_b32 s1, 0
	v_xor_b32_e32 v4, v4, v80
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v7, 32 :: v_dual_lshlrev_b32 v2, 1, v0
	v_xor_b32_e32 v1, v2, v1
	v_xor_b32_e32 v2, v3, v86
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor3_b32 v88, v1, v0, v78
	v_lshlrev_b32_e32 v0, 1, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v1, 4, v88
	v_xor_b32_e32 v0, v0, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_xor3_b32 v87, v0, v2, v88
	v_add3_u32 v2, v85, v88, 0x587c5
	v_add3_u32 v0, v85, v87, 0xb0f8a
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_u32_e32 v[2:3], v2
	v_lshrrev_b32_e32 v0, 11, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f64_u32_e32 v[0:1], v0
	v_ldexp_f64 v[0:1], v[0:1], 32
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_f64 v[0:1], v[0:1], v[2:3]
	v_lshlrev_b32_e32 v2, 1, v4
	v_lshlrev_b32_e32 v3, 4, v87
	v_xor_b32_e32 v2, v2, v3
	v_xor_b32_e32 v3, v5, v79
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor3_b32 v81, v2, v4, v87
	v_lshlrev_b32_e32 v2, 1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v4, 4, v81
	v_xor_b32_e32 v2, v2, v4
	v_add3_u32 v4, v85, v81, 0x10974f
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor3_b32 v74, v2, v3, v81
	v_cvt_f64_u32_e32 v[4:5], v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v2, v74, v83
	v_lshrrev_b32_e32 v2, 11, v2
	v_fma_f64 v[0:1], 0x3ca00000, v[0:1], 0x3ca00000
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_u32_e32 v[2:3], v2
	v_mul_f64 v[0:1], 0x40666000, v[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[2:3], v[2:3], 32
	v_ceil_f64_e32 v[0:1], v[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[2:3], v[2:3], v[4:5]
	v_cvt_i32_f64_e32 v4, v[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[0:1], 0x3ca00000, v[2:3], 0x3ca00000
	v_lshl_add_u32 v5, v4, 5, v4
	v_mov_b32_e32 v4, 0
.LBB3_139:                              ; %.lr.ph.i.i47.i.i.i
                                        ;   Parent Loop BB3_3 Depth=1
                                        ;     Parent Loop BB3_7 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v2, v7, v4
	s_mov_b32 s2, exec_lo
	v_lshrrev_b32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v2, v2, v3
	v_ashrrev_i32_e32 v2, 1, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v6, v2, v4
	v_add_nc_u32_e32 v2, v6, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[2:3], 3, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s54, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s55, v3, vcc_lo
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(0)
	v_cmpx_neq_f64_e32 v[2:3], v[0:1]
	s_cbranch_execz .LBB3_145
; %bb.140:                              ;   in Loop: Header=BB3_139 Depth=3
	s_mov_b32 s3, exec_lo
	v_cmpx_nlt_f64_e32 v[2:3], v[0:1]
	s_cbranch_execz .LBB3_144
; %bb.141:                              ;   in Loop: Header=BB3_139 Depth=3
	s_mov_b32 s4, exec_lo
	v_cmpx_gt_f64_e32 v[2:3], v[0:1]
; %bb.142:                              ;   in Loop: Header=BB3_139 Depth=3
	v_mov_b32_e32 v7, v6
; %bb.143:                              ; %Flow839
                                        ;   in Loop: Header=BB3_139 Depth=3
	s_or_b32 exec_lo, exec_lo, s4
	v_mov_b32_e32 v6, v4
.LBB3_144:                              ; %Flow841
                                        ;   in Loop: Header=BB3_139 Depth=3
	s_or_b32 exec_lo, exec_lo, s3
	s_delay_alu instid0(VALU_DEP_1)
	v_mov_b32_e32 v4, v6
	v_mov_b32_e32 v6, v7
.LBB3_145:                              ;   in Loop: Header=BB3_139 Depth=3
	s_or_b32 exec_lo, exec_lo, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v7, v6 :: v_dual_add_nc_u32 v2, 1, v4
	v_cmp_ge_i32_e32 vcc_lo, v2, v6
	s_or_b32 s1, vcc_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB3_139
; %bb.146:                              ; %_Z8samplingP12hiprandStatePdii.exit54.i.i.i
                                        ;   in Loop: Header=BB3_7 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	v_dual_mov_b32 v77, v78 :: v_dual_add_nc_u32 v2, v4, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[2:3], 3, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s54, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s55, v3, vcc_lo
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(0)
	v_cmp_lt_f64_e32 vcc_lo, v[2:3], v[0:1]
	v_cndmask_b32_e32 v5, -1, v6, vcc_lo
	v_cmp_nge_f64_e32 vcc_lo, v[2:3], v[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e32 v89, v4, v5, vcc_lo
.LBB3_147:                              ; %Flow845
                                        ;   in Loop: Header=BB3_7 Depth=2
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $vgpr78
                                        ; implicit-def: $vgpr86
                                        ; implicit-def: $vgpr85
                                        ; implicit-def: $vgpr79
                                        ; implicit-def: $vgpr80
.LBB3_148:                              ; %Flow851
                                        ;   in Loop: Header=BB3_7 Depth=2
	s_and_not1_saveexec_b32 s0, s69
	s_cbranch_execz .LBB3_158
; %bb.149:                              ;   in Loop: Header=BB3_7 Depth=2
	v_lshrrev_b32_e32 v0, 2, v77
	v_dual_mov_b32 v6, 32 :: v_dual_lshlrev_b32 v1, 4, v78
	v_lshrrev_b32_e32 v3, 2, v86
	v_add_nc_u32_e32 v83, 0xb0f8a, v85
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v0, v0, v77
	s_mov_b32 s1, 0
	v_mov_b32_e32 v4, 0
	v_lshlrev_b32_e32 v2, 1, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v1, v2, v1
	v_xor_b32_e32 v2, v3, v86
	v_xor3_b32 v81, v1, v0, v78
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v0, 1, v2
	v_lshlrev_b32_e32 v1, 4, v81
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v0, v0, v1
	v_xor3_b32 v74, v0, v2, v81
	v_add3_u32 v2, v85, v81, 0x587c5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v0, v74, v83
	v_cvt_f64_u32_e32 v[2:3], v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v0, 11, v0
	v_cvt_f64_u32_e32 v[0:1], v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[0:1], v[0:1], 32
	v_add_f64 v[0:1], v[0:1], v[2:3]
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[0:1], 0x3ca00000, v[0:1], 0x3ca00000
.LBB3_150:                              ; %.lr.ph.i.i.i.i.i
                                        ;   Parent Loop BB3_3 Depth=1
                                        ;     Parent Loop BB3_7 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	v_sub_nc_u32_e32 v2, v6, v4
	s_mov_b32 s2, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v3, 31, v2
	v_add_nc_u32_e32 v2, v2, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v2, 1, v2
	v_add_nc_u32_e32 v5, v2, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v2, v5, v73
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 3, v[2:3]
	v_add_co_u32 v2, vcc_lo, s54, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s55, v3, vcc_lo
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(0)
	v_cmpx_neq_f64_e32 v[2:3], v[0:1]
	s_cbranch_execz .LBB3_156
; %bb.151:                              ;   in Loop: Header=BB3_150 Depth=3
	s_mov_b32 s3, exec_lo
	v_cmpx_nlt_f64_e32 v[2:3], v[0:1]
	s_cbranch_execz .LBB3_155
; %bb.152:                              ;   in Loop: Header=BB3_150 Depth=3
	s_mov_b32 s4, exec_lo
	v_cmpx_gt_f64_e32 v[2:3], v[0:1]
; %bb.153:                              ;   in Loop: Header=BB3_150 Depth=3
	v_mov_b32_e32 v6, v5
; %bb.154:                              ; %Flow846
                                        ;   in Loop: Header=BB3_150 Depth=3
	s_or_b32 exec_lo, exec_lo, s4
	v_mov_b32_e32 v5, v4
.LBB3_155:                              ; %Flow848
                                        ;   in Loop: Header=BB3_150 Depth=3
	s_or_b32 exec_lo, exec_lo, s3
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v4, v5 :: v_dual_mov_b32 v5, v6
.LBB3_156:                              ;   in Loop: Header=BB3_150 Depth=3
	s_or_b32 exec_lo, exec_lo, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, 1, v4
	v_mov_b32_e32 v6, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ge_i32_e32 vcc_lo, v2, v5
	s_or_b32 s1, vcc_lo, s1
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB3_150
; %bb.157:                              ; %_Z8samplingP12hiprandStatePdii.exit.i.i.i
                                        ;   in Loop: Header=BB3_7 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	v_dual_mov_b32 v87, v78 :: v_dual_add_nc_u32 v2, v4, v73
	v_dual_mov_b32 v77, v80 :: v_dual_mov_b32 v88, v79
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[2:3], 3, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s54, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s55, v3, vcc_lo
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(0)
	v_cmp_lt_f64_e32 vcc_lo, v[2:3], v[0:1]
	v_cndmask_b32_e32 v5, -1, v5, vcc_lo
	v_cmp_nge_f64_e32 vcc_lo, v[2:3], v[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e32 v89, v4, v5, vcc_lo
.LBB3_158:                              ; %Flow852
                                        ;   in Loop: Header=BB3_7 Depth=2
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_mov_b32 s69, exec_lo
	v_cmpx_lt_i32_e32 0, v89
	s_cbranch_execz .LBB3_224
; %bb.159:                              ; %.preheader27.i
                                        ;   in Loop: Header=BB3_7 Depth=2
	s_load_b64 s[20:21], s[34:35], 0x50
	s_mov_b32 s70, 0
	s_mov_b32 s71, 0
.LBB3_160:                              ;   Parent Loop BB3_3 Depth=1
                                        ;     Parent Loop BB3_7 Depth=2
                                        ; =>    This Loop Header: Depth=3
                                        ;         Child Loop BB3_161 Depth 4
                                        ;         Child Loop BB3_171 Depth 4
                                        ;         Child Loop BB3_179 Depth 4
                                        ;         Child Loop BB3_185 Depth 4
                                        ;         Child Loop BB3_194 Depth 4
                                        ;         Child Loop BB3_198 Depth 4
                                        ;         Child Loop BB3_206 Depth 4
                                        ;         Child Loop BB3_212 Depth 4
                                        ;         Child Loop BB3_221 Depth 4
	v_lshrrev_b32_e32 v0, 2, v77
	v_dual_mov_b32 v78, v74 :: v_dual_mov_b32 v79, v81
	v_lshrrev_b32_e32 v3, 2, v88
	s_mov_b32 s0, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_xor_b32_e32 v0, v0, v77
	v_dual_mov_b32 v80, v87 :: v_dual_lshlrev_b32 v1, 4, v78
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v77, 0 :: v_dual_lshlrev_b32 v2, 1, v0
	v_xor_b32_e32 v1, v2, v1
	v_xor_b32_e32 v2, v3, v88
	v_mov_b32_e32 v3, v83
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_xor3_b32 v81, v1, v0, v78
	v_lshlrev_b32_e32 v0, 1, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v83, 0xb0f8a, v3
	v_lshlrev_b32_e32 v1, 4, v81
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v0, v0, v1
	v_xor3_b32 v74, v0, v2, v81
	v_add3_u32 v2, v3, v81, 0x587c5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v0, v74, v83
	v_cvt_f64_u32_e32 v[2:3], v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v0, 11, v0
	v_cvt_f64_u32_e32 v[0:1], v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[0:1], v[0:1], 32
	v_add_f64 v[0:1], v[0:1], v[2:3]
	v_mov_b32_e32 v2, 0xbb7
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[43:44], 0x3ca00000, v[0:1], 0x3ca00000
.LBB3_161:                              ; %.lr.ph.i.i.i.i.i.i
                                        ;   Parent Loop BB3_3 Depth=1
                                        ;     Parent Loop BB3_7 Depth=2
                                        ;       Parent Loop BB3_160 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v0, v2, v77
	s_mov_b32 s1, exec_lo
	v_lshrrev_b32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v0, v0, v1
	v_ashrrev_i32_e32 v0, 1, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v85, v0, v77
	v_add_nc_u32_e32 v0, v85, v84
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[0:1], 3, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s52, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s53, v1, vcc_lo
	global_load_b64 v[0:1], v[0:1], off
	s_waitcnt vmcnt(0)
	v_cmpx_neq_f64_e32 v[0:1], v[43:44]
	s_cbranch_execz .LBB3_167
; %bb.162:                              ;   in Loop: Header=BB3_161 Depth=4
	s_mov_b32 s2, exec_lo
	v_cmpx_nlt_f64_e32 v[0:1], v[43:44]
	s_cbranch_execz .LBB3_166
; %bb.163:                              ;   in Loop: Header=BB3_161 Depth=4
	s_mov_b32 s3, exec_lo
	v_cmpx_gt_f64_e32 v[0:1], v[43:44]
; %bb.164:                              ;   in Loop: Header=BB3_161 Depth=4
	v_mov_b32_e32 v2, v85
; %bb.165:                              ; %Flow764
                                        ;   in Loop: Header=BB3_161 Depth=4
	s_or_b32 exec_lo, exec_lo, s3
	v_mov_b32_e32 v85, v77
.LBB3_166:                              ; %Flow766
                                        ;   in Loop: Header=BB3_161 Depth=4
	s_or_b32 exec_lo, exec_lo, s2
	s_delay_alu instid0(VALU_DEP_1)
	v_mov_b32_e32 v77, v85
	v_mov_b32_e32 v85, v2
.LBB3_167:                              ;   in Loop: Header=BB3_161 Depth=4
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v0, 1, v77
	v_mov_b32_e32 v2, v85
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ge_i32_e32 vcc_lo, v0, v85
	s_or_b32 s0, vcc_lo, s0
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB3_161
; %bb.168:                              ; %_Z11get_hittimeddiPdP12hiprandState.exit.i
                                        ;   in Loop: Header=BB3_160 Depth=3
	s_or_b32 exec_lo, exec_lo, s0
	v_dual_mov_b32 v37, v76 :: v_dual_add_nc_u32 v0, v77, v84
	v_mov_b32_e32 v4, 0
	v_mov_b32_e32 v5, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[0:1], 3, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s52, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s53, v1, vcc_lo
	global_load_b64 v[49:50], v[0:1], off
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v37
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v37
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB3_174
; %bb.169:                              ;   in Loop: Header=BB3_160 Depth=3
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[2:3], v38, s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[0:1], v38, s[20:21] offset:40
	global_load_b64 v[4:5], v38, s[20:21]
	s_mov_b32 s2, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v3
	v_and_b32_e32 v0, v0, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v1, v1, 24
	v_mul_hi_u32 v6, v0, 24
	v_mul_lo_u32 v0, v0, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v1, v6, v1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v0, vcc_lo, v4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, v5, v1, vcc_lo
	global_load_b64 v[0:1], v[0:1], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[4:5], v38, v[0:3], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[4:5], v[2:3]
	s_cbranch_execz .LBB3_173
; %bb.170:                              ; %.preheader3.i.i.i.i.preheader
                                        ;   in Loop: Header=BB3_160 Depth=3
	s_mov_b32 s3, 0
.LBB3_171:                              ; %.preheader3.i.i.i.i
                                        ;   Parent Loop BB3_3 Depth=1
                                        ;     Parent Loop BB3_7 Depth=2
                                        ;       Parent Loop BB3_160 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[0:1], v38, s[20:21] offset:40
	global_load_b64 v[6:7], v38, s[20:21]
	v_dual_mov_b32 v2, v4 :: v_dual_mov_b32 v3, v5
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v0, v0, v2
	v_and_b32_e32 v1, v1, v3
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[4:5], null, v0, 24, v[6:7]
	v_mov_b32_e32 v0, v5
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v1, 24, v[0:1]
	global_load_b64 v[0:1], v[4:5], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[4:5], v38, v[0:3], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[4:5], v[2:3]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB3_171
; %bb.172:                              ; %Flow761
                                        ;   in Loop: Header=BB3_160 Depth=3
	s_or_b32 exec_lo, exec_lo, s3
.LBB3_173:                              ; %Flow763
                                        ;   in Loop: Header=BB3_160 Depth=3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB3_174:                              ; %.loopexit4.i.i.i.i
                                        ;   in Loop: Header=BB3_160 Depth=3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[6:7], v38, s[20:21] offset:40
	global_load_b128 v[0:3], v38, s[20:21]
	v_readfirstlane_b32 s2, v4
	v_readfirstlane_b32 s3, v5
	s_mov_b32 s8, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v6
	v_readfirstlane_b32 s5, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB3_176
; %bb.175:                              ;   in Loop: Header=BB3_160 Depth=3
	s_add_i32 s10, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v4, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v5, vcc_lo, s10, v1, vcc_lo
	v_dual_mov_b32 v39, s8 :: v_dual_mov_b32 v40, v38
	global_store_b128 v[4:5], v[39:42], off offset:8
.LBB3_176:                              ;   in Loop: Header=BB3_160 Depth=3
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[4:5], 6, v[37:38]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_mov_b32 s29, s28
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v2, v4
	s_mov_b32 s30, s28
	s_mov_b32 s31, s28
	v_add_co_ci_u32_e32 v7, vcc_lo, v3, v5, vcc_lo
	v_dual_mov_b32 v2, s28 :: v_dual_mov_b32 v3, s29
	v_dual_mov_b32 v4, s30 :: v_dual_mov_b32 v5, s31
	v_mov_b32_e32 v37, v38
	v_mov_b32_e32 v39, v38
	s_clause 0x3
	global_store_b128 v[6:7], v[2:5], off offset:16
	global_store_b128 v[6:7], v[2:5], off offset:32
	global_store_b128 v[6:7], v[2:5], off offset:48
	global_store_b128 v[6:7], v[36:39], off
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB3_184
; %bb.177:                              ;   in Loop: Header=BB3_160 Depth=3
	s_clause 0x1
	global_load_b64 v[12:13], v38, s[20:21] offset:32 glc
	global_load_b64 v[2:3], v38, s[20:21] offset:40
	v_dual_mov_b32 v10, s2 :: v_dual_mov_b32 v11, s3
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v2
	v_readfirstlane_b32 s9, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v8, vcc_lo, v0, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, s9, v1, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[8:9], v[12:13], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v38, v[10:13], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[12:13]
	s_cbranch_execz .LBB3_180
; %bb.178:                              ; %.preheader1.i.i.i.i.preheader
                                        ;   in Loop: Header=BB3_160 Depth=3
	s_mov_b32 s8, 0
.LBB3_179:                              ; %.preheader1.i.i.i.i
                                        ;   Parent Loop BB3_3 Depth=1
                                        ;     Parent Loop BB3_7 Depth=2
                                        ;       Parent Loop BB3_160 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
	s_sleep 1
	global_store_b64 v[8:9], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v38, v[2:5], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB3_179
.LBB3_180:                              ; %Flow759
                                        ;   in Loop: Header=BB3_160 Depth=3
	s_or_b32 exec_lo, exec_lo, s5
	global_load_b64 v[2:3], v38, s[20:21] offset:16
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v4, s8, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB3_182
; %bb.181:                              ;   in Loop: Header=BB3_160 Depth=3
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v37, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[37:38], off offset:8
.LBB3_182:                              ;   in Loop: Header=BB3_160 Depth=3
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB3_184
; %bb.183:                              ;   in Loop: Header=BB3_160 Depth=3
	global_load_b32 v37, v[2:3], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v37
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[37:38], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB3_184:                              ; %Flow760
                                        ;   in Loop: Header=BB3_160 Depth=3
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB3_185:                              ;   Parent Loop BB3_3 Depth=1
                                        ;     Parent Loop BB3_7 Depth=2
                                        ;       Parent Loop BB3_160 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB3_187
; %bb.186:                              ;   in Loop: Header=BB3_185 Depth=4
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB3_187:                              ;   in Loop: Header=BB3_185 Depth=4
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB3_189
; %bb.188:                              ;   in Loop: Header=BB3_185 Depth=4
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB3_190
.LBB3_189:                              ;   in Loop: Header=BB3_185 Depth=4
	s_mov_b32 s1, -1
.LBB3_190:                              ; %Flow754
                                        ;   in Loop: Header=BB3_185 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB3_185
; %bb.191:                              ;   in Loop: Header=BB3_160 Depth=3
	global_load_b64 v[0:1], v[6:7], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB3_195
; %bb.192:                              ;   in Loop: Header=BB3_160 Depth=3
	s_clause 0x2
	global_load_b64 v[4:5], v38, s[20:21] offset:40
	global_load_b64 v[8:9], v38, s[20:21] offset:24 glc
	global_load_b64 v[6:7], v38, s[20:21]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v10, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v11, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v10, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v11, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v11 :: v_dual_cndmask_b32 v2, v2, v10
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v4, v2, v4
	v_mul_hi_u32 v10, v4, 24
	v_mul_lo_u32 v4, v4, 24
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v8
	v_mul_lo_u32 v5, v5, 24
	v_add_nc_u32_e32 v5, v10, v5
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v9
	global_store_b64 v[6:7], v[8:9], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v38, v[2:5], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[8:9]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB3_195
; %bb.193:                              ; %.preheader.i.i.i.i.preheader
                                        ;   in Loop: Header=BB3_160 Depth=3
	s_mov_b32 s0, 0
.LBB3_194:                              ; %.preheader.i.i.i.i
                                        ;   Parent Loop BB3_3 Depth=1
                                        ;     Parent Loop BB3_7 Depth=2
                                        ;       Parent Loop BB3_160 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[8:9], v38, v[2:5], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[8:9], v[4:5]
	v_dual_mov_b32 v4, v8 :: v_dual_mov_b32 v5, v9
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB3_194
.LBB3_195:                              ; %__ockl_printf_begin.exit.i
                                        ;   in Loop: Header=BB3_160 Depth=3
	s_or_b32 exec_lo, exec_lo, s1
	s_add_u32 s8, s18, 0x88
	s_addc_u32 s9, s19, 0
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str@rel32@lo+4
	s_addc_u32 s1, s1, .str@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	v_dual_mov_b32 v2, s0 :: v_dual_mov_b32 v3, s1
	v_dual_mov_b32 v4, s48 :: v_dual_mov_b32 v5, 0
	v_mov_b32_e32 v6, 0
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __ockl_printf_append_string_n@rel32@lo+4
	s_addc_u32 s3, s3, __ockl_printf_append_string_n@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_swappc_b64 s[30:31], s[2:3]
	v_dual_mov_b32 v37, v76 :: v_dual_mov_b32 v2, 0
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v37
	v_mov_b32_e32 v3, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v37
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB3_201
; %bb.196:                              ;   in Loop: Header=BB3_160 Depth=3
	global_load_b64 v[4:5], v38, s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[2:3], v38, s[20:21] offset:40
	global_load_b64 v[6:7], v38, s[20:21]
	s_mov_b32 s2, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v3, v3, v5
	v_and_b32_e32 v2, v2, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v3, v3, 24
	v_mul_hi_u32 v8, v2, 24
	v_mul_lo_u32 v2, v2, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v8, v3
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v6, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, v7, v3, vcc_lo
	global_load_b64 v[2:3], v[2:3], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[2:3], v38, v[2:5], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[2:3], v[4:5]
	s_cbranch_execz .LBB3_200
; %bb.197:                              ; %.preheader3.i.i.i26.i.preheader
                                        ;   in Loop: Header=BB3_160 Depth=3
	s_mov_b32 s3, 0
.LBB3_198:                              ; %.preheader3.i.i.i26.i
                                        ;   Parent Loop BB3_3 Depth=1
                                        ;     Parent Loop BB3_7 Depth=2
                                        ;       Parent Loop BB3_160 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[6:7], v38, s[20:21] offset:40
	global_load_b64 v[8:9], v38, s[20:21]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v6, v6, v4
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[2:3], null, v6, 24, v[8:9]
	v_and_b32_e32 v8, v7, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[6:7], null, v8, 24, v[3:4]
	v_mov_b32_e32 v3, v6
	global_load_b64 v[2:3], v[2:3], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[2:3], v38, v[2:5], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB3_198
; %bb.199:                              ; %Flow747
                                        ;   in Loop: Header=BB3_160 Depth=3
	s_or_b32 exec_lo, exec_lo, s3
.LBB3_200:                              ; %Flow749
                                        ;   in Loop: Header=BB3_160 Depth=3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB3_201:                              ; %.loopexit4.i.i.i21.i
                                        ;   in Loop: Header=BB3_160 Depth=3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_clause 0x1
	global_load_b64 v[8:9], v38, s[20:21] offset:40
	global_load_b128 v[4:7], v38, s[20:21]
	v_readfirstlane_b32 s4, v2
	v_readfirstlane_b32 s5, v3
	s_mov_b32 s1, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s2, v8
	v_readfirstlane_b32 s3, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[2:3], s[4:5], s[2:3]
	s_mul_i32 s6, s3, 24
	s_mul_hi_u32 s7, s2, 24
	s_mul_i32 s8, s2, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB3_203
; %bb.202:                              ;   in Loop: Header=BB3_160 Depth=3
	s_add_i32 s10, s7, s6
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v4, s8
	v_add_co_ci_u32_e32 v3, vcc_lo, s10, v5, vcc_lo
	v_dual_mov_b32 v39, s1 :: v_dual_mov_b32 v40, v38
	global_store_b128 v[2:3], v[39:42], off offset:8
.LBB3_203:                              ;   in Loop: Header=BB3_160 Depth=3
	s_or_b32 exec_lo, exec_lo, s9
	v_cmp_lt_f64_e32 vcc_lo, v[49:50], v[43:44]
	v_cmp_nge_f64_e64 s1, v[49:50], v[43:44]
	s_lshl_b64 s[2:3], s[2:3], 12
	v_lshlrev_b64 v[2:3], 6, v[37:38]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v6, s2, v6, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e64 v7, s2, s3, v7, s2
	s_mov_b32 s29, s28
	v_add_co_u32 v10, s2, v6, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v11, s2, v7, v3, s2
	s_mov_b32 s30, s28
	s_mov_b32 s31, s28
	v_dual_mov_b32 v6, s28 :: v_dual_mov_b32 v7, s29
	v_dual_mov_b32 v8, s30 :: v_dual_mov_b32 v9, s31
	v_and_or_b32 v0, 0xffffff1d, v0, 34
	s_clause 0x2
	global_store_b128 v[10:11], v[6:9], off offset:16
	global_store_b128 v[10:11], v[6:9], off offset:32
	global_store_b128 v[10:11], v[6:9], off offset:48
	v_cndmask_b32_e32 v2, -1, v85, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v2, v77, v2, s1
	v_cvt_f64_i32_e32 v[2:3], v2
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[2:3], v[64:65], v[2:3]
	global_store_b128 v[10:11], v[0:3], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB3_211
; %bb.204:                              ;   in Loop: Header=BB3_160 Depth=3
	s_clause 0x1
	global_load_b64 v[10:11], v38, s[20:21] offset:32 glc
	global_load_b64 v[0:1], v38, s[20:21] offset:40
	v_dual_mov_b32 v8, s4 :: v_dual_mov_b32 v9, s5
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s2, v0
	v_readfirstlane_b32 s3, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[2:3], s[2:3], s[4:5]
	s_mul_i32 s3, s3, 24
	s_mul_hi_u32 s9, s2, 24
	s_mul_i32 s2, s2, 24
	s_add_i32 s9, s9, s3
	v_add_co_u32 v0, vcc_lo, v4, s2
	v_add_co_ci_u32_e32 v1, vcc_lo, s9, v5, vcc_lo
	s_mov_b32 s2, exec_lo
	global_store_b64 v[0:1], v[10:11], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[8:9], v38, v[8:11], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[8:9], v[10:11]
	s_cbranch_execz .LBB3_207
; %bb.205:                              ; %.preheader1.i.i.i24.i.preheader
                                        ;   in Loop: Header=BB3_160 Depth=3
	s_mov_b32 s3, 0
.LBB3_206:                              ; %.preheader1.i.i.i24.i
                                        ;   Parent Loop BB3_3 Depth=1
                                        ;     Parent Loop BB3_7 Depth=2
                                        ;       Parent Loop BB3_160 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	v_dual_mov_b32 v6, s4 :: v_dual_mov_b32 v7, s5
	s_sleep 1
	global_store_b64 v[0:1], v[8:9], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[6:7], v38, v[6:9], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[8:9]
	v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB3_206
.LBB3_207:                              ; %Flow745
                                        ;   in Loop: Header=BB3_160 Depth=3
	s_or_b32 exec_lo, exec_lo, s2
	global_load_b64 v[0:1], v38, s[20:21] offset:16
	s_mov_b32 s3, exec_lo
	s_mov_b32 s2, exec_lo
	v_mbcnt_lo_u32_b32 v6, s3, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v6
	s_cbranch_execz .LBB3_209
; %bb.208:                              ;   in Loop: Header=BB3_160 Depth=3
	s_bcnt1_i32_b32 s3, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v37, s3
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[0:1], v[37:38], off offset:8
.LBB3_209:                              ;   in Loop: Header=BB3_160 Depth=3
	s_or_b32 exec_lo, exec_lo, s2
	s_waitcnt vmcnt(0)
	global_load_b64 v[6:7], v[0:1], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[6:7]
	s_cbranch_vccnz .LBB3_211
; %bb.210:                              ;   in Loop: Header=BB3_160 Depth=3
	global_load_b32 v37, v[0:1], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s2, v37
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[6:7], v[37:38], off
	s_and_b32 m0, s2, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB3_211:                              ; %Flow746
                                        ;   in Loop: Header=BB3_160 Depth=3
	s_or_b32 exec_lo, exec_lo, s1
	s_add_i32 s7, s7, s6
	v_add_co_u32 v0, vcc_lo, v4, s8
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB3_212:                              ;   Parent Loop BB3_3 Depth=1
                                        ;     Parent Loop BB3_7 Depth=2
                                        ;       Parent Loop BB3_160 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	v_mov_b32_e32 v4, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB3_214
; %bb.213:                              ;   in Loop: Header=BB3_212 Depth=4
	global_load_b32 v4, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v4, 1, v4
.LBB3_214:                              ;   in Loop: Header=BB3_212 Depth=4
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v4
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB3_216
; %bb.215:                              ;   in Loop: Header=BB3_212 Depth=4
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB3_217
.LBB3_216:                              ;   in Loop: Header=BB3_212 Depth=4
	s_mov_b32 s1, -1
.LBB3_217:                              ; %Flow740
                                        ;   in Loop: Header=BB3_212 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB3_212
; %bb.218:                              ;   in Loop: Header=BB3_160 Depth=3
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB3_222
; %bb.219:                              ;   in Loop: Header=BB3_160 Depth=3
	s_clause 0x2
	global_load_b64 v[0:1], v38, s[20:21] offset:40
	global_load_b64 v[8:9], v38, s[20:21] offset:24 glc
	global_load_b64 v[6:7], v38, s[20:21]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v10, vcc_lo, v0, 1
	v_add_co_ci_u32_e32 v11, vcc_lo, 0, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, v10, s4
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v11, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	v_dual_cndmask_b32 v5, v5, v11 :: v_dual_cndmask_b32 v4, v4, v10
	v_and_b32_e32 v1, v5, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v0, v4, v0
	v_mul_hi_u32 v10, v0, 24
	v_mul_lo_u32 v0, v0, 24
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_u32 v0, vcc_lo, v6, v0
	v_mov_b32_e32 v6, v8
	v_mul_lo_u32 v1, v1, 24
	v_add_nc_u32_e32 v1, v10, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e32 v1, vcc_lo, v7, v1, vcc_lo
	v_mov_b32_e32 v7, v9
	global_store_b64 v[0:1], v[8:9], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[6:7], v38, v[4:7], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[6:7], v[8:9]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB3_222
; %bb.220:                              ; %.preheader.i.i.i23.i.preheader
                                        ;   in Loop: Header=BB3_160 Depth=3
	s_mov_b32 s0, 0
.LBB3_221:                              ; %.preheader.i.i.i23.i
                                        ;   Parent Loop BB3_3 Depth=1
                                        ;     Parent Loop BB3_7 Depth=2
                                        ;       Parent Loop BB3_160 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_sleep 1
	global_store_b64 v[0:1], v[6:7], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[8:9], v38, v[4:7], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[8:9], v[6:7]
	v_dual_mov_b32 v6, v8 :: v_dual_mov_b32 v7, v9
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB3_221
.LBB3_222:                              ; %__ockl_printf_append_args.exit.i
                                        ;   in Loop: Header=BB3_160 Depth=3
	s_or_b32 exec_lo, exec_lo, s1
	global_load_b32 v4, v[60:61], off
	s_add_i32 s71, s71, 1
	v_dual_mov_b32 v77, v80 :: v_dual_mov_b32 v88, v79
	v_cmp_eq_u32_e32 vcc_lo, s71, v89
	v_mov_b32_e32 v87, v78
	s_or_b32 s70, vcc_lo, s70
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v0, v4, v75
	v_add_nc_u32_e32 v4, 1, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[0:1], 3, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v0, s0, s58, v0
	v_add_co_ci_u32_e64 v1, s0, s59, v1, s0
	global_store_b64 v[0:1], v[2:3], off
	global_store_b32 v[60:61], v4, off
	s_and_not1_b32 exec_lo, exec_lo, s70
	s_cbranch_execnz .LBB3_160
; %bb.223:                              ; %Flow769
                                        ;   in Loop: Header=BB3_7 Depth=2
	s_or_b32 exec_lo, exec_lo, s70
	v_dual_mov_b32 v87, v78 :: v_dual_mov_b32 v88, v79
	v_mov_b32_e32 v77, v80
.LBB3_224:                              ; %Flow770
                                        ;   in Loop: Header=BB3_7 Depth=2
	s_or_b32 exec_lo, exec_lo, s69
	s_add_i32 s68, s68, 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_dual_mov_b32 v85, v83 :: v_dual_mov_b32 v86, v88
	v_cvt_f64_i32_e32 v[0:1], s68
	v_dual_mov_b32 v80, v87 :: v_dual_mov_b32 v79, v81
	v_mov_b32_e32 v78, v74
	v_cmp_ngt_f64_e32 vcc_lo, v[68:69], v[0:1]
	s_or_b32 s22, vcc_lo, s22
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s22
	s_cbranch_execnz .LBB3_7
; %bb.225:                              ; %Flow854
                                        ;   in Loop: Header=BB3_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s22
.LBB3_226:                              ; %Flow857
                                        ;   in Loop: Header=BB3_3 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s47
	v_cmp_gt_f64_e32 vcc_lo, s[56:57], v[70:71]
	s_mov_b32 s0, 0x968915a9
	s_mov_b32 s2, 0x4222de17
	s_mov_b32 s1, 0x3fba6564
	s_mov_b32 s3, 0x3fbdee67
	s_mov_b32 s22, s56
	s_mov_b32 s86, s78
	s_mov_b32 s44, s80
	v_cmp_eq_f64_e64 s20, 0, v[66:67]
	v_mov_b32_e32 v45, 1
	v_mov_b32_e32 v51, 1
	v_cndmask_b32_e64 v0, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[0:1], v[70:71], v0
	v_add_f64 v[2:3], v[0:1], 1.0
	v_add_f64 v[8:9], v[0:1], -1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[4:5], v[2:3]
	v_add_f64 v[10:11], v[2:3], -1.0
	v_add_f64 v[0:1], v[0:1], -v[10:11]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[6:7], -v[2:3], v[4:5], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[4:5], v[6:7], v[4:5], v[4:5]
	v_fma_f64 v[6:7], -v[2:3], v[4:5], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[4:5], v[6:7], v[4:5], v[4:5]
	v_mul_f64 v[6:7], v[8:9], v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[12:13], v[2:3], v[6:7]
	v_fma_f64 v[2:3], v[6:7], v[2:3], -v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[0:1], v[6:7], v[0:1], v[2:3]
	v_add_f64 v[2:3], v[12:13], v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[10:11], v[8:9], -v[2:3]
	v_add_f64 v[12:13], v[2:3], -v[12:13]
	v_add_f64 v[8:9], v[8:9], -v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[0:1], v[12:13], -v[0:1]
	v_add_f64 v[2:3], v[8:9], -v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[0:1], v[0:1], v[2:3]
	v_add_f64 v[0:1], v[10:11], v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[0:1], v[4:5], v[0:1]
	v_add_f64 v[2:3], v[6:7], v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[4:5], v[2:3], -v[6:7]
	v_mul_f64 v[6:7], v[2:3], v[2:3]
	v_add_f64 v[0:1], v[0:1], -v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[4:5], v[2:3], v[2:3], -v[6:7]
	v_add_f64 v[8:9], v[0:1], v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[4:5], v[2:3], v[8:9], v[4:5]
	v_add_f64 v[8:9], v[6:7], v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	v_fma_f64 v[10:11], v[8:9], s[2:3], s[0:1]
	s_mov_b32 s0, 0x3abe935a
	s_mov_b32 s1, 0x3fbe25e4
	v_add_f64 v[6:7], v[8:9], -v[6:7]
	v_mul_f64 v[16:17], v[2:3], v[8:9]
	v_fma_f64 v[10:11], v[8:9], v[10:11], s[0:1]
	s_mov_b32 s0, 0x47e6c9c2
	s_mov_b32 s1, 0x3fc110ef
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[4:5], v[4:5], -v[6:7]
	v_fma_f64 v[10:11], v[8:9], v[10:11], s[0:1]
	s_mov_b32 s0, 0xcfa74449
	s_mov_b32 s1, 0x3fc3b13b
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[10:11], v[8:9], v[10:11], s[0:1]
	s_mov_b32 s0, 0x71bf3c30
	s_mov_b32 s1, 0x3fc745d1
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[10:11], v[8:9], v[10:11], s[0:1]
	s_mov_b32 s0, 0x1c7792ce
	s_mov_b32 s1, 0x3fcc71c7
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[10:11], v[8:9], v[10:11], s[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[10:11], v[8:9], v[10:11], s[74:75]
	v_fma_f64 v[10:11], v[8:9], v[10:11], s[76:77]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[12:13], v[8:9], v[10:11]
	v_fma_f64 v[6:7], v[8:9], v[10:11], -v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[6:7], v[4:5], v[10:11], v[6:7]
	v_add_f64 v[10:11], v[12:13], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[14:15], v[10:11], s[56:57]
	v_add_f64 v[12:13], v[10:11], -v[12:13]
	v_add_f64 v[18:19], v[14:15], s[22:23]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[6:7], v[6:7], -v[12:13]
	v_fma_f64 v[12:13], v[8:9], v[2:3], -v[16:17]
	v_add_f64 v[10:11], v[10:11], -v[18:19]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[6:7], v[6:7], s[82:83]
	v_fma_f64 v[8:9], v[8:9], v[0:1], v[12:13]
	v_ldexp_f64 v[0:1], v[0:1], 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[6:7], v[6:7], v[10:11]
	v_fma_f64 v[4:5], v[4:5], v[2:3], v[8:9]
	v_ldexp_f64 v[2:3], v[2:3], 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[8:9], v[14:15], v[6:7]
	v_add_f64 v[10:11], v[16:17], v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[12:13], v[14:15], -v[8:9]
	v_mul_f64 v[14:15], v[10:11], v[8:9]
	v_add_f64 v[16:17], v[10:11], -v[16:17]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[6:7], v[6:7], v[12:13]
	v_fma_f64 v[12:13], v[10:11], v[8:9], -v[14:15]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[4:5], v[4:5], -v[16:17]
	v_fma_f64 v[6:7], v[10:11], v[6:7], v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[4:5], v[4:5], v[8:9], v[6:7]
	v_subrev_co_ci_u32_e32 v8, vcc_lo, 0, v82, vcc_lo
	v_cvt_f64_i32_e32 v[8:9], v8
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[6:7], v[14:15], v[4:5]
	v_add_f64 v[10:11], v[2:3], v[6:7]
	v_add_f64 v[12:13], v[6:7], -v[14:15]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[14:15], v[8:9], s[78:79]
	v_add_f64 v[2:3], v[10:11], -v[2:3]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[4:5], v[4:5], -v[12:13]
	v_fma_f64 v[12:13], v[8:9], s[78:79], -v[14:15]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[2:3], v[6:7], -v[2:3]
	v_add_f64 v[0:1], v[0:1], v[4:5]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[4:5], v[8:9], s[80:81], v[12:13]
	v_add_f64 v[0:1], v[0:1], v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[2:3], v[14:15], v[4:5]
	v_add_f64 v[6:7], v[10:11], v[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[14:15], v[2:3], -v[14:15]
	v_add_f64 v[8:9], v[2:3], v[6:7]
	v_add_f64 v[10:11], v[6:7], -v[10:11]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[4:5], v[4:5], -v[14:15]
	v_add_f64 v[12:13], v[8:9], -v[2:3]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[0:1], v[0:1], -v[10:11]
	v_add_f64 v[16:17], v[8:9], -v[12:13]
	v_add_f64 v[6:7], v[6:7], -v[12:13]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[10:11], v[4:5], v[0:1]
	v_add_f64 v[2:3], v[2:3], -v[16:17]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[2:3], v[6:7], v[2:3]
	v_add_f64 v[6:7], v[10:11], -v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[2:3], v[10:11], v[2:3]
	v_add_f64 v[10:11], v[10:11], -v[6:7]
	v_add_f64 v[0:1], v[0:1], -v[6:7]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[12:13], v[8:9], v[2:3]
	v_add_f64 v[4:5], v[4:5], -v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[6:7], v[12:13], -v[8:9]
	v_add_f64 v[0:1], v[0:1], v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[2:3], v[2:3], -v[6:7]
	v_add_f64 v[0:1], v[0:1], v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[2:3], v[12:13], v[0:1]
	v_add_f64 v[4:5], v[2:3], -v[12:13]
	v_mul_f64 v[6:7], 0x40080000, v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[0:1], v[0:1], -v[4:5]
	v_fma_f64 v[2:3], 0x40080000, v[2:3], -v[6:7]
	v_cmp_class_f64_e64 vcc_lo, v[6:7], 0x204
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[0:1], 0x40080000, v[0:1], v[2:3]
	v_add_f64 v[2:3], v[6:7], v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v5, v3, v7 :: v_dual_cndmask_b32 v4, v2, v6
	v_add_f64 v[2:3], v[2:3], -v[6:7]
	v_mul_f64 v[8:9], v[4:5], s[84:85]
	v_cmp_nlt_f64_e64 s0, 0x40900000, v[4:5]
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[4:5]|
	v_cmp_ngt_f64_e64 s1, 0xc090cc00, v[4:5]
	v_add_f64 v[0:1], v[0:1], -v[2:3]
	v_rndne_f64_e32 v[8:9], v[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_dual_cndmask_b32 v1, 0, v1 :: v_dual_cndmask_b32 v0, 0, v0
	s_and_b32 vcc_lo, s1, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[10:11], v[8:9], s[86:87], v[4:5]
	v_cvt_i32_f64_e32 v14, v[8:9]
	v_fma_f64 v[10:11], v[8:9], s[44:45], v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[12:13], v[10:11], s[90:91], s[88:89]
	v_fma_f64 v[12:13], v[10:11], v[12:13], s[92:93]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[12:13], v[10:11], v[12:13], s[94:95]
	v_fma_f64 v[12:13], v[10:11], v[12:13], s[96:97]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[12:13], v[10:11], v[12:13], s[98:99]
	v_fma_f64 v[12:13], v[10:11], v[12:13], s[100:101]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[12:13], v[10:11], v[12:13], s[102:103]
	v_fma_f64 v[12:13], v[10:11], v[12:13], s[60:61]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[12:13], v[10:11], v[12:13], s[62:63]
	v_fma_f64 v[12:13], v[10:11], v[12:13], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[8:9], v[10:11], v[12:13], 1.0
	v_ldexp_f64 v[6:7], v[8:9], v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v2, 0x7ff00000, v7, s0
	s_mov_b32 s0, exec_lo
	v_cndmask_b32_e64 v3, 0, v2, s1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v2, 0, v6, vcc_lo
	v_fma_f64 v[0:1], v[2:3], v[0:1], v[2:3]
	v_cmp_class_f64_e64 vcc_lo, v[2:3], 0x204
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v1, v1, v3 :: v_dual_cndmask_b32 v0, v0, v2
	v_cndmask_b32_e64 v2, 0x7ff00000, 0, s20
	s_or_b32 vcc_lo, s20, s46
	v_bfi_b32 v1, 0x7fffffff, v1, v67
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v0, v0, 0, vcc_lo
	v_bfi_b32 v2, 0x7fffffff, v2, v67
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v1, v1, v2, vcc_lo
	v_cmpx_neq_f64_e32 0, v[0:1]
	s_cbranch_execz .LBB3_228
; %bb.227:                              ;   in Loop: Header=BB3_3 Depth=1
	v_div_scale_f64 v[2:3], null, 0x40b5e000, 0x40b5e000, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[4:5], v[2:3]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[6:7], -v[2:3], v[4:5], 1.0
	v_fma_f64 v[4:5], v[4:5], v[6:7], v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[6:7], -v[2:3], v[4:5], 1.0
	v_fma_f64 v[4:5], v[4:5], v[6:7], v[4:5]
	v_div_scale_f64 v[6:7], vcc_lo, v[0:1], 0x40b5e000, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[8:9], v[6:7], v[4:5]
	v_fma_f64 v[2:3], -v[2:3], v[8:9], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f64 v[2:3], v[2:3], v[4:5], v[8:9]
	v_div_fixup_f64 v[0:1], v[2:3], 0x40b5e000, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[0:1], 0x40590000, v[0:1]
	v_ceil_f64_e32 v[0:1], v[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_cvt_i32_f64_e32 v45, v[0:1]
.LBB3_228:                              ; %_Z10r3_findBind.exit.i.i52
                                        ;   in Loop: Header=BB3_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	v_cmp_eq_f64_e64 s21, 0, v[47:48]
	s_mov_b32 s0, exec_lo
	v_cmpx_neq_f64_e32 0, v[47:48]
	s_cbranch_execz .LBB3_230
; %bb.229:                              ;   in Loop: Header=BB3_3 Depth=1
	v_div_scale_f64 v[0:1], null, s[64:65], s[64:65], v[47:48]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[2:3], v[0:1]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[4:5], -v[0:1], v[2:3], 1.0
	v_fma_f64 v[2:3], v[2:3], v[4:5], v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[4:5], -v[0:1], v[2:3], 1.0
	v_fma_f64 v[2:3], v[2:3], v[4:5], v[2:3]
	v_div_scale_f64 v[4:5], vcc_lo, v[47:48], s[64:65], v[47:48]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[6:7], v[4:5], v[2:3]
	v_fma_f64 v[0:1], -v[0:1], v[6:7], v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f64 v[0:1], v[0:1], v[2:3], v[6:7]
	v_div_fixup_f64 v[0:1], v[0:1], s[64:65], v[47:48]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[0:1], 0x40668000, v[0:1]
	v_ceil_f64_e32 v[0:1], v[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_cvt_i32_f64_e32 v51, v[0:1]
.LBB3_230:                              ; %_Z13theta_findBind.exit.i.i54
                                        ;   in Loop: Header=BB3_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v0, -1, v45
	v_add_nc_u32_e32 v1, -1, v51
                                        ; implicit-def: $vgpr49
                                        ; implicit-def: $vgpr78
                                        ; implicit-def: $vgpr79
                                        ; implicit-def: $vgpr80
                                        ; implicit-def: $vgpr86
                                        ; implicit-def: $vgpr85
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_lt_u32_e32 vcc_lo, 0x63, v0
	v_cmp_lt_u32_e64 s0, 0xb3, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s0, vcc_lo, s0
	s_and_saveexec_b32 s1, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s22, exec_lo, s1
	s_cbranch_execz .LBB3_371
; %bb.231:                              ;   in Loop: Header=BB3_3 Depth=1
	v_add_nc_u32_e32 v0, 0xffffff4b, v51
	v_cmp_ne_u32_e64 s0, 1, v45
                                        ; implicit-def: $vgpr49
                                        ; implicit-def: $vgpr78
                                        ; implicit-def: $vgpr79
                                        ; implicit-def: $vgpr80
                                        ; implicit-def: $vgpr86
                                        ; implicit-def: $vgpr85
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cmp_lt_u32_e64 s1, 0xffffff4b, v0
	v_cmp_gt_u32_e32 vcc_lo, 0xffffff4c, v0
	s_or_b32 s0, s0, s1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s1, s0
	s_xor_b32 s33, exec_lo, s1
	s_cbranch_execz .LBB3_360
; %bb.232:                              ;   in Loop: Header=BB3_3 Depth=1
	v_cmp_gt_i32_e64 s0, 2, v45
	s_xor_b32 s1, vcc_lo, -1
                                        ; implicit-def: $vgpr78
                                        ; implicit-def: $vgpr79
                                        ; implicit-def: $vgpr80
                                        ; implicit-def: $vgpr86
                                        ; implicit-def: $vgpr85
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_or_b32 s0, s0, s1
                                        ; implicit-def: $sgpr1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s2, s0
	s_xor_b32 s44, exec_lo, s2
	s_cbranch_execz .LBB3_349
; %bb.233:                              ;   in Loop: Header=BB3_3 Depth=1
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, _ZZ11get_npe_numiiPdP12hiprandStateE7warning@rel32@lo+4
	s_addc_u32 s3, s3, _ZZ11get_npe_numiiPdP12hiprandStateE7warning@rel32@hi+12
	global_load_b64 v[0:1], v38, s[2:3]
	s_waitcnt vmcnt(0)
	v_cmp_lt_i64_e32 vcc_lo, 8, v[0:1]
	v_add_co_u32 v0, s0, v0, 1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v1, s0, 0, v1, s0
	global_store_b64 v38, v[0:1], s[2:3]
	s_cbranch_vccz .LBB3_264
; %bb.234:                              ;   in Loop: Header=BB3_3 Depth=1
	v_cmp_ne_u64_e32 vcc_lo, 10, v[0:1]
	s_cbranch_vccnz .LBB3_263
; %bb.235:                              ;   in Loop: Header=BB3_3 Depth=1
	s_load_b64 s[2:3], s[34:35], 0x50
	v_dual_mov_b32 v37, v76 :: v_dual_mov_b32 v4, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s0, v37
	v_mov_b32_e32 v5, 0
	v_cmp_eq_u32_e64 s0, s0, v37
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB3_241
; %bb.236:                              ;   in Loop: Header=BB3_3 Depth=1
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[2:3], v38, s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[0:1], v38, s[2:3] offset:40
	global_load_b64 v[4:5], v38, s[2:3]
	s_mov_b32 s4, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v3
	v_and_b32_e32 v0, v0, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v1, v1, 24
	v_mul_hi_u32 v6, v0, 24
	v_mul_lo_u32 v0, v0, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v1, v6, v1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v0, vcc_lo, v4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, v5, v1, vcc_lo
	global_load_b64 v[0:1], v[0:1], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[4:5], v38, v[0:3], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[4:5], v[2:3]
	s_cbranch_execz .LBB3_240
; %bb.237:                              ; %.preheader3.i.i.i85.i.i.i114.preheader
                                        ;   in Loop: Header=BB3_3 Depth=1
	s_mov_b32 s5, 0
.LBB3_238:                              ; %.preheader3.i.i.i85.i.i.i114
                                        ;   Parent Loop BB3_3 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[0:1], v38, s[2:3] offset:40
	global_load_b64 v[6:7], v38, s[2:3]
	v_dual_mov_b32 v2, v4 :: v_dual_mov_b32 v3, v5
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v0, v0, v2
	v_and_b32_e32 v1, v1, v3
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[4:5], null, v0, 24, v[6:7]
	v_mov_b32_e32 v0, v5
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v1, 24, v[0:1]
	global_load_b64 v[0:1], v[4:5], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[4:5], v38, v[0:3], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[4:5], v[2:3]
	s_or_b32 s5, vcc_lo, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s5
	s_cbranch_execnz .LBB3_238
; %bb.239:                              ; %Flow663
                                        ;   in Loop: Header=BB3_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
.LBB3_240:                              ; %Flow665
                                        ;   in Loop: Header=BB3_3 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s4
.LBB3_241:                              ; %.loopexit4.i.i.i80.i.i.i107
                                        ;   in Loop: Header=BB3_3 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[6:7], v38, s[2:3] offset:40
	global_load_b128 v[0:3], v38, s[2:3]
	v_readfirstlane_b32 s4, v4
	v_readfirstlane_b32 s5, v5
	s_mov_b32 s10, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s6, v6
	v_readfirstlane_b32 s7, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[6:7], s[4:5], s[6:7]
	s_mul_i32 s1, s7, 24
	s_mul_hi_u32 s8, s6, 24
	s_mul_i32 s9, s6, 24
	s_and_saveexec_b32 s11, s0
	s_cbranch_execz .LBB3_243
; %bb.242:                              ;   in Loop: Header=BB3_3 Depth=1
	s_add_i32 s12, s8, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v4, vcc_lo, v0, s9
	v_add_co_ci_u32_e32 v5, vcc_lo, s12, v1, vcc_lo
	v_dual_mov_b32 v39, s10 :: v_dual_mov_b32 v40, v38
	global_store_b128 v[4:5], v[39:42], off offset:8
.LBB3_243:                              ;   in Loop: Header=BB3_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s11
	s_lshl_b64 s[6:7], s[6:7], 12
	v_lshlrev_b64 v[4:5], 6, v[37:38]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s6
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v3, vcc_lo
	s_mov_b32 s29, s28
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v2, v4
	s_mov_b32 s30, s28
	s_mov_b32 s31, s28
	v_add_co_ci_u32_e32 v7, vcc_lo, v3, v5, vcc_lo
	v_dual_mov_b32 v37, v38 :: v_dual_mov_b32 v2, s28
	v_dual_mov_b32 v39, v38 :: v_dual_mov_b32 v4, s30
	v_mov_b32_e32 v3, s29
	v_mov_b32_e32 v5, s31
	s_clause 0x3
	global_store_b128 v[6:7], v[36:39], off
	global_store_b128 v[6:7], v[2:5], off offset:16
	global_store_b128 v[6:7], v[2:5], off offset:32
	global_store_b128 v[6:7], v[2:5], off offset:48
	s_and_saveexec_b32 s6, s0
	s_cbranch_execz .LBB3_251
; %bb.244:                              ;   in Loop: Header=BB3_3 Depth=1
	s_clause 0x1
	global_load_b64 v[12:13], v38, s[2:3] offset:32 glc
	global_load_b64 v[2:3], v38, s[2:3] offset:40
	s_mov_b32 s7, exec_lo
	v_dual_mov_b32 v10, s4 :: v_dual_mov_b32 v11, s5
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v3, s5, v3
	v_and_b32_e32 v2, s4, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v3, v3, 24
	v_mul_hi_u32 v4, v2, 24
	v_mul_lo_u32 v2, v2, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v4, v3
	v_add_co_u32 v8, vcc_lo, v0, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v9, vcc_lo, v1, v3, vcc_lo
	global_store_b64 v[8:9], v[12:13], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v38, v[10:13], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[12:13]
	s_cbranch_execz .LBB3_247
; %bb.245:                              ; %.preheader1.i.i.i83.i.i.i112.preheader
                                        ;   in Loop: Header=BB3_3 Depth=1
	s_mov_b32 s10, 0
.LBB3_246:                              ; %.preheader1.i.i.i83.i.i.i112
                                        ;   Parent Loop BB3_3 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_dual_mov_b32 v2, s4 :: v_dual_mov_b32 v3, s5
	s_sleep 1
	global_store_b64 v[8:9], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v38, v[2:5], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s10, vcc_lo, s10
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s10
	s_cbranch_execnz .LBB3_246
.LBB3_247:                              ; %Flow661
                                        ;   in Loop: Header=BB3_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s7
	global_load_b64 v[2:3], v38, s[2:3] offset:16
	s_mov_b32 s10, exec_lo
	s_mov_b32 s7, exec_lo
	v_mbcnt_lo_u32_b32 v4, s10, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB3_249
; %bb.248:                              ;   in Loop: Header=BB3_3 Depth=1
	s_bcnt1_i32_b32 s10, s10
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v37, s10
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[37:38], off offset:8
.LBB3_249:                              ;   in Loop: Header=BB3_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s7
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB3_251
; %bb.250:                              ;   in Loop: Header=BB3_3 Depth=1
	global_load_b32 v37, v[2:3], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s7, v37
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[37:38], off
	s_and_b32 m0, s7, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB3_251:                              ; %Flow662
                                        ;   in Loop: Header=BB3_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	s_add_i32 s8, s8, s1
	v_add_co_u32 v0, vcc_lo, v0, s9
	v_add_co_ci_u32_e32 v1, vcc_lo, s8, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB3_252:                              ;   Parent Loop BB3_3 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB3_254
; %bb.253:                              ;   in Loop: Header=BB3_252 Depth=2
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB3_254:                              ;   in Loop: Header=BB3_252 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB3_256
; %bb.255:                              ;   in Loop: Header=BB3_252 Depth=2
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB3_257
.LBB3_256:                              ;   in Loop: Header=BB3_252 Depth=2
	s_mov_b32 s1, -1
.LBB3_257:                              ; %Flow656
                                        ;   in Loop: Header=BB3_252 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB3_252
; %bb.258:                              ;   in Loop: Header=BB3_3 Depth=1
	global_load_b64 v[0:1], v[6:7], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB3_262
; %bb.259:                              ;   in Loop: Header=BB3_3 Depth=1
	s_clause 0x2
	global_load_b64 v[4:5], v38, s[2:3] offset:40
	global_load_b64 v[8:9], v38, s[2:3] offset:24 glc
	global_load_b64 v[6:7], v38, s[2:3]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v10, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v11, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v10, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v11, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v11 :: v_dual_cndmask_b32 v2, v2, v10
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v4, v2, v4
	v_mul_hi_u32 v10, v4, 24
	v_mul_lo_u32 v4, v4, 24
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v8
	v_mul_lo_u32 v5, v5, 24
	v_add_nc_u32_e32 v5, v10, v5
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v9
	global_store_b64 v[6:7], v[8:9], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v38, v[2:5], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[8:9]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB3_262
; %bb.260:                              ; %.preheader.i.i.i82.i.i.i111.preheader
                                        ;   in Loop: Header=BB3_3 Depth=1
	s_mov_b32 s0, 0
.LBB3_261:                              ; %.preheader.i.i.i82.i.i.i111
                                        ;   Parent Loop BB3_3 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[8:9], v38, v[2:5], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[8:9], v[4:5]
	v_dual_mov_b32 v4, v8 :: v_dual_mov_b32 v5, v9
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB3_261
.LBB3_262:                              ; %__ockl_printf_begin.exit86.i.i.i109
                                        ;   in Loop: Header=BB3_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_add_u32 s8, s18, 0x88
	s_addc_u32 s9, s19, 0
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str.2@rel32@lo+4
	s_addc_u32 s1, s1, .str.2@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	v_dual_mov_b32 v2, s0 :: v_dual_mov_b32 v3, s1
	v_dual_mov_b32 v4, s73 :: v_dual_mov_b32 v5, v38
	v_mov_b32_e32 v6, v42
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __ockl_printf_append_string_n@rel32@lo+4
	s_addc_u32 s3, s3, __ockl_printf_append_string_n@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[2:3]
.LBB3_263:                              ; %Flow666
                                        ;   in Loop: Header=BB3_3 Depth=1
	s_mov_b32 s0, 0
	s_mov_b32 s1, 0
	s_branch .LBB3_265
.LBB3_264:                              ;   in Loop: Header=BB3_3 Depth=1
	s_mov_b32 s0, -1
                                        ; implicit-def: $sgpr1
.LBB3_265:                              ; %Flow711
                                        ;   in Loop: Header=BB3_3 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccnz .LBB3_348
; %bb.266:                              ;   in Loop: Header=BB3_3 Depth=1
	s_load_b64 s[46:47], s[34:35], 0x50
	v_dual_mov_b32 v37, v76 :: v_dual_mov_b32 v4, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s0, v37
	v_mov_b32_e32 v5, 0
	v_cmp_eq_u32_e64 s0, s0, v37
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB3_272
; %bb.267:                              ;   in Loop: Header=BB3_3 Depth=1
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[2:3], v38, s[46:47] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[0:1], v38, s[46:47] offset:40
	global_load_b64 v[4:5], v38, s[46:47]
	s_mov_b32 s2, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v3
	v_and_b32_e32 v0, v0, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v1, v1, 24
	v_mul_hi_u32 v6, v0, 24
	v_mul_lo_u32 v0, v0, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v1, v6, v1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v0, vcc_lo, v4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, v5, v1, vcc_lo
	global_load_b64 v[0:1], v[0:1], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[4:5], v38, v[0:3], s[46:47] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[4:5], v[2:3]
	s_cbranch_execz .LBB3_271
; %bb.268:                              ; %.preheader3.i.i.i.i.i.i135.preheader
                                        ;   in Loop: Header=BB3_3 Depth=1
	s_mov_b32 s3, 0
.LBB3_269:                              ; %.preheader3.i.i.i.i.i.i135
                                        ;   Parent Loop BB3_3 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[0:1], v38, s[46:47] offset:40
	global_load_b64 v[6:7], v38, s[46:47]
	v_dual_mov_b32 v2, v4 :: v_dual_mov_b32 v3, v5
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v0, v0, v2
	v_and_b32_e32 v1, v1, v3
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[4:5], null, v0, 24, v[6:7]
	v_mov_b32_e32 v0, v5
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v1, 24, v[0:1]
	global_load_b64 v[0:1], v[4:5], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[4:5], v38, v[0:3], s[46:47] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[4:5], v[2:3]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB3_269
; %bb.270:                              ; %Flow707
                                        ;   in Loop: Header=BB3_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
.LBB3_271:                              ; %Flow709
                                        ;   in Loop: Header=BB3_3 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB3_272:                              ; %.loopexit4.i.i.i.i.i.i115
                                        ;   in Loop: Header=BB3_3 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[6:7], v38, s[46:47] offset:40
	global_load_b128 v[0:3], v38, s[46:47]
	v_readfirstlane_b32 s2, v4
	v_readfirstlane_b32 s3, v5
	s_mov_b32 s8, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v6
	v_readfirstlane_b32 s5, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB3_274
; %bb.273:                              ;   in Loop: Header=BB3_3 Depth=1
	s_add_i32 s10, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v4, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v5, vcc_lo, s10, v1, vcc_lo
	v_dual_mov_b32 v39, s8 :: v_dual_mov_b32 v40, v38
	global_store_b128 v[4:5], v[39:42], off offset:8
.LBB3_274:                              ;   in Loop: Header=BB3_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[4:5], 6, v[37:38]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_mov_b32 s29, s28
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v2, v4
	s_mov_b32 s30, s28
	s_mov_b32 s31, s28
	v_add_co_ci_u32_e32 v7, vcc_lo, v3, v5, vcc_lo
	v_dual_mov_b32 v37, v38 :: v_dual_mov_b32 v2, s28
	v_dual_mov_b32 v39, v38 :: v_dual_mov_b32 v4, s30
	v_mov_b32_e32 v3, s29
	v_mov_b32_e32 v5, s31
	s_clause 0x3
	global_store_b128 v[6:7], v[36:39], off
	global_store_b128 v[6:7], v[2:5], off offset:16
	global_store_b128 v[6:7], v[2:5], off offset:32
	global_store_b128 v[6:7], v[2:5], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB3_282
; %bb.275:                              ;   in Loop: Header=BB3_3 Depth=1
	s_clause 0x1
	global_load_b64 v[12:13], v38, s[46:47] offset:32 glc
	global_load_b64 v[2:3], v38, s[46:47] offset:40
	s_mov_b32 s5, exec_lo
	v_dual_mov_b32 v10, s2 :: v_dual_mov_b32 v11, s3
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v3, s3, v3
	v_and_b32_e32 v2, s2, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v3, v3, 24
	v_mul_hi_u32 v4, v2, 24
	v_mul_lo_u32 v2, v2, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v4, v3
	v_add_co_u32 v8, vcc_lo, v0, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v9, vcc_lo, v1, v3, vcc_lo
	global_store_b64 v[8:9], v[12:13], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v38, v[10:13], s[46:47] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[12:13]
	s_cbranch_execz .LBB3_278
; %bb.276:                              ; %.preheader1.i.i.i.i.i.i133.preheader
                                        ;   in Loop: Header=BB3_3 Depth=1
	s_mov_b32 s8, 0
.LBB3_277:                              ; %.preheader1.i.i.i.i.i.i133
                                        ;   Parent Loop BB3_3 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
	s_sleep 1
	global_store_b64 v[8:9], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v38, v[2:5], s[46:47] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB3_277
.LBB3_278:                              ; %Flow705
                                        ;   in Loop: Header=BB3_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	global_load_b64 v[2:3], v38, s[46:47] offset:16
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v4, s8, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB3_280
; %bb.279:                              ;   in Loop: Header=BB3_3 Depth=1
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v37, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[37:38], off offset:8
.LBB3_280:                              ;   in Loop: Header=BB3_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB3_282
; %bb.281:                              ;   in Loop: Header=BB3_3 Depth=1
	global_load_b32 v37, v[2:3], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v37
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[37:38], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB3_282:                              ; %Flow706
                                        ;   in Loop: Header=BB3_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB3_283:                              ;   Parent Loop BB3_3 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB3_285
; %bb.284:                              ;   in Loop: Header=BB3_283 Depth=2
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB3_285:                              ;   in Loop: Header=BB3_283 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB3_287
; %bb.286:                              ;   in Loop: Header=BB3_283 Depth=2
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB3_288
.LBB3_287:                              ;   in Loop: Header=BB3_283 Depth=2
	s_mov_b32 s1, -1
.LBB3_288:                              ; %Flow700
                                        ;   in Loop: Header=BB3_283 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB3_283
; %bb.289:                              ;   in Loop: Header=BB3_3 Depth=1
	global_load_b64 v[0:1], v[6:7], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB3_293
; %bb.290:                              ;   in Loop: Header=BB3_3 Depth=1
	s_clause 0x2
	global_load_b64 v[4:5], v38, s[46:47] offset:40
	global_load_b64 v[8:9], v38, s[46:47] offset:24 glc
	global_load_b64 v[6:7], v38, s[46:47]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v10, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v11, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v10, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v11, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v11 :: v_dual_cndmask_b32 v2, v2, v10
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v4, v2, v4
	v_mul_hi_u32 v10, v4, 24
	v_mul_lo_u32 v4, v4, 24
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v8
	v_mul_lo_u32 v5, v5, 24
	v_add_nc_u32_e32 v5, v10, v5
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v9
	global_store_b64 v[6:7], v[8:9], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v38, v[2:5], s[46:47] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[8:9]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB3_293
; %bb.291:                              ; %.preheader.i.i.i.i.i.i132.preheader
                                        ;   in Loop: Header=BB3_3 Depth=1
	s_mov_b32 s0, 0
.LBB3_292:                              ; %.preheader.i.i.i.i.i.i132
                                        ;   Parent Loop BB3_3 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[8:9], v38, v[2:5], s[46:47] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[8:9], v[4:5]
	v_dual_mov_b32 v4, v8 :: v_dual_mov_b32 v5, v9
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB3_292
.LBB3_293:                              ; %__ockl_printf_begin.exit.i.i.i117
                                        ;   in Loop: Header=BB3_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_add_u32 s8, s18, 0x88
	s_addc_u32 s9, s19, 0
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str.1@rel32@lo+4
	s_addc_u32 s1, s1, .str.1@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	v_dual_mov_b32 v2, s0 :: v_dual_mov_b32 v3, s1
	v_dual_mov_b32 v4, s104 :: v_dual_mov_b32 v5, v38
	v_mov_b32_e32 v6, v38
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __ockl_printf_append_string_n@rel32@lo+4
	s_addc_u32 s3, s3, __ockl_printf_append_string_n@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_swappc_b64 s[30:31], s[2:3]
	v_dual_mov_b32 v44, v1 :: v_dual_mov_b32 v37, v76
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v37
	v_mov_b32_e32 v5, 0
	v_mov_b32_e32 v6, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v37
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB3_299
; %bb.294:                              ;   in Loop: Header=BB3_3 Depth=1
	global_load_b64 v[3:4], v38, s[46:47] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v38, s[46:47] offset:40
	global_load_b64 v[5:6], v38, s[46:47]
	s_mov_b32 s2, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v2, v2, v4
	v_and_b32_e32 v1, v1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v2, v2, 24
	v_mul_hi_u32 v7, v1, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v7, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v5, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v6, v2, vcc_lo
	global_load_b64 v[1:2], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[5:6], v38, v[1:4], s[46:47] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[5:6], v[3:4]
	s_cbranch_execz .LBB3_298
; %bb.295:                              ; %.preheader3.i.i.i72.i.i.i131.preheader
                                        ;   in Loop: Header=BB3_3 Depth=1
	s_mov_b32 s3, 0
.LBB3_296:                              ; %.preheader3.i.i.i72.i.i.i131
                                        ;   Parent Loop BB3_3 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[1:2], v38, s[46:47] offset:40
	global_load_b64 v[7:8], v38, s[46:47]
	v_dual_mov_b32 v3, v5 :: v_dual_mov_b32 v4, v6
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v1, v1, v3
	v_and_b32_e32 v2, v2, v4
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v1, 24, v[7:8]
	v_mov_b32_e32 v1, v6
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[6:7], null, v2, 24, v[1:2]
	global_load_b64 v[1:2], v[5:6], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[5:6], v38, v[1:4], s[46:47] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[5:6], v[3:4]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB3_296
; %bb.297:                              ; %Flow693
                                        ;   in Loop: Header=BB3_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
.LBB3_298:                              ; %Flow695
                                        ;   in Loop: Header=BB3_3 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB3_299:                              ; %.loopexit4.i.i.i67.i.i.i119
                                        ;   in Loop: Header=BB3_3 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_clause 0x1
	global_load_b64 v[7:8], v38, s[46:47] offset:40
	global_load_b128 v[1:4], v38, s[46:47]
	v_readfirstlane_b32 s2, v5
	v_readfirstlane_b32 s3, v6
	s_mov_b32 s8, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v7
	v_readfirstlane_b32 s5, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB3_301
; %bb.300:                              ;   in Loop: Header=BB3_3 Depth=1
	s_add_i32 s10, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v5, vcc_lo, v1, s7
	v_add_co_ci_u32_e32 v6, vcc_lo, s10, v2, vcc_lo
	v_dual_mov_b32 v39, s8 :: v_dual_mov_b32 v40, v38
	global_store_b128 v[5:6], v[39:42], off offset:8
.LBB3_301:                              ;   in Loop: Header=BB3_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[5:6], 6, v[37:38]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v3, vcc_lo, v3, s4
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
	s_mov_b32 s29, s28
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v7, vcc_lo, v3, v5
	s_mov_b32 s30, s28
	s_mov_b32 s31, s28
	v_and_or_b32 v43, 0xffffff1f, v0, 32
	v_add_co_ci_u32_e32 v8, vcc_lo, v4, v6, vcc_lo
	v_dual_mov_b32 v46, v38 :: v_dual_mov_b32 v3, s28
	v_dual_mov_b32 v4, s29 :: v_dual_mov_b32 v5, s30
	v_mov_b32_e32 v6, s31
	s_clause 0x3
	global_store_b128 v[7:8], v[43:46], off
	global_store_b128 v[7:8], v[3:6], off offset:16
	global_store_b128 v[7:8], v[3:6], off offset:32
	global_store_b128 v[7:8], v[3:6], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB3_309
; %bb.302:                              ;   in Loop: Header=BB3_3 Depth=1
	s_clause 0x1
	global_load_b64 v[13:14], v38, s[46:47] offset:32 glc
	global_load_b64 v[3:4], v38, s[46:47] offset:40
	v_dual_mov_b32 v11, s2 :: v_dual_mov_b32 v12, s3
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v3
	v_readfirstlane_b32 s9, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v9, vcc_lo, v1, s8
	v_add_co_ci_u32_e32 v10, vcc_lo, s9, v2, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[9:10], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[5:6], v38, v[11:14], s[46:47] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[5:6], v[13:14]
	s_cbranch_execz .LBB3_305
; %bb.303:                              ; %.preheader1.i.i.i70.i.i.i129.preheader
                                        ;   in Loop: Header=BB3_3 Depth=1
	s_mov_b32 s8, 0
.LBB3_304:                              ; %.preheader1.i.i.i70.i.i.i129
                                        ;   Parent Loop BB3_3 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_dual_mov_b32 v3, s2 :: v_dual_mov_b32 v4, s3
	s_sleep 1
	global_store_b64 v[9:10], v[5:6], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[3:4], v38, v[3:6], s[46:47] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[3:4], v[5:6]
	v_dual_mov_b32 v6, v4 :: v_dual_mov_b32 v5, v3
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB3_304
.LBB3_305:                              ; %Flow691
                                        ;   in Loop: Header=BB3_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	global_load_b64 v[3:4], v38, s[46:47] offset:16
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v0, s8, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB3_307
; %bb.306:                              ;   in Loop: Header=BB3_3 Depth=1
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v37, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[3:4], v[37:38], off offset:8
.LBB3_307:                              ;   in Loop: Header=BB3_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[5:6], v[3:4], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[5:6]
	s_cbranch_vccnz .LBB3_309
; %bb.308:                              ;   in Loop: Header=BB3_3 Depth=1
	global_load_b32 v37, v[3:4], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v37
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[5:6], v[37:38], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB3_309:                              ; %Flow692
                                        ;   in Loop: Header=BB3_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v1, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v2, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB3_310:                              ;   Parent Loop BB3_3 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB3_312
; %bb.311:                              ;   in Loop: Header=BB3_310 Depth=2
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB3_312:                              ;   in Loop: Header=BB3_310 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB3_314
; %bb.313:                              ;   in Loop: Header=BB3_310 Depth=2
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB3_315
.LBB3_314:                              ;   in Loop: Header=BB3_310 Depth=2
	s_mov_b32 s1, -1
.LBB3_315:                              ; %Flow686
                                        ;   in Loop: Header=BB3_310 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB3_310
; %bb.316:                              ;   in Loop: Header=BB3_3 Depth=1
	global_load_b64 v[49:50], v[7:8], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB3_320
; %bb.317:                              ;   in Loop: Header=BB3_3 Depth=1
	s_clause 0x2
	global_load_b64 v[2:3], v38, s[46:47] offset:40
	global_load_b64 v[6:7], v38, s[46:47] offset:24 glc
	global_load_b64 v[4:5], v38, s[46:47]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v8, vcc_lo, v2, 1
	v_add_co_ci_u32_e32 v9, vcc_lo, 0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v8, s2
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v9, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[0:1]
	v_dual_cndmask_b32 v1, v1, v9 :: v_dual_cndmask_b32 v0, v0, v8
	v_and_b32_e32 v3, v1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v2, v0, v2
	v_mul_hi_u32 v8, v2, 24
	v_mul_lo_u32 v2, v2, 24
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_u32 v4, vcc_lo, v4, v2
	v_mov_b32_e32 v2, v6
	v_mul_lo_u32 v3, v3, 24
	v_add_nc_u32_e32 v3, v8, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e32 v5, vcc_lo, v5, v3, vcc_lo
	v_mov_b32_e32 v3, v7
	global_store_b64 v[4:5], v[6:7], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v38, v[0:3], s[46:47] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[2:3], v[6:7]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB3_320
; %bb.318:                              ; %.preheader.i.i.i69.i.i.i128.preheader
                                        ;   in Loop: Header=BB3_3 Depth=1
	s_mov_b32 s0, 0
.LBB3_319:                              ; %.preheader.i.i.i69.i.i.i128
                                        ;   Parent Loop BB3_3 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_sleep 1
	global_store_b64 v[4:5], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[6:7], v38, v[0:3], s[46:47] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[2:3]
	v_dual_mov_b32 v2, v6 :: v_dual_mov_b32 v3, v7
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB3_319
.LBB3_320:                              ; %__ockl_printf_append_args.exit.i.i.i121
                                        ;   in Loop: Header=BB3_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	v_dual_mov_b32 v37, v76 :: v_dual_mov_b32 v4, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s0, v37
	v_mov_b32_e32 v5, 0
	v_cmp_eq_u32_e64 s0, s0, v37
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB3_326
; %bb.321:                              ;   in Loop: Header=BB3_3 Depth=1
	global_load_b64 v[2:3], v38, s[46:47] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[0:1], v38, s[46:47] offset:40
	global_load_b64 v[4:5], v38, s[46:47]
	s_mov_b32 s2, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v3
	v_and_b32_e32 v0, v0, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v1, v1, 24
	v_mul_hi_u32 v6, v0, 24
	v_mul_lo_u32 v0, v0, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v1, v6, v1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v0, vcc_lo, v4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, v5, v1, vcc_lo
	global_load_b64 v[0:1], v[0:1], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[4:5], v38, v[0:3], s[46:47] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[4:5], v[2:3]
	s_cbranch_execz .LBB3_325
; %bb.322:                              ; %.preheader3.i.i.i78.i.i.i127.preheader
                                        ;   in Loop: Header=BB3_3 Depth=1
	s_mov_b32 s3, 0
.LBB3_323:                              ; %.preheader3.i.i.i78.i.i.i127
                                        ;   Parent Loop BB3_3 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[0:1], v38, s[46:47] offset:40
	global_load_b64 v[6:7], v38, s[46:47]
	v_dual_mov_b32 v2, v4 :: v_dual_mov_b32 v3, v5
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v0, v0, v2
	v_and_b32_e32 v1, v1, v3
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[4:5], null, v0, 24, v[6:7]
	v_mov_b32_e32 v0, v5
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v1, 24, v[0:1]
	global_load_b64 v[0:1], v[4:5], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[4:5], v38, v[0:3], s[46:47] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[4:5], v[2:3]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB3_323
; %bb.324:                              ; %Flow679
                                        ;   in Loop: Header=BB3_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
.LBB3_325:                              ; %Flow681
                                        ;   in Loop: Header=BB3_3 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB3_326:                              ; %.loopexit4.i.i.i73.i.i.i122
                                        ;   in Loop: Header=BB3_3 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_clause 0x1
	global_load_b64 v[6:7], v38, s[46:47] offset:40
	global_load_b128 v[0:3], v38, s[46:47]
	v_readfirstlane_b32 s2, v4
	v_readfirstlane_b32 s3, v5
	s_mov_b32 s8, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v6
	v_readfirstlane_b32 s5, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB3_328
; %bb.327:                              ;   in Loop: Header=BB3_3 Depth=1
	s_add_i32 s10, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v4, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v5, vcc_lo, s10, v1, vcc_lo
	v_dual_mov_b32 v39, s8 :: v_dual_mov_b32 v40, v38
	global_store_b128 v[4:5], v[39:42], off offset:8
.LBB3_328:                              ;   in Loop: Header=BB3_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[4:5], 6, v[37:38]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_mov_b32 s29, s28
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v2, v4
	s_mov_b32 s30, s28
	s_mov_b32 s31, s28
	v_and_or_b32 v49, 0xffffff1d, v49, 34
	v_add_co_ci_u32_e32 v7, vcc_lo, v3, v5, vcc_lo
	v_mov_b32_e32 v52, v38
	v_dual_mov_b32 v2, s28 :: v_dual_mov_b32 v5, s31
	v_dual_mov_b32 v3, s29 :: v_dual_mov_b32 v4, s30
	s_clause 0x3
	global_store_b128 v[6:7], v[49:52], off
	global_store_b128 v[6:7], v[2:5], off offset:16
	global_store_b128 v[6:7], v[2:5], off offset:32
	global_store_b128 v[6:7], v[2:5], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB3_336
; %bb.329:                              ;   in Loop: Header=BB3_3 Depth=1
	s_clause 0x1
	global_load_b64 v[10:11], v38, s[46:47] offset:32 glc
	global_load_b64 v[2:3], v38, s[46:47] offset:40
	v_dual_mov_b32 v8, s2 :: v_dual_mov_b32 v9, s3
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v2
	v_readfirstlane_b32 s9, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v6, vcc_lo, v0, s8
	v_add_co_ci_u32_e32 v7, vcc_lo, s9, v1, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[6:7], v[10:11], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v38, v[8:11], s[46:47] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[10:11]
	s_cbranch_execz .LBB3_332
; %bb.330:                              ; %.preheader1.i.i.i76.i.i.i125.preheader
                                        ;   in Loop: Header=BB3_3 Depth=1
	s_mov_b32 s8, 0
.LBB3_331:                              ; %.preheader1.i.i.i76.i.i.i125
                                        ;   Parent Loop BB3_3 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v38, v[2:5], s[46:47] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB3_331
.LBB3_332:                              ; %Flow677
                                        ;   in Loop: Header=BB3_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	global_load_b64 v[2:3], v38, s[46:47] offset:16
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v4, s8, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB3_334
; %bb.333:                              ;   in Loop: Header=BB3_3 Depth=1
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v37, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[37:38], off offset:8
.LBB3_334:                              ;   in Loop: Header=BB3_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB3_336
; %bb.335:                              ;   in Loop: Header=BB3_3 Depth=1
	global_load_b32 v37, v[2:3], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v37
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[37:38], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB3_336:                              ; %Flow678
                                        ;   in Loop: Header=BB3_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB3_337:                              ;   Parent Loop BB3_3 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB3_339
; %bb.338:                              ;   in Loop: Header=BB3_337 Depth=2
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB3_339:                              ;   in Loop: Header=BB3_337 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB3_341
; %bb.340:                              ;   in Loop: Header=BB3_337 Depth=2
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB3_342
.LBB3_341:                              ;   in Loop: Header=BB3_337 Depth=2
	s_mov_b32 s1, -1
.LBB3_342:                              ; %Flow672
                                        ;   in Loop: Header=BB3_337 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB3_337
; %bb.343:                              ;   in Loop: Header=BB3_3 Depth=1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB3_347
; %bb.344:                              ;   in Loop: Header=BB3_3 Depth=1
	s_clause 0x2
	global_load_b64 v[2:3], v38, s[46:47] offset:40
	global_load_b64 v[6:7], v38, s[46:47] offset:24 glc
	global_load_b64 v[4:5], v38, s[46:47]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v8, vcc_lo, v2, 1
	v_add_co_ci_u32_e32 v9, vcc_lo, 0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v8, s2
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v9, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[0:1]
	v_dual_cndmask_b32 v1, v1, v9 :: v_dual_cndmask_b32 v0, v0, v8
	v_and_b32_e32 v3, v1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v2, v0, v2
	v_mul_hi_u32 v8, v2, 24
	v_mul_lo_u32 v2, v2, 24
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_u32 v4, vcc_lo, v4, v2
	v_mov_b32_e32 v2, v6
	v_mul_lo_u32 v3, v3, 24
	v_add_nc_u32_e32 v3, v8, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e32 v5, vcc_lo, v5, v3, vcc_lo
	v_mov_b32_e32 v3, v7
	global_store_b64 v[4:5], v[6:7], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v38, v[0:3], s[46:47] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[2:3], v[6:7]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB3_347
; %bb.345:                              ; %.preheader.i.i.i75.i.i.i124.preheader
                                        ;   in Loop: Header=BB3_3 Depth=1
	s_mov_b32 s0, 0
.LBB3_346:                              ; %.preheader.i.i.i75.i.i.i124
                                        ;   Parent Loop BB3_3 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_sleep 1
	global_store_b64 v[4:5], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[6:7], v38, v[0:3], s[46:47] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[2:3]
	v_dual_mov_b32 v2, v6 :: v_dual_mov_b32 v3, v7
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB3_346
.LBB3_347:                              ; %Flow670
                                        ;   in Loop: Header=BB3_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_mov_b32 s1, 0
.LBB3_348:                              ; %Flow712
                                        ;   in Loop: Header=BB3_3 Depth=1
	v_dual_mov_b32 v78, v74 :: v_dual_mov_b32 v79, v81
	v_mov_b32_e32 v80, v87
	v_dual_mov_b32 v86, v88 :: v_dual_mov_b32 v85, v83
                                        ; implicit-def: $vgpr51
                                        ; implicit-def: $vgpr45
                                        ; implicit-def: $vgpr74
                                        ; implicit-def: $vgpr88
                                        ; implicit-def: $vgpr83
                                        ; implicit-def: $vgpr81
                                        ; implicit-def: $vgpr87
.LBB3_349:                              ; %Flow718
                                        ;   in Loop: Header=BB3_3 Depth=1
	s_or_saveexec_b32 s0, s44
	v_mov_b32_e32 v49, s1
	s_xor_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB3_359
; %bb.350:                              ;   in Loop: Header=BB3_3 Depth=1
	v_lshrrev_b32_e32 v0, 2, v77
	v_lshlrev_b32_e32 v1, 4, v74
	v_lshrrev_b32_e32 v3, 2, v88
	v_cmp_gt_i32_e32 vcc_lo, 0xb5, v51
	v_add_nc_u32_e32 v85, 0xb0f8a, v83
	v_xor_b32_e32 v0, v0, v77
	s_mov_b32 s1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v7, 32 :: v_dual_lshlrev_b32 v2, 1, v0
	v_xor_b32_e32 v1, v2, v1
	v_xor_b32_e32 v2, v3, v88
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor3_b32 v79, v1, v0, v74
	v_lshlrev_b32_e32 v0, 1, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v1, 4, v79
	v_xor_b32_e32 v0, v0, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_xor3_b32 v78, v0, v2, v79
	v_add3_u32 v2, v83, v79, 0x587c5
	v_add_nc_u32_e32 v0, v78, v85
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_u32_e32 v[2:3], v2
	v_lshrrev_b32_e32 v0, 11, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f64_u32_e32 v[0:1], v0
	v_ldexp_f64 v[0:1], v[0:1], 32
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[0:1], v[0:1], v[2:3]
	v_max_i32_e32 v2, 1, v51
	v_add_nc_u32_e32 v2, -1, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v2, 0xb3, v2, vcc_lo
	v_mad_u64_u32 v[4:5], null, 0xb4, v45, v[2:3]
	v_mov_b32_e32 v5, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_mad_u64_u32 v[2:3], null, v4, 33, 0xffffffffffffe8cc
	v_fma_f64 v[0:1], 0x3ca00000, v[0:1], 0x3ca00000
.LBB3_351:                              ; %.lr.ph.i.i59.i.i.i142
                                        ;   Parent Loop BB3_3 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v3, v7, v5
	s_mov_b32 s2, exec_lo
	v_lshrrev_b32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v3, v3, v4
	v_ashrrev_i32_e32 v3, 1, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v6, v3, v5
	v_add_nc_u32_e32 v3, v6, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v4, 31, v3
	v_lshlrev_b64 v[3:4], 3, v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, s54, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s55, v4, vcc_lo
	global_load_b64 v[3:4], v[3:4], off
	s_waitcnt vmcnt(0)
	v_cmpx_neq_f64_e32 v[3:4], v[0:1]
	s_cbranch_execz .LBB3_357
; %bb.352:                              ;   in Loop: Header=BB3_351 Depth=2
	s_mov_b32 s3, exec_lo
	v_cmpx_nlt_f64_e32 v[3:4], v[0:1]
	s_cbranch_execz .LBB3_356
; %bb.353:                              ;   in Loop: Header=BB3_351 Depth=2
	s_mov_b32 s4, exec_lo
	v_cmpx_gt_f64_e32 v[3:4], v[0:1]
; %bb.354:                              ;   in Loop: Header=BB3_351 Depth=2
	v_mov_b32_e32 v7, v6
; %bb.355:                              ; %Flow713
                                        ;   in Loop: Header=BB3_351 Depth=2
	s_or_b32 exec_lo, exec_lo, s4
	v_mov_b32_e32 v6, v5
.LBB3_356:                              ; %Flow715
                                        ;   in Loop: Header=BB3_351 Depth=2
	s_or_b32 exec_lo, exec_lo, s3
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v5, v6 :: v_dual_mov_b32 v6, v7
.LBB3_357:                              ;   in Loop: Header=BB3_351 Depth=2
	s_or_b32 exec_lo, exec_lo, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, 1, v5
	v_mov_b32_e32 v7, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ge_i32_e32 vcc_lo, v3, v6
	s_or_b32 s1, vcc_lo, s1
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB3_351
; %bb.358:                              ; %_Z8samplingP12hiprandStatePdii.exit66.i.i.i147
                                        ;   in Loop: Header=BB3_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	v_dual_mov_b32 v77, v87 :: v_dual_add_nc_u32 v2, v5, v2
	v_mov_b32_e32 v86, v81
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[2:3], 3, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s54, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s55, v3, vcc_lo
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(0)
	v_cmp_lt_f64_e32 vcc_lo, v[2:3], v[0:1]
	v_cndmask_b32_e32 v4, -1, v6, vcc_lo
	v_cmp_nge_f64_e32 vcc_lo, v[2:3], v[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_dual_mov_b32 v80, v74 :: v_dual_cndmask_b32 v49, v5, v4
.LBB3_359:                              ; %Flow719
                                        ;   in Loop: Header=BB3_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $vgpr74
                                        ; implicit-def: $vgpr88
                                        ; implicit-def: $vgpr83
                                        ; implicit-def: $vgpr87
                                        ; implicit-def: $vgpr81
.LBB3_360:                              ; %Flow725
                                        ;   in Loop: Header=BB3_3 Depth=1
	s_and_not1_saveexec_b32 s0, s33
	s_cbranch_execz .LBB3_370
; %bb.361:                              ;   in Loop: Header=BB3_3 Depth=1
	v_lshrrev_b32_e32 v0, 2, v77
	v_lshlrev_b32_e32 v1, 4, v74
	v_lshrrev_b32_e32 v3, 2, v88
	v_lshrrev_b32_e32 v4, 2, v87
	v_lshrrev_b32_e32 v5, 2, v81
	v_xor_b32_e32 v0, v0, v77
	v_add_nc_u32_e32 v85, 0x161f14, v83
	s_mov_b32 s1, 0
	v_xor_b32_e32 v4, v4, v87
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v7, 32 :: v_dual_lshlrev_b32 v2, 1, v0
	v_xor_b32_e32 v1, v2, v1
	v_xor_b32_e32 v2, v3, v88
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor3_b32 v86, v1, v0, v74
	v_lshlrev_b32_e32 v0, 1, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v1, 4, v86
	v_xor_b32_e32 v0, v0, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_xor3_b32 v80, v0, v2, v86
	v_add3_u32 v2, v83, v86, 0x587c5
	v_add3_u32 v0, v83, v80, 0xb0f8a
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_u32_e32 v[2:3], v2
	v_lshrrev_b32_e32 v0, 11, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f64_u32_e32 v[0:1], v0
	v_ldexp_f64 v[0:1], v[0:1], 32
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_f64 v[0:1], v[0:1], v[2:3]
	v_lshlrev_b32_e32 v2, 1, v4
	v_lshlrev_b32_e32 v3, 4, v80
	v_xor_b32_e32 v2, v2, v3
	v_xor_b32_e32 v3, v5, v81
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor3_b32 v79, v2, v4, v80
	v_lshlrev_b32_e32 v2, 1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v4, 4, v79
	v_xor_b32_e32 v2, v2, v4
	v_add3_u32 v4, v83, v79, 0x10974f
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor3_b32 v78, v2, v3, v79
	v_cvt_f64_u32_e32 v[4:5], v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v2, v78, v85
	v_lshrrev_b32_e32 v2, 11, v2
	v_fma_f64 v[0:1], 0x3ca00000, v[0:1], 0x3ca00000
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_u32_e32 v[2:3], v2
	v_mul_f64 v[0:1], 0x40666000, v[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[2:3], v[2:3], 32
	v_ceil_f64_e32 v[0:1], v[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[2:3], v[2:3], v[4:5]
	v_cvt_i32_f64_e32 v4, v[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[0:1], 0x3ca00000, v[2:3], 0x3ca00000
	v_lshl_add_u32 v5, v4, 5, v4
	v_mov_b32_e32 v4, 0
.LBB3_362:                              ; %.lr.ph.i.i47.i.i.i158
                                        ;   Parent Loop BB3_3 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v2, v7, v4
	s_mov_b32 s2, exec_lo
	v_lshrrev_b32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v2, v2, v3
	v_ashrrev_i32_e32 v2, 1, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v6, v2, v4
	v_add_nc_u32_e32 v2, v6, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[2:3], 3, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s54, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s55, v3, vcc_lo
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(0)
	v_cmpx_neq_f64_e32 v[2:3], v[0:1]
	s_cbranch_execz .LBB3_368
; %bb.363:                              ;   in Loop: Header=BB3_362 Depth=2
	s_mov_b32 s3, exec_lo
	v_cmpx_nlt_f64_e32 v[2:3], v[0:1]
	s_cbranch_execz .LBB3_367
; %bb.364:                              ;   in Loop: Header=BB3_362 Depth=2
	s_mov_b32 s4, exec_lo
	v_cmpx_gt_f64_e32 v[2:3], v[0:1]
; %bb.365:                              ;   in Loop: Header=BB3_362 Depth=2
	v_mov_b32_e32 v7, v6
; %bb.366:                              ; %Flow720
                                        ;   in Loop: Header=BB3_362 Depth=2
	s_or_b32 exec_lo, exec_lo, s4
	v_mov_b32_e32 v6, v4
.LBB3_367:                              ; %Flow722
                                        ;   in Loop: Header=BB3_362 Depth=2
	s_or_b32 exec_lo, exec_lo, s3
	s_delay_alu instid0(VALU_DEP_1)
	v_mov_b32_e32 v4, v6
	v_mov_b32_e32 v6, v7
.LBB3_368:                              ;   in Loop: Header=BB3_362 Depth=2
	s_or_b32 exec_lo, exec_lo, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v7, v6 :: v_dual_add_nc_u32 v2, 1, v4
	v_cmp_ge_i32_e32 vcc_lo, v2, v6
	s_or_b32 s1, vcc_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB3_362
; %bb.369:                              ; %_Z8samplingP12hiprandStatePdii.exit54.i.i.i163
                                        ;   in Loop: Header=BB3_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	v_dual_mov_b32 v77, v74 :: v_dual_add_nc_u32 v2, v4, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[2:3], 3, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s54, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s55, v3, vcc_lo
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(0)
	v_cmp_lt_f64_e32 vcc_lo, v[2:3], v[0:1]
	v_cndmask_b32_e32 v5, -1, v6, vcc_lo
	v_cmp_nge_f64_e32 vcc_lo, v[2:3], v[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e32 v49, v4, v5, vcc_lo
.LBB3_370:                              ; %Flow726
                                        ;   in Loop: Header=BB3_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $vgpr51
                                        ; implicit-def: $vgpr45
                                        ; implicit-def: $vgpr74
                                        ; implicit-def: $vgpr88
                                        ; implicit-def: $vgpr83
                                        ; implicit-def: $vgpr81
                                        ; implicit-def: $vgpr87
.LBB3_371:                              ; %Flow732
                                        ;   in Loop: Header=BB3_3 Depth=1
	s_and_not1_saveexec_b32 s0, s22
	s_cbranch_execz .LBB3_381
; %bb.372:                              ;   in Loop: Header=BB3_3 Depth=1
	v_lshrrev_b32_e32 v0, 2, v77
	v_lshlrev_b32_e32 v1, 4, v74
	v_lshrrev_b32_e32 v3, 2, v88
	v_mad_u64_u32 v[4:5], null, 0xb4, v45, v[51:52]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_xor_b32_e32 v0, v0, v77
	v_add_nc_u32_e32 v85, 0xb0f8a, v83
	s_mov_b32 s1, 0
	v_mov_b32_e32 v7, 32
	v_dual_mov_b32 v5, 0 :: v_dual_lshlrev_b32 v2, 1, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v1, v2, v1
	v_xor_b32_e32 v2, v3, v88
	v_xor3_b32 v79, v1, v0, v74
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v0, 1, v2
	v_lshlrev_b32_e32 v1, 4, v79
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v0, v0, v1
	v_xor3_b32 v78, v0, v2, v79
	v_add3_u32 v2, v83, v79, 0x587c5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v0, v78, v85
	v_cvt_f64_u32_e32 v[2:3], v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v0, 11, v0
	v_cvt_f64_u32_e32 v[0:1], v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[0:1], v[0:1], 32
	v_add_f64 v[0:1], v[0:1], v[2:3]
	v_mad_u64_u32 v[2:3], null, v4, 33, 0xffffffffffffe8ab
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[0:1], 0x3ca00000, v[0:1], 0x3ca00000
.LBB3_373:                              ; %.lr.ph.i.i.i.i.i170
                                        ;   Parent Loop BB3_3 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_sub_nc_u32_e32 v3, v7, v5
	s_mov_b32 s2, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v4, 31, v3
	v_add_nc_u32_e32 v3, v3, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 1, v3
	v_add_nc_u32_e32 v6, v3, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v3, v6, v2
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 3, v[3:4]
	v_add_co_u32 v3, vcc_lo, s54, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, s55, v4, vcc_lo
	global_load_b64 v[3:4], v[3:4], off
	s_waitcnt vmcnt(0)
	v_cmpx_neq_f64_e32 v[3:4], v[0:1]
	s_cbranch_execz .LBB3_379
; %bb.374:                              ;   in Loop: Header=BB3_373 Depth=2
	s_mov_b32 s3, exec_lo
	v_cmpx_nlt_f64_e32 v[3:4], v[0:1]
	s_cbranch_execz .LBB3_378
; %bb.375:                              ;   in Loop: Header=BB3_373 Depth=2
	s_mov_b32 s4, exec_lo
	v_cmpx_gt_f64_e32 v[3:4], v[0:1]
; %bb.376:                              ;   in Loop: Header=BB3_373 Depth=2
	v_mov_b32_e32 v7, v6
; %bb.377:                              ; %Flow727
                                        ;   in Loop: Header=BB3_373 Depth=2
	s_or_b32 exec_lo, exec_lo, s4
	v_mov_b32_e32 v6, v5
.LBB3_378:                              ; %Flow729
                                        ;   in Loop: Header=BB3_373 Depth=2
	s_or_b32 exec_lo, exec_lo, s3
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v5, v6 :: v_dual_mov_b32 v6, v7
.LBB3_379:                              ;   in Loop: Header=BB3_373 Depth=2
	s_or_b32 exec_lo, exec_lo, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, 1, v5
	v_mov_b32_e32 v7, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ge_i32_e32 vcc_lo, v3, v6
	s_or_b32 s1, vcc_lo, s1
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB3_373
; %bb.380:                              ; %_Z8samplingP12hiprandStatePdii.exit.i.i.i175
                                        ;   in Loop: Header=BB3_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	v_dual_mov_b32 v77, v87 :: v_dual_add_nc_u32 v2, v5, v2
	v_mov_b32_e32 v86, v81
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[2:3], 3, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s54, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s55, v3, vcc_lo
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(0)
	v_cmp_lt_f64_e32 vcc_lo, v[2:3], v[0:1]
	v_cndmask_b32_e32 v4, -1, v6, vcc_lo
	v_cmp_nge_f64_e32 vcc_lo, v[2:3], v[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_dual_mov_b32 v80, v74 :: v_dual_cndmask_b32 v49, v5, v4
.LBB3_381:                              ; %Flow733
                                        ;   in Loop: Header=BB3_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_mov_b32 s33, exec_lo
	v_cmpx_lt_i32_e32 0, v49
	s_cbranch_execz .LBB3_451
; %bb.382:                              ; %.preheader27.i63
                                        ;   in Loop: Header=BB3_3 Depth=1
	v_div_scale_f64 v[0:1], null, s[66:67], s[66:67], v[66:67]
	v_div_scale_f64 v[2:3], null, s[64:65], s[64:65], v[47:48]
	v_div_scale_f64 v[12:13], vcc_lo, v[66:67], s[66:67], v[66:67]
	v_cmp_gt_f64_e64 s22, 1.0, v[62:63]
	v_cmp_ngt_f64_e64 s44, 1.0, v[62:63]
	s_mov_b32 s46, 0
	s_mov_b32 s47, 0
	v_rcp_f64_e32 v[4:5], v[0:1]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_rcp_f64_e32 v[6:7], v[2:3]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[8:9], -v[0:1], v[4:5], 1.0
	v_fma_f64 v[10:11], -v[2:3], v[6:7], 1.0
	v_fma_f64 v[4:5], v[4:5], v[8:9], v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[6:7], v[6:7], v[10:11], v[6:7]
	v_fma_f64 v[8:9], -v[0:1], v[4:5], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[10:11], -v[2:3], v[6:7], 1.0
	v_fma_f64 v[4:5], v[4:5], v[8:9], v[4:5]
	v_div_scale_f64 v[8:9], s0, v[47:48], s[64:65], v[47:48]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[6:7], v[6:7], v[10:11], v[6:7]
	v_mul_f64 v[10:11], v[12:13], v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[14:15], v[8:9], v[6:7]
	v_fma_f64 v[0:1], -v[0:1], v[10:11], v[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[2:3], -v[2:3], v[14:15], v[8:9]
	v_div_fmas_f64 v[0:1], v[0:1], v[4:5], v[10:11]
	s_mov_b32 vcc_lo, s0
	s_movk_i32 s0, 0xb4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_fmas_f64 v[2:3], v[2:3], v[6:7], v[14:15]
	v_div_fixup_f64 v[0:1], v[0:1], s[66:67], v[66:67]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_fixup_f64 v[2:3], v[2:3], s[64:65], v[47:48]
	v_mul_f64 v[0:1], 0x40690000, v[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[2:3], 0x40668000, v[2:3]
	v_ceil_f64_e32 v[0:1], v[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ceil_f64_e32 v[2:3], v[2:3]
	v_cvt_i32_f64_e32 v0, v[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_i32_f64_e32 v1, v[2:3]
	v_cndmask_b32_e64 v2, v0, 1, s20
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v3, v1, 1, s21
	v_min_i32_e32 v4, 0xc8, v2
	v_cmp_lt_i32_e32 vcc_lo, 0, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_min_i32_e32 v5, 0xb4, v3
	v_mad_u64_u32 v[0:1], null, v4, s0, 0xffffffffffffff4c
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v0, 0, v0 :: v_dual_add_nc_u32 v1, -1, v5
	v_cmp_lt_i32_e32 vcc_lo, 0, v3
	v_cndmask_b32_e32 v1, 0, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v0, v1, v0
	v_mul_lo_u32 v47, 0xbb8, v0
.LBB3_383:                              ;   Parent Loop BB3_3 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB3_387 Depth 3
                                        ;       Child Loop BB3_397 Depth 3
                                        ;       Child Loop BB3_405 Depth 3
                                        ;       Child Loop BB3_411 Depth 3
                                        ;       Child Loop BB3_420 Depth 3
                                        ;       Child Loop BB3_424 Depth 3
                                        ;       Child Loop BB3_432 Depth 3
                                        ;       Child Loop BB3_438 Depth 3
                                        ;       Child Loop BB3_447 Depth 3
	s_mov_b32 s1, s44
                                        ; implicit-def: $vgpr51
                                        ; implicit-def: $vgpr48
                                        ; implicit-def: $vgpr0
                                        ; implicit-def: $vgpr50
	s_and_saveexec_b32 s0, s22
	s_cbranch_execz .LBB3_385
; %bb.384:                              ;   in Loop: Header=BB3_383 Depth=2
	v_lshrrev_b32_e32 v0, 2, v77
	v_lshlrev_b32_e32 v1, 4, v78
	v_lshrrev_b32_e32 v3, 2, v86
	v_add_nc_u32_e32 v50, 0xb0f8a, v85
	s_and_not1_b32 s1, s44, exec_lo
	v_xor_b32_e32 v0, v0, v77
	v_dual_mov_b32 v77, v80 :: v_dual_mov_b32 v80, v78
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v2, 1, v0
	v_xor_b32_e32 v1, v2, v1
	v_xor_b32_e32 v2, v3, v86
	v_mov_b32_e32 v86, v79
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor3_b32 v48, v1, v0, v78
	v_dual_mov_b32 v79, v48 :: v_dual_lshlrev_b32 v0, 1, v2
	v_lshlrev_b32_e32 v1, 4, v48
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v0, v0, v1
	v_xor3_b32 v51, v0, v2, v48
	v_add3_u32 v2, v85, v48, 0x587c5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_mov_b32 v85, v50 :: v_dual_add_nc_u32 v0, v51, v50
	v_cvt_f64_u32_e32 v[2:3], v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v0, 11, v0
	v_cvt_f64_u32_e32 v[0:1], v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[0:1], v[0:1], 32
	v_add_f64 v[0:1], v[0:1], v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[0:1], 0x3ca00000, v[0:1], 0x3ca00000
	v_cmp_ngt_f64_e32 vcc_lo, v[0:1], v[62:63]
	v_mov_b32_e32 v0, v78
	v_mov_b32_e32 v78, v51
	s_and_b32 s2, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s1, s1, s2
.LBB3_385:                              ; %Flow648
                                        ;   in Loop: Header=BB3_383 Depth=2
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s68, s1
	s_cbranch_execz .LBB3_449
; %bb.386:                              ; %_Z9get_bin_xd.exit.i.i
                                        ;   in Loop: Header=BB3_383 Depth=2
	v_lshrrev_b32_e32 v0, 2, v77
	v_lshlrev_b32_e32 v1, 4, v78
	v_lshrrev_b32_e32 v3, 2, v86
	v_add_nc_u32_e32 v50, 0xb0f8a, v85
	s_mov_b32 s0, 0
	v_xor_b32_e32 v0, v0, v77
	v_mov_b32_e32 v52, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v2, 1, v0
	v_xor_b32_e32 v1, v1, v2
	v_xor_b32_e32 v2, v3, v86
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor3_b32 v48, v1, v78, v0
	v_lshlrev_b32_e32 v0, 1, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v1, 4, v48
	v_xor_b32_e32 v0, v0, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_xor3_b32 v51, v0, v2, v48
	v_add3_u32 v2, v85, v48, 0x587c5
	v_add_nc_u32_e32 v0, v51, v50
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_u32_e32 v[2:3], v2
	v_lshrrev_b32_e32 v0, 11, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f64_u32_e32 v[0:1], v0
	v_ldexp_f64 v[0:1], v[0:1], 32
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[0:1], v[0:1], v[2:3]
	v_mov_b32_e32 v2, 0xbb7
	v_fma_f64 v[43:44], 0x3ca00000, v[0:1], 0x3ca00000
.LBB3_387:                              ; %.lr.ph.i.i.i.i.i.i83
                                        ;   Parent Loop BB3_3 Depth=1
                                        ;     Parent Loop BB3_383 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v0, v2, v52
	s_mov_b32 s1, exec_lo
	v_lshrrev_b32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v0, v0, v1
	v_ashrrev_i32_e32 v0, 1, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v66, v0, v52
	v_add_nc_u32_e32 v0, v66, v47
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[0:1], 3, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s52, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s53, v1, vcc_lo
	global_load_b64 v[0:1], v[0:1], off
	s_waitcnt vmcnt(0)
	v_cmpx_neq_f64_e32 v[0:1], v[43:44]
	s_cbranch_execz .LBB3_393
; %bb.388:                              ;   in Loop: Header=BB3_387 Depth=3
	s_mov_b32 s2, exec_lo
	v_cmpx_nlt_f64_e32 v[0:1], v[43:44]
	s_cbranch_execz .LBB3_392
; %bb.389:                              ;   in Loop: Header=BB3_387 Depth=3
	s_mov_b32 s3, exec_lo
	v_cmpx_gt_f64_e32 v[0:1], v[43:44]
; %bb.390:                              ;   in Loop: Header=BB3_387 Depth=3
	v_mov_b32_e32 v2, v66
; %bb.391:                              ; %Flow641
                                        ;   in Loop: Header=BB3_387 Depth=3
	s_or_b32 exec_lo, exec_lo, s3
	v_mov_b32_e32 v66, v52
.LBB3_392:                              ; %Flow643
                                        ;   in Loop: Header=BB3_387 Depth=3
	s_or_b32 exec_lo, exec_lo, s2
	s_delay_alu instid0(VALU_DEP_1)
	v_mov_b32_e32 v52, v66
	v_mov_b32_e32 v66, v2
.LBB3_393:                              ;   in Loop: Header=BB3_387 Depth=3
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v0, 1, v52
	v_mov_b32_e32 v2, v66
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ge_i32_e32 vcc_lo, v0, v66
	s_or_b32 s0, vcc_lo, s0
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB3_387
; %bb.394:                              ; %_Z11get_hittimeddiPdP12hiprandState.exit.i88
                                        ;   in Loop: Header=BB3_383 Depth=2
	s_or_b32 exec_lo, exec_lo, s0
	v_add_nc_u32_e32 v0, v52, v47
	v_dual_mov_b32 v37, v76 :: v_dual_mov_b32 v4, 0
	v_mov_b32_e32 v5, 0
	s_load_b64 s[20:21], s[34:35], 0x50
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[0:1], 3, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s52, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s53, v1, vcc_lo
	global_load_b64 v[45:46], v[0:1], off
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v37
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v37
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB3_400
; %bb.395:                              ;   in Loop: Header=BB3_383 Depth=2
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[2:3], v38, s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[0:1], v38, s[20:21] offset:40
	global_load_b64 v[4:5], v38, s[20:21]
	s_mov_b32 s2, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v3
	v_and_b32_e32 v0, v0, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v1, v1, 24
	v_mul_hi_u32 v6, v0, 24
	v_mul_lo_u32 v0, v0, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v1, v6, v1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v0, vcc_lo, v4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, v5, v1, vcc_lo
	global_load_b64 v[0:1], v[0:1], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[4:5], v38, v[0:3], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[4:5], v[2:3]
	s_cbranch_execz .LBB3_399
; %bb.396:                              ; %.preheader3.i.i.i.i106.preheader
                                        ;   in Loop: Header=BB3_383 Depth=2
	s_mov_b32 s3, 0
.LBB3_397:                              ; %.preheader3.i.i.i.i106
                                        ;   Parent Loop BB3_3 Depth=1
                                        ;     Parent Loop BB3_383 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[0:1], v38, s[20:21] offset:40
	global_load_b64 v[6:7], v38, s[20:21]
	v_dual_mov_b32 v2, v4 :: v_dual_mov_b32 v3, v5
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v0, v0, v2
	v_and_b32_e32 v1, v1, v3
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[4:5], null, v0, 24, v[6:7]
	v_mov_b32_e32 v0, v5
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v1, 24, v[0:1]
	global_load_b64 v[0:1], v[4:5], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[4:5], v38, v[0:3], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[4:5], v[2:3]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB3_397
; %bb.398:                              ; %Flow638
                                        ;   in Loop: Header=BB3_383 Depth=2
	s_or_b32 exec_lo, exec_lo, s3
.LBB3_399:                              ; %Flow640
                                        ;   in Loop: Header=BB3_383 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB3_400:                              ; %.loopexit4.i.i.i.i91
                                        ;   in Loop: Header=BB3_383 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[6:7], v38, s[20:21] offset:40
	global_load_b128 v[0:3], v38, s[20:21]
	v_readfirstlane_b32 s2, v4
	v_readfirstlane_b32 s3, v5
	s_mov_b32 s8, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v6
	v_readfirstlane_b32 s5, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB3_402
; %bb.401:                              ;   in Loop: Header=BB3_383 Depth=2
	s_add_i32 s10, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v4, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v5, vcc_lo, s10, v1, vcc_lo
	v_dual_mov_b32 v39, s8 :: v_dual_mov_b32 v40, v38
	global_store_b128 v[4:5], v[39:42], off offset:8
.LBB3_402:                              ;   in Loop: Header=BB3_383 Depth=2
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[4:5], 6, v[37:38]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_mov_b32 s29, s28
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v2, v4
	s_mov_b32 s30, s28
	s_mov_b32 s31, s28
	v_add_co_ci_u32_e32 v7, vcc_lo, v3, v5, vcc_lo
	v_dual_mov_b32 v37, v38 :: v_dual_mov_b32 v2, s28
	v_dual_mov_b32 v39, v38 :: v_dual_mov_b32 v4, s30
	v_mov_b32_e32 v3, s29
	v_mov_b32_e32 v5, s31
	s_clause 0x3
	global_store_b128 v[6:7], v[36:39], off
	global_store_b128 v[6:7], v[2:5], off offset:16
	global_store_b128 v[6:7], v[2:5], off offset:32
	global_store_b128 v[6:7], v[2:5], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB3_410
; %bb.403:                              ;   in Loop: Header=BB3_383 Depth=2
	s_clause 0x1
	global_load_b64 v[12:13], v38, s[20:21] offset:32 glc
	global_load_b64 v[2:3], v38, s[20:21] offset:40
	s_mov_b32 s5, exec_lo
	v_dual_mov_b32 v10, s2 :: v_dual_mov_b32 v11, s3
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v3, s3, v3
	v_and_b32_e32 v2, s2, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v3, v3, 24
	v_mul_hi_u32 v4, v2, 24
	v_mul_lo_u32 v2, v2, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v4, v3
	v_add_co_u32 v8, vcc_lo, v0, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v9, vcc_lo, v1, v3, vcc_lo
	global_store_b64 v[8:9], v[12:13], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v38, v[10:13], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[12:13]
	s_cbranch_execz .LBB3_406
; %bb.404:                              ; %.preheader1.i.i.i.i104.preheader
                                        ;   in Loop: Header=BB3_383 Depth=2
	s_mov_b32 s8, 0
.LBB3_405:                              ; %.preheader1.i.i.i.i104
                                        ;   Parent Loop BB3_3 Depth=1
                                        ;     Parent Loop BB3_383 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
	s_sleep 1
	global_store_b64 v[8:9], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v38, v[2:5], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB3_405
.LBB3_406:                              ; %Flow636
                                        ;   in Loop: Header=BB3_383 Depth=2
	s_or_b32 exec_lo, exec_lo, s5
	global_load_b64 v[2:3], v38, s[20:21] offset:16
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v4, s8, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB3_408
; %bb.407:                              ;   in Loop: Header=BB3_383 Depth=2
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v37, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[37:38], off offset:8
.LBB3_408:                              ;   in Loop: Header=BB3_383 Depth=2
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB3_410
; %bb.409:                              ;   in Loop: Header=BB3_383 Depth=2
	global_load_b32 v37, v[2:3], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v37
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[37:38], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB3_410:                              ; %Flow637
                                        ;   in Loop: Header=BB3_383 Depth=2
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB3_411:                              ;   Parent Loop BB3_3 Depth=1
                                        ;     Parent Loop BB3_383 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB3_413
; %bb.412:                              ;   in Loop: Header=BB3_411 Depth=3
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB3_413:                              ;   in Loop: Header=BB3_411 Depth=3
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB3_415
; %bb.414:                              ;   in Loop: Header=BB3_411 Depth=3
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB3_416
.LBB3_415:                              ;   in Loop: Header=BB3_411 Depth=3
	s_mov_b32 s1, -1
.LBB3_416:                              ; %Flow631
                                        ;   in Loop: Header=BB3_411 Depth=3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB3_411
; %bb.417:                              ;   in Loop: Header=BB3_383 Depth=2
	global_load_b64 v[0:1], v[6:7], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB3_421
; %bb.418:                              ;   in Loop: Header=BB3_383 Depth=2
	s_clause 0x2
	global_load_b64 v[4:5], v38, s[20:21] offset:40
	global_load_b64 v[8:9], v38, s[20:21] offset:24 glc
	global_load_b64 v[6:7], v38, s[20:21]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v10, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v11, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v10, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v11, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v11 :: v_dual_cndmask_b32 v2, v2, v10
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v4, v2, v4
	v_mul_hi_u32 v10, v4, 24
	v_mul_lo_u32 v4, v4, 24
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v8
	v_mul_lo_u32 v5, v5, 24
	v_add_nc_u32_e32 v5, v10, v5
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v9
	global_store_b64 v[6:7], v[8:9], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v38, v[2:5], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[8:9]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB3_421
; %bb.419:                              ; %.preheader.i.i.i.i103.preheader
                                        ;   in Loop: Header=BB3_383 Depth=2
	s_mov_b32 s0, 0
.LBB3_420:                              ; %.preheader.i.i.i.i103
                                        ;   Parent Loop BB3_3 Depth=1
                                        ;     Parent Loop BB3_383 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[8:9], v38, v[2:5], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[8:9], v[4:5]
	v_dual_mov_b32 v4, v8 :: v_dual_mov_b32 v5, v9
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB3_420
.LBB3_421:                              ; %__ockl_printf_begin.exit.i93
                                        ;   in Loop: Header=BB3_383 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	s_add_u32 s8, s18, 0x88
	s_addc_u32 s9, s19, 0
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str@rel32@lo+4
	s_addc_u32 s1, s1, .str@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	v_dual_mov_b32 v2, s0 :: v_dual_mov_b32 v3, s1
	v_dual_mov_b32 v4, s48 :: v_dual_mov_b32 v5, v38
	v_mov_b32_e32 v6, v38
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __ockl_printf_append_string_n@rel32@lo+4
	s_addc_u32 s3, s3, __ockl_printf_append_string_n@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_swappc_b64 s[30:31], s[2:3]
	v_dual_mov_b32 v37, v76 :: v_dual_mov_b32 v2, 0
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v37
	v_mov_b32_e32 v3, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v37
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB3_427
; %bb.422:                              ;   in Loop: Header=BB3_383 Depth=2
	global_load_b64 v[4:5], v38, s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[2:3], v38, s[20:21] offset:40
	global_load_b64 v[6:7], v38, s[20:21]
	s_mov_b32 s2, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v3, v3, v5
	v_and_b32_e32 v2, v2, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v3, v3, 24
	v_mul_hi_u32 v8, v2, 24
	v_mul_lo_u32 v2, v2, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v8, v3
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v6, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, v7, v3, vcc_lo
	global_load_b64 v[2:3], v[2:3], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[2:3], v38, v[2:5], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[2:3], v[4:5]
	s_cbranch_execz .LBB3_426
; %bb.423:                              ; %.preheader3.i.i.i26.i102.preheader
                                        ;   in Loop: Header=BB3_383 Depth=2
	s_mov_b32 s3, 0
.LBB3_424:                              ; %.preheader3.i.i.i26.i102
                                        ;   Parent Loop BB3_3 Depth=1
                                        ;     Parent Loop BB3_383 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[6:7], v38, s[20:21] offset:40
	global_load_b64 v[8:9], v38, s[20:21]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v6, v6, v4
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[2:3], null, v6, 24, v[8:9]
	v_and_b32_e32 v8, v7, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[6:7], null, v8, 24, v[3:4]
	v_mov_b32_e32 v3, v6
	global_load_b64 v[2:3], v[2:3], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[2:3], v38, v[2:5], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB3_424
; %bb.425:                              ; %Flow624
                                        ;   in Loop: Header=BB3_383 Depth=2
	s_or_b32 exec_lo, exec_lo, s3
.LBB3_426:                              ; %Flow626
                                        ;   in Loop: Header=BB3_383 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB3_427:                              ; %.loopexit4.i.i.i21.i95
                                        ;   in Loop: Header=BB3_383 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_clause 0x1
	global_load_b64 v[8:9], v38, s[20:21] offset:40
	global_load_b128 v[4:7], v38, s[20:21]
	v_readfirstlane_b32 s4, v2
	v_readfirstlane_b32 s5, v3
	s_mov_b32 s1, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s2, v8
	v_readfirstlane_b32 s3, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[2:3], s[4:5], s[2:3]
	s_mul_i32 s6, s3, 24
	s_mul_hi_u32 s7, s2, 24
	s_mul_i32 s8, s2, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB3_429
; %bb.428:                              ;   in Loop: Header=BB3_383 Depth=2
	s_add_i32 s10, s7, s6
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v4, s8
	v_add_co_ci_u32_e32 v3, vcc_lo, s10, v5, vcc_lo
	v_dual_mov_b32 v39, s1 :: v_dual_mov_b32 v40, v38
	global_store_b128 v[2:3], v[39:42], off offset:8
.LBB3_429:                              ;   in Loop: Header=BB3_383 Depth=2
	s_or_b32 exec_lo, exec_lo, s9
	v_cmp_lt_f64_e32 vcc_lo, v[45:46], v[43:44]
	v_cmp_nge_f64_e64 s1, v[45:46], v[43:44]
	s_lshl_b64 s[2:3], s[2:3], 12
	v_lshlrev_b64 v[2:3], 6, v[37:38]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v6, s2, v6, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e64 v7, s2, s3, v7, s2
	s_mov_b32 s29, s28
	v_add_co_u32 v10, s2, v6, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v11, s2, v7, v3, s2
	s_mov_b32 s30, s28
	s_mov_b32 s31, s28
	v_dual_mov_b32 v6, s28 :: v_dual_mov_b32 v7, s29
	v_dual_mov_b32 v8, s30 :: v_dual_mov_b32 v9, s31
	v_and_or_b32 v0, 0xffffff1d, v0, 34
	s_clause 0x2
	global_store_b128 v[10:11], v[6:9], off offset:16
	global_store_b128 v[10:11], v[6:9], off offset:32
	global_store_b128 v[10:11], v[6:9], off offset:48
	v_cndmask_b32_e32 v2, -1, v66, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v2, v52, v2, s1
	v_cvt_f64_i32_e32 v[2:3], v2
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[2:3], v[64:65], v[2:3]
	global_store_b128 v[10:11], v[0:3], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB3_437
; %bb.430:                              ;   in Loop: Header=BB3_383 Depth=2
	s_clause 0x1
	global_load_b64 v[10:11], v38, s[20:21] offset:32 glc
	global_load_b64 v[0:1], v38, s[20:21] offset:40
	v_dual_mov_b32 v8, s4 :: v_dual_mov_b32 v9, s5
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s2, v0
	v_readfirstlane_b32 s3, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[2:3], s[2:3], s[4:5]
	s_mul_i32 s3, s3, 24
	s_mul_hi_u32 s9, s2, 24
	s_mul_i32 s2, s2, 24
	s_add_i32 s9, s9, s3
	v_add_co_u32 v0, vcc_lo, v4, s2
	v_add_co_ci_u32_e32 v1, vcc_lo, s9, v5, vcc_lo
	s_mov_b32 s2, exec_lo
	global_store_b64 v[0:1], v[10:11], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[8:9], v38, v[8:11], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[8:9], v[10:11]
	s_cbranch_execz .LBB3_433
; %bb.431:                              ; %.preheader1.i.i.i24.i100.preheader
                                        ;   in Loop: Header=BB3_383 Depth=2
	s_mov_b32 s3, 0
.LBB3_432:                              ; %.preheader1.i.i.i24.i100
                                        ;   Parent Loop BB3_3 Depth=1
                                        ;     Parent Loop BB3_383 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	v_dual_mov_b32 v6, s4 :: v_dual_mov_b32 v7, s5
	s_sleep 1
	global_store_b64 v[0:1], v[8:9], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[6:7], v38, v[6:9], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[8:9]
	v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB3_432
.LBB3_433:                              ; %Flow622
                                        ;   in Loop: Header=BB3_383 Depth=2
	s_or_b32 exec_lo, exec_lo, s2
	global_load_b64 v[0:1], v38, s[20:21] offset:16
	s_mov_b32 s3, exec_lo
	s_mov_b32 s2, exec_lo
	v_mbcnt_lo_u32_b32 v6, s3, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v6
	s_cbranch_execz .LBB3_435
; %bb.434:                              ;   in Loop: Header=BB3_383 Depth=2
	s_bcnt1_i32_b32 s3, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v37, s3
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[0:1], v[37:38], off offset:8
.LBB3_435:                              ;   in Loop: Header=BB3_383 Depth=2
	s_or_b32 exec_lo, exec_lo, s2
	s_waitcnt vmcnt(0)
	global_load_b64 v[6:7], v[0:1], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[6:7]
	s_cbranch_vccnz .LBB3_437
; %bb.436:                              ;   in Loop: Header=BB3_383 Depth=2
	global_load_b32 v37, v[0:1], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s2, v37
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[6:7], v[37:38], off
	s_and_b32 m0, s2, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB3_437:                              ; %Flow623
                                        ;   in Loop: Header=BB3_383 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	s_add_i32 s7, s7, s6
	v_add_co_u32 v0, vcc_lo, v4, s8
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB3_438:                              ;   Parent Loop BB3_3 Depth=1
                                        ;     Parent Loop BB3_383 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	v_mov_b32_e32 v4, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB3_440
; %bb.439:                              ;   in Loop: Header=BB3_438 Depth=3
	global_load_b32 v4, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v4, 1, v4
.LBB3_440:                              ;   in Loop: Header=BB3_438 Depth=3
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v4
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB3_442
; %bb.441:                              ;   in Loop: Header=BB3_438 Depth=3
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB3_443
.LBB3_442:                              ;   in Loop: Header=BB3_438 Depth=3
	s_mov_b32 s1, -1
.LBB3_443:                              ; %Flow617
                                        ;   in Loop: Header=BB3_438 Depth=3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB3_438
; %bb.444:                              ;   in Loop: Header=BB3_383 Depth=2
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB3_448
; %bb.445:                              ;   in Loop: Header=BB3_383 Depth=2
	s_clause 0x2
	global_load_b64 v[0:1], v38, s[20:21] offset:40
	global_load_b64 v[8:9], v38, s[20:21] offset:24 glc
	global_load_b64 v[6:7], v38, s[20:21]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v10, vcc_lo, v0, 1
	v_add_co_ci_u32_e32 v11, vcc_lo, 0, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, v10, s4
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v11, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	v_dual_cndmask_b32 v5, v5, v11 :: v_dual_cndmask_b32 v4, v4, v10
	v_and_b32_e32 v1, v5, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v0, v4, v0
	v_mul_hi_u32 v10, v0, 24
	v_mul_lo_u32 v0, v0, 24
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_u32 v0, vcc_lo, v6, v0
	v_mov_b32_e32 v6, v8
	v_mul_lo_u32 v1, v1, 24
	v_add_nc_u32_e32 v1, v10, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e32 v1, vcc_lo, v7, v1, vcc_lo
	v_mov_b32_e32 v7, v9
	global_store_b64 v[0:1], v[8:9], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[6:7], v38, v[4:7], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[6:7], v[8:9]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB3_448
; %bb.446:                              ; %.preheader.i.i.i23.i99.preheader
                                        ;   in Loop: Header=BB3_383 Depth=2
	s_mov_b32 s0, 0
.LBB3_447:                              ; %.preheader.i.i.i23.i99
                                        ;   Parent Loop BB3_3 Depth=1
                                        ;     Parent Loop BB3_383 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_sleep 1
	global_store_b64 v[0:1], v[6:7], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[8:9], v38, v[4:7], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[8:9], v[6:7]
	v_dual_mov_b32 v6, v8 :: v_dual_mov_b32 v7, v9
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB3_447
.LBB3_448:                              ; %__ockl_printf_append_args.exit.i97
                                        ;   in Loop: Header=BB3_383 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	global_load_b32 v6, v[60:61], off
	v_dual_mov_b32 v86, v79 :: v_dual_mov_b32 v77, v80
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v0, v6, v75
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[4:5], 3, v[0:1]
	v_dual_mov_b32 v0, v78 :: v_dual_add_nc_u32 v1, 1, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v4, vcc_lo, s58, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s59, v5, vcc_lo
	global_store_b64 v[4:5], v[2:3], off
	global_store_b32 v[60:61], v1, off
.LBB3_449:                              ; %Flow649
                                        ;   in Loop: Header=BB3_383 Depth=2
	s_or_b32 exec_lo, exec_lo, s68
	s_add_i32 s47, s47, 1
	v_dual_mov_b32 v85, v50 :: v_dual_mov_b32 v80, v0
	v_cmp_eq_u32_e32 vcc_lo, s47, v49
	v_dual_mov_b32 v79, v48 :: v_dual_mov_b32 v78, v51
	s_or_b32 s46, vcc_lo, s46
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s46
	s_cbranch_execnz .LBB3_383
; %bb.450:                              ; %Flow650
                                        ;   in Loop: Header=BB3_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s46
	v_dual_mov_b32 v78, v51 :: v_dual_mov_b32 v79, v48
	v_dual_mov_b32 v80, v0 :: v_dual_mov_b32 v85, v50
.LBB3_451:                              ; %Flow651
                                        ;   in Loop: Header=BB3_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s33
	s_add_i32 s49, s49, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s49, s72
	s_cbranch_scc1 .LBB3_3
.LBB3_452:                              ; %.loopexit
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z24step_calculate_every_pmtPdS_S_S_S_S_S_S_S_S_iS_S_PiS_S0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 392
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 90
		.amdhsa_next_free_sgpr 105
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end3:
	.size	_Z24step_calculate_every_pmtPdS_S_S_S_S_S_S_S_S_iS_S_PiS_S0_i, .Lfunc_end3-_Z24step_calculate_every_pmtPdS_S_S_S_S_S_S_S_S_iS_S_PiS_S0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 27220
; NumSgprs: 107
; NumVgprs: 90
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 13
; VGPRBlocks: 11
; NumSGPRsForWavesPerEU: 107
; NumVGPRsForWavesPerEU: 90
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	.str,@object                    ; @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.str:
	.asciz	"hittime = %lf\n"
	.size	.str, 15

	.type	_ZZ11get_npe_numiiPdP12hiprandStateE7warning,@object ; @_ZZ11get_npe_numiiPdP12hiprandStateE7warning
	.local	_ZZ11get_npe_numiiPdP12hiprandStateE7warning
	.comm	_ZZ11get_npe_numiiPdP12hiprandStateE7warning,8,3
	.type	.str.1,@object                  ; @.str.1
.str.1:
	.asciz	"npe lost: %d/%d\n"
	.size	.str.1, 17

	.type	.str.2,@object                  ; @.str.2
.str.2:
	.asciz	"too many npe lost complains.\n"
	.size	.str.2, 30

	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .offset:         0
        .size:           8
        .value_kind:     by_value
      - .offset:         8
        .size:           8
        .value_kind:     by_value
      - .offset:         16
        .size:           8
        .value_kind:     by_value
      - .offset:         24
        .size:           8
        .value_kind:     by_value
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         48
        .size:           8
        .value_kind:     global_buffer
      - .offset:         56
        .size:           8
        .value_kind:     by_value
      - .offset:         64
        .size:           8
        .value_kind:     by_value
      - .offset:         72
        .size:           8
        .value_kind:     by_value
      - .offset:         80
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         88
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         96
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         104
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         112
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         120
        .size:           8
        .value_kind:     global_buffer
      - .offset:         128
        .size:           4
        .value_kind:     by_value
      - .offset:         136
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         140
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         144
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         148
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         150
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         152
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         154
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         156
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         158
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         176
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         184
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         192
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         200
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         216
        .size:           8
        .value_kind:     hidden_hostcall_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 392
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z13pmt_calculateddddPdS_S_dddiS_S_PiS_S0_i
    .private_segment_fixed_size: 0
    .sgpr_count:     62
    .sgpr_spill_count: 0
    .symbol:         _Z13pmt_calculateddddPdS_S_dddiS_S_PiS_S0_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     72
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         48
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         56
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         64
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         72
        .size:           8
        .value_kind:     global_buffer
      - .offset:         80
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         88
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         96
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         104
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         112
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         120
        .size:           8
        .value_kind:     global_buffer
      - .offset:         128
        .size:           4
        .value_kind:     by_value
      - .offset:         136
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         140
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         144
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         148
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         150
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         152
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         154
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         156
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         158
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         176
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         184
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         192
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         200
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         216
        .size:           8
        .value_kind:     hidden_hostcall_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 392
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z24step_calculate_every_pmtPdS_S_S_S_S_S_S_S_S_iS_S_PiS_S0_i
    .private_segment_fixed_size: 0
    .sgpr_count:     107
    .sgpr_spill_count: 0
    .symbol:         _Z24step_calculate_every_pmtPdS_S_S_S_S_S_S_S_S_iS_S_PiS_S0_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     90
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
