#include <stdio.h>

#include <cuda_profiler_api.h>
#include <cuda_runtime_api.h>
#include <stdlib.h>
#include <time.h>


#define DIMX 512

#define cudaCheck(e) do { \
    if (cudaSuccess != (e)) { \
    fprintf(stderr, "Cuda runtime error in line %d of file %s \
    : %s \n", __LINE__, __FILE__, cudaGetErrorString(cudaGetLastError()) ); \
    exit(EXIT_FAILURE); \
    } \
    } while(0);


template <typename DType>
__global__ void reduceGmem(DType* out, DType* in, size_t n) {
    size_t idx = threadIdx.x + blockIdx.x * blockDim.x;
    if(idx >= n) return;
    

    int tid = threadIdx.x; 
    DType* idata = in + blockIdx.x * blockDim.x; 

    if(blockDim.x >= 1024 && tid < 512 ) idata[tid] += idata[tid+512];
    __syncthreads();
    if(blockDim.x >= 512 && tid < 256 ) idata[tid] += idata[tid + 256];
    __syncthreads();
    if(blockDim.x >= 256 && tid < 128 ) idata[tid] += idata[tid + 128];
    __syncthreads();
    if(blockDim.x >= 128 && tid < 64 ) idata[tid] += idata[tid + 64];
    __syncthreads();

    if(tid < 32) {
        volatile DType* vsmem = idata;
        vsmem[tid] += vsmem[tid + 32];
        vsmem[tid] += vsmem[tid + 16];
        vsmem[tid] += vsmem[tid + 8];
        vsmem[tid] += vsmem[tid + 4];
        vsmem[tid] += vsmem[tid + 2];
        vsmem[tid] += vsmem[tid + 1];
    }
    if(tid == 0) {
        out[blockIdx.x] = idata[0];
        //printf("ID:%d, sum:%5f\n", blockIdx.x, idata[0]);
    }
}


template <typename DType>
__global__ void reduceSmem(DType* out, DType* in, size_t n) {
    size_t idx = threadIdx.x + blockIdx.x * blockDim.x;

    __shared__ DType smem[DIMX];
    int tid = threadIdx.x; 
    DType* idata = in + blockIdx.x * blockDim.x; 
    /// global mem. -> shared mem.
    if(idx < n) smem[tid] = idata[tid];
    else smem[tid] = 0;
    __syncthreads();


    if(blockDim.x >= 1024 && tid < 512 ) smem[tid] += smem[tid+512];
    __syncthreads();
    if(blockDim.x >= 512 && tid < 256 ) smem[tid] += smem[tid + 256];
    __syncthreads();
    if(blockDim.x >= 256 && tid < 128 ) smem[tid] += smem[tid + 128];
    __syncthreads();
    if(blockDim.x >= 128 && tid < 64 ) smem[tid] += smem[tid + 64];
    __syncthreads();

    if(tid < 32) {
        volatile DType* vsmem = smem;
        vsmem[tid] += vsmem[tid + 32];
        vsmem[tid] += vsmem[tid + 16];
        vsmem[tid] += vsmem[tid + 8];
        vsmem[tid] += vsmem[tid + 4];
        vsmem[tid] += vsmem[tid + 2];
        vsmem[tid] += vsmem[tid + 1];
    }
    if(tid == 0) {
        out[blockIdx.x] = smem[0];
        //printf("ID:%d, sum:%5f\n", blockIdx.x, idata[0]);
    }
}

template <typename DType>
__global__ void reduceSmemUnroll(DType* out, DType* in, size_t n) {

    __shared__ DType smem[DIMX];
    int tid = threadIdx.x; 
    size_t idx = threadIdx.x + blockIdx.x * blockDim.x * 4;
    /// global mem. -> shared mem.
    DType tmp_sum = 0;
    if(idx + 3 * blockDim.x  < n) {
        DType a1 = in[idx];
        DType a2 = in[idx + blockDim.x];
        DType a3 = in[idx + blockDim.x*2];
        DType a4 = in[idx + blockDim.x*3];
        tmp_sum = a1 + a2 + a3 + a4;
    }
    smem[tid] = tmp_sum;
    __syncthreads();

    if(blockDim.x >= 1024 && tid < 512 ) smem[tid] += smem[tid+512];
    __syncthreads();
    if(blockDim.x >= 512 && tid < 256 ) smem[tid] += smem[tid + 256];
    __syncthreads();
    if(blockDim.x >= 256 && tid < 128 ) smem[tid] += smem[tid + 128];
    __syncthreads();
    if(blockDim.x >= 128 && tid < 64 ) smem[tid] += smem[tid + 64];
    __syncthreads();

    if(tid < 32) {
        volatile DType* vsmem = smem;
        vsmem[tid] += vsmem[tid + 32];
        vsmem[tid] += vsmem[tid + 16];
        vsmem[tid] += vsmem[tid + 8];
        vsmem[tid] += vsmem[tid + 4];
        vsmem[tid] += vsmem[tid + 2];
        vsmem[tid] += vsmem[tid + 1];
    }
    if(tid == 0) {
        out[blockIdx.x] = smem[0];
    }
}


template <typename DType>
__global__ void reduceSmemUnrollDynamic(DType* out, DType* in, size_t n) {

    extern __shared__ DType smem[]; //! dynamic shared memory 
    int tid = threadIdx.x; 
    size_t idx = threadIdx.x + blockIdx.x * blockDim.x * 4;
    /// global mem. -> shared mem.
    DType tmp_sum = 0;
    if(idx + 3 * blockDim.x  < n) {
        DType a1 = in[idx];
        DType a2 = in[idx + blockDim.x];
        DType a3 = in[idx + blockDim.x*2];
        DType a4 = in[idx + blockDim.x*3];
        tmp_sum = a1 + a2 + a3 + a4;
    }
    smem[tid] = tmp_sum;
    __syncthreads();

    if(blockDim.x >= 1024 && tid < 512 ) smem[tid] += smem[tid+512];
    __syncthreads();
    if(blockDim.x >= 512 && tid < 256 ) smem[tid] += smem[tid + 256];
    __syncthreads();
    if(blockDim.x >= 256 && tid < 128 ) smem[tid] += smem[tid + 128];
    __syncthreads();
    if(blockDim.x >= 128 && tid < 64 ) smem[tid] += smem[tid + 64];
    __syncthreads();

    if(tid < 32) {
        volatile DType* vsmem = smem;
        vsmem[tid] += vsmem[tid + 32];
        vsmem[tid] += vsmem[tid + 16];
        vsmem[tid] += vsmem[tid + 8];
        vsmem[tid] += vsmem[tid + 4];
        vsmem[tid] += vsmem[tid + 2];
        vsmem[tid] += vsmem[tid + 1];
    }
    if(tid == 0) {
        out[blockIdx.x] = smem[0];
    }
}

int main(int argc, char* agv[]) {

    srand(time(NULL));
    cudaStream_t stream[2]; 
    cudaCheck(cudaSetDevice(0)); //! CUDA Streams
    for(int i = 0; i < 2; ++i) cudaCheck(cudaStreamCreate(&stream[i]));

    cudaProfilerStart();
    void * buffers[7];
    const size_t N = 1 << 24;
    float * pdata = new float[N];
    float res = 0;
    double res_check = 0;
    for(size_t i = 0; i < N; ++i) {
        //pdata[i] = 1;
        pdata[i] = rand() / double(RAND_MAX) * 0.5;
        res_check += pdata[i];
    }

    const int threads_per_block = DIMX;
    const int num_blocks = (N + threads_per_block - 1) / threads_per_block;
    const int num_blocks2 = (num_blocks + threads_per_block - 1) / threads_per_block;
    printf("threads_per_block:%d, num_blocks:%d, %d\n", threads_per_block, num_blocks, num_blocks2);

    /// allocate gpu mem.
    cudaCheck(cudaMalloc(&buffers[0], sizeof(float)*num_blocks*threads_per_block));
    cudaCheck(cudaMalloc(&buffers[1], sizeof(float)*num_blocks2 * threads_per_block));
    cudaCheck(cudaMalloc(&buffers[2], sizeof(float)*num_blocks2));
    cudaCheck(cudaMalloc(&buffers[3], sizeof(float)*num_blocks*threads_per_block));
    cudaCheck(cudaMalloc(&buffers[4], sizeof(float)*num_blocks2*threads_per_block));
    cudaCheck(cudaMalloc(&buffers[5], sizeof(float)*num_blocks2));
    cudaCheck(cudaMalloc(&buffers[6], sizeof(float)*4));
    
    /// pinned memory
    float * c_buffer;
    cudaCheck(cudaMallocHost(&c_buffer,  sizeof(float)*N));
    double cpu_res = 0.;
    for(size_t i = 0 ; i < N; ++i) {
        c_buffer[i] = rand() / double(RAND_MAX) * 0.1;
        cpu_res += c_buffer[i];
    }
    printf("Starting reduction ...");

    /// cpu mem. -> gpu mem. 
    cudaCheck(cudaMemcpyAsync(buffers[0], pdata, sizeof(float)*N, cudaMemcpyHostToDevice, stream[0]));
    /// reduceGmem
    reduceGmem<float><<<num_blocks, threads_per_block, 0, stream[0]>>>((float*)buffers[1], (float*)buffers[0], N);
    reduceGmem<float><<<num_blocks2, threads_per_block, 0, stream[0]>>>((float*)buffers[2], (float*)buffers[1], num_blocks);
    reduceGmem<float><<<1, threads_per_block, 0, stream[0]>>>((float*)buffers[6], (float*)buffers[2], num_blocks2);

    cudaCheck(cudaMemsetAsync(buffers[1], 0, sizeof(float)*num_blocks2*threads_per_block, stream[0]));
    cudaCheck(cudaMemsetAsync(buffers[2], 0, sizeof(float)*num_blocks2, stream[0]));
    cudaCheck(cudaMemcpyAsync(buffers[0], pdata, sizeof(float)*N, cudaMemcpyHostToDevice, stream[0]));
    /// reduceSmem
    reduceSmem<float><<<num_blocks, threads_per_block, 0, stream[0]>>>((float*)buffers[1], (float*)buffers[0], N);
    reduceSmem<float><<<num_blocks2, threads_per_block, 0, stream[0]>>>((float*)buffers[2], (float*)buffers[1], num_blocks);
    reduceSmem<float><<<1, threads_per_block, 0, stream[0]>>>((float*)buffers[6]+1, (float*)buffers[2], num_blocks2);


    /// stream[1]
    cudaCheck(cudaMemcpyAsync(buffers[3], c_buffer, sizeof(float)*N, cudaMemcpyHostToDevice, stream[1]));
    /// reduceSmemUnroll
    reduceSmemUnroll<float><<<num_blocks / 4, threads_per_block, 0, stream[1]>>>((float*)buffers[4], (float*)buffers[3], N);
    reduceSmemUnroll<float><<<num_blocks2 / 16, threads_per_block, 0, stream[1]>>>((float*)buffers[5], (float*)buffers[4], num_blocks / 4);
    reduceSmem<float><<<1, threads_per_block, 0, stream[1]>>>((float*)buffers[6]+2, (float*)buffers[5], num_blocks2 / 16);


    /// reduceSmemUnrollDynamic
    cudaCheck(cudaMemsetAsync(buffers[4], 0, sizeof(float)*num_blocks2*threads_per_block, stream[1]));
    cudaCheck(cudaMemsetAsync(buffers[5], 0, sizeof(float)*num_blocks2, stream[1]));
    cudaCheck(cudaMemcpyAsync(buffers[3], c_buffer, sizeof(float)*N, cudaMemcpyHostToDevice, stream[1]));

    reduceSmemUnrollDynamic<float><<<num_blocks / 4, threads_per_block, sizeof(float)*threads_per_block, stream[1]>>>((float*)buffers[4], (float*)buffers[3], N);
    reduceSmemUnrollDynamic<float><<<num_blocks2 / 16, threads_per_block, sizeof(float)*threads_per_block, stream[1]>>>((float*)buffers[5], (float*)buffers[4], num_blocks / 4);
    reduceSmem<float><<<1, threads_per_block, 0, stream[1]>>>((float*)buffers[6]+3, (float*)buffers[5], num_blocks2 / 16);

    /// compare results
    cudaCheck(cudaMemcpy(&res, buffers[6], sizeof(float), cudaMemcpyDeviceToHost));
    printf("Global memory GPU Sum:%5f CPU Sum:%5f\n", res, res_check);

    cudaCheck(cudaMemcpy(&res, (float*)buffers[6]+1, sizeof(float), cudaMemcpyDeviceToHost));
    printf("Shared memory GPU Sum:%5f CPU Sum:%5f\n", res, res_check);

    cudaCheck(cudaMemcpy(&res, (float*)buffers[6]+2, sizeof(float), cudaMemcpyDeviceToHost));
    printf("Shared memory Unroll GPU Sum:%5f CPU Sum:%5f\n", res, cpu_res);

    cudaCheck(cudaMemcpy(&res, (float*)buffers[6]+3, sizeof(float), cudaMemcpyDeviceToHost));
    printf("Shared memory Unroll Dynamic GPU Sum:%5f CPU Sum:%5f\n", res, cpu_res);

    /// free 
    cudaDeviceSynchronize();
    cudaProfilerStop();
    for(auto & e: buffers) cudaCheck(cudaFree(e));
    cudaCheck(cudaFreeHost(c_buffer));
    delete [] pdata;


    return 0;
}

	.file	"tmpxft_00207482_00000000-6_share_mem.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2038:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2038:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.type	_Z33__wrapper__device_stub_reduceSmemIfEvRPT_S2_Rm.isra.0, @function
_Z33__wrapper__device_stub_reduceSmemIfEvRPT_S2_Rm.isra.0:
.LFB2190:
	.cfi_startproc
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movq	%rdi, 8(%rsp)
	leaq	40(%rsp), %rcx
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	leaq	48(%rsp), %rdi
	movq	%rax, 104(%rsp)
	leaq	24(%rsp), %rax
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	32(%rsp), %rdx
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movl	$1, 56(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z10reduceSmemIfEvPT_S1_m(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L2:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2190:
	.size	_Z33__wrapper__device_stub_reduceSmemIfEvRPT_S2_Rm.isra.0, .-_Z33__wrapper__device_stub_reduceSmemIfEvRPT_S2_Rm.isra.0
	.section	.text._Z10reduceSmemIfEvPT_S1_m,"axG",@progbits,_Z10reduceSmemIfEvPT_S1_m,comdat
	.weak	_Z10reduceSmemIfEvPT_S1_m
	.type	_Z10reduceSmemIfEvPT_S1_m, @function
_Z10reduceSmemIfEvPT_S1_m:
.LFB2117:
	.cfi_startproc
	endbr64
	jmp	_Z33__wrapper__device_stub_reduceSmemIfEvRPT_S2_Rm.isra.0
	.cfi_endproc
.LFE2117:
	.size	_Z10reduceSmemIfEvPT_S1_m, .-_Z10reduceSmemIfEvPT_S1_m
	.text
	.type	_Z33__wrapper__device_stub_reduceGmemIfEvRPT_S2_Rm.isra.0, @function
_Z33__wrapper__device_stub_reduceGmemIfEvRPT_S2_Rm.isra.0:
.LFB2192:
	.cfi_startproc
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movq	%rdi, 8(%rsp)
	leaq	40(%rsp), %rcx
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	leaq	48(%rsp), %rdi
	movq	%rax, 104(%rsp)
	leaq	24(%rsp), %rax
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	32(%rsp), %rdx
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movl	$1, 56(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z10reduceGmemIfEvPT_S1_m(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L8:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2192:
	.size	_Z33__wrapper__device_stub_reduceGmemIfEvRPT_S2_Rm.isra.0, .-_Z33__wrapper__device_stub_reduceGmemIfEvRPT_S2_Rm.isra.0
	.section	.text._Z10reduceGmemIfEvPT_S1_m,"axG",@progbits,_Z10reduceGmemIfEvPT_S1_m,comdat
	.weak	_Z10reduceGmemIfEvPT_S1_m
	.type	_Z10reduceGmemIfEvPT_S1_m, @function
_Z10reduceGmemIfEvPT_S1_m:
.LFB2116:
	.cfi_startproc
	endbr64
	jmp	_Z33__wrapper__device_stub_reduceGmemIfEvRPT_S2_Rm.isra.0
	.cfi_endproc
.LFE2116:
	.size	_Z10reduceGmemIfEvPT_S1_m, .-_Z10reduceGmemIfEvPT_S1_m
	.text
	.type	_Z39__wrapper__device_stub_reduceSmemUnrollIfEvRPT_S2_Rm.isra.0, @function
_Z39__wrapper__device_stub_reduceSmemUnrollIfEvRPT_S2_Rm.isra.0:
.LFB2193:
	.cfi_startproc
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movq	%rdi, 8(%rsp)
	leaq	40(%rsp), %rcx
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	leaq	48(%rsp), %rdi
	movq	%rax, 104(%rsp)
	leaq	24(%rsp), %rax
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	32(%rsp), %rdx
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movl	$1, 56(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L13
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z16reduceSmemUnrollIfEvPT_S1_m(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L13:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L15
	call	__stack_chk_fail@PLT
.L15:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2193:
	.size	_Z39__wrapper__device_stub_reduceSmemUnrollIfEvRPT_S2_Rm.isra.0, .-_Z39__wrapper__device_stub_reduceSmemUnrollIfEvRPT_S2_Rm.isra.0
	.section	.text._Z16reduceSmemUnrollIfEvPT_S1_m,"axG",@progbits,_Z16reduceSmemUnrollIfEvPT_S1_m,comdat
	.weak	_Z16reduceSmemUnrollIfEvPT_S1_m
	.type	_Z16reduceSmemUnrollIfEvPT_S1_m, @function
_Z16reduceSmemUnrollIfEvPT_S1_m:
.LFB2118:
	.cfi_startproc
	endbr64
	jmp	_Z39__wrapper__device_stub_reduceSmemUnrollIfEvRPT_S2_Rm.isra.0
	.cfi_endproc
.LFE2118:
	.size	_Z16reduceSmemUnrollIfEvPT_S1_m, .-_Z16reduceSmemUnrollIfEvPT_S1_m
	.text
	.type	_Z46__wrapper__device_stub_reduceSmemUnrollDynamicIfEvRPT_S2_Rm.isra.0, @function
_Z46__wrapper__device_stub_reduceSmemUnrollDynamicIfEvRPT_S2_Rm.isra.0:
.LFB2194:
	.cfi_startproc
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movq	%rdi, 8(%rsp)
	leaq	40(%rsp), %rcx
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	leaq	48(%rsp), %rdi
	movq	%rax, 104(%rsp)
	leaq	24(%rsp), %rax
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	32(%rsp), %rdx
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movl	$1, 56(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L18
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z23reduceSmemUnrollDynamicIfEvPT_S1_m(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L18:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L20
	call	__stack_chk_fail@PLT
.L20:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2194:
	.size	_Z46__wrapper__device_stub_reduceSmemUnrollDynamicIfEvRPT_S2_Rm.isra.0, .-_Z46__wrapper__device_stub_reduceSmemUnrollDynamicIfEvRPT_S2_Rm.isra.0
	.section	.text._Z23reduceSmemUnrollDynamicIfEvPT_S1_m,"axG",@progbits,_Z23reduceSmemUnrollDynamicIfEvPT_S1_m,comdat
	.weak	_Z23reduceSmemUnrollDynamicIfEvPT_S1_m
	.type	_Z23reduceSmemUnrollDynamicIfEvPT_S1_m, @function
_Z23reduceSmemUnrollDynamicIfEvPT_S1_m:
.LFB2119:
	.cfi_startproc
	endbr64
	jmp	_Z46__wrapper__device_stub_reduceSmemUnrollDynamicIfEvRPT_S2_Rm.isra.0
	.cfi_endproc
.LFE2119:
	.size	_Z23reduceSmemUnrollDynamicIfEvPT_S1_m, .-_Z23reduceSmemUnrollDynamicIfEvPT_S1_m
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC2:
	.string	"/home/ubuntu/Datasets/stackv2/train-structured/JosephChenHub/CUDA_C_Programming/master/share_mem.cu"
.LC3:
	.string	"Cuda runtime error in line %d of file %s     : %s \n"
.LC6:
	.string	"threads_per_block:%d, num_blocks:%d, %d\n"
.LC8:
	.string	"Starting reduction ..."
.LC9:
	.string	"Global memory GPU Sum:%5f CPU Sum:%5f\n"
.LC10:
	.string	"Shared memory GPU Sum:%5f CPU Sum:%5f\n"
.LC11:
	.string	"Shared memory Unroll GPU Sum:%5f CPU Sum:%5f\n"
.LC12:
	.string	"Shared memory Unroll Dynamic GPU Sum:%5f CPU Sum:%5f\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2035:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	xorl	%edi, %edi
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	subq	$152, %rsp
	.cfi_def_cfa_offset 176
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	call	time@PLT
	movl	%eax, %edi
	call	srand@PLT
	xorl	%edi, %edi
	call	cudaSetDevice@PLT
	testl	%eax, %eax
	jne	.L24
	leaq	64(%rsp), %rdi
	call	cudaStreamCreate@PLT
	testl	%eax, %eax
	jne	.L25
	leaq	72(%rsp), %rdi
	call	cudaStreamCreate@PLT
	testl	%eax, %eax
	jne	.L25
	call	cudaProfilerStart@PLT
	movl	$67108864, %edi
	xorl	%ebp, %ebp
	call	_Znam@PLT
	movl	$0x00000000, 28(%rsp)
	movq	$0x000000000, 8(%rsp)
	movq	%rax, %rbx
	jmp	.L26
.L24:
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	call	cudaGetErrorString@PLT
	leaq	.LC2(%rip), %r8
	movl	$178, %ecx
	movq	%rax, %r9
	jmp	.L69
.L25:
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	call	cudaGetErrorString@PLT
	leaq	.LC2(%rip), %r8
	movl	$179, %ecx
	movq	%rax, %r9
.L69:
	movq	stderr(%rip), %rdi
	leaq	.LC3(%rip), %rdx
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	movl	$1, %edi
	call	exit@PLT
.L26:
	call	rand@PLT
	cvtsi2sdl	%eax, %xmm0
	divsd	.LC4(%rip), %xmm0
	mulsd	.LC5(%rip), %xmm0
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, (%rbx,%rbp,4)
	cvtss2sd	%xmm0, %xmm0
	incq	%rbp
	addsd	8(%rsp), %xmm0
	movsd	%xmm0, 8(%rsp)
	cmpq	$16777216, %rbp
	jne	.L26
	leaq	.LC6(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	movl	$64, %r8d
	movl	$32768, %ecx
	movl	$512, %edx
	call	__printf_chk@PLT
	leaq	80(%rsp), %rdi
	movl	$67108864, %esi
	call	cudaMalloc@PLT
	testl	%eax, %eax
	je	.L27
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	call	cudaGetErrorString@PLT
	leaq	.LC2(%rip), %r8
	movl	$199, %ecx
	movq	%rax, %r9
	jmp	.L69
.L27:
	leaq	88(%rsp), %rdi
	movl	$131072, %esi
	call	cudaMalloc@PLT
	testl	%eax, %eax
	je	.L28
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	call	cudaGetErrorString@PLT
	leaq	.LC2(%rip), %r8
	movl	$200, %ecx
	movq	%rax, %r9
	jmp	.L69
.L28:
	leaq	96(%rsp), %rdi
	movl	$256, %esi
	call	cudaMalloc@PLT
	testl	%eax, %eax
	je	.L29
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	call	cudaGetErrorString@PLT
	leaq	.LC2(%rip), %r8
	movl	$201, %ecx
	movq	%rax, %r9
	jmp	.L69
.L29:
	leaq	104(%rsp), %rdi
	movl	$67108864, %esi
	call	cudaMalloc@PLT
	testl	%eax, %eax
	je	.L30
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	call	cudaGetErrorString@PLT
	leaq	.LC2(%rip), %r8
	movl	$202, %ecx
	movq	%rax, %r9
	jmp	.L69
.L30:
	leaq	112(%rsp), %rdi
	movl	$131072, %esi
	call	cudaMalloc@PLT
	testl	%eax, %eax
	je	.L31
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	call	cudaGetErrorString@PLT
	leaq	.LC2(%rip), %r8
	movl	$203, %ecx
	movq	%rax, %r9
	jmp	.L69
.L31:
	leaq	120(%rsp), %rdi
	movl	$256, %esi
	call	cudaMalloc@PLT
	testl	%eax, %eax
	je	.L32
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	call	cudaGetErrorString@PLT
	leaq	.LC2(%rip), %r8
	movl	$204, %ecx
	movq	%rax, %r9
	jmp	.L69
.L32:
	leaq	128(%rsp), %rdi
	movl	$16, %esi
	call	cudaMalloc@PLT
	testl	%eax, %eax
	je	.L33
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	call	cudaGetErrorString@PLT
	leaq	.LC2(%rip), %r8
	movl	$205, %ecx
	movq	%rax, %r9
	jmp	.L69
.L33:
	leaq	32(%rsp), %rdi
	xorl	%edx, %edx
	movl	$67108864, %esi
	xorl	%ebp, %ebp
	call	cudaHostAlloc@PLT
	movq	$0x000000000, (%rsp)
	testl	%eax, %eax
	je	.L34
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	call	cudaGetErrorString@PLT
	leaq	.LC2(%rip), %r8
	movl	$209, %ecx
	movq	%rax, %r9
	jmp	.L69
.L34:
	call	rand@PLT
	cvtsi2sdl	%eax, %xmm0
	divsd	.LC4(%rip), %xmm0
	movq	32(%rsp), %rax
	mulsd	.LC7(%rip), %xmm0
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, (%rax,%rbp)
	cvtss2sd	%xmm0, %xmm0
	addsd	(%rsp), %xmm0
	addq	$4, %rbp
	movsd	%xmm0, (%rsp)
	cmpq	$67108864, %rbp
	jne	.L34
	leaq	.LC8(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	64(%rsp), %r8
	movq	80(%rsp), %rdi
	movq	%rbx, %rsi
	movl	$1, %ecx
	movl	$67108864, %edx
	call	cudaMemcpyAsync@PLT
	testl	%eax, %eax
	je	.L35
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	call	cudaGetErrorString@PLT
	leaq	.LC2(%rip), %r8
	movl	$218, %ecx
	movq	%rax, %r9
	jmp	.L69
.L35:
	movl	$8388609, %edx
	movl	$131073, %edi
	movq	64(%rsp), %r9
	xorl	%r8d, %r8d
	salq	$9, %rdx
	salq	$15, %rdi
	movl	$1, %ecx
	movl	$1, %esi
	movq	%rdx, 52(%rsp)
	movl	$1, 60(%rsp)
	movq	%rdi, 40(%rsp)
	movl	$1, 48(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L36
	movq	80(%rsp), %rsi
	movq	88(%rsp), %rdi
	movl	$16777216, %edx
	call	_Z33__wrapper__device_stub_reduceGmemIfEvRPT_S2_Rm.isra.0
.L36:
	movl	$8388609, %edx
	movl	$67108865, %edi
	movq	64(%rsp), %r9
	xorl	%r8d, %r8d
	salq	$9, %rdx
	salq	$6, %rdi
	movl	$1, %ecx
	movl	$1, %esi
	movq	%rdx, 52(%rsp)
	movl	$1, 60(%rsp)
	movq	%rdi, 40(%rsp)
	movl	$1, 48(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L37
	movq	88(%rsp), %rsi
	movq	96(%rsp), %rdi
	movl	$32768, %edx
	call	_Z33__wrapper__device_stub_reduceGmemIfEvRPT_S2_Rm.isra.0
.L37:
	movl	$8388609, %edx
	movq	64(%rsp), %r9
	xorl	%r8d, %r8d
	movl	$1, %ecx
	salq	$9, %rdx
	movl	$1, %esi
	movabsq	$4294967297, %rdi
	movl	$1, 60(%rsp)
	movq	%rdx, 52(%rsp)
	movq	%rdi, 40(%rsp)
	movl	$1, 48(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L38
	movq	96(%rsp), %rsi
	movq	128(%rsp), %rdi
	movl	$64, %edx
	call	_Z33__wrapper__device_stub_reduceGmemIfEvRPT_S2_Rm.isra.0
.L38:
	movq	64(%rsp), %rcx
	movq	88(%rsp), %rdi
	xorl	%esi, %esi
	movl	$131072, %edx
	call	cudaMemsetAsync@PLT
	testl	%eax, %eax
	je	.L39
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	call	cudaGetErrorString@PLT
	leaq	.LC2(%rip), %r8
	movl	$224, %ecx
	movq	%rax, %r9
	jmp	.L69
.L39:
	movq	64(%rsp), %rcx
	movq	96(%rsp), %rdi
	xorl	%esi, %esi
	movl	$256, %edx
	call	cudaMemsetAsync@PLT
	testl	%eax, %eax
	je	.L40
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	call	cudaGetErrorString@PLT
	leaq	.LC2(%rip), %r8
	movl	$225, %ecx
	movq	%rax, %r9
	jmp	.L69
.L40:
	movq	64(%rsp), %r8
	movq	80(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	movl	$67108864, %edx
	call	cudaMemcpyAsync@PLT
	testl	%eax, %eax
	je	.L41
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	call	cudaGetErrorString@PLT
	leaq	.LC2(%rip), %r8
	movl	$226, %ecx
	movq	%rax, %r9
	jmp	.L69
.L41:
	movl	$8388609, %edx
	movl	$131073, %edi
	movq	64(%rsp), %r9
	xorl	%r8d, %r8d
	salq	$9, %rdx
	salq	$15, %rdi
	movl	$1, %ecx
	movl	$1, %esi
	movq	%rdx, 52(%rsp)
	movl	$1, 60(%rsp)
	movq	%rdi, 40(%rsp)
	movl	$1, 48(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L42
	movq	80(%rsp), %rsi
	movq	88(%rsp), %rdi
	movl	$16777216, %edx
	call	_Z33__wrapper__device_stub_reduceSmemIfEvRPT_S2_Rm.isra.0
.L42:
	movl	$8388609, %edx
	movl	$67108865, %edi
	movq	64(%rsp), %r9
	xorl	%r8d, %r8d
	salq	$9, %rdx
	salq	$6, %rdi
	movl	$1, %ecx
	movl	$1, %esi
	movq	%rdx, 52(%rsp)
	movl	$1, 60(%rsp)
	movq	%rdi, 40(%rsp)
	movl	$1, 48(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L43
	movq	88(%rsp), %rsi
	movq	96(%rsp), %rdi
	movl	$32768, %edx
	call	_Z33__wrapper__device_stub_reduceSmemIfEvRPT_S2_Rm.isra.0
.L43:
	movl	$8388609, %edx
	movq	64(%rsp), %r9
	xorl	%r8d, %r8d
	movl	$1, %ecx
	salq	$9, %rdx
	movl	$1, %esi
	movabsq	$4294967297, %rdi
	movl	$1, 60(%rsp)
	movq	%rdx, 52(%rsp)
	movq	%rdi, 40(%rsp)
	movl	$1, 48(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L44
	movq	128(%rsp), %rax
	movq	96(%rsp), %rsi
	movl	$64, %edx
	leaq	4(%rax), %rdi
	call	_Z33__wrapper__device_stub_reduceSmemIfEvRPT_S2_Rm.isra.0
.L44:
	movq	72(%rsp), %r8
	movq	32(%rsp), %rsi
	movl	$1, %ecx
	movl	$67108864, %edx
	movq	104(%rsp), %rdi
	call	cudaMemcpyAsync@PLT
	testl	%eax, %eax
	je	.L45
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	call	cudaGetErrorString@PLT
	leaq	.LC2(%rip), %r8
	movl	$234, %ecx
	movq	%rax, %r9
	jmp	.L69
.L45:
	movl	$8388609, %edx
	movl	$524289, %edi
	movq	72(%rsp), %r9
	xorl	%r8d, %r8d
	salq	$9, %rdx
	salq	$13, %rdi
	movl	$1, %ecx
	movl	$1, %esi
	movq	%rdx, 52(%rsp)
	movl	$1, 60(%rsp)
	movq	%rdi, 40(%rsp)
	movl	$1, 48(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L46
	movq	104(%rsp), %rsi
	movq	112(%rsp), %rdi
	movl	$16777216, %edx
	call	_Z39__wrapper__device_stub_reduceSmemUnrollIfEvRPT_S2_Rm.isra.0
.L46:
	movl	$8388609, %edx
	movl	$1073741825, %edi
	movq	72(%rsp), %r9
	xorl	%r8d, %r8d
	salq	$9, %rdx
	salq	$2, %rdi
	movl	$1, %ecx
	movl	$1, %esi
	movq	%rdx, 52(%rsp)
	movl	$1, 60(%rsp)
	movq	%rdi, 40(%rsp)
	movl	$1, 48(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L47
	movq	112(%rsp), %rsi
	movq	120(%rsp), %rdi
	movl	$8192, %edx
	call	_Z39__wrapper__device_stub_reduceSmemUnrollIfEvRPT_S2_Rm.isra.0
.L47:
	movl	$8388609, %edx
	movq	72(%rsp), %r9
	xorl	%r8d, %r8d
	movl	$1, %ecx
	salq	$9, %rdx
	movl	$1, %esi
	movabsq	$4294967297, %rdi
	movl	$1, 60(%rsp)
	movq	%rdx, 52(%rsp)
	movq	%rdi, 40(%rsp)
	movl	$1, 48(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L48
	movq	128(%rsp), %rax
	movq	120(%rsp), %rsi
	movl	$4, %edx
	leaq	8(%rax), %rdi
	call	_Z33__wrapper__device_stub_reduceSmemIfEvRPT_S2_Rm.isra.0
.L48:
	movq	72(%rsp), %rcx
	movq	112(%rsp), %rdi
	xorl	%esi, %esi
	movl	$131072, %edx
	call	cudaMemsetAsync@PLT
	testl	%eax, %eax
	je	.L49
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	call	cudaGetErrorString@PLT
	leaq	.LC2(%rip), %r8
	movl	$242, %ecx
	movq	%rax, %r9
	jmp	.L69
.L49:
	movq	72(%rsp), %rcx
	movq	120(%rsp), %rdi
	xorl	%esi, %esi
	movl	$256, %edx
	call	cudaMemsetAsync@PLT
	testl	%eax, %eax
	je	.L50
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	call	cudaGetErrorString@PLT
	leaq	.LC2(%rip), %r8
	movl	$243, %ecx
	movq	%rax, %r9
	jmp	.L69
.L50:
	movq	72(%rsp), %r8
	movq	32(%rsp), %rsi
	movl	$1, %ecx
	movl	$67108864, %edx
	movq	104(%rsp), %rdi
	call	cudaMemcpyAsync@PLT
	testl	%eax, %eax
	je	.L51
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	call	cudaGetErrorString@PLT
	leaq	.LC2(%rip), %r8
	movl	$244, %ecx
	movq	%rax, %r9
	jmp	.L69
.L51:
	movl	$8388609, %edx
	movl	$524289, %edi
	movq	72(%rsp), %r9
	movl	$2048, %r8d
	salq	$9, %rdx
	salq	$13, %rdi
	movl	$1, %ecx
	movl	$1, %esi
	movq	%rdx, 52(%rsp)
	movl	$1, 60(%rsp)
	movq	%rdi, 40(%rsp)
	movl	$1, 48(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L52
	movq	104(%rsp), %rsi
	movq	112(%rsp), %rdi
	movl	$16777216, %edx
	call	_Z46__wrapper__device_stub_reduceSmemUnrollDynamicIfEvRPT_S2_Rm.isra.0
.L52:
	movl	$8388609, %edx
	movl	$1073741825, %edi
	movq	72(%rsp), %r9
	movl	$2048, %r8d
	salq	$9, %rdx
	salq	$2, %rdi
	movl	$1, %ecx
	movl	$1, %esi
	movq	%rdx, 52(%rsp)
	movl	$1, 60(%rsp)
	movq	%rdi, 40(%rsp)
	movl	$1, 48(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L53
	movq	112(%rsp), %rsi
	movq	120(%rsp), %rdi
	movl	$8192, %edx
	call	_Z46__wrapper__device_stub_reduceSmemUnrollDynamicIfEvRPT_S2_Rm.isra.0
.L53:
	movl	$8388609, %edx
	movq	72(%rsp), %r9
	xorl	%r8d, %r8d
	movl	$1, %ecx
	salq	$9, %rdx
	movl	$1, %esi
	movabsq	$4294967297, %rdi
	movl	$1, 60(%rsp)
	movq	%rdx, 52(%rsp)
	movq	%rdi, 40(%rsp)
	movl	$1, 48(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L54
	movq	128(%rsp), %rax
	movq	120(%rsp), %rsi
	movl	$4, %edx
	leaq	12(%rax), %rdi
	call	_Z33__wrapper__device_stub_reduceSmemIfEvRPT_S2_Rm.isra.0
.L54:
	leaq	28(%rsp), %rbp
	movl	$2, %ecx
	movl	$4, %edx
	movq	128(%rsp), %rsi
	movq	%rbp, %rdi
	call	cudaMemcpy@PLT
	testl	%eax, %eax
	je	.L55
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	call	cudaGetErrorString@PLT
	leaq	.LC2(%rip), %r8
	movl	$251, %ecx
	movq	%rax, %r9
	jmp	.L69
.L55:
	movsd	8(%rsp), %xmm1
	leaq	.LC9(%rip), %rsi
	movl	$2, %edi
	movb	$2, %al
	cvtss2sd	28(%rsp), %xmm0
	call	__printf_chk@PLT
	movq	128(%rsp), %rax
	movl	$2, %ecx
	movq	%rbp, %rdi
	movl	$4, %edx
	leaq	4(%rax), %rsi
	call	cudaMemcpy@PLT
	testl	%eax, %eax
	je	.L56
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	call	cudaGetErrorString@PLT
	leaq	.LC2(%rip), %r8
	movl	$254, %ecx
	movq	%rax, %r9
	jmp	.L69
.L56:
	movsd	8(%rsp), %xmm1
	leaq	.LC10(%rip), %rsi
	movl	$2, %edi
	movb	$2, %al
	cvtss2sd	28(%rsp), %xmm0
	call	__printf_chk@PLT
	movq	128(%rsp), %rax
	movl	$2, %ecx
	movq	%rbp, %rdi
	movl	$4, %edx
	leaq	8(%rax), %rsi
	call	cudaMemcpy@PLT
	testl	%eax, %eax
	je	.L57
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	call	cudaGetErrorString@PLT
	leaq	.LC2(%rip), %r8
	movl	$257, %ecx
	movq	%rax, %r9
	jmp	.L69
.L57:
	movsd	(%rsp), %xmm1
	leaq	.LC11(%rip), %rsi
	movl	$2, %edi
	movb	$2, %al
	cvtss2sd	28(%rsp), %xmm0
	call	__printf_chk@PLT
	movq	128(%rsp), %rax
	movl	$2, %ecx
	movq	%rbp, %rdi
	movl	$4, %edx
	leaq	12(%rax), %rsi
	call	cudaMemcpy@PLT
	testl	%eax, %eax
	je	.L58
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	call	cudaGetErrorString@PLT
	leaq	.LC2(%rip), %r8
	movl	$260, %ecx
	movq	%rax, %r9
	jmp	.L69
.L58:
	movsd	(%rsp), %xmm1
	leaq	.LC12(%rip), %rsi
	movb	$2, %al
	xorl	%ebp, %ebp
	movl	$2, %edi
	cvtss2sd	28(%rsp), %xmm0
	call	__printf_chk@PLT
	call	cudaDeviceSynchronize@PLT
	call	cudaProfilerStop@PLT
.L60:
	movq	80(%rsp,%rbp), %rdi
	addq	$8, %rbp
	call	cudaFree@PLT
	testl	%eax, %eax
	je	.L59
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	call	cudaGetErrorString@PLT
	leaq	.LC2(%rip), %r8
	movl	$266, %ecx
	movq	%rax, %r9
	jmp	.L69
.L59:
	cmpq	$56, %rbp
	jne	.L60
	movq	32(%rsp), %rdi
	call	cudaFreeHost@PLT
	testl	%eax, %eax
	je	.L61
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	call	cudaGetErrorString@PLT
	leaq	.LC2(%rip), %r8
	movl	$267, %ecx
	movq	%rax, %r9
	jmp	.L69
.L61:
	movq	%rbx, %rdi
	call	_ZdaPv@PLT
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L62
	call	__stack_chk_fail@PLT
.L62:
	addq	$152, %rsp
	.cfi_def_cfa_offset 24
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2035:
	.size	main, .-main
	.section	.rodata.str1.1
.LC13:
	.string	"_Z23reduceSmemUnrollDynamicIfEvPT_S1_m"
.LC14:
	.string	"_Z16reduceSmemUnrollIfEvPT_S1_m"
.LC15:
	.string	"_Z10reduceSmemIfEvPT_S1_m"
.LC16:
	.string	"_Z10reduceGmemIfEvPT_S1_m"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2069:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC13(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z23reduceSmemUnrollDynamicIfEvPT_S1_m(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC14(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z16reduceSmemUnrollIfEvPT_S1_m(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC15(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z10reduceSmemIfEvPT_S1_m(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC16(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z10reduceGmemIfEvPT_S1_m(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2069:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC4:
	.long	-4194304
	.long	1105199103
	.align 8
.LC5:
	.long	0
	.long	1071644672
	.align 8
.LC7:
	.long	-1717986918
	.long	1069128089
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <stdio.h>

#include <hip/hip_runtime_api.h>
#include <hip/hip_runtime_api.h>
#include <stdlib.h>
#include <time.h>


#define DIMX 512

#define cudaCheck(e) do { \
    if (hipSuccess != (e)) { \
    fprintf(stderr, "Cuda runtime error in line %d of file %s \
    : %s \n", __LINE__, __FILE__, hipGetErrorString(hipGetLastError()) ); \
    exit(EXIT_FAILURE); \
    } \
    } while(0);


template <typename DType>
__global__ void reduceGmem(DType* out, DType* in, size_t n) {
    size_t idx = threadIdx.x + blockIdx.x * blockDim.x;
    if(idx >= n) return;
    

    int tid = threadIdx.x; 
    DType* idata = in + blockIdx.x * blockDim.x; 

    if(blockDim.x >= 1024 && tid < 512 ) idata[tid] += idata[tid+512];
    __syncthreads();
    if(blockDim.x >= 512 && tid < 256 ) idata[tid] += idata[tid + 256];
    __syncthreads();
    if(blockDim.x >= 256 && tid < 128 ) idata[tid] += idata[tid + 128];
    __syncthreads();
    if(blockDim.x >= 128 && tid < 64 ) idata[tid] += idata[tid + 64];
    __syncthreads();

    if(tid < 32) {
        volatile DType* vsmem = idata;
        vsmem[tid] += vsmem[tid + 32];
        vsmem[tid] += vsmem[tid + 16];
        vsmem[tid] += vsmem[tid + 8];
        vsmem[tid] += vsmem[tid + 4];
        vsmem[tid] += vsmem[tid + 2];
        vsmem[tid] += vsmem[tid + 1];
    }
    if(tid == 0) {
        out[blockIdx.x] = idata[0];
        //printf("ID:%d, sum:%5f\n", blockIdx.x, idata[0]);
    }
}


template <typename DType>
__global__ void reduceSmem(DType* out, DType* in, size_t n) {
    size_t idx = threadIdx.x + blockIdx.x * blockDim.x;

    __shared__ DType smem[DIMX];
    int tid = threadIdx.x; 
    DType* idata = in + blockIdx.x * blockDim.x; 
    /// global mem. -> shared mem.
    if(idx < n) smem[tid] = idata[tid];
    else smem[tid] = 0;
    __syncthreads();


    if(blockDim.x >= 1024 && tid < 512 ) smem[tid] += smem[tid+512];
    __syncthreads();
    if(blockDim.x >= 512 && tid < 256 ) smem[tid] += smem[tid + 256];
    __syncthreads();
    if(blockDim.x >= 256 && tid < 128 ) smem[tid] += smem[tid + 128];
    __syncthreads();
    if(blockDim.x >= 128 && tid < 64 ) smem[tid] += smem[tid + 64];
    __syncthreads();

    if(tid < 32) {
        volatile DType* vsmem = smem;
        vsmem[tid] += vsmem[tid + 32];
        vsmem[tid] += vsmem[tid + 16];
        vsmem[tid] += vsmem[tid + 8];
        vsmem[tid] += vsmem[tid + 4];
        vsmem[tid] += vsmem[tid + 2];
        vsmem[tid] += vsmem[tid + 1];
    }
    if(tid == 0) {
        out[blockIdx.x] = smem[0];
        //printf("ID:%d, sum:%5f\n", blockIdx.x, idata[0]);
    }
}

template <typename DType>
__global__ void reduceSmemUnroll(DType* out, DType* in, size_t n) {

    __shared__ DType smem[DIMX];
    int tid = threadIdx.x; 
    size_t idx = threadIdx.x + blockIdx.x * blockDim.x * 4;
    /// global mem. -> shared mem.
    DType tmp_sum = 0;
    if(idx + 3 * blockDim.x  < n) {
        DType a1 = in[idx];
        DType a2 = in[idx + blockDim.x];
        DType a3 = in[idx + blockDim.x*2];
        DType a4 = in[idx + blockDim.x*3];
        tmp_sum = a1 + a2 + a3 + a4;
    }
    smem[tid] = tmp_sum;
    __syncthreads();

    if(blockDim.x >= 1024 && tid < 512 ) smem[tid] += smem[tid+512];
    __syncthreads();
    if(blockDim.x >= 512 && tid < 256 ) smem[tid] += smem[tid + 256];
    __syncthreads();
    if(blockDim.x >= 256 && tid < 128 ) smem[tid] += smem[tid + 128];
    __syncthreads();
    if(blockDim.x >= 128 && tid < 64 ) smem[tid] += smem[tid + 64];
    __syncthreads();

    if(tid < 32) {
        volatile DType* vsmem = smem;
        vsmem[tid] += vsmem[tid + 32];
        vsmem[tid] += vsmem[tid + 16];
        vsmem[tid] += vsmem[tid + 8];
        vsmem[tid] += vsmem[tid + 4];
        vsmem[tid] += vsmem[tid + 2];
        vsmem[tid] += vsmem[tid + 1];
    }
    if(tid == 0) {
        out[blockIdx.x] = smem[0];
    }
}


template <typename DType>
__global__ void reduceSmemUnrollDynamic(DType* out, DType* in, size_t n) {

    extern __shared__ DType smem[]; //! dynamic shared memory 
    int tid = threadIdx.x; 
    size_t idx = threadIdx.x + blockIdx.x * blockDim.x * 4;
    /// global mem. -> shared mem.
    DType tmp_sum = 0;
    if(idx + 3 * blockDim.x  < n) {
        DType a1 = in[idx];
        DType a2 = in[idx + blockDim.x];
        DType a3 = in[idx + blockDim.x*2];
        DType a4 = in[idx + blockDim.x*3];
        tmp_sum = a1 + a2 + a3 + a4;
    }
    smem[tid] = tmp_sum;
    __syncthreads();

    if(blockDim.x >= 1024 && tid < 512 ) smem[tid] += smem[tid+512];
    __syncthreads();
    if(blockDim.x >= 512 && tid < 256 ) smem[tid] += smem[tid + 256];
    __syncthreads();
    if(blockDim.x >= 256 && tid < 128 ) smem[tid] += smem[tid + 128];
    __syncthreads();
    if(blockDim.x >= 128 && tid < 64 ) smem[tid] += smem[tid + 64];
    __syncthreads();

    if(tid < 32) {
        volatile DType* vsmem = smem;
        vsmem[tid] += vsmem[tid + 32];
        vsmem[tid] += vsmem[tid + 16];
        vsmem[tid] += vsmem[tid + 8];
        vsmem[tid] += vsmem[tid + 4];
        vsmem[tid] += vsmem[tid + 2];
        vsmem[tid] += vsmem[tid + 1];
    }
    if(tid == 0) {
        out[blockIdx.x] = smem[0];
    }
}

int main(int argc, char* agv[]) {

    srand(time(NULL));
    hipStream_t stream[2]; 
    cudaCheck(hipSetDevice(0)); //! CUDA Streams
    for(int i = 0; i < 2; ++i) cudaCheck(hipStreamCreate(&stream[i]));

    hipProfilerStart();
    void * buffers[7];
    const size_t N = 1 << 24;
    float * pdata = new float[N];
    float res = 0;
    double res_check = 0;
    for(size_t i = 0; i < N; ++i) {
        //pdata[i] = 1;
        pdata[i] = rand() / double(RAND_MAX) * 0.5;
        res_check += pdata[i];
    }

    const int threads_per_block = DIMX;
    const int num_blocks = (N + threads_per_block - 1) / threads_per_block;
    const int num_blocks2 = (num_blocks + threads_per_block - 1) / threads_per_block;
    printf("threads_per_block:%d, num_blocks:%d, %d\n", threads_per_block, num_blocks, num_blocks2);

    /// allocate gpu mem.
    cudaCheck(hipMalloc(&buffers[0], sizeof(float)*num_blocks*threads_per_block));
    cudaCheck(hipMalloc(&buffers[1], sizeof(float)*num_blocks2 * threads_per_block));
    cudaCheck(hipMalloc(&buffers[2], sizeof(float)*num_blocks2));
    cudaCheck(hipMalloc(&buffers[3], sizeof(float)*num_blocks*threads_per_block));
    cudaCheck(hipMalloc(&buffers[4], sizeof(float)*num_blocks2*threads_per_block));
    cudaCheck(hipMalloc(&buffers[5], sizeof(float)*num_blocks2));
    cudaCheck(hipMalloc(&buffers[6], sizeof(float)*4));
    
    /// pinned memory
    float * c_buffer;
    cudaCheck(hipHostMalloc(&c_buffer,  sizeof(float)*N, hipHostMallocDefault));
    double cpu_res = 0.;
    for(size_t i = 0 ; i < N; ++i) {
        c_buffer[i] = rand() / double(RAND_MAX) * 0.1;
        cpu_res += c_buffer[i];
    }
    printf("Starting reduction ...");

    /// cpu mem. -> gpu mem. 
    cudaCheck(hipMemcpyAsync(buffers[0], pdata, sizeof(float)*N, hipMemcpyHostToDevice, stream[0]));
    /// reduceGmem
    reduceGmem<float><<<num_blocks, threads_per_block, 0, stream[0]>>>((float*)buffers[1], (float*)buffers[0], N);
    reduceGmem<float><<<num_blocks2, threads_per_block, 0, stream[0]>>>((float*)buffers[2], (float*)buffers[1], num_blocks);
    reduceGmem<float><<<1, threads_per_block, 0, stream[0]>>>((float*)buffers[6], (float*)buffers[2], num_blocks2);

    cudaCheck(hipMemsetAsync(buffers[1], 0, sizeof(float)*num_blocks2*threads_per_block, stream[0]));
    cudaCheck(hipMemsetAsync(buffers[2], 0, sizeof(float)*num_blocks2, stream[0]));
    cudaCheck(hipMemcpyAsync(buffers[0], pdata, sizeof(float)*N, hipMemcpyHostToDevice, stream[0]));
    /// reduceSmem
    reduceSmem<float><<<num_blocks, threads_per_block, 0, stream[0]>>>((float*)buffers[1], (float*)buffers[0], N);
    reduceSmem<float><<<num_blocks2, threads_per_block, 0, stream[0]>>>((float*)buffers[2], (float*)buffers[1], num_blocks);
    reduceSmem<float><<<1, threads_per_block, 0, stream[0]>>>((float*)buffers[6]+1, (float*)buffers[2], num_blocks2);


    /// stream[1]
    cudaCheck(hipMemcpyAsync(buffers[3], c_buffer, sizeof(float)*N, hipMemcpyHostToDevice, stream[1]));
    /// reduceSmemUnroll
    reduceSmemUnroll<float><<<num_blocks / 4, threads_per_block, 0, stream[1]>>>((float*)buffers[4], (float*)buffers[3], N);
    reduceSmemUnroll<float><<<num_blocks2 / 16, threads_per_block, 0, stream[1]>>>((float*)buffers[5], (float*)buffers[4], num_blocks / 4);
    reduceSmem<float><<<1, threads_per_block, 0, stream[1]>>>((float*)buffers[6]+2, (float*)buffers[5], num_blocks2 / 16);


    /// reduceSmemUnrollDynamic
    cudaCheck(hipMemsetAsync(buffers[4], 0, sizeof(float)*num_blocks2*threads_per_block, stream[1]));
    cudaCheck(hipMemsetAsync(buffers[5], 0, sizeof(float)*num_blocks2, stream[1]));
    cudaCheck(hipMemcpyAsync(buffers[3], c_buffer, sizeof(float)*N, hipMemcpyHostToDevice, stream[1]));

    reduceSmemUnrollDynamic<float><<<num_blocks / 4, threads_per_block, sizeof(float)*threads_per_block, stream[1]>>>((float*)buffers[4], (float*)buffers[3], N);
    reduceSmemUnrollDynamic<float><<<num_blocks2 / 16, threads_per_block, sizeof(float)*threads_per_block, stream[1]>>>((float*)buffers[5], (float*)buffers[4], num_blocks / 4);
    reduceSmem<float><<<1, threads_per_block, 0, stream[1]>>>((float*)buffers[6]+3, (float*)buffers[5], num_blocks2 / 16);

    /// compare results
    cudaCheck(hipMemcpy(&res, buffers[6], sizeof(float), hipMemcpyDeviceToHost));
    printf("Global memory GPU Sum:%5f CPU Sum:%5f\n", res, res_check);

    cudaCheck(hipMemcpy(&res, (float*)buffers[6]+1, sizeof(float), hipMemcpyDeviceToHost));
    printf("Shared memory GPU Sum:%5f CPU Sum:%5f\n", res, res_check);

    cudaCheck(hipMemcpy(&res, (float*)buffers[6]+2, sizeof(float), hipMemcpyDeviceToHost));
    printf("Shared memory Unroll GPU Sum:%5f CPU Sum:%5f\n", res, cpu_res);

    cudaCheck(hipMemcpy(&res, (float*)buffers[6]+3, sizeof(float), hipMemcpyDeviceToHost));
    printf("Shared memory Unroll Dynamic GPU Sum:%5f CPU Sum:%5f\n", res, cpu_res);

    /// free 
    hipDeviceSynchronize();
    hipProfilerStop();
    for(auto & e: buffers) cudaCheck(hipFree(e));
    cudaCheck(hipHostFree(c_buffer));
    delete [] pdata;


    return 0;
}

	.text
	.file	"share_mem.hip"
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI0_0:
	.quad	0x41dfffffffc00000              # double 2147483647
.LCPI0_1:
	.quad	0x3fe0000000000000              # double 0.5
.LCPI0_2:
	.quad	0x3fb999999999999a              # double 0.10000000000000001
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	xorl	%edi, %edi
	callq	time
	movl	%eax, %edi
	callq	srand
	xorl	%edi, %edi
	callq	hipSetDevice
	testl	%eax, %eax
	jne	.LBB0_4
# %bb.1:                                # %.preheader184.preheader
	movb	$1, %bl
	xorl	%eax, %eax
.LBB0_2:                                # %.preheader184
                                        # =>This Inner Loop Header: Depth=1
	leaq	(%rsp,%rax,8), %rdi
	addq	$16, %rdi
	callq	hipStreamCreate
	testl	%eax, %eax
	jne	.LBB0_3
# %bb.6:                                #   in Loop: Header=BB0_2 Depth=1
	movl	$1, %eax
	testb	$1, %bl
	movl	$0, %ebx
	jne	.LBB0_2
# %bb.7:
	callq	hipProfilerStart
	movl	$67108864, %edi                 # imm = 0x4000000
	callq	_Znam
	movq	%rax, %rbx
	movl	$0, 12(%rsp)
	xorps	%xmm0, %xmm0
	xorl	%r14d, %r14d
.LBB0_8:                                # =>This Inner Loop Header: Depth=1
	movsd	%xmm0, 88(%rsp)                 # 8-byte Spill
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2sd	%eax, %xmm0
	divsd	.LCPI0_0(%rip), %xmm0
	mulsd	.LCPI0_1(%rip), %xmm0
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, (%rbx,%r14,4)
	cvtss2sd	%xmm0, %xmm0
	movsd	88(%rsp), %xmm1                 # 8-byte Reload
                                        # xmm1 = mem[0],zero
	addsd	%xmm0, %xmm1
	movsd	%xmm1, 88(%rsp)                 # 8-byte Spill
	movsd	88(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	incq	%r14
	cmpq	$16777216, %r14                 # imm = 0x1000000
	jne	.LBB0_8
# %bb.9:
	movl	$.L.str.2, %edi
	movl	$512, %esi                      # imm = 0x200
	movl	$32768, %edx                    # imm = 0x8000
	movl	$64, %ecx
	xorl	%eax, %eax
	callq	printf
	leaq	32(%rsp), %rdi
	movl	$67108864, %esi                 # imm = 0x4000000
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB0_10
# %bb.11:
	leaq	40(%rsp), %rdi
	movl	$131072, %esi                   # imm = 0x20000
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB0_12
# %bb.13:
	leaq	48(%rsp), %rdi
	movl	$256, %esi                      # imm = 0x100
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB0_14
# %bb.15:
	leaq	56(%rsp), %rdi
	movl	$67108864, %esi                 # imm = 0x4000000
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB0_16
# %bb.17:
	leaq	64(%rsp), %rdi
	movl	$131072, %esi                   # imm = 0x20000
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB0_18
# %bb.19:
	leaq	72(%rsp), %rdi
	movl	$256, %esi                      # imm = 0x100
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB0_20
# %bb.21:
	leaq	80(%rsp), %rdi
	movl	$16, %esi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB0_22
# %bb.23:
	leaq	104(%rsp), %rdi
	movl	$67108864, %esi                 # imm = 0x4000000
	xorl	%edx, %edx
	callq	hipHostMalloc
	testl	%eax, %eax
	jne	.LBB0_81
# %bb.24:                               # %.preheader.preheader
	xorpd	%xmm1, %xmm1
	xorl	%r14d, %r14d
.LBB0_25:                               # %.preheader
                                        # =>This Inner Loop Header: Depth=1
	movsd	%xmm1, 96(%rsp)                 # 8-byte Spill
	callq	rand
	movsd	96(%rsp), %xmm1                 # 8-byte Reload
                                        # xmm1 = mem[0],zero
	xorps	%xmm0, %xmm0
	cvtsi2sd	%eax, %xmm0
	divsd	.LCPI0_0(%rip), %xmm0
	mulsd	.LCPI0_2(%rip), %xmm0
	cvtsd2ss	%xmm0, %xmm0
	movq	104(%rsp), %rax
	movss	%xmm0, (%rax,%r14,4)
	cvtss2sd	%xmm0, %xmm0
	addsd	%xmm0, %xmm1
	incq	%r14
	cmpq	$16777216, %r14                 # imm = 0x1000000
	jne	.LBB0_25
# %bb.26:
	movsd	%xmm1, 96(%rsp)                 # 8-byte Spill
	movl	$.L.str.3, %edi
	xorl	%eax, %eax
	callq	printf
	movq	32(%rsp), %rdi
	movq	16(%rsp), %r8
	movl	$67108864, %edx                 # imm = 0x4000000
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpyAsync
	testl	%eax, %eax
	jne	.LBB0_27
# %bb.28:
	movabsq	$4294967808, %r14               # imm = 0x100000200
	movq	16(%rsp), %r9
	leaq	32256(%r14), %r12
	movq	%r12, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB0_30
# %bb.29:
	movq	32(%rsp), %rsi
	movq	40(%rsp), %rdi
	movl	$16777216, %edx                 # imm = 0x1000000
	callq	_Z25__device_stub__reduceGmemIfEvPT_S1_m
.LBB0_30:
	movq	16(%rsp), %r9
	leaq	-448(%r14), %r13
	movq	%r13, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB0_32
# %bb.31:
	movq	40(%rsp), %rsi
	movq	48(%rsp), %rdi
	movl	$32768, %edx                    # imm = 0x8000
	callq	_Z25__device_stub__reduceGmemIfEvPT_S1_m
.LBB0_32:
	movq	16(%rsp), %r9
	leaq	-511(%r14), %r15
	movq	%r15, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB0_34
# %bb.33:
	movq	48(%rsp), %rsi
	movq	80(%rsp), %rdi
	movl	$64, %edx
	callq	_Z25__device_stub__reduceGmemIfEvPT_S1_m
.LBB0_34:
	movq	40(%rsp), %rdi
	movq	16(%rsp), %rcx
	movl	$131072, %edx                   # imm = 0x20000
	xorl	%esi, %esi
	callq	hipMemsetAsync
	testl	%eax, %eax
	jne	.LBB0_35
# %bb.36:
	movq	48(%rsp), %rdi
	movq	16(%rsp), %rcx
	movl	$256, %edx                      # imm = 0x100
	xorl	%esi, %esi
	callq	hipMemsetAsync
	testl	%eax, %eax
	jne	.LBB0_37
# %bb.38:
	movq	32(%rsp), %rdi
	movq	16(%rsp), %r8
	movl	$67108864, %edx                 # imm = 0x4000000
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpyAsync
	testl	%eax, %eax
	jne	.LBB0_39
# %bb.40:
	movq	16(%rsp), %r9
	movq	%r12, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB0_42
# %bb.41:
	movq	32(%rsp), %rsi
	movq	40(%rsp), %rdi
	movl	$16777216, %edx                 # imm = 0x1000000
	callq	_Z25__device_stub__reduceSmemIfEvPT_S1_m
.LBB0_42:
	movq	16(%rsp), %r9
	movq	%r13, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB0_44
# %bb.43:
	movq	40(%rsp), %rsi
	movq	48(%rsp), %rdi
	movl	$32768, %edx                    # imm = 0x8000
	callq	_Z25__device_stub__reduceSmemIfEvPT_S1_m
.LBB0_44:
	movq	16(%rsp), %r9
	movq	%r15, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB0_46
# %bb.45:
	movq	48(%rsp), %rsi
	movq	80(%rsp), %rdi
	addq	$4, %rdi
	movl	$64, %edx
	callq	_Z25__device_stub__reduceSmemIfEvPT_S1_m
.LBB0_46:
	movq	56(%rsp), %rdi
	movq	104(%rsp), %rsi
	movq	24(%rsp), %r8
	movl	$67108864, %edx                 # imm = 0x4000000
	movl	$1, %ecx
	callq	hipMemcpyAsync
	testl	%eax, %eax
	jne	.LBB0_47
# %bb.48:
	movq	24(%rsp), %r9
	leaq	7680(%r14), %r13
	movq	%r13, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB0_50
# %bb.49:
	movq	56(%rsp), %rsi
	movq	64(%rsp), %rdi
	movl	$16777216, %edx                 # imm = 0x1000000
	callq	_Z31__device_stub__reduceSmemUnrollIfEvPT_S1_m
.LBB0_50:
	movq	24(%rsp), %r9
	leaq	-508(%r14), %r12
	movq	%r12, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB0_52
# %bb.51:
	movq	64(%rsp), %rsi
	movq	72(%rsp), %rdi
	movl	$8192, %edx                     # imm = 0x2000
	callq	_Z31__device_stub__reduceSmemUnrollIfEvPT_S1_m
.LBB0_52:
	movq	24(%rsp), %r9
	movq	%r15, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB0_54
# %bb.53:
	movq	72(%rsp), %rsi
	movq	80(%rsp), %rdi
	addq	$8, %rdi
	movl	$4, %edx
	callq	_Z25__device_stub__reduceSmemIfEvPT_S1_m
.LBB0_54:
	movq	64(%rsp), %rdi
	movq	24(%rsp), %rcx
	movl	$131072, %edx                   # imm = 0x20000
	xorl	%esi, %esi
	callq	hipMemsetAsync
	testl	%eax, %eax
	jne	.LBB0_55
# %bb.56:
	movq	72(%rsp), %rdi
	movq	24(%rsp), %rcx
	movl	$256, %edx                      # imm = 0x100
	xorl	%esi, %esi
	callq	hipMemsetAsync
	testl	%eax, %eax
	jne	.LBB0_57
# %bb.58:
	movq	56(%rsp), %rdi
	movq	104(%rsp), %rsi
	movq	24(%rsp), %r8
	movl	$67108864, %edx                 # imm = 0x4000000
	movl	$1, %ecx
	callq	hipMemcpyAsync
	testl	%eax, %eax
	jne	.LBB0_59
# %bb.60:
	movq	24(%rsp), %r9
	movl	$2048, %r8d                     # imm = 0x800
	movq	%r13, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB0_62
# %bb.61:
	movq	56(%rsp), %rsi
	movq	64(%rsp), %rdi
	movl	$16777216, %edx                 # imm = 0x1000000
	callq	_Z38__device_stub__reduceSmemUnrollDynamicIfEvPT_S1_m
.LBB0_62:
	movq	24(%rsp), %r9
	movl	$2048, %r8d                     # imm = 0x800
	movq	%r12, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB0_64
# %bb.63:
	movq	64(%rsp), %rsi
	movq	72(%rsp), %rdi
	movl	$8192, %edx                     # imm = 0x2000
	callq	_Z38__device_stub__reduceSmemUnrollDynamicIfEvPT_S1_m
.LBB0_64:
	movq	24(%rsp), %r9
	movq	%r15, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB0_66
# %bb.65:
	movq	72(%rsp), %rsi
	movq	80(%rsp), %rdi
	addq	$12, %rdi
	movl	$4, %edx
	callq	_Z25__device_stub__reduceSmemIfEvPT_S1_m
.LBB0_66:
	movq	80(%rsp), %rsi
	leaq	12(%rsp), %rdi
	movl	$4, %edx
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB0_67
# %bb.68:
	leaq	12(%rsp), %r14
	cvtss2sd	(%r14), %xmm0
	movl	$.L.str.4, %edi
	movsd	88(%rsp), %xmm1                 # 8-byte Reload
                                        # xmm1 = mem[0],zero
	movb	$2, %al
	callq	printf
	movq	80(%rsp), %rsi
	addq	$4, %rsi
	movl	$4, %edx
	movq	%r14, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB0_69
# %bb.70:
	leaq	12(%rsp), %r14
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r14), %xmm0
	movl	$.L.str.5, %edi
	movsd	88(%rsp), %xmm1                 # 8-byte Reload
                                        # xmm1 = mem[0],zero
	movb	$2, %al
	callq	printf
	movq	80(%rsp), %rsi
	addq	$8, %rsi
	movl	$4, %edx
	movq	%r14, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB0_71
# %bb.72:
	leaq	12(%rsp), %r14
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r14), %xmm0
	movl	$.L.str.6, %edi
	movsd	96(%rsp), %xmm1                 # 8-byte Reload
                                        # xmm1 = mem[0],zero
	movb	$2, %al
	callq	printf
	movq	80(%rsp), %rsi
	addq	$12, %rsi
	movl	$4, %edx
	movq	%r14, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB0_73
# %bb.77:
	xorps	%xmm0, %xmm0
	cvtss2sd	12(%rsp), %xmm0
	movl	$.L.str.7, %edi
	movsd	96(%rsp), %xmm1                 # 8-byte Reload
                                        # xmm1 = mem[0],zero
	movb	$2, %al
	callq	printf
	callq	hipDeviceSynchronize
	callq	hipProfilerStop
	xorl	%r14d, %r14d
.LBB0_78:                               # =>This Inner Loop Header: Depth=1
	movq	32(%rsp,%r14), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB0_79
# %bb.74:                               #   in Loop: Header=BB0_78 Depth=1
	addq	$8, %r14
	cmpq	$56, %r14
	jne	.LBB0_78
# %bb.75:
	movq	104(%rsp), %rdi
	callq	hipHostFree
	testl	%eax, %eax
	jne	.LBB0_76
# %bb.80:
	movq	%rbx, %rdi
	callq	_ZdaPv
	xorl	%eax, %eax
	addq	$112, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.LBB0_3:
	.cfi_def_cfa_offset 160
	movq	stderr(%rip), %rbx
	callq	hipGetLastError
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %esi
	movl	$.L.str.1, %ecx
	movq	%rbx, %rdi
	movl	$181, %edx
	jmp	.LBB0_5
.LBB0_79:
	movq	stderr(%rip), %rbx
	callq	hipGetLastError
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %esi
	movl	$.L.str.1, %ecx
	movq	%rbx, %rdi
	movl	$268, %edx                      # imm = 0x10C
.LBB0_5:
	movq	%rax, %r8
	xorl	%eax, %eax
	callq	fprintf
	movl	$1, %edi
	callq	exit
.LBB0_4:
	movq	stderr(%rip), %rbx
	callq	hipGetLastError
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %esi
	movl	$.L.str.1, %ecx
	movq	%rbx, %rdi
	movl	$180, %edx
	jmp	.LBB0_5
.LBB0_10:
	movq	stderr(%rip), %rbx
	callq	hipGetLastError
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %esi
	movl	$.L.str.1, %ecx
	movq	%rbx, %rdi
	movl	$201, %edx
	jmp	.LBB0_5
.LBB0_12:
	movq	stderr(%rip), %rbx
	callq	hipGetLastError
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %esi
	movl	$.L.str.1, %ecx
	movq	%rbx, %rdi
	movl	$202, %edx
	jmp	.LBB0_5
.LBB0_14:
	movq	stderr(%rip), %rbx
	callq	hipGetLastError
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %esi
	movl	$.L.str.1, %ecx
	movq	%rbx, %rdi
	movl	$203, %edx
	jmp	.LBB0_5
.LBB0_16:
	movq	stderr(%rip), %rbx
	callq	hipGetLastError
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %esi
	movl	$.L.str.1, %ecx
	movq	%rbx, %rdi
	movl	$204, %edx
	jmp	.LBB0_5
.LBB0_18:
	movq	stderr(%rip), %rbx
	callq	hipGetLastError
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %esi
	movl	$.L.str.1, %ecx
	movq	%rbx, %rdi
	movl	$205, %edx
	jmp	.LBB0_5
.LBB0_20:
	movq	stderr(%rip), %rbx
	callq	hipGetLastError
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %esi
	movl	$.L.str.1, %ecx
	movq	%rbx, %rdi
	movl	$206, %edx
	jmp	.LBB0_5
.LBB0_22:
	movq	stderr(%rip), %rbx
	callq	hipGetLastError
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %esi
	movl	$.L.str.1, %ecx
	movq	%rbx, %rdi
	movl	$207, %edx
	jmp	.LBB0_5
.LBB0_81:
	movq	stderr(%rip), %rbx
	callq	hipGetLastError
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %esi
	movl	$.L.str.1, %ecx
	movq	%rbx, %rdi
	movl	$211, %edx
	jmp	.LBB0_5
.LBB0_27:
	movq	stderr(%rip), %rbx
	callq	hipGetLastError
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %esi
	movl	$.L.str.1, %ecx
	movq	%rbx, %rdi
	movl	$220, %edx
	jmp	.LBB0_5
.LBB0_35:
	movq	stderr(%rip), %rbx
	callq	hipGetLastError
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %esi
	movl	$.L.str.1, %ecx
	movq	%rbx, %rdi
	movl	$226, %edx
	jmp	.LBB0_5
.LBB0_37:
	movq	stderr(%rip), %rbx
	callq	hipGetLastError
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %esi
	movl	$.L.str.1, %ecx
	movq	%rbx, %rdi
	movl	$227, %edx
	jmp	.LBB0_5
.LBB0_39:
	movq	stderr(%rip), %rbx
	callq	hipGetLastError
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %esi
	movl	$.L.str.1, %ecx
	movq	%rbx, %rdi
	movl	$228, %edx
	jmp	.LBB0_5
.LBB0_47:
	movq	stderr(%rip), %rbx
	callq	hipGetLastError
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %esi
	movl	$.L.str.1, %ecx
	movq	%rbx, %rdi
	movl	$236, %edx
	jmp	.LBB0_5
.LBB0_55:
	movq	stderr(%rip), %rbx
	callq	hipGetLastError
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %esi
	movl	$.L.str.1, %ecx
	movq	%rbx, %rdi
	movl	$244, %edx
	jmp	.LBB0_5
.LBB0_57:
	movq	stderr(%rip), %rbx
	callq	hipGetLastError
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %esi
	movl	$.L.str.1, %ecx
	movq	%rbx, %rdi
	movl	$245, %edx
	jmp	.LBB0_5
.LBB0_59:
	movq	stderr(%rip), %rbx
	callq	hipGetLastError
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %esi
	movl	$.L.str.1, %ecx
	movq	%rbx, %rdi
	movl	$246, %edx
	jmp	.LBB0_5
.LBB0_67:
	movq	stderr(%rip), %rbx
	callq	hipGetLastError
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %esi
	movl	$.L.str.1, %ecx
	movq	%rbx, %rdi
	movl	$253, %edx
	jmp	.LBB0_5
.LBB0_69:
	movq	stderr(%rip), %rbx
	callq	hipGetLastError
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %esi
	movl	$.L.str.1, %ecx
	movq	%rbx, %rdi
	movl	$256, %edx                      # imm = 0x100
	jmp	.LBB0_5
.LBB0_71:
	movq	stderr(%rip), %rbx
	callq	hipGetLastError
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %esi
	movl	$.L.str.1, %ecx
	movq	%rbx, %rdi
	movl	$259, %edx                      # imm = 0x103
	jmp	.LBB0_5
.LBB0_73:
	movq	stderr(%rip), %rbx
	callq	hipGetLastError
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %esi
	movl	$.L.str.1, %ecx
	movq	%rbx, %rdi
	movl	$262, %edx                      # imm = 0x106
	jmp	.LBB0_5
.LBB0_76:
	movq	stderr(%rip), %rbx
	callq	hipGetLastError
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %esi
	movl	$.L.str.1, %ecx
	movq	%rbx, %rdi
	movl	$269, %edx                      # imm = 0x10D
	jmp	.LBB0_5
.Lfunc_end0:
	.size	main, .Lfunc_end0-main
	.cfi_endproc
                                        # -- End function
	.section	.text._Z25__device_stub__reduceGmemIfEvPT_S1_m,"axG",@progbits,_Z25__device_stub__reduceGmemIfEvPT_S1_m,comdat
	.weak	_Z25__device_stub__reduceGmemIfEvPT_S1_m # -- Begin function _Z25__device_stub__reduceGmemIfEvPT_S1_m
	.type	_Z25__device_stub__reduceGmemIfEvPT_S1_m,@function
_Z25__device_stub__reduceGmemIfEvPT_S1_m: # @_Z25__device_stub__reduceGmemIfEvPT_S1_m
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10reduceGmemIfEvPT_S1_m, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z25__device_stub__reduceGmemIfEvPT_S1_m, .Lfunc_end1-_Z25__device_stub__reduceGmemIfEvPT_S1_m
	.cfi_endproc
                                        # -- End function
	.section	.text._Z25__device_stub__reduceSmemIfEvPT_S1_m,"axG",@progbits,_Z25__device_stub__reduceSmemIfEvPT_S1_m,comdat
	.weak	_Z25__device_stub__reduceSmemIfEvPT_S1_m # -- Begin function _Z25__device_stub__reduceSmemIfEvPT_S1_m
	.type	_Z25__device_stub__reduceSmemIfEvPT_S1_m,@function
_Z25__device_stub__reduceSmemIfEvPT_S1_m: # @_Z25__device_stub__reduceSmemIfEvPT_S1_m
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10reduceSmemIfEvPT_S1_m, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z25__device_stub__reduceSmemIfEvPT_S1_m, .Lfunc_end2-_Z25__device_stub__reduceSmemIfEvPT_S1_m
	.cfi_endproc
                                        # -- End function
	.section	.text._Z31__device_stub__reduceSmemUnrollIfEvPT_S1_m,"axG",@progbits,_Z31__device_stub__reduceSmemUnrollIfEvPT_S1_m,comdat
	.weak	_Z31__device_stub__reduceSmemUnrollIfEvPT_S1_m # -- Begin function _Z31__device_stub__reduceSmemUnrollIfEvPT_S1_m
	.type	_Z31__device_stub__reduceSmemUnrollIfEvPT_S1_m,@function
_Z31__device_stub__reduceSmemUnrollIfEvPT_S1_m: # @_Z31__device_stub__reduceSmemUnrollIfEvPT_S1_m
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16reduceSmemUnrollIfEvPT_S1_m, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z31__device_stub__reduceSmemUnrollIfEvPT_S1_m, .Lfunc_end3-_Z31__device_stub__reduceSmemUnrollIfEvPT_S1_m
	.cfi_endproc
                                        # -- End function
	.section	.text._Z38__device_stub__reduceSmemUnrollDynamicIfEvPT_S1_m,"axG",@progbits,_Z38__device_stub__reduceSmemUnrollDynamicIfEvPT_S1_m,comdat
	.weak	_Z38__device_stub__reduceSmemUnrollDynamicIfEvPT_S1_m # -- Begin function _Z38__device_stub__reduceSmemUnrollDynamicIfEvPT_S1_m
	.type	_Z38__device_stub__reduceSmemUnrollDynamicIfEvPT_S1_m,@function
_Z38__device_stub__reduceSmemUnrollDynamicIfEvPT_S1_m: # @_Z38__device_stub__reduceSmemUnrollDynamicIfEvPT_S1_m
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z23reduceSmemUnrollDynamicIfEvPT_S1_m, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z38__device_stub__reduceSmemUnrollDynamicIfEvPT_S1_m, .Lfunc_end4-_Z38__device_stub__reduceSmemUnrollDynamicIfEvPT_S1_m
	.cfi_endproc
                                        # -- End function
	.text
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB5_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB5_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10reduceGmemIfEvPT_S1_m, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10reduceSmemIfEvPT_S1_m, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z16reduceSmemUnrollIfEvPT_S1_m, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z23reduceSmemUnrollDynamicIfEvPT_S1_m, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end5:
	.size	__hip_module_ctor, .Lfunc_end5-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB6_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB6_2:
	retq
.Lfunc_end6:
	.size	__hip_module_dtor, .Lfunc_end6-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Cuda runtime error in line %d of file %s     : %s \n"
	.size	.L.str, 52

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"/home/ubuntu/Datasets/stackv2/train-structured-repos-hip-sm89/JosephChenHub/CUDA_C_Programming/master/share_mem.hip"
	.size	.L.str.1, 116

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"threads_per_block:%d, num_blocks:%d, %d\n"
	.size	.L.str.2, 41

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"Starting reduction ..."
	.size	.L.str.3, 23

	.type	_Z10reduceGmemIfEvPT_S1_m,@object # @_Z10reduceGmemIfEvPT_S1_m
	.section	.rodata._Z10reduceGmemIfEvPT_S1_m,"aG",@progbits,_Z10reduceGmemIfEvPT_S1_m,comdat
	.weak	_Z10reduceGmemIfEvPT_S1_m
	.p2align	3, 0x0
_Z10reduceGmemIfEvPT_S1_m:
	.quad	_Z25__device_stub__reduceGmemIfEvPT_S1_m
	.size	_Z10reduceGmemIfEvPT_S1_m, 8

	.type	_Z10reduceSmemIfEvPT_S1_m,@object # @_Z10reduceSmemIfEvPT_S1_m
	.section	.rodata._Z10reduceSmemIfEvPT_S1_m,"aG",@progbits,_Z10reduceSmemIfEvPT_S1_m,comdat
	.weak	_Z10reduceSmemIfEvPT_S1_m
	.p2align	3, 0x0
_Z10reduceSmemIfEvPT_S1_m:
	.quad	_Z25__device_stub__reduceSmemIfEvPT_S1_m
	.size	_Z10reduceSmemIfEvPT_S1_m, 8

	.type	_Z16reduceSmemUnrollIfEvPT_S1_m,@object # @_Z16reduceSmemUnrollIfEvPT_S1_m
	.section	.rodata._Z16reduceSmemUnrollIfEvPT_S1_m,"aG",@progbits,_Z16reduceSmemUnrollIfEvPT_S1_m,comdat
	.weak	_Z16reduceSmemUnrollIfEvPT_S1_m
	.p2align	3, 0x0
_Z16reduceSmemUnrollIfEvPT_S1_m:
	.quad	_Z31__device_stub__reduceSmemUnrollIfEvPT_S1_m
	.size	_Z16reduceSmemUnrollIfEvPT_S1_m, 8

	.type	_Z23reduceSmemUnrollDynamicIfEvPT_S1_m,@object # @_Z23reduceSmemUnrollDynamicIfEvPT_S1_m
	.section	.rodata._Z23reduceSmemUnrollDynamicIfEvPT_S1_m,"aG",@progbits,_Z23reduceSmemUnrollDynamicIfEvPT_S1_m,comdat
	.weak	_Z23reduceSmemUnrollDynamicIfEvPT_S1_m
	.p2align	3, 0x0
_Z23reduceSmemUnrollDynamicIfEvPT_S1_m:
	.quad	_Z38__device_stub__reduceSmemUnrollDynamicIfEvPT_S1_m
	.size	_Z23reduceSmemUnrollDynamicIfEvPT_S1_m, 8

	.type	.L.str.4,@object                # @.str.4
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.4:
	.asciz	"Global memory GPU Sum:%5f CPU Sum:%5f\n"
	.size	.L.str.4, 39

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"Shared memory GPU Sum:%5f CPU Sum:%5f\n"
	.size	.L.str.5, 39

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"Shared memory Unroll GPU Sum:%5f CPU Sum:%5f\n"
	.size	.L.str.6, 46

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"Shared memory Unroll Dynamic GPU Sum:%5f CPU Sum:%5f\n"
	.size	.L.str.7, 54

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z10reduceGmemIfEvPT_S1_m"
	.size	.L__unnamed_1, 26

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z10reduceSmemIfEvPT_S1_m"
	.size	.L__unnamed_2, 26

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z16reduceSmemUnrollIfEvPT_S1_m"
	.size	.L__unnamed_3, 32

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"_Z23reduceSmemUnrollDynamicIfEvPT_S1_m"
	.size	.L__unnamed_4, 39

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z25__device_stub__reduceGmemIfEvPT_S1_m
	.addrsig_sym _Z25__device_stub__reduceSmemIfEvPT_S1_m
	.addrsig_sym _Z31__device_stub__reduceSmemUnrollIfEvPT_S1_m
	.addrsig_sym _Z38__device_stub__reduceSmemUnrollDynamicIfEvPT_S1_m
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z10reduceGmemIfEvPT_S1_m
	.addrsig_sym _Z10reduceSmemIfEvPT_S1_m
	.addrsig_sym _Z16reduceSmemUnrollIfEvPT_S1_m
	.addrsig_sym _Z23reduceSmemUnrollDynamicIfEvPT_S1_m
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.section	.text._Z10reduceGmemIfEvPT_S1_m,"axG",@progbits,_Z10reduceGmemIfEvPT_S1_m,comdat
	.protected	_Z10reduceGmemIfEvPT_S1_m ; -- Begin function _Z10reduceGmemIfEvPT_S1_m
	.globl	_Z10reduceGmemIfEvPT_S1_m
	.p2align	8
	.type	_Z10reduceGmemIfEvPT_S1_m,@function
_Z10reduceGmemIfEvPT_S1_m:              ; @_Z10reduceGmemIfEvPT_S1_m
; %bb.0:
	s_clause 0x1
	s_load_b32 s5, s[0:1], 0x24
	s_load_b64 s[2:3], s[0:1], 0x10
	v_mov_b32_e32 v2, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s5, s5, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s6, s15, s5
	v_add_nc_u32_e32 v1, s6, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_u64_e32 vcc_lo, s[2:3], v[1:2]
	s_and_saveexec_b32 s2, vcc_lo
	s_cbranch_execz .LBB0_13
; %bb.1:
	s_load_b128 s[0:3], s[0:1], 0x0
	s_mov_b32 s7, 0
	v_cmp_gt_u32_e32 vcc_lo, 0x200, v0
	s_lshl_b64 s[6:7], s[6:7], 2
	v_lshlrev_b32_e32 v1, 2, v0
	s_mov_b32 s4, s15
	s_waitcnt lgkmcnt(0)
	s_add_u32 s2, s2, s6
	s_addc_u32 s3, s3, s7
	s_cmpk_gt_u32 s5, 0x3ff
	s_cselect_b32 s6, -1, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s7, vcc_lo, s6
	s_and_saveexec_b32 s6, s7
	s_cbranch_execz .LBB0_3
; %bb.2:
	s_clause 0x1
	global_load_b32 v2, v1, s[2:3] offset:2048
	global_load_b32 v3, v1, s[2:3]
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v2, v2, v3
	global_store_b32 v1, v2, s[2:3]
.LBB0_3:
	s_or_b32 exec_lo, exec_lo, s6
	v_cmp_gt_u32_e32 vcc_lo, 0x100, v0
	s_cmpk_gt_u32 s5, 0x1ff
	s_waitcnt_vscnt null, 0x0
	s_cselect_b32 s6, -1, 0
	s_barrier
	s_and_b32 s7, vcc_lo, s6
	buffer_gl0_inv
	s_and_saveexec_b32 s6, s7
	s_cbranch_execz .LBB0_5
; %bb.4:
	s_clause 0x1
	global_load_b32 v2, v1, s[2:3] offset:1024
	global_load_b32 v3, v1, s[2:3]
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v2, v2, v3
	global_store_b32 v1, v2, s[2:3]
.LBB0_5:
	s_or_b32 exec_lo, exec_lo, s6
	v_cmp_gt_u32_e32 vcc_lo, 0x80, v0
	s_cmpk_gt_u32 s5, 0xff
	s_waitcnt_vscnt null, 0x0
	s_cselect_b32 s6, -1, 0
	s_barrier
	s_and_b32 s7, vcc_lo, s6
	buffer_gl0_inv
	s_and_saveexec_b32 s6, s7
	s_cbranch_execz .LBB0_7
; %bb.6:
	s_clause 0x1
	global_load_b32 v2, v1, s[2:3] offset:512
	global_load_b32 v3, v1, s[2:3]
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v2, v2, v3
	global_store_b32 v1, v2, s[2:3]
.LBB0_7:
	s_or_b32 exec_lo, exec_lo, s6
	v_cmp_gt_u32_e32 vcc_lo, 64, v0
	s_cmpk_gt_u32 s5, 0x7f
	s_waitcnt_vscnt null, 0x0
	s_cselect_b32 s5, -1, 0
	s_barrier
	s_and_b32 s6, vcc_lo, s5
	buffer_gl0_inv
	s_and_saveexec_b32 s5, s6
	s_cbranch_execz .LBB0_9
; %bb.8:
	s_clause 0x1
	global_load_b32 v2, v1, s[2:3] offset:256
	global_load_b32 v3, v1, s[2:3]
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v2, v2, v3
	global_store_b32 v1, v2, s[2:3]
.LBB0_9:
	s_or_b32 exec_lo, exec_lo, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s5, exec_lo
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	v_cmpx_gt_u32_e32 32, v0
	s_cbranch_execz .LBB0_11
; %bb.10:
	v_or_b32_e32 v2, 0x80, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v2, s6, s2, v2
	v_add_co_ci_u32_e64 v3, null, s3, 0, s6
	v_add_co_u32 v4, s6, s2, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v5, null, s3, 0, s6
	flat_load_b32 v1, v[2:3] glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v2, v[4:5] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_f32_e32 v1, v1, v2
	flat_store_b32 v[4:5], v1 dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b32 v1, v[4:5] offset:64 glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v2, v[4:5] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_f32_e32 v1, v1, v2
	flat_store_b32 v[4:5], v1 dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b32 v1, v[4:5] offset:32 glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v2, v[4:5] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_f32_e32 v1, v1, v2
	flat_store_b32 v[4:5], v1 dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b32 v1, v[4:5] offset:16 glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v2, v[4:5] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_f32_e32 v1, v1, v2
	flat_store_b32 v[4:5], v1 dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b32 v1, v[4:5] offset:8 glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v2, v[4:5] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_f32_e32 v1, v1, v2
	flat_store_b32 v[4:5], v1 dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b32 v1, v[4:5] offset:4 glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v2, v[4:5] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_f32_e32 v1, v1, v2
	flat_store_b32 v[4:5], v1 dlc
	s_waitcnt_vscnt null, 0x0
.LBB0_11:
	s_or_b32 exec_lo, exec_lo, s5
	v_cmp_eq_u32_e32 vcc_lo, 0, v0
	s_mov_b32 s5, 0
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_13
; %bb.12:
	v_mov_b32_e32 v0, 0
	global_load_b32 v1, v0, s[2:3]
	s_lshl_b64 s[2:3], s[4:5], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s0, s0, s2
	s_addc_u32 s1, s1, s3
	s_waitcnt vmcnt(0)
	global_store_b32 v0, v1, s[0:1]
.LBB0_13:
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10reduceGmemIfEvPT_S1_m
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z10reduceGmemIfEvPT_S1_m,"axG",@progbits,_Z10reduceGmemIfEvPT_S1_m,comdat
.Lfunc_end0:
	.size	_Z10reduceGmemIfEvPT_S1_m, .Lfunc_end0-_Z10reduceGmemIfEvPT_S1_m
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 804
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z10reduceSmemIfEvPT_S1_m,"axG",@progbits,_Z10reduceSmemIfEvPT_S1_m,comdat
	.protected	_Z10reduceSmemIfEvPT_S1_m ; -- Begin function _Z10reduceSmemIfEvPT_S1_m
	.globl	_Z10reduceSmemIfEvPT_S1_m
	.p2align	8
	.type	_Z10reduceSmemIfEvPT_S1_m,@function
_Z10reduceSmemIfEvPT_S1_m:              ; @_Z10reduceSmemIfEvPT_S1_m
; %bb.0:
	s_clause 0x2
	s_load_b32 s3, s[0:1], 0x24
	s_load_b64 s[8:9], s[0:1], 0x10
	s_load_b128 s[4:7], s[0:1], 0x0
	s_mov_b32 s2, s15
	v_mov_b32_e32 v2, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s3, s3, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s0, s15, s3
	v_add_nc_u32_e32 v1, s0, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_u64_e32 vcc_lo, s[8:9], v[1:2]
	v_lshlrev_b32_e32 v1, 2, v0
	s_and_saveexec_b32 s8, vcc_lo
	s_cbranch_execz .LBB1_2
; %bb.1:
	s_mov_b32 s1, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[0:1], s[0:1], 2
	s_add_u32 s0, s6, s0
	s_addc_u32 s1, s7, s1
	global_load_b32 v2, v1, s[0:1]
.LBB1_2:
	s_or_b32 exec_lo, exec_lo, s8
	v_cmp_gt_u32_e32 vcc_lo, 0x200, v0
	s_cmpk_gt_u32 s3, 0x3ff
	s_waitcnt vmcnt(0)
	ds_store_b32 v1, v2
	s_cselect_b32 s0, -1, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s1, vcc_lo, s0
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s0, s1
	s_cbranch_execz .LBB1_4
; %bb.3:
	ds_load_2addr_stride64_b32 v[2:3], v1 offset1:8
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v2, v3, v2
	ds_store_b32 v1, v2
.LBB1_4:
	s_or_b32 exec_lo, exec_lo, s0
	v_cmp_gt_u32_e32 vcc_lo, 0x100, v0
	s_cmpk_gt_u32 s3, 0x1ff
	s_waitcnt lgkmcnt(0)
	s_cselect_b32 s0, -1, 0
	s_barrier
	s_and_b32 s1, vcc_lo, s0
	buffer_gl0_inv
	s_and_saveexec_b32 s0, s1
	s_cbranch_execz .LBB1_6
; %bb.5:
	ds_load_2addr_stride64_b32 v[2:3], v1 offset1:4
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v2, v3, v2
	ds_store_b32 v1, v2
.LBB1_6:
	s_or_b32 exec_lo, exec_lo, s0
	v_cmp_gt_u32_e32 vcc_lo, 0x80, v0
	s_cmpk_gt_u32 s3, 0xff
	s_waitcnt lgkmcnt(0)
	s_cselect_b32 s0, -1, 0
	s_barrier
	s_and_b32 s1, vcc_lo, s0
	buffer_gl0_inv
	s_and_saveexec_b32 s0, s1
	s_cbranch_execz .LBB1_8
; %bb.7:
	ds_load_2addr_stride64_b32 v[2:3], v1 offset1:2
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v2, v3, v2
	ds_store_b32 v1, v2
.LBB1_8:
	s_or_b32 exec_lo, exec_lo, s0
	v_cmp_gt_u32_e32 vcc_lo, 64, v0
	s_cmpk_gt_u32 s3, 0x7f
	s_waitcnt lgkmcnt(0)
	s_cselect_b32 s0, -1, 0
	s_barrier
	s_and_b32 s1, vcc_lo, s0
	buffer_gl0_inv
	s_and_saveexec_b32 s0, s1
	s_cbranch_execz .LBB1_10
; %bb.9:
	ds_load_2addr_stride64_b32 v[2:3], v1 offset1:1
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v2, v3, v2
	ds_store_b32 v1, v2
.LBB1_10:
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s1, exec_lo
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmpx_gt_u32_e32 32, v0
	s_cbranch_execz .LBB1_12
; %bb.11:
	v_lshl_add_u32 v2, v0, 2, 0x80
	v_cmp_ne_u32_e64 s0, -1, v1
	s_mov_b64 s[6:7], src_shared_base
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_ne_u32_e32 vcc_lo, -1, v2
	v_cndmask_b32_e64 v3, 0, s7, s0
	v_cndmask_b32_e32 v4, 0, v2, vcc_lo
	v_cndmask_b32_e64 v5, 0, s7, vcc_lo
	v_cndmask_b32_e64 v2, 0, v1, s0
	flat_load_b32 v5, v[4:5] glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v6, v[2:3] glc dlc
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v4, 64, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ne_u32_e32 vcc_lo, -1, v4
	v_cndmask_b32_e32 v4, 0, v4, vcc_lo
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v6, v5, v6
	v_cndmask_b32_e64 v5, 0, s7, vcc_lo
	flat_store_b32 v[2:3], v6 dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b32 v5, v[4:5] glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v6, v[2:3] glc dlc
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v4, 32, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ne_u32_e32 vcc_lo, -1, v4
	v_cndmask_b32_e32 v4, 0, v4, vcc_lo
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v6, v5, v6
	v_cndmask_b32_e64 v5, 0, s7, vcc_lo
	flat_store_b32 v[2:3], v6 dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b32 v5, v[4:5] glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v6, v[2:3] glc dlc
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v4, 16, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ne_u32_e32 vcc_lo, -1, v4
	v_cndmask_b32_e32 v4, 0, v4, vcc_lo
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v6, v5, v6
	v_cndmask_b32_e64 v5, 0, s7, vcc_lo
	flat_store_b32 v[2:3], v6 dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b32 v5, v[4:5] glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v6, v[2:3] glc dlc
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v4, 8, v1
	v_add_nc_u32_e32 v1, 4, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_cmp_ne_u32_e32 vcc_lo, -1, v4
	v_cndmask_b32_e32 v4, 0, v4, vcc_lo
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v6, v5, v6
	v_cndmask_b32_e64 v5, 0, s7, vcc_lo
	v_cmp_ne_u32_e32 vcc_lo, -1, v1
	flat_store_b32 v[2:3], v6 dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b32 v5, v[4:5] glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v6, v[2:3] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_dual_cndmask_b32 v4, 0, v1 :: v_dual_add_f32 v1, v5, v6
	v_cndmask_b32_e64 v5, 0, s7, vcc_lo
	flat_store_b32 v[2:3], v1 dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b32 v1, v[4:5] glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v4, v[2:3] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_f32_e32 v1, v1, v4
	flat_store_b32 v[2:3], v1 dlc
	s_waitcnt_vscnt null, 0x0
.LBB1_12:
	s_or_b32 exec_lo, exec_lo, s1
	s_mov_b32 s3, 0
	s_mov_b32 s0, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB1_14
; %bb.13:
	v_mov_b32_e32 v0, 0
	s_lshl_b64 s[0:1], s[2:3], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s0, s4, s0
	s_addc_u32 s1, s5, s1
	ds_load_b32 v1, v0
	s_waitcnt lgkmcnt(0)
	global_store_b32 v0, v1, s[0:1]
.LBB1_14:
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10reduceSmemIfEvPT_S1_m
		.amdhsa_group_segment_fixed_size 2048
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z10reduceSmemIfEvPT_S1_m,"axG",@progbits,_Z10reduceSmemIfEvPT_S1_m,comdat
.Lfunc_end1:
	.size	_Z10reduceSmemIfEvPT_S1_m, .Lfunc_end1-_Z10reduceSmemIfEvPT_S1_m
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 936
; NumSgprs: 18
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 2048 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z16reduceSmemUnrollIfEvPT_S1_m,"axG",@progbits,_Z16reduceSmemUnrollIfEvPT_S1_m,comdat
	.protected	_Z16reduceSmemUnrollIfEvPT_S1_m ; -- Begin function _Z16reduceSmemUnrollIfEvPT_S1_m
	.globl	_Z16reduceSmemUnrollIfEvPT_S1_m
	.p2align	8
	.type	_Z16reduceSmemUnrollIfEvPT_S1_m,@function
_Z16reduceSmemUnrollIfEvPT_S1_m:        ; @_Z16reduceSmemUnrollIfEvPT_S1_m
; %bb.0:
	s_clause 0x2
	s_load_b32 s3, s[0:1], 0x24
	s_load_b64 s[8:9], s[0:1], 0x10
	s_load_b128 s[4:7], s[0:1], 0x0
	s_mov_b32 s2, s15
	s_waitcnt lgkmcnt(0)
	s_and_b32 s3, s3, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_mul_i32 s0, s15, s3
	s_mul_i32 s1, s3, 3
	v_lshl_add_u32 v1, s0, 2, v0
	v_add_co_u32 v2, s0, v1, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v3, null, 0, 0, s0
	v_cmp_gt_u64_e32 vcc_lo, s[8:9], v[2:3]
	v_mov_b32_e32 v2, 0
	s_and_saveexec_b32 s0, vcc_lo
	s_cbranch_execz .LBB2_2
; %bb.1:
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	s_lshl_b32 s8, s3, 2
	s_lshl_b32 s1, s1, 2
	v_add_co_u32 v1, vcc_lo, s6, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, s7, v2, vcc_lo
	s_lshl_b32 s6, s3, 3
	v_add_co_u32 v3, vcc_lo, v1, s8
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v2, vcc_lo
	v_add_co_u32 v5, vcc_lo, v1, s6
	v_add_co_ci_u32_e32 v6, vcc_lo, 0, v2, vcc_lo
	s_clause 0x1
	global_load_b32 v7, v[1:2], off
	global_load_b32 v3, v[3:4], off
	v_add_co_u32 v1, vcc_lo, v1, s1
	v_add_co_ci_u32_e32 v2, vcc_lo, 0, v2, vcc_lo
	s_clause 0x1
	global_load_b32 v4, v[5:6], off
	global_load_b32 v1, v[1:2], off
	s_waitcnt vmcnt(2)
	v_add_f32_e32 v2, v7, v3
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f32_e32 v2, v2, v4
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v2, v2, v1
.LBB2_2:
	s_or_b32 exec_lo, exec_lo, s0
	v_cmp_gt_u32_e32 vcc_lo, 0x200, v0
	s_cmpk_gt_u32 s3, 0x3ff
	v_lshlrev_b32_e32 v1, 2, v0
	s_cselect_b32 s0, -1, 0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s1, vcc_lo, s0
	ds_store_b32 v1, v2
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s0, s1
	s_cbranch_execz .LBB2_4
; %bb.3:
	ds_load_2addr_stride64_b32 v[2:3], v1 offset1:8
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v2, v3, v2
	ds_store_b32 v1, v2
.LBB2_4:
	s_or_b32 exec_lo, exec_lo, s0
	v_cmp_gt_u32_e32 vcc_lo, 0x100, v0
	s_cmpk_gt_u32 s3, 0x1ff
	s_waitcnt lgkmcnt(0)
	s_cselect_b32 s0, -1, 0
	s_barrier
	s_and_b32 s1, vcc_lo, s0
	buffer_gl0_inv
	s_and_saveexec_b32 s0, s1
	s_cbranch_execz .LBB2_6
; %bb.5:
	ds_load_2addr_stride64_b32 v[2:3], v1 offset1:4
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v2, v3, v2
	ds_store_b32 v1, v2
.LBB2_6:
	s_or_b32 exec_lo, exec_lo, s0
	v_cmp_gt_u32_e32 vcc_lo, 0x80, v0
	s_cmpk_gt_u32 s3, 0xff
	s_waitcnt lgkmcnt(0)
	s_cselect_b32 s0, -1, 0
	s_barrier
	s_and_b32 s1, vcc_lo, s0
	buffer_gl0_inv
	s_and_saveexec_b32 s0, s1
	s_cbranch_execz .LBB2_8
; %bb.7:
	ds_load_2addr_stride64_b32 v[2:3], v1 offset1:2
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v2, v3, v2
	ds_store_b32 v1, v2
.LBB2_8:
	s_or_b32 exec_lo, exec_lo, s0
	v_cmp_gt_u32_e32 vcc_lo, 64, v0
	s_cmpk_gt_u32 s3, 0x7f
	s_waitcnt lgkmcnt(0)
	s_cselect_b32 s0, -1, 0
	s_barrier
	s_and_b32 s1, vcc_lo, s0
	buffer_gl0_inv
	s_and_saveexec_b32 s0, s1
	s_cbranch_execz .LBB2_10
; %bb.9:
	ds_load_2addr_stride64_b32 v[2:3], v1 offset1:1
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v2, v3, v2
	ds_store_b32 v1, v2
.LBB2_10:
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s1, exec_lo
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmpx_gt_u32_e32 32, v0
	s_cbranch_execz .LBB2_12
; %bb.11:
	v_lshl_add_u32 v2, v0, 2, 0x80
	v_cmp_ne_u32_e64 s0, -1, v1
	s_mov_b64 s[6:7], src_shared_base
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_ne_u32_e32 vcc_lo, -1, v2
	v_cndmask_b32_e64 v3, 0, s7, s0
	v_cndmask_b32_e32 v4, 0, v2, vcc_lo
	v_cndmask_b32_e64 v5, 0, s7, vcc_lo
	v_cndmask_b32_e64 v2, 0, v1, s0
	flat_load_b32 v5, v[4:5] glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v6, v[2:3] glc dlc
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v4, 64, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ne_u32_e32 vcc_lo, -1, v4
	v_cndmask_b32_e32 v4, 0, v4, vcc_lo
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v6, v5, v6
	v_cndmask_b32_e64 v5, 0, s7, vcc_lo
	flat_store_b32 v[2:3], v6 dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b32 v5, v[4:5] glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v6, v[2:3] glc dlc
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v4, 32, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ne_u32_e32 vcc_lo, -1, v4
	v_cndmask_b32_e32 v4, 0, v4, vcc_lo
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v6, v5, v6
	v_cndmask_b32_e64 v5, 0, s7, vcc_lo
	flat_store_b32 v[2:3], v6 dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b32 v5, v[4:5] glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v6, v[2:3] glc dlc
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v4, 16, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ne_u32_e32 vcc_lo, -1, v4
	v_cndmask_b32_e32 v4, 0, v4, vcc_lo
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v6, v5, v6
	v_cndmask_b32_e64 v5, 0, s7, vcc_lo
	flat_store_b32 v[2:3], v6 dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b32 v5, v[4:5] glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v6, v[2:3] glc dlc
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v4, 8, v1
	v_add_nc_u32_e32 v1, 4, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_cmp_ne_u32_e32 vcc_lo, -1, v4
	v_cndmask_b32_e32 v4, 0, v4, vcc_lo
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v6, v5, v6
	v_cndmask_b32_e64 v5, 0, s7, vcc_lo
	v_cmp_ne_u32_e32 vcc_lo, -1, v1
	flat_store_b32 v[2:3], v6 dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b32 v5, v[4:5] glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v6, v[2:3] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_dual_cndmask_b32 v4, 0, v1 :: v_dual_add_f32 v1, v5, v6
	v_cndmask_b32_e64 v5, 0, s7, vcc_lo
	flat_store_b32 v[2:3], v1 dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b32 v1, v[4:5] glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v4, v[2:3] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_f32_e32 v1, v1, v4
	flat_store_b32 v[2:3], v1 dlc
	s_waitcnt_vscnt null, 0x0
.LBB2_12:
	s_or_b32 exec_lo, exec_lo, s1
	s_mov_b32 s3, 0
	s_mov_b32 s0, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB2_14
; %bb.13:
	v_mov_b32_e32 v0, 0
	s_lshl_b64 s[0:1], s[2:3], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s0, s4, s0
	s_addc_u32 s1, s5, s1
	ds_load_b32 v1, v0
	s_waitcnt lgkmcnt(0)
	global_store_b32 v0, v1, s[0:1]
.LBB2_14:
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16reduceSmemUnrollIfEvPT_S1_m
		.amdhsa_group_segment_fixed_size 2048
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z16reduceSmemUnrollIfEvPT_S1_m,"axG",@progbits,_Z16reduceSmemUnrollIfEvPT_S1_m,comdat
.Lfunc_end2:
	.size	_Z16reduceSmemUnrollIfEvPT_S1_m, .Lfunc_end2-_Z16reduceSmemUnrollIfEvPT_S1_m
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1080
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 2048 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z23reduceSmemUnrollDynamicIfEvPT_S1_m,"axG",@progbits,_Z23reduceSmemUnrollDynamicIfEvPT_S1_m,comdat
	.protected	_Z23reduceSmemUnrollDynamicIfEvPT_S1_m ; -- Begin function _Z23reduceSmemUnrollDynamicIfEvPT_S1_m
	.globl	_Z23reduceSmemUnrollDynamicIfEvPT_S1_m
	.p2align	8
	.type	_Z23reduceSmemUnrollDynamicIfEvPT_S1_m,@function
_Z23reduceSmemUnrollDynamicIfEvPT_S1_m: ; @_Z23reduceSmemUnrollDynamicIfEvPT_S1_m
; %bb.0:
	s_clause 0x2
	s_load_b32 s3, s[0:1], 0x24
	s_load_b64 s[8:9], s[0:1], 0x10
	s_load_b128 s[4:7], s[0:1], 0x0
	s_mov_b32 s2, s15
	s_waitcnt lgkmcnt(0)
	s_and_b32 s3, s3, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_mul_i32 s0, s15, s3
	s_mul_i32 s1, s3, 3
	v_lshl_add_u32 v1, s0, 2, v0
	v_add_co_u32 v2, s0, v1, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v3, null, 0, 0, s0
	v_cmp_gt_u64_e32 vcc_lo, s[8:9], v[2:3]
	v_mov_b32_e32 v2, 0
	s_and_saveexec_b32 s0, vcc_lo
	s_cbranch_execz .LBB3_2
; %bb.1:
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	s_lshl_b32 s8, s3, 2
	s_lshl_b32 s1, s1, 2
	v_add_co_u32 v1, vcc_lo, s6, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, s7, v2, vcc_lo
	s_lshl_b32 s6, s3, 3
	v_add_co_u32 v3, vcc_lo, v1, s8
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v2, vcc_lo
	v_add_co_u32 v5, vcc_lo, v1, s6
	v_add_co_ci_u32_e32 v6, vcc_lo, 0, v2, vcc_lo
	s_clause 0x1
	global_load_b32 v7, v[1:2], off
	global_load_b32 v3, v[3:4], off
	v_add_co_u32 v1, vcc_lo, v1, s1
	v_add_co_ci_u32_e32 v2, vcc_lo, 0, v2, vcc_lo
	s_clause 0x1
	global_load_b32 v4, v[5:6], off
	global_load_b32 v1, v[1:2], off
	s_waitcnt vmcnt(2)
	v_add_f32_e32 v2, v7, v3
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f32_e32 v2, v2, v4
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v2, v2, v1
.LBB3_2:
	s_or_b32 exec_lo, exec_lo, s0
	v_cmp_gt_u32_e32 vcc_lo, 0x200, v0
	s_cmpk_gt_u32 s3, 0x3ff
	v_lshl_add_u32 v1, v0, 2, 0
	s_cselect_b32 s0, -1, 0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s1, vcc_lo, s0
	ds_store_b32 v1, v2
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s0, s1
	s_cbranch_execz .LBB3_4
; %bb.3:
	ds_load_2addr_stride64_b32 v[2:3], v1 offset1:8
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v2, v3, v2
	ds_store_b32 v1, v2
.LBB3_4:
	s_or_b32 exec_lo, exec_lo, s0
	v_cmp_gt_u32_e32 vcc_lo, 0x100, v0
	s_cmpk_gt_u32 s3, 0x1ff
	s_waitcnt lgkmcnt(0)
	s_cselect_b32 s0, -1, 0
	s_barrier
	s_and_b32 s1, vcc_lo, s0
	buffer_gl0_inv
	s_and_saveexec_b32 s0, s1
	s_cbranch_execz .LBB3_6
; %bb.5:
	ds_load_2addr_stride64_b32 v[2:3], v1 offset1:4
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v2, v3, v2
	ds_store_b32 v1, v2
.LBB3_6:
	s_or_b32 exec_lo, exec_lo, s0
	v_cmp_gt_u32_e32 vcc_lo, 0x80, v0
	s_cmpk_gt_u32 s3, 0xff
	s_waitcnt lgkmcnt(0)
	s_cselect_b32 s0, -1, 0
	s_barrier
	s_and_b32 s1, vcc_lo, s0
	buffer_gl0_inv
	s_and_saveexec_b32 s0, s1
	s_cbranch_execz .LBB3_8
; %bb.7:
	ds_load_2addr_stride64_b32 v[2:3], v1 offset1:2
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v2, v3, v2
	ds_store_b32 v1, v2
.LBB3_8:
	s_or_b32 exec_lo, exec_lo, s0
	v_cmp_gt_u32_e32 vcc_lo, 64, v0
	s_cmpk_gt_u32 s3, 0x7f
	s_waitcnt lgkmcnt(0)
	s_cselect_b32 s0, -1, 0
	s_barrier
	s_and_b32 s1, vcc_lo, s0
	buffer_gl0_inv
	s_and_saveexec_b32 s0, s1
	s_cbranch_execz .LBB3_10
; %bb.9:
	ds_load_2addr_stride64_b32 v[2:3], v1 offset1:1
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v2, v3, v2
	ds_store_b32 v1, v2
.LBB3_10:
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s1, exec_lo
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmpx_gt_u32_e32 32, v0
	s_cbranch_execz .LBB3_12
; %bb.11:
	v_lshlrev_b32_e32 v2, 2, v0
	v_cmp_ne_u32_e64 s0, -1, v1
	s_mov_b64 s[6:7], src_shared_base
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add3_u32 v2, 0, v2, 0x80
	v_cndmask_b32_e64 v3, 0, s7, s0
	s_delay_alu instid0(VALU_DEP_2)
	v_cmp_ne_u32_e32 vcc_lo, -1, v2
	v_cndmask_b32_e32 v4, 0, v2, vcc_lo
	v_cndmask_b32_e64 v5, 0, s7, vcc_lo
	v_cndmask_b32_e64 v2, 0, v1, s0
	flat_load_b32 v5, v[4:5] glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v6, v[2:3] glc dlc
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v4, 64, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ne_u32_e32 vcc_lo, -1, v4
	v_cndmask_b32_e32 v4, 0, v4, vcc_lo
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v6, v5, v6
	v_cndmask_b32_e64 v5, 0, s7, vcc_lo
	flat_store_b32 v[2:3], v6 dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b32 v5, v[4:5] glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v6, v[2:3] glc dlc
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v4, 32, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ne_u32_e32 vcc_lo, -1, v4
	v_cndmask_b32_e32 v4, 0, v4, vcc_lo
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v6, v5, v6
	v_cndmask_b32_e64 v5, 0, s7, vcc_lo
	flat_store_b32 v[2:3], v6 dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b32 v5, v[4:5] glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v6, v[2:3] glc dlc
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v4, 16, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ne_u32_e32 vcc_lo, -1, v4
	v_cndmask_b32_e32 v4, 0, v4, vcc_lo
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v6, v5, v6
	v_cndmask_b32_e64 v5, 0, s7, vcc_lo
	flat_store_b32 v[2:3], v6 dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b32 v5, v[4:5] glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v6, v[2:3] glc dlc
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v4, 8, v1
	v_add_nc_u32_e32 v1, 4, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_cmp_ne_u32_e32 vcc_lo, -1, v4
	v_cndmask_b32_e32 v4, 0, v4, vcc_lo
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v6, v5, v6
	v_cndmask_b32_e64 v5, 0, s7, vcc_lo
	v_cmp_ne_u32_e32 vcc_lo, -1, v1
	flat_store_b32 v[2:3], v6 dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b32 v5, v[4:5] glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v6, v[2:3] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_dual_cndmask_b32 v4, 0, v1 :: v_dual_add_f32 v1, v5, v6
	v_cndmask_b32_e64 v5, 0, s7, vcc_lo
	flat_store_b32 v[2:3], v1 dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b32 v1, v[4:5] glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v4, v[2:3] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_f32_e32 v1, v1, v4
	flat_store_b32 v[2:3], v1 dlc
	s_waitcnt_vscnt null, 0x0
.LBB3_12:
	s_or_b32 exec_lo, exec_lo, s1
	s_mov_b32 s3, 0
	s_mov_b32 s0, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB3_14
; %bb.13:
	v_mov_b32_e32 v0, 0
	s_lshl_b64 s[0:1], s[2:3], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s0, s4, s0
	s_addc_u32 s1, s5, s1
	ds_load_b32 v1, v0
	s_waitcnt lgkmcnt(0)
	global_store_b32 v0, v1, s[0:1]
.LBB3_14:
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z23reduceSmemUnrollDynamicIfEvPT_S1_m
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z23reduceSmemUnrollDynamicIfEvPT_S1_m,"axG",@progbits,_Z23reduceSmemUnrollDynamicIfEvPT_S1_m,comdat
.Lfunc_end3:
	.size	_Z23reduceSmemUnrollDynamicIfEvPT_S1_m, .Lfunc_end3-_Z23reduceSmemUnrollDynamicIfEvPT_S1_m
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1092
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym smem
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           8
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z10reduceGmemIfEvPT_S1_m
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z10reduceGmemIfEvPT_S1_m.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     6
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           8
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 2048
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z10reduceSmemIfEvPT_S1_m
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z10reduceSmemIfEvPT_S1_m.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     7
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           8
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 2048
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z16reduceSmemUnrollIfEvPT_S1_m
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z16reduceSmemUnrollIfEvPT_S1_m.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     8
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           8
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         144
        .size:           4
        .value_kind:     hidden_dynamic_lds_size
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z23reduceSmemUnrollDynamicIfEvPT_S1_m
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z23reduceSmemUnrollDynamicIfEvPT_S1_m.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     8
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
