// Yuxuan, 27 June
// Parallel (CUDA) version of Hines algorthm.


#include <cstdio>
#include <cstdlib>
#include <ctime>
#include <cstring>
#include <cuda.h>

__global__ void HinesAlgo (
    double *u, double *l, double *d,
    double *rhs, int *p, int N
) {
    int i;
    double factor;
    int offset = blockIdx.x * N;

    for (i=N-1;i>=1;--i) {
        factor = u[i+offset] / d[i+offset];
        d[p[i]+offset] -= factor * l[i+offset];
        rhs[p[i]+offset] -= factor * rhs[i+offset];
    }

    rhs[0+offset] /= d[0+offset];

    for (i=1;i<=N-1;++i) {
        rhs[i+offset] -= l[i+offset] * rhs[p[i]+offset];
        rhs[i+offset] /= d[i+offset];
    }
}

// the main function receives 3 parameters: input path, output path and the number of repeated runs
// the number of repeated runs is required to be a multiple of 32
int main (int argc, char * argv[]) {
    FILE *fp;
    clock_t time;
    int runNum;
    cudaDeviceProp devProp;
    int blockNum, blockSize;

    // Host data
    int *id; double *u; double *l;
    double *d; double *rhs; int *p;

    // Device data
    int *id1; double *u1; double *l1;
    double *d1; double *rhs1; int *p1;

    int N;

    // read data
    fp = fopen(argv[1], "r");

    fscanf(fp, "%d", &N);

    id = new int [N]; u = new double [N]; l = new double [N];
    d = new double [N]; rhs = new double [N]; p = new int [N];

    for (int i=0;i<N;++i) {
        fscanf(
            fp, "%d %lf %lf %lf %lf %d",
            &id[i], &u[i], &l[i], &rhs[i], &d[i], &p[i]);
    }

    fclose(fp);

    runNum = atoi(argv[3]);

    // choose grid dim and block dim by number of SMs and number of runs
    blockNum = -1;

    for (blockSize=256;blockSize>=32;blockSize>>=1) {
        if (runNum%blockSize==0) {
            blockNum = runNum / blockSize;
            if (blockNum>=devProp.multiProcessorCount) {
                break;
            }
        }
    }

    if (blockNum==-1) {
        printf("Number of runs is not a multiple of 32.");
        return -1;
    }

    // allocate space for device data
    cudaMalloc(reinterpret_cast<void **>(&id1), N*sizeof(int));
    cudaMalloc(reinterpret_cast<void **>(&u1), runNum*N*sizeof(double));
    cudaMalloc(reinterpret_cast<void **>(&l1), runNum*N*sizeof(double));
    cudaMalloc(reinterpret_cast<void **>(&d1), runNum*N*sizeof(double));
    cudaMalloc(reinterpret_cast<void **>(&rhs1), runNum*N*sizeof(double));
    cudaMalloc(reinterpret_cast<void **>(&p1), N*sizeof(int));

    time = clock(); // include time for device memory copy so that comparison to serial code is fair

    // copy host data to device data
    cudaMemcpy(id1, id, N*sizeof(int), cudaMemcpyHostToDevice);
    cudaMemcpy(p1, p, N*sizeof(int), cudaMemcpyHostToDevice);

    for (int i=0;i<runNum;++i) {   
        cudaMemcpy(u1+i*N, u, N*sizeof(double), cudaMemcpyHostToDevice);
        cudaMemcpy(l1+i*N, l, N*sizeof(double), cudaMemcpyHostToDevice);
        cudaMemcpy(d1+i*N, d, N*sizeof(double), cudaMemcpyHostToDevice);
        cudaMemcpy(rhs1+i*N, rhs, N*sizeof(double), cudaMemcpyHostToDevice);
    }

    HinesAlgo <<<blockNum, blockSize>>> (u1, l1, d1, rhs1, p1, N);

    cudaDeviceSynchronize();

    // copy result back to host data
    cudaMemcpy(u, u1, N*sizeof(double), cudaMemcpyDeviceToHost);
    cudaMemcpy(l, l1, N*sizeof(double), cudaMemcpyDeviceToHost);
    cudaMemcpy(d, d1, N*sizeof(double), cudaMemcpyDeviceToHost);
    cudaMemcpy(rhs, rhs1, N*sizeof(double), cudaMemcpyDeviceToHost);

    time = clock() - time;

    printf("Parallel time cost of %d runs: %.2f seconds.\n", runNum, static_cast<double>(time)/CLOCKS_PER_SEC);

    // write result
    fp = fopen(argv[2], "w+");

    for (int i=0;i<N;++i) {
        fprintf(
            fp, "%d %lf %lf %lf %lf\n",
            id[i], u[i], l[i], rhs[i], d[i]);
    }

    fclose(fp);

    delete[] id; delete[] u; delete[] l;
    delete[] d; delete[] rhs; delete[] p;
}
	.file	"tmpxft_00392b34_00000000-6_parallel.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2030:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z37__device_stub__Z9HinesAlgoPdS_S_S_PiiPdS_S_S_Pii
	.type	_Z37__device_stub__Z9HinesAlgoPdS_S_S_PiiPdS_S_S_Pii, @function
_Z37__device_stub__Z9HinesAlgoPdS_S_S_PiiPdS_S_S_Pii:
.LFB2052:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	64(%rsp), %rcx
	movq	%r8, 8(%rsp)
	movl	%r9d, 4(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z9HinesAlgoPdS_S_S_Pii(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L2:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2052:
	.size	_Z37__device_stub__Z9HinesAlgoPdS_S_S_PiiPdS_S_S_Pii, .-_Z37__device_stub__Z9HinesAlgoPdS_S_S_PiiPdS_S_S_Pii
	.globl	_Z9HinesAlgoPdS_S_S_Pii
	.type	_Z9HinesAlgoPdS_S_S_Pii, @function
_Z9HinesAlgoPdS_S_S_Pii:
.LFB2053:
	.cfi_startproc
	endbr64
	jmp	_Z37__device_stub__Z9HinesAlgoPdS_S_S_PiiPdS_S_S_Pii
	.cfi_endproc
.LFE2053:
	.size	_Z9HinesAlgoPdS_S_S_Pii, .-_Z9HinesAlgoPdS_S_S_Pii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"r"
.LC1:
	.string	"%d"
.LC2:
	.string	"%d %lf %lf %lf %lf %d"
.LC3:
	.string	"Number of runs is not a multiple of 32."
.LC5:
	.string	"Parallel time cost of %d runs: %.2f seconds.\n"
.LC6:
	.string	"w+"
.LC7:
	.string	"%d %lf %lf %lf %lf\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rsi, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movabsq	$2305843009213693950, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$1176, %rsp
	.cfi_def_cfa_offset 1232
	movq	8(%rsi), %rdi
	leaq	.LC0(%rip), %rsi
	movq	%fs:40, %rax
	movq	%rax, 1160(%rsp)
	xorl	%eax, %eax
	call	fopen@PLT
	leaq	52(%rsp), %rdx
	leaq	.LC1(%rip), %rsi
	movq	%rax, %rdi
	movq	%rax, 32(%rsp)
	xorl	%eax, %eax
	call	__isoc23_fscanf@PLT
	movslq	52(%rsp), %rdi
	cmpq	%rdi, %r12
	jb	.L9
	movabsq	$1152921504606846975, %rbx
	salq	$2, %rdi
	call	_Znam@PLT
	movslq	52(%rsp), %rdi
	movq	%rax, 24(%rsp)
	cmpq	%rdi, %rbx
	jnb	.L10
.L9:
	movq	1160(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L27
	call	__cxa_throw_bad_array_new_length@PLT
.L10:
	salq	$3, %rdi
	call	_Znam@PLT
	movslq	52(%rsp), %rdi
	movq	%rax, %rbp
	cmpq	%rdi, %rbx
	jb	.L9
	salq	$3, %rdi
	call	_Znam@PLT
	movslq	52(%rsp), %rdi
	movq	%rax, (%rsp)
	cmpq	%rdi, %rbx
	jb	.L9
	salq	$3, %rdi
	call	_Znam@PLT
	movslq	52(%rsp), %rdi
	movq	%rax, 8(%rsp)
	cmpq	%rdi, %rbx
	jb	.L9
	salq	$3, %rdi
	call	_Znam@PLT
	movslq	52(%rsp), %rdi
	movq	%rax, 16(%rsp)
	cmpq	%rdi, %r12
	jb	.L9
	salq	$2, %rdi
	xorl	%ebx, %ebx
	xorl	%r12d, %r12d
	call	_Znam@PLT
	movq	24(%rsp), %r15
	movq	%rax, 40(%rsp)
	movq	%rax, %r13
.L12:
	cmpl	%r12d, 52(%rsp)
	jle	.L28
	pushq	%r13
	.cfi_def_cfa_offset 1240
	movq	16(%rsp), %rax
	movq	%r15, %rdx
	leaq	0(%rbp,%rbx), %rcx
	leaq	.LC2(%rip), %rsi
	incl	%r12d
	addq	$4, %r15
	addq	$4, %r13
	addq	%rbx, %rax
	pushq	%rax
	.cfi_def_cfa_offset 1248
	movq	32(%rsp), %rax
	movq	48(%rsp), %rdi
	leaq	(%rax,%rbx), %r9
	movq	16(%rsp), %rax
	leaq	(%rax,%rbx), %r8
	xorl	%eax, %eax
	addq	$8, %rbx
	call	__isoc23_fscanf@PLT
	popq	%rax
	.cfi_def_cfa_offset 1240
	popq	%rdx
	.cfi_def_cfa_offset 1232
	jmp	.L12
.L28:
	movq	32(%rsp), %rdi
	movl	$256, %r15d
	orl	$-1, %r13d
	call	fclose@PLT
	movq	24(%r14), %rdi
	call	atoi@PLT
	movl	516(%rsp), %esi
	movl	$4, %ecx
	movl	%eax, %ebx
.L16:
	movl	%ebx, %eax
	cltd
	idivl	%r15d
	testl	%edx, %edx
	jne	.L14
	movl	%eax, %r13d
	cmpl	%eax, %esi
	jle	.L15
.L14:
	sarl	%r15d
	decl	%ecx
	jne	.L16
.L15:
	cmpl	$-1, %r13d
	jne	.L17
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	jmp	.L8
.L17:
	movslq	52(%rsp), %rsi
	leaq	56(%rsp), %rdi
	xorl	%r12d, %r12d
	salq	$2, %rsi
	call	cudaMalloc@PLT
	movl	52(%rsp), %esi
	leaq	64(%rsp), %rdi
	imull	%ebx, %esi
	movslq	%esi, %rsi
	salq	$3, %rsi
	call	cudaMalloc@PLT
	movl	52(%rsp), %esi
	leaq	72(%rsp), %rdi
	imull	%ebx, %esi
	movslq	%esi, %rsi
	salq	$3, %rsi
	call	cudaMalloc@PLT
	movl	52(%rsp), %esi
	leaq	80(%rsp), %rdi
	imull	%ebx, %esi
	movslq	%esi, %rsi
	salq	$3, %rsi
	call	cudaMalloc@PLT
	movl	52(%rsp), %esi
	leaq	88(%rsp), %rdi
	imull	%ebx, %esi
	movslq	%esi, %rsi
	salq	$3, %rsi
	call	cudaMalloc@PLT
	movslq	52(%rsp), %rsi
	leaq	96(%rsp), %rdi
	salq	$2, %rsi
	call	cudaMalloc@PLT
	call	clock@PLT
	movslq	52(%rsp), %rdx
	movq	24(%rsp), %rsi
	movl	$1, %ecx
	movq	56(%rsp), %rdi
	movq	%rax, 32(%rsp)
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	movslq	52(%rsp), %rdx
	movq	40(%rsp), %rsi
	movl	$1, %ecx
	movq	96(%rsp), %rdi
	salq	$2, %rdx
	call	cudaMemcpy@PLT
.L19:
	cmpl	%ebx, %r12d
	jge	.L29
	movslq	52(%rsp), %rdx
	movq	64(%rsp), %rcx
	movq	%rbp, %rsi
	movq	%rdx, %rax
	salq	$3, %rdx
	imull	%r12d, %eax
	cltq
	leaq	(%rcx,%rax,8), %rdi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movslq	52(%rsp), %rdx
	movq	72(%rsp), %rcx
	movq	(%rsp), %rsi
	movq	%rdx, %rax
	salq	$3, %rdx
	imull	%r12d, %eax
	cltq
	leaq	(%rcx,%rax,8), %rdi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movslq	52(%rsp), %rdx
	movq	80(%rsp), %rcx
	movq	8(%rsp), %rsi
	movq	%rdx, %rax
	salq	$3, %rdx
	imull	%r12d, %eax
	cltq
	leaq	(%rcx,%rax,8), %rdi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movslq	52(%rsp), %rdx
	movq	88(%rsp), %rcx
	movq	16(%rsp), %rsi
	movq	%rdx, %rax
	salq	$3, %rdx
	imull	%r12d, %eax
	incl	%r12d
	cltq
	leaq	(%rcx,%rax,8), %rdi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	jmp	.L19
.L29:
	movabsq	$4294967297, %rax
	movl	%r15d, 116(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%rax, 120(%rsp)
	movl	124(%rsp), %ecx
	movq	%rax, 108(%rsp)
	movq	116(%rsp), %rdx
	movl	%r13d, 104(%rsp)
	movl	112(%rsp), %esi
	movq	104(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L21
	movl	52(%rsp), %r9d
	movq	96(%rsp), %r8
	movq	88(%rsp), %rcx
	movq	80(%rsp), %rdx
	movq	72(%rsp), %rsi
	movq	64(%rsp), %rdi
	call	_Z37__device_stub__Z9HinesAlgoPdS_S_S_PiiPdS_S_S_Pii
.L21:
	call	cudaDeviceSynchronize@PLT
	movslq	52(%rsp), %rdx
	movq	%rbp, %rdi
	xorl	%r12d, %r12d
	movq	64(%rsp), %rsi
	movl	$2, %ecx
	salq	$3, %rdx
	call	cudaMemcpy@PLT
	movslq	52(%rsp), %rdx
	movq	72(%rsp), %rsi
	movl	$2, %ecx
	movq	(%rsp), %rdi
	salq	$3, %rdx
	call	cudaMemcpy@PLT
	movslq	52(%rsp), %rdx
	movq	80(%rsp), %rsi
	movl	$2, %ecx
	movq	8(%rsp), %rdi
	salq	$3, %rdx
	call	cudaMemcpy@PLT
	movslq	52(%rsp), %rdx
	movq	88(%rsp), %rsi
	movl	$2, %ecx
	movq	16(%rsp), %rdi
	salq	$3, %rdx
	call	cudaMemcpy@PLT
	call	clock@PLT
	movq	32(%rsp), %rcx
	movl	%ebx, %edx
	leaq	.LC5(%rip), %rsi
	movl	$2, %edi
	leaq	.LC7(%rip), %rbx
	subq	%rcx, %rax
	cvtsi2sdq	%rax, %xmm0
	movb	$1, %al
	divsd	.LC4(%rip), %xmm0
	call	__printf_chk@PLT
	movq	16(%r14), %rdi
	leaq	.LC6(%rip), %rsi
	call	fopen@PLT
	movq	%rax, %r13
.L22:
	cmpl	%r12d, 52(%rsp)
	jle	.L30
	movq	24(%rsp), %rax
	movq	%rbx, %rdx
	movl	$2, %esi
	movq	%r13, %rdi
	movsd	0(%rbp,%r12,8), %xmm0
	movl	(%rax,%r12,4), %ecx
	movq	8(%rsp), %rax
	movsd	(%rax,%r12,8), %xmm3
	movq	16(%rsp), %rax
	movsd	(%rax,%r12,8), %xmm2
	movq	(%rsp), %rax
	movsd	(%rax,%r12,8), %xmm1
	movb	$4, %al
	incq	%r12
	call	__fprintf_chk@PLT
	jmp	.L22
.L30:
	movq	%r13, %rdi
	xorl	%r13d, %r13d
	call	fclose@PLT
	movq	24(%rsp), %rdi
	call	_ZdaPv@PLT
	movq	%rbp, %rdi
	call	_ZdaPv@PLT
	movq	(%rsp), %rdi
	call	_ZdaPv@PLT
	movq	8(%rsp), %rdi
	call	_ZdaPv@PLT
	movq	16(%rsp), %rdi
	call	_ZdaPv@PLT
	movq	40(%rsp), %rdi
	call	_ZdaPv@PLT
.L8:
	movq	1160(%rsp), %rax
	subq	%fs:40, %rax
	je	.L24
.L27:
	call	__stack_chk_fail@PLT
.L24:
	addq	$1176, %rsp
	.cfi_def_cfa_offset 56
	movl	%r13d, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	main, .-main
	.section	.rodata.str1.1
.LC8:
	.string	"_Z9HinesAlgoPdS_S_S_Pii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2055:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC8(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z9HinesAlgoPdS_S_S_Pii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2055:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC4:
	.long	0
	.long	1093567616
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

// Yuxuan, 27 June
// Parallel (CUDA) version of Hines algorthm.


#include <cstdio>
#include <cstdlib>
#include <ctime>
#include <cstring>
#include <hip/hip_runtime.h>

__global__ void HinesAlgo (
    double *u, double *l, double *d,
    double *rhs, int *p, int N
) {
    int i;
    double factor;
    int offset = blockIdx.x * N;

    for (i=N-1;i>=1;--i) {
        factor = u[i+offset] / d[i+offset];
        d[p[i]+offset] -= factor * l[i+offset];
        rhs[p[i]+offset] -= factor * rhs[i+offset];
    }

    rhs[0+offset] /= d[0+offset];

    for (i=1;i<=N-1;++i) {
        rhs[i+offset] -= l[i+offset] * rhs[p[i]+offset];
        rhs[i+offset] /= d[i+offset];
    }
}

// the main function receives 3 parameters: input path, output path and the number of repeated runs
// the number of repeated runs is required to be a multiple of 32
int main (int argc, char * argv[]) {
    FILE *fp;
    clock_t time;
    int runNum;
    hipDeviceProp_t devProp;
    int blockNum, blockSize;

    // Host data
    int *id; double *u; double *l;
    double *d; double *rhs; int *p;

    // Device data
    int *id1; double *u1; double *l1;
    double *d1; double *rhs1; int *p1;

    int N;

    // read data
    fp = fopen(argv[1], "r");

    fscanf(fp, "%d", &N);

    id = new int [N]; u = new double [N]; l = new double [N];
    d = new double [N]; rhs = new double [N]; p = new int [N];

    for (int i=0;i<N;++i) {
        fscanf(
            fp, "%d %lf %lf %lf %lf %d",
            &id[i], &u[i], &l[i], &rhs[i], &d[i], &p[i]);
    }

    fclose(fp);

    runNum = atoi(argv[3]);

    // choose grid dim and block dim by number of SMs and number of runs
    blockNum = -1;

    for (blockSize=256;blockSize>=32;blockSize>>=1) {
        if (runNum%blockSize==0) {
            blockNum = runNum / blockSize;
            if (blockNum>=devProp.multiProcessorCount) {
                break;
            }
        }
    }

    if (blockNum==-1) {
        printf("Number of runs is not a multiple of 32.");
        return -1;
    }

    // allocate space for device data
    hipMalloc(reinterpret_cast<void **>(&id1), N*sizeof(int));
    hipMalloc(reinterpret_cast<void **>(&u1), runNum*N*sizeof(double));
    hipMalloc(reinterpret_cast<void **>(&l1), runNum*N*sizeof(double));
    hipMalloc(reinterpret_cast<void **>(&d1), runNum*N*sizeof(double));
    hipMalloc(reinterpret_cast<void **>(&rhs1), runNum*N*sizeof(double));
    hipMalloc(reinterpret_cast<void **>(&p1), N*sizeof(int));

    time = clock(); // include time for device memory copy so that comparison to serial code is fair

    // copy host data to device data
    hipMemcpy(id1, id, N*sizeof(int), hipMemcpyHostToDevice);
    hipMemcpy(p1, p, N*sizeof(int), hipMemcpyHostToDevice);

    for (int i=0;i<runNum;++i) {   
        hipMemcpy(u1+i*N, u, N*sizeof(double), hipMemcpyHostToDevice);
        hipMemcpy(l1+i*N, l, N*sizeof(double), hipMemcpyHostToDevice);
        hipMemcpy(d1+i*N, d, N*sizeof(double), hipMemcpyHostToDevice);
        hipMemcpy(rhs1+i*N, rhs, N*sizeof(double), hipMemcpyHostToDevice);
    }

    HinesAlgo <<<blockNum, blockSize>>> (u1, l1, d1, rhs1, p1, N);

    hipDeviceSynchronize();

    // copy result back to host data
    hipMemcpy(u, u1, N*sizeof(double), hipMemcpyDeviceToHost);
    hipMemcpy(l, l1, N*sizeof(double), hipMemcpyDeviceToHost);
    hipMemcpy(d, d1, N*sizeof(double), hipMemcpyDeviceToHost);
    hipMemcpy(rhs, rhs1, N*sizeof(double), hipMemcpyDeviceToHost);

    time = clock() - time;

    printf("Parallel time cost of %d runs: %.2f seconds.\n", runNum, static_cast<double>(time)/CLOCKS_PER_SEC);

    // write result
    fp = fopen(argv[2], "w+");

    for (int i=0;i<N;++i) {
        fprintf(
            fp, "%d %lf %lf %lf %lf\n",
            id[i], u[i], l[i], rhs[i], d[i]);
    }

    fclose(fp);

    delete[] id; delete[] u; delete[] l;
    delete[] d; delete[] rhs; delete[] p;
}
	.text
	.file	"parallel.hip"
	.globl	_Z24__device_stub__HinesAlgoPdS_S_S_Pii # -- Begin function _Z24__device_stub__HinesAlgoPdS_S_S_Pii
	.type	_Z24__device_stub__HinesAlgoPdS_S_S_Pii,@function
_Z24__device_stub__HinesAlgoPdS_S_S_Pii: # @_Z24__device_stub__HinesAlgoPdS_S_S_Pii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	4(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9HinesAlgoPdS_S_S_Pii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z24__device_stub__HinesAlgoPdS_S_S_Pii, .Lfunc_end0-_Z24__device_stub__HinesAlgoPdS_S_S_Pii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI1_0:
	.quad	0x412e848000000000              # double 1.0E+6
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$136, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, 112(%rsp)                 # 8-byte Spill
	movq	8(%rsi), %rdi
	movl	$.L.str, %esi
	callq	fopen
	leaq	12(%rsp), %rbx
	movl	$.L.str.1, %esi
	movq	%rax, 24(%rsp)                  # 8-byte Spill
	movq	%rax, %rdi
	movq	%rbx, %rdx
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	movslq	(%rbx), %r15
	leaq	(,%r15,4), %rbx
	testq	%r15, %r15
	movq	$-1, %rax
	cmovsq	%rax, %rbx
	leaq	(,%r15,8), %r14
	cmovsq	%rax, %r14
	movq	%rbx, %rdi
	callq	_Znam
	movq	%rax, 64(%rsp)                  # 8-byte Spill
	movq	%r14, %rdi
	callq	_Znam
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movq	%r14, %rdi
	callq	_Znam
	movq	%rax, 72(%rsp)                  # 8-byte Spill
	movq	%r14, %rdi
	callq	_Znam
	movq	%rax, 56(%rsp)                  # 8-byte Spill
	movq	%r14, %rdi
	callq	_Znam
	movq	%rax, 48(%rsp)                  # 8-byte Spill
	movq	%rbx, %rdi
	callq	_Znam
	movq	%rax, 40(%rsp)                  # 8-byte Spill
	testq	%r15, %r15
	jle	.LBB1_3
# %bb.1:                                # %.lr.ph.preheader
	movq	64(%rsp), %rcx                  # 8-byte Reload
	movq	16(%rsp), %r14                  # 8-byte Reload
	movq	72(%rsp), %r15                  # 8-byte Reload
	movq	48(%rsp), %r13                  # 8-byte Reload
	movq	56(%rsp), %r12                  # 8-byte Reload
	movq	40(%rsp), %rbp                  # 8-byte Reload
	xorl	%ebx, %ebx
.LBB1_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movq	%rcx, 32(%rsp)                  # 8-byte Spill
	movl	$.L.str.2, %esi
	movq	24(%rsp), %rdi                  # 8-byte Reload
	movq	32(%rsp), %rdx                  # 8-byte Reload
	movq	%r14, %rcx
	movq	%r15, %r8
	movq	%r13, %r9
	xorl	%eax, %eax
	pushq	%rbp
	.cfi_adjust_cfa_offset 8
	pushq	%r12
	.cfi_adjust_cfa_offset 8
	callq	__isoc23_fscanf
	movq	48(%rsp), %rcx                  # 8-byte Reload
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
	incq	%rbx
	movslq	12(%rsp), %rax
	addq	$4, %rbp
	addq	$8, %r12
	addq	$8, %r13
	addq	$8, %r15
	addq	$8, %r14
	addq	$4, %rcx
	cmpq	%rax, %rbx
	jl	.LBB1_2
.LBB1_3:                                # %._crit_edge
	movq	24(%rsp), %rdi                  # 8-byte Reload
	callq	fclose
	movq	112(%rsp), %rax                 # 8-byte Reload
	movq	24(%rax), %rdi
	callq	atoi
	movl	%eax, %ebp
	movl	$256, %r14d                     # imm = 0x100
	movq	16(%rsp), %r12                  # 8-byte Reload
.LBB1_4:                                # =>This Inner Loop Header: Depth=1
	leal	-1(%r14), %eax
	testl	%ebp, %eax
	je	.LBB1_6
# %bb.5:                                #   in Loop: Header=BB1_4 Depth=1
	movl	%r14d, %eax
	shrl	%eax
	cmpl	$63, %r14d
	movl	%eax, %r14d
	ja	.LBB1_4
	jmp	.LBB1_7
.LBB1_6:
	movl	%ebp, %eax
	cltd
	idivl	%r14d
	cmpl	$-1, %eax
	je	.LBB1_7
# %bb.8:
	movl	%eax, 24(%rsp)                  # 4-byte Spill
	movslq	12(%rsp), %rsi
	shlq	$2, %rsi
	leaq	128(%rsp), %r15
	movq	%r15, %rdi
	callq	hipMalloc
	movslq	12(%rsp), %rsi
	movslq	%ebp, %rbx
	imulq	%rbx, %rsi
	shlq	$3, %rsi
	leaq	104(%rsp), %rdi
	callq	hipMalloc
	movslq	12(%rsp), %rsi
	imulq	%rbx, %rsi
	shlq	$3, %rsi
	leaq	96(%rsp), %rdi
	callq	hipMalloc
	movslq	12(%rsp), %rsi
	imulq	%rbx, %rsi
	shlq	$3, %rsi
	leaq	88(%rsp), %rdi
	callq	hipMalloc
	movslq	12(%rsp), %rsi
	imulq	%rbx, %rsi
	shlq	$3, %rsi
	leaq	80(%rsp), %rdi
	callq	hipMalloc
	movslq	12(%rsp), %rsi
	shlq	$2, %rsi
	leaq	120(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipMalloc
	callq	clock
	movq	%rax, 32(%rsp)                  # 8-byte Spill
	movq	(%r15), %rdi
	movslq	12(%rsp), %rdx
	shlq	$2, %rdx
	movq	64(%rsp), %rsi                  # 8-byte Reload
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%rbx), %rdi
	movslq	12(%rsp), %rdx
	shlq	$2, %rdx
	movq	40(%rsp), %rsi                  # 8-byte Reload
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%ebp, %ebp
	movq	56(%rsp), %r15                  # 8-byte Reload
	movq	48(%rsp), %r13                  # 8-byte Reload
	jle	.LBB1_11
# %bb.9:                                # %.lr.ph93.preheader
	xorl	%ebx, %ebx
.LBB1_10:                               # %.lr.ph93
                                        # =>This Inner Loop Header: Depth=1
	movslq	12(%rsp), %rdx
	movslq	%ebx, %rbx
	movq	%rdx, %rdi
	imulq	%rbx, %rdi
	shlq	$3, %rdi
	addq	104(%rsp), %rdi
	shlq	$3, %rdx
	movq	%r12, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movslq	12(%rsp), %rdx
	movq	%rdx, %rdi
	imulq	%rbx, %rdi
	shlq	$3, %rdi
	addq	96(%rsp), %rdi
	shlq	$3, %rdx
	movq	72(%rsp), %rsi                  # 8-byte Reload
	movl	$1, %ecx
	callq	hipMemcpy
	movslq	12(%rsp), %rdx
	movq	%rdx, %rdi
	imulq	%rbx, %rdi
	shlq	$3, %rdi
	addq	88(%rsp), %rdi
	shlq	$3, %rdx
	movq	%r15, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movslq	12(%rsp), %rdx
	movq	%rdx, %rdi
	imulq	%rbx, %rdi
	shlq	$3, %rdi
	addq	80(%rsp), %rdi
	shlq	$3, %rdx
	movq	%r13, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	incl	%ebx
	cmpl	%ebx, %ebp
	jne	.LBB1_10
.LBB1_11:                               # %._crit_edge94
	movq	%r12, %rbx
	movq	72(%rsp), %r12                  # 8-byte Reload
	movl	24(%rsp), %edi                  # 4-byte Reload
	btsq	$32, %rdi
	movl	%r14d, %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_13
# %bb.12:
	movq	104(%rsp), %rdi
	movq	96(%rsp), %rsi
	movq	88(%rsp), %rdx
	movq	80(%rsp), %rcx
	movq	120(%rsp), %r8
	movl	12(%rsp), %r9d
	callq	_Z24__device_stub__HinesAlgoPdS_S_S_Pii
.LBB1_13:
	callq	hipDeviceSynchronize
	movq	104(%rsp), %rsi
	movslq	12(%rsp), %rdx
	shlq	$3, %rdx
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	96(%rsp), %rsi
	movslq	12(%rsp), %rdx
	shlq	$3, %rdx
	movq	%r12, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	88(%rsp), %rsi
	movslq	12(%rsp), %rdx
	shlq	$3, %rdx
	movq	56(%rsp), %rbx                  # 8-byte Reload
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	80(%rsp), %rsi
	movslq	12(%rsp), %rdx
	shlq	$3, %rdx
	movq	48(%rsp), %r13                  # 8-byte Reload
	movq	%r13, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	callq	clock
	subq	32(%rsp), %rax                  # 8-byte Folded Reload
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI1_0(%rip), %xmm0
	movl	$.L.str.4, %edi
	movl	%ebp, %esi
	movq	%rbx, %rbp
	movb	$1, %al
	callq	printf
	movq	112(%rsp), %rax                 # 8-byte Reload
	movq	16(%rax), %rdi
	movl	$.L.str.5, %esi
	callq	fopen
	movq	%rax, %rbx
	cmpl	$0, 12(%rsp)
	movq	64(%rsp), %r15                  # 8-byte Reload
	jle	.LBB1_16
# %bb.14:                               # %.lr.ph97.preheader
	xorl	%r14d, %r14d
.LBB1_15:                               # %.lr.ph97
                                        # =>This Inner Loop Header: Depth=1
	movl	(%r15,%r14,4), %edx
	movq	16(%rsp), %rax                  # 8-byte Reload
	movsd	(%rax,%r14,8), %xmm0            # xmm0 = mem[0],zero
	movsd	(%r12,%r14,8), %xmm1            # xmm1 = mem[0],zero
	movsd	(%r13,%r14,8), %xmm2            # xmm2 = mem[0],zero
	movsd	(%rbp,%r14,8), %xmm3            # xmm3 = mem[0],zero
	movl	$.L.str.6, %esi
	movq	%rbx, %rdi
	movb	$4, %al
	callq	fprintf
	incq	%r14
	movslq	12(%rsp), %rax
	cmpq	%rax, %r14
	jl	.LBB1_15
.LBB1_16:                               # %._crit_edge98
	movq	%rbx, %rdi
	callq	fclose
	movq	%r15, %rdi
	callq	_ZdaPv
	movq	16(%rsp), %rdi                  # 8-byte Reload
	callq	_ZdaPv
	movq	%r12, %rdi
	callq	_ZdaPv
	movq	%rbp, %rdi
	callq	_ZdaPv
	movq	%r13, %rdi
	callq	_ZdaPv
	movq	40(%rsp), %rdi                  # 8-byte Reload
	callq	_ZdaPv
	xorl	%eax, %eax
	jmp	.LBB1_17
.LBB1_7:                                # %.thread
	movl	$.L.str.3, %edi
	xorl	%eax, %eax
	callq	printf
	movl	$-1, %eax
.LBB1_17:
	addq	$136, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9HinesAlgoPdS_S_S_Pii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z9HinesAlgoPdS_S_S_Pii,@object # @_Z9HinesAlgoPdS_S_S_Pii
	.section	.rodata,"a",@progbits
	.globl	_Z9HinesAlgoPdS_S_S_Pii
	.p2align	3, 0x0
_Z9HinesAlgoPdS_S_S_Pii:
	.quad	_Z24__device_stub__HinesAlgoPdS_S_S_Pii
	.size	_Z9HinesAlgoPdS_S_S_Pii, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"r"
	.size	.L.str, 2

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"%d"
	.size	.L.str.1, 3

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"%d %lf %lf %lf %lf %d"
	.size	.L.str.2, 22

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"Number of runs is not a multiple of 32."
	.size	.L.str.3, 40

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"Parallel time cost of %d runs: %.2f seconds.\n"
	.size	.L.str.4, 46

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"w+"
	.size	.L.str.5, 3

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"%d %lf %lf %lf %lf\n"
	.size	.L.str.6, 20

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z9HinesAlgoPdS_S_S_Pii"
	.size	.L__unnamed_1, 24

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z24__device_stub__HinesAlgoPdS_S_S_Pii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z9HinesAlgoPdS_S_S_Pii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z9HinesAlgoPdS_S_S_Pii ; -- Begin function _Z9HinesAlgoPdS_S_S_Pii
	.globl	_Z9HinesAlgoPdS_S_S_Pii
	.p2align	8
	.type	_Z9HinesAlgoPdS_S_S_Pii,@function
_Z9HinesAlgoPdS_S_S_Pii:                ; @_Z9HinesAlgoPdS_S_S_Pii
; %bb.0:
	s_clause 0x1
	s_load_b32 s20, s[0:1], 0x28
	s_load_b256 s[4:11], s[0:1], 0x0
	s_mov_b32 s3, -1
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s2, s15, s20
	s_cmp_lt_i32 s20, 2
	s_cbranch_scc0 .LBB0_2
; %bb.1:                                ; %._crit_edge58.critedge
	s_ashr_i32 s3, s2, 31
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b64 s[12:13], s[2:3], 3
	s_mov_b32 s3, 0
	s_add_u32 s14, s8, s12
	s_addc_u32 s15, s9, s13
	s_add_u32 s12, s10, s12
	s_addc_u32 s13, s11, s13
	s_load_b64 s[14:15], s[14:15], 0x0
	s_load_b64 s[16:17], s[12:13], 0x0
	s_waitcnt lgkmcnt(0)
	v_div_scale_f64 v[0:1], null, s[14:15], s[14:15], s[16:17]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[2:3], v[0:1]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[4:5], -v[0:1], v[2:3], 1.0
	v_fma_f64 v[2:3], v[2:3], v[4:5], v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[4:5], -v[0:1], v[2:3], 1.0
	v_fma_f64 v[2:3], v[2:3], v[4:5], v[2:3]
	v_div_scale_f64 v[4:5], vcc_lo, s[16:17], s[14:15], s[16:17]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[6:7], v[4:5], v[2:3]
	v_fma_f64 v[0:1], -v[0:1], v[6:7], v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_fmas_f64 v[0:1], v[0:1], v[2:3], v[6:7]
	v_mov_b32_e32 v2, 0
	v_div_fixup_f64 v[0:1], v[0:1], s[14:15], s[16:17]
	global_store_b64 v2, v[0:1], s[12:13]
.LBB0_2:                                ; %Flow113
	s_and_not1_b32 vcc_lo, exec_lo, s3
	s_cbranch_vccnz .LBB0_7
; %bb.3:                                ; %.lr.ph.preheader
	s_load_b64 s[12:13], s[0:1], 0x20
	s_ashr_i32 s3, s2, 31
	s_ashr_i32 s1, s20, 31
	s_add_u32 s0, s20, s2
	s_addc_u32 s1, s1, s3
	v_mov_b32_e32 v0, 0
	s_lshl_b64 s[0:1], s[0:1], 3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s0, s0, -8
	s_addc_u32 s1, s1, -1
	s_add_u32 s14, s10, s0
	s_addc_u32 s15, s11, s1
	s_add_u32 s16, s6, s0
	s_addc_u32 s17, s7, s1
	s_add_u32 s18, s8, s0
	s_addc_u32 s19, s9, s1
	s_add_u32 s4, s4, s0
	s_addc_u32 s5, s5, s1
	s_add_i32 s0, s20, -1
	s_mov_b32 s1, 0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b64 s[22:23], s[0:1], 2
	s_add_i32 s1, s20, 1
	s_waitcnt lgkmcnt(0)
	s_add_u32 s20, s12, s22
	s_addc_u32 s21, s13, s23
.LBB0_4:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[4:5]
	global_load_b64 v[3:4], v0, s[18:19]
	s_load_b32 s22, s[20:21], 0x0
	global_load_b64 v[5:6], v0, s[16:17]
	s_waitcnt lgkmcnt(0)
	s_add_i32 s22, s22, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_ashr_i32 s23, s22, 31
	s_lshl_b64 s[22:23], s[22:23], 3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s24, s8, s22
	s_addc_u32 s25, s9, s23
	s_add_u32 s22, s10, s22
	global_load_b64 v[7:8], v0, s[24:25]
	s_addc_u32 s23, s11, s23
	s_waitcnt vmcnt(2)
	v_div_scale_f64 v[9:10], null, v[3:4], v[3:4], v[1:2]
	v_div_scale_f64 v[15:16], vcc_lo, v[1:2], v[3:4], v[1:2]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[11:12], v[9:10]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[13:14], -v[9:10], v[11:12], 1.0
	v_fma_f64 v[11:12], v[11:12], v[13:14], v[11:12]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[13:14], -v[9:10], v[11:12], 1.0
	v_fma_f64 v[11:12], v[11:12], v[13:14], v[11:12]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[13:14], v[15:16], v[11:12]
	v_fma_f64 v[9:10], -v[9:10], v[13:14], v[15:16]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f64 v[9:10], v[9:10], v[11:12], v[13:14]
	v_div_fixup_f64 v[1:2], v[9:10], v[3:4], v[1:2]
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[3:4], -v[1:2], v[5:6], v[7:8]
	global_store_b64 v0, v[3:4], s[24:25]
	s_clause 0x1
	global_load_b64 v[3:4], v0, s[14:15]
	global_load_b64 v[5:6], v0, s[22:23]
	s_add_u32 s14, s14, -8
	s_addc_u32 s15, s15, -1
	s_add_u32 s16, s16, -8
	s_addc_u32 s17, s17, -1
	s_add_u32 s18, s18, -8
	s_addc_u32 s19, s19, -1
	s_add_u32 s4, s4, -8
	s_addc_u32 s5, s5, -1
	s_add_i32 s1, s1, -1
	s_add_u32 s20, s20, -4
	s_addc_u32 s21, s21, -1
	s_cmp_gt_u32 s1, 2
	s_waitcnt vmcnt(0)
	v_fma_f64 v[1:2], -v[1:2], v[3:4], v[5:6]
	global_store_b64 v0, v[1:2], s[22:23]
	s_cbranch_scc1 .LBB0_4
; %bb.5:                                ; %._crit_edge
	s_lshl_b64 s[14:15], s[2:3], 3
	v_mov_b32_e32 v0, 0
	s_add_u32 s16, s8, s14
	s_addc_u32 s17, s9, s15
	s_add_u32 s4, s10, s14
	s_addc_u32 s5, s11, s15
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[16:17]
	global_load_b64 v[3:4], v0, s[4:5]
	s_add_u32 s1, s14, 8
	s_addc_u32 s3, s15, 0
	s_add_u32 s8, s8, s1
	s_addc_u32 s9, s9, s3
	s_add_u32 s10, s10, s1
	s_addc_u32 s11, s11, s3
	s_add_i32 s2, s2, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_ashr_i32 s3, s2, 31
	s_lshl_b64 s[2:3], s[2:3], 3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s2, s6, s2
	s_addc_u32 s3, s7, s3
	s_add_u32 s6, s12, 4
	s_addc_u32 s7, s13, 0
	s_waitcnt vmcnt(0)
	v_div_scale_f64 v[5:6], null, v[1:2], v[1:2], v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[7:8], v[5:6]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[9:10], -v[5:6], v[7:8], 1.0
	v_fma_f64 v[7:8], v[7:8], v[9:10], v[7:8]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[9:10], -v[5:6], v[7:8], 1.0
	v_fma_f64 v[7:8], v[7:8], v[9:10], v[7:8]
	v_div_scale_f64 v[9:10], vcc_lo, v[3:4], v[1:2], v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[11:12], v[9:10], v[7:8]
	v_fma_f64 v[5:6], -v[5:6], v[11:12], v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f64 v[5:6], v[5:6], v[7:8], v[11:12]
	v_div_fixup_f64 v[1:2], v[5:6], v[1:2], v[3:4]
	global_store_b64 v0, v[1:2], s[4:5]
.LBB0_6:                                ; %.lr.ph57
                                        ; =>This Inner Loop Header: Depth=1
	s_load_b32 s12, s[6:7], 0x0
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[10:11]
	global_load_b64 v[3:4], v0, s[2:3]
	s_waitcnt lgkmcnt(0)
	s_ashr_i32 s13, s12, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[12:13], s[12:13], 3
	s_add_u32 s12, s4, s12
	s_addc_u32 s13, s5, s13
	global_load_b64 v[5:6], v0, s[12:13]
	s_waitcnt vmcnt(0)
	v_fma_f64 v[1:2], -v[3:4], v[5:6], v[1:2]
	global_store_b64 v0, v[1:2], s[10:11]
	global_load_b64 v[3:4], v0, s[8:9]
	s_add_u32 s8, s8, 8
	s_addc_u32 s9, s9, 0
	s_waitcnt vmcnt(0)
	v_div_scale_f64 v[5:6], null, v[3:4], v[3:4], v[1:2]
	v_div_scale_f64 v[11:12], vcc_lo, v[1:2], v[3:4], v[1:2]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[7:8], v[5:6]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[9:10], -v[5:6], v[7:8], 1.0
	v_fma_f64 v[7:8], v[7:8], v[9:10], v[7:8]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[9:10], -v[5:6], v[7:8], 1.0
	v_fma_f64 v[7:8], v[7:8], v[9:10], v[7:8]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[9:10], v[11:12], v[7:8]
	v_fma_f64 v[5:6], -v[5:6], v[9:10], v[11:12]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f64 v[5:6], v[5:6], v[7:8], v[9:10]
	v_div_fixup_f64 v[1:2], v[5:6], v[3:4], v[1:2]
	global_store_b64 v0, v[1:2], s[10:11]
	s_add_u32 s10, s10, 8
	s_addc_u32 s11, s11, 0
	s_add_i32 s0, s0, -1
	s_add_u32 s2, s2, 8
	s_addc_u32 s3, s3, 0
	s_add_u32 s6, s6, 4
	s_addc_u32 s7, s7, 0
	s_cmp_eq_u32 s0, 0
	s_cbranch_scc0 .LBB0_6
.LBB0_7:                                ; %._crit_edge58
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9HinesAlgoPdS_S_S_Pii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 44
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 17
		.amdhsa_next_free_sgpr 26
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z9HinesAlgoPdS_S_S_Pii, .Lfunc_end0-_Z9HinesAlgoPdS_S_S_Pii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1112
; NumSgprs: 28
; NumVgprs: 17
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 3
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 28
; NumVGPRsForWavesPerEU: 17
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .offset:         40
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 44
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z9HinesAlgoPdS_S_S_Pii
    .private_segment_fixed_size: 0
    .sgpr_count:     28
    .sgpr_spill_count: 0
    .symbol:         _Z9HinesAlgoPdS_S_S_Pii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     17
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
