#include <stdio.h>
#include <string.h>
#include <stdlib.h>
#include <math.h>
#include <stdbool.h>
#include <time.h>

#define K 3 // K is from K-SAT, currently we are working on 3-SAT
#define THREAD_PER_BLOCK_log2 10

// current Var Limit is 32;


void preProcessing(){

    // removes comment      
    while(getchar() == 'c'){
        while(getchar()!='\n');
    }
     
    getchar();
    char format[100];
    scanf("%s", format);
    if(strcmp(format, "cnf") != 0){    // format assertion
        printf("Format Error, expected cnf but %s was provided\n", format);
        exit(1);
    }    
    printf("Preprocessing Successfull\n");

}

int cpuSolve(int varCount, int clauseCount, int* clauseStore){
    int limit = pow(2, varCount);
    int satCount = 0;    

    for(int perIndex=0; perIndex<limit; perIndex++){
        bool result = true;
        
        for(int i=0; i<clauseCount; i++){
            bool clauseResult = false;
            for(int j=0; j<K; j++){
                int var = clauseStore[K*i + j];
                int absVar = abs(var);
                bool varValue;
                if(var < 0)
                    varValue = !((perIndex >> (absVar-1))&1);
                else 
                    varValue = (perIndex >> (absVar-1))&1;
                clauseResult = clauseResult || varValue;
            }
            result = result  && clauseResult;
        }
        if(result)
            satCount++;

//        if(perIndex%10000 == 0)
//            printf("completed  = %d\n", perIndex);
    } 
    
    return satCount;
}

__global__ void gpuSolver(int varCount, int clauseCount, int limit, int* clauseStore, int *gpu_sat_count){
    bool result = true;
    int perIndex = (blockIdx.x << THREAD_PER_BLOCK_log2) + threadIdx.x;
    
    if(perIndex >= limit)
        return;

    for(int i=0; i<clauseCount; i++){
    bool clauseResult = false;
        for(int j=0; j<K; j++){
            int var = clauseStore[K*i + j];
            int absVar = abs(var);
            bool varValue;
            if(var < 0)
                varValue = !((perIndex >> (absVar-1))&1);
            else
                varValue = (perIndex >> (absVar-1))&1;
            clauseResult = clauseResult || varValue;
        }
        result = result  && clauseResult;
    }
    if(result)
        atomicAdd(gpu_sat_count, 1);
}

int main(int argc, char* argv[]){
    if(argc<2){
        printf("Invalid Options: One options is required to indetity type of execution\n");
        return 1;
    }

    preProcessing();

    int varCount, clauseCount;
    scanf("%d%d", &varCount, &clauseCount);
   
    printf("\nNo. of Variables = %d | No. of clauses = %d\n", varCount, clauseCount); 

	
    // clauses Input
    int *clauseStore = (int*)malloc(sizeof(int)*clauseCount*K);
    
    for(int i=0; i<clauseCount; i++){

        for(int j=0; j<K; j++){ // one clause with K variables
            scanf("%d", clauseStore + (K * i) + j);
        }

        int tmp;
        scanf("%d\n", &tmp);
    }

    clock_t start, end;

    /* for(int i=0; i<clauseCount; i++){
        for(int j=0; j<K; j++){
            printf("%d ", clauseStore[K*i + j]);
        }
        printf("\n");
    } */

    if(strcmp(argv[1], "cpu")==0){  // cpu implementations
        start = clock();
        int satCount =  cpuSolve(varCount, clauseCount, clauseStore);
        end = clock();
        printf("\n\nSAT Count = %d\n", satCount);
    }
    else if(strcmp(argv[1], "gpu") ==0){        // gpu implementations
        int *gpuClauseStore;
        cudaMalloc(&gpuClauseStore, sizeof(int)*clauseCount*K);
        cudaMemcpy(gpuClauseStore, clauseStore, sizeof(int)*clauseCount*K, cudaMemcpyHostToDevice);    
    
        int *gpu_sat_count;
        cudaMalloc(&gpu_sat_count, sizeof(int));
        cudaMemset(gpu_sat_count, 0, sizeof(int));
        cudaDeviceSynchronize();
        int limit = pow(2, varCount);
        int threadPerBlock = pow(2, THREAD_PER_BLOCK_log2);
        int noOfBlock = ceil((float)limit / threadPerBlock);
        
        start = clock();
        gpuSolver<<<noOfBlock, threadPerBlock>>>(varCount, clauseCount, limit, gpuClauseStore, gpu_sat_count);
        cudaDeviceSynchronize();
        end = clock();

        int *satCount= (int*)malloc(sizeof(int));
        cudaMemcpy(satCount, gpu_sat_count,  sizeof(int), cudaMemcpyDeviceToHost);
        printf("\n\nSAT Count = %d\n", *satCount);
    }
    else{
        printf("Invalid Option");
        return 0;
    }

    double executionTime = (double)(end-start)/CLOCKS_PER_SEC;
    printf("execution Time = %lf\n", executionTime);

    return 0;
}

	.file	"tmpxft_00221ed1_00000000-6_solver.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2033:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2033:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"%s"
.LC1:
	.string	"cnf"
.LC2:
	.string	"Format Error, expected cnf but %s was provided\n"
.LC3:
	.string	"Preprocessing Successfull\n"
	.text
	.globl	_Z13preProcessingv
	.type	_Z13preProcessingv, @function
_Z13preProcessingv:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	subq	$112, %rsp
	.cfi_def_cfa_offset 128
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
.L3:
	call	getchar@PLT
	cmpl	$99, %eax
	jne	.L12
.L4:
	call	getchar@PLT
	cmpl	$10, %eax
	jne	.L4
	jmp	.L3
.L12:
	call	getchar@PLT
	leaq	4(%rsp), %rbx
	leaq	.LC0(%rip), %rdi
	xorl	%eax, %eax
	movq	%rbx, %rsi
	call	__isoc23_scanf@PLT
	leaq	.LC1(%rip), %rsi
	movq	%rbx, %rdi
	call	strcmp@PLT
	testl	%eax, %eax
	je	.L5
	movl	$2, %edi
	movq	%rbx, %rdx
	leaq	.LC2(%rip), %rsi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$1, %edi
	call	exit@PLT
.L5:
	xorl	%eax, %eax
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	call	__printf_chk@PLT
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L6
	call	__stack_chk_fail@PLT
.L6:
	addq	$112, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z13preProcessingv, .-_Z13preProcessingv
	.globl	_Z8cpuSolveiiPi
	.type	_Z8cpuSolveiiPi, @function
_Z8cpuSolveiiPi:
.LFB2028:
	.cfi_startproc
	endbr64
	cvtsi2sdl	%edi, %xmm1
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movl	%esi, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rdx, %rbx
	pushq	%rcx
	.cfi_def_cfa_offset 48
	movsd	.LC4(%rip), %xmm0
	call	pow@PLT
	xorl	%eax, %eax
	xorl	%edi, %edi
	cvttsd2sil	%xmm0, %r12d
.L14:
	cmpl	%r12d, %eax
	je	.L13
	movq	%rbx, %r10
	xorl	%r9d, %r9d
	movb	$1, %r8b
.L20:
	cmpl	%ebp, %r9d
	jge	.L26
	xorl	%edx, %edx
	xorl	%r11d, %r11d
.L17:
	movl	(%r10,%rdx,4), %esi
	movl	%eax, %r13d
	movl	%esi, %ecx
	negl	%ecx
	cmovs	%esi, %ecx
	decl	%ecx
	sarl	%cl, %r13d
	btl	%ecx, %eax
	setc	%cl
	testl	%esi, %esi
	jns	.L16
	notl	%r13d
	movl	%r13d, %ecx
	andl	$1, %ecx
.L16:
	incq	%rdx
	orl	%ecx, %r11d
	cmpq	$3, %rdx
	jne	.L17
	andl	%r11d, %r8d
	incl	%r9d
	addq	$12, %r10
	jmp	.L20
.L26:
	cmpb	$1, %r8b
	sbbl	$-1, %edi
	incl	%eax
	jmp	.L14
.L13:
	popq	%rdx
	.cfi_def_cfa_offset 40
	movl	%edi, %eax
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	_Z8cpuSolveiiPi, .-_Z8cpuSolveiiPi
	.globl	_Z33__device_stub__Z9gpuSolveriiiPiS_iiiPiS_
	.type	_Z33__device_stub__Z9gpuSolveriiiPiS_iiiPiS_, @function
_Z33__device_stub__Z9gpuSolveriiiPiS_iiiPiS_:
.LFB2055:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movl	%edi, 28(%rsp)
	leaq	48(%rsp), %rdi
	movl	%esi, 24(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 20(%rsp)
	leaq	32(%rsp), %rdx
	movq	%rcx, 8(%rsp)
	leaq	40(%rsp), %rcx
	movq	%r8, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	28(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L27
	pushq	40(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z9gpuSolveriiiPiS_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 176
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L27:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L29
	call	__stack_chk_fail@PLT
.L29:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2055:
	.size	_Z33__device_stub__Z9gpuSolveriiiPiS_iiiPiS_, .-_Z33__device_stub__Z9gpuSolveriiiPiS_iiiPiS_
	.globl	_Z9gpuSolveriiiPiS_
	.type	_Z9gpuSolveriiiPiS_, @function
_Z9gpuSolveriiiPiS_:
.LFB2056:
	.cfi_startproc
	endbr64
	jmp	_Z33__device_stub__Z9gpuSolveriiiPiS_iiiPiS_
	.cfi_endproc
.LFE2056:
	.size	_Z9gpuSolveriiiPiS_, .-_Z9gpuSolveriiiPiS_
	.section	.rodata.str1.1
.LC5:
	.string	"Invalid Options: One options is required to indetity type of execution\n"
.LC6:
	.string	"%d%d"
.LC7:
	.string	"\nNo. of Variables = %d | No. of clauses = %d\n"
.LC8:
	.string	"%d"
.LC9:
	.string	"%d\n"
.LC10:
	.string	"cpu"
.LC11:
	.string	"\n\nSAT Count = %d\n"
.LC12:
	.string	"gpu"
.LC14:
	.string	"Invalid Option"
.LC16:
	.string	"execution Time = %lf\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	decl	%edi
	jg	.L33
	leaq	.LC5(%rip), %rsi
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	$1, %eax
	jmp	.L32
.L33:
	movq	%rsi, %rbp
	xorl	%r13d, %r13d
	call	_Z13preProcessingv
	leaq	28(%rsp), %rdx
	leaq	24(%rsp), %rsi
	xorl	%eax, %eax
	leaq	.LC6(%rip), %rdi
	call	__isoc23_scanf@PLT
	movl	28(%rsp), %ecx
	movl	24(%rsp), %edx
	xorl	%eax, %eax
	leaq	.LC7(%rip), %rsi
	movl	$2, %edi
	call	__printf_chk@PLT
	movslq	28(%rsp), %rdi
	imulq	$12, %rdi, %rdi
	call	malloc@PLT
	movq	%rax, %r12
	movq	%rax, %r14
.L35:
	movl	28(%rsp), %ebx
	cmpl	%r13d, %ebx
	jle	.L47
	movq	%r14, %r15
	movl	$3, %ebx
.L36:
	movq	%r15, %rsi
	leaq	.LC8(%rip), %rdi
	xorl	%eax, %eax
	addq	$4, %r15
	call	__isoc23_scanf@PLT
	decl	%ebx
	jne	.L36
	leaq	60(%rsp), %rsi
	xorl	%eax, %eax
	incq	%r13
	addq	$12, %r14
	leaq	.LC9(%rip), %rdi
	call	__isoc23_scanf@PLT
	jmp	.L35
.L47:
	movq	8(%rbp), %rbp
	leaq	.LC10(%rip), %rsi
	movq	%rbp, %rdi
	call	strcmp@PLT
	testl	%eax, %eax
	jne	.L37
	call	clock@PLT
	movl	28(%rsp), %esi
	movl	24(%rsp), %edi
	movq	%r12, %rdx
	movq	%rax, %rbp
	call	_Z8cpuSolveiiPi
	movl	%eax, %r12d
	call	clock@PLT
	movl	%r12d, %edx
	movq	%rax, %rbx
	jmp	.L46
.L37:
	leaq	.LC12(%rip), %rsi
	movq	%rbp, %rdi
	call	strcmp@PLT
	testl	%eax, %eax
	jne	.L39
	movslq	%ebx, %rsi
	leaq	32(%rsp), %rdi
	imulq	$12, %rsi, %rsi
	call	cudaMalloc@PLT
	movslq	28(%rsp), %rdx
	movq	32(%rsp), %rdi
	movq	%r12, %rsi
	movl	$1, %ecx
	imulq	$12, %rdx, %rdx
	call	cudaMemcpy@PLT
	leaq	40(%rsp), %rdi
	movl	$4, %esi
	call	cudaMalloc@PLT
	movq	40(%rsp), %rdi
	xorl	%esi, %esi
	movl	$4, %edx
	call	cudaMemset@PLT
	call	cudaDeviceSynchronize@PLT
	cvtsi2sdl	24(%rsp), %xmm1
	movsd	.LC4(%rip), %xmm0
	call	pow@PLT
	cvttsd2sil	%xmm0, %ebx
	cvtsi2ssl	%ebx, %xmm0
	mulss	.LC13(%rip), %xmm0
	call	ceilf@PLT
	movss	%xmm0, 12(%rsp)
	call	clock@PLT
	movl	$4194305, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movss	12(%rsp), %xmm0
	movq	%rax, %rbp
	salq	$10, %rdx
	movl	$1, %ecx
	movq	%rdx, 60(%rsp)
	cvttss2sil	%xmm0, %eax
	movl	$1, 68(%rsp)
	movl	%eax, 48(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 52(%rsp)
	movq	48(%rsp), %rdi
	movl	56(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L40
	movq	40(%rsp), %r8
	movq	32(%rsp), %rcx
	movl	%ebx, %edx
	movl	28(%rsp), %esi
	movl	24(%rsp), %edi
	call	_Z33__device_stub__Z9gpuSolveriiiPiS_iiiPiS_
.L40:
	call	cudaDeviceSynchronize@PLT
	call	clock@PLT
	movl	$4, %edi
	movq	%rax, %rbx
	call	malloc@PLT
	movq	40(%rsp), %rsi
	movl	$4, %edx
	movl	$2, %ecx
	movq	%rax, %r12
	movq	%rax, %rdi
	call	cudaMemcpy@PLT
	movl	(%r12), %edx
.L46:
	leaq	.LC11(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	subq	%rbp, %rbx
	call	__printf_chk@PLT
	leaq	.LC16(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtsi2sdq	%rbx, %xmm0
	divsd	.LC15(%rip), %xmm0
	call	__printf_chk@PLT
	jmp	.L41
.L39:
	leaq	.LC14(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L41:
	xorl	%eax, %eax
.L32:
	movq	72(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L42
	call	__stack_chk_fail@PLT
.L42:
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2029:
	.size	main, .-main
	.section	.rodata.str1.1
.LC17:
	.string	"_Z9gpuSolveriiiPiS_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2058:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC17(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z9gpuSolveriiiPiS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2058:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC4:
	.long	0
	.long	1073741824
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC13:
	.long	981467136
	.section	.rodata.cst8
	.align 8
.LC15:
	.long	0
	.long	1093567616
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <stdio.h>
#include <string.h>
#include <stdlib.h>
#include <math.h>
#include <stdbool.h>
#include <time.h>

#define K 3 // K is from K-SAT, currently we are working on 3-SAT
#define THREAD_PER_BLOCK_log2 10

// current Var Limit is 32;


void preProcessing(){

    // removes comment      
    while(getchar() == 'c'){
        while(getchar()!='\n');
    }
     
    getchar();
    char format[100];
    scanf("%s", format);
    if(strcmp(format, "cnf") != 0){    // format assertion
        printf("Format Error, expected cnf but %s was provided\n", format);
        exit(1);
    }    
    printf("Preprocessing Successfull\n");

}

int cpuSolve(int varCount, int clauseCount, int* clauseStore){
    int limit = pow(2, varCount);
    int satCount = 0;    

    for(int perIndex=0; perIndex<limit; perIndex++){
        bool result = true;
        
        for(int i=0; i<clauseCount; i++){
            bool clauseResult = false;
            for(int j=0; j<K; j++){
                int var = clauseStore[K*i + j];
                int absVar = abs(var);
                bool varValue;
                if(var < 0)
                    varValue = !((perIndex >> (absVar-1))&1);
                else 
                    varValue = (perIndex >> (absVar-1))&1;
                clauseResult = clauseResult || varValue;
            }
            result = result  && clauseResult;
        }
        if(result)
            satCount++;

//        if(perIndex%10000 == 0)
//            printf("completed  = %d\n", perIndex);
    } 
    
    return satCount;
}

__global__ void gpuSolver(int varCount, int clauseCount, int limit, int* clauseStore, int *gpu_sat_count){
    bool result = true;
    int perIndex = (blockIdx.x << THREAD_PER_BLOCK_log2) + threadIdx.x;
    
    if(perIndex >= limit)
        return;

    for(int i=0; i<clauseCount; i++){
    bool clauseResult = false;
        for(int j=0; j<K; j++){
            int var = clauseStore[K*i + j];
            int absVar = abs(var);
            bool varValue;
            if(var < 0)
                varValue = !((perIndex >> (absVar-1))&1);
            else
                varValue = (perIndex >> (absVar-1))&1;
            clauseResult = clauseResult || varValue;
        }
        result = result  && clauseResult;
    }
    if(result)
        atomicAdd(gpu_sat_count, 1);
}

int main(int argc, char* argv[]){
    if(argc<2){
        printf("Invalid Options: One options is required to indetity type of execution\n");
        return 1;
    }

    preProcessing();

    int varCount, clauseCount;
    scanf("%d%d", &varCount, &clauseCount);
   
    printf("\nNo. of Variables = %d | No. of clauses = %d\n", varCount, clauseCount); 

	
    // clauses Input
    int *clauseStore = (int*)malloc(sizeof(int)*clauseCount*K);
    
    for(int i=0; i<clauseCount; i++){

        for(int j=0; j<K; j++){ // one clause with K variables
            scanf("%d", clauseStore + (K * i) + j);
        }

        int tmp;
        scanf("%d\n", &tmp);
    }

    clock_t start, end;

    /* for(int i=0; i<clauseCount; i++){
        for(int j=0; j<K; j++){
            printf("%d ", clauseStore[K*i + j]);
        }
        printf("\n");
    } */

    if(strcmp(argv[1], "cpu")==0){  // cpu implementations
        start = clock();
        int satCount =  cpuSolve(varCount, clauseCount, clauseStore);
        end = clock();
        printf("\n\nSAT Count = %d\n", satCount);
    }
    else if(strcmp(argv[1], "gpu") ==0){        // gpu implementations
        int *gpuClauseStore;
        hipMalloc(&gpuClauseStore, sizeof(int)*clauseCount*K);
        hipMemcpy(gpuClauseStore, clauseStore, sizeof(int)*clauseCount*K, hipMemcpyHostToDevice);    
    
        int *gpu_sat_count;
        hipMalloc(&gpu_sat_count, sizeof(int));
        hipMemset(gpu_sat_count, 0, sizeof(int));
        hipDeviceSynchronize();
        int limit = pow(2, varCount);
        int threadPerBlock = pow(2, THREAD_PER_BLOCK_log2);
        int noOfBlock = ceil((float)limit / threadPerBlock);
        
        start = clock();
        gpuSolver<<<noOfBlock, threadPerBlock>>>(varCount, clauseCount, limit, gpuClauseStore, gpu_sat_count);
        hipDeviceSynchronize();
        end = clock();

        int *satCount= (int*)malloc(sizeof(int));
        hipMemcpy(satCount, gpu_sat_count,  sizeof(int), hipMemcpyDeviceToHost);
        printf("\n\nSAT Count = %d\n", *satCount);
    }
    else{
        printf("Invalid Option");
        return 0;
    }

    double executionTime = (double)(end-start)/CLOCKS_PER_SEC;
    printf("execution Time = %lf\n", executionTime);

    return 0;
}

	.text
	.file	"solver.hip"
	.globl	_Z13preProcessingv              # -- Begin function _Z13preProcessingv
	.type	_Z13preProcessingv,@function
_Z13preProcessingv:                     # @_Z13preProcessingv
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$112, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -16
.LBB0_1:                                # =>This Loop Header: Depth=1
                                        #     Child Loop BB0_2 Depth 2
	callq	getchar
	cmpl	$99, %eax
	jne	.LBB0_3
.LBB0_2:                                # %.preheader
                                        #   Parent Loop BB0_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	callq	getchar
	cmpl	$10, %eax
	jne	.LBB0_2
	jmp	.LBB0_1
.LBB0_3:                                # %._crit_edge
	callq	getchar
	movq	%rsp, %rbx
	movl	$.L.str, %edi
	movq	%rbx, %rsi
	xorl	%eax, %eax
	callq	__isoc23_scanf
	cmpl	$6712931, (%rbx)                # imm = 0x666E63
	jne	.LBB0_5
# %bb.4:
	movl	$.Lstr, %edi
	callq	puts@PLT
	addq	$112, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.LBB0_5:
	.cfi_def_cfa_offset 128
	movq	%rsp, %rsi
	movl	$.L.str.2, %edi
	xorl	%eax, %eax
	callq	printf
	movl	$1, %edi
	callq	exit
.Lfunc_end0:
	.size	_Z13preProcessingv, .Lfunc_end0-_Z13preProcessingv
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z8cpuSolveiiPi
.LCPI1_0:
	.quad	0x3ff0000000000000              # double 1
	.text
	.globl	_Z8cpuSolveiiPi
	.type	_Z8cpuSolveiiPi,@function
_Z8cpuSolveiiPi:                        # @_Z8cpuSolveiiPi
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdx, %rbx
	movl	%esi, %ebp
	movsd	.LCPI1_0(%rip), %xmm0           # xmm0 = mem[0],zero
	callq	ldexp@PLT
	cvttsd2si	%xmm0, %edx
	testl	%edx, %edx
	jle	.LBB1_1
# %bb.2:                                # %.preheader30.lr.ph
	movl	%ebp, %esi
	xorl	%eax, %eax
	xorl	%edi, %edi
.LBB1_3:                                # %.preheader30
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_7 Depth 2
                                        #       Child Loop BB1_8 Depth 3
	movb	$1, %r8b
	testl	%ebp, %ebp
	jle	.LBB1_4
# %bb.6:                                # %.preheader.preheader
                                        #   in Loop: Header=BB1_3 Depth=1
	movq	%rbx, %r9
	xorl	%r10d, %r10d
.LBB1_7:                                # %.preheader
                                        #   Parent Loop BB1_3 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB1_8 Depth 3
	xorl	%r11d, %r11d
	xorl	%r14d, %r14d
.LBB1_8:                                #   Parent Loop BB1_3 Depth=1
                                        #     Parent Loop BB1_7 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movl	(%r9,%r11,4), %r15d
	movl	%r15d, %ecx
	negl	%ecx
	cmovsl	%r15d, %ecx
	decb	%cl
	movl	$1, %r12d
                                        # kill: def $cl killed $cl killed $ecx
	shll	%cl, %r12d
	xorl	%ecx, %ecx
	xorl	%r13d, %r13d
	testl	%edi, %r12d
	sete	%cl
	setne	%r13b
	testl	%r15d, %r15d
	cmovsl	%ecx, %r13d
	orb	%r13b, %r14b
	incq	%r11
	cmpq	$3, %r11
	jne	.LBB1_8
# %bb.9:                                #   in Loop: Header=BB1_7 Depth=2
	andb	%r14b, %r8b
	incq	%r10
	addq	$12, %r9
	cmpq	%rsi, %r10
	jne	.LBB1_7
.LBB1_4:                                # %._crit_edge
                                        #   in Loop: Header=BB1_3 Depth=1
	movzbl	%r8b, %ecx
	andl	$1, %ecx
	addl	%ecx, %eax
	incl	%edi
	cmpl	%edx, %edi
	jne	.LBB1_3
	jmp	.LBB1_5
.LBB1_1:
	xorl	%eax, %eax
.LBB1_5:                                # %._crit_edge37
                                        # kill: def $eax killed $eax killed $rax
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z8cpuSolveiiPi, .Lfunc_end1-_Z8cpuSolveiiPi
	.cfi_endproc
                                        # -- End function
	.globl	_Z24__device_stub__gpuSolveriiiPiS_ # -- Begin function _Z24__device_stub__gpuSolveriiiPiS_
	.type	_Z24__device_stub__gpuSolveriiiPiS_,@function
_Z24__device_stub__gpuSolveriiiPiS_:    # @_Z24__device_stub__gpuSolveriiiPiS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rax
	movl	%edi, (%rax)
	leaq	8(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	4(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	32(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9gpuSolveriiiPiS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z24__device_stub__gpuSolveriiiPiS_, .Lfunc_end2-_Z24__device_stub__gpuSolveriiiPiS_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI3_0:
	.quad	0x3ff0000000000000              # double 1
.LCPI3_2:
	.quad	0x412e848000000000              # double 1.0E+6
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0
.LCPI3_1:
	.long	0x3a800000                      # float 9.765625E-4
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	cmpl	$1, %edi
	jg	.LBB3_2
# %bb.1:
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	movl	$1, %eax
	jmp	.LBB3_16
.LBB3_2:
	movq	%rsi, %r14
	callq	_Z13preProcessingv
	leaq	12(%rsp), %rbx
	leaq	8(%rsp), %r15
	movl	$.L.str.5, %edi
	movq	%rbx, %rsi
	movq	%r15, %rdx
	xorl	%eax, %eax
	callq	__isoc23_scanf
	movl	(%rbx), %esi
	movl	(%r15), %edx
	movl	$.L.str.6, %edi
	xorl	%eax, %eax
	callq	printf
	movslq	(%r15), %r12
	leaq	(,%r12,4), %rax
	leaq	(%rax,%rax,2), %rdi
	callq	malloc
	movq	%rax, %rbx
	testq	%r12, %r12
	jle	.LBB3_7
# %bb.3:                                # %.preheader.preheader
	leaq	24(%rsp), %r15
	movq	%rbx, %r13
	xorl	%ebp, %ebp
.LBB3_4:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_5 Depth 2
	xorl	%r12d, %r12d
.LBB3_5:                                #   Parent Loop BB3_4 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	leaq	(%r12,%r13), %rsi
	movl	$.L.str.7, %edi
	xorl	%eax, %eax
	callq	__isoc23_scanf
	addq	$4, %r12
	cmpq	$12, %r12
	jne	.LBB3_5
# %bb.6:                                #   in Loop: Header=BB3_4 Depth=1
	movl	$.L.str.8, %edi
	movq	%r15, %rsi
	xorl	%eax, %eax
	callq	__isoc23_scanf
	incq	%rbp
	movslq	8(%rsp), %r12
	addq	$12, %r13
	cmpq	%r12, %rbp
	jl	.LBB3_4
.LBB3_7:                                # %._crit_edge
	movq	8(%r14), %r14
	movl	$.L.str.9, %esi
	movq	%r14, %rdi
	callq	strcmp
	testl	%eax, %eax
	je	.LBB3_8
# %bb.10:
	movl	$.L.str.11, %esi
	movq	%r14, %rdi
	callq	strcmp
	testl	%eax, %eax
	je	.LBB3_11
# %bb.14:
	movl	$.L.str.12, %edi
	xorl	%eax, %eax
	callq	printf
	jmp	.LBB3_15
.LBB3_8:
	callq	clock
	movq	%rax, %r14
	movl	12(%rsp), %edi
	movl	8(%rsp), %esi
	movq	%rbx, %rdx
	callq	_Z8cpuSolveiiPi
	movl	%eax, %ebp
	callq	clock
	movq	%rax, %rbx
	movl	$.L.str.10, %edi
	movl	%ebp, %esi
	jmp	.LBB3_9
.LBB3_11:
	movslq	%r12d, %rax
	shlq	$2, %rax
	leaq	(%rax,%rax,2), %rsi
	leaq	24(%rsp), %r14
	movq	%r14, %rdi
	callq	hipMalloc
	movq	(%r14), %rdi
	movslq	8(%rsp), %rax
	shlq	$2, %rax
	leaq	(%rax,%rax,2), %rdx
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	16(%rsp), %rbx
	movl	$4, %esi
	movq	%rbx, %rdi
	callq	hipMalloc
	movq	(%rbx), %rdi
	movl	$4, %edx
	xorl	%esi, %esi
	callq	hipMemset
	callq	hipDeviceSynchronize
	movl	12(%rsp), %edi
	movsd	.LCPI3_0(%rip), %xmm0           # xmm0 = mem[0],zero
	callq	ldexp@PLT
	movapd	%xmm0, 32(%rsp)                 # 16-byte Spill
	cvttpd2dq	%xmm0, %xmm0
	cvtdq2ps	%xmm0, %xmm0
	mulss	.LCPI3_1(%rip), %xmm0
	callq	ceilf@PLT
	cvttss2si	%xmm0, %ebx
	callq	clock
	movq	%rax, %r14
	btsq	$32, %rbx
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$1024, %rdx                     # imm = 0x400
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_13
# %bb.12:
	cvttsd2si	32(%rsp), %edx          # 16-byte Folded Reload
	movl	12(%rsp), %edi
	movl	8(%rsp), %esi
	movq	24(%rsp), %rcx
	movq	16(%rsp), %r8
	callq	_Z24__device_stub__gpuSolveriiiPiS_
.LBB3_13:
	callq	hipDeviceSynchronize
	callq	clock
	movq	%rax, %rbx
	movl	$4, %edi
	callq	malloc
	movq	%rax, %r15
	movq	16(%rsp), %rsi
	movl	$4, %edx
	movq	%rax, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movl	(%r15), %esi
	movl	$.L.str.10, %edi
.LBB3_9:
	xorl	%eax, %eax
	callq	printf
	subq	%r14, %rbx
	xorps	%xmm0, %xmm0
	cvtsi2sd	%rbx, %xmm0
	divsd	.LCPI3_2(%rip), %xmm0
	movl	$.L.str.13, %edi
	movb	$1, %al
	callq	printf
.LBB3_15:
	xorl	%eax, %eax
.LBB3_16:
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	main, .Lfunc_end3-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB4_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB4_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9gpuSolveriiiPiS_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end4:
	.size	__hip_module_ctor, .Lfunc_end4-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB5_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB5_2:
	retq
.Lfunc_end5:
	.size	__hip_module_dtor, .Lfunc_end5-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"%s"
	.size	.L.str, 3

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Format Error, expected cnf but %s was provided\n"
	.size	.L.str.2, 48

	.type	_Z9gpuSolveriiiPiS_,@object     # @_Z9gpuSolveriiiPiS_
	.section	.rodata,"a",@progbits
	.globl	_Z9gpuSolveriiiPiS_
	.p2align	3, 0x0
_Z9gpuSolveriiiPiS_:
	.quad	_Z24__device_stub__gpuSolveriiiPiS_
	.size	_Z9gpuSolveriiiPiS_, 8

	.type	.L.str.5,@object                # @.str.5
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.5:
	.asciz	"%d%d"
	.size	.L.str.5, 5

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"\nNo. of Variables = %d | No. of clauses = %d\n"
	.size	.L.str.6, 46

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"%d"
	.size	.L.str.7, 3

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"%d\n"
	.size	.L.str.8, 4

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"cpu"
	.size	.L.str.9, 4

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"\n\nSAT Count = %d\n"
	.size	.L.str.10, 18

	.type	.L.str.11,@object               # @.str.11
.L.str.11:
	.asciz	"gpu"
	.size	.L.str.11, 4

	.type	.L.str.12,@object               # @.str.12
.L.str.12:
	.asciz	"Invalid Option"
	.size	.L.str.12, 15

	.type	.L.str.13,@object               # @.str.13
.L.str.13:
	.asciz	"execution Time = %lf\n"
	.size	.L.str.13, 22

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z9gpuSolveriiiPiS_"
	.size	.L__unnamed_1, 20

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"Preprocessing Successfull"
	.size	.Lstr, 26

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"Invalid Options: One options is required to indetity type of execution"
	.size	.Lstr.1, 71

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z24__device_stub__gpuSolveriiiPiS_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z9gpuSolveriiiPiS_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z9gpuSolveriiiPiS_     ; -- Begin function _Z9gpuSolveriiiPiS_
	.globl	_Z9gpuSolveriiiPiS_
	.p2align	8
	.type	_Z9gpuSolveriiiPiS_,@function
_Z9gpuSolveriiiPiS_:                    ; @_Z9gpuSolveriiiPiS_
; %bb.0:
	s_load_b64 s[2:3], s[0:1], 0x4
	v_lshl_or_b32 v0, s15, 10, v0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_i32_e32 vcc_lo, s3, v0
	s_and_saveexec_b32 s3, vcc_lo
	s_cbranch_execz .LBB0_10
; %bb.1:                                ; %.preheader29
	s_load_b128 s[4:7], s[0:1], 0x10
	s_cmp_lt_i32 s2, 1
	s_cbranch_scc1 .LBB0_6
; %bb.2:                                ; %.preheader.preheader
	s_mov_b32 s3, 0
	s_mov_b32 s1, -1
.LBB0_3:                                ; %.preheader
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_4 Depth 2
	s_mov_b64 s[8:9], 0
	s_mov_b32 s10, 0
                                        ; implicit-def: $sgpr11
.LBB0_4:                                ;   Parent Loop BB0_3 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_waitcnt lgkmcnt(0)
	s_add_u32 s12, s4, s8
	s_addc_u32 s13, s5, s9
	s_load_b32 s0, s[12:13], 0x0
	s_waitcnt lgkmcnt(0)
	s_abs_i32 s12, s0
	s_cmp_lt_i32 s0, 0
	s_cselect_b32 vcc_lo, -1, 0
	s_add_i32 s12, s12, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b32 s0, 1, s12
	v_and_b32_e32 v1, s0, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, 0, v1
	v_cndmask_b32_e64 v2, 0, 1, s0
	v_cmp_ne_u32_e64 s0, 0, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v1, 0, 1, s0
	v_cndmask_b32_e32 v1, v1, v2, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, 1, v1
	v_cmp_eq_u32_e32 vcc_lo, 1, v1
	s_or_b32 s10, s10, vcc_lo
	s_add_u32 s8, s8, 4
	s_addc_u32 s9, s9, 0
	s_and_not1_b32 s0, s11, exec_lo
	s_and_b32 s11, s10, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s11, s0, s11
	s_cmp_eq_u32 s8, 12
	s_cbranch_scc0 .LBB0_4
; %bb.5:                                ;   in Loop: Header=BB0_3 Depth=1
	s_and_b32 s1, s1, s11
	s_add_i32 s3, s3, 1
	s_add_u32 s4, s4, 12
	s_addc_u32 s5, s5, 0
	s_cmp_eq_u32 s3, s2
	s_cbranch_scc0 .LBB0_3
	s_branch .LBB0_7
.LBB0_6:
	s_mov_b32 s1, -1
.LBB0_7:                                ; %Flow53
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 exec_lo, exec_lo, s1
	s_cbranch_execz .LBB0_10
; %bb.8:                                ; %.critedge
	s_mov_b32 s0, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mbcnt_lo_u32_b32 v0, s0, 0
	v_cmp_eq_u32_e32 vcc_lo, 0, v0
	s_and_b32 s1, exec_lo, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 exec_lo, s1
	s_cbranch_execz .LBB0_10
; %bb.9:
	s_bcnt1_i32_b32 s0, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s0
	s_waitcnt lgkmcnt(0)
	global_atomic_add_u32 v0, v1, s[6:7]
.LBB0_10:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9gpuSolveriiiPiS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 32
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 3
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z9gpuSolveriiiPiS_, .Lfunc_end0-_Z9gpuSolveriiiPiS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 332
; NumSgprs: 18
; NumVgprs: 3
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 3
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .offset:         4
        .size:           4
        .value_kind:     by_value
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 32
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z9gpuSolveriiiPiS_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z9gpuSolveriiiPiS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     3
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
