
/* 
Based off work by Nelson, et al.
Brigham Young University (2010)

Adapted by Kevin Yuh (2015)
*/


#include <stdio.h>
#include <cuda.h>
#include <assert.h>
#include <cuda_runtime.h>
#include <stdio.h>
#include <cufft.h>

#define PI 3.14159265358979


/* Check errors on CUDA runtime functions */
#define gpuErrchk(ans) { gpuAssert((ans), __FILE__, __LINE__); }
inline void gpuAssert(cudaError_t code, const char *file, int line, bool abort=true)
{
    if (code != cudaSuccess) 
    {
        fprintf(stderr,"GPUassert: %s %s %d\n", cudaGetErrorString(code), file, line);
        exit(code);
    }
}



/* Check errors on cuFFT functions */
void gpuFFTchk(int errval){
    if (errval != CUFFT_SUCCESS){
        printf("Failed FFT call, error code %d\n", errval);
    }
}


/* Check errors on CUDA kernel calls */
void checkCUDAKernelError()
{
    cudaError_t err = cudaGetLastError();
    if  (cudaSuccess != err){
        fprintf(stderr, "Error %s\n", cudaGetErrorString(err));
    } else {
        fprintf(stderr, "No kernel error detected\n");
    }

}

/* Basic ramp filter. Scale all frequencies linearly. */
__global__ void cudaFrequencyKernal(cufftComplex *out_data, int length) {
    unsigned int index = blockIdx.x * blockDim.x + threadIdx.x;
    while (index < length) {
        float scaleFactor;
        // We need to account for the fact that the highest amplitude is at
        // length / 2
        if (index < (length / 2)) {
            scaleFactor = ((float) index) / (length / 2); 
        }
        else {
            scaleFactor = ((float) (length - index)) / (length / 2);
        }
        cufftComplex temp = out_data[index];
        temp.x = temp.x * scaleFactor;
        temp.y = temp.y * scaleFactor;
        
        out_data[index] = temp;
        
        index += blockDim.x * gridDim.x;
    }
}

/* Convert an array of complex values to an array of real values. */
__global__ void cudaComplexToRealKernal(cufftComplex *in_data,
                                         float *out_data,
                                         int length) {
    unsigned int index = blockIdx.x * blockDim.x + threadIdx.x;
    while (index < length) {
        cufftComplex in = in_data[index];
        
        out_data[index] = in.x;
        
        index += blockDim.x * gridDim.x;
    }
}

/* Backproject the sinogram to an image. */
__global__ void cudaBackprojectionKernal(float *in_data, float *out_data,
                                          int nAngles, int sin_width,
                                          int image_dim) {
    unsigned int index = blockIdx.x * blockDim.x + threadIdx.x;
    while (index < (image_dim * image_dim)) {
        // Get the pixel (x,y) coordinate from the index value
        int y_image = index / image_dim;
        int x_image = index % image_dim;
        // Get the geometric (x,y) coordinate from the pixel coordinate
        int x_geo = x_image - (image_dim / 2);
        int y_geo = (image_dim / 2) - y_image;
        
        // For all theta in the sinogram...
        for (int i = 0; i < nAngles; i++) {
            float d;
            // Handle the edges cases of theta = 0 and theta = PI/2
            if(i == 0) {
                d = (float) x_geo;
            }
            else if (i == nAngles / 2) {
                d = (float) y_geo;
            }
            else {
                float theta = PI * (((float) i) / ((float) nAngles));
                float m = -1 * cos(theta) / sin(theta);
                float x_i = ((float) (y_geo - m * x_geo)) / ((-1 / m) - m);
                float y_i = (-1 / m) * x_i;
                d = sqrt((x_i * x_i) + (y_i * y_i));
                // Center the index
                if (((-1 / m) > 0 && x_i < 0) || ((-1 / m) < 0 && x_i > 0)) {
                    d *= -1;
                }
            }
            // d is the distance from the center line, so we need to offset d by
            // this much
            d += sin_width / 2.0;
            d = truncf(d);
            // Now that we have d, add the right value to the image array
            out_data[y_image * image_dim + x_image] += in_data[i * sin_width + (int)d];
        }
        
        index += blockDim.x * gridDim.x;
    }
}




int main(int argc, char** argv){

    if (argc != 7){
        fprintf(stderr, "Incorrect number of arguments.\n\n");
        fprintf(stderr, "\nArguments: \n \
        < Sinogram filename > \n \
        < Width or height of original image, whichever is larger > \n \
        < Number of angles in sinogram >\n \
        < threads per block >\n \
        < number of blocks >\n \
        < output filename >\n");
        exit(EXIT_FAILURE);
    }


    /********** Parameters **********/

    int width = atoi(argv[2]);
    int height = width;
    int sinogram_width = (int)ceilf( height * sqrt(2) );

    int nAngles = atoi(argv[3]);


    int threadsPerBlock = atoi(argv[4]);
    int nBlocks = atoi(argv[5]);


    /********** Data storage *********/


    // GPU DATA STORAGE
    cufftComplex *dev_sinogram_cmplx;
    float *dev_sinogram_float; 
    float* output_dev;  // Image storage


    cufftComplex *sinogram_host;

    size_t size_result = width*height*sizeof(float);
    float *output_host = (float *)malloc(size_result);




    /*********** Set up IO, Read in data ************/

    sinogram_host = (cufftComplex *)malloc(  sinogram_width*nAngles*sizeof(cufftComplex) );

    FILE *dataFile = fopen(argv[1],"r");
    if (dataFile == NULL){
        fprintf(stderr, "Sinogram file missing\n");
        exit(EXIT_FAILURE);
    }

    FILE *outputFile = fopen(argv[6], "w");
    if (outputFile == NULL){
        fprintf(stderr, "Output file cannot be written\n");
        exit(EXIT_FAILURE);
    }

    int j, i;

    for(i = 0; i < nAngles * sinogram_width; i++){
        fscanf(dataFile,"%f",&sinogram_host[i].x);
        sinogram_host[i].y = 0;
    }

    fclose(dataFile);


    /*********** Assignment starts here *********/

    /* TODO: Allocate memory for all GPU storage above, copy input sinogram
    over to dev_sinogram_cmplx. */
    int sinogram_size = nAngles * sinogram_width;
    cudaMalloc((void **) &dev_sinogram_cmplx, sizeof(cufftComplex) * sinogram_size);
    cudaMalloc((void **) &dev_sinogram_float, sizeof(float) * sinogram_size);
               
    cudaMemcpy(dev_sinogram_cmplx, sinogram_host, 
               sizeof(cufftComplex) * sinogram_size, 
               cudaMemcpyHostToDevice);


    /* TODO 1: Implement the high-pass filter:
        - Use cuFFT for the forward FFT
        - Create your own kernel for the frequency scaling.
        - Use cuFFT for the inverse FFT
        - extract real components to floats
        - Free the original sinogram (dev_sinogram_cmplx)

        Note: If you want to deal with real-to-complex and complex-to-real
        transforms in cuFFT, you'll have to slightly change our code above.
    */
    cufftHandle plan;
    int batch = 1;
    cufftPlan1d(&plan, sinogram_size, CUFFT_C2C, batch);
    
    // Run the forward DFT
    cufftExecC2C(plan, dev_sinogram_cmplx, dev_sinogram_cmplx, CUFFT_FORWARD);
    
    // Apply basic ramp filter
    cudaFrequencyKernal<<<nBlocks, threadsPerBlock>>>
                        (dev_sinogram_cmplx, sinogram_size);
    
    // Run the inverse DFT
    cufftExecC2C(plan, dev_sinogram_cmplx, dev_sinogram_cmplx, CUFFT_INVERSE);
    
    // Extract the real components to floats
    cudaComplexToRealKernal<<<nBlocks, threadsPerBlock>>>
                        (dev_sinogram_cmplx, dev_sinogram_float, sinogram_size);
                        
    // Free the original sinogram
    cudaFree(dev_sinogram_cmplx);


    /* TODO 2: Implement backprojection.
        - Allocate memory for the output image.
        - Create your own kernel to accelerate backprojection.
        - Copy the reconstructed image back to output_host.
        - Free all remaining memory on the GPU.
    */
    cudaMalloc((void **) &output_dev, sizeof(float) * width * height);
    cudaMemset(output_dev, 0, sizeof(float) * width * height);
    
    // Run the Backprojection kernal
    cudaBackprojectionKernal<<<nBlocks, threadsPerBlock>>>(dev_sinogram_float,
                                                           output_dev, 
                                                           nAngles,
                                                           sinogram_width, 
                                                           width);
                                                           
    // Copy the reconstructed image back to host
    cudaMemcpy(output_host, output_dev, sizeof(float) * width * height, cudaMemcpyDeviceToHost);
    
    // Free the remaining GPU memory
    cudaFree(dev_sinogram_float);
    cudaFree(output_dev);

    
    /* Export image data. */

    for(j = 0; j < width; j++){
        for(i = 0; i < height; i++){
            fprintf(outputFile, "%e ",output_host[j*width + i]);
        }
        fprintf(outputFile, "\n");
    }


    /* Cleanup: Free host memory, close files. */

    free(sinogram_host);
    free(output_host);

    fclose(outputFile);

    return 0;
}




	.file	"tmpxft_002bdeae_00000000-6_xray_ct_recon.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2057:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2057:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"Failed FFT call, error code %d\n"
	.text
	.globl	_Z9gpuFFTchki
	.type	_Z9gpuFFTchki, @function
_Z9gpuFFTchki:
.LFB2051:
	.cfi_startproc
	endbr64
	movl	%edi, %edx
	testl	%edi, %edi
	je	.L2
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	jmp	__printf_chk@PLT
.L2:
	ret
	.cfi_endproc
.LFE2051:
	.size	_Z9gpuFFTchki, .-_Z9gpuFFTchki
	.section	.rodata.str1.1
.LC1:
	.string	"Error %s\n"
.LC2:
	.string	"No kernel error detected\n"
	.text
	.globl	_Z20checkCUDAKernelErrorv
	.type	_Z20checkCUDAKernelErrorv, @function
_Z20checkCUDAKernelErrorv:
.LFB2052:
	.cfi_startproc
	endbr64
	pushq	%r9
	.cfi_def_cfa_offset 16
	call	cudaGetLastError@PLT
	testl	%eax, %eax
	je	.L6
	movl	%eax, %edi
	call	cudaGetErrorString@PLT
	movq	stderr(%rip), %rdi
	movl	$2, %esi
	popq	%r8
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	movq	%rax, %rcx
	leaq	.LC1(%rip), %rdx
	xorl	%eax, %eax
	jmp	__fprintf_chk@PLT
.L6:
	.cfi_restore_state
	movq	stderr(%rip), %rdi
	leaq	.LC2(%rip), %rdx
	movl	$2, %esi
	xorl	%eax, %eax
	popq	%rcx
	.cfi_def_cfa_offset 8
	jmp	__fprintf_chk@PLT
	.cfi_endproc
.LFE2052:
	.size	_Z20checkCUDAKernelErrorv, .-_Z20checkCUDAKernelErrorv
	.globl	_Z46__device_stub__Z19cudaFrequencyKernalP6float2iP6float2i
	.type	_Z46__device_stub__Z19cudaFrequencyKernalP6float2iP6float2i, @function
_Z46__device_stub__Z19cudaFrequencyKernalP6float2iP6float2i:
.LFB2079:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movl	%esi, 4(%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z19cudaFrequencyKernalP6float2i(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L8:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2079:
	.size	_Z46__device_stub__Z19cudaFrequencyKernalP6float2iP6float2i, .-_Z46__device_stub__Z19cudaFrequencyKernalP6float2iP6float2i
	.globl	_Z19cudaFrequencyKernalP6float2i
	.type	_Z19cudaFrequencyKernalP6float2i, @function
_Z19cudaFrequencyKernalP6float2i:
.LFB2080:
	.cfi_startproc
	endbr64
	jmp	_Z46__device_stub__Z19cudaFrequencyKernalP6float2iP6float2i
	.cfi_endproc
.LFE2080:
	.size	_Z19cudaFrequencyKernalP6float2i, .-_Z19cudaFrequencyKernalP6float2i
	.globl	_Z52__device_stub__Z23cudaComplexToRealKernalP6float2PfiP6float2Pfi
	.type	_Z52__device_stub__Z23cudaComplexToRealKernalP6float2PfiP6float2Pfi, @function
_Z52__device_stub__Z23cudaComplexToRealKernalP6float2PfiP6float2Pfi:
.LFB2081:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L13
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z23cudaComplexToRealKernalP6float2Pfi(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L13:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L15
	call	__stack_chk_fail@PLT
.L15:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2081:
	.size	_Z52__device_stub__Z23cudaComplexToRealKernalP6float2PfiP6float2Pfi, .-_Z52__device_stub__Z23cudaComplexToRealKernalP6float2PfiP6float2Pfi
	.globl	_Z23cudaComplexToRealKernalP6float2Pfi
	.type	_Z23cudaComplexToRealKernalP6float2Pfi, @function
_Z23cudaComplexToRealKernalP6float2Pfi:
.LFB2082:
	.cfi_startproc
	endbr64
	jmp	_Z52__device_stub__Z23cudaComplexToRealKernalP6float2PfiP6float2Pfi
	.cfi_endproc
.LFE2082:
	.size	_Z23cudaComplexToRealKernalP6float2Pfi, .-_Z23cudaComplexToRealKernalP6float2Pfi
	.globl	_Z49__device_stub__Z24cudaBackprojectionKernalPfS_iiiPfS_iii
	.type	_Z49__device_stub__Z24cudaBackprojectionKernalPfS_iiiPfS_iii, @function
_Z49__device_stub__Z24cudaBackprojectionKernalPfS_iiiPfS_iii:
.LFB2083:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	40(%rsp), %rcx
	movl	%r8d, 4(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L18
	pushq	40(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z24cudaBackprojectionKernalPfS_iii(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 176
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L18:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L20
	call	__stack_chk_fail@PLT
.L20:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2083:
	.size	_Z49__device_stub__Z24cudaBackprojectionKernalPfS_iiiPfS_iii, .-_Z49__device_stub__Z24cudaBackprojectionKernalPfS_iiiPfS_iii
	.globl	_Z24cudaBackprojectionKernalPfS_iii
	.type	_Z24cudaBackprojectionKernalPfS_iii, @function
_Z24cudaBackprojectionKernalPfS_iii:
.LFB2084:
	.cfi_startproc
	endbr64
	jmp	_Z49__device_stub__Z24cudaBackprojectionKernalPfS_iiiPfS_iii
	.cfi_endproc
.LFE2084:
	.size	_Z24cudaBackprojectionKernalPfS_iii, .-_Z24cudaBackprojectionKernalPfS_iii
	.section	.rodata.str1.1
.LC3:
	.string	"Incorrect number of arguments.\n\n"
.LC4:
	.string	"\nArguments: \n         < Sinogram filename > \n         < Width or height of original image, whichever is larger > \n         < Number of angles in sinogram >\n         < threads per block >\n         < number of blocks >\n         < output filename >\n"
.LC6:
	.string	"r"
.LC7:
	.string	"Sinogram file missing\n"
.LC8:
	.string	"w"
.LC9:
	.string	"Output file cannot be written\n"
.LC10:
	.string	"%f"
.LC12:
	.string	"%e "
.LC13:
	.string	"\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2053:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$136, %rsp
	.cfi_def_cfa_offset 192
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	cmpl	$7, %edi
	je	.L24
	movq	stderr(%rip), %rdi
	leaq	.LC3(%rip), %rdx
	movl	$2, %esi
	call	__fprintf_chk@PLT
	leaq	.LC4(%rip), %rdx
	jmp	.L38
.L24:
	movq	16(%rsi), %rdi
	movq	%rsi, %r13
	call	atoi@PLT
	cvtsi2sdl	%eax, %xmm0
	mulsd	.LC5(%rip), %xmm0
	movl	%eax, %ebx
	cvtsd2ss	%xmm0, %xmm0
	call	ceilf@PLT
	movq	24(%r13), %rdi
	cvttss2sil	%xmm0, %eax
	movl	%eax, 44(%rsp)
	call	atoi@PLT
	movq	32(%r13), %rdi
	movl	%eax, 56(%rsp)
	call	atoi@PLT
	movq	40(%r13), %rdi
	movl	%eax, %r12d
	call	atoi@PLT
	movl	%ebx, %edi
	imull	%ebx, %edi
	movl	%eax, %ebp
	movslq	%edi, %rdi
	salq	$2, %rdi
	call	malloc@PLT
	movl	44(%rsp), %ecx
	movq	%rax, 16(%rsp)
	movl	56(%rsp), %eax
	imull	%ecx, %eax
	movslq	%eax, %r15
	movl	%eax, 40(%rsp)
	leaq	0(,%r15,8), %rax
	movq	%rax, %rdi
	movq	%rax, 32(%rsp)
	call	malloc@PLT
	movq	8(%r13), %rdi
	leaq	.LC6(%rip), %rsi
	movq	%rax, 24(%rsp)
	call	fopen@PLT
	movq	%rax, %r14
	testq	%rax, %rax
	jne	.L25
	leaq	.LC7(%rip), %rdx
.L38:
	movq	stderr(%rip), %rdi
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	movl	$1, %edi
	call	exit@PLT
.L25:
	movq	48(%r13), %rdi
	leaq	.LC8(%rip), %rsi
	call	fopen@PLT
	movq	%rax, 8(%rsp)
	testq	%rax, %rax
	je	.L26
	movq	24(%rsp), %rdx
	xorl	%ecx, %ecx
	jmp	.L27
.L26:
	leaq	.LC9(%rip), %rdx
	jmp	.L38
.L27:
	cmpl	%ecx, 40(%rsp)
	jle	.L39
	leaq	.LC10(%rip), %rsi
	movq	%r14, %rdi
	xorl	%eax, %eax
	movl	%ecx, 60(%rsp)
	movq	%rdx, 48(%rsp)
	call	__isoc23_fscanf@PLT
	movq	48(%rsp), %rdx
	movl	60(%rsp), %ecx
	movl	$0x00000000, 4(%rdx)
	incl	%ecx
	addq	$8, %rdx
	jmp	.L27
.L39:
	movq	%r14, %rdi
	call	fclose@PLT
	movq	32(%rsp), %rsi
	leaq	72(%rsp), %rdi
	call	cudaMalloc@PLT
	leaq	0(,%r15,4), %rsi
	leaq	80(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	32(%rsp), %rdx
	movq	24(%rsp), %rsi
	movl	$1, %ecx
	movq	72(%rsp), %rdi
	call	cudaMemcpy@PLT
	movl	40(%rsp), %esi
	leaq	68(%rsp), %rdi
	movl	$1, %ecx
	movl	$41, %edx
	call	cufftPlan1d@PLT
	movq	72(%rsp), %rsi
	movl	68(%rsp), %edi
	orl	$-1, %ecx
	movq	%rsi, %rdx
	call	cufftExecC2C@PLT
	movl	%r12d, 108(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movabsq	$4294967297, %rax
	movl	%ebp, 96(%rsp)
	movq	%rax, 112(%rsp)
	movl	116(%rsp), %ecx
	movq	%rax, 100(%rsp)
	movq	108(%rsp), %rdx
	movq	96(%rsp), %rdi
	movl	104(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L29
	movl	40(%rsp), %esi
	movq	72(%rsp), %rdi
	call	_Z46__device_stub__Z19cudaFrequencyKernalP6float2iP6float2i
.L29:
	movq	72(%rsp), %rsi
	movl	68(%rsp), %edi
	movl	$1, %ecx
	movq	%rsi, %rdx
	call	cufftExecC2C@PLT
	movl	%r12d, 108(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movabsq	$4294967297, %rax
	movl	%ebp, 96(%rsp)
	movq	%rax, 112(%rsp)
	movl	116(%rsp), %ecx
	movq	%rax, 100(%rsp)
	movq	108(%rsp), %rdx
	movq	96(%rsp), %rdi
	movl	104(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L30
	movl	40(%rsp), %edx
	movq	80(%rsp), %rsi
	movq	72(%rsp), %rdi
	call	_Z52__device_stub__Z23cudaComplexToRealKernalP6float2PfiP6float2Pfi
.L30:
	movslq	%ebx, %r13
	movq	72(%rsp), %rdi
	movq	%r13, %r14
	call	cudaFree@PLT
	imulq	%r13, %r14
	leaq	88(%rsp), %rdi
	salq	$2, %r14
	movq	%r14, %rsi
	call	cudaMalloc@PLT
	movq	88(%rsp), %rdi
	xorl	%esi, %esi
	movq	%r14, %rdx
	call	cudaMemset@PLT
	movl	%r12d, 108(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movabsq	$4294967297, %rax
	movl	%ebp, 96(%rsp)
	movq	%rax, 112(%rsp)
	movl	116(%rsp), %ecx
	movq	%rax, 100(%rsp)
	movq	108(%rsp), %rdx
	movq	96(%rsp), %rdi
	movl	104(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L31
	movl	44(%rsp), %ecx
	movl	56(%rsp), %edx
	movl	%ebx, %r8d
	movq	88(%rsp), %rsi
	movq	80(%rsp), %rdi
	call	_Z49__device_stub__Z24cudaBackprojectionKernalPfS_iiiPfS_iii
.L31:
	movq	88(%rsp), %rsi
	movq	16(%rsp), %rdi
	movq	%r14, %rdx
	xorl	%ebp, %ebp
	movl	$2, %ecx
	salq	$2, %r13
	leaq	.LC12(%rip), %r14
	call	cudaMemcpy@PLT
	movq	80(%rsp), %rdi
	call	cudaFree@PLT
	movq	88(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %r12
.L32:
	cmpl	%ebx, %ebp
	jge	.L40
	xorl	%r15d, %r15d
.L33:
	movq	8(%rsp), %rdi
	cvtss2sd	(%r12,%r15,4), %xmm0
	movq	%r14, %rdx
	movb	$1, %al
	movl	$2, %esi
	incq	%r15
	call	__fprintf_chk@PLT
	cmpl	%r15d, %ebx
	jg	.L33
	movq	8(%rsp), %rdi
	leaq	.LC13(%rip), %rdx
	xorl	%eax, %eax
	incl	%ebp
	movl	$2, %esi
	addq	%r13, %r12
	call	__fprintf_chk@PLT
	jmp	.L32
.L40:
	movq	24(%rsp), %rdi
	call	free@PLT
	movq	16(%rsp), %rdi
	call	free@PLT
	movq	8(%rsp), %rdi
	call	fclose@PLT
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L34
	call	__stack_chk_fail@PLT
.L34:
	addq	$136, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2053:
	.size	main, .-main
	.section	.rodata.str1.1
.LC14:
	.string	"_Z24cudaBackprojectionKernalPfS_iii"
.LC15:
	.string	"_Z23cudaComplexToRealKernalP6float2Pfi"
.LC16:
	.string	"_Z19cudaFrequencyKernalP6float2i"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2086:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC14(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z24cudaBackprojectionKernalPfS_iii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC15(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z23cudaComplexToRealKernalP6float2Pfi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC16(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z19cudaFrequencyKernalP6float2i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2086:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC5:
	.long	1719614413
	.long	1073127582
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


/* 
Based off work by Nelson, et al.
Brigham Young University (2010)

Adapted by Kevin Yuh (2015)
*/


#include <stdio.h>
#include <hip/hip_runtime.h>
#include <assert.h>

#include <stdio.h>
#include <hipfft/hipfft.h>

#define PI 3.14159265358979


/* Check errors on CUDA runtime functions */
#define gpuErrchk(ans) { gpuAssert((ans), __FILE__, __LINE__); }
inline void gpuAssert(hipError_t code, const char *file, int line, bool abort=true)
{
    if (code != hipSuccess) 
    {
        fprintf(stderr,"GPUassert: %s %s %d\n", hipGetErrorString(code), file, line);
        exit(code);
    }
}



/* Check errors on cuFFT functions */
void gpuFFTchk(int errval){
    if (errval != HIPFFT_SUCCESS){
        printf("Failed FFT call, error code %d\n", errval);
    }
}


/* Check errors on CUDA kernel calls */
void checkCUDAKernelError()
{
    hipError_t err = hipGetLastError();
    if  (hipSuccess != err){
        fprintf(stderr, "Error %s\n", hipGetErrorString(err));
    } else {
        fprintf(stderr, "No kernel error detected\n");
    }

}

/* Basic ramp filter. Scale all frequencies linearly. */
__global__ void cudaFrequencyKernal(hipfftComplex *out_data, int length) {
    unsigned int index = blockIdx.x * blockDim.x + threadIdx.x;
    while (index < length) {
        float scaleFactor;
        // We need to account for the fact that the highest amplitude is at
        // length / 2
        if (index < (length / 2)) {
            scaleFactor = ((float) index) / (length / 2); 
        }
        else {
            scaleFactor = ((float) (length - index)) / (length / 2);
        }
        hipfftComplex temp = out_data[index];
        temp.x = temp.x * scaleFactor;
        temp.y = temp.y * scaleFactor;
        
        out_data[index] = temp;
        
        index += blockDim.x * gridDim.x;
    }
}

/* Convert an array of complex values to an array of real values. */
__global__ void cudaComplexToRealKernal(hipfftComplex *in_data,
                                         float *out_data,
                                         int length) {
    unsigned int index = blockIdx.x * blockDim.x + threadIdx.x;
    while (index < length) {
        hipfftComplex in = in_data[index];
        
        out_data[index] = in.x;
        
        index += blockDim.x * gridDim.x;
    }
}

/* Backproject the sinogram to an image. */
__global__ void cudaBackprojectionKernal(float *in_data, float *out_data,
                                          int nAngles, int sin_width,
                                          int image_dim) {
    unsigned int index = blockIdx.x * blockDim.x + threadIdx.x;
    while (index < (image_dim * image_dim)) {
        // Get the pixel (x,y) coordinate from the index value
        int y_image = index / image_dim;
        int x_image = index % image_dim;
        // Get the geometric (x,y) coordinate from the pixel coordinate
        int x_geo = x_image - (image_dim / 2);
        int y_geo = (image_dim / 2) - y_image;
        
        // For all theta in the sinogram...
        for (int i = 0; i < nAngles; i++) {
            float d;
            // Handle the edges cases of theta = 0 and theta = PI/2
            if(i == 0) {
                d = (float) x_geo;
            }
            else if (i == nAngles / 2) {
                d = (float) y_geo;
            }
            else {
                float theta = PI * (((float) i) / ((float) nAngles));
                float m = -1 * cos(theta) / sin(theta);
                float x_i = ((float) (y_geo - m * x_geo)) / ((-1 / m) - m);
                float y_i = (-1 / m) * x_i;
                d = sqrt((x_i * x_i) + (y_i * y_i));
                // Center the index
                if (((-1 / m) > 0 && x_i < 0) || ((-1 / m) < 0 && x_i > 0)) {
                    d *= -1;
                }
            }
            // d is the distance from the center line, so we need to offset d by
            // this much
            d += sin_width / 2.0;
            d = truncf(d);
            // Now that we have d, add the right value to the image array
            out_data[y_image * image_dim + x_image] += in_data[i * sin_width + (int)d];
        }
        
        index += blockDim.x * gridDim.x;
    }
}




int main(int argc, char** argv){

    if (argc != 7){
        fprintf(stderr, "Incorrect number of arguments.\n\n");
        fprintf(stderr, "\nArguments: \n \
        < Sinogram filename > \n \
        < Width or height of original image, whichever is larger > \n \
        < Number of angles in sinogram >\n \
        < threads per block >\n \
        < number of blocks >\n \
        < output filename >\n");
        exit(EXIT_FAILURE);
    }


    /********** Parameters **********/

    int width = atoi(argv[2]);
    int height = width;
    int sinogram_width = (int)ceilf( height * sqrt(2) );

    int nAngles = atoi(argv[3]);


    int threadsPerBlock = atoi(argv[4]);
    int nBlocks = atoi(argv[5]);


    /********** Data storage *********/


    // GPU DATA STORAGE
    hipfftComplex *dev_sinogram_cmplx;
    float *dev_sinogram_float; 
    float* output_dev;  // Image storage


    hipfftComplex *sinogram_host;

    size_t size_result = width*height*sizeof(float);
    float *output_host = (float *)malloc(size_result);




    /*********** Set up IO, Read in data ************/

    sinogram_host = (hipfftComplex *)malloc(  sinogram_width*nAngles*sizeof(hipfftComplex) );

    FILE *dataFile = fopen(argv[1],"r");
    if (dataFile == NULL){
        fprintf(stderr, "Sinogram file missing\n");
        exit(EXIT_FAILURE);
    }

    FILE *outputFile = fopen(argv[6], "w");
    if (outputFile == NULL){
        fprintf(stderr, "Output file cannot be written\n");
        exit(EXIT_FAILURE);
    }

    int j, i;

    for(i = 0; i < nAngles * sinogram_width; i++){
        fscanf(dataFile,"%f",&sinogram_host[i].x);
        sinogram_host[i].y = 0;
    }

    fclose(dataFile);


    /*********** Assignment starts here *********/

    /* TODO: Allocate memory for all GPU storage above, copy input sinogram
    over to dev_sinogram_cmplx. */
    int sinogram_size = nAngles * sinogram_width;
    hipMalloc((void **) &dev_sinogram_cmplx, sizeof(hipfftComplex) * sinogram_size);
    hipMalloc((void **) &dev_sinogram_float, sizeof(float) * sinogram_size);
               
    hipMemcpy(dev_sinogram_cmplx, sinogram_host, 
               sizeof(hipfftComplex) * sinogram_size, 
               hipMemcpyHostToDevice);


    /* TODO 1: Implement the high-pass filter:
        - Use cuFFT for the forward FFT
        - Create your own kernel for the frequency scaling.
        - Use cuFFT for the inverse FFT
        - extract real components to floats
        - Free the original sinogram (dev_sinogram_cmplx)

        Note: If you want to deal with real-to-complex and complex-to-real
        transforms in cuFFT, you'll have to slightly change our code above.
    */
    hipfftHandle plan;
    int batch = 1;
    hipfftPlan1d(&plan, sinogram_size, HIPFFT_C2C, batch);
    
    // Run the forward DFT
    hipfftExecC2C(plan, dev_sinogram_cmplx, dev_sinogram_cmplx, HIPFFT_FORWARD);
    
    // Apply basic ramp filter
    cudaFrequencyKernal<<<nBlocks, threadsPerBlock>>>
                        (dev_sinogram_cmplx, sinogram_size);
    
    // Run the inverse DFT
    hipfftExecC2C(plan, dev_sinogram_cmplx, dev_sinogram_cmplx, HIPFFT_BACKWARD);
    
    // Extract the real components to floats
    cudaComplexToRealKernal<<<nBlocks, threadsPerBlock>>>
                        (dev_sinogram_cmplx, dev_sinogram_float, sinogram_size);
                        
    // Free the original sinogram
    hipFree(dev_sinogram_cmplx);


    /* TODO 2: Implement backprojection.
        - Allocate memory for the output image.
        - Create your own kernel to accelerate backprojection.
        - Copy the reconstructed image back to output_host.
        - Free all remaining memory on the GPU.
    */
    hipMalloc((void **) &output_dev, sizeof(float) * width * height);
    hipMemset(output_dev, 0, sizeof(float) * width * height);
    
    // Run the Backprojection kernal
    cudaBackprojectionKernal<<<nBlocks, threadsPerBlock>>>(dev_sinogram_float,
                                                           output_dev, 
                                                           nAngles,
                                                           sinogram_width, 
                                                           width);
                                                           
    // Copy the reconstructed image back to host
    hipMemcpy(output_host, output_dev, sizeof(float) * width * height, hipMemcpyDeviceToHost);
    
    // Free the remaining GPU memory
    hipFree(dev_sinogram_float);
    hipFree(output_dev);

    
    /* Export image data. */

    for(j = 0; j < width; j++){
        for(i = 0; i < height; i++){
            fprintf(outputFile, "%e ",output_host[j*width + i]);
        }
        fprintf(outputFile, "\n");
    }


    /* Cleanup: Free host memory, close files. */

    free(sinogram_host);
    free(output_host);

    fclose(outputFile);

    return 0;
}




	.text
	.file	"xray_ct_recon.hip"
	.globl	_Z9gpuFFTchki                   # -- Begin function _Z9gpuFFTchki
	.type	_Z9gpuFFTchki,@function
_Z9gpuFFTchki:                          # @_Z9gpuFFTchki
	.cfi_startproc
# %bb.0:
	testl	%edi, %edi
	je	.LBB0_1
# %bb.2:
	movl	%edi, %esi
	movl	$.L.str, %edi
	xorl	%eax, %eax
	jmp	printf                          # TAILCALL
.LBB0_1:
	retq
.Lfunc_end0:
	.size	_Z9gpuFFTchki, .Lfunc_end0-_Z9gpuFFTchki
	.cfi_endproc
                                        # -- End function
	.globl	_Z20checkCUDAKernelErrorv       # -- Begin function _Z20checkCUDAKernelErrorv
	.type	_Z20checkCUDAKernelErrorv,@function
_Z20checkCUDAKernelErrorv:              # @_Z20checkCUDAKernelErrorv
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	callq	hipGetLastError
	movq	stderr(%rip), %rbx
	testl	%eax, %eax
	jne	.LBB1_1
# %bb.2:
	movl	$.L.str.2, %edi
	movl	$25, %esi
	movl	$1, %edx
	movq	%rbx, %rcx
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	fwrite@PLT                      # TAILCALL
.LBB1_1:
	.cfi_def_cfa_offset 16
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.1, %esi
	movq	%rbx, %rdi
	movq	%rax, %rdx
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	fprintf                         # TAILCALL
.Lfunc_end1:
	.size	_Z20checkCUDAKernelErrorv, .Lfunc_end1-_Z20checkCUDAKernelErrorv
	.cfi_endproc
                                        # -- End function
	.globl	_Z34__device_stub__cudaFrequencyKernalP15HIP_vector_typeIfLj2EEi # -- Begin function _Z34__device_stub__cudaFrequencyKernalP15HIP_vector_typeIfLj2EEi
	.type	_Z34__device_stub__cudaFrequencyKernalP15HIP_vector_typeIfLj2EEi,@function
_Z34__device_stub__cudaFrequencyKernalP15HIP_vector_typeIfLj2EEi: # @_Z34__device_stub__cudaFrequencyKernalP15HIP_vector_typeIfLj2EEi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	4(%rsp), %rcx
	movl	%esi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z19cudaFrequencyKernalP15HIP_vector_typeIfLj2EEi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z34__device_stub__cudaFrequencyKernalP15HIP_vector_typeIfLj2EEi, .Lfunc_end2-_Z34__device_stub__cudaFrequencyKernalP15HIP_vector_typeIfLj2EEi
	.cfi_endproc
                                        # -- End function
	.globl	_Z38__device_stub__cudaComplexToRealKernalP15HIP_vector_typeIfLj2EEPfi # -- Begin function _Z38__device_stub__cudaComplexToRealKernalP15HIP_vector_typeIfLj2EEPfi
	.type	_Z38__device_stub__cudaComplexToRealKernalP15HIP_vector_typeIfLj2EEPfi,@function
_Z38__device_stub__cudaComplexToRealKernalP15HIP_vector_typeIfLj2EEPfi: # @_Z38__device_stub__cudaComplexToRealKernalP15HIP_vector_typeIfLj2EEPfi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z23cudaComplexToRealKernalP15HIP_vector_typeIfLj2EEPfi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z38__device_stub__cudaComplexToRealKernalP15HIP_vector_typeIfLj2EEPfi, .Lfunc_end3-_Z38__device_stub__cudaComplexToRealKernalP15HIP_vector_typeIfLj2EEPfi
	.cfi_endproc
                                        # -- End function
	.globl	_Z39__device_stub__cudaBackprojectionKernalPfS_iii # -- Begin function _Z39__device_stub__cudaBackprojectionKernalPfS_iii
	.type	_Z39__device_stub__cudaBackprojectionKernalPfS_iii,@function
_Z39__device_stub__cudaBackprojectionKernalPfS_iii: # @_Z39__device_stub__cudaBackprojectionKernalPfS_iii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	4(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z24cudaBackprojectionKernalPfS_iii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z39__device_stub__cudaBackprojectionKernalPfS_iii, .Lfunc_end4-_Z39__device_stub__cudaBackprojectionKernalPfS_iii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI5_0:
	.quad	0x3ff6a09e667f3bcd              # double 1.4142135623730951
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$104, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	cmpl	$7, %edi
	jne	.LBB5_1
# %bb.2:
	movq	%rsi, %r12
	movq	16(%rsi), %rdi
	callq	atoi
	movl	%eax, %ebx
	cvtsi2sd	%eax, %xmm0
	mulsd	.LCPI5_0(%rip), %xmm0
	cvtsd2ss	%xmm0, %xmm0
	callq	ceilf@PLT
	cvttss2si	%xmm0, %ebp
	movq	24(%r12), %rdi
	callq	atoi
	movl	%eax, %r15d
	movq	32(%r12), %rdi
	callq	atoi
	movl	%eax, 64(%rsp)                  # 4-byte Spill
	movq	40(%r12), %rdi
	callq	atoi
	movl	%eax, 60(%rsp)                  # 4-byte Spill
	movl	%ebx, %edi
	imull	%edi, %edi
	shlq	$2, %rdi
	callq	malloc
	movq	%rax, 24(%rsp)                  # 8-byte Spill
	movl	%r15d, %eax
	imull	%ebp, %eax
	movl	%eax, 12(%rsp)                  # 4-byte Spill
	cltq
	movq	%rax, 88(%rsp)                  # 8-byte Spill
	leaq	(,%rax,8), %rdi
	movq	%rdi, 80(%rsp)                  # 8-byte Spill
	callq	malloc
	movq	%rax, %r14
	movq	8(%r12), %rdi
	movl	$.L.str.5, %esi
	callq	fopen
	testq	%rax, %rax
	je	.LBB5_3
# %bb.5:
	movq	%rax, %r13
	movl	%r15d, 52(%rsp)                 # 4-byte Spill
	movl	%ebp, 56(%rsp)                  # 4-byte Spill
	movq	48(%r12), %rdi
	movl	$.L.str.7, %esi
	callq	fopen
	testq	%rax, %rax
	je	.LBB5_21
# %bb.6:                                # %.preheader99
	movq	%rax, %r12
	cmpl	$0, 12(%rsp)                    # 4-byte Folded Reload
	jle	.LBB5_9
# %bb.7:                                # %.lr.ph.preheader
	movl	12(%rsp), %r15d                 # 4-byte Reload
	movq	%r14, %rbp
.LBB5_8:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movl	$.L.str.9, %esi
	movq	%r13, %rdi
	movq	%rbp, %rdx
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	movl	$0, 4(%rbp)
	addq	$8, %rbp
	decq	%r15
	jne	.LBB5_8
.LBB5_9:                                # %._crit_edge
	movq	%r13, %rdi
	callq	fclose
	leaq	16(%rsp), %r13
	movq	%r13, %rdi
	movq	80(%rsp), %r15                  # 8-byte Reload
	movq	%r15, %rsi
	callq	hipMalloc
	movq	88(%rsp), %rbp                  # 8-byte Reload
	movq	%rbp, %rsi
	shlq	$2, %rsi
	leaq	40(%rsp), %rdi
	callq	hipMalloc
	movq	(%r13), %rdi
	movq	%r14, 72(%rsp)                  # 8-byte Spill
	movq	%r14, %rsi
	movq	%r15, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	96(%rsp), %r15
	movq	%r15, %rdi
	movl	%ebp, %esi
	movl	$41, %edx
	movl	$1, %ecx
	callq	hipfftPlan1d
	movq	(%r15), %rdi
	movq	(%r13), %rdx
	movq	%rdx, %rsi
	movl	$-1, %ecx
	callq	hipfftExecC2C
	movl	60(%rsp), %r14d                 # 4-byte Reload
	btsq	$32, %r14
	movl	64(%rsp), %ebp                  # 4-byte Reload
	btsq	$32, %rbp
	movq	%r14, %rdi
	movl	$1, %esi
	movq	%rbp, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_11
# %bb.10:
	movq	16(%rsp), %rdi
	movl	12(%rsp), %esi                  # 4-byte Reload
	callq	_Z34__device_stub__cudaFrequencyKernalP15HIP_vector_typeIfLj2EEi
.LBB5_11:
	movq	96(%rsp), %rdi
	movq	16(%rsp), %rdx
	movq	%rdx, %rsi
	movl	$1, %ecx
	callq	hipfftExecC2C
	movq	%r14, %rdi
	movl	$1, %esi
	movq	%rbp, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_13
# %bb.12:
	movq	16(%rsp), %rdi
	movq	40(%rsp), %rsi
	movl	12(%rsp), %edx                  # 4-byte Reload
	callq	_Z38__device_stub__cudaComplexToRealKernalP15HIP_vector_typeIfLj2EEPfi
.LBB5_13:
	movq	16(%rsp), %rdi
	callq	hipFree
	movslq	%ebx, %r13
	imulq	%r13, %r13
	shlq	$2, %r13
	leaq	32(%rsp), %r15
	movq	%r15, %rdi
	movq	%r13, %rsi
	callq	hipMalloc
	movq	(%r15), %rdi
	xorl	%esi, %esi
	movq	%r13, %rdx
	callq	hipMemset
	movq	%r14, %rdi
	movl	$1, %esi
	movq	%rbp, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_15
# %bb.14:
	movq	40(%rsp), %rdi
	movq	32(%rsp), %rsi
	movl	52(%rsp), %edx                  # 4-byte Reload
	movl	56(%rsp), %ecx                  # 4-byte Reload
	movl	%ebx, %r8d
	callq	_Z39__device_stub__cudaBackprojectionKernalPfS_iii
.LBB5_15:
	movq	32(%rsp), %rsi
	movq	24(%rsp), %rdi                  # 8-byte Reload
	movq	%r13, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	40(%rsp), %rdi
	callq	hipFree
	movq	32(%rsp), %rdi
	callq	hipFree
	testl	%ebx, %ebx
	jle	.LBB5_20
# %bb.16:                               # %.preheader.lr.ph
	movl	%ebx, %r15d
	xorl	%r13d, %r13d
	xorl	%ebp, %ebp
	movl	%ebx, 68(%rsp)                  # 4-byte Spill
.LBB5_17:                               # %.lr.ph102
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB5_18 Depth 2
	movl	%r13d, %eax
	movq	24(%rsp), %rcx                  # 8-byte Reload
	leaq	(%rcx,%rax,4), %r14
	xorl	%ebx, %ebx
.LBB5_18:                               #   Parent Loop BB5_17 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r14,%rbx,4), %xmm0
	movl	$.L.str.10, %esi
	movq	%r12, %rdi
	movb	$1, %al
	callq	fprintf
	incq	%rbx
	cmpq	%rbx, %r15
	jne	.LBB5_18
# %bb.19:                               # %._crit_edge103
                                        #   in Loop: Header=BB5_17 Depth=1
	movl	$10, %edi
	movq	%r12, %rsi
	callq	fputc@PLT
	incq	%rbp
	movl	68(%rsp), %ebx                  # 4-byte Reload
	addl	%ebx, %r13d
	cmpq	%r15, %rbp
	jne	.LBB5_17
.LBB5_20:                               # %._crit_edge105
	movq	72(%rsp), %rdi                  # 8-byte Reload
	callq	free
	movq	24(%rsp), %rdi                  # 8-byte Reload
	callq	free
	movq	%r12, %rdi
	callq	fclose
	xorl	%eax, %eax
	addq	$104, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB5_1:
	.cfi_def_cfa_offset 160
	movq	stderr(%rip), %rcx
	movl	$.L.str.3, %edi
	movl	$32, %esi
	movl	$1, %edx
	callq	fwrite@PLT
	movq	stderr(%rip), %rcx
	movl	$.L.str.4, %edi
	movl	$246, %esi
	jmp	.LBB5_4
.LBB5_3:
	movq	stderr(%rip), %rcx
	movl	$.L.str.6, %edi
	movl	$22, %esi
	jmp	.LBB5_4
.LBB5_21:
	movq	stderr(%rip), %rcx
	movl	$.L.str.8, %edi
	movl	$30, %esi
.LBB5_4:
	movl	$1, %edx
	callq	fwrite@PLT
	movl	$1, %edi
	callq	exit
.Lfunc_end5:
	.size	main, .Lfunc_end5-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB6_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB6_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z19cudaFrequencyKernalP15HIP_vector_typeIfLj2EEi, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z23cudaComplexToRealKernalP15HIP_vector_typeIfLj2EEPfi, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z24cudaBackprojectionKernalPfS_iii, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end6:
	.size	__hip_module_ctor, .Lfunc_end6-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB7_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB7_2:
	retq
.Lfunc_end7:
	.size	__hip_module_dtor, .Lfunc_end7-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Failed FFT call, error code %d\n"
	.size	.L.str, 32

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"Error %s\n"
	.size	.L.str.1, 10

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"No kernel error detected\n"
	.size	.L.str.2, 26

	.type	_Z19cudaFrequencyKernalP15HIP_vector_typeIfLj2EEi,@object # @_Z19cudaFrequencyKernalP15HIP_vector_typeIfLj2EEi
	.section	.rodata,"a",@progbits
	.globl	_Z19cudaFrequencyKernalP15HIP_vector_typeIfLj2EEi
	.p2align	3, 0x0
_Z19cudaFrequencyKernalP15HIP_vector_typeIfLj2EEi:
	.quad	_Z34__device_stub__cudaFrequencyKernalP15HIP_vector_typeIfLj2EEi
	.size	_Z19cudaFrequencyKernalP15HIP_vector_typeIfLj2EEi, 8

	.type	_Z23cudaComplexToRealKernalP15HIP_vector_typeIfLj2EEPfi,@object # @_Z23cudaComplexToRealKernalP15HIP_vector_typeIfLj2EEPfi
	.globl	_Z23cudaComplexToRealKernalP15HIP_vector_typeIfLj2EEPfi
	.p2align	3, 0x0
_Z23cudaComplexToRealKernalP15HIP_vector_typeIfLj2EEPfi:
	.quad	_Z38__device_stub__cudaComplexToRealKernalP15HIP_vector_typeIfLj2EEPfi
	.size	_Z23cudaComplexToRealKernalP15HIP_vector_typeIfLj2EEPfi, 8

	.type	_Z24cudaBackprojectionKernalPfS_iii,@object # @_Z24cudaBackprojectionKernalPfS_iii
	.globl	_Z24cudaBackprojectionKernalPfS_iii
	.p2align	3, 0x0
_Z24cudaBackprojectionKernalPfS_iii:
	.quad	_Z39__device_stub__cudaBackprojectionKernalPfS_iii
	.size	_Z24cudaBackprojectionKernalPfS_iii, 8

	.type	.L.str.3,@object                # @.str.3
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.3:
	.asciz	"Incorrect number of arguments.\n\n"
	.size	.L.str.3, 33

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"\nArguments: \n         < Sinogram filename > \n         < Width or height of original image, whichever is larger > \n         < Number of angles in sinogram >\n         < threads per block >\n         < number of blocks >\n         < output filename >\n"
	.size	.L.str.4, 247

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"r"
	.size	.L.str.5, 2

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"Sinogram file missing\n"
	.size	.L.str.6, 23

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"w"
	.size	.L.str.7, 2

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"Output file cannot be written\n"
	.size	.L.str.8, 31

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"%f"
	.size	.L.str.9, 3

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"%e "
	.size	.L.str.10, 4

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z19cudaFrequencyKernalP15HIP_vector_typeIfLj2EEi"
	.size	.L__unnamed_1, 50

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z23cudaComplexToRealKernalP15HIP_vector_typeIfLj2EEPfi"
	.size	.L__unnamed_2, 56

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z24cudaBackprojectionKernalPfS_iii"
	.size	.L__unnamed_3, 36

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z34__device_stub__cudaFrequencyKernalP15HIP_vector_typeIfLj2EEi
	.addrsig_sym _Z38__device_stub__cudaComplexToRealKernalP15HIP_vector_typeIfLj2EEPfi
	.addrsig_sym _Z39__device_stub__cudaBackprojectionKernalPfS_iii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z19cudaFrequencyKernalP15HIP_vector_typeIfLj2EEi
	.addrsig_sym _Z23cudaComplexToRealKernalP15HIP_vector_typeIfLj2EEPfi
	.addrsig_sym _Z24cudaBackprojectionKernalPfS_iii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z19cudaFrequencyKernalP15HIP_vector_typeIfLj2EEi ; -- Begin function _Z19cudaFrequencyKernalP15HIP_vector_typeIfLj2EEi
	.globl	_Z19cudaFrequencyKernalP15HIP_vector_typeIfLj2EEi
	.p2align	8
	.type	_Z19cudaFrequencyKernalP15HIP_vector_typeIfLj2EEi,@function
_Z19cudaFrequencyKernalP15HIP_vector_typeIfLj2EEi: ; @_Z19cudaFrequencyKernalP15HIP_vector_typeIfLj2EEi
; %bb.0:
	s_clause 0x1
	s_load_b32 s5, s[0:1], 0x1c
	s_load_b32 s4, s[0:1], 0x8
	s_add_u32 s2, s0, 16
	s_addc_u32 s3, s1, 0
	s_mov_b32 s6, exec_lo
	s_waitcnt lgkmcnt(0)
	s_and_b32 s5, s5, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s5, v[0:1]
	v_cmpx_gt_u32_e64 s4, v1
	s_cbranch_execz .LBB0_3
; %bb.1:                                ; %.lr.ph
	s_load_b32 s3, s[2:3], 0x0
	s_load_b64 s[0:1], s[0:1], 0x0
	s_lshr_b32 s2, s4, 31
	v_sub_nc_u32_e32 v0, s4, v1
	s_add_i32 s2, s4, s2
	v_mov_b32_e32 v2, 0
	s_ashr_i32 s2, s2, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	v_cvt_f32_i32_e32 v3, s2
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s3, s3, s5
	s_mov_b32 s5, 0
.LBB0_2:                                ; =>This Inner Loop Header: Depth=1
	v_lshlrev_b64 v[4:5], 3, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, s0, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v5, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s2, v1
	global_load_b64 v[6:7], v[4:5], off
	v_cndmask_b32_e32 v8, v0, v1, vcc_lo
	v_subrev_nc_u32_e32 v0, s3, v0
	v_add_nc_u32_e32 v1, s3, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f32_u32_e32 v8, v8
	v_div_scale_f32 v9, null, v3, v3, v8
	v_div_scale_f32 v12, vcc_lo, v8, v3, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v10, v9
	s_waitcnt_depctr 0xfff
	v_fma_f32 v11, -v9, v10, 1.0
	v_fmac_f32_e32 v10, v11, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v11, v12, v10
	v_fma_f32 v13, -v9, v11, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, v13, v10
	v_fma_f32 v9, -v9, v11, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_fmas_f32 v9, v9, v10, v11
	v_cmp_le_u32_e32 vcc_lo, s4, v1
	v_div_fixup_f32 v8, v9, v3, v8
	s_or_b32 s5, vcc_lo, s5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f32_e32 v6, v8, v6
	v_mul_f32_e32 v7, v8, v7
	global_store_b64 v[4:5], v[6:7], off
	s_and_not1_b32 exec_lo, exec_lo, s5
	s_cbranch_execnz .LBB0_2
.LBB0_3:                                ; %._crit_edge
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z19cudaFrequencyKernalP15HIP_vector_typeIfLj2EEi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 14
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z19cudaFrequencyKernalP15HIP_vector_typeIfLj2EEi, .Lfunc_end0-_Z19cudaFrequencyKernalP15HIP_vector_typeIfLj2EEi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 324
; NumSgprs: 18
; NumVgprs: 14
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 14
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z23cudaComplexToRealKernalP15HIP_vector_typeIfLj2EEPfi ; -- Begin function _Z23cudaComplexToRealKernalP15HIP_vector_typeIfLj2EEPfi
	.globl	_Z23cudaComplexToRealKernalP15HIP_vector_typeIfLj2EEPfi
	.p2align	8
	.type	_Z23cudaComplexToRealKernalP15HIP_vector_typeIfLj2EEPfi,@function
_Z23cudaComplexToRealKernalP15HIP_vector_typeIfLj2EEPfi: ; @_Z23cudaComplexToRealKernalP15HIP_vector_typeIfLj2EEPfi
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x24
	s_load_b32 s8, s[0:1], 0x10
	s_add_u32 s2, s0, 24
	s_addc_u32 s3, s1, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s9, s4, 0xffff
	s_mov_b32 s4, exec_lo
	v_mad_u64_u32 v[1:2], null, s15, s9, v[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s8, v1
	s_cbranch_execz .LBB1_3
; %bb.1:                                ; %.lr.ph
	s_load_b32 s2, s[2:3], 0x0
	s_load_b128 s[4:7], s[0:1], 0x0
	v_mov_b32_e32 v2, 0
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s1, s2, s9
	s_mov_b32 s2, 0
.LBB1_2:                                ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 3, v[1:2]
	v_add_co_u32 v3, vcc_lo, s4, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
	global_load_b32 v0, v[3:4], off
	v_lshlrev_b64 v[3:4], 2, v[1:2]
	v_add_nc_u32_e32 v1, s1, v1
	v_cmp_le_u32_e32 vcc_lo, s8, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v3, s0, s6, v3
	v_add_co_ci_u32_e64 v4, s0, s7, v4, s0
	s_or_b32 s2, vcc_lo, s2
	s_waitcnt vmcnt(0)
	global_store_b32 v[3:4], v0, off
	s_and_not1_b32 exec_lo, exec_lo, s2
	s_cbranch_execnz .LBB1_2
.LBB1_3:                                ; %._crit_edge
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z23cudaComplexToRealKernalP15HIP_vector_typeIfLj2EEPfi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z23cudaComplexToRealKernalP15HIP_vector_typeIfLj2EEPfi, .Lfunc_end1-_Z23cudaComplexToRealKernalP15HIP_vector_typeIfLj2EEPfi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 208
; NumSgprs: 18
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z24cudaBackprojectionKernalPfS_iii ; -- Begin function _Z24cudaBackprojectionKernalPfS_iii
	.globl	_Z24cudaBackprojectionKernalPfS_iii
	.p2align	8
	.type	_Z24cudaBackprojectionKernalPfS_iii,@function
_Z24cudaBackprojectionKernalPfS_iii:    ; @_Z24cudaBackprojectionKernalPfS_iii
; %bb.0:
	s_clause 0x1
	s_load_b32 s8, s[0:1], 0x2c
	s_load_b128 s[4:7], s[0:1], 0x10
	s_add_u32 s2, s0, 32
	s_addc_u32 s3, s1, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s16, s8, 0xffff
	s_mul_i32 s7, s6, s6
	v_mad_u64_u32 v[1:2], null, s15, s16, v[0:1]
	s_mov_b32 s8, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s7, v1
	s_cbranch_execz .LBB2_23
; %bb.1:                                ; %.lr.ph69
	v_cvt_f64_i32_e32 v[2:3], s5
	v_cvt_f32_u32_e32 v0, s6
	s_lshr_b32 s8, s6, 31
	s_load_b32 s17, s[2:3], 0x0
	s_add_i32 s8, s6, s8
	s_mov_b32 s2, 0x54442d11
	v_rcp_iflag_f32_e32 v0, v0
	s_ashr_i32 s12, s8, 1
	s_cmp_gt_i32 s4, 0
	s_mov_b32 s14, 0
	s_cselect_b32 s13, -1, 0
	s_sub_i32 s8, 0, s6
	s_mov_b32 s3, 0x400921fb
	s_mov_b32 s18, 0x37d75334
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v0, 0x4f7ffffe, v0
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s16, s17, s16
	s_mov_b32 s17, 0xb94c1982
	v_mul_f64 v[3:4], v[2:3], 0.5
	v_cvt_u32_f32_e32 v2, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_mul_lo_u32 v0, s8, v2
	s_load_b128 s[8:11], s[0:1], 0x0
	s_lshr_b32 s0, s4, 31
	s_add_i32 s0, s4, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_ashr_i32 s15, s0, 1
	v_mul_hi_u32 v5, v2, v0
	v_cvt_f32_i32_e32 v0, s4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_nc_u32_e32 v7, v2, v5
.LBB2_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB2_4 Depth 2
	s_and_not1_b32 vcc_lo, exec_lo, s13
	s_cbranch_vccnz .LBB2_22
; %bb.3:                                ; %.lr.ph
                                        ;   in Loop: Header=BB2_2 Depth=1
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v8, v1, v7
	s_mov_b32 s19, 0
	s_mov_b32 s20, 0
	v_lshlrev_b64 v[5:6], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v9, v8, s6
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v5, vcc_lo, s10, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v6, vcc_lo, s11, v6, vcc_lo
	v_sub_nc_u32_e32 v9, v1, v9
	global_load_b32 v2, v[5:6], off
	v_subrev_nc_u32_e32 v11, s6, v9
	v_cmp_le_u32_e32 vcc_lo, s6, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v9, v9, v11 :: v_dual_add_nc_u32 v10, 1, v8
	v_cndmask_b32_e32 v8, v8, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_le_u32_e32 vcc_lo, s6, v9
	v_add_nc_u32_e32 v10, 1, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v8, v8, v10, vcc_lo
	v_mul_lo_u32 v9, v8, s6
	v_sub_nc_u32_e32 v8, s12, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cvt_f32_i32_e32 v8, v8
	v_sub_nc_u32_e32 v9, v1, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_subrev_nc_u32_e32 v9, s12, v9
	v_cvt_f32_i32_e32 v9, v9
.LBB2_4:                                ;   Parent Loop BB2_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1)
	v_mov_b32_e32 v11, v9
	s_cmp_eq_u32 s20, 0
	s_cbranch_scc1 .LBB2_21
; %bb.5:                                ;   in Loop: Header=BB2_4 Depth=2
	v_mov_b32_e32 v11, v8
	s_cmp_eq_u32 s15, s20
	s_cbranch_scc1 .LBB2_21
; %bb.6:                                ;   in Loop: Header=BB2_4 Depth=2
	v_cvt_f32_i32_e32 v10, s20
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_scale_f32 v11, null, v0, v0, v10
	v_rcp_f32_e32 v12, v11
	s_waitcnt_depctr 0xfff
	v_fma_f32 v13, -v11, v12, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v12, v13, v12
	v_div_scale_f32 v13, vcc_lo, v10, v0, v10
	v_mul_f32_e32 v14, v13, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v15, -v11, v14, v13
	v_fmac_f32_e32 v14, v15, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v11, -v11, v14, v13
	v_div_fmas_f32 v11, v11, v12, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f32 v10, v11, v0, v10
	v_cvt_f64_f32_e32 v[10:11], v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[10:11], v[10:11], s[2:3]
	v_cvt_f32_f64_e32 v10, v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cmp_ngt_f32_e64 s1, 0x48000000, |v10|
	v_readfirstlane_b32 s0, v10
	s_and_b32 vcc_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1)
	s_bitset0_b32 s0, 31
	s_cbranch_vccz .LBB2_8
; %bb.7:                                ;   in Loop: Header=BB2_4 Depth=2
	s_and_b32 s21, s0, 0x7fffff
	s_lshr_b32 s22, s0, 23
	s_bitset1_b32 s21, 23
	s_addk_i32 s22, 0xff88
	s_mul_hi_u32 s23, s21, 0xfe5163ab
	s_mul_i32 s24, s21, 0x3c439041
	s_mul_hi_u32 s25, s21, 0x3c439041
	s_add_u32 s23, s23, s24
	s_addc_u32 s24, 0, s25
	s_mul_i32 s25, s21, 0xdb629599
	s_mul_hi_u32 s26, s21, 0xdb629599
	s_add_u32 s24, s24, s25
	s_addc_u32 s25, 0, s26
	s_mul_i32 s26, s21, 0xf534ddc0
	s_mul_hi_u32 s27, s21, 0xf534ddc0
	s_add_u32 s25, s25, s26
	s_addc_u32 s26, 0, s27
	s_mul_i32 s27, s21, 0xfc2757d1
	s_mul_hi_u32 s28, s21, 0xfc2757d1
	s_add_u32 s26, s26, s27
	s_addc_u32 s27, 0, s28
	s_mul_i32 s28, s21, 0x4e441529
	s_mul_hi_u32 s29, s21, 0x4e441529
	s_add_u32 s27, s27, s28
	s_addc_u32 s28, 0, s29
	s_cmp_gt_u32 s22, 63
	s_mul_i32 s29, s21, 0xfe5163ab
	s_mul_hi_u32 s30, s21, 0xa2f9836e
	s_mul_i32 s21, s21, 0xa2f9836e
	s_cselect_b32 s31, s24, s26
	s_cselect_b32 s23, s23, s25
	s_cselect_b32 s24, s29, s24
	s_add_u32 s21, s28, s21
	s_addc_u32 s28, 0, s30
	s_cmp_gt_u32 s22, 63
	s_cselect_b32 s29, 0xffffffc0, 0
	s_cselect_b32 s25, s25, s27
	s_cselect_b32 s21, s26, s21
	s_cselect_b32 s26, s27, s28
	s_add_i32 s29, s29, s22
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_gt_u32 s29, 31
	s_cselect_b32 s22, 0xffffffe0, 0
	s_cselect_b32 s27, s25, s21
	s_cselect_b32 s21, s21, s26
	s_cselect_b32 s25, s31, s25
	s_cselect_b32 s26, s23, s31
	s_cselect_b32 s23, s24, s23
	s_add_i32 s22, s22, s29
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_gt_u32 s22, 31
	s_cselect_b32 s24, 0xffffffe0, 0
	s_cselect_b32 s21, s27, s21
	s_cselect_b32 s27, s25, s27
	s_cselect_b32 s25, s26, s25
	s_cselect_b32 s23, s23, s26
	s_add_i32 s24, s24, s22
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	s_sub_i32 s22, 32, s24
	s_cmp_eq_u32 s24, 0
	v_mov_b32_e32 v11, s22
	s_cselect_b32 s24, -1, 0
	v_alignbit_b32 v12, s21, s27, v11
	v_alignbit_b32 v13, s27, s25, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s22, v12
	v_cndmask_b32_e64 v12, v13, s27, s24
	s_delay_alu instid0(VALU_DEP_2)
	s_cselect_b32 s21, s21, s22
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_alignbit_b32 v13, s21, v12, 30
	s_bfe_u32 s22, s21, 0x1001d
	s_delay_alu instid0(SALU_CYCLE_1)
	s_sub_i32 s26, 0, s22
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_xor_b32_e32 v13, s26, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_clz_i32_u32_e32 v14, v13
	v_min_u32_e32 v14, 32, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v16, 23, v14
	v_alignbit_b32 v11, s25, s23, v11
	v_sub_nc_u32_e32 v15, 31, v14
	v_cndmask_b32_e64 v11, v11, s25, s24
	s_delay_alu instid0(VALU_DEP_1)
	v_alignbit_b32 v12, v12, v11, 30
	v_alignbit_b32 v11, v11, s23, 30
	s_lshr_b32 s23, s21, 29
	s_lshr_b32 s21, s21, 30
	s_lshl_b32 s23, s23, 31
	v_xor_b32_e32 v12, s26, v12
	v_xor_b32_e32 v11, s26, v11
	s_or_b32 s24, s23, 0.5
	s_add_i32 s22, s22, s21
	v_sub_nc_u32_e32 v16, s24, v16
	v_alignbit_b32 v13, v13, v12, v15
	v_alignbit_b32 v11, v12, v11, v15
	s_mov_b32 s21, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_alignbit_b32 v12, v13, v11, 9
	v_lshrrev_b32_e32 v13, 9, v13
	v_clz_i32_u32_e32 v15, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_min_u32_e32 v15, 32, v15
	v_sub_nc_u32_e32 v17, 31, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_alignbit_b32 v11, v12, v11, v17
	v_or_b32_e32 v12, v13, v16
	v_add_nc_u32_e32 v14, v15, v14
	v_lshrrev_b32_e32 v11, 9, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mul_f32 v14, 0x3fc90fda, v12 :: v_dual_lshlrev_b32 v13, 23, v14
	v_sub_nc_u32_e32 v11, v11, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v13, 0x3fc90fda, v12, -v14
	v_add_nc_u32_e32 v11, 0x33000000, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v13, 0x33a22168, v12
	v_or_b32_e32 v11, s23, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v13, 0x3fc90fda, v11
	v_add_f32_e32 v11, v14, v13
	s_branch .LBB2_9
.LBB2_8:                                ;   in Loop: Header=BB2_4 Depth=2
	s_mov_b32 s21, -1
                                        ; implicit-def: $sgpr22
                                        ; implicit-def: $vgpr11
.LBB2_9:                                ; %Flow90
                                        ;   in Loop: Header=BB2_4 Depth=2
	v_mul_f32_e64 v13, 0x3f22f983, |v10|
	v_mov_b32_e32 v12, s22
	s_and_not1_b32 vcc_lo, exec_lo, s21
	s_delay_alu instid0(VALU_DEP_2)
	v_rndne_f32_e32 v13, v13
	s_cbranch_vccnz .LBB2_11
; %bb.10:                               ;   in Loop: Header=BB2_4 Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f32 v11, 0xbfc90fda, v13, |v10|
	v_cvt_i32_f32_e32 v12, v13
	v_fmac_f32_e32 v11, 0xb3a22168, v13
	s_delay_alu instid0(VALU_DEP_1)
	v_fmac_f32_e32 v11, 0xa7c234c4, v13
.LBB2_11:                               ; %_ZL3cosf.exit
                                        ;   in Loop: Header=BB2_4 Depth=2
	s_and_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccz .LBB2_13
; %bb.12:                               ;   in Loop: Header=BB2_4 Depth=2
	s_and_b32 s1, s0, 0x7fffff
	s_lshr_b32 s21, s0, 23
	s_bitset1_b32 s1, 23
	s_addk_i32 s21, 0xff88
	s_mul_hi_u32 s22, s1, 0xfe5163ab
	s_mul_i32 s23, s1, 0x3c439041
	s_mul_hi_u32 s24, s1, 0x3c439041
	s_add_u32 s22, s22, s23
	s_addc_u32 s23, 0, s24
	s_mul_i32 s24, s1, 0xdb629599
	s_mul_hi_u32 s25, s1, 0xdb629599
	s_add_u32 s23, s23, s24
	s_addc_u32 s24, 0, s25
	s_mul_i32 s25, s1, 0xf534ddc0
	s_mul_hi_u32 s26, s1, 0xf534ddc0
	s_add_u32 s24, s24, s25
	s_addc_u32 s25, 0, s26
	s_mul_i32 s26, s1, 0xfc2757d1
	s_mul_hi_u32 s27, s1, 0xfc2757d1
	s_add_u32 s25, s25, s26
	s_addc_u32 s26, 0, s27
	s_mul_i32 s27, s1, 0x4e441529
	s_mul_hi_u32 s28, s1, 0x4e441529
	s_add_u32 s26, s26, s27
	s_addc_u32 s27, 0, s28
	s_cmp_gt_u32 s21, 63
	s_mul_i32 s28, s1, 0xfe5163ab
	s_mul_hi_u32 s29, s1, 0xa2f9836e
	s_mul_i32 s1, s1, 0xa2f9836e
	s_cselect_b32 s30, s23, s25
	s_cselect_b32 s22, s22, s24
	s_cselect_b32 s23, s28, s23
	s_add_u32 s1, s27, s1
	s_addc_u32 s27, 0, s29
	s_cmp_gt_u32 s21, 63
	s_cselect_b32 s28, 0xffffffc0, 0
	s_cselect_b32 s24, s24, s26
	s_cselect_b32 s1, s25, s1
	s_cselect_b32 s25, s26, s27
	s_add_i32 s28, s28, s21
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_gt_u32 s28, 31
	s_cselect_b32 s21, 0xffffffe0, 0
	s_cselect_b32 s26, s24, s1
	s_cselect_b32 s1, s1, s25
	s_cselect_b32 s24, s30, s24
	s_cselect_b32 s25, s22, s30
	s_cselect_b32 s22, s23, s22
	s_add_i32 s21, s21, s28
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_gt_u32 s21, 31
	s_cselect_b32 s23, 0xffffffe0, 0
	s_cselect_b32 s1, s26, s1
	s_cselect_b32 s26, s24, s26
	s_cselect_b32 s24, s25, s24
	s_cselect_b32 s22, s22, s25
	s_add_i32 s23, s23, s21
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	s_sub_i32 s21, 32, s23
	s_cmp_eq_u32 s23, 0
	v_mov_b32_e32 v14, s21
	s_cselect_b32 s23, -1, 0
	v_alignbit_b32 v15, s1, s26, v14
	v_alignbit_b32 v16, s26, s24, v14
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s21, v15
	v_cndmask_b32_e64 v15, v16, s26, s23
	s_delay_alu instid0(VALU_DEP_2)
	s_cselect_b32 s1, s1, s21
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_alignbit_b32 v16, s1, v15, 30
	s_bfe_u32 s21, s1, 0x1001d
	s_delay_alu instid0(SALU_CYCLE_1)
	s_sub_i32 s25, 0, s21
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_xor_b32_e32 v16, s25, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_clz_i32_u32_e32 v17, v16
	v_min_u32_e32 v17, 32, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v19, 23, v17
	v_alignbit_b32 v14, s24, s22, v14
	v_sub_nc_u32_e32 v18, 31, v17
	v_cndmask_b32_e64 v14, v14, s24, s23
	s_delay_alu instid0(VALU_DEP_1)
	v_alignbit_b32 v15, v15, v14, 30
	v_alignbit_b32 v14, v14, s22, 30
	s_lshr_b32 s22, s1, 29
	s_lshr_b32 s1, s1, 30
	s_lshl_b32 s22, s22, 31
	v_xor_b32_e32 v15, s25, v15
	v_xor_b32_e32 v14, s25, v14
	s_or_b32 s23, s22, 0.5
	s_add_i32 s21, s21, s1
	v_sub_nc_u32_e32 v19, s23, v19
	v_alignbit_b32 v16, v16, v15, v18
	v_alignbit_b32 v14, v15, v14, v18
	s_mov_b32 s1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_alignbit_b32 v15, v16, v14, 9
	v_lshrrev_b32_e32 v16, 9, v16
	v_clz_i32_u32_e32 v18, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_min_u32_e32 v18, 32, v18
	v_sub_nc_u32_e32 v20, 31, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_alignbit_b32 v14, v15, v14, v20
	v_or_b32_e32 v15, v16, v19
	v_add_nc_u32_e32 v17, v18, v17
	v_lshrrev_b32_e32 v14, 9, v14
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mul_f32 v17, 0x3fc90fda, v15 :: v_dual_lshlrev_b32 v16, 23, v17
	v_sub_nc_u32_e32 v14, v14, v16
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v16, 0x3fc90fda, v15, -v17
	v_add_nc_u32_e32 v14, 0x33000000, v14
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v16, 0x33a22168, v15
	v_or_b32_e32 v14, s22, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v16, 0x3fc90fda, v14
	v_add_f32_e32 v14, v17, v16
	s_branch .LBB2_14
.LBB2_13:                               ;   in Loop: Header=BB2_4 Depth=2
	s_mov_b32 s1, -1
                                        ; implicit-def: $sgpr21
                                        ; implicit-def: $vgpr14
.LBB2_14:                               ; %Flow89
                                        ;   in Loop: Header=BB2_4 Depth=2
	v_mov_b32_e32 v15, s21
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB2_16
; %bb.15:                               ;   in Loop: Header=BB2_4 Depth=2
	v_fma_f32 v14, 0xbfc90fda, v13, |v10|
	v_cvt_i32_f32_e32 v15, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v14, 0xb3a22168, v13
	v_fmac_f32_e32 v14, 0xa7c234c4, v13
.LBB2_16:                               ; %_ZL3sinf.exit
                                        ;   in Loop: Header=BB2_4 Depth=2
	v_dual_mul_f32 v13, v11, v11 :: v_dual_and_b32 v16, 1, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_dual_mul_f32 v17, v14, v14 :: v_dual_lshlrev_b32 v12, 30, v12
	v_xor_b32_e32 v23, s0, v10
	v_fmaak_f32 v18, s17, v13, 0x3c0881c4
	v_dual_fmaak_f32 v19, s18, v13, 0xbab64f3b :: v_dual_and_b32 v20, 1, v15
	v_lshlrev_b32_e32 v15, 30, v15
	v_cmp_eq_u32_e32 vcc_lo, 0, v16
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fmaak_f32 v18, v13, v18, 0xbe2aaa9d
	v_fmaak_f32 v21, s17, v17, 0x3c0881c4
	v_and_b32_e32 v12, 0x80000000, v12
	v_mul_f32_e32 v18, v13, v18
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmaak_f32 v21, v17, v21, 0xbe2aaa9d
	v_dual_fmaak_f32 v22, s18, v17, 0xbab64f3b :: v_dual_fmac_f32 v11, v11, v18
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mul_f32_e32 v21, v17, v21
	v_fmaak_f32 v19, v13, v19, 0x3d2aabf7
	v_fmaak_f32 v22, v17, v22, 0x3d2aabf7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_fmac_f32 v14, v14, v21 :: v_dual_fmaak_f32 v19, v13, v19, 0xbf000004
	v_fmaak_f32 v22, v17, v22, 0xbf000004
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v13, v13, v19, 1.0
	v_fma_f32 v17, v17, v22, 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v11, -v11, v13, vcc_lo
	v_cmp_eq_u32_e32 vcc_lo, 0, v20
	v_and_b32_e32 v15, 0x80000000, v15
	v_xor_b32_e32 v11, v12, v11
	v_cndmask_b32_e32 v14, v17, v14, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v13, v23, v15
	v_cmp_class_f32_e64 vcc_lo, v10, 0x1f8
	v_xor_b32_e32 v12, v13, v14
	v_cndmask_b32_e32 v10, 0x7fc00000, v11, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v11, 0x7fc00000, v12, vcc_lo
	v_div_scale_f32 v12, null, v11, v11, -v10
	v_div_scale_f32 v15, vcc_lo, -v10, v11, -v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v13, v12
	s_waitcnt_depctr 0xfff
	v_fma_f32 v14, -v12, v13, 1.0
	v_fmac_f32_e32 v13, v14, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v14, v15, v13
	v_fma_f32 v16, -v12, v14, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v14, v16, v13
	v_fma_f32 v12, -v12, v14, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v12, v12, v13, v14
	v_div_fixup_f32 v11, v12, v11, -v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_scale_f32 v10, null, v11, v11, -1.0
	v_div_scale_f32 v14, vcc_lo, -1.0, v11, -1.0
	v_rcp_f32_e32 v12, v10
	s_waitcnt_depctr 0xfff
	v_fma_f32 v13, -v10, v12, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v12, v13, v12
	v_mul_f32_e32 v13, v14, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v15, -v10, v13, v14
	v_fmac_f32_e32 v13, v15, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v10, -v10, v13, v14
	v_div_fmas_f32 v10, v10, v12, v13
	v_fma_f32 v12, -v11, v9, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f32 v10, v10, v11, -1.0
	v_sub_f32_e32 v11, v10, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_scale_f32 v13, null, v11, v11, v12
	v_div_scale_f32 v16, vcc_lo, v12, v11, v12
	v_rcp_f32_e32 v14, v13
	s_waitcnt_depctr 0xfff
	v_fma_f32 v15, -v13, v14, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v14, v15, v14
	v_mul_f32_e32 v15, v16, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v17, -v13, v15, v16
	v_fmac_f32_e32 v15, v17, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v13, -v13, v15, v16
	v_div_fmas_f32 v13, v13, v14, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f32 v12, v13, v11, v12
	v_mul_f32_e32 v11, v10, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v11, v11, v11
	v_fmac_f32_e32 v11, v12, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v13, 0x4f800000, v11
	v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v11
	v_cndmask_b32_e32 v11, v11, v13, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_sqrt_f32_e32 v13, v11
	v_cmp_class_f32_e64 s1, v11, 0x260
	s_waitcnt_depctr 0xfff
	v_add_nc_u32_e32 v14, -1, v13
	v_add_nc_u32_e32 v15, 1, v13
	v_fma_f32 v16, -v14, v13, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v17, -v15, v13, v11
	v_cmp_ge_f32_e64 s0, 0, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v13, v13, v14, s0
	v_cmp_lt_f32_e64 s0, 0, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v13, v13, v15, s0
	v_cmp_gt_f32_e64 s0, 0, v12
	v_mul_f32_e32 v14, 0x37800000, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v13, v13, v14, vcc_lo
	v_cmp_lt_f32_e32 vcc_lo, 0, v10
	v_cndmask_b32_e64 v11, v13, v11, s1
	s_and_b32 s1, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_xor_b32 s0, s1, -1
	s_and_saveexec_b32 s21, s0
; %bb.17:                               ;   in Loop: Header=BB2_4 Depth=2
	v_cmp_gt_f32_e32 vcc_lo, 0, v10
	v_cmp_lt_f32_e64 s0, 0, v12
	s_and_not1_b32 s1, s1, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, vcc_lo, s0
	s_and_b32 s0, s0, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s1, s1, s0
; %bb.18:                               ; %Flow
                                        ;   in Loop: Header=BB2_4 Depth=2
	s_or_b32 exec_lo, exec_lo, s21
	s_and_saveexec_b32 s0, s1
; %bb.19:                               ;   in Loop: Header=BB2_4 Depth=2
	v_xor_b32_e32 v11, 0x80000000, v11
; %bb.20:                               ; %Flow88
                                        ;   in Loop: Header=BB2_4 Depth=2
	s_or_b32 exec_lo, exec_lo, s0
.LBB2_21:                               ;   in Loop: Header=BB2_4 Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cvt_f64_f32_e32 v[10:11], v11
	s_add_i32 s20, s20, 1
	v_add_f64 v[10:11], v[3:4], v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f32_f64_e32 v10, v[10:11]
	v_trunc_f32_e32 v10, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_i32_f32_e32 v10, v10
	v_add_nc_u32_e32 v10, s19, v10
	s_add_i32 s19, s19, s5
	s_cmp_eq_u32 s4, s20
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v11, 31, v10
	v_lshlrev_b64 v[10:11], 2, v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v10, vcc_lo, s8, v10
	v_add_co_ci_u32_e32 v11, vcc_lo, s9, v11, vcc_lo
	global_load_b32 v10, v[10:11], off
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v2, v10, v2
	global_store_b32 v[5:6], v2, off
	s_cbranch_scc0 .LBB2_4
.LBB2_22:                               ; %._crit_edge
                                        ;   in Loop: Header=BB2_2 Depth=1
	v_add_nc_u32_e32 v1, s16, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_le_u32_e32 vcc_lo, s7, v1
	s_or_b32 s14, vcc_lo, s14
	s_and_not1_b32 exec_lo, exec_lo, s14
	s_cbranch_execnz .LBB2_2
.LBB2_23:                               ; %._crit_edge70
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z24cudaBackprojectionKernalPfS_iii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 24
		.amdhsa_next_free_sgpr 32
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z24cudaBackprojectionKernalPfS_iii, .Lfunc_end2-_Z24cudaBackprojectionKernalPfS_iii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 2948
; NumSgprs: 34
; NumVgprs: 24
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 4
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 34
; NumVGPRsForWavesPerEU: 24
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z19cudaFrequencyKernalP15HIP_vector_typeIfLj2EEi
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z19cudaFrequencyKernalP15HIP_vector_typeIfLj2EEi.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     14
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z23cudaComplexToRealKernalP15HIP_vector_typeIfLj2EEPfi
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z23cudaComplexToRealKernalP15HIP_vector_typeIfLj2EEPfi.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     5
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z24cudaBackprojectionKernalPfS_iii
    .private_segment_fixed_size: 0
    .sgpr_count:     34
    .sgpr_spill_count: 0
    .symbol:         _Z24cudaBackprojectionKernalPfS_iii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     24
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
