
#include "cuda_runtime.h"
#include "device_launch_parameters.h"

#include <stdio.h>
#include <stdlib.h>
#include <math.h>

#define NUM 1024

cudaError_t addWithCuda(double *c, const double *a, const double *b, long size);
__device__ double test(int i);

__global__ void addKernel(double *c, const double *a, const double *b)
{
	int i = threadIdx.x;
	for (int j = 0; j < NUM; j++) {
		c[j] = test(i);
	}
}
__device__ double test(int i) {
	double tmp = (i - 9.9) * 3.1415926 * 3.1415926;
	double ret = sin(tmp);
	return ret;
}

int main()
{
    const double a[NUM] = { 1, 2, 3, 4, 5 };
    const double b[NUM] = { 10, 20, 30, 40, 50 };
	double c[NUM] = { 0 };

    // Add vectors in parallel.
	cudaEvent_t start, stop;
	cudaEventCreate(&start);
	cudaEventCreate(&stop);
	cudaEventRecord(start, 0);
    cudaError_t cudaStatus = addWithCuda(c, a, b, NUM);
	cudaEventRecord(stop, 0);
	//confirm that all things have been done before "stop event"
	cudaEventSynchronize(stop);
	float elapseTime;
	cudaEventElapsedTime(&elapseTime, start, stop);
	printf("Time for I/O : %.5f ms\n", elapseTime);
	printf("%.6f\n", c[2]);

    if (cudaStatus != cudaSuccess) {
        fprintf(stderr, "addWithCuda failed!");
        return 1;
    }

    // cudaDeviceReset must be called before exiting in order for profiling and
    // tracing tools such as Nsight and Visual Profiler to show complete traces.
    cudaStatus = cudaDeviceReset();
    if (cudaStatus != cudaSuccess) {
        fprintf(stderr, "cudaDeviceReset failed!");
        return 1;
    }
	system("pause");
    return 0;
}

// Helper function for using CUDA to add vectors in parallel.
cudaError_t addWithCuda(double *c, const double *a, const double *b, long size)
{
	double *dev_a = 0;
	double *dev_b = 0;
	double *dev_c = 0;
    cudaError_t cudaStatus;

    // Choose which GPU to run on, change this on a multi-GPU system.
    cudaStatus = cudaSetDevice(0);
    if (cudaStatus != cudaSuccess) {
        fprintf(stderr, "cudaSetDevice failed!  Do you have a CUDA-capable GPU installed?");
        goto Error;
    }

    // Allocate GPU buffers for three vectors (two input, one output)    .
    cudaStatus = cudaMalloc((void**)&dev_c, size * sizeof(double));
    if (cudaStatus != cudaSuccess) {
        fprintf(stderr, "cudaMalloc failed!");
        goto Error;
    }

    cudaStatus = cudaMalloc((void**)&dev_a, size * sizeof(double));
    if (cudaStatus != cudaSuccess) {
        fprintf(stderr, "cudaMalloc failed!");
        goto Error;
    }

    cudaStatus = cudaMalloc((void**)&dev_b, size * sizeof(double));
    if (cudaStatus != cudaSuccess) {
        fprintf(stderr, "cudaMalloc failed!");
        goto Error;
    }

    // Copy input vectors from host memory to GPU buffers.
    cudaStatus = cudaMemcpy(dev_a, a, size * sizeof(double), cudaMemcpyHostToDevice);
    if (cudaStatus != cudaSuccess) {
        fprintf(stderr, "cudaMemcpy failed!");
        goto Error;
    }

    cudaStatus = cudaMemcpy(dev_b, b, size * sizeof(double), cudaMemcpyHostToDevice);
    if (cudaStatus != cudaSuccess) {
        fprintf(stderr, "cudaMemcpy failed!");
        goto Error;
    }

    // Launch a kernel on the GPU with one thread for each element.
    addKernel<<<1, size>>>(dev_c, dev_a, dev_b);

    // Check for any errors launching the kernel
    cudaStatus = cudaGetLastError();
    if (cudaStatus != cudaSuccess) {
        fprintf(stderr, "addKernel launch failed: %s\n", cudaGetErrorString(cudaStatus));
        goto Error;
    }
    
    // cudaDeviceSynchronize waits for the kernel to finish, and returns
    // any errors encountered during the launch.
    cudaStatus = cudaDeviceSynchronize();
    if (cudaStatus != cudaSuccess) {
        fprintf(stderr, "cudaDeviceSynchronize returned error code %d after launching addKernel!\n", cudaStatus);
        goto Error;
    }

    // Copy output vector from GPU buffer to host memory.
    cudaStatus = cudaMemcpy(c, dev_c, size * sizeof(double), cudaMemcpyDeviceToHost);
    if (cudaStatus != cudaSuccess) {
        fprintf(stderr, "cudaMemcpy failed!");
        goto Error;
    }

Error:
    cudaFree(dev_c);
    cudaFree(dev_a);
    cudaFree(dev_b);
    
    return cudaStatus;
}

	.file	"tmpxft_002364f4_00000000-6_kernel.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2032:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2032:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z4testi
	.type	_Z4testi, @function
_Z4testi:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2027:
	.size	_Z4testi, .-_Z4testi
	.globl	_Z34__device_stub__Z9addKernelPdPKdS1_PdPKdS1_
	.type	_Z34__device_stub__Z9addKernelPdPKdS1_PdPKdS1_, @function
_Z34__device_stub__Z9addKernelPdPKdS1_PdPKdS1_:
.LFB2054:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L4
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z9addKernelPdPKdS1_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L4:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L6
	call	__stack_chk_fail@PLT
.L6:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2054:
	.size	_Z34__device_stub__Z9addKernelPdPKdS1_PdPKdS1_, .-_Z34__device_stub__Z9addKernelPdPKdS1_PdPKdS1_
	.globl	_Z9addKernelPdPKdS1_
	.type	_Z9addKernelPdPKdS1_, @function
_Z9addKernelPdPKdS1_:
.LFB2055:
	.cfi_startproc
	endbr64
	jmp	_Z34__device_stub__Z9addKernelPdPKdS1_PdPKdS1_
	.cfi_endproc
.LFE2055:
	.size	_Z9addKernelPdPKdS1_, .-_Z9addKernelPdPKdS1_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"cudaSetDevice failed!  Do you have a CUDA-capable GPU installed?"
.LC1:
	.string	"cudaMalloc failed!"
.LC2:
	.string	"cudaMemcpy failed!"
.LC3:
	.string	"addKernel launch failed: %s\n"
.LC4:
	.string	"cudaDeviceSynchronize returned error code %d after launching addKernel!\n"
	.text
	.globl	_Z11addWithCudaPdPKdS1_l
	.type	_Z11addWithCudaPdPKdS1_l, @function
_Z11addWithCudaPdPKdS1_l:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rsi, %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rdx, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rdi, %r13
	xorl	%edi, %edi
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rcx, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	xorl	%eax, %eax
	movq	%rax, 8(%rsp)
	movq	%rax, 16(%rsp)
	movq	%rax, 24(%rsp)
	call	cudaSetDevice@PLT
	leaq	.LC0(%rip), %rdx
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L25
	leaq	0(,%r12,8), %rbp
	leaq	24(%rsp), %rdi
	movq	%rbp, %rsi
	call	cudaMalloc@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L28
	leaq	8(%rsp), %rdi
	movq	%rbp, %rsi
	call	cudaMalloc@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L28
	leaq	16(%rsp), %rdi
	movq	%rbp, %rsi
	call	cudaMalloc@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	je	.L15
.L28:
	leaq	.LC1(%rip), %rdx
	jmp	.L25
.L15:
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rdx
	movq	%r15, %rsi
	call	cudaMemcpy@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L26
	movq	16(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rdx
	movq	%r14, %rsi
	call	cudaMemcpy@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L26
	movl	%r12d, 44(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %esi
	movabsq	$4294967297, %rdi
	movq	%rdi, 48(%rsp)
	movl	52(%rsp), %ecx
	movq	44(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L18
	movq	16(%rsp), %rdx
	movq	8(%rsp), %rsi
	movq	24(%rsp), %rdi
	call	_Z34__device_stub__Z9addKernelPdPKdS1_PdPKdS1_
.L18:
	call	cudaGetLastError@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	je	.L19
	movl	%eax, %edi
	call	cudaGetErrorString@PLT
	movq	stderr(%rip), %rdi
	movl	$2, %esi
	leaq	.LC3(%rip), %rdx
	movq	%rax, %rcx
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	jmp	.L12
.L19:
	call	cudaDeviceSynchronize@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	je	.L20
	movq	stderr(%rip), %rdi
	movl	%eax, %ecx
	movl	$2, %esi
	xorl	%eax, %eax
	leaq	.LC4(%rip), %rdx
	call	__fprintf_chk@PLT
	jmp	.L12
.L20:
	movq	24(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbp, %rdx
	movq	%r13, %rdi
	call	cudaMemcpy@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	je	.L12
.L26:
	leaq	.LC2(%rip), %rdx
.L25:
	movq	stderr(%rip), %rdi
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
.L12:
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L23
	call	__stack_chk_fail@PLT
.L23:
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	movl	%ebx, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2029:
	.size	_Z11addWithCudaPdPKdS1_l, .-_Z11addWithCudaPdPKdS1_l
	.section	.rodata.str1.1
.LC15:
	.string	"Time for I/O : %.5f ms\n"
.LC16:
	.string	"%.6f\n"
.LC17:
	.string	"addWithCuda failed!"
.LC18:
	.string	"cudaDeviceReset failed!"
.LC19:
	.string	"pause"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	-24576(%rsp), %r11
	.cfi_def_cfa 11, 24592
.LPSRL0:
	subq	$4096, %rsp
	orq	$0, (%rsp)
	cmpq	%r11, %rsp
	jne	.LPSRL0
	.cfi_def_cfa_register 7
	subq	$32, %rsp
	.cfi_def_cfa_offset 24624
	movq	.LC5(%rip), %rbx
	movl	$2048, %ecx
	movq	.LC12(%rip), %rdx
	movq	%fs:40, %rax
	movq	%rax, 24600(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rdi
	rep stosl
	movq	%rbx, 24(%rsp)
	movq	.LC6(%rip), %rbx
	leaq	8216(%rsp), %rdi
	movq	.LC8(%rip), %rcx
	movq	%rbx, 32(%rsp)
	movq	.LC7(%rip), %rbx
	movq	%rcx, 48(%rsp)
	movl	$2048, %ecx
	rep stosl
	movq	%rbx, 40(%rsp)
	movq	.LC10(%rip), %rcx
	leaq	16408(%rsp), %rdi
	movq	.LC9(%rip), %rbx
	movq	%rdx, 8232(%rsp)
	movq	%rcx, 8216(%rsp)
	movq	.LC13(%rip), %rcx
	movq	%rbx, 56(%rsp)
	movq	.LC11(%rip), %rbx
	movq	%rcx, 8240(%rsp)
	movl	$2048, %ecx
	rep stosl
	movq	%rbx, 8224(%rsp)
	leaq	8(%rsp), %rdi
	movq	.LC14(%rip), %rbx
	movq	%rbx, 8248(%rsp)
	call	cudaEventCreate@PLT
	leaq	16(%rsp), %rdi
	call	cudaEventCreate@PLT
	movq	8(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movl	$1024, %ecx
	leaq	8216(%rsp), %rdx
	leaq	24(%rsp), %rsi
	leaq	16408(%rsp), %rdi
	call	_Z11addWithCudaPdPKdS1_l
	movq	16(%rsp), %rdi
	xorl	%esi, %esi
	movl	%eax, %ebx
	call	cudaEventRecord@PLT
	movq	16(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	16(%rsp), %rdx
	movq	8(%rsp), %rsi
	leaq	4(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	leaq	.LC15(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	4(%rsp), %xmm0
	call	__printf_chk@PLT
	movl	$2, %edi
	movb	$1, %al
	movsd	16424(%rsp), %xmm0
	leaq	.LC16(%rip), %rsi
	call	__printf_chk@PLT
	leaq	.LC17(%rip), %rdx
	testl	%ebx, %ebx
	jne	.L36
	call	cudaDeviceReset@PLT
	testl	%eax, %eax
	je	.L32
	leaq	.LC18(%rip), %rdx
.L36:
	movq	stderr(%rip), %rdi
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	movl	$1, %eax
	jmp	.L29
.L32:
	leaq	.LC19(%rip), %rdi
	call	system@PLT
	xorl	%eax, %eax
.L29:
	movq	24600(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L34
	call	__stack_chk_fail@PLT
.L34:
	addq	$24608, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	main, .-main
	.section	.rodata.str1.1
.LC20:
	.string	"_Z9addKernelPdPKdS1_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2057:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC20(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z9addKernelPdPKdS1_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2057:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC5:
	.long	0
	.long	1072693248
	.align 8
.LC6:
	.long	0
	.long	1073741824
	.align 8
.LC7:
	.long	0
	.long	1074266112
	.align 8
.LC8:
	.long	0
	.long	1074790400
	.align 8
.LC9:
	.long	0
	.long	1075052544
	.align 8
.LC10:
	.long	0
	.long	1076101120
	.align 8
.LC11:
	.long	0
	.long	1077149696
	.align 8
.LC12:
	.long	0
	.long	1077805056
	.align 8
.LC13:
	.long	0
	.long	1078198272
	.align 8
.LC14:
	.long	0
	.long	1078525952
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include "hip/hip_runtime.h"


#include <stdio.h>
#include <stdlib.h>
#include <math.h>

#define NUM 1024

hipError_t addWithCuda(double *c, const double *a, const double *b, long size);
__device__ double test(int i);

__global__ void addKernel(double *c, const double *a, const double *b)
{
	int i = threadIdx.x;
	for (int j = 0; j < NUM; j++) {
		c[j] = test(i);
	}
}
__device__ double test(int i) {
	double tmp = (i - 9.9) * 3.1415926 * 3.1415926;
	double ret = sin(tmp);
	return ret;
}

int main()
{
    const double a[NUM] = { 1, 2, 3, 4, 5 };
    const double b[NUM] = { 10, 20, 30, 40, 50 };
	double c[NUM] = { 0 };

    // Add vectors in parallel.
	hipEvent_t start, stop;
	hipEventCreate(&start);
	hipEventCreate(&stop);
	hipEventRecord(start, 0);
    hipError_t cudaStatus = addWithCuda(c, a, b, NUM);
	hipEventRecord(stop, 0);
	//confirm that all things have been done before "stop event"
	hipEventSynchronize(stop);
	float elapseTime;
	hipEventElapsedTime(&elapseTime, start, stop);
	printf("Time for I/O : %.5f ms\n", elapseTime);
	printf("%.6f\n", c[2]);

    if (cudaStatus != hipSuccess) {
        fprintf(stderr, "addWithCuda failed!");
        return 1;
    }

    // cudaDeviceReset must be called before exiting in order for profiling and
    // tracing tools such as Nsight and Visual Profiler to show complete traces.
    cudaStatus = hipDeviceReset();
    if (cudaStatus != hipSuccess) {
        fprintf(stderr, "hipDeviceReset failed!");
        return 1;
    }
	system("pause");
    return 0;
}

// Helper function for using CUDA to add vectors in parallel.
hipError_t addWithCuda(double *c, const double *a, const double *b, long size)
{
	double *dev_a = 0;
	double *dev_b = 0;
	double *dev_c = 0;
    hipError_t cudaStatus;

    // Choose which GPU to run on, change this on a multi-GPU system.
    cudaStatus = hipSetDevice(0);
    if (cudaStatus != hipSuccess) {
        fprintf(stderr, "hipSetDevice failed!  Do you have a CUDA-capable GPU installed?");
        goto Error;
    }

    // Allocate GPU buffers for three vectors (two input, one output)    .
    cudaStatus = hipMalloc((void**)&dev_c, size * sizeof(double));
    if (cudaStatus != hipSuccess) {
        fprintf(stderr, "hipMalloc failed!");
        goto Error;
    }

    cudaStatus = hipMalloc((void**)&dev_a, size * sizeof(double));
    if (cudaStatus != hipSuccess) {
        fprintf(stderr, "hipMalloc failed!");
        goto Error;
    }

    cudaStatus = hipMalloc((void**)&dev_b, size * sizeof(double));
    if (cudaStatus != hipSuccess) {
        fprintf(stderr, "hipMalloc failed!");
        goto Error;
    }

    // Copy input vectors from host memory to GPU buffers.
    cudaStatus = hipMemcpy(dev_a, a, size * sizeof(double), hipMemcpyHostToDevice);
    if (cudaStatus != hipSuccess) {
        fprintf(stderr, "hipMemcpy failed!");
        goto Error;
    }

    cudaStatus = hipMemcpy(dev_b, b, size * sizeof(double), hipMemcpyHostToDevice);
    if (cudaStatus != hipSuccess) {
        fprintf(stderr, "hipMemcpy failed!");
        goto Error;
    }

    // Launch a kernel on the GPU with one thread for each element.
    addKernel<<<1, size>>>(dev_c, dev_a, dev_b);

    // Check for any errors launching the kernel
    cudaStatus = hipGetLastError();
    if (cudaStatus != hipSuccess) {
        fprintf(stderr, "addKernel launch failed: %s\n", hipGetErrorString(cudaStatus));
        goto Error;
    }
    
    // cudaDeviceSynchronize waits for the kernel to finish, and returns
    // any errors encountered during the launch.
    cudaStatus = hipDeviceSynchronize();
    if (cudaStatus != hipSuccess) {
        fprintf(stderr, "hipDeviceSynchronize returned error code %d after launching addKernel!\n", cudaStatus);
        goto Error;
    }

    // Copy output vector from GPU buffer to host memory.
    cudaStatus = hipMemcpy(c, dev_c, size * sizeof(double), hipMemcpyDeviceToHost);
    if (cudaStatus != hipSuccess) {
        fprintf(stderr, "hipMemcpy failed!");
        goto Error;
    }

Error:
    hipFree(dev_c);
    hipFree(dev_a);
    hipFree(dev_b);
    
    return cudaStatus;
}

	.text
	.file	"kernel.hip"
	.globl	_Z24__device_stub__addKernelPdPKdS1_ # -- Begin function _Z24__device_stub__addKernelPdPKdS1_
	.type	_Z24__device_stub__addKernelPdPKdS1_,@function
_Z24__device_stub__addKernelPdPKdS1_:   # @_Z24__device_stub__addKernelPdPKdS1_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9addKernelPdPKdS1_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z24__device_stub__addKernelPdPKdS1_, .Lfunc_end0-_Z24__device_stub__addKernelPdPKdS1_
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$24616, %rsp                    # imm = 0x6028
	.cfi_def_cfa_offset 24656
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	leaq	8256(%rsp), %rbx
	movl	$8160, %edx                     # imm = 0x1FE0
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	memset@PLT
	movabsq	$4607182418800017408, %rax      # imm = 0x3FF0000000000000
	movq	%rax, -32(%rbx)
	movabsq	$4611686018427387904, %rax      # imm = 0x4000000000000000
	movq	%rax, -24(%rbx)
	movabsq	$4613937818241073152, %rax      # imm = 0x4008000000000000
	movq	%rax, -16(%rbx)
	movabsq	$4616189618054758400, %rax      # imm = 0x4010000000000000
	movq	%rax, -8(%rbx)
	movabsq	$4617315517961601024, %rax      # imm = 0x4014000000000000
	movq	%rax, (%rbx)
	leaq	64(%rsp), %rbx
	movl	$8160, %edx                     # imm = 0x1FE0
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	memset@PLT
	movabsq	$4621819117588971520, %rax      # imm = 0x4024000000000000
	movq	%rax, -32(%rbx)
	movabsq	$4626322717216342016, %rax      # imm = 0x4034000000000000
	movq	%rax, -24(%rbx)
	movabsq	$4629137466983448576, %rax      # imm = 0x403E000000000000
	movq	%rax, -16(%rbx)
	movabsq	$4630826316843712512, %rax      # imm = 0x4044000000000000
	movq	%rax, -8(%rbx)
	movabsq	$4632233691727265792, %rax      # imm = 0x4049000000000000
	movq	%rax, (%rbx)
	leaq	16416(%rsp), %rbx
	movl	$8192, %edx                     # imm = 0x2000
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	memset@PLT
	leaq	24(%rsp), %r14
	movq	%r14, %rdi
	callq	hipEventCreate
	leaq	16(%rsp), %r15
	movq	%r15, %rdi
	callq	hipEventCreate
	movq	(%r14), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	leaq	8224(%rsp), %rsi
	leaq	32(%rsp), %rdx
	movl	$1024, %ecx                     # imm = 0x400
	movq	%rbx, %rdi
	callq	_Z11addWithCudaPdPKdS1_l
	movl	%eax, %ebp
	movq	(%r15), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	(%r15), %rdi
	callq	hipEventSynchronize
	movq	(%r14), %rsi
	movq	(%r15), %rdx
	leaq	12(%rsp), %r14
	movq	%r14, %rdi
	callq	hipEventElapsedTime
	cvtss2sd	(%r14), %xmm0
	movl	$.L.str, %edi
	movb	$1, %al
	callq	printf
	movsd	16(%rbx), %xmm0                 # xmm0 = mem[0],zero
	movl	$.L.str.1, %edi
	movb	$1, %al
	callq	printf
	testl	%ebp, %ebp
	jne	.LBB1_1
# %bb.3:
	callq	hipDeviceReset
	testl	%eax, %eax
	jne	.LBB1_4
# %bb.5:
	movl	$.L.str.4, %edi
	callq	system
	xorl	%eax, %eax
.LBB1_6:
	addq	$24616, %rsp                    # imm = 0x6028
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB1_1:
	.cfi_def_cfa_offset 24656
	movq	stderr(%rip), %rcx
	movl	$.L.str.2, %edi
	movl	$19, %esi
	jmp	.LBB1_2
.LBB1_4:
	movq	stderr(%rip), %rcx
	movl	$.L.str.3, %edi
	movl	$22, %esi
.LBB1_2:
	movl	$1, %edx
	callq	fwrite@PLT
	movl	$1, %eax
	jmp	.LBB1_6
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.globl	_Z11addWithCudaPdPKdS1_l        # -- Begin function _Z11addWithCudaPdPKdS1_l
	.type	_Z11addWithCudaPdPKdS1_l,@function
_Z11addWithCudaPdPKdS1_l:               # @_Z11addWithCudaPdPKdS1_l
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rcx, %r12
	movq	%rdx, %r13
	movq	%rsi, %rbp
	movq	%rdi, %r14
	xorl	%eax, %eax
	movq	%rax, 16(%rsp)
	movq	%rax, 8(%rsp)
	movq	%rax, (%rsp)
	xorl	%edi, %edi
	callq	hipSetDevice
	testl	%eax, %eax
	jne	.LBB2_1
# %bb.2:
	leaq	(,%r12,8), %r15
	movq	%rsp, %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB2_3
# %bb.6:
	leaq	16(%rsp), %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB2_3
# %bb.7:
	leaq	8(%rsp), %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB2_3
# %bb.8:
	movq	16(%rsp), %rdi
	movq	%rbp, %rsi
	movq	%r15, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB2_9
# %bb.10:
	movq	8(%rsp), %rdi
	movq	%r13, %rsi
	movq	%r15, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB2_9
# %bb.11:
	movl	%r12d, %edx
	btsq	$32, %rdx
	movabsq	$4294967296, %rdi               # imm = 0x100000000
	orq	$1, %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_13
# %bb.12:
	movq	(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
	callq	_Z24__device_stub__addKernelPdPKdS1_
.LBB2_13:
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB2_14
# %bb.15:
	callq	hipDeviceSynchronize
	testl	%eax, %eax
	jne	.LBB2_16
# %bb.17:
	movq	(%rsp), %rsi
	movq	%r14, %rdi
	movq	%r15, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	xorl	%ebx, %ebx
	testl	%eax, %eax
	je	.LBB2_19
# %bb.18:
	movl	%eax, %ebp
	movq	stderr(%rip), %rcx
	movl	$.L.str.7, %edi
	movl	$17, %esi
	movl	$1, %edx
	callq	fwrite@PLT
	movl	%ebp, %ebx
	jmp	.LBB2_19
.LBB2_3:
	movl	%eax, %ebx
	movq	stderr(%rip), %rcx
	movl	$.L.str.6, %edi
	jmp	.LBB2_4
.LBB2_9:
	movl	%eax, %ebx
	movq	stderr(%rip), %rcx
	movl	$.L.str.7, %edi
.LBB2_4:
	movl	$17, %esi
.LBB2_5:
	movl	$1, %edx
	callq	fwrite@PLT
.LBB2_19:
	movq	(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movl	%ebx, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB2_1:
	.cfi_def_cfa_offset 80
	movl	%eax, %ebx
	movq	stderr(%rip), %rcx
	movl	$.L.str.5, %edi
	movl	$63, %esi
	jmp	.LBB2_5
.LBB2_14:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.8, %esi
	movq	%r14, %rdi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	fprintf
	jmp	.LBB2_19
.LBB2_16:
	movl	%eax, %ebx
	movq	stderr(%rip), %rdi
	movl	$.L.str.9, %esi
	movl	%eax, %edx
	xorl	%eax, %eax
	callq	fprintf
	jmp	.LBB2_19
.Lfunc_end2:
	.size	_Z11addWithCudaPdPKdS1_l, .Lfunc_end2-_Z11addWithCudaPdPKdS1_l
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9addKernelPdPKdS1_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z9addKernelPdPKdS1_,@object    # @_Z9addKernelPdPKdS1_
	.section	.rodata,"a",@progbits
	.globl	_Z9addKernelPdPKdS1_
	.p2align	3, 0x0
_Z9addKernelPdPKdS1_:
	.quad	_Z24__device_stub__addKernelPdPKdS1_
	.size	_Z9addKernelPdPKdS1_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Time for I/O : %.5f ms\n"
	.size	.L.str, 24

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"%.6f\n"
	.size	.L.str.1, 6

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"addWithCuda failed!"
	.size	.L.str.2, 20

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"hipDeviceReset failed!"
	.size	.L.str.3, 23

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"pause"
	.size	.L.str.4, 6

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"hipSetDevice failed!  Do you have a CUDA-capable GPU installed?"
	.size	.L.str.5, 64

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"hipMalloc failed!"
	.size	.L.str.6, 18

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"hipMemcpy failed!"
	.size	.L.str.7, 18

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"addKernel launch failed: %s\n"
	.size	.L.str.8, 29

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"hipDeviceSynchronize returned error code %d after launching addKernel!\n"
	.size	.L.str.9, 72

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z9addKernelPdPKdS1_"
	.size	.L__unnamed_1, 21

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z24__device_stub__addKernelPdPKdS1_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z9addKernelPdPKdS1_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z9addKernelPdPKdS1_    ; -- Begin function _Z9addKernelPdPKdS1_
	.globl	_Z9addKernelPdPKdS1_
	.p2align	8
	.type	_Z9addKernelPdPKdS1_,@function
_Z9addKernelPdPKdS1_:                   ; @_Z9addKernelPdPKdS1_
; %bb.0:
	v_cvt_f64_i32_e32 v[0:1], v0
	s_mov_b32 s2, 0xcccccccd
	s_mov_b32 s3, 0xc023cccc
	s_mov_b32 s4, 0x6dc9c883
	s_mov_b32 s5, 0x3fe45f30
	s_mov_b32 s7, 0xbc91a626
	s_mov_b32 s6, 0x33145c00
	s_load_b64 s[0:1], s[0:1], 0x0
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[0:1], v[0:1], s[2:3]
	s_mov_b32 s2, 0x4d12d84a
	s_mov_b32 s3, 0x400921fb
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mul_f64 v[0:1], v[0:1], s[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mul_f64 v[2:3], v[0:1], s[2:3]
	s_mov_b32 s3, 0x3ff921fb
	v_ldexp_f64 v[0:1], |v[2:3]|, 0xffffff80
	v_cmp_le_f64_e64 vcc_lo, 0x7b000000, |v[2:3]|
	v_trig_preop_f64 v[4:5], |v[2:3]|, 0
	v_and_b32_e32 v6, 0x7fffffff, v3
	v_trig_preop_f64 v[16:17], |v[2:3]|, 2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v7, v6, v1, vcc_lo
	v_cndmask_b32_e32 v6, v2, v0, vcc_lo
	v_trig_preop_f64 v[0:1], |v[2:3]|, 1
	v_mul_f64 v[8:9], v[4:5], v[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[10:11], v[0:1], v[6:7]
	v_fma_f64 v[4:5], v[4:5], v[6:7], -v[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[24:25], v[0:1], v[6:7], -v[10:11]
	v_add_f64 v[12:13], v[10:11], v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[14:15], v[12:13], -v[10:11]
	v_add_f64 v[20:21], v[8:9], v[12:13]
	v_add_f64 v[18:19], v[12:13], -v[14:15]
	v_add_f64 v[0:1], v[4:5], -v[14:15]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[8:9], v[20:21], -v[8:9]
	v_add_f64 v[4:5], v[10:11], -v[18:19]
	v_ldexp_f64 v[10:11], v[20:21], -2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[8:9], v[12:13], -v[8:9]
	v_add_f64 v[4:5], v[0:1], v[4:5]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fract_f64_e32 v[0:1], v[10:11]
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[10:11]|
	v_cndmask_b32_e32 v0, 0, v0, vcc_lo
	v_mul_f64 v[22:23], v[16:17], v[6:7]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v1, 0, v1, vcc_lo
	v_ldexp_f64 v[12:13], v[0:1], 2
	v_mov_b32_e32 v0, 0
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[14:15], v[22:23], v[24:25]
	v_fma_f64 v[6:7], v[16:17], v[6:7], -v[22:23]
	v_add_f64 v[10:11], v[14:15], v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[18:19], v[8:9], v[10:11]
	v_add_f64 v[26:27], v[10:11], -v[14:15]
	v_add_f64 v[20:21], v[18:19], v[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[32:33], v[10:11], -v[26:27]
	v_add_f64 v[4:5], v[4:5], -v[26:27]
	v_add_f64 v[8:9], v[18:19], -v[8:9]
	v_cmp_gt_f64_e32 vcc_lo, 0, v[20:21]
	v_add_f64 v[20:21], v[14:15], -v[22:23]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[8:9], v[10:11], -v[8:9]
	v_cndmask_b32_e64 v1, 0, 0x40100000, vcc_lo
	v_add_f64 v[30:31], v[14:15], -v[20:21]
	v_add_f64 v[20:21], v[24:25], -v[20:21]
	v_add_f64 v[14:15], v[14:15], -v[32:33]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[12:13], v[12:13], v[0:1]
	v_add_f64 v[24:25], v[22:23], -v[30:31]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[4:5], v[4:5], v[14:15]
	v_add_f64 v[28:29], v[18:19], v[12:13]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[20:21], v[20:21], v[24:25]
	v_cvt_i32_f64_e32 v1, v[28:29]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[4:5], v[20:21], v[4:5]
	v_cvt_f64_i32_e32 v[26:27], v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[4:5], v[6:7], v[4:5]
	v_add_f64 v[12:13], v[12:13], -v[26:27]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[4:5], v[8:9], v[4:5]
	v_add_f64 v[14:15], v[18:19], v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[6:7], v[14:15], -v[12:13]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[14:15]
	v_add_f64 v[6:7], v[18:19], -v[6:7]
	v_add_co_ci_u32_e64 v26, s2, 0, v1, vcc_lo
	v_cndmask_b32_e64 v1, 0, 0x3ff00000, vcc_lo
	s_mov_b32 s2, 0x54442d18
	v_cmp_gt_f64_e64 vcc_lo, 0x41d00000, |v[2:3]|
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_f64 v[8:9], v[14:15], -v[0:1]
	v_mul_f64 v[14:15], |v[2:3]|, s[4:5]
	s_mov_b32 s4, 0x33145c07
	s_mov_b32 s5, 0x3c91a626
	v_add_f64 v[4:5], v[4:5], v[6:7]
	v_add_f64 v[6:7], v[8:9], v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[10:11], v[6:7], s[2:3]
	v_add_f64 v[8:9], v[6:7], -v[8:9]
	v_fma_f64 v[12:13], v[6:7], s[2:3], -v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[4:5], v[4:5], -v[8:9]
	v_rndne_f64_e32 v[8:9], v[14:15]
	v_fma_f64 v[6:7], v[6:7], s[4:5], v[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_i32_f64_e32 v1, v[8:9]
	v_fma_f64 v[4:5], v[4:5], s[2:3], v[6:7]
	s_mov_b32 s3, 0xbff921fb
	v_mul_f64 v[6:7], v[8:9], s[6:7]
	v_fma_f64 v[12:13], v[8:9], s[2:3], |v[2:3]|
	s_mov_b32 s2, 0x252049c0
	s_mov_b32 s3, 0xb97b839a
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v1, v26, v1, vcc_lo
	v_add_f64 v[14:15], v[12:13], v[6:7]
	v_fma_f64 v[16:17], v[8:9], s[6:7], v[12:13]
	s_mov_b32 s7, s5
	s_mov_b32 s4, 0xf9a43bb8
	s_mov_b32 s5, 0x3de5e0b2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[12:13], v[12:13], -v[14:15]
	v_add_f64 v[14:15], v[14:15], -v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_add_f64 v[12:13], v[12:13], v[6:7]
	v_fma_f64 v[6:7], v[8:9], s[6:7], v[6:7]
	s_mov_b32 s6, 0x796cde01
	s_mov_b32 s7, 0x3ec71de3
	v_add_f64 v[12:13], v[14:15], v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[6:7], v[12:13], -v[6:7]
	v_add_f64 v[12:13], v[10:11], v[4:5]
	v_fma_f64 v[6:7], v[8:9], s[2:3], v[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_f64 v[10:11], v[12:13], -v[10:11]
	s_mov_b32 s2, 0xb42fdfa7
	s_mov_b32 s3, 0xbe5ae600
	v_and_b32_e32 v8, 1, v1
	v_lshlrev_b32_e32 v1, 30, v1
	v_xor_b32_e32 v1, v1, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_and_b32_e32 v1, 0x80000000, v1
	v_add_f64 v[14:15], v[16:17], v[6:7]
	v_add_f64 v[4:5], v[4:5], -v[10:11]
	v_dual_cndmask_b32 v11, v13, v15 :: v_dual_cndmask_b32 v10, v12, v14
	v_add_f64 v[16:17], v[14:15], -v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[12:13], v[10:11], v[10:11]
	v_add_f64 v[6:7], v[6:7], -v[16:17]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[14:15], v[12:13], s[4:5], s[2:3]
	s_mov_b32 s2, 0x9037ab78
	s_mov_b32 s4, 0x46cc5e42
	s_mov_b32 s3, 0x3e21eeb6
	s_mov_b32 s5, 0xbda907db
	v_mul_f64 v[18:19], v[12:13], 0.5
	v_fma_f64 v[16:17], v[12:13], s[4:5], s[2:3]
	s_mov_b32 s2, 0xa17f65f6
	s_mov_b32 s4, 0x19e83e5c
	s_mov_b32 s3, 0xbe927e4f
	s_mov_b32 s5, 0xbf2a01a0
	v_mul_f64 v[22:23], v[10:11], -v[12:13]
	v_dual_cndmask_b32 v5, v5, v7 :: v_dual_cndmask_b32 v4, v4, v6
	v_cmp_eq_u32_e32 vcc_lo, 0, v8
	v_fma_f64 v[14:15], v[12:13], v[14:15], s[6:7]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_4)
	v_mul_f64 v[6:7], v[4:5], 0.5
	v_add_f64 v[20:21], -v[18:19], 1.0
	v_fma_f64 v[16:17], v[12:13], v[16:17], s[2:3]
	s_mov_b32 s2, 0x19f4ec90
	s_mov_b32 s3, 0x3efa01a0
	v_fma_f64 v[14:15], v[12:13], v[14:15], s[4:5]
	s_mov_b32 s4, 0x11110bb3
	s_mov_b32 s5, 0x3f811111
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[24:25], -v[20:21], 1.0
	v_fma_f64 v[16:17], v[12:13], v[16:17], s[2:3]
	s_mov_b32 s2, 0x16c16967
	s_mov_b32 s3, 0xbf56c16c
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[14:15], v[12:13], v[14:15], s[4:5]
	v_add_f64 v[18:19], v[24:25], -v[18:19]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[16:17], v[12:13], v[16:17], s[2:3]
	s_mov_b32 s3, 0x3fa55555
	s_mov_b32 s2, 0x55555555
	v_fma_f64 v[6:7], v[22:23], v[14:15], v[6:7]
	v_mul_f64 v[14:15], v[12:13], v[12:13]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[18:19], v[10:11], -v[4:5], v[18:19]
	v_fma_f64 v[16:17], v[12:13], v[16:17], s[2:3]
	s_mov_b32 s3, 0xbfc55555
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[4:5], v[12:13], v[6:7], -v[4:5]
	v_fma_f64 v[6:7], v[14:15], v[16:17], v[18:19]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[4:5], v[22:23], s[2:3], v[4:5]
	v_cmp_class_f64_e64 s2, v[2:3], 0x1f8
	v_add_f64 v[6:7], v[20:21], v[6:7]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[4:5], v[10:11], -v[4:5]
	v_cndmask_b32_e32 v4, v6, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v2, v7, v5, vcc_lo
	v_xor_b32_e32 v2, v2, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v1, 0, v4, s2
	v_cndmask_b32_e64 v2, 0x7ff80000, v2, s2
	s_mov_b64 s[2:3], 0
.LBB0_1:                                ; %_Z4testi.exit
                                        ; =>This Inner Loop Header: Depth=1
	s_waitcnt lgkmcnt(0)
	s_add_u32 s4, s0, s2
	s_addc_u32 s5, s1, s3
	s_add_u32 s2, s2, 8
	s_addc_u32 s3, s3, 0
	s_cmpk_eq_i32 s2, 0x2000
	global_store_b64 v0, v[1:2], s[4:5]
	s_cbranch_scc0 .LBB0_1
; %bb.2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9addKernelPdPKdS1_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 24
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 34
		.amdhsa_next_free_sgpr 8
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z9addKernelPdPKdS1_, .Lfunc_end0-_Z9addKernelPdPKdS1_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1564
; NumSgprs: 10
; NumVgprs: 34
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 1
; VGPRBlocks: 4
; NumSGPRsForWavesPerEU: 10
; NumVGPRsForWavesPerEU: 34
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 24
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z9addKernelPdPKdS1_
    .private_segment_fixed_size: 0
    .sgpr_count:     10
    .sgpr_spill_count: 0
    .symbol:         _Z9addKernelPdPKdS1_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     34
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
