__global__
void iterateKernel(int w, int h, int maxIterations, double xOrigin, double yOrigin, double zoomFactor, int* result) {
    int index = blockIdx.x * blockDim.x + threadIdx.x;
    int stride = blockDim.x * gridDim.x;

    for(int p = index; p < w * h; p += stride) {
        // deliniarize
        int i = p / w;
        int j = p % w;

        // convert to complex number
        double cx = xOrigin - (2 / zoomFactor) * (1 - 2 * ((double) j / w));
        double cy = yOrigin - (2 / zoomFactor) * (1 - 2 * ((double) (i+(w-h)/2) / w));

        // do the iterations
        double zx = cx;
        double zy = cy;
        double tx;
        double ty;
        bool inMandelbrot = true;
        for(int k = 0; k < maxIterations; ++ k)
        {
            if(zx * zx + zy * zy > 4) {
                result[i*w+j] = 255 * (1 - (double) k / maxIterations);
                inMandelbrot = false;
                break;
            }
            tx = zx * zx - zy * zy + cx;
            ty = 2 * zx * zy + cy;
            zx = tx;
            zy = ty;
        }
        if(inMandelbrot)
            result[i*w+j] = 0;
    }
}

extern "C"
int* iterateGPU(int w, int h, int maxIterations, double xOrigin, double yOrigin, double zoomFactor) {
    int* resultOnGPU;
    cudaMalloc(&resultOnGPU, w * h * sizeof(int));

    cudaDeviceProp deviceProp;
    cudaGetDeviceProperties(&deviceProp, 0);
    int blockSize = deviceProp.maxThreadsPerBlock;
    int numBlocks = (w * h - 1) / blockSize + 1;

    iterateKernel<<<numBlocks, blockSize>>>(w, h, maxIterations, xOrigin, yOrigin, zoomFactor, resultOnGPU);
    cudaDeviceSynchronize();

    auto result = (int*) malloc(w * h * sizeof(int));
    cudaMemcpy(result, resultOnGPU, w * h * sizeof(int), cudaMemcpyDeviceToHost);
    cudaFree(resultOnGPU);

    return result;
}

	.file	"tmpxft_0025a4b7_00000000-6_iterate.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2011:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2011:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z39__device_stub__Z13iterateKerneliiidddPiiiidddPi
	.type	_Z39__device_stub__Z13iterateKerneliiidddPiiiidddPi, @function
_Z39__device_stub__Z13iterateKerneliiidddPiiiidddPi:
.LFB2033:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movl	%edi, 44(%rsp)
	leaq	64(%rsp), %rdi
	movl	%esi, 40(%rsp)
	leaq	76(%rsp), %rsi
	movl	%edx, 36(%rsp)
	leaq	48(%rsp), %rdx
	movq	%rcx, (%rsp)
	leaq	56(%rsp), %rcx
	movsd	%xmm0, 24(%rsp)
	movsd	%xmm1, 16(%rsp)
	movsd	%xmm2, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	44(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	36(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 152(%rsp)
	movq	%rsp, %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	56(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z13iterateKerneliiidddPi(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 208
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L2:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2033:
	.size	_Z39__device_stub__Z13iterateKerneliiidddPiiiidddPi, .-_Z39__device_stub__Z13iterateKerneliiidddPiiiidddPi
	.globl	_Z13iterateKerneliiidddPi
	.type	_Z13iterateKerneliiidddPi, @function
_Z13iterateKerneliiidddPi:
.LFB2034:
	.cfi_startproc
	endbr64
	jmp	_Z39__device_stub__Z13iterateKerneliiidddPiiiidddPi
	.cfi_endproc
.LFE2034:
	.size	_Z13iterateKerneliiidddPi, .-_Z13iterateKerneliiidddPi
	.globl	iterateGPU
	.type	iterateGPU, @function
iterateGPU:
.LFB2008:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movl	%esi, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	movl	%edi, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	movl	%edx, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	movl	%edi, %ebx
	imull	%esi, %ebx
	subq	$1104, %rsp
	.cfi_def_cfa_offset 1152
	movslq	%ebx, %rbp
	movsd	%xmm0, 24(%rsp)
	leaq	32(%rsp), %rdi
	salq	$2, %rbp
	movsd	%xmm1, 16(%rsp)
	movsd	%xmm2, 8(%rsp)
	movq	%rbp, %rsi
	movq	%fs:40, %rax
	movq	%rax, 1096(%rsp)
	xorl	%eax, %eax
	call	cudaMalloc@PLT
	xorl	%esi, %esi
	leaq	64(%rsp), %rdi
	call	cudaGetDeviceProperties_v2@PLT
	leal	-1(%rbx), %eax
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	384(%rsp), %ecx
	cltd
	movabsq	$4294967297, %rsi
	movq	%rsi, 56(%rsp)
	idivl	%ecx
	movl	%ecx, 52(%rsp)
	movl	60(%rsp), %ecx
	movq	%rsi, 44(%rsp)
	movq	52(%rsp), %rdx
	movl	48(%rsp), %esi
	incl	%eax
	movl	%eax, 40(%rsp)
	movq	40(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	movsd	8(%rsp), %xmm2
	movsd	16(%rsp), %xmm1
	testl	%eax, %eax
	movsd	24(%rsp), %xmm0
	jne	.L9
	movq	32(%rsp), %rcx
	movl	%r12d, %edx
	movl	%r14d, %esi
	movl	%r13d, %edi
	call	_Z39__device_stub__Z13iterateKerneliiidddPiiiidddPi
.L9:
	call	cudaDeviceSynchronize@PLT
	movq	%rbp, %rdi
	call	malloc@PLT
	movq	32(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbp, %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	call	cudaMemcpy@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	1096(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$1104, %rsp
	.cfi_def_cfa_offset 48
	movq	%rbx, %rax
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2008:
	.size	iterateGPU, .-iterateGPU
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z13iterateKerneliiidddPi"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2036:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z13iterateKerneliiidddPi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2036:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
__global__
void iterateKernel(int w, int h, int maxIterations, double xOrigin, double yOrigin, double zoomFactor, int* result) {
    int index = blockIdx.x * blockDim.x + threadIdx.x;
    int stride = blockDim.x * gridDim.x;

    for(int p = index; p < w * h; p += stride) {
        // deliniarize
        int i = p / w;
        int j = p % w;

        // convert to complex number
        double cx = xOrigin - (2 / zoomFactor) * (1 - 2 * ((double) j / w));
        double cy = yOrigin - (2 / zoomFactor) * (1 - 2 * ((double) (i+(w-h)/2) / w));

        // do the iterations
        double zx = cx;
        double zy = cy;
        double tx;
        double ty;
        bool inMandelbrot = true;
        for(int k = 0; k < maxIterations; ++ k)
        {
            if(zx * zx + zy * zy > 4) {
                result[i*w+j] = 255 * (1 - (double) k / maxIterations);
                inMandelbrot = false;
                break;
            }
            tx = zx * zx - zy * zy + cx;
            ty = 2 * zx * zy + cy;
            zx = tx;
            zy = ty;
        }
        if(inMandelbrot)
            result[i*w+j] = 0;
    }
}

extern "C"
int* iterateGPU(int w, int h, int maxIterations, double xOrigin, double yOrigin, double zoomFactor) {
    int* resultOnGPU;
    hipMalloc(&resultOnGPU, w * h * sizeof(int));

    hipDeviceProp_t deviceProp;
    hipGetDeviceProperties(&deviceProp, 0);
    int blockSize = deviceProp.maxThreadsPerBlock;
    int numBlocks = (w * h - 1) / blockSize + 1;

    iterateKernel<<<numBlocks, blockSize>>>(w, h, maxIterations, xOrigin, yOrigin, zoomFactor, resultOnGPU);
    hipDeviceSynchronize();

    auto result = (int*) malloc(w * h * sizeof(int));
    hipMemcpy(result, resultOnGPU, w * h * sizeof(int), hipMemcpyDeviceToHost);
    hipFree(resultOnGPU);

    return result;
}

	.text
	.file	"iterate.hip"
	.globl	_Z28__device_stub__iterateKerneliiidddPi # -- Begin function _Z28__device_stub__iterateKerneliiidddPi
	.type	_Z28__device_stub__iterateKerneliiidddPi,@function
_Z28__device_stub__iterateKerneliiidddPi: # @_Z28__device_stub__iterateKerneliiidddPi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rax
	movl	%edi, (%rax)
	leaq	8(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	4(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	56(%rsp), %rdx
	movsd	%xmm0, (%rdx)
	leaq	48(%rsp), %r8
	movsd	%xmm1, (%r8)
	leaq	40(%rsp), %r9
	movsd	%xmm2, (%r9)
	leaq	32(%rsp), %r10
	movq	%rcx, (%r10)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%r8, 32(%rbx)
	movq	%r9, 40(%rbx)
	movq	%r10, 48(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z13iterateKerneliiidddPi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z28__device_stub__iterateKerneliiidddPi, .Lfunc_end0-_Z28__device_stub__iterateKerneliiidddPi
	.cfi_endproc
                                        # -- End function
	.globl	iterateGPU                      # -- Begin function iterateGPU
	.type	iterateGPU,@function
iterateGPU:                             # @iterateGPU
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$1512, %rsp                     # imm = 0x5E8
	.cfi_def_cfa_offset 1568
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movsd	%xmm2, 32(%rsp)                 # 8-byte Spill
	movsd	%xmm1, 24(%rsp)                 # 8-byte Spill
	movsd	%xmm0, 16(%rsp)                 # 8-byte Spill
	movl	%edx, %ebp
	movl	%esi, %r14d
	movl	%edi, %r15d
	movl	%esi, %eax
	imull	%edi, %eax
	movslq	%eax, %r12
	leaq	(,%r12,4), %rbx
	leaq	8(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	leaq	40(%rsp), %r13
	movq	%r13, %rdi
	xorl	%esi, %esi
	callq	hipGetDevicePropertiesR0600
	movl	320(%r13), %ecx
	decl	%r12d
	movl	%r12d, %eax
	cltd
	idivl	%ecx
                                        # kill: def $eax killed $eax def $rax
	leal	1(%rax), %edi
	btsq	$32, %rdi
	btsq	$32, %rcx
	movl	$1, %esi
	movq	%rcx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_2
# %bb.1:
	movq	8(%rsp), %rcx
	movl	%r15d, %edi
	movl	%r14d, %esi
	movl	%ebp, %edx
	movsd	16(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	movsd	24(%rsp), %xmm1                 # 8-byte Reload
                                        # xmm1 = mem[0],zero
	movsd	32(%rsp), %xmm2                 # 8-byte Reload
                                        # xmm2 = mem[0],zero
	callq	_Z28__device_stub__iterateKerneliiidddPi
.LBB1_2:
	callq	hipDeviceSynchronize
	movq	%rbx, %rdi
	callq	malloc
	movq	%rax, %r14
	movq	8(%rsp), %rsi
	movq	%rax, %rdi
	movq	%rbx, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	%r14, %rax
	addq	$1512, %rsp                     # imm = 0x5E8
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	iterateGPU, .Lfunc_end1-iterateGPU
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z13iterateKerneliiidddPi, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z13iterateKerneliiidddPi,@object # @_Z13iterateKerneliiidddPi
	.section	.rodata,"a",@progbits
	.globl	_Z13iterateKerneliiidddPi
	.p2align	3, 0x0
_Z13iterateKerneliiidddPi:
	.quad	_Z28__device_stub__iterateKerneliiidddPi
	.size	_Z13iterateKerneliiidddPi, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z13iterateKerneliiidddPi"
	.size	.L__unnamed_1, 26

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z28__device_stub__iterateKerneliiidddPi
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z13iterateKerneliiidddPi
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z13iterateKerneliiidddPi ; -- Begin function _Z13iterateKerneliiidddPi
	.globl	_Z13iterateKerneliiidddPi
	.p2align	8
	.type	_Z13iterateKerneliiidddPi,@function
_Z13iterateKerneliiidddPi:              ; @_Z13iterateKerneliiidddPi
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x3c
	s_load_b128 s[16:19], s[0:1], 0x0
	s_add_u32 s2, s0, 48
	s_addc_u32 s3, s1, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s19, s4, 0xffff
	s_mul_i32 s12, s17, s16
	v_mad_u64_u32 v[1:2], null, s15, s19, v[0:1]
	s_mov_b32 s4, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s12, v1
	s_cbranch_execz .LBB0_11
; %bb.1:                                ; %.lr.ph61
	s_load_b256 s[4:11], s[0:1], 0x10
	s_sub_i32 s0, s16, s17
	s_load_b32 s2, s[2:3], 0x0
	s_lshr_b32 s1, s0, 31
	s_mov_b32 s3, 0
	s_add_i32 s0, s0, s1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	s_ashr_i32 s1, s0, 1
	s_cmp_gt_i32 s18, 0
	s_cselect_b32 s13, -1, 0
	s_ashr_i32 s14, s16, 31
	s_add_i32 s0, s16, s14
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_xor_b32 s15, s0, s14
	v_cvt_f32_u32_e32 v0, s15
	s_sub_i32 s0, 0, s15
	s_waitcnt lgkmcnt(0)
	v_div_scale_f64 v[2:3], null, s[8:9], s[8:9], 2.0
	v_div_scale_f64 v[8:9], vcc_lo, 2.0, s[8:9], 2.0
	v_rcp_iflag_f32_e32 v0, v0
	s_mul_i32 s2, s2, s19
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v0, 0x4f7ffffe, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_cvt_u32_f32_e32 v0, v0
	v_rcp_f64_e32 v[4:5], v[2:3]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[6:7], -v[2:3], v[4:5], 1.0
	v_fma_f64 v[4:5], v[4:5], v[6:7], v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[6:7], -v[2:3], v[4:5], 1.0
	v_fma_f64 v[4:5], v[4:5], v[6:7], v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[6:7], v[8:9], v[4:5]
	v_fma_f64 v[2:3], -v[2:3], v[6:7], v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_div_fmas_f64 v[5:6], v[2:3], v[4:5], v[6:7]
	v_cvt_f64_i32_e32 v[3:4], s16
	v_cvt_f64_i32_e32 v[7:8], s18
	v_mul_lo_u32 v2, s0, v0
	v_mul_hi_u32 v2, v0, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_add_nc_u32_e32 v0, v0, v2
	v_div_fixup_f64 v[5:6], v[5:6], s[8:9], 2.0
.LBB0_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_4 Depth 2
	v_ashrrev_i32_e32 v2, 31, v1
	v_mov_b32_e32 v17, 0
	s_and_not1_b32 vcc_lo, exec_lo, s13
	s_cbranch_vccnz .LBB0_10
; %bb.3:                                ; %.lr.ph.preheader
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v9, v1, v2
	s_mov_b32 s17, 0
                                        ; implicit-def: $sgpr8
                                        ; implicit-def: $sgpr19
                                        ; implicit-def: $sgpr9
	v_xor_b32_e32 v9, v9, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v10, v9, v0
	v_mul_lo_u32 v11, v10, s15
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v9, v9, v11
	v_add_nc_u32_e32 v11, 1, v10
	v_subrev_nc_u32_e32 v12, s15, v9
	v_cmp_le_u32_e32 vcc_lo, s15, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v10, v10, v11 :: v_dual_cndmask_b32 v9, v9, v12
	v_xor_b32_e32 v12, s14, v2
	v_add_nc_u32_e32 v11, 1, v10
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_le_u32_e32 vcc_lo, s15, v9
	v_cndmask_b32_e32 v9, v10, v11, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v9, v9, v12
	v_sub_nc_u32_e32 v9, v9, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v10, v9, s16
	v_add_nc_u32_e32 v11, s1, v9
	v_cvt_f64_i32_e32 v[11:12], v11
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v10, v1, v10
	v_cvt_f64_i32_e32 v[9:10], v10
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_scale_f64 v[15:16], null, v[3:4], v[3:4], v[11:12]
	v_div_scale_f64 v[13:14], null, v[3:4], v[3:4], v[9:10]
	v_div_scale_f64 v[25:26], vcc_lo, v[9:10], v[3:4], v[9:10]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_rcp_f64_e32 v[19:20], v[15:16]
	v_rcp_f64_e32 v[17:18], v[13:14]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[23:24], -v[15:16], v[19:20], 1.0
	v_fma_f64 v[21:22], -v[13:14], v[17:18], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[19:20], v[19:20], v[23:24], v[19:20]
	v_fma_f64 v[17:18], v[17:18], v[21:22], v[17:18]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[23:24], -v[15:16], v[19:20], 1.0
	v_fma_f64 v[21:22], -v[13:14], v[17:18], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[19:20], v[19:20], v[23:24], v[19:20]
	v_fma_f64 v[17:18], v[17:18], v[21:22], v[17:18]
	v_div_scale_f64 v[21:22], s0, v[11:12], v[3:4], v[11:12]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[23:24], v[25:26], v[17:18]
	v_mul_f64 v[27:28], v[21:22], v[19:20]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[13:14], -v[13:14], v[23:24], v[25:26]
	v_fma_f64 v[15:16], -v[15:16], v[27:28], v[21:22]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_div_fmas_f64 v[13:14], v[13:14], v[17:18], v[23:24]
	s_mov_b32 vcc_lo, s0
	s_mov_b32 s0, 0
	v_div_fmas_f64 v[15:16], v[15:16], v[19:20], v[27:28]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_fixup_f64 v[9:10], v[13:14], v[3:4], v[9:10]
	v_div_fixup_f64 v[11:12], v[15:16], v[3:4], v[11:12]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[13:14], v[9:10], -2.0, 1.0
	v_fma_f64 v[11:12], v[11:12], -2.0, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[9:10], -v[5:6], v[11:12], s[6:7]
	v_fma_f64 v[11:12], -v[5:6], v[13:14], s[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mov_b32_e32 v14, v10
	v_dual_mov_b32 v16, v12 :: v_dual_mov_b32 v13, v9
	s_delay_alu instid0(VALU_DEP_3)
	v_mov_b32_e32 v15, v11
.LBB0_4:                                ; %.lr.ph
                                        ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_mul_f64 v[17:18], v[13:14], v[13:14]
	s_or_b32 s9, s9, exec_lo
	s_or_b32 s19, s19, exec_lo
	s_mov_b32 s21, exec_lo
                                        ; implicit-def: $sgpr20
                                        ; implicit-def: $sgpr22
	v_fma_f64 v[19:20], v[15:16], v[15:16], v[17:18]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_nlt_f64_e32 4.0, v[19:20]
	s_cbranch_execz .LBB0_6
; %bb.5:                                ;   in Loop: Header=BB0_4 Depth=2
	v_mul_f64 v[19:20], v[15:16], v[15:16]
	v_add_f64 v[15:16], v[15:16], v[15:16]
	s_add_i32 s20, s17, 1
	s_mov_b32 s22, 0
	s_cmp_eq_u32 s18, s20
	s_cselect_b32 s23, -1, 0
	s_and_not1_b32 s19, s19, exec_lo
	s_and_b32 s23, s23, exec_lo
	s_and_not1_b32 s9, s9, exec_lo
	s_or_b32 s19, s19, s23
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[17:18], v[19:20], -v[17:18]
	v_fma_f64 v[13:14], v[15:16], v[13:14], v[9:10]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[17:18], v[11:12], v[17:18]
	v_dual_mov_b32 v15, v17 :: v_dual_mov_b32 v16, v18
.LBB0_6:                                ; %Flow94
                                        ;   in Loop: Header=BB0_4 Depth=2
	s_or_b32 exec_lo, exec_lo, s21
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
	s_and_b32 s21, exec_lo, s19
	v_dual_mov_b32 v17, s22 :: v_dual_mov_b32 v18, s17
	s_or_b32 s0, s21, s0
	s_and_not1_b32 s8, s8, exec_lo
	s_and_b32 s17, s9, exec_lo
	s_or_b32 s8, s8, s17
	s_mov_b32 s17, s20
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB0_4
; %bb.7:                                ; %loop.exit.guard
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s0, exec_lo, s0
	s_cbranch_execz .LBB0_9
; %bb.8:                                ; %.critedge
                                        ;   in Loop: Header=BB0_2 Depth=1
	v_cvt_f64_i32_e32 v[9:10], v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_scale_f64 v[11:12], null, v[7:8], v[7:8], v[9:10]
	v_rcp_f64_e32 v[13:14], v[11:12]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[15:16], -v[11:12], v[13:14], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[13:14], v[13:14], v[15:16], v[13:14]
	v_fma_f64 v[15:16], -v[11:12], v[13:14], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[13:14], v[13:14], v[15:16], v[13:14]
	v_div_scale_f64 v[15:16], vcc_lo, v[9:10], v[7:8], v[9:10]
	v_mul_f64 v[17:18], v[15:16], v[13:14]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[11:12], -v[11:12], v[17:18], v[15:16]
	v_div_fmas_f64 v[11:12], v[11:12], v[13:14], v[17:18]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f64 v[9:10], v[11:12], v[7:8], v[9:10]
	v_add_f64 v[9:10], -v[9:10], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[9:10], 0x406fe000, v[9:10]
	v_cvt_i32_f64_e32 v17, v[9:10]
.LBB0_9:                                ; %Flow
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
.LBB0_10:                               ; %._crit_edge
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[9:10], 2, v[1:2]
	v_add_nc_u32_e32 v1, s2, v1
	v_cmp_le_i32_e32 vcc_lo, s12, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v9, s0, s10, v9
	v_add_co_ci_u32_e64 v10, s0, s11, v10, s0
	s_or_b32 s3, vcc_lo, s3
	global_store_b32 v[9:10], v17, off
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB0_2
.LBB0_11:                               ; %Flow97
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z13iterateKerneliiidddPi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 29
		.amdhsa_next_free_sgpr 24
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z13iterateKerneliiidddPi, .Lfunc_end0-_Z13iterateKerneliiidddPi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1152
; NumSgprs: 26
; NumVgprs: 29
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 3
; VGPRBlocks: 3
; NumSGPRsForWavesPerEU: 26
; NumVGPRsForWavesPerEU: 29
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .offset:         4
        .size:           4
        .value_kind:     by_value
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .offset:         16
        .size:           8
        .value_kind:     by_value
      - .offset:         24
        .size:           8
        .value_kind:     by_value
      - .offset:         32
        .size:           8
        .value_kind:     by_value
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         52
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         60
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         62
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         64
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         66
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         68
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         70
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         112
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 304
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z13iterateKerneliiidddPi
    .private_segment_fixed_size: 0
    .sgpr_count:     26
    .sgpr_spill_count: 0
    .symbol:         _Z13iterateKerneliiidddPi.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     29
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
