#define EIGEN_USE_GPU
#include <cuda.h>
#include <stdio.h>

__global__ void UntruncCovKernel(
  const double* incr,
  const int nb_incr,
  const int paths_length,
  const int paths_length_,
  const int nb_diagonals,
  double* pdes_sol)

{
  
  unsigned int p =  blockIdx.x;
  unsigned int idx = threadIdx.x;

  for (int diag=0; diag<nb_diagonals; diag++){

      unsigned int J = max(0, min(diag - idx, paths_length - 1));

      unsigned int i = idx + 1;
      unsigned int j = J + 1;

      if( idx+J==diag && (idx<paths_length && J<paths_length)){
        
        float increment = incr[(nb_incr*nb_incr)*p + (i-1)*nb_incr + (j-1)];

        pdes_sol[(paths_length_*paths_length_)*p + i*paths_length_ + j] = ( pdes_sol[(paths_length_*paths_length_)*p + (i-1)*paths_length_ + j] + pdes_sol[(paths_length_*paths_length_)*p + i*paths_length_ + j-1] )*(1.+0.5*increment+(1./12)*increment*increment) - pdes_sol[(paths_length_*paths_length_)*p + (i-1)*paths_length_ + j-1]*(1.-(1./12)*increment*increment);
 
        }
    
    __syncthreads();
  }
      
}

__global__ void UntruncCovRevKernel(
  const double* incr,
  const int nb_incr,
  const int paths_length,
  const int paths_length_,
  const int nb_diagonals,
  double* pdes_sol)

{
  
  unsigned int p =  blockIdx.x;
  unsigned int idx = threadIdx.x;

  for (int diag=0; diag<nb_diagonals; diag++){

      unsigned int J = max(0, min(diag - idx, paths_length - 1));

      unsigned int i = idx + 1;
      unsigned int j = J + 1;

      if( idx+J==diag && (idx<paths_length && J<paths_length)){
        
        float increment = incr[(nb_incr*nb_incr)*p + (i-1)*nb_incr + (j-1)];

        pdes_sol[(paths_length_*paths_length_)*p + i*paths_length_ + j] =  pdes_sol[(paths_length_*paths_length_)*p + (i-1)*paths_length_ + j] + pdes_sol[(paths_length_*paths_length_)*p + i*paths_length_ + j-1]  - pdes_sol[(paths_length_*paths_length_)*p + (i-1)*paths_length_ + j-1]*(1.-increment);
 
        }
    
    __syncthreads();
  }
      
}

void UntruncCovKernelLauncher(
  const double* incr,
  const int batch_samples,
  const int nb_incr,
  const int paths_length,
  const int paths_length_,
  const int nb_diagonals,
  double* pdes_sol)
{ 
  UntruncCovKernel<<<batch_samples, paths_length>>>(incr,nb_incr,paths_length,paths_length_,nb_diagonals,pdes_sol);
}
  

void UntruncCovRevKernelLauncher(
  const double* incr,
  const int batch_samples,
  const int nb_incr,
  const int paths_length,
  const int paths_length_,
  const int nb_diagonals,
  double* pdes_sol)
{ 
  UntruncCovRevKernel<<<batch_samples, paths_length>>>(incr,nb_incr,paths_length,paths_length_,nb_diagonals,pdes_sol);
}
  
	.file	"tmpxft_0037e86b_00000000-6_untrunc_cov_op_gpu.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2031:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2031:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z43__device_stub__Z16UntruncCovKernelPKdiiiiPdPKdiiiiPd
	.type	_Z43__device_stub__Z16UntruncCovKernelPKdiiiiPdPKdiiiiPd, @function
_Z43__device_stub__Z16UntruncCovKernelPKdiiiiPdPKdiiiiPd:
.LFB2053:
	.cfi_startproc
	endbr64
	subq	$168, %rsp
	.cfi_def_cfa_offset 176
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movl	%esi, 20(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 16(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 12(%rsp)
	leaq	48(%rsp), %rcx
	movl	%r8d, 8(%rsp)
	movq	%r9, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 136(%rsp)
	movq	%rsp, %rax
	movq	%rax, 144(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	48(%rsp)
	.cfi_def_cfa_offset 184
	leaq	_Z16UntruncCovKernelPKdiiiiPd(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 192
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L2:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$168, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2053:
	.size	_Z43__device_stub__Z16UntruncCovKernelPKdiiiiPdPKdiiiiPd, .-_Z43__device_stub__Z16UntruncCovKernelPKdiiiiPdPKdiiiiPd
	.globl	_Z16UntruncCovKernelPKdiiiiPd
	.type	_Z16UntruncCovKernelPKdiiiiPd, @function
_Z16UntruncCovKernelPKdiiiiPd:
.LFB2054:
	.cfi_startproc
	endbr64
	jmp	_Z43__device_stub__Z16UntruncCovKernelPKdiiiiPdPKdiiiiPd
	.cfi_endproc
.LFE2054:
	.size	_Z16UntruncCovKernelPKdiiiiPd, .-_Z16UntruncCovKernelPKdiiiiPd
	.globl	_Z24UntruncCovKernelLauncherPKdiiiiiPd
	.type	_Z24UntruncCovKernelLauncherPKdiiiiiPd, @function
_Z24UntruncCovKernelLauncherPKdiiiiiPd:
.LFB2027:
	.cfi_startproc
	endbr64
	movabsq	$4294967297, %rax
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movl	%r9d, %r14d
	xorl	%r9d, %r9d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movl	%r8d, %r13d
	xorl	%r8d, %r8d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%edx, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rdi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%ecx, %ebx
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	movl	%ecx, 20(%rsp)
	movq	96(%rsp), %r15
	movq	%rax, 24(%rsp)
	movl	28(%rsp), %ecx
	movl	%esi, 8(%rsp)
	movq	20(%rsp), %rdx
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movl	16(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	addq	$40, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	movq	%r15, %r9
	movl	%r14d, %r8d
	movl	%r13d, %ecx
	movl	%ebx, %edx
	movl	%r12d, %esi
	popq	%rbx
	.cfi_def_cfa_offset 48
	movq	%rbp, %rdi
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z43__device_stub__Z16UntruncCovKernelPKdiiiiPdPKdiiiiPd
.L8:
	.cfi_restore_state
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z24UntruncCovKernelLauncherPKdiiiiiPd, .-_Z24UntruncCovKernelLauncherPKdiiiiiPd
	.globl	_Z46__device_stub__Z19UntruncCovRevKernelPKdiiiiPdPKdiiiiPd
	.type	_Z46__device_stub__Z19UntruncCovRevKernelPKdiiiiPdPKdiiiiPd, @function
_Z46__device_stub__Z19UntruncCovRevKernelPKdiiiiPdPKdiiiiPd:
.LFB2055:
	.cfi_startproc
	endbr64
	subq	$168, %rsp
	.cfi_def_cfa_offset 176
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movl	%esi, 20(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 16(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 12(%rsp)
	leaq	48(%rsp), %rcx
	movl	%r8d, 8(%rsp)
	movq	%r9, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 136(%rsp)
	movq	%rsp, %rax
	movq	%rax, 144(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L11
	pushq	48(%rsp)
	.cfi_def_cfa_offset 184
	leaq	_Z19UntruncCovRevKernelPKdiiiiPd(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 192
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L11:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L13
	call	__stack_chk_fail@PLT
.L13:
	addq	$168, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2055:
	.size	_Z46__device_stub__Z19UntruncCovRevKernelPKdiiiiPdPKdiiiiPd, .-_Z46__device_stub__Z19UntruncCovRevKernelPKdiiiiPdPKdiiiiPd
	.globl	_Z19UntruncCovRevKernelPKdiiiiPd
	.type	_Z19UntruncCovRevKernelPKdiiiiPd, @function
_Z19UntruncCovRevKernelPKdiiiiPd:
.LFB2056:
	.cfi_startproc
	endbr64
	jmp	_Z46__device_stub__Z19UntruncCovRevKernelPKdiiiiPdPKdiiiiPd
	.cfi_endproc
.LFE2056:
	.size	_Z19UntruncCovRevKernelPKdiiiiPd, .-_Z19UntruncCovRevKernelPKdiiiiPd
	.globl	_Z27UntruncCovRevKernelLauncherPKdiiiiiPd
	.type	_Z27UntruncCovRevKernelLauncherPKdiiiiiPd, @function
_Z27UntruncCovRevKernelLauncherPKdiiiiiPd:
.LFB2028:
	.cfi_startproc
	endbr64
	movabsq	$4294967297, %rax
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movl	%r9d, %r14d
	xorl	%r9d, %r9d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movl	%r8d, %r13d
	xorl	%r8d, %r8d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%edx, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rdi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%ecx, %ebx
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	movl	%ecx, 20(%rsp)
	movq	96(%rsp), %r15
	movq	%rax, 24(%rsp)
	movl	28(%rsp), %ecx
	movl	%esi, 8(%rsp)
	movq	20(%rsp), %rdx
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movl	16(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L16
	addq	$40, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	movq	%r15, %r9
	movl	%r14d, %r8d
	movl	%r13d, %ecx
	movl	%ebx, %edx
	movl	%r12d, %esi
	popq	%rbx
	.cfi_def_cfa_offset 48
	movq	%rbp, %rdi
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z46__device_stub__Z19UntruncCovRevKernelPKdiiiiPdPKdiiiiPd
.L16:
	.cfi_restore_state
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	_Z27UntruncCovRevKernelLauncherPKdiiiiiPd, .-_Z27UntruncCovRevKernelLauncherPKdiiiiiPd
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z19UntruncCovRevKernelPKdiiiiPd"
.LC1:
	.string	"_Z16UntruncCovKernelPKdiiiiPd"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2058:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z19UntruncCovRevKernelPKdiiiiPd(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC1(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z16UntruncCovKernelPKdiiiiPd(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2058:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#define EIGEN_USE_GPU
#include <hip/hip_runtime.h>
#include <stdio.h>

__global__ void UntruncCovKernel(
  const double* incr,
  const int nb_incr,
  const int paths_length,
  const int paths_length_,
  const int nb_diagonals,
  double* pdes_sol)

{
  
  unsigned int p =  blockIdx.x;
  unsigned int idx = threadIdx.x;

  for (int diag=0; diag<nb_diagonals; diag++){

      unsigned int J = max(0, min(diag - idx, paths_length - 1));

      unsigned int i = idx + 1;
      unsigned int j = J + 1;

      if( idx+J==diag && (idx<paths_length && J<paths_length)){
        
        float increment = incr[(nb_incr*nb_incr)*p + (i-1)*nb_incr + (j-1)];

        pdes_sol[(paths_length_*paths_length_)*p + i*paths_length_ + j] = ( pdes_sol[(paths_length_*paths_length_)*p + (i-1)*paths_length_ + j] + pdes_sol[(paths_length_*paths_length_)*p + i*paths_length_ + j-1] )*(1.+0.5*increment+(1./12)*increment*increment) - pdes_sol[(paths_length_*paths_length_)*p + (i-1)*paths_length_ + j-1]*(1.-(1./12)*increment*increment);
 
        }
    
    __syncthreads();
  }
      
}

__global__ void UntruncCovRevKernel(
  const double* incr,
  const int nb_incr,
  const int paths_length,
  const int paths_length_,
  const int nb_diagonals,
  double* pdes_sol)

{
  
  unsigned int p =  blockIdx.x;
  unsigned int idx = threadIdx.x;

  for (int diag=0; diag<nb_diagonals; diag++){

      unsigned int J = max(0, min(diag - idx, paths_length - 1));

      unsigned int i = idx + 1;
      unsigned int j = J + 1;

      if( idx+J==diag && (idx<paths_length && J<paths_length)){
        
        float increment = incr[(nb_incr*nb_incr)*p + (i-1)*nb_incr + (j-1)];

        pdes_sol[(paths_length_*paths_length_)*p + i*paths_length_ + j] =  pdes_sol[(paths_length_*paths_length_)*p + (i-1)*paths_length_ + j] + pdes_sol[(paths_length_*paths_length_)*p + i*paths_length_ + j-1]  - pdes_sol[(paths_length_*paths_length_)*p + (i-1)*paths_length_ + j-1]*(1.-increment);
 
        }
    
    __syncthreads();
  }
      
}

void UntruncCovKernelLauncher(
  const double* incr,
  const int batch_samples,
  const int nb_incr,
  const int paths_length,
  const int paths_length_,
  const int nb_diagonals,
  double* pdes_sol)
{ 
  UntruncCovKernel<<<batch_samples, paths_length>>>(incr,nb_incr,paths_length,paths_length_,nb_diagonals,pdes_sol);
}
  

void UntruncCovRevKernelLauncher(
  const double* incr,
  const int batch_samples,
  const int nb_incr,
  const int paths_length,
  const int paths_length_,
  const int nb_diagonals,
  double* pdes_sol)
{ 
  UntruncCovRevKernel<<<batch_samples, paths_length>>>(incr,nb_incr,paths_length,paths_length_,nb_diagonals,pdes_sol);
}
  
	.text
	.file	"untrunc_cov_op_gpu.hip"
	.globl	_Z31__device_stub__UntruncCovKernelPKdiiiiPd # -- Begin function _Z31__device_stub__UntruncCovKernelPKdiiiiPd
	.type	_Z31__device_stub__UntruncCovKernelPKdiiiiPd,@function
_Z31__device_stub__UntruncCovKernelPKdiiiiPd: # @_Z31__device_stub__UntruncCovKernelPKdiiiiPd
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	12(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	8(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	movq	%rsp, %rcx
	movl	%r8d, (%rcx)
	leaq	32(%rsp), %r8
	movq	%r9, (%r8)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16UntruncCovKernelPKdiiiiPd, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z31__device_stub__UntruncCovKernelPKdiiiiPd, .Lfunc_end0-_Z31__device_stub__UntruncCovKernelPKdiiiiPd
	.cfi_endproc
                                        # -- End function
	.globl	_Z34__device_stub__UntruncCovRevKernelPKdiiiiPd # -- Begin function _Z34__device_stub__UntruncCovRevKernelPKdiiiiPd
	.type	_Z34__device_stub__UntruncCovRevKernelPKdiiiiPd,@function
_Z34__device_stub__UntruncCovRevKernelPKdiiiiPd: # @_Z34__device_stub__UntruncCovRevKernelPKdiiiiPd
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	12(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	8(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	movq	%rsp, %rcx
	movl	%r8d, (%rcx)
	leaq	32(%rsp), %r8
	movq	%r9, (%r8)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z19UntruncCovRevKernelPKdiiiiPd, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z34__device_stub__UntruncCovRevKernelPKdiiiiPd, .Lfunc_end1-_Z34__device_stub__UntruncCovRevKernelPKdiiiiPd
	.cfi_endproc
                                        # -- End function
	.globl	_Z24UntruncCovKernelLauncherPKdiiiiiPd # -- Begin function _Z24UntruncCovKernelLauncherPKdiiiiiPd
	.type	_Z24UntruncCovKernelLauncherPKdiiiiiPd,@function
_Z24UntruncCovKernelLauncherPKdiiiiiPd: # @_Z24UntruncCovKernelLauncherPKdiiiiiPd
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r9d, %ebx
	movl	%r8d, %ebp
	movl	%ecx, %r14d
	movl	%edx, %r12d
	movq	%rdi, %r13
	movq	64(%rsp), %r15
	movl	%esi, %edi
	btsq	$32, %rdi
	movl	%ecx, %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	je	.LBB2_2
# %bb.1:
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB2_2:
	.cfi_def_cfa_offset 64
	movq	%r13, %rdi
	movl	%r12d, %esi
	movl	%r14d, %edx
	movl	%ebp, %ecx
	movl	%ebx, %r8d
	movq	%r15, %r9
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z31__device_stub__UntruncCovKernelPKdiiiiPd # TAILCALL
.Lfunc_end2:
	.size	_Z24UntruncCovKernelLauncherPKdiiiiiPd, .Lfunc_end2-_Z24UntruncCovKernelLauncherPKdiiiiiPd
	.cfi_endproc
                                        # -- End function
	.globl	_Z27UntruncCovRevKernelLauncherPKdiiiiiPd # -- Begin function _Z27UntruncCovRevKernelLauncherPKdiiiiiPd
	.type	_Z27UntruncCovRevKernelLauncherPKdiiiiiPd,@function
_Z27UntruncCovRevKernelLauncherPKdiiiiiPd: # @_Z27UntruncCovRevKernelLauncherPKdiiiiiPd
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r9d, %ebx
	movl	%r8d, %ebp
	movl	%ecx, %r14d
	movl	%edx, %r12d
	movq	%rdi, %r13
	movq	64(%rsp), %r15
	movl	%esi, %edi
	btsq	$32, %rdi
	movl	%ecx, %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	je	.LBB3_2
# %bb.1:
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB3_2:
	.cfi_def_cfa_offset 64
	movq	%r13, %rdi
	movl	%r12d, %esi
	movl	%r14d, %edx
	movl	%ebp, %ecx
	movl	%ebx, %r8d
	movq	%r15, %r9
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z34__device_stub__UntruncCovRevKernelPKdiiiiPd # TAILCALL
.Lfunc_end3:
	.size	_Z27UntruncCovRevKernelLauncherPKdiiiiiPd, .Lfunc_end3-_Z27UntruncCovRevKernelLauncherPKdiiiiiPd
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB4_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB4_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z16UntruncCovKernelPKdiiiiPd, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z19UntruncCovRevKernelPKdiiiiPd, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end4:
	.size	__hip_module_ctor, .Lfunc_end4-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB5_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB5_2:
	retq
.Lfunc_end5:
	.size	__hip_module_dtor, .Lfunc_end5-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z16UntruncCovKernelPKdiiiiPd,@object # @_Z16UntruncCovKernelPKdiiiiPd
	.section	.rodata,"a",@progbits
	.globl	_Z16UntruncCovKernelPKdiiiiPd
	.p2align	3, 0x0
_Z16UntruncCovKernelPKdiiiiPd:
	.quad	_Z31__device_stub__UntruncCovKernelPKdiiiiPd
	.size	_Z16UntruncCovKernelPKdiiiiPd, 8

	.type	_Z19UntruncCovRevKernelPKdiiiiPd,@object # @_Z19UntruncCovRevKernelPKdiiiiPd
	.globl	_Z19UntruncCovRevKernelPKdiiiiPd
	.p2align	3, 0x0
_Z19UntruncCovRevKernelPKdiiiiPd:
	.quad	_Z34__device_stub__UntruncCovRevKernelPKdiiiiPd
	.size	_Z19UntruncCovRevKernelPKdiiiiPd, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z16UntruncCovKernelPKdiiiiPd"
	.size	.L__unnamed_1, 30

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z19UntruncCovRevKernelPKdiiiiPd"
	.size	.L__unnamed_2, 33

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z31__device_stub__UntruncCovKernelPKdiiiiPd
	.addrsig_sym _Z34__device_stub__UntruncCovRevKernelPKdiiiiPd
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z16UntruncCovKernelPKdiiiiPd
	.addrsig_sym _Z19UntruncCovRevKernelPKdiiiiPd
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z16UntruncCovKernelPKdiiiiPd ; -- Begin function _Z16UntruncCovKernelPKdiiiiPd
	.globl	_Z16UntruncCovKernelPKdiiiiPd
	.p2align	8
	.type	_Z16UntruncCovKernelPKdiiiiPd,@function
_Z16UntruncCovKernelPKdiiiiPd:          ; @_Z16UntruncCovKernelPKdiiiiPd
; %bb.0:
	s_load_b128 s[4:7], s[0:1], 0x8
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s7, 1
	s_cbranch_scc1 .LBB0_5
; %bb.1:                                ; %.lr.ph
	s_add_i32 s2, s5, -1
	v_cmp_gt_u32_e32 vcc_lo, s5, v0
	v_cvt_f64_i32_e32 v[1:2], s2
	s_clause 0x1
	s_load_b64 s[2:3], s[0:1], 0x0
	s_load_b64 s[8:9], s[0:1], 0x18
	v_sub_nc_u32_e32 v8, 0, v0
	s_mov_b32 s10, 0x55555555
	s_mov_b32 s11, 0x3fb55555
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_max_f64 v[1:2], v[1:2], v[1:2]
	v_mad_u64_u32 v[3:4], null, s15, s6, v[0:1]
	v_mad_u64_u32 v[4:5], null, s15, s4, v[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v5, v3, s6
	v_mul_lo_u32 v6, v4, s4
	s_mov_b32 s4, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v7, s6, v5
.LBB0_2:                                ; =>This Inner Loop Header: Depth=1
	v_add_nc_u32_e32 v3, s4, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f64_u32_e32 v[9:10], v3
	v_min_f64 v[9:10], v[9:10], v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_max_f64 v[9:10], v[9:10], 0
	v_cvt_u32_f64_e32 v9, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v0, v9
	v_cmp_gt_u32_e64 s1, s5, v9
	v_cmp_eq_u32_e64 s0, s4, v3
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 s0, vcc_lo, s0
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, s1, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB0_4
; %bb.3:                                ;   in Loop: Header=BB0_2 Depth=1
	v_add_nc_u32_e32 v3, v6, v9
	v_add_nc_u32_e32 v24, 1, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[10:11], 3, v[3:4]
	v_add_nc_u32_e32 v3, v24, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[12:13], 3, v[3:4]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v10, s0, s2, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e64 v11, s0, s3, v11, s0
	v_add_nc_u32_e32 v3, v7, v9
	v_add_co_u32 v12, s0, s8, v12
	global_load_b64 v[10:11], v[10:11], off
	v_add_co_ci_u32_e64 v13, s0, s9, v13, s0
	v_lshlrev_b64 v[14:15], 3, v[3:4]
	v_add_nc_u32_e32 v3, v5, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[16:17], 3, v[3:4]
	v_add_co_u32 v14, s0, s8, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v15, s0, s9, v15, s0
	v_add_co_u32 v16, s0, s8, v16
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v17, s0, s9, v17, s0
	s_clause 0x2
	global_load_b64 v[12:13], v[12:13], off
	global_load_b64 v[14:15], v[14:15], off
	global_load_b64 v[16:17], v[16:17], off
	s_waitcnt vmcnt(3)
	v_cvt_f32_f64_e32 v3, v[10:11]
	s_waitcnt vmcnt(1)
	v_add_f64 v[11:12], v[12:13], v[14:15]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f64_f32_e32 v[9:10], v3
	v_mul_f64 v[18:19], v[9:10], s[10:11]
	v_fma_f64 v[20:21], v[9:10], 0.5, 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[22:23], -v[18:19], v[9:10], 1.0
	v_fma_f64 v[9:10], v[18:19], v[9:10], v[20:21]
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[13:14], v[16:17], v[22:23]
	v_fma_f64 v[9:10], v[11:12], v[9:10], -v[13:14]
	v_mov_b32_e32 v12, v4
	v_add_nc_u32_e32 v11, v24, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[11:12], 3, v[11:12]
	v_add_co_u32 v11, s0, s8, v11
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v12, s0, s9, v12, s0
	global_store_b64 v[11:12], v[9:10], off
.LBB0_4:                                ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_add_i32 s4, s4, 1
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_cmp_eq_u32 s7, s4
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB0_2
.LBB0_5:                                ; %._crit_edge
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16UntruncCovKernelPKdiiiiPd
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 32
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 25
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z16UntruncCovKernelPKdiiiiPd, .Lfunc_end0-_Z16UntruncCovKernelPKdiiiiPd
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 580
; NumSgprs: 18
; NumVgprs: 25
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 3
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 25
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z19UntruncCovRevKernelPKdiiiiPd ; -- Begin function _Z19UntruncCovRevKernelPKdiiiiPd
	.globl	_Z19UntruncCovRevKernelPKdiiiiPd
	.p2align	8
	.type	_Z19UntruncCovRevKernelPKdiiiiPd,@function
_Z19UntruncCovRevKernelPKdiiiiPd:       ; @_Z19UntruncCovRevKernelPKdiiiiPd
; %bb.0:
	s_load_b128 s[4:7], s[0:1], 0x8
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s7, 1
	s_cbranch_scc1 .LBB1_5
; %bb.1:                                ; %.lr.ph
	s_add_i32 s2, s5, -1
	v_cmp_gt_u32_e32 vcc_lo, s5, v0
	v_cvt_f64_i32_e32 v[1:2], s2
	s_clause 0x1
	s_load_b64 s[2:3], s[0:1], 0x0
	s_load_b64 s[8:9], s[0:1], 0x18
	v_sub_nc_u32_e32 v8, 0, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_max_f64 v[1:2], v[1:2], v[1:2]
	v_mad_u64_u32 v[3:4], null, s15, s6, v[0:1]
	v_mad_u64_u32 v[4:5], null, s15, s4, v[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v5, v3, s6
	v_mul_lo_u32 v6, v4, s4
	s_mov_b32 s4, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v7, s6, v5
.LBB1_2:                                ; =>This Inner Loop Header: Depth=1
	v_add_nc_u32_e32 v3, s4, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f64_u32_e32 v[9:10], v3
	v_min_f64 v[9:10], v[9:10], v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_max_f64 v[9:10], v[9:10], 0
	v_cvt_u32_f64_e32 v9, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v0, v9
	v_cmp_gt_u32_e64 s1, s5, v9
	v_cmp_eq_u32_e64 s0, s4, v3
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 s0, vcc_lo, s0
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, s1, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_4
; %bb.3:                                ;   in Loop: Header=BB1_2 Depth=1
	v_add_nc_u32_e32 v3, v6, v9
	v_add_nc_u32_e32 v18, 1, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[10:11], 3, v[3:4]
	v_add_nc_u32_e32 v3, v18, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[12:13], 3, v[3:4]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v10, s0, s2, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e64 v11, s0, s3, v11, s0
	v_add_nc_u32_e32 v3, v7, v9
	v_add_co_u32 v12, s0, s8, v12
	global_load_b64 v[10:11], v[10:11], off
	v_add_co_ci_u32_e64 v13, s0, s9, v13, s0
	v_lshlrev_b64 v[14:15], 3, v[3:4]
	v_add_nc_u32_e32 v3, v5, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v14, s0, s8, v14
	v_add_co_ci_u32_e64 v15, s0, s9, v15, s0
	s_clause 0x1
	global_load_b64 v[12:13], v[12:13], off
	global_load_b64 v[14:15], v[14:15], off
	v_lshlrev_b64 v[16:17], 3, v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v16, s0, s8, v16
	v_add_co_ci_u32_e64 v17, s0, s9, v17, s0
	global_load_b64 v[16:17], v[16:17], off
	s_waitcnt vmcnt(3)
	v_cvt_f32_f64_e32 v3, v[10:11]
	s_waitcnt vmcnt(1)
	v_add_f64 v[11:12], v[12:13], v[14:15]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f64_f32_e32 v[9:10], v3
	v_add_f64 v[9:10], -v[9:10], 1.0
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[9:10], -v[16:17], v[9:10], v[11:12]
	v_dual_mov_b32 v12, v4 :: v_dual_add_nc_u32 v11, v18, v7
	v_lshlrev_b64 v[11:12], 3, v[11:12]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v11, s0, s8, v11
	v_add_co_ci_u32_e64 v12, s0, s9, v12, s0
	global_store_b64 v[11:12], v[9:10], off
.LBB1_4:                                ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_add_i32 s4, s4, 1
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_cmp_eq_u32 s7, s4
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB1_2
.LBB1_5:                                ; %._crit_edge
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z19UntruncCovRevKernelPKdiiiiPd
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 32
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 19
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z19UntruncCovRevKernelPKdiiiiPd, .Lfunc_end1-_Z19UntruncCovRevKernelPKdiiiiPd
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 520
; NumSgprs: 18
; NumVgprs: 19
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 19
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .offset:         12
        .size:           4
        .value_kind:     by_value
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 32
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z16UntruncCovKernelPKdiiiiPd
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z16UntruncCovKernelPKdiiiiPd.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     25
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .offset:         12
        .size:           4
        .value_kind:     by_value
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 32
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z19UntruncCovRevKernelPKdiiiiPd
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z19UntruncCovRevKernelPKdiiiiPd.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     19
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
