#include <stdio.h>
#include <cuda.h>
#include <cuda_runtime.h>

#define THREADS_PER_BLOCK 256
#define MULTIPLICATIONS 4096

/**
 * Multiply square matrix (n x n) by the vector of size n.
 * 
 * 
 * @param mat Input matrix.
 * @param vec Input vector.
 * @param out Output vector.
 * @param n   Dimension.  
 */
__global__ void matrix_vector_multiplication(float *mat, float *vec, float *out, int n) 
{
    int tid = blockIdx.x * blockDim.x + threadIdx.x;

    if (tid < n) {
        float sum = 0;
        
        for (int k = 0; k < MULTIPLICATIONS; k++)
            for (int i = 0; i < n; i++)
                sum += mat[i * n + tid] * vec[i];
        
        out[tid] = sum;            
    }
}

int main(int argc, char const *argv[]) 
{ 
    if (argc != 2) {
        fprintf(stderr, "usage: %s <n>\n", argv[0]);
        exit(1);
    }

    int n = atoi(argv[1]);

    if (n < 0) {
        fprintf(stderr, "Invalid size\n");
        exit(1);
    } 
    
    // Host & device inputs and outputs
    float *h_mat, *h_vec, *h_out;
    float *d_mat, *d_vec, *d_out;

    // Allocate host memory
    h_mat = (float*) malloc(sizeof(float) * n * n);
    h_vec = (float*) malloc(sizeof(float) * n);
    h_out = (float*) malloc(sizeof(float) * n);

    // Allocate device memory 
    cudaMalloc((void**) &d_mat, sizeof(float) * n * n);
    cudaMalloc((void**) &d_vec, sizeof(float) * n);
    cudaMalloc((void**) &d_out, sizeof(float) * n);

    // Initialize host matrix
    for (int i = 0; i < n; i++)
        for (int j = 0; j < n; j++)
            h_mat[i * n + j] = 0.05;
    
    // Initialize host vector
    for (int i = 0; i < n; i++)
        h_vec[i] = 0.05;

	// Transfer data from host to device memory
	cudaMemcpy(d_mat, h_mat, sizeof(float) * n * n, cudaMemcpyHostToDevice);
    cudaMemcpy(d_vec, h_vec, sizeof(float) * n, cudaMemcpyHostToDevice);
    
    cudaEvent_t start, finish;
    float elapsed_milliseconds;

    // Use event to calculate time
	cudaEventCreate(&start); 
	cudaEventCreate(&finish);

	cudaEventRecord(start, 0);
    matrix_vector_multiplication<<<n/THREADS_PER_BLOCK + 1, THREADS_PER_BLOCK>>>(d_mat, d_vec, d_out, n);
    cudaEventRecord(finish, 0); 

	cudaEventSynchronize(finish);  // Wait for stop event to complete
	cudaEventElapsedTime(&elapsed_milliseconds, start, finish);  // Calculate the time difference (millisecond level)

    // Transfer data back to host memory
	cudaMemcpy(h_out, d_out, sizeof(float) * n, cudaMemcpyDeviceToHost);

    printf("%f\n", h_out[0]);
    printf("GPU Elapsed time = %.2fs\n", elapsed_milliseconds/1000.0);
    
    // Deallocate device memory
    cudaFree(d_mat);
    cudaFree(d_vec);
    cudaFree(d_vec);

    // Deallocate host memory
    free(h_mat); 
    free(h_vec); 
    free(h_out);

    return 0;
}
	.file	"tmpxft_0021752e_00000000-6_cuda_mat_vec_multiplication.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2030:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z53__device_stub__Z28matrix_vector_multiplicationPfS_S_iPfS_S_i
	.type	_Z53__device_stub__Z28matrix_vector_multiplicationPfS_S_iPfS_S_i, @function
_Z53__device_stub__Z28matrix_vector_multiplicationPfS_S_iPfS_S_i:
.LFB2052:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z28matrix_vector_multiplicationPfS_S_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L2:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2052:
	.size	_Z53__device_stub__Z28matrix_vector_multiplicationPfS_S_iPfS_S_i, .-_Z53__device_stub__Z28matrix_vector_multiplicationPfS_S_iPfS_S_i
	.globl	_Z28matrix_vector_multiplicationPfS_S_i
	.type	_Z28matrix_vector_multiplicationPfS_S_i, @function
_Z28matrix_vector_multiplicationPfS_S_i:
.LFB2053:
	.cfi_startproc
	endbr64
	jmp	_Z53__device_stub__Z28matrix_vector_multiplicationPfS_S_iPfS_S_i
	.cfi_endproc
.LFE2053:
	.size	_Z28matrix_vector_multiplicationPfS_S_i, .-_Z28matrix_vector_multiplicationPfS_S_i
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"usage: %s <n>\n"
.LC1:
	.string	"Invalid size\n"
.LC3:
	.string	"%f\n"
.LC5:
	.string	"GPU Elapsed time = %.2fs\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	cmpl	$2, %edi
	je	.L9
	movq	(%rsi), %rcx
	movq	stderr(%rip), %rdi
	leaq	.LC0(%rip), %rdx
	movl	$2, %esi
	call	__fprintf_chk@PLT
	jmp	.L20
.L9:
	movq	8(%rsi), %rdi
	call	atoi@PLT
	movl	%eax, %ebp
	testl	%eax, %eax
	jns	.L10
	movq	stderr(%rip), %rdi
	leaq	.LC1(%rip), %rdx
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
.L20:
	movl	$1, %edi
	call	exit@PLT
.L10:
	movslq	%eax, %rbx
	movq	%rbx, %r15
	imulq	%rbx, %r15
	salq	$2, %rbx
	salq	$2, %r15
	movq	%r15, %rdi
	call	malloc@PLT
	movq	%rbx, %rdi
	movq	%rax, %r14
	call	malloc@PLT
	movq	%rbx, %rdi
	movq	%rax, %r13
	call	malloc@PLT
	leaq	8(%rsp), %rdi
	movq	%r15, %rsi
	movq	%rax, %r12
	call	cudaMalloc@PLT
	leaq	16(%rsp), %rdi
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
	leaq	24(%rsp), %rdi
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
	movss	.LC2(%rip), %xmm0
	movq	%r14, %rcx
	xorl	%edx, %edx
.L11:
	xorl	%eax, %eax
	cmpl	%ebp, %edx
	je	.L21
.L12:
	movss	%xmm0, (%rcx,%rax,4)
	incq	%rax
	cmpl	%eax, %ebp
	jg	.L12
	incl	%edx
	addq	%rbx, %rcx
	jmp	.L11
.L21:
	movss	.LC2(%rip), %xmm0
.L13:
	cmpl	%eax, %ebp
	jle	.L22
	movss	%xmm0, 0(%r13,%rax,4)
	incq	%rax
	jmp	.L13
.L22:
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movq	%r15, %rdx
	movq	%r14, %rsi
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rdi
	movq	%rbx, %rdx
	movq	%r13, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	leaq	32(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	40(%rsp), %rdi
	call	cudaEventCreate@PLT
	movq	32(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movl	%ebp, %eax
	movl	$16777217, %edx
	xorl	%r9d, %r9d
	sarl	$8, %eax
	salq	$8, %rdx
	xorl	%r8d, %r8d
	movl	$1, %ecx
	incl	%eax
	movq	%rdx, 60(%rsp)
	movl	%eax, 48(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 52(%rsp)
	movq	48(%rsp), %rdi
	movl	56(%rsp), %esi
	movl	$1, 68(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L15
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rsi
	movl	%ebp, %ecx
	movq	8(%rsp), %rdi
	call	_Z53__device_stub__Z28matrix_vector_multiplicationPfS_S_iPfS_S_i
.L15:
	movq	40(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	40(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	40(%rsp), %rdx
	movq	32(%rsp), %rsi
	leaq	60(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	movq	24(%rsp), %rsi
	movq	%rbx, %rdx
	movq	%r12, %rdi
	movl	$2, %ecx
	call	cudaMemcpy@PLT
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	(%r12), %xmm0
	call	__printf_chk@PLT
	movl	$2, %edi
	movb	$1, %al
	leaq	.LC5(%rip), %rsi
	cvtss2sd	60(%rsp), %xmm0
	divsd	.LC4(%rip), %xmm0
	call	__printf_chk@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	%r14, %rdi
	call	free@PLT
	movq	%r13, %rdi
	call	free@PLT
	movq	%r12, %rdi
	call	free@PLT
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L16
	call	__stack_chk_fail@PLT
.L16:
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	main, .-main
	.section	.rodata.str1.1
.LC6:
	.string	"_Z28matrix_vector_multiplicationPfS_S_i"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2055:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC6(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z28matrix_vector_multiplicationPfS_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2055:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC2:
	.long	1028443341
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC4:
	.long	0
	.long	1083129856
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <stdio.h>
#include <hip/hip_runtime.h>


#define THREADS_PER_BLOCK 256
#define MULTIPLICATIONS 4096

/**
 * Multiply square matrix (n x n) by the vector of size n.
 * 
 * 
 * @param mat Input matrix.
 * @param vec Input vector.
 * @param out Output vector.
 * @param n   Dimension.  
 */
__global__ void matrix_vector_multiplication(float *mat, float *vec, float *out, int n) 
{
    int tid = blockIdx.x * blockDim.x + threadIdx.x;

    if (tid < n) {
        float sum = 0;
        
        for (int k = 0; k < MULTIPLICATIONS; k++)
            for (int i = 0; i < n; i++)
                sum += mat[i * n + tid] * vec[i];
        
        out[tid] = sum;            
    }
}

int main(int argc, char const *argv[]) 
{ 
    if (argc != 2) {
        fprintf(stderr, "usage: %s <n>\n", argv[0]);
        exit(1);
    }

    int n = atoi(argv[1]);

    if (n < 0) {
        fprintf(stderr, "Invalid size\n");
        exit(1);
    } 
    
    // Host & device inputs and outputs
    float *h_mat, *h_vec, *h_out;
    float *d_mat, *d_vec, *d_out;

    // Allocate host memory
    h_mat = (float*) malloc(sizeof(float) * n * n);
    h_vec = (float*) malloc(sizeof(float) * n);
    h_out = (float*) malloc(sizeof(float) * n);

    // Allocate device memory 
    hipMalloc((void**) &d_mat, sizeof(float) * n * n);
    hipMalloc((void**) &d_vec, sizeof(float) * n);
    hipMalloc((void**) &d_out, sizeof(float) * n);

    // Initialize host matrix
    for (int i = 0; i < n; i++)
        for (int j = 0; j < n; j++)
            h_mat[i * n + j] = 0.05;
    
    // Initialize host vector
    for (int i = 0; i < n; i++)
        h_vec[i] = 0.05;

	// Transfer data from host to device memory
	hipMemcpy(d_mat, h_mat, sizeof(float) * n * n, hipMemcpyHostToDevice);
    hipMemcpy(d_vec, h_vec, sizeof(float) * n, hipMemcpyHostToDevice);
    
    hipEvent_t start, finish;
    float elapsed_milliseconds;

    // Use event to calculate time
	hipEventCreate(&start); 
	hipEventCreate(&finish);

	hipEventRecord(start, 0);
    matrix_vector_multiplication<<<n/THREADS_PER_BLOCK + 1, THREADS_PER_BLOCK>>>(d_mat, d_vec, d_out, n);
    hipEventRecord(finish, 0); 

	hipEventSynchronize(finish);  // Wait for stop event to complete
	hipEventElapsedTime(&elapsed_milliseconds, start, finish);  // Calculate the time difference (millisecond level)

    // Transfer data back to host memory
	hipMemcpy(h_out, d_out, sizeof(float) * n, hipMemcpyDeviceToHost);

    printf("%f\n", h_out[0]);
    printf("GPU Elapsed time = %.2fs\n", elapsed_milliseconds/1000.0);
    
    // Deallocate device memory
    hipFree(d_mat);
    hipFree(d_vec);
    hipFree(d_vec);

    // Deallocate host memory
    free(h_mat); 
    free(h_vec); 
    free(h_out);

    return 0;
}
	.text
	.file	"cuda_mat_vec_multiplication.hip"
	.globl	_Z43__device_stub__matrix_vector_multiplicationPfS_S_i # -- Begin function _Z43__device_stub__matrix_vector_multiplicationPfS_S_i
	.type	_Z43__device_stub__matrix_vector_multiplicationPfS_S_i,@function
_Z43__device_stub__matrix_vector_multiplicationPfS_S_i: # @_Z43__device_stub__matrix_vector_multiplicationPfS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z28matrix_vector_multiplicationPfS_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z43__device_stub__matrix_vector_multiplicationPfS_S_i, .Lfunc_end0-_Z43__device_stub__matrix_vector_multiplicationPfS_S_i
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI1_0:
	.quad	0x408f400000000000              # double 1000
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	cmpl	$2, %edi
	jne	.LBB1_13
# %bb.1:
	movq	8(%rsi), %rdi
	callq	atoi
	testl	%eax, %eax
	js	.LBB1_14
# %bb.2:
	movl	%eax, %ebp
	movl	%eax, %r15d
	leaq	(,%r15,4), %r12
	movq	%r12, %r13
	imulq	%r15, %r13
	movq	%r13, %rdi
	callq	malloc
	movq	%rax, %rbx
	movq	%r12, %rdi
	callq	malloc
	movq	%rax, %r14
	movq	%r12, %rdi
	callq	malloc
	movq	%rax, 32(%rsp)                  # 8-byte Spill
	leaq	16(%rsp), %rdi
	movq	%r13, %rsi
	callq	hipMalloc
	movq	%rsp, %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	leaq	24(%rsp), %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	testl	%ebp, %ebp
	je	.LBB1_10
# %bb.3:                                # %.lr.ph.preheader
	xorl	%eax, %eax
	xorl	%ecx, %ecx
.LBB1_4:                                # %.lr.ph
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_5 Depth 2
	movl	%eax, %edx
	leaq	(%rbx,%rdx,4), %rdx
	xorl	%esi, %esi
.LBB1_5:                                #   Parent Loop BB1_4 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	$1028443341, (%rdx,%rsi,4)      # imm = 0x3D4CCCCD
	incq	%rsi
	cmpq	%rsi, %r15
	jne	.LBB1_5
# %bb.6:                                # %._crit_edge
                                        #   in Loop: Header=BB1_4 Depth=1
	incq	%rcx
	addl	%ebp, %eax
	cmpq	%r15, %rcx
	jne	.LBB1_4
# %bb.7:                                # %.preheader
	testl	%ebp, %ebp
	je	.LBB1_10
# %bb.8:                                # %.lr.ph53.preheader
	cmpl	$2, %ebp
	movl	$1, %eax
	cmovgel	%ebp, %eax
	xorl	%ecx, %ecx
.LBB1_9:                                # %.lr.ph53
                                        # =>This Inner Loop Header: Depth=1
	movl	$1028443341, (%r14,%rcx,4)      # imm = 0x3D4CCCCD
	incq	%rcx
	cmpq	%rcx, %rax
	jne	.LBB1_9
.LBB1_10:                               # %._crit_edge54
	movq	16(%rsp), %rdi
	movq	%rbx, %rsi
	movq	%r13, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%rsp), %rdi
	movq	%r14, %rsi
	movq	%r12, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	40(%rsp), %r13
	movq	%r13, %rdi
	callq	hipEventCreate
	leaq	8(%rsp), %rdi
	callq	hipEventCreate
	movq	(%r13), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movl	%ebp, %eax
	shrl	$8, %eax
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	leaq	(%rdx,%rax), %rdi
	incq	%rdi
	orq	$256, %rdx                      # imm = 0x100
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_12
# %bb.11:
	movq	16(%rsp), %rdi
	movq	(%rsp), %rsi
	movq	24(%rsp), %rdx
	movl	%ebp, %ecx
	callq	_Z43__device_stub__matrix_vector_multiplicationPfS_S_i
.LBB1_12:
	movq	8(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	8(%rsp), %rdi
	callq	hipEventSynchronize
	movq	40(%rsp), %rsi
	movq	8(%rsp), %rdx
	leaq	52(%rsp), %r13
	movq	%r13, %rdi
	callq	hipEventElapsedTime
	movq	24(%rsp), %rsi
	movq	32(%rsp), %r15                  # 8-byte Reload
	movq	%r15, %rdi
	movq	%r12, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	cvtss2sd	(%r15), %xmm0
	movl	$.L.str.2, %edi
	movb	$1, %al
	callq	printf
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r13), %xmm0
	divsd	.LCPI1_0(%rip), %xmm0
	movl	$.L.str.3, %edi
	movb	$1, %al
	callq	printf
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	(%rsp), %rdi
	callq	hipFree
	movq	(%rsp), %rdi
	callq	hipFree
	movq	%rbx, %rdi
	callq	free
	movq	%r14, %rdi
	callq	free
	movq	%r15, %rdi
	callq	free
	xorl	%eax, %eax
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB1_13:
	.cfi_def_cfa_offset 112
	movq	stderr(%rip), %rdi
	movq	(%rsi), %rdx
	movl	$.L.str, %esi
	xorl	%eax, %eax
	callq	fprintf
	jmp	.LBB1_15
.LBB1_14:
	movq	stderr(%rip), %rcx
	movl	$.L.str.1, %edi
	movl	$13, %esi
	movl	$1, %edx
	callq	fwrite@PLT
.LBB1_15:
	movl	$1, %edi
	callq	exit
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z28matrix_vector_multiplicationPfS_S_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z28matrix_vector_multiplicationPfS_S_i,@object # @_Z28matrix_vector_multiplicationPfS_S_i
	.section	.rodata,"a",@progbits
	.globl	_Z28matrix_vector_multiplicationPfS_S_i
	.p2align	3, 0x0
_Z28matrix_vector_multiplicationPfS_S_i:
	.quad	_Z43__device_stub__matrix_vector_multiplicationPfS_S_i
	.size	_Z28matrix_vector_multiplicationPfS_S_i, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"usage: %s <n>\n"
	.size	.L.str, 15

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"Invalid size\n"
	.size	.L.str.1, 14

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"%f\n"
	.size	.L.str.2, 4

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"GPU Elapsed time = %.2fs\n"
	.size	.L.str.3, 26

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z28matrix_vector_multiplicationPfS_S_i"
	.size	.L__unnamed_1, 40

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z43__device_stub__matrix_vector_multiplicationPfS_S_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z28matrix_vector_multiplicationPfS_S_i
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z28matrix_vector_multiplicationPfS_S_i ; -- Begin function _Z28matrix_vector_multiplicationPfS_S_i
	.globl	_Z28matrix_vector_multiplicationPfS_S_i
	.p2align	8
	.type	_Z28matrix_vector_multiplicationPfS_S_i,@function
_Z28matrix_vector_multiplicationPfS_S_i: ; @_Z28matrix_vector_multiplicationPfS_S_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s8, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s8, v1
	s_cbranch_execz .LBB0_6
; %bb.1:                                ; %.preheader23
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	v_mov_b32_e32 v0, 0
	s_cmp_gt_i32 s8, 0
	s_mov_b32 s10, 0
	s_cselect_b32 s9, -1, 0
.LBB0_2:                                ; %.preheader
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_3 Depth 2
	v_mov_b32_e32 v2, v1
	s_and_not1_b32 vcc_lo, exec_lo, s9
	s_waitcnt lgkmcnt(0)
	s_mov_b64 s[2:3], s[6:7]
	s_mov_b32 s11, s8
	s_cbranch_vccnz .LBB0_4
.LBB0_3:                                ; %.lr.ph
                                        ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_ashrrev_i32_e32 v3, 31, v2
	s_load_b32 s12, s[2:3], 0x0
	s_add_i32 s11, s11, -1
	s_add_u32 s2, s2, 4
	s_addc_u32 s3, s3, 0
	v_lshlrev_b64 v[3:4], 2, v[2:3]
	v_add_nc_u32_e32 v2, s8, v2
	s_cmp_eq_u32 s11, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v3, vcc_lo, s4, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
	global_load_b32 v3, v[3:4], off
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_fmac_f32_e32 v0, s12, v3
	s_cbranch_scc0 .LBB0_3
.LBB0_4:                                ; %._crit_edge
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_add_i32 s10, s10, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmpk_eq_i32 s10, 0x1000
	s_cbranch_scc0 .LBB0_2
; %bb.5:
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, vcc_lo, s0, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
	global_store_b32 v[1:2], v0, off
.LBB0_6:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z28matrix_vector_multiplicationPfS_S_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z28matrix_vector_multiplicationPfS_S_i, .Lfunc_end0-_Z28matrix_vector_multiplicationPfS_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 264
; NumSgprs: 18
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z28matrix_vector_multiplicationPfS_S_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z28matrix_vector_multiplicationPfS_S_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     5
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
