#include <stdio.h>
#include <assert.h>
#include <stdlib.h>
#include <string.h>
#include <time.h>
#include <cuda.h>

#define MAX 1000
#define DISPLAY 1

__global__ void histoKernel(int*, int, int*);
__global__ void reduceKernel(int*, int*, int);

static double CLOCK();

int main(int argc, char* argv[]) {
  double start, end; // Timing
  // Host
  int *data, data_sz;
  int class_cnt;
  int class_sz;
  int node_cnt;      // To compare with Q1.
  int *result;

  data_sz   = atoi(argv[1]);
  class_cnt = atoi(argv[2]);
  node_cnt  = atoi(argv[3]);
  class_sz    = MAX/class_cnt;

  data         = (int*) malloc(sizeof(int) * data_sz);
  result       = (int*) malloc(sizeof(int) * class_cnt);
  for (int i=0; i<data_sz; ++i)
    data[i] = rand() % MAX;

  // Device
  int* data_device;
  int* result_extd_device; // extended
  int* result_device;

  cudaMalloc(&data_device,        sizeof(int) * data_sz);
  cudaMalloc(&result_extd_device, sizeof(int) * class_cnt * node_cnt);
  cudaMalloc(&result_device,      sizeof(int) * class_cnt);
  cudaMemcpy(data_device, data,   sizeof(int) * data_sz,
		                cudaMemcpyHostToDevice);
  // Actual computation
  start = CLOCK();
  cudaMemset(result_extd_device, 0, sizeof(int) * class_cnt * node_cnt);
  histoKernel<<<node_cnt, class_cnt>>>(data_device, data_sz, 
		                                    result_extd_device);
  // Reduction
  cudaMemset(result_device, 0, sizeof(int) * class_cnt);
  reduceKernel<<<1, class_cnt>>>(result_extd_device, result_device, node_cnt);
  cudaDeviceSynchronize();
  end = CLOCK();

  cudaMemcpy(result, result_device, sizeof(int) * class_cnt,
		                      cudaMemcpyDeviceToHost);
  printf("[CUDA] Histogramming took %.3f milliseconds.\n", end-start);

#ifdef DISPLAY
  for (int i=0; i<class_cnt; ++i) {
    printf("[%3d - %4d[: %d\n", i*class_sz, (i+1)*class_sz,
	                                      result[i]);
  }
#endif // DISPLAY
  return 0;
}

__global__ void
histoKernel(int* data, int data_sz, int* result) {
  int i, j;
  int left_bound, right_bound;
  int class_sz;
  int chunk_sz;

  chunk_sz = data_sz/blockDim.x;
  class_sz = MAX/blockDim.x;

  for (i = blockIdx.x; i < blockDim.x; i += gridDim.x) {
    left_bound  = i * chunk_sz;
    right_bound = (i + 1) * chunk_sz;
    for (j = left_bound; j < right_bound; ++j) {
      if ((data[j] >= threadIdx.x*class_sz) && 
	  (data[j] < (threadIdx.x+1)*class_sz)) {
        result[blockIdx.x * blockDim.x + threadIdx.x] += 1;
      }
    }
  }
}

__global__ void
reduceKernel(int* input, int* output, int node_cnt) {
  for (int i=0; i<node_cnt; ++i) {
    output[threadIdx.x] += input[blockDim.x * i + threadIdx.x];
  }
}

double CLOCK() {
  struct timespec t = {0, 0};
  clock_gettime(CLOCK_MONOTONIC, &t);

  return (double) (t.tv_sec*1.0e3 + t.tv_nsec*1.0e-6);  
}

	.file	"tmpxft_0026661e_00000000-6_cudaHistogramming.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL5CLOCKv, @function
_ZL5CLOCKv:
.LFB2028:
	.cfi_startproc
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movl	$1, %edi
	movq	%fs:40, %rax
	movq	%rax, 24(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rsi
	xorl	%eax, %eax
	movq	%rax, 8(%rsp)
	movq	%rax, 16(%rsp)
	call	clock_gettime@PLT
	cvtsi2sdq	8(%rsp), %xmm0
	mulsd	.LC0(%rip), %xmm0
	cvtsi2sdq	16(%rsp), %xmm1
	mulsd	.LC1(%rip), %xmm1
	addsd	%xmm1, %xmm0
	movq	24(%rsp), %rax
	subq	%fs:40, %rax
	je	.L2
	call	__stack_chk_fail@PLT
.L2:
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	_ZL5CLOCKv, .-_ZL5CLOCKv
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2031:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2031:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z34__device_stub__Z11histoKernelPiiS_PiiS_
	.type	_Z34__device_stub__Z11histoKernelPiiS_PiiS_, @function
_Z34__device_stub__Z11histoKernelPiiS_PiiS_:
.LFB2053:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movl	%esi, 20(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L6
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z11histoKernelPiiS_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L6:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L8
	call	__stack_chk_fail@PLT
.L8:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2053:
	.size	_Z34__device_stub__Z11histoKernelPiiS_PiiS_, .-_Z34__device_stub__Z11histoKernelPiiS_PiiS_
	.globl	_Z11histoKernelPiiS_
	.type	_Z11histoKernelPiiS_, @function
_Z11histoKernelPiiS_:
.LFB2054:
	.cfi_startproc
	endbr64
	jmp	_Z34__device_stub__Z11histoKernelPiiS_PiiS_
	.cfi_endproc
.LFE2054:
	.size	_Z11histoKernelPiiS_, .-_Z11histoKernelPiiS_
	.globl	_Z35__device_stub__Z12reduceKernelPiS_iPiS_i
	.type	_Z35__device_stub__Z12reduceKernelPiS_iPiS_i, @function
_Z35__device_stub__Z12reduceKernelPiS_iPiS_i:
.LFB2055:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L11
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z12reduceKernelPiS_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L11:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L13
	call	__stack_chk_fail@PLT
.L13:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2055:
	.size	_Z35__device_stub__Z12reduceKernelPiS_iPiS_i, .-_Z35__device_stub__Z12reduceKernelPiS_iPiS_i
	.globl	_Z12reduceKernelPiS_i
	.type	_Z12reduceKernelPiS_i, @function
_Z12reduceKernelPiS_i:
.LFB2056:
	.cfi_startproc
	endbr64
	jmp	_Z35__device_stub__Z12reduceKernelPiS_iPiS_i
	.cfi_endproc
.LFE2056:
	.size	_Z12reduceKernelPiS_i, .-_Z12reduceKernelPiS_i
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC2:
	.string	"[CUDA] Histogramming took %.3f milliseconds.\n"
.LC3:
	.string	"[%3d - %4d[: %d\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rsi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$104, %rsp
	.cfi_def_cfa_offset 160
	movq	8(%rsi), %rdi
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	call	atoi@PLT
	movq	16(%rbp), %rdi
	movl	%eax, %r12d
	call	atoi@PLT
	movq	24(%rbp), %rdi
	movslq	%eax, %r15
	call	atoi@PLT
	movq	%r15, %rbx
	movl	%eax, %ebp
	movl	$1000, %eax
	cltd
	idivl	%r15d
	movl	%eax, 20(%rsp)
	movslq	%r12d, %rax
	salq	$2, %rax
	movq	%rax, %rdi
	movq	%rax, (%rsp)
	call	malloc@PLT
	movq	%rax, %r14
	leaq	0(,%r15,4), %rax
	movq	%rax, %rdi
	movq	%rax, 8(%rsp)
	call	malloc@PLT
	xorl	%ecx, %ecx
	movq	%rax, %r13
.L17:
	cmpl	%ecx, %r12d
	jle	.L25
	movq	%rcx, 24(%rsp)
	call	rand@PLT
	movl	$1000, %ecx
	cltd
	idivl	%ecx
	movq	24(%rsp), %rcx
	movl	%edx, (%r14,%rcx,4)
	incq	%rcx
	jmp	.L17
.L25:
	movq	(%rsp), %rsi
	leaq	40(%rsp), %rdi
	call	cudaMalloc@PLT
	movslq	%ebp, %rax
	leaq	48(%rsp), %rdi
	imulq	%r15, %rax
	leaq	0(,%rax,4), %r15
	movq	%r15, %rsi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rsi
	leaq	56(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	(%rsp), %rdx
	movq	40(%rsp), %rdi
	movq	%r14, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	call	_ZL5CLOCKv
	movq	48(%rsp), %rdi
	xorl	%esi, %esi
	movq	%r15, %rdx
	movsd	%xmm0, (%rsp)
	call	cudaMemset@PLT
	movl	%ebx, 76(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movabsq	$4294967297, %rax
	movl	%ebp, 64(%rsp)
	movq	%rax, 80(%rsp)
	movl	84(%rsp), %ecx
	movq	%rax, 68(%rsp)
	movq	76(%rsp), %rdx
	movq	64(%rsp), %rdi
	movl	72(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L19
	movq	48(%rsp), %rdx
	movq	40(%rsp), %rdi
	movl	%r12d, %esi
	call	_Z34__device_stub__Z11histoKernelPiiS_PiiS_
.L19:
	movq	8(%rsp), %rdx
	movq	56(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaMemset@PLT
	movl	%ebx, 76(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movabsq	$4294967297, %rdi
	movl	$1, %esi
	movl	$1, 72(%rsp)
	movq	%rdi, 80(%rsp)
	movl	84(%rsp), %ecx
	movq	76(%rsp), %rdx
	movq	%rdi, 64(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L20
	movq	56(%rsp), %rsi
	movq	48(%rsp), %rdi
	movl	%ebp, %edx
	call	_Z35__device_stub__Z12reduceKernelPiS_iPiS_i
.L20:
	call	cudaDeviceSynchronize@PLT
	xorl	%ebp, %ebp
	leaq	.LC3(%rip), %r14
	call	_ZL5CLOCKv
	movq	8(%rsp), %rdx
	movq	56(%rsp), %rsi
	movq	%r13, %rdi
	movl	$2, %ecx
	movsd	%xmm0, 24(%rsp)
	call	cudaMemcpy@PLT
	movsd	24(%rsp), %xmm0
	subsd	(%rsp), %xmm0
	movb	$1, %al
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	call	__printf_chk@PLT
	xorl	%edx, %edx
.L21:
	cmpl	%ebp, %ebx
	jle	.L26
	movl	20(%rsp), %eax
	movl	0(%r13,%rbp,4), %r8d
	movq	%r14, %rsi
	incq	%rbp
	movl	$2, %edi
	leal	(%rdx,%rax), %r12d
	xorl	%eax, %eax
	movl	%r12d, %ecx
	call	__printf_chk@PLT
	movl	%r12d, %edx
	jmp	.L21
.L26:
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L23
	call	__stack_chk_fail@PLT
.L23:
	addq	$104, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	main, .-main
	.section	.rodata.str1.1
.LC4:
	.string	"_Z12reduceKernelPiS_i"
.LC5:
	.string	"_Z11histoKernelPiiS_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2058:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC4(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z12reduceKernelPiS_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC5(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z11histoKernelPiiS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2058:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC0:
	.long	0
	.long	1083129856
	.align 8
.LC1:
	.long	-1598689907
	.long	1051772663
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <stdio.h>
#include <assert.h>
#include <stdlib.h>
#include <string.h>
#include <time.h>
#include <hip/hip_runtime.h>

#define MAX 1000
#define DISPLAY 1

__global__ void histoKernel(int*, int, int*);
__global__ void reduceKernel(int*, int*, int);

static double CLOCK();

int main(int argc, char* argv[]) {
  double start, end; // Timing
  // Host
  int *data, data_sz;
  int class_cnt;
  int class_sz;
  int node_cnt;      // To compare with Q1.
  int *result;

  data_sz   = atoi(argv[1]);
  class_cnt = atoi(argv[2]);
  node_cnt  = atoi(argv[3]);
  class_sz    = MAX/class_cnt;

  data         = (int*) malloc(sizeof(int) * data_sz);
  result       = (int*) malloc(sizeof(int) * class_cnt);
  for (int i=0; i<data_sz; ++i)
    data[i] = rand() % MAX;

  // Device
  int* data_device;
  int* result_extd_device; // extended
  int* result_device;

  hipMalloc(&data_device,        sizeof(int) * data_sz);
  hipMalloc(&result_extd_device, sizeof(int) * class_cnt * node_cnt);
  hipMalloc(&result_device,      sizeof(int) * class_cnt);
  hipMemcpy(data_device, data,   sizeof(int) * data_sz,
		                hipMemcpyHostToDevice);
  // Actual computation
  start = CLOCK();
  hipMemset(result_extd_device, 0, sizeof(int) * class_cnt * node_cnt);
  histoKernel<<<node_cnt, class_cnt>>>(data_device, data_sz, 
		                                    result_extd_device);
  // Reduction
  hipMemset(result_device, 0, sizeof(int) * class_cnt);
  reduceKernel<<<1, class_cnt>>>(result_extd_device, result_device, node_cnt);
  hipDeviceSynchronize();
  end = CLOCK();

  hipMemcpy(result, result_device, sizeof(int) * class_cnt,
		                      hipMemcpyDeviceToHost);
  printf("[CUDA] Histogramming took %.3f milliseconds.\n", end-start);

#ifdef DISPLAY
  for (int i=0; i<class_cnt; ++i) {
    printf("[%3d - %4d[: %d\n", i*class_sz, (i+1)*class_sz,
	                                      result[i]);
  }
#endif // DISPLAY
  return 0;
}

__global__ void
histoKernel(int* data, int data_sz, int* result) {
  int i, j;
  int left_bound, right_bound;
  int class_sz;
  int chunk_sz;

  chunk_sz = data_sz/blockDim.x;
  class_sz = MAX/blockDim.x;

  for (i = blockIdx.x; i < blockDim.x; i += gridDim.x) {
    left_bound  = i * chunk_sz;
    right_bound = (i + 1) * chunk_sz;
    for (j = left_bound; j < right_bound; ++j) {
      if ((data[j] >= threadIdx.x*class_sz) && 
	  (data[j] < (threadIdx.x+1)*class_sz)) {
        result[blockIdx.x * blockDim.x + threadIdx.x] += 1;
      }
    }
  }
}

__global__ void
reduceKernel(int* input, int* output, int node_cnt) {
  for (int i=0; i<node_cnt; ++i) {
    output[threadIdx.x] += input[blockDim.x * i + threadIdx.x];
  }
}

double CLOCK() {
  struct timespec t = {0, 0};
  clock_gettime(CLOCK_MONOTONIC, &t);

  return (double) (t.tv_sec*1.0e3 + t.tv_nsec*1.0e-6);  
}

	.text
	.file	"cudaHistogramming.hip"
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI0_0:
	.quad	0x408f400000000000              # double 1000
.LCPI0_1:
	.quad	0x3eb0c6f7a0b5ed8d              # double 9.9999999999999995E-7
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$104, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %rbx
	movq	8(%rsi), %rdi
	callq	atoi
	movl	%eax, %r15d
	movq	16(%rbx), %rdi
	callq	atoi
	movl	%eax, %r14d
	movq	24(%rbx), %rdi
	callq	atoi
	movl	%eax, 12(%rsp)                  # 4-byte Spill
	movl	$1000, %eax                     # imm = 0x3E8
	xorl	%edx, %edx
	idivl	%r14d
	movl	%eax, %ebx
	movslq	%r15d, %rbp
	shlq	$2, %rbp
	movq	%rbp, %rdi
	callq	malloc
	movq	%rax, %r13
	movl	%r14d, 52(%rsp)                 # 4-byte Spill
	movslq	%r14d, %rdi
	shlq	$2, %rdi
	movq	%rdi, 56(%rsp)                  # 8-byte Spill
	callq	malloc
	movq	%rax, %r14
	movl	%r15d, 28(%rsp)                 # 4-byte Spill
	testl	%r15d, %r15d
	jle	.LBB0_3
# %bb.1:                                # %.lr.ph.preheader
	movl	28(%rsp), %r12d                 # 4-byte Reload
	xorl	%r15d, %r15d
.LBB0_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	cltq
	imulq	$274877907, %rax, %rcx          # imm = 0x10624DD3
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$38, %rcx
	addl	%edx, %ecx
	imull	$1000, %ecx, %ecx               # imm = 0x3E8
	subl	%ecx, %eax
	movl	%eax, (%r13,%r15,4)
	incq	%r15
	cmpq	%r15, %r12
	jne	.LBB0_2
.LBB0_3:                                # %._crit_edge
	leaq	64(%rsp), %rdi
	movq	%rbp, %rsi
	callq	hipMalloc
	movslq	12(%rsp), %r12                  # 4-byte Folded Reload
	movq	56(%rsp), %r15                  # 8-byte Reload
	imulq	%r15, %r12
	leaq	40(%rsp), %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	leaq	32(%rsp), %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	leaq	64(%rsp), %rax
	movq	(%rax), %rdi
	movq	%r13, %rsi
	movq	%rbp, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	xorps	%xmm0, %xmm0
	leaq	80(%rsp), %r13
	movaps	%xmm0, (%r13)
	movl	$1, %edi
	movq	%r13, %rsi
	callq	clock_gettime
	xorps	%xmm0, %xmm0
	cvtsi2sdq	(%r13), %xmm0
	mulsd	.LCPI0_0(%rip), %xmm0
	movsd	%xmm0, 16(%rsp)                 # 8-byte Spill
	xorps	%xmm0, %xmm0
	cvtsi2sdq	8(%r13), %xmm0
	mulsd	.LCPI0_1(%rip), %xmm0
	movsd	%xmm0, 72(%rsp)                 # 8-byte Spill
	leaq	40(%rsp), %rax
	movq	(%rax), %rdi
	xorl	%esi, %esi
	movq	%r12, %rdx
	callq	hipMemset
	movl	12(%rsp), %edi                  # 4-byte Reload
	btsq	$32, %rdi
	movl	52(%rsp), %ebp                  # 4-byte Reload
	movl	%ebp, %r13d
	movq	%r13, %r12
	btsq	$32, %r12
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB0_5
# %bb.4:
	movq	64(%rsp), %rdi
	movq	40(%rsp), %rdx
	movl	28(%rsp), %esi                  # 4-byte Reload
	callq	_Z26__device_stub__histoKernelPiiS_
.LBB0_5:
	movsd	16(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	addsd	72(%rsp), %xmm0                 # 8-byte Folded Reload
	movsd	%xmm0, 16(%rsp)                 # 8-byte Spill
	movq	32(%rsp), %rdi
	xorl	%esi, %esi
	movq	56(%rsp), %r15                  # 8-byte Reload
	movq	%r15, %rdx
	callq	hipMemset
	movabsq	$4294967296, %rdi               # imm = 0x100000000
	incq	%rdi
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB0_7
# %bb.6:
	movq	40(%rsp), %rdi
	movq	32(%rsp), %rsi
	movl	12(%rsp), %edx                  # 4-byte Reload
	callq	_Z27__device_stub__reduceKernelPiS_i
.LBB0_7:
	callq	hipDeviceSynchronize
	xorpd	%xmm0, %xmm0
	leaq	80(%rsp), %r12
	movapd	%xmm0, (%r12)
	movl	$1, %edi
	movq	%r12, %rsi
	callq	clock_gettime
	xorps	%xmm0, %xmm0
	cvtsi2sdq	(%r12), %xmm0
	mulsd	.LCPI0_0(%rip), %xmm0
	cvtsi2sdq	8(%r12), %xmm1
	mulsd	.LCPI0_1(%rip), %xmm1
	addsd	%xmm0, %xmm1
	subsd	16(%rsp), %xmm1                 # 8-byte Folded Reload
	movsd	%xmm1, 16(%rsp)                 # 8-byte Spill
	movq	32(%rsp), %rsi
	movq	%r14, %rdi
	movq	%r15, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movl	$.L.str, %edi
	movsd	16(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	movb	$1, %al
	callq	printf
	testl	%ebp, %ebp
	jle	.LBB0_10
# %bb.8:                                # %.lr.ph58.preheader
	xorl	%esi, %esi
	xorl	%r15d, %r15d
.LBB0_9:                                # %.lr.ph58
                                        # =>This Inner Loop Header: Depth=1
	leal	(%rbx,%rsi), %ebp
	movl	(%r14,%r15,4), %ecx
	incq	%r15
	movl	$.L.str.1, %edi
                                        # kill: def $esi killed $esi killed $rsi
	movl	%ebp, %edx
	xorl	%eax, %eax
	callq	printf
	movl	%ebp, %esi
	cmpq	%r15, %r13
	jne	.LBB0_9
.LBB0_10:                               # %._crit_edge59
	xorl	%eax, %eax
	addq	$104, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	main, .Lfunc_end0-main
	.cfi_endproc
                                        # -- End function
	.globl	_Z26__device_stub__histoKernelPiiS_ # -- Begin function _Z26__device_stub__histoKernelPiiS_
	.type	_Z26__device_stub__histoKernelPiiS_,@function
_Z26__device_stub__histoKernelPiiS_:    # @_Z26__device_stub__histoKernelPiiS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	12(%rsp), %rcx
	movl	%esi, (%rcx)
	leaq	32(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11histoKernelPiiS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z26__device_stub__histoKernelPiiS_, .Lfunc_end1-_Z26__device_stub__histoKernelPiiS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z27__device_stub__reduceKernelPiS_i # -- Begin function _Z27__device_stub__reduceKernelPiS_i
	.type	_Z27__device_stub__reduceKernelPiS_i,@function
_Z27__device_stub__reduceKernelPiS_i:   # @_Z27__device_stub__reduceKernelPiS_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z12reduceKernelPiS_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z27__device_stub__reduceKernelPiS_i, .Lfunc_end2-_Z27__device_stub__reduceKernelPiS_i
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11histoKernelPiiS_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z12reduceKernelPiS_i, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z11histoKernelPiiS_,@object    # @_Z11histoKernelPiiS_
	.section	.rodata,"a",@progbits
	.globl	_Z11histoKernelPiiS_
	.p2align	3, 0x0
_Z11histoKernelPiiS_:
	.quad	_Z26__device_stub__histoKernelPiiS_
	.size	_Z11histoKernelPiiS_, 8

	.type	_Z12reduceKernelPiS_i,@object   # @_Z12reduceKernelPiS_i
	.globl	_Z12reduceKernelPiS_i
	.p2align	3, 0x0
_Z12reduceKernelPiS_i:
	.quad	_Z27__device_stub__reduceKernelPiS_i
	.size	_Z12reduceKernelPiS_i, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"[CUDA] Histogramming took %.3f milliseconds.\n"
	.size	.L.str, 46

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"[%3d - %4d[: %d\n"
	.size	.L.str.1, 17

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z11histoKernelPiiS_"
	.size	.L__unnamed_1, 21

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z12reduceKernelPiS_i"
	.size	.L__unnamed_2, 22

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z26__device_stub__histoKernelPiiS_
	.addrsig_sym _Z27__device_stub__reduceKernelPiS_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z11histoKernelPiiS_
	.addrsig_sym _Z12reduceKernelPiS_i
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z11histoKernelPiiS_    ; -- Begin function _Z11histoKernelPiiS_
	.globl	_Z11histoKernelPiiS_
	.p2align	8
	.type	_Z11histoKernelPiiS_,@function
_Z11histoKernelPiiS_:                   ; @_Z11histoKernelPiiS_
; %bb.0:
	s_load_b32 s2, s[0:1], 0x24
	s_add_u32 s4, s0, 24
	s_addc_u32 s5, s1, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s8, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_ge_u32 s15, s8
	s_cbranch_scc1 .LBB0_8
; %bb.1:                                ; %.lr.ph23
	v_cvt_f32_u32_e32 v5, s8
	s_clause 0x2
	s_load_b32 s9, s[0:1], 0x8
	s_load_b64 s[6:7], s[0:1], 0x10
	s_load_b64 s[2:3], s[0:1], 0x0
	s_load_b32 s1, s[4:5], 0x0
	s_sub_i32 s4, 0, s8
	v_rcp_iflag_f32_e32 v1, v5
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v2, 0x4f7ffffe, v1
	v_mul_f32_e32 v3, 0x447a0000, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_cvt_u32_f32_e32 v4, v2
	v_mad_u64_u32 v[1:2], null, s15, s8, v[0:1]
	v_mov_b32_e32 v2, 0
	v_trunc_f32_e32 v3, v3
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s0, v4
	v_fma_f32 v6, -v3, v5, 0x447a0000
	s_delay_alu instid0(VALU_DEP_2)
	s_mul_i32 s4, s4, s0
	v_cvt_u32_f32_e32 v7, v3
	s_mul_hi_u32 s4, s0, s4
	v_lshlrev_b64 v[3:4], 2, v[1:2]
	s_add_i32 s0, s0, s4
	v_cmp_ge_f32_e64 vcc_lo, |v6|, v5
	s_waitcnt lgkmcnt(0)
	s_mul_hi_u32 s0, s9, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mul_i32 s4, s0, s8
	s_add_i32 s5, s0, 1
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v7, vcc_lo
	s_sub_i32 s4, s9, s4
	v_add_co_u32 v3, vcc_lo, s6, v3
	s_sub_i32 s6, s4, s8
	s_cmp_ge_u32 s4, s8
	v_and_b32_e32 v5, 0xffff, v1
	s_cselect_b32 s0, s5, s0
	s_cselect_b32 s4, s6, s4
	s_add_i32 s5, s0, 1
	s_cmp_ge_u32 s4, s8
	v_add_co_ci_u32_e32 v4, vcc_lo, s7, v4, vcc_lo
	v_mul_u32_u24_e32 v1, v0, v5
	v_mad_u32_u24 v0, v0, v5, v5
	s_cselect_b32 s9, s5, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mul_i32 s4, s9, s15
	s_mul_i32 s10, s9, s1
.LBB0_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_4 Depth 2
	s_mul_i32 s11, s15, s9
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s12, s11, s9
	s_cmp_ge_i32 s11, s12
	s_cbranch_scc1 .LBB0_7
; %bb.3:                                ; %.lr.ph.preheader
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_ashr_i32 s5, s4, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[6:7], s[4:5], 2
	s_add_u32 s6, s2, s6
	s_addc_u32 s7, s3, s7
.LBB0_4:                                ; %.lr.ph
                                        ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	global_load_b32 v5, v2, s[6:7]
	s_waitcnt vmcnt(0)
	v_cmp_ge_u32_e32 vcc_lo, v5, v1
	v_cmp_lt_u32_e64 s0, v5, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s5, vcc_lo, s0
	s_and_saveexec_b32 s0, s5
	s_cbranch_execz .LBB0_6
; %bb.5:                                ;   in Loop: Header=BB0_4 Depth=2
	global_load_b32 v5, v[3:4], off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v5, 1, v5
	global_store_b32 v[3:4], v5, off
.LBB0_6:                                ;   in Loop: Header=BB0_4 Depth=2
	s_or_b32 exec_lo, exec_lo, s0
	s_add_i32 s11, s11, 1
	s_add_u32 s6, s6, 4
	s_addc_u32 s7, s7, 0
	s_cmp_lt_i32 s11, s12
	s_cbranch_scc1 .LBB0_4
.LBB0_7:                                ; %._crit_edge
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_add_i32 s15, s15, s1
	s_add_i32 s4, s4, s10
	s_cmp_lt_u32 s15, s8
	s_cbranch_scc1 .LBB0_2
.LBB0_8:                                ; %._crit_edge24
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11histoKernelPiiS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z11histoKernelPiiS_, .Lfunc_end0-_Z11histoKernelPiiS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 444
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z12reduceKernelPiS_i   ; -- Begin function _Z12reduceKernelPiS_i
	.globl	_Z12reduceKernelPiS_i
	.p2align	8
	.type	_Z12reduceKernelPiS_i,@function
_Z12reduceKernelPiS_i:                  ; @_Z12reduceKernelPiS_i
; %bb.0:
	s_load_b32 s2, s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s2, 1
	s_cbranch_scc1 .LBB1_3
; %bb.1:                                ; %.lr.ph
	s_load_b128 s[4:7], s[0:1], 0x0
	v_dual_mov_b32 v1, 0 :: v_dual_lshlrev_b32 v2, 2, v0
	s_load_b32 s0, s[0:1], 0x24
	s_waitcnt lgkmcnt(0)
	global_load_b32 v4, v2, s[6:7]
	v_add_co_u32 v2, s1, s6, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v3, null, s7, 0, s1
	s_and_b32 s0, s0, 0xffff
.LBB1_2:                                ; =>This Inner Loop Header: Depth=1
	v_lshlrev_b64 v[5:6], 2, v[0:1]
	v_add_nc_u32_e32 v0, s0, v0
	s_add_i32 s2, s2, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	s_cmp_eq_u32 s2, 0
	v_add_co_u32 v5, vcc_lo, s4, v5
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v6, vcc_lo, s5, v6, vcc_lo
	global_load_b32 v5, v[5:6], off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v4, v4, v5
	global_store_b32 v[2:3], v4, off
	s_cbranch_scc0 .LBB1_2
.LBB1_3:                                ; %._crit_edge
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z12reduceKernelPiS_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 8
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z12reduceKernelPiS_i, .Lfunc_end1-_Z12reduceKernelPiS_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 164
; NumSgprs: 10
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 1
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 10
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z11histoKernelPiiS_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z11histoKernelPiiS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     8
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z12reduceKernelPiS_i
    .private_segment_fixed_size: 0
    .sgpr_count:     10
    .sgpr_spill_count: 0
    .symbol:         _Z12reduceKernelPiS_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     7
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
