#include <iostream>
#include "cuda_runtime.h"
#include "device_launch_parameters.h"
#include <stdio.h>
#include <stdlib.h>

#define SIZE 1000
#define TILE 16

__global__ void matMultiplyOnDevice(int* a, int* b, int* c, int m, int n, int k) {
    int row = blockIdx.y * blockDim.y + threadIdx.y;
    int col = blockIdx.x * blockDim.x + threadIdx.x;
    int tempSum = 0;
    if(row < m && col < k) {
        for(int i = 0; i < n; i++) {
            tempSum += a[row * n + i] * b[i * k + col];
        }
        c[row * k + col] = tempSum;
    }
}


__global__ void matMultiplyTiled(int* a, int* b, int* c, int m, int n, int k) {

    // declare shared memory for tiles
    __shared__ int shared_a[TILE * TILE];
    __shared__ int shared_b[TILE * TILE];

    int row = blockIdx.y * TILE + threadIdx.y;
    int col = blockIdx.x * TILE + threadIdx.x;

    int tempSum = 0;
    // sweep tile over matrix (same calculation as grid dim)
    for (int i = 0; i < (TILE + n - 1) / TILE; i++) {
        // tile overshoot should be 0
        if ((i * TILE + threadIdx.x) < n && row < m) {
            shared_a[(threadIdx.y * TILE) + threadIdx.x] = a[row * n + i * TILE + threadIdx.x];
        }
        else {
            shared_a[(threadIdx.y * TILE) + threadIdx.x] = 0;
        }

        if ((i * TILE + threadIdx.y) < n && col < k) {
            shared_b[(threadIdx.y * TILE) + threadIdx.x] = b[(i * TILE + threadIdx.y) * k + col];
        }
        else {
            shared_b[(threadIdx.y * TILE) + threadIdx.x] = 0;
        }
        __syncthreads();

        for (int i = 0; i < TILE; i++) {
            tempSum += shared_a[(threadIdx.y * TILE) + i] * shared_b[(i * TILE) + threadIdx.x];
        }
        __syncthreads();

    }

    // make sure result isn't outside of c
    if (row < m && col < k) {
        c[row * k + col] = tempSum;
    }

}




void matMultiplyOnHost(int* a, int* b, int* c, int m, int n, int k) {
    for (int row= 0; row < m; row++) {
        for (int col = 0; col < k; col++) {
            int tempSum = 0.0;
            for (int h = 0; h < n; h++) {
                tempSum += a[row * n + h] * b[h * k + col];
            }
            c[row * k + col] = tempSum;
        }
    }
}




int main() {
    int* h_a;
    int* h_b;
    int* h_c;
    int* h_check;

    int* d_a;
    int* d_b;
    int* d_c;

    int m = 1000;
    int n = 2000;
    int k = 1500;

    cudaEvent_t start, stop;
    cudaEventCreate(&start);
    cudaEventCreate(&stop);

    clock_t cpu_startTime, cpu_endTime;
    double cpu_ElapsedTime = 0.0;

    // allocate host memory for operand and resultant matrices
    cudaMallocHost((void**)&h_a, sizeof(int) * m * n);
    cudaMallocHost((void**)&h_b, sizeof(int) * n * k);
    cudaMallocHost((void**)&h_c, sizeof(int) * m * k);
    cudaMallocHost((void**)&h_check, sizeof(int) * m * k);

    printf("Generating Matrices\n");
    // initialize operand matrices
    srand(5);
    for (int i = 0; i < m * n; i++) {
        //printf("%d\n", i);
        h_a[i] = rand() % 1000;
    }

    for (int i = 0; i < n * k; i++) {
        //printf("%d\n", i);
        h_b[i] = rand() % 1000;
    }


    // allocate device memory for operand and resultant matrices
    cudaMalloc((void**)&d_a, sizeof(int) * m * n);
    cudaMalloc((void**)&d_b, sizeof(int) * n * k);
    cudaMalloc((void**)&d_c, sizeof(int) * m * k);

    // copy matrices to device
    cudaMemcpy(d_a, h_a, sizeof(int) * m * n, cudaMemcpyHostToDevice);
    cudaMemcpy(d_b, h_b, sizeof(int) * n * k, cudaMemcpyHostToDevice);

    // define block and grid size
    int blockSize = 32;
    unsigned int grid_rows = (m + blockSize - 1) / blockSize;
    unsigned int grid_cols = (k + blockSize - 1) / blockSize;
    dim3 dimGrid(grid_cols, grid_rows);
    dim3 dimBlock(blockSize, blockSize);

    cudaEventRecord(start);
    matMultiplyOnDevice<<<dimGrid, dimBlock>>>(d_a, d_b, d_c, m, n, k);
    //matMultiplyTiled<<<dimGrid, dimBlock>>>(d_a, d_b, d_c, m, n, k);
    cudaEventRecord(stop);

    cudaMemcpy(h_c, d_c, sizeof(int)* m * k, cudaMemcpyDeviceToHost);
    cudaThreadSynchronize();

    cudaEventSynchronize(stop);

    float milliseconds = 0;
    cudaEventElapsedTime(&milliseconds, start, stop);

    printf("GPU CUDA Time: %.3f ms\n", milliseconds);
/*
    cpu_startTime = clock();
    matMultiplyOnHost(h_a, h_b, h_check, m, n, k);
    cpu_endTime = clock();

    cpu_ElapsedTime = ((cpu_endTime - cpu_startTime)/CLOCKS_PER_SEC);
    printf("CPU Time: %f ms\n", cpu_ElapsedTime);

    for (int j = 0; j < m * k; j++) {
        //printf("h_c[%d] = %d\n", j, h_c[j]);
        //printf("h_check[%d] = %d\n", j, h_check[j]);
        if (h_c[j] != h_check[j]) {
            printf("Some results are wrong\n");
            break;
        }
    }*/

    // free up device and host memory
    cudaFree(d_a);
    cudaFree(d_b);
    cudaFree(d_c);
    cudaFreeHost(h_a);
    cudaFreeHost(h_b);
    cudaFreeHost(h_c);
    cudaFreeHost(h_check);

    printf("Done\n");

    return 0;
}

	.file	"tmpxft_00358d4a_00000000-6_main.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3639:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3639:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z17matMultiplyOnHostPiS_S_iii
	.type	_Z17matMultiplyOnHostPiS_S_iii, @function
_Z17matMultiplyOnHostPiS_S_iii:
.LFB3635:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movslq	%r9d, %rax
	movq	%rsi, %r11
	xorl	%r10d, %r10d
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	salq	$2, %rax
	xorl	%esi, %esi
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%ecx, %ebx
	xorl	%ecx, %ecx
	movq	%rdx, -8(%rsp)
	movq	%rax, -16(%rsp)
.L3:
	cmpl	%ebx, %r10d
	jge	.L2
	movq	-8(%rsp), %rdx
	movslq	%esi, %rax
	leaq	(%rdx,%rax,4), %r15
	movslq	%ecx, %rax
	leaq	(%rdi,%rax,4), %r14
	xorl	%eax, %eax
.L8:
	cmpl	%eax, %r9d
	jle	.L5
	leaq	(%r11,%rax,4), %r12
	xorl	%edx, %edx
	xorl	%ebp, %ebp
.L6:
	cmpl	%edx, %r8d
	jle	.L11
	movl	(%r14,%rdx,4), %r13d
	imull	(%r12), %r13d
	incq	%rdx
	addl	%r13d, %ebp
	movq	-16(%rsp), %r13
	addq	%r13, %r12
	jmp	.L6
.L11:
	movl	%ebp, (%r15,%rax,4)
	incq	%rax
	jmp	.L8
.L5:
	incl	%r10d
	addl	%r9d, %esi
	addl	%r8d, %ecx
	jmp	.L3
.L2:
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3635:
	.size	_Z17matMultiplyOnHostPiS_S_iii, .-_Z17matMultiplyOnHostPiS_S_iii
	.globl	_Z46__device_stub__Z19matMultiplyOnDevicePiS_S_iiiPiS_S_iii
	.type	_Z46__device_stub__Z19matMultiplyOnDevicePiS_S_iiiPiS_S_iii, @function
_Z46__device_stub__Z19matMultiplyOnDevicePiS_S_iiiPiS_S_iii:
.LFB3661:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movl	%r9d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L12
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z19matMultiplyOnDevicePiS_S_iii(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L12:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L14
	call	__stack_chk_fail@PLT
.L14:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3661:
	.size	_Z46__device_stub__Z19matMultiplyOnDevicePiS_S_iiiPiS_S_iii, .-_Z46__device_stub__Z19matMultiplyOnDevicePiS_S_iiiPiS_S_iii
	.globl	_Z19matMultiplyOnDevicePiS_S_iii
	.type	_Z19matMultiplyOnDevicePiS_S_iii, @function
_Z19matMultiplyOnDevicePiS_S_iii:
.LFB3662:
	.cfi_startproc
	endbr64
	jmp	_Z46__device_stub__Z19matMultiplyOnDevicePiS_S_iiiPiS_S_iii
	.cfi_endproc
.LFE3662:
	.size	_Z19matMultiplyOnDevicePiS_S_iii, .-_Z19matMultiplyOnDevicePiS_S_iii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"Generating Matrices\n"
.LC2:
	.string	"GPU CUDA Time: %.3f ms\n"
.LC3:
	.string	"Done\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3636:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movl	$1000, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	xorl	%ebx, %ebx
	subq	$120, %rsp
	.cfi_def_cfa_offset 144
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	64(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	72(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	8(%rsp), %rdi
	movl	$8000000, %esi
	call	cudaMallocHost@PLT
	leaq	16(%rsp), %rdi
	movl	$12000000, %esi
	call	cudaMallocHost@PLT
	leaq	24(%rsp), %rdi
	movl	$6000000, %esi
	call	cudaMallocHost@PLT
	leaq	32(%rsp), %rdi
	movl	$6000000, %esi
	call	cudaMallocHost@PLT
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$5, %edi
	call	srand@PLT
.L18:
	call	rand@PLT
	cltd
	idivl	%ebp
	movq	8(%rsp), %rax
	movl	%edx, (%rax,%rbx)
	addq	$4, %rbx
	cmpq	$8000000, %rbx
	jne	.L18
	xorl	%ebx, %ebx
	movl	$1000, %ebp
.L19:
	call	rand@PLT
	cltd
	idivl	%ebp
	movq	16(%rsp), %rax
	movl	%edx, (%rax,%rbx)
	addq	$4, %rbx
	cmpq	$12000000, %rbx
	jne	.L19
	leaq	40(%rsp), %rdi
	movl	$8000000, %esi
	call	cudaMalloc@PLT
	leaq	48(%rsp), %rdi
	movl	$12000000, %esi
	call	cudaMalloc@PLT
	leaq	56(%rsp), %rdi
	movl	$6000000, %esi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rsi
	movq	40(%rsp), %rdi
	movl	$1, %ecx
	movl	$8000000, %edx
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rsi
	movq	48(%rsp), %rdi
	movl	$1, %ecx
	movl	$12000000, %edx
	call	cudaMemcpy@PLT
	movq	64(%rsp), %rdi
	xorl	%esi, %esi
	movabsq	$137438953519, %rax
	movq	%rax, 80(%rsp)
	subq	$15, %rax
	movl	$1, 88(%rsp)
	movq	%rax, 92(%rsp)
	movl	$1, 100(%rsp)
	call	cudaEventRecord@PLT
	movl	100(%rsp), %ecx
	movl	88(%rsp), %esi
	xorl	%r9d, %r9d
	movq	92(%rsp), %rdx
	movq	80(%rsp), %rdi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L20
	movq	56(%rsp), %rdx
	movq	48(%rsp), %rsi
	movl	$1500, %r9d
	movl	$2000, %r8d
	movq	40(%rsp), %rdi
	movl	$1000, %ecx
	call	_Z46__device_stub__Z19matMultiplyOnDevicePiS_S_iiiPiS_S_iii
.L20:
	movq	72(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	56(%rsp), %rsi
	movq	24(%rsp), %rdi
	movl	$2, %ecx
	movl	$6000000, %edx
	call	cudaMemcpy@PLT
	call	cudaThreadSynchronize@PLT
	movq	72(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	72(%rsp), %rdx
	movq	64(%rsp), %rsi
	leaq	4(%rsp), %rdi
	movl	$0x00000000, 4(%rsp)
	call	cudaEventElapsedTime@PLT
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	4(%rsp), %xmm0
	call	__printf_chk@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	48(%rsp), %rdi
	call	cudaFree@PLT
	movq	56(%rsp), %rdi
	call	cudaFree@PLT
	movq	8(%rsp), %rdi
	call	cudaFreeHost@PLT
	movq	16(%rsp), %rdi
	call	cudaFreeHost@PLT
	movq	24(%rsp), %rdi
	call	cudaFreeHost@PLT
	movq	32(%rsp), %rdi
	call	cudaFreeHost@PLT
	xorl	%eax, %eax
	movl	$2, %edi
	leaq	.LC3(%rip), %rsi
	call	__printf_chk@PLT
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L21
	call	__stack_chk_fail@PLT
.L21:
	addq	$120, %rsp
	.cfi_def_cfa_offset 24
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3636:
	.size	main, .-main
	.text
	.globl	_Z43__device_stub__Z16matMultiplyTiledPiS_S_iiiPiS_S_iii
	.type	_Z43__device_stub__Z16matMultiplyTiledPiS_S_iiiPiS_S_iii, @function
_Z43__device_stub__Z16matMultiplyTiledPiS_S_iiiPiS_S_iii:
.LFB3663:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movl	%r9d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L25
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z16matMultiplyTiledPiS_S_iii(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L25:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L27
	call	__stack_chk_fail@PLT
.L27:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3663:
	.size	_Z43__device_stub__Z16matMultiplyTiledPiS_S_iiiPiS_S_iii, .-_Z43__device_stub__Z16matMultiplyTiledPiS_S_iiiPiS_S_iii
	.globl	_Z16matMultiplyTiledPiS_S_iii
	.type	_Z16matMultiplyTiledPiS_S_iii, @function
_Z16matMultiplyTiledPiS_S_iii:
.LFB3664:
	.cfi_startproc
	endbr64
	jmp	_Z43__device_stub__Z16matMultiplyTiledPiS_S_iiiPiS_S_iii
	.cfi_endproc
.LFE3664:
	.size	_Z16matMultiplyTiledPiS_S_iii, .-_Z16matMultiplyTiledPiS_S_iii
	.section	.rodata.str1.1
.LC4:
	.string	"_Z16matMultiplyTiledPiS_S_iii"
.LC5:
	.string	"_Z19matMultiplyOnDevicePiS_S_iii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3666:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC4(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z16matMultiplyTiledPiS_S_iii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC5(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z19matMultiplyOnDevicePiS_S_iii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3666:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <iostream>
#include "hip/hip_runtime.h"

#include <stdio.h>
#include <stdlib.h>

#define SIZE 1000
#define TILE 16

__global__ void matMultiplyOnDevice(int* a, int* b, int* c, int m, int n, int k) {
    int row = blockIdx.y * blockDim.y + threadIdx.y;
    int col = blockIdx.x * blockDim.x + threadIdx.x;
    int tempSum = 0;
    if(row < m && col < k) {
        for(int i = 0; i < n; i++) {
            tempSum += a[row * n + i] * b[i * k + col];
        }
        c[row * k + col] = tempSum;
    }
}


__global__ void matMultiplyTiled(int* a, int* b, int* c, int m, int n, int k) {

    // declare shared memory for tiles
    __shared__ int shared_a[TILE * TILE];
    __shared__ int shared_b[TILE * TILE];

    int row = blockIdx.y * TILE + threadIdx.y;
    int col = blockIdx.x * TILE + threadIdx.x;

    int tempSum = 0;
    // sweep tile over matrix (same calculation as grid dim)
    for (int i = 0; i < (TILE + n - 1) / TILE; i++) {
        // tile overshoot should be 0
        if ((i * TILE + threadIdx.x) < n && row < m) {
            shared_a[(threadIdx.y * TILE) + threadIdx.x] = a[row * n + i * TILE + threadIdx.x];
        }
        else {
            shared_a[(threadIdx.y * TILE) + threadIdx.x] = 0;
        }

        if ((i * TILE + threadIdx.y) < n && col < k) {
            shared_b[(threadIdx.y * TILE) + threadIdx.x] = b[(i * TILE + threadIdx.y) * k + col];
        }
        else {
            shared_b[(threadIdx.y * TILE) + threadIdx.x] = 0;
        }
        __syncthreads();

        for (int i = 0; i < TILE; i++) {
            tempSum += shared_a[(threadIdx.y * TILE) + i] * shared_b[(i * TILE) + threadIdx.x];
        }
        __syncthreads();

    }

    // make sure result isn't outside of c
    if (row < m && col < k) {
        c[row * k + col] = tempSum;
    }

}




void matMultiplyOnHost(int* a, int* b, int* c, int m, int n, int k) {
    for (int row= 0; row < m; row++) {
        for (int col = 0; col < k; col++) {
            int tempSum = 0.0;
            for (int h = 0; h < n; h++) {
                tempSum += a[row * n + h] * b[h * k + col];
            }
            c[row * k + col] = tempSum;
        }
    }
}




int main() {
    int* h_a;
    int* h_b;
    int* h_c;
    int* h_check;

    int* d_a;
    int* d_b;
    int* d_c;

    int m = 1000;
    int n = 2000;
    int k = 1500;

    hipEvent_t start, stop;
    hipEventCreate(&start);
    hipEventCreate(&stop);

    clock_t cpu_startTime, cpu_endTime;
    double cpu_ElapsedTime = 0.0;

    // allocate host memory for operand and resultant matrices
    hipHostMalloc((void**)&h_a, sizeof(int) * m * n, hipHostMallocDefault);
    hipHostMalloc((void**)&h_b, sizeof(int) * n * k, hipHostMallocDefault);
    hipHostMalloc((void**)&h_c, sizeof(int) * m * k, hipHostMallocDefault);
    hipHostMalloc((void**)&h_check, sizeof(int) * m * k, hipHostMallocDefault);

    printf("Generating Matrices\n");
    // initialize operand matrices
    srand(5);
    for (int i = 0; i < m * n; i++) {
        //printf("%d\n", i);
        h_a[i] = rand() % 1000;
    }

    for (int i = 0; i < n * k; i++) {
        //printf("%d\n", i);
        h_b[i] = rand() % 1000;
    }


    // allocate device memory for operand and resultant matrices
    hipMalloc((void**)&d_a, sizeof(int) * m * n);
    hipMalloc((void**)&d_b, sizeof(int) * n * k);
    hipMalloc((void**)&d_c, sizeof(int) * m * k);

    // copy matrices to device
    hipMemcpy(d_a, h_a, sizeof(int) * m * n, hipMemcpyHostToDevice);
    hipMemcpy(d_b, h_b, sizeof(int) * n * k, hipMemcpyHostToDevice);

    // define block and grid size
    int blockSize = 32;
    unsigned int grid_rows = (m + blockSize - 1) / blockSize;
    unsigned int grid_cols = (k + blockSize - 1) / blockSize;
    dim3 dimGrid(grid_cols, grid_rows);
    dim3 dimBlock(blockSize, blockSize);

    hipEventRecord(start);
    matMultiplyOnDevice<<<dimGrid, dimBlock>>>(d_a, d_b, d_c, m, n, k);
    //matMultiplyTiled<<<dimGrid, dimBlock>>>(d_a, d_b, d_c, m, n, k);
    hipEventRecord(stop);

    hipMemcpy(h_c, d_c, sizeof(int)* m * k, hipMemcpyDeviceToHost);
    hipDeviceSynchronize();

    hipEventSynchronize(stop);

    float milliseconds = 0;
    hipEventElapsedTime(&milliseconds, start, stop);

    printf("GPU CUDA Time: %.3f ms\n", milliseconds);
/*
    cpu_startTime = clock();
    matMultiplyOnHost(h_a, h_b, h_check, m, n, k);
    cpu_endTime = clock();

    cpu_ElapsedTime = ((cpu_endTime - cpu_startTime)/CLOCKS_PER_SEC);
    printf("CPU Time: %f ms\n", cpu_ElapsedTime);

    for (int j = 0; j < m * k; j++) {
        //printf("h_c[%d] = %d\n", j, h_c[j]);
        //printf("h_check[%d] = %d\n", j, h_check[j]);
        if (h_c[j] != h_check[j]) {
            printf("Some results are wrong\n");
            break;
        }
    }*/

    // free up device and host memory
    hipFree(d_a);
    hipFree(d_b);
    hipFree(d_c);
    hipHostFree(h_a);
    hipHostFree(h_b);
    hipHostFree(h_c);
    hipHostFree(h_check);

    printf("Done\n");

    return 0;
}

	.text
	.file	"main.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z34__device_stub__matMultiplyOnDevicePiS_S_iii # -- Begin function _Z34__device_stub__matMultiplyOnDevicePiS_S_iii
	.type	_Z34__device_stub__matMultiplyOnDevicePiS_S_iii,@function
_Z34__device_stub__matMultiplyOnDevicePiS_S_iii: # @_Z34__device_stub__matMultiplyOnDevicePiS_S_iii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	20(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	16(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z19matMultiplyOnDevicePiS_S_iii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z34__device_stub__matMultiplyOnDevicePiS_S_iii, .Lfunc_end0-_Z34__device_stub__matMultiplyOnDevicePiS_S_iii
	.cfi_endproc
                                        # -- End function
	.globl	_Z31__device_stub__matMultiplyTiledPiS_S_iii # -- Begin function _Z31__device_stub__matMultiplyTiledPiS_S_iii
	.type	_Z31__device_stub__matMultiplyTiledPiS_S_iii,@function
_Z31__device_stub__matMultiplyTiledPiS_S_iii: # @_Z31__device_stub__matMultiplyTiledPiS_S_iii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	20(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	16(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16matMultiplyTiledPiS_S_iii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z31__device_stub__matMultiplyTiledPiS_S_iii, .Lfunc_end1-_Z31__device_stub__matMultiplyTiledPiS_S_iii
	.cfi_endproc
                                        # -- End function
	.globl	_Z17matMultiplyOnHostPiS_S_iii  # -- Begin function _Z17matMultiplyOnHostPiS_S_iii
	.type	_Z17matMultiplyOnHostPiS_S_iii,@function
_Z17matMultiplyOnHostPiS_S_iii:         # @_Z17matMultiplyOnHostPiS_S_iii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r9d, -36(%rsp)                 # 4-byte Spill
	movq	%rdx, -8(%rsp)                  # 8-byte Spill
	movq	%rsi, -16(%rsp)                 # 8-byte Spill
	movq	%rdi, -24(%rsp)                 # 8-byte Spill
	testl	%ecx, %ecx
	jle	.LBB2_7
# %bb.1:                                # %.preheader27.lr.ph
	movslq	-36(%rsp), %rax                 # 4-byte Folded Reload
	movl	%ecx, %r9d
	movl	%eax, %r10d
	movl	%r8d, %r11d
	movq	%rax, -32(%rsp)                 # 8-byte Spill
	leaq	(,%rax,4), %rbx
	xorl	%r14d, %r14d
	xorl	%r15d, %r15d
.LBB2_2:                                # %.preheader27
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_4 Depth 2
                                        #       Child Loop BB2_9 Depth 3
	cmpl	$0, -36(%rsp)                   # 4-byte Folded Reload
	jle	.LBB2_6
# %bb.3:                                # %.preheader.lr.ph
                                        #   in Loop: Header=BB2_2 Depth=1
	movl	%r14d, %eax
	movq	-24(%rsp), %rcx                 # 8-byte Reload
	leaq	(%rcx,%rax,4), %r12
	movq	%r15, %rax
	imulq	-32(%rsp), %rax                 # 8-byte Folded Reload
	movq	-8(%rsp), %rcx                  # 8-byte Reload
	leaq	(%rcx,%rax,4), %r13
	movq	-16(%rsp), %rdi                 # 8-byte Reload
	xorl	%eax, %eax
.LBB2_4:                                # %.preheader
                                        #   Parent Loop BB2_2 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB2_9 Depth 3
	testl	%r8d, %r8d
	jle	.LBB2_5
# %bb.8:                                # %.lr.ph.preheader
                                        #   in Loop: Header=BB2_4 Depth=2
	xorl	%esi, %esi
	movq	%rdi, %rbp
	xorl	%edx, %edx
.LBB2_9:                                # %.lr.ph
                                        #   Parent Loop BB2_2 Depth=1
                                        #     Parent Loop BB2_4 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movl	(%rbp), %ecx
	imull	(%r12,%rsi,4), %ecx
	addl	%ecx, %edx
	incq	%rsi
	addq	%rbx, %rbp
	cmpq	%rsi, %r11
	jne	.LBB2_9
	jmp	.LBB2_10
.LBB2_5:                                #   in Loop: Header=BB2_4 Depth=2
	xorl	%edx, %edx
.LBB2_10:                               # %._crit_edge
                                        #   in Loop: Header=BB2_4 Depth=2
	movl	%edx, (%r13,%rax,4)
	incq	%rax
	addq	$4, %rdi
	cmpq	%r10, %rax
	jne	.LBB2_4
.LBB2_6:                                # %._crit_edge31
                                        #   in Loop: Header=BB2_2 Depth=1
	incq	%r15
	addl	%r8d, %r14d
	cmpq	%r9, %r15
	jne	.LBB2_2
.LBB2_7:                                # %._crit_edge33
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z17matMultiplyOnHostPiS_S_iii, .Lfunc_end2-_Z17matMultiplyOnHostPiS_S_iii
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	subq	$88, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	leaq	40(%rsp), %rdi
	callq	hipEventCreate
	leaq	8(%rsp), %rdi
	callq	hipEventCreate
	leaq	32(%rsp), %rdi
	xorl	%ebx, %ebx
	movl	$8000000, %esi                  # imm = 0x7A1200
	xorl	%edx, %edx
	callq	hipHostMalloc
	leaq	24(%rsp), %rdi
	movl	$12000000, %esi                 # imm = 0xB71B00
	xorl	%edx, %edx
	callq	hipHostMalloc
	leaq	64(%rsp), %rdi
	movl	$6000000, %esi                  # imm = 0x5B8D80
	xorl	%edx, %edx
	callq	hipHostMalloc
	leaq	72(%rsp), %rdi
	movl	$6000000, %esi                  # imm = 0x5B8D80
	xorl	%edx, %edx
	callq	hipHostMalloc
	movl	$.Lstr, %edi
	callq	puts@PLT
	movl	$5, %edi
	callq	srand
.LBB3_1:                                # =>This Inner Loop Header: Depth=1
	callq	rand
	cltq
	imulq	$274877907, %rax, %rcx          # imm = 0x10624DD3
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$38, %rcx
	addl	%edx, %ecx
	imull	$1000, %ecx, %ecx               # imm = 0x3E8
	subl	%ecx, %eax
	movq	32(%rsp), %rcx
	movl	%eax, (%rcx,%rbx,4)
	incq	%rbx
	cmpq	$2000000, %rbx                  # imm = 0x1E8480
	jne	.LBB3_1
# %bb.2:                                # %.preheader.preheader
	xorl	%ebx, %ebx
.LBB3_3:                                # %.preheader
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	cltq
	imulq	$274877907, %rax, %rcx          # imm = 0x10624DD3
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$38, %rcx
	addl	%edx, %ecx
	imull	$1000, %ecx, %ecx               # imm = 0x3E8
	subl	%ecx, %eax
	movq	24(%rsp), %rcx
	movl	%eax, (%rcx,%rbx,4)
	incq	%rbx
	cmpq	$3000000, %rbx                  # imm = 0x2DC6C0
	jne	.LBB3_3
# %bb.4:
	leaq	56(%rsp), %rbx
	movl	$8000000, %esi                  # imm = 0x7A1200
	movq	%rbx, %rdi
	callq	hipMalloc
	leaq	48(%rsp), %r14
	movl	$12000000, %esi                 # imm = 0xB71B00
	movq	%r14, %rdi
	callq	hipMalloc
	leaq	16(%rsp), %rdi
	movl	$6000000, %esi                  # imm = 0x5B8D80
	callq	hipMalloc
	movq	(%rbx), %rdi
	movq	32(%rsp), %rsi
	movl	$8000000, %edx                  # imm = 0x7A1200
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r14), %rdi
	movq	24(%rsp), %rsi
	movl	$12000000, %edx                 # imm = 0xB71B00
	movl	$1, %ecx
	callq	hipMemcpy
	movq	40(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movabsq	$137438953504, %rdx             # imm = 0x2000000020
	leaq	15(%rdx), %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_6
# %bb.5:
	movq	56(%rsp), %rdi
	movq	48(%rsp), %rsi
	movq	16(%rsp), %rdx
	movl	$1000, %ecx                     # imm = 0x3E8
	movl	$2000, %r8d                     # imm = 0x7D0
	movl	$1500, %r9d                     # imm = 0x5DC
	callq	_Z34__device_stub__matMultiplyOnDevicePiS_S_iii
.LBB3_6:
	movq	8(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	64(%rsp), %rdi
	movq	16(%rsp), %rsi
	movl	$6000000, %edx                  # imm = 0x5B8D80
	movl	$2, %ecx
	callq	hipMemcpy
	callq	hipDeviceSynchronize
	movq	8(%rsp), %rdi
	callq	hipEventSynchronize
	leaq	84(%rsp), %rbx
	movl	$0, (%rbx)
	movq	40(%rsp), %rsi
	movq	8(%rsp), %rdx
	movq	%rbx, %rdi
	callq	hipEventElapsedTime
	cvtss2sd	(%rbx), %xmm0
	movl	$.L.str.1, %edi
	movb	$1, %al
	callq	printf
	movq	56(%rsp), %rdi
	callq	hipFree
	movq	48(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	32(%rsp), %rdi
	callq	hipHostFree
	movq	24(%rsp), %rdi
	callq	hipHostFree
	movq	64(%rsp), %rdi
	callq	hipHostFree
	movq	72(%rsp), %rdi
	callq	hipHostFree
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	xorl	%eax, %eax
	addq	$88, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	main, .Lfunc_end3-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB4_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB4_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z19matMultiplyOnDevicePiS_S_iii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z16matMultiplyTiledPiS_S_iii, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end4:
	.size	__hip_module_ctor, .Lfunc_end4-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB5_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB5_2:
	retq
.Lfunc_end5:
	.size	__hip_module_dtor, .Lfunc_end5-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z19matMultiplyOnDevicePiS_S_iii,@object # @_Z19matMultiplyOnDevicePiS_S_iii
	.section	.rodata,"a",@progbits
	.globl	_Z19matMultiplyOnDevicePiS_S_iii
	.p2align	3, 0x0
_Z19matMultiplyOnDevicePiS_S_iii:
	.quad	_Z34__device_stub__matMultiplyOnDevicePiS_S_iii
	.size	_Z19matMultiplyOnDevicePiS_S_iii, 8

	.type	_Z16matMultiplyTiledPiS_S_iii,@object # @_Z16matMultiplyTiledPiS_S_iii
	.globl	_Z16matMultiplyTiledPiS_S_iii
	.p2align	3, 0x0
_Z16matMultiplyTiledPiS_S_iii:
	.quad	_Z31__device_stub__matMultiplyTiledPiS_S_iii
	.size	_Z16matMultiplyTiledPiS_S_iii, 8

	.type	.L.str.1,@object                # @.str.1
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.1:
	.asciz	"GPU CUDA Time: %.3f ms\n"
	.size	.L.str.1, 24

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z19matMultiplyOnDevicePiS_S_iii"
	.size	.L__unnamed_1, 33

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z16matMultiplyTiledPiS_S_iii"
	.size	.L__unnamed_2, 30

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"Generating Matrices"
	.size	.Lstr, 20

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"Done"
	.size	.Lstr.1, 5

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z34__device_stub__matMultiplyOnDevicePiS_S_iii
	.addrsig_sym _Z31__device_stub__matMultiplyTiledPiS_S_iii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z19matMultiplyOnDevicePiS_S_iii
	.addrsig_sym _Z16matMultiplyTiledPiS_S_iii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z19matMultiplyOnDevicePiS_S_iii ; -- Begin function _Z19matMultiplyOnDevicePiS_S_iii
	.globl	_Z19matMultiplyOnDevicePiS_S_iii
	.p2align	8
	.type	_Z19matMultiplyOnDevicePiS_S_iii,@function
_Z19matMultiplyOnDevicePiS_S_iii:       ; @_Z19matMultiplyOnDevicePiS_S_iii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x34
	s_load_b128 s[4:7], s[0:1], 0x18
	v_bfe_u32 v2, v0, 10, 10
	v_and_b32_e32 v3, 0x3ff, v0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[0:1], null, s15, s3, v[2:3]
	v_mad_u64_u32 v[1:2], null, s14, s2, v[3:4]
	v_cmp_gt_i32_e32 vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_i32_e64 s2, s6, v1
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_6
; %bb.1:                                ; %.preheader
	s_clause 0x1
	s_load_b128 s[8:11], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	s_cmp_lt_i32 s5, 1
	s_cbranch_scc1 .LBB0_4
; %bb.2:                                ; %.lr.ph
	v_mul_lo_u32 v2, v0, s5
	v_mov_b32_e32 v5, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[3:4], 2, v[2:3]
	v_mov_b32_e32 v2, 0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v3, vcc_lo, s8, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s9, v4, vcc_lo
.LBB0_3:                                ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_ashrrev_i32_e32 v6, 31, v5
	s_add_i32 s5, s5, -1
	s_cmp_eq_u32 s5, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[6:7], 2, v[5:6]
	v_add_co_u32 v6, vcc_lo, s10, v6
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v7, vcc_lo, s11, v7, vcc_lo
	global_load_b32 v8, v[3:4], off
	global_load_b32 v9, v[6:7], off
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[6:7], null, v9, v8, v[2:3]
	v_add_co_u32 v3, vcc_lo, v3, 4
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_dual_mov_b32 v2, v6 :: v_dual_add_nc_u32 v5, s6, v5
	s_cbranch_scc0 .LBB0_3
	s_branch .LBB0_5
.LBB0_4:
	v_mov_b32_e32 v2, 0
.LBB0_5:                                ; %Flow54
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[3:4], null, v0, s6, v[1:2]
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[3:4]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB0_6:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z19matMultiplyOnDevicePiS_S_iii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z19matMultiplyOnDevicePiS_S_iii, .Lfunc_end0-_Z19matMultiplyOnDevicePiS_S_iii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 360
; NumSgprs: 18
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z16matMultiplyTiledPiS_S_iii ; -- Begin function _Z16matMultiplyTiledPiS_S_iii
	.globl	_Z16matMultiplyTiledPiS_S_iii
	.p2align	8
	.type	_Z16matMultiplyTiledPiS_S_iii,@function
_Z16matMultiplyTiledPiS_S_iii:          ; @_Z16matMultiplyTiledPiS_S_iii
; %bb.0:
	s_clause 0x2
	s_load_b128 s[4:7], s[0:1], 0x18
	s_load_b128 s[8:11], s[0:1], 0x0
	s_load_b64 s[2:3], s[0:1], 0x10
	v_bfe_u32 v5, v0, 10, 10
	v_and_b32_e32 v6, 0x3ff, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshl_add_u32 v4, s15, 4, v5
	v_lshl_add_u32 v0, s14, 4, v6
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e32 vcc_lo, s4, v4
	v_cmp_gt_i32_e64 s0, s6, v0
	s_cmp_lt_i32 s5, 1
	s_cbranch_scc1 .LBB1_9
; %bb.1:                                ; %.lr.ph
	v_lshlrev_b32_e32 v1, 4, v5
	v_mul_lo_u32 v8, v4, s5
	v_lshl_add_u32 v9, v6, 2, 0x400
	v_dual_mov_b32 v3, 0 :: v_dual_lshlrev_b32 v10, 6, v5
	s_delay_alu instid0(VALU_DEP_4)
	v_add_lshl_u32 v7, v1, v6, 2
	v_mov_b32_e32 v1, 0
	s_add_i32 s1, s5, 15
	s_mov_b32 s12, 0
	s_lshr_b32 s7, s1, 4
	v_add_nc_u32_e32 v11, 0x400, v7
.LBB1_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB1_7 Depth 2
	s_lshl_b32 s13, s12, 4
	v_mov_b32_e32 v2, 0
	v_add_nc_u32_e32 v12, s13, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s1, s5, v12
	s_and_b32 s1, vcc_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s14, s1
	s_cbranch_execz .LBB1_4
; %bb.3:                                ;   in Loop: Header=BB1_2 Depth=1
	v_add_nc_u32_e32 v2, v12, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[12:13], 2, v[2:3]
	v_add_co_u32 v12, s1, s8, v12
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v13, s1, s9, v13, s1
	global_load_b32 v2, v[12:13], off
.LBB1_4:                                ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s14
	v_dual_mov_b32 v13, 0 :: v_dual_add_nc_u32 v12, s13, v5
	s_waitcnt vmcnt(0)
	ds_store_b32 v7, v2
	v_cmp_gt_u32_e64 s1, s5, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, s0, s1
	s_and_saveexec_b32 s13, s1
	s_cbranch_execz .LBB1_6
; %bb.5:                                ;   in Loop: Header=BB1_2 Depth=1
	v_mad_u64_u32 v[13:14], null, v12, s6, v[0:1]
	v_mov_b32_e32 v14, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[12:13], 2, v[13:14]
	v_add_co_u32 v12, s1, s10, v12
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v13, s1, s11, v13, s1
	global_load_b32 v13, v[12:13], off
.LBB1_6:                                ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s13
	v_mov_b32_e32 v2, v9
	s_mov_b32 s1, 0
	s_waitcnt vmcnt(0)
	ds_store_b32 v11, v13
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB1_7:                                ;   Parent Loop BB1_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_add_nc_u32_e32 v12, s1, v10
	s_add_i32 s1, s1, 4
	ds_load_b32 v14, v2
	ds_load_b32 v15, v12
	s_cmp_eq_u32 s1, 64
	s_waitcnt lgkmcnt(0)
	v_mad_u64_u32 v[12:13], null, v14, v15, v[1:2]
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v1, v12 :: v_dual_add_nc_u32 v2, 64, v2
	s_cbranch_scc0 .LBB1_7
; %bb.8:                                ;   in Loop: Header=BB1_2 Depth=1
	s_add_i32 s12, s12, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s12, s7
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB1_2
	s_branch .LBB1_10
.LBB1_9:
	v_mov_b32_e32 v1, 0
.LBB1_10:                               ; %Flow73
	v_cmp_gt_i32_e32 vcc_lo, s4, v4
	v_cmp_gt_i32_e64 s0, s6, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, vcc_lo, s0
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_12
; %bb.11:
	v_mad_u64_u32 v[2:3], null, v4, s6, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s2, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
	global_store_b32 v[2:3], v1, off
.LBB1_12:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16matMultiplyTiledPiS_S_iii
		.amdhsa_group_segment_fixed_size 2048
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 36
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 16
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z16matMultiplyTiledPiS_S_iii, .Lfunc_end1-_Z16matMultiplyTiledPiS_S_iii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 564
; NumSgprs: 18
; NumVgprs: 16
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 2048 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 16
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         44
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         52
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         54
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         56
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         58
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         60
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         62
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         104
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 296
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z19matMultiplyOnDevicePiS_S_iii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z19matMultiplyOnDevicePiS_S_iii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     10
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 2048
    .kernarg_segment_align: 8
    .kernarg_segment_size: 36
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z16matMultiplyTiledPiS_S_iii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z16matMultiplyTiledPiS_S_iii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     16
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
