// HEADERS

#include <iostream>
#include <iomanip>
#include <limits>

#include <stdlib.h>
#include <fstream>
#include <math.h>
#include <time.h>

using namespace std;

// DEFINITIONS

#define NX		201
#define NY		201
#define NT		401
#define NS		640


__constant__ float hx = 0.001f;
__constant__ float hy = 0.001f;
__constant__ float h = 0.001f;
__constant__ float T = 1.3333e-04f; // 0.2f / 1500.0f;
__constant__ float dt = 3.3333e-07f; // T / 400.0f;
__constant__ float fre = 125000.0f;
__constant__ float omegac = 7.8540e+05f; // 2.0f * pi * fre;
__constant__ float tao = 4.0000e-06f; // pi / omegac;
__constant__ float tt = 8.1573e-06f; // sqrtf(6.0f * logf(2.0f)) * tao;

// FUNCTIONS DECLARATION

void Ultrasonic_Tomography(int group_size, float target_epsilon, int max_iterations, int ti);
void IO_Files(float*, float*, float*, float*);
float norm(float*, int);

__global__ void field_setup(float*, float*, float*, float*, float*, float*, float*);
__global__ void propagation(int, int, int, int, float*, float*, float* , float*, float*, int);
__global__ void propagation_at_corners(float*);
__global__ void initial_signal(float*, float*, float*, float*, float*, int);
__global__ void difference_signal(float*, float*, float*, float*, float*, float*, float*, float*, float*, int);
__global__ void backpropagation1(float*, float*, int);
__global__ void backpropagation2(float*, float*, float*, float*, float*, int);
__global__ void laplace1(float*, float*, int);
__global__ void laplace2(float*, float*, int);
__global__ void init_differential(float*, float*, float*, float*);
__global__ void update_differential(float*, float*, float*, float*, int);
__global__ void update_field(float*, float*, float*, float*, float*);
__global__ void reset(float*, float*, float*, float*, float*);

// MAIN PROGRAM

int main(int argc, char **argv)
{
	if (argc != 4) {
		cerr << "Usage: " << argv[0] << " <sensor group size> <target epsilon> <max iterations>\n\n";
		exit(1);
	}

	int group_size = stoi(argv[1]);
	float target_epsilon = stof(argv[2]);
	int max_iterations = stoi(argv[3]);

	if (max_iterations == -1)
		max_iterations = numeric_limits<int>::max();

	// Time measuring variables

	int ti = 0, tf = 0;

	// Function Execution

	// set floting-point precision on stdout and stderr
	cout << fixed << setprecision(10);
	cerr << fixed << setprecision(10);

	cout << "Ultrasonic Tomography Running:\n\n";

	ti = clock();
	cout << "ti = " << ti << "\n";

	Ultrasonic_Tomography(group_size, target_epsilon, max_iterations, ti);

	tf = clock();
	cout << "tf = " << tf << "\n"
		 << "tt = " << tf - ti << "\n"
		 << "Total Seconds = " << (float)(tf - ti) / CLOCKS_PER_SEC << "\n";

	// End of the program

	return 0;
}

// FUNCTIONS DEFINITION

void Ultrasonic_Tomography(int group_size, float target_epsilon, int max_iterations, int ti)
{
	// Simulation Variables

	float hx = 0.001f;
	float hy = 0.001f;

	int Nx_Ny = NX * NY;
	int Nx_Ny_Nt = NX * NY * NT;
	int Nx_Nt = NX * NT;

	float* x = new float[NX];
	float* y = new float[NY];
	float* fo = new float[Nx_Ny];

	// Kernel Preparation

	/*dim3 Grid_Size(13, 26);
	dim3 Block_Size(16, 8);*/

	/*dim3 Grid_Size(7, 51);
	dim3 Block_Size(32, 4);*/

	/*dim3 Grid_Size(7, 26);
	dim3 Block_Size(32, 8);*/

	dim3 Grid_Size(13, 13);
	dim3 Block_Size(16, 16);

	// Variables of allocation

	float* dev_x;
	int size_x = NX * sizeof(float);

	float* dev_y;
	int size_y = NX * sizeof(float);

	float* dev_fo;
	int size_fo = Nx_Ny * sizeof(float);

	float* dev_v;
	int size_v = Nx_Ny * sizeof(float);

	float* dev_r;
	int size_r = Nx_Ny * sizeof(float);

	float* dev_r2;
	int size_r2 = Nx_Ny * sizeof(float);

	float* dev_s;
	int size_s = Nx_Ny * sizeof(float);

	float* dev_u;
	int size_u = Nx_Ny_Nt * sizeof(float);

	int Ng = NS / group_size;

	float* dev_g1;
	int size_g1 = Nx_Nt * Ng * sizeof(float);

	float* dev_g2;
	int size_g2 = Nx_Nt * Ng * sizeof(float);

	float* dev_g3;
	int size_g3 = Nx_Nt * Ng * sizeof(float);

	float* dev_g4;
	int size_g4 = Nx_Nt * Ng * sizeof(float);

	cudaMalloc((void**) &dev_x, size_x);
	cudaMalloc((void**) &dev_y, size_y);
	cudaMalloc((void**) &dev_fo, size_fo);
	cudaMalloc((void**) &dev_v, size_v);
	cudaMalloc((void**) &dev_r, size_r);
	cudaMalloc((void**) &dev_r2, size_r2);
	cudaMalloc((void**) &dev_s, size_s);
	cudaMalloc((void**) &dev_u, size_u);
	cudaMalloc((void**) &dev_g1, size_g1);
	cudaMalloc((void**) &dev_g2, size_g2);
	cudaMalloc((void**) &dev_g3, size_g3);
	cudaMalloc((void**) &dev_g4, size_g4);

	cudaMemset(dev_u, 0.0, size_u);
	cudaMemset(dev_g1, 0.0, size_g1);
	cudaMemset(dev_g2, 0.0, size_g2);
	cudaMemset(dev_g3, 0.0, size_g3);
	cudaMemset(dev_g4, 0.0, size_g4);

	// Environment Initialization

	for (int i = 0; i < NX; i++)
	{
		x[i] = -0.1f + i * hx;
	}

	for (int j = 0; j < NY; j++)
	{
		y[j] = -0.1f + j * hy;
	}

	cudaMemcpy(dev_x, x, size_x, cudaMemcpyHostToDevice);
	cudaMemcpy(dev_y, y, size_y, cudaMemcpyHostToDevice);

	field_setup<<<Grid_Size, Block_Size>>>(dev_x, dev_y, dev_fo, dev_v, dev_r, dev_r2, dev_s);

	cudaMemcpy(fo, dev_fo, size_fo, cudaMemcpyDeviceToHost);

	// Position of the transducers

	int* jj = new int[NS];
	int* ii = new int[NS];

	for (int p = 0; p < 160; p++)
	{
		jj[p] = 181;
		ii[p] = 21 + (p + 1);
	}

	for (int p = 160; p < 320; p++)
	{
		ii[p] = 181;
		jj[p] = 181 - ((p + 1) - 160);
	}

	for (int p = 320; p < 480; p++)
	{
		jj[p] = 21;
		ii[p] = 181 - ((p + 1) - 320);
	}

	for (int p = 480; p < NS; p++)
	{
		ii[p] = 21;
		jj[p] = 21 + ((p + 1) - 480);
	}

	for (int p = 0; p < NS; p += group_size)
	{
		cudaMemset(dev_u, 0.0, size_u);

		int jp1 = jj[p];
		int jp2 = jj[p + group_size - 1];
		int ip1 = ii[p];
		int ip2 = ii[p + group_size - 1];

		if (jp2 < jp1)
		{
			int jp = jp1;
			jp1 = jp2;
			jp2 = jp;
		}

		if (ip2 < ip1)
		{
			int ip = ip1;
			ip1 = ip2;
			ip2 = ip;
		}

		// Boundary

		for (int k = 1; k < NT - 1; k++)
		{
			propagation<<<Grid_Size, Block_Size>>>(jp1, jp2, ip1, ip2, dev_v, dev_r, dev_r2 , dev_s, dev_u, k);
		}

		// Four corners

		propagation_at_corners<<<1, NT>>>(dev_u);

		initial_signal<<<dim3(NT - 2, 1) , dim3(159, 1)>>>(dev_u, dev_g1, dev_g2, dev_g3, dev_g4, p / group_size);
	}

	// Kaczmarz method
	// propagation

	float* dev_rr1;
	int size_rr1 = Nx_Nt * sizeof(float);

	float* dev_rr2;
	int size_rr2 = Nx_Nt * sizeof(float);

	float* dev_rr3;
	int size_rr3 = Nx_Nt * sizeof(float);

	float* dev_rr4;
	int size_rr4 = Nx_Nt * sizeof(float);

	float* dev_z;
	int size_z = Nx_Ny * (NT + 1) * sizeof(float);

	float* dev_Lu;
	int size_Lu = Nx_Ny_Nt * sizeof(float);

	float* dev_f;
	int size_f = Nx_Ny * sizeof(float);

	float* dev_df;
	int size_df = Nx_Ny * sizeof(float);

	float* dev_alpha;
	int size_alpha = Nx_Ny * sizeof(float);

	float* dev_f_minus_fo;
	int size_f_minus_fo = Nx_Ny * sizeof(float);

	// Allocation

	cudaMalloc((void**) &dev_rr1, size_rr1);
	cudaMalloc((void**) &dev_rr2, size_rr2);
	cudaMalloc((void**) &dev_rr3, size_rr3);
	cudaMalloc((void**) &dev_rr4, size_rr4);
	cudaMalloc((void**) &dev_z, size_z);
	cudaMalloc((void**) &dev_Lu, size_Lu);
	cudaMalloc((void**) &dev_f, size_f);
	cudaMalloc((void**) &dev_df, size_df);
	cudaMalloc((void**) &dev_alpha, size_alpha);
	cudaMalloc((void**) &dev_f_minus_fo, size_f_minus_fo);

	cudaMemset(dev_rr1, 0.0, size_rr1);
	cudaMemset(dev_rr2, 0.0, size_rr2);
	cudaMemset(dev_rr3, 0.0, size_rr3);
	cudaMemset(dev_rr4, 0.0, size_rr4);
	cudaMemset(dev_f, 0.0, size_f);
	cudaMemset(dev_Lu, 0.0, size_Lu);

	float* f = new float[Nx_Ny];
	float* f_minus_fo = new float[Nx_Ny];

	// initialize epsilon values
	float prev_epsilon = std::numeric_limits<float>::infinity();
	float curr_epsilon = -std::numeric_limits<float>::infinity();

	ofstream convergence_file("art_convergence0.txt");
	ofstream time_file("art_time0.txt");

	for (int iter = 0; iter < max_iterations; iter++)
	{
		cout << "\nIter: " << iter << "\n";
		cudaMemset(dev_u, 0.f, size_u);

		for (int p = 0; p < NS; p += group_size)
		{
			int jp1 = jj[p];
			int jp2 = jj[p + group_size - 1];
			int ip1 = ii[p];
			int ip2 = ii[p + group_size - 1];

			if (jp2 < jp1)
			{
				int jp = jp1;
				jp1 = jp2;
				jp2 = jp;
			}

			if (ip2 < ip1)
			{
				int ip = ip1;
				ip1 = ip2;
				ip2 = ip;
			}

			reset<<<Grid_Size, Block_Size>>>(dev_f, dev_v, dev_r, dev_r2, dev_s);

			// Boundary

			for (int k = 1; k < NT - 1; k++)
			{
				propagation<<<Grid_Size, Block_Size>>>(jp1, jp2, ip1, ip2, dev_v, dev_r, dev_r2 , dev_s, dev_u, k);
			}

			// Four corners

			propagation_at_corners<<<1, NT>>>(dev_u);

			difference_signal<<<dim3(NT - 2, 1), dim3(159, 1)>>>(dev_u, dev_g1, dev_g2, dev_g3, dev_g4, dev_rr1, dev_rr2, dev_rr3, dev_rr4, p / group_size);

			cudaMemset(dev_z, 0.0, size_z);

			for (int k = NT - 2; k > 0; k--)
			{
				backpropagation1<<<Grid_Size, Block_Size>>>(dev_z, dev_f, k);
				backpropagation2<<<1, NX>>>(dev_z, dev_rr1, dev_rr2, dev_rr3, dev_rr4, k);
			}

			for (int k = 1; k < NT; k++)
			{
				laplace1<<<Grid_Size, Block_Size>>>(dev_u, dev_Lu, k);
				laplace2<<<1, NX>>>(dev_u, dev_Lu, k);
			}

			init_differential<<<Grid_Size, Block_Size>>>(dev_df, dev_z, dev_Lu, dev_f);

			for (int k = 2; k < NT; k++)
			{
				update_differential<<<Grid_Size, Block_Size>>>(dev_df, dev_z, dev_Lu, dev_f, k);
			}

			update_field<<<Grid_Size, Block_Size>>>(dev_alpha, dev_f, dev_df, dev_f_minus_fo, dev_fo);
		}

		cudaMemcpy(f_minus_fo, dev_f_minus_fo, size_f_minus_fo, cudaMemcpyDeviceToHost);

		curr_epsilon = norm(f_minus_fo, Nx_Ny) / norm(fo, Nx_Ny) * 100.0f;
		float current_t = (float)(clock()-ti) / CLOCKS_PER_SEC;

		convergence_file << curr_epsilon << " ";
		time_file << (current_t)<<" ";

		cout << "epsilon = " << curr_epsilon << "\n";

		// stop if reached target epsilon
		if (curr_epsilon <= target_epsilon) {
			break;
		}

		// stop if epsilon diverges
		if (curr_epsilon > prev_epsilon ||
				std::isnan(curr_epsilon)) {
			break;
		}

		// update prev_epsilon
		prev_epsilon = curr_epsilon;
	}

	cudaMemcpy(f, dev_f, size_f, cudaMemcpyDeviceToHost);

	IO_Files(x, y, fo, f);

	// Free Variables

	cudaFree(dev_x);
	cudaFree(dev_y);
	cudaFree(dev_fo);
	cudaFree(dev_v);
	cudaFree(dev_r);
	cudaFree(dev_r2);
	cudaFree(dev_s);
	cudaFree(dev_u);
	cudaFree(dev_g1);
	cudaFree(dev_g2);
	cudaFree(dev_g3);
	cudaFree(dev_g4);
	cudaFree(dev_rr1);
	cudaFree(dev_rr2);
	cudaFree(dev_rr3);
	cudaFree(dev_rr4);
	cudaFree(dev_z);
	cudaFree(dev_Lu);
	cudaFree(dev_f);
	cudaFree(dev_df);
	cudaFree(dev_alpha);
	cudaFree(dev_f_minus_fo);

	delete [] x;
	delete [] y;
	delete [] fo;
	delete [] ii;
	delete [] jj;
	delete [] f;
	delete [] f_minus_fo;

	cudaDeviceReset();
}

__global__ void field_setup(float* x, float* y, float* fo, float* v, float* r, float* r2, float* s)
{
	// Map from threadIdx / BlockIdx to pixel position

	int i = threadIdx.x + blockIdx.x * blockDim.x;
	int j = threadIdx.y + blockIdx.y * blockDim.y;

	if (i < NX && j < NY)
	{
		int offset = i + NX * j;
		float value = 0.0f;

		/* if(((sqrtf(powf(x[i] - 0.015f, 2.0f) + powf(y[j] + 0.000f, 2.0f))) <= 0.005f) || ((sqrtf(powf(x[i] + 0.015f, 2.0f) + powf(y[j] + 0.000f, 2.0f))) <= 0.005f)) */
		/* { */
		/*	value = 0.06f; */
		/* } */
		/* else */
		/* { */
		/*	if(sqrtf(x[i] * x[i] + y[j] * y[j]) <= 0.03f) */
		/*	{ */
		/*		value = 0.02f; */
		/*	} */
		/*	else */
		/*	{ */
		/*		value = 0.0f; */
		/*	} */
		/* } */

		float rc = 0.015f;
		float rp = 0.005f;
		/* float lim = 0.020f; */

		float sc = 0.03f;
		float sp = 0.05f;
		/* float sb = 0.02f; */

		if (powf(x[i], 2) + powf(y[j], 2) <= powf(rc, 2))
		{
			value = sc;
		}

		if (powf(x[i] - rc * cos(-30 * (3.14159265f / 180)), 2) + powf(y[j] - rc * sin(30 * (3.14159265f / 180)), 2) <= powf(rp, 2))
		{
			value = sp;
		}

		if (powf(x[i] + rc * cos(-30 * (3.14159265f / 180)), 2) + powf(y[j] - rc * sin(30 * (3.14159265f / 180)), 2) <= powf(rp, 2))
		{
			value = sp;
		}

		if (powf(x[i], 2) + powf(y[j] + rc, 2) <= powf(rp, 2))
		{
			value = sp;
		}

		fo[offset] = value;
		v[offset] = 1500.0f * sqrtf(1.0f + value);
		r[offset] = v[offset] * dt / hx;
		r2[offset] = powf(r[offset], 2.0f);
		s[offset] = 2.0f - 4.0f * r2[offset];

		/*int offset = i + NX * j;
		float value = 0.0f;

		if (((sqrtf(powf(x[i] - 0.05f, 2.0f) + powf(y[j] + 0.000f, 2.0f))) <= 0.005f) || ((sqrtf(powf(x[i] + 0.05f, 2.0f) + powf(y[j] + 0.000f, 2.0f))) <= 0.005f))
		{
			value = 0.06f;
		}
		else
		{
			if (sqrtf(x[i] * x[i] + y[j] * y[j]) <= 0.03f)
			{
				value = 0.02f;
			}
			else
			{
				if ((x[i] >= -0.05f) && (x[i] <= 0.05f) && (y[j] >= -0.06f) && (y[j] <= -0.045f))
				{
					value = 0.04f;
				}
				else
				{
					if ((x[i] >= -0.03f) && (x[i] <= 0.00f) && (y[j] <= 0.065f) && (y[j] >= (0.04f - 0.5f * x[i])))
					{
						value = 0.03f;
					}
					else
					{
						if ((x[i] >= 0.00f) && (x[i] <= 0.03f) && (y[j] <= 0.065f) && (y[j] >= (0.04f + 0.5f * x[i])))
						{
							value = 0.03f;
						}
						else
						{
							value = 0.0f;
						}
					}
				}
			}
		}*/

		fo[offset] = value;
		v[offset] = 1500.0f * sqrtf(1.0f + value);
		r[offset] = v[offset] * dt / hx;
		r2[offset] = powf(r[offset], 2.0f);
		s[offset] = 2.0f - 4.0f * r2[offset];
	}
}

__global__ void propagation(int jp1, int jp2, int ip1, int ip2, float* v, float* r, float* r2 , float* s, float* u, int k)
{
	// Map from threadIdx / BlockIdx to pixel position

	int i = threadIdx.x + blockIdx.x * blockDim.x;
	int j = threadIdx.y + blockIdx.y * blockDim.y;

	int Nx_Ny = NX * NY;
	int Nx_Ny_k = Nx_Ny * k;

	if((i < NX) && (j < NY))
	{
		int offset = i + NX * j;

		if (((j + 1) >= jp1) && ((j + 1) <= jp2) && ((i + 1) >= ip1) && ((i + 1) <= ip2) && ((k + 1) <= 24))
		{
			u[offset + Nx_Ny * (k + 1)] = powf(v[offset], 2.0f) * powf(dt, 2.0f) * cosf(omegac * (k * dt - tt)) * expf(-powf(k * dt - tt, 2.0f) / (2.0f * powf(tao, 2.0f))) + r2[offset] * (u[(i + 1) + NX * j + Nx_Ny_k] + u[(i - 1) + NX * j + Nx_Ny_k] + u[i + NX * (j - 1) + Nx_Ny_k] + u[i + NX * (j + 1) + Nx_Ny_k]) + s[offset] * u[offset + Nx_Ny_k] - u[offset + Nx_Ny * (k - 1)];
		}
		else
		{
			u[offset + Nx_Ny * (k + 1)] = r2[offset] * (u[(i + 1) + NX * j + Nx_Ny_k] + u[(i - 1) + NX * j + Nx_Ny_k] + u[i + NX * (j - 1) + Nx_Ny_k] + u[i + NX * (j + 1) + Nx_Ny_k]) + s[offset] * u[offset + Nx_Ny_k] - u[offset + Nx_Ny * (k - 1)];
		}

		if ((i == 0) && (j > 0) && (j < (NY - 1)))
		{
			u[offset + Nx_Ny * (k + 1)] = (2.0f - 2.0f * r[offset] - r2[offset]) * u[offset + Nx_Ny_k] + 2.0f * r[offset] * (1.0f + r[offset]) * u[(offset + 1) + Nx_Ny_k] - r2[offset] * u[(offset + 2) + Nx_Ny_k] + (2.0f * r[offset] - 1.0f) * u[offset + Nx_Ny * (k - 1)] - 2.0f * r[offset] * u[(offset + 1) + Nx_Ny * (k - 1)];
		}


		if ((i == NX - 1) && (j > 0) && (j < (NY - 1)))
		{
			u[offset + Nx_Ny * (k + 1)] = (2.0f - 2.0f * r[offset] - r2[offset]) * u[offset + Nx_Ny_k] + 2.0f * r[offset] * (1.0f + r[offset]) * u[(offset - 1) + Nx_Ny_k] - r2[offset] * u[(offset - 2) + Nx_Ny_k] + (2.0f * r[offset] - 1.0f) * u[offset + Nx_Ny * (k - 1)] - 2.0f * r[offset] * u[(offset - 1) + Nx_Ny * (k - 1)];
		}


		if ((j == 0) && (i > 0) && (i < (NX - 1)))
		{
			u[offset + Nx_Ny * (k + 1)] = (2.0f - 2.0f * r[offset] - r2[offset]) * u[offset + Nx_Ny_k] + 2.0f * r[offset] * (1.0f + r[offset]) * u[(i + (j + 1) * NX) + Nx_Ny_k] - r2[offset] * u[(i + (j + 2) * NX) + Nx_Ny_k] + (2.0f * r[offset] - 1.0f) * u[offset + Nx_Ny * (k - 1)] - 2.0f * r[offset] * u[(i + (j + 1) * NX) + Nx_Ny * (k - 1)];
		}


		if ((j == NY - 1) && (i > 0) && (i < (NX - 1)))
		{
			u[offset + Nx_Ny * (k + 1)] = (2.0f - 2.0f * r[offset] - r2[offset]) * u[offset + Nx_Ny_k] + 2.0f * r[offset] * (1.0f + r[offset]) * u[(i + (j - 1) * NX) + Nx_Ny_k] - r2[offset] * u[(i + (j - 2) * NX) + Nx_Ny_k] + (2.0f * r[offset] - 1.0f) * u[offset + Nx_Ny * (k - 1)] - 2.0f * r[offset] * u[(i + (j - 1) * NX) + Nx_Ny * (k - 1)];
		}
	}
}

__global__ void propagation_at_corners(float* u)
{
	int k = threadIdx.x;
	int Nx_Ny = NX * NY;
	int Nx_Ny_k = Nx_Ny * k;

	u[Nx_Ny_k] = 1.0f / 2.0f * (u[NX + k] + u[1 + k]);
	u[(NX - 1) + Nx_Ny_k] = 1.0f / 2.0f * (u[(NX - 2) + Nx_Ny_k] + u[(NX - 1) + NX + Nx_Ny_k]);
	u[(NY - 1) * NX + Nx_Ny_k] = 1.0f / 2.0f * (u[(NY - 2) * NX + Nx_Ny_k] + u[1 +(NY - 1) * NX + Nx_Ny_k]);
	u[(NX - 1) + (NY - 1) * NX + Nx_Ny_k] = 1.0f / 2.0f * (u[(NX - 2) + (NY - 1) * NX + Nx_Ny_k] + u[(NX - 1) + (NY - 2) * NX + Nx_Ny_k]);
}

__global__ void initial_signal(float* u, float* g1, float* g2, float* g3, float* g4, int p)
{
	int i = threadIdx.x + 21;
	int k = blockIdx.x + 2;

	int Nx_Ny_k = NX * NY * k;
	int i_k_Nx_Nx_Nt_p = i + NX * k + NX * NT * p;

	g1[i_k_Nx_Nx_Nt_p] = u[i + NX * 180 + Nx_Ny_k];
	g3[i_k_Nx_Nx_Nt_p] = u[i + NX * 20 + Nx_Ny_k];

	g2[i_k_Nx_Nx_Nt_p] = u[180 + NX * i + Nx_Ny_k];
	g4[i_k_Nx_Nx_Nt_p] = u[20 + NX * i + Nx_Ny_k];
}

__global__ void difference_signal(float* u, float* g1, float* g2, float* g3, float* g4, float* rr1, float* rr2, float* rr3, float* rr4, int p)
{
	int i = threadIdx.x + 21;
	int k = blockIdx.x + 2;

	int Nx_Ny_k = NX * NY * k;
	int i_k_Nx_Nx_Nt_p = i + k * NX + NX * NT * p;
	int i_Nx_k = i + NX * k;

	rr1[i_Nx_k] = g1[i_k_Nx_Nx_Nt_p] - u[i + NX * 180 + Nx_Ny_k];
	rr3[i_Nx_k] = g3[i_k_Nx_Nx_Nt_p] - u[i + NX * 20 + Nx_Ny_k];

	rr2[i_Nx_k] = g2[i_k_Nx_Nx_Nt_p] - u[180 + NX * i + Nx_Ny_k];
	rr4[i_Nx_k] = g4[i_k_Nx_Nx_Nt_p] - u[20 + NX * i + Nx_Ny_k];
}

__global__ void backpropagation1(float* z, float* f, int k)
{
	// Map from threadIdx / BlockIdx to pixel position

	int i = threadIdx.x + blockIdx.x * blockDim.x;
	int j = threadIdx.y + blockIdx.y * blockDim.y;

	int Nx_Ny = NX * NY;
	int Nx_Ny_k_p_1 = Nx_Ny * (k + 1);

	if((i >= 1) && (i < (NX - 1)) && (j >= 1) && (j < (NY - 1)))
	{
		int offset = i + NX * j;
		int up = i + NX * (j - 1);
		int down = i + NX * (j + 1);
		int left = (i - 1) + NX * j;
		int right = (i + 1) + NX * j;

		z[offset + Nx_Ny * k] = powf(1500.0f, 2.0f) * (dt * dt) * ((1.0f + f[up]) * z[up + Nx_Ny_k_p_1] + (1.0f + f[down]) * z[down + Nx_Ny_k_p_1] + (1.0f + f[left]) * z[left + Nx_Ny_k_p_1] + (1.0f + f[right]) * z[right + Nx_Ny_k_p_1] - 4.0f * (1.0f + f[offset]) * z[offset + Nx_Ny_k_p_1]) / (h * h) + 2.0f * z[offset + Nx_Ny_k_p_1] - z[offset + Nx_Ny * (k + 2)];
	}
}

__global__ void backpropagation2(float* z, float* rr1, float* rr2, float* rr3, float* rr4, int k)
{
	int i = threadIdx.x;
	int Nx_Ny_k = NX * NY * k;
	int i_Nx_k = i + NX * k;

	if((i >= 21) && (i < 180))
	{
		z[i + NX * 180 + Nx_Ny_k] = z[i + NX * 179 + Nx_Ny_k] + rr1[i_Nx_k] * h * 1000.0f;
		z[i + NX * 20 + Nx_Ny_k] = z[i + NX * 21 + Nx_Ny_k] + rr3[i_Nx_k] * h * 1000.0f;

		z[180 + NX * i + Nx_Ny_k] = z[179 + NX * i + Nx_Ny_k] + rr2[i_Nx_k] * h * 1000.0f;
		z[20 + NX * i + Nx_Ny_k] = z[21 + NX * i + Nx_Ny_k] + rr4[i_Nx_k] * h * 1000.0f;
	}

	if((i >= 1) && (i < (NX - 1)))
	{
		z[i + Nx_Ny_k] = z[i + NX + Nx_Ny_k];
		z[i + NX * (NY - 1) + Nx_Ny_k] = z[i + NX * (NY - 2) + Nx_Ny_k];

		z[NX * i + Nx_Ny_k] = z[1 + NX * i + Nx_Ny_k];
		z[(NX - 1) + NX * i + Nx_Ny_k] = z[(NX - 2) + NX * i + Nx_Ny_k];
	}

	if(i == 0)
	{
		z[Nx_Ny_k] = (z[1 + Nx_Ny_k] + z[NX + Nx_Ny_k]) / 2.0f;
		z[(NX - 1) + Nx_Ny_k] = (z[(NX - 2) + Nx_Ny_k] + z[(NX - 1) + NX + Nx_Ny_k]) / 2.0f;
		z[NX * (NY - 1) + Nx_Ny_k] = (z[1 + NX * (NY - 1) + Nx_Ny_k] + z[NX * (NY - 2) + Nx_Ny_k]) / 2.0f;
		z[(NX - 1) + NX * (NY - 1) + Nx_Ny_k] = (z[(NX - 2) + NX * (NY - 1) + Nx_Ny_k] + z[(NX - 1) + NX * (NY - 2) + Nx_Ny_k]) / 2.0f;
	}
}

__global__ void laplace1(float* u, float* Lu, int k)
{
	// Map from threadIdx / BlockIdx to pixel position

	int i = threadIdx.x + blockIdx.x * blockDim.x;
	int j = threadIdx.y + blockIdx.y * blockDim.y;

	int Nx_Ny = NX * NY;
	int Nx_Ny_k = Nx_Ny * k;

	if((i >= 1) && (i < (NX - 1)) && (j >= 1) && (j < (NY - 1)))
	{
		int offset = i + NX * j;

		Lu[offset + Nx_Ny_k] = (u[i + NX * (j - 1) + Nx_Ny_k] + u[i + NX * (j + 1) + Nx_Ny_k] + u[(i - 1) + NX * j + Nx_Ny_k] + u[(i + 1) + NX * j + Nx_Ny_k] - 4.0f * u[offset + Nx_Ny_k]) / (h * h);
	}
}

__global__ void laplace2(float* u, float* Lu, int k)
{
	int i = threadIdx.x;
	int Nx_Ny_k = NX * NY * k;

	if((i >= 1) && (i < (NX - 1)))
	{
		Lu[i + Nx_Ny_k] = (u[i + Nx_Ny_k] + u[i + NX + Nx_Ny_k] + u[(i - 1) + Nx_Ny_k] + u[(i + 1) + Nx_Ny_k] - 4.0f * u[i + Nx_Ny_k]) / (h * h);
		Lu[i + NX * (NY - 1) + Nx_Ny_k] = (u[i + NX * (NY - 1) + Nx_Ny_k] + u[i + NX * (NY - 2) + Nx_Ny_k] + u[(i - 1) + NX * (NY - 1) + Nx_Ny_k] + u[(i + 1) + NX * (NY - 1) + Nx_Ny_k] - 4.0f * u[i + NX * (NY - 1) + Nx_Ny_k]) / (h * h);

		Lu[NX * i + Nx_Ny_k] = (u[NX * i + Nx_Ny_k] + u[1 + NX * i + Nx_Ny_k] + u[NX * (i - 1) + Nx_Ny_k] + u[NX * (i + 1) + Nx_Ny_k] - 4.0f * u[NX * i + Nx_Ny_k]) / (h * h);
		Lu[(NX - 1) + NX * i + Nx_Ny_k] = (u[(NX - 1) + NX * i + Nx_Ny_k] + u[(NX - 2) + NX * i + Nx_Ny_k] + u[(NX - 1) + NX * (i - 1) + Nx_Ny_k] + u[(NX - 1) + NX * (i + 1) + Nx_Ny_k] - 4.0f * u[(NX - 1) + NX * i + Nx_Ny_k]) / (h * h);
	}

	if(i == 0)
	{
		Lu[Nx_Ny_k] = (Lu[1 + Nx_Ny_k] + Lu[NX + Nx_Ny_k]) / 2.0f;
		Lu[(NX - 1) + Nx_Ny_k] = (Lu[(NX - 2) + Nx_Ny_k] + Lu[(NX - 1) + NX + Nx_Ny_k]) / 2.0f;
		Lu[NX * (NY - 1) + Nx_Ny_k] = (Lu[1 + NX * (NY - 1) + Nx_Ny_k] + Lu[NX * (NY - 2) + Nx_Ny_k]) / 2.0f;
		Lu[(NX - 1) + NX * (NY - 1) + Nx_Ny_k] = (Lu[(NX - 2) + NX * (NY - 1) + Nx_Ny_k] + Lu[(NX - 1) + NX * (NY - 2) + Nx_Ny_k]) / 2.0f;
	}
}

__global__ void init_differential(float* df, float* z, float* Lu, float* f)
{
	// Map from threadIdx / BlockIdx to pixel position

	int i = threadIdx.x + blockIdx.x * blockDim.x;
	int j = threadIdx.y + blockIdx.y * blockDim.y;

	int Nx_Ny = NX * NY;

	if((i < NX) && (j < NY))
	{
		int offset = i + NX * j;

		df[offset] = z[offset + Nx_Ny] * Lu[offset + Nx_Ny] / (1.0f + f[offset]);
	}
}

__global__ void update_differential(float* df, float* z, float* Lu, float* f, int k)
{
	// Map from threadIdx / BlockIdx to pixel position

	int i = threadIdx.x + blockIdx.x * blockDim.x;
	int j = threadIdx.y + blockIdx.y * blockDim.y;

	int Nx_Ny_k = NX * NY * k;

	if((i < NX) && (j < NY))
	{
		int offset = i + NX * j;

		df[offset] += z[offset + Nx_Ny_k] * Lu[offset + Nx_Ny_k] / (1.0f + f[offset]);
	}
}

__global__ void update_field(float* alpha, float* f, float* df, float* f_minus_fo, float* fo)
{
	int i = threadIdx.x + blockIdx.x * blockDim.x;
	int j = threadIdx.y + blockIdx.y * blockDim.y;

	if((i < NX) && (j < NY))
	{
		int offset = i + NX * j;

		if((i >= 21) && (i < 180) && (j >= 21) && (j < 180))
		{
			alpha[offset] = 1.0f;
		}
		else
		{
			alpha[offset] = 0.0f;
		}

		f[offset] += 20000.0f * alpha[offset] * df[offset];

		f_minus_fo[offset] = f[offset] - fo[offset];
	}
}

__global__ void reset(float* f, float* v, float* r, float* r2, float* s)
{
	int i = threadIdx.x + blockIdx.x * blockDim.x;
	int j = threadIdx.y + blockIdx.y * blockDim.y;

	if((i < NX) && (j < NY))
	{
		int offset = i + NX * j;

		v[offset] = 1500.0f * sqrtf(1.0f + f[offset]);
		r[offset] = v[offset] * dt / hx;
		r2[offset] = powf(r[offset], 2.0f);
		s[offset] = 2.0f - 4.0f * r2[offset];
	}
}

void IO_Files(float *x, float *y, float *fo, float *f)
{
	// I/O Files

	ofstream x_file, y_file;
	ofstream fo_file;
	ofstream f_file;

	x_file.open("dev_x.txt");
	y_file.open("dev_y.txt");
	fo_file.open("dev_f0.txt");
	f_file.open("dev_f.txt");

	for (int i = 0; i < NX; i++)
	{
		x_file << x[i];
		x_file << "\n";
	}

	for (int j = 0; j < NX; j++)
	{
		y_file << y[j];
		y_file << "\n";
	}

	for (int j = 0; j < NY; j++)
	{
		for (int i = 0; i < NX; i++)
		{
			fo_file << fo[i + NX * j];
			fo_file << "\t";
		}

		fo_file << "\n";
	}

	for (int j = 0; j < NY; j++)
	{
		for (int i = 0; i < NX; i++)
		{
			f_file << f[i + NX * j];
			f_file << " ";
		}

		f_file << "\n";
	}

	x_file.close();
	y_file.close();
	fo_file.close();
	f_file.close();
}

float norm(float* A, int lenght)
{
	float sum = 0;

	for (int i = 0; i < lenght; i++)
	{
		sum += A[i] * A[i];
	}

	return sqrtf(sum);
}

	.file	"tmpxft_002139c3_00000000-6_art-mimo-original.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.section	.text._ZSt5fixedRSt8ios_base,"axG",@progbits,_ZSt5fixedRSt8ios_base,comdat
	.weak	_ZSt5fixedRSt8ios_base
	.type	_ZSt5fixedRSt8ios_base, @function
_ZSt5fixedRSt8ios_base:
.LFB3285:
	.cfi_startproc
	endbr64
	movl	24(%rdi), %edx
	movq	%rdi, %rax
	andl	$-261, %edx
	orl	$4, %edx
	movl	%edx, 24(%rdi)
	ret
	.cfi_endproc
.LFE3285:
	.size	_ZSt5fixedRSt8ios_base, .-_ZSt5fixedRSt8ios_base
	.text
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4011:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE4011:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.type	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0, @function
_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0:
.LFB4744:
	.cfi_startproc
	jmp	cudaLaunchKernel@PLT
	.cfi_endproc
.LFE4744:
	.size	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0, .-_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	.globl	_Z4normPfi
	.type	_Z4normPfi, @function
_Z4normPfi:
.LFB4008:
	.cfi_startproc
	endbr64
	xorl	%eax, %eax
	xorps	%xmm1, %xmm1
.L5:
	cmpl	%eax, %esi
	jle	.L8
	movss	(%rdi,%rax,4), %xmm0
	incq	%rax
	mulss	%xmm0, %xmm0
	addss	%xmm0, %xmm1
	jmp	.L5
.L8:
	movaps	%xmm1, %xmm0
	jmp	sqrtf@PLT
	.cfi_endproc
.LFE4008:
	.size	_Z4normPfi, .-_Z4normPfi
	.globl	_Z43__device_stub__Z11field_setupPfS_S_S_S_S_S_PfS_S_S_S_S_S_
	.type	_Z43__device_stub__Z11field_setupPfS_S_S_S_S_S_PfS_S_S_S_S_S_, @function
_Z43__device_stub__Z11field_setupPfS_S_S_S_S_S_PfS_S_S_S_S_S_:
.LFB4033:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	192(%rsp), %rax
	movq	%rdi, 56(%rsp)
	leaq	88(%rsp), %rdi
	movq	%rsi, 48(%rsp)
	leaq	100(%rsp), %rsi
	movq	%rdx, 40(%rsp)
	leaq	72(%rsp), %rdx
	movq	%rcx, 32(%rsp)
	leaq	80(%rsp), %rcx
	movq	%r8, 24(%rsp)
	movq	%r9, 16(%rsp)
	movq	%rax, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	56(%rsp), %rax
	movl	$1, 96(%rsp)
	movq	%rax, 112(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 88(%rsp)
	movq	%rax, 100(%rsp)
	movl	$1, 108(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L9
	pushq	80(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z11field_setupPfS_S_S_S_S_S_(%rip), %rdi
	pushq	80(%rsp)
	.cfi_def_cfa_offset 208
	movq	116(%rsp), %rcx
	movl	124(%rsp), %r8d
	movq	104(%rsp), %rsi
	movl	112(%rsp), %edx
	leaq	128(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L9:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L11
	call	__stack_chk_fail@PLT
.L11:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4033:
	.size	_Z43__device_stub__Z11field_setupPfS_S_S_S_S_S_PfS_S_S_S_S_S_, .-_Z43__device_stub__Z11field_setupPfS_S_S_S_S_S_PfS_S_S_S_S_S_
	.globl	_Z11field_setupPfS_S_S_S_S_S_
	.type	_Z11field_setupPfS_S_S_S_S_S_, @function
_Z11field_setupPfS_S_S_S_S_S_:
.LFB4034:
	.cfi_startproc
	endbr64
	jmp	_Z43__device_stub__Z11field_setupPfS_S_S_S_S_S_PfS_S_S_S_S_S_
	.cfi_endproc
.LFE4034:
	.size	_Z11field_setupPfS_S_S_S_S_S_, .-_Z11field_setupPfS_S_S_S_S_S_
	.globl	_Z44__device_stub__Z11propagationiiiiPfS_S_S_S_iiiiiPfS_S_S_S_i
	.type	_Z44__device_stub__Z11propagationiiiiPfS_S_S_S_iiiiiPfS_S_S_S_i, @function
_Z44__device_stub__Z11propagationiiiiPfS_S_S_S_iiiiiPfS_S_S_S_i:
.LFB4035:
	.cfi_startproc
	endbr64
	subq	$200, %rsp
	.cfi_def_cfa_offset 208
	movq	208(%rsp), %rax
	movl	%edi, 60(%rsp)
	leaq	80(%rsp), %rdi
	movl	%esi, 56(%rsp)
	leaq	92(%rsp), %rsi
	movq	%rax, 24(%rsp)
	movq	216(%rsp), %rax
	movl	%edx, 52(%rsp)
	leaq	64(%rsp), %rdx
	movq	%rax, 16(%rsp)
	movq	224(%rsp), %rax
	movl	%ecx, 48(%rsp)
	leaq	72(%rsp), %rcx
	movq	%r8, 40(%rsp)
	movq	%r9, 32(%rsp)
	movq	%rax, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 184(%rsp)
	xorl	%eax, %eax
	leaq	60(%rsp), %rax
	movl	$1, 88(%rsp)
	movq	%rax, 104(%rsp)
	leaq	56(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	52(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	232(%rsp), %rax
	movq	%rax, 176(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 80(%rsp)
	movq	%rax, 92(%rsp)
	movl	$1, 100(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L14
	pushq	72(%rsp)
	.cfi_def_cfa_offset 216
	leaq	_Z11propagationiiiiPfS_S_S_S_i(%rip), %rdi
	pushq	72(%rsp)
	.cfi_def_cfa_offset 224
	movq	108(%rsp), %rcx
	movl	116(%rsp), %r8d
	movq	96(%rsp), %rsi
	movl	104(%rsp), %edx
	leaq	120(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 216
	popq	%rdx
	.cfi_def_cfa_offset 208
.L14:
	movq	184(%rsp), %rax
	subq	%fs:40, %rax
	je	.L16
	call	__stack_chk_fail@PLT
.L16:
	addq	$200, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4035:
	.size	_Z44__device_stub__Z11propagationiiiiPfS_S_S_S_iiiiiPfS_S_S_S_i, .-_Z44__device_stub__Z11propagationiiiiPfS_S_S_S_iiiiiPfS_S_S_S_i
	.globl	_Z11propagationiiiiPfS_S_S_S_i
	.type	_Z11propagationiiiiPfS_S_S_S_i, @function
_Z11propagationiiiiPfS_S_S_S_i:
.LFB4036:
	.cfi_startproc
	endbr64
	jmp	_Z44__device_stub__Z11propagationiiiiPfS_S_S_S_iiiiiPfS_S_S_S_i
	.cfi_endproc
.LFE4036:
	.size	_Z11propagationiiiiPfS_S_S_S_i, .-_Z11propagationiiiiPfS_S_S_S_i
	.globl	_Z42__device_stub__Z22propagation_at_cornersPfPf
	.type	_Z42__device_stub__Z22propagation_at_cornersPfPf, @function
_Z42__device_stub__Z22propagation_at_cornersPfPf:
.LFB4037:
	.cfi_startproc
	endbr64
	subq	$88, %rsp
	.cfi_def_cfa_offset 96
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	leaq	52(%rsp), %rsi
	leaq	40(%rsp), %rdi
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 64(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L19
	pushq	32(%rsp)
	.cfi_def_cfa_offset 104
	leaq	_Z22propagation_at_cornersPf(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 112
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	80(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 104
	popq	%rdx
	.cfi_def_cfa_offset 96
.L19:
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L21
	call	__stack_chk_fail@PLT
.L21:
	addq	$88, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4037:
	.size	_Z42__device_stub__Z22propagation_at_cornersPfPf, .-_Z42__device_stub__Z22propagation_at_cornersPfPf
	.globl	_Z22propagation_at_cornersPf
	.type	_Z22propagation_at_cornersPf, @function
_Z22propagation_at_cornersPf:
.LFB4038:
	.cfi_startproc
	endbr64
	jmp	_Z42__device_stub__Z22propagation_at_cornersPfPf
	.cfi_endproc
.LFE4038:
	.size	_Z22propagation_at_cornersPf, .-_Z22propagation_at_cornersPf
	.globl	_Z43__device_stub__Z14initial_signalPfS_S_S_S_iPfS_S_S_S_i
	.type	_Z43__device_stub__Z14initial_signalPfS_S_S_S_iPfS_S_S_S_i, @function
_Z43__device_stub__Z14initial_signalPfS_S_S_S_iPfS_S_S_S_i:
.LFB4039:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	56(%rsp), %rcx
	movq	%r8, 8(%rsp)
	movl	%r9d, 4(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 88(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L24
	pushq	56(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z14initial_signalPfS_S_S_S_i(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 176
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	104(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L24:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L26
	call	__stack_chk_fail@PLT
.L26:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4039:
	.size	_Z43__device_stub__Z14initial_signalPfS_S_S_S_iPfS_S_S_S_i, .-_Z43__device_stub__Z14initial_signalPfS_S_S_S_iPfS_S_S_S_i
	.globl	_Z14initial_signalPfS_S_S_S_i
	.type	_Z14initial_signalPfS_S_S_S_i, @function
_Z14initial_signalPfS_S_S_S_i:
.LFB4040:
	.cfi_startproc
	endbr64
	jmp	_Z43__device_stub__Z14initial_signalPfS_S_S_S_iPfS_S_S_S_i
	.cfi_endproc
.LFE4040:
	.size	_Z14initial_signalPfS_S_S_S_i, .-_Z14initial_signalPfS_S_S_S_i
	.globl	_Z54__device_stub__Z17difference_signalPfS_S_S_S_S_S_S_S_iPfS_S_S_S_S_S_S_S_i
	.type	_Z54__device_stub__Z17difference_signalPfS_S_S_S_S_S_S_S_iPfS_S_S_S_S_S_S_S_i, @function
_Z54__device_stub__Z17difference_signalPfS_S_S_S_S_S_S_S_iPfS_S_S_S_S_S_S_S_i:
.LFB4041:
	.cfi_startproc
	endbr64
	subq	$216, %rsp
	.cfi_def_cfa_offset 224
	movq	224(%rsp), %rax
	movq	%rdi, 72(%rsp)
	leaq	96(%rsp), %rdi
	movq	%rsi, 64(%rsp)
	leaq	108(%rsp), %rsi
	movq	%rax, 24(%rsp)
	movq	232(%rsp), %rax
	movq	%rdx, 56(%rsp)
	leaq	80(%rsp), %rdx
	movq	%rax, 16(%rsp)
	movq	240(%rsp), %rax
	movq	%rcx, 48(%rsp)
	leaq	88(%rsp), %rcx
	movq	%r8, 40(%rsp)
	movq	%r9, 32(%rsp)
	movq	%rax, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 200(%rsp)
	xorl	%eax, %eax
	leaq	72(%rsp), %rax
	movl	$1, 104(%rsp)
	movq	%rax, 120(%rsp)
	leaq	64(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	56(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 176(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 184(%rsp)
	leaq	248(%rsp), %rax
	movq	%rax, 192(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 96(%rsp)
	movq	%rax, 108(%rsp)
	movl	$1, 116(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L29
	pushq	88(%rsp)
	.cfi_def_cfa_offset 232
	leaq	_Z17difference_signalPfS_S_S_S_S_S_S_S_i(%rip), %rdi
	pushq	88(%rsp)
	.cfi_def_cfa_offset 240
	movq	124(%rsp), %rcx
	movl	132(%rsp), %r8d
	movq	112(%rsp), %rsi
	movl	120(%rsp), %edx
	leaq	136(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 232
	popq	%rdx
	.cfi_def_cfa_offset 224
.L29:
	movq	200(%rsp), %rax
	subq	%fs:40, %rax
	je	.L31
	call	__stack_chk_fail@PLT
.L31:
	addq	$216, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4041:
	.size	_Z54__device_stub__Z17difference_signalPfS_S_S_S_S_S_S_S_iPfS_S_S_S_S_S_S_S_i, .-_Z54__device_stub__Z17difference_signalPfS_S_S_S_S_S_S_S_iPfS_S_S_S_S_S_S_S_i
	.globl	_Z17difference_signalPfS_S_S_S_S_S_S_S_i
	.type	_Z17difference_signalPfS_S_S_S_S_S_S_S_i, @function
_Z17difference_signalPfS_S_S_S_S_S_S_S_i:
.LFB4042:
	.cfi_startproc
	endbr64
	jmp	_Z54__device_stub__Z17difference_signalPfS_S_S_S_S_S_S_S_iPfS_S_S_S_S_S_S_S_i
	.cfi_endproc
.LFE4042:
	.size	_Z17difference_signalPfS_S_S_S_S_S_S_S_i, .-_Z17difference_signalPfS_S_S_S_S_S_S_S_i
	.globl	_Z39__device_stub__Z16backpropagation1PfS_iPfS_i
	.type	_Z39__device_stub__Z16backpropagation1PfS_iPfS_i, @function
_Z39__device_stub__Z16backpropagation1PfS_iPfS_i:
.LFB4043:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rcx
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L34
	pushq	48(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z16backpropagation1PfS_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 144
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L34:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L36
	call	__stack_chk_fail@PLT
.L36:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4043:
	.size	_Z39__device_stub__Z16backpropagation1PfS_iPfS_i, .-_Z39__device_stub__Z16backpropagation1PfS_iPfS_i
	.globl	_Z16backpropagation1PfS_i
	.type	_Z16backpropagation1PfS_i, @function
_Z16backpropagation1PfS_i:
.LFB4044:
	.cfi_startproc
	endbr64
	jmp	_Z39__device_stub__Z16backpropagation1PfS_iPfS_i
	.cfi_endproc
.LFE4044:
	.size	_Z16backpropagation1PfS_i, .-_Z16backpropagation1PfS_i
	.globl	_Z45__device_stub__Z16backpropagation2PfS_S_S_S_iPfS_S_S_S_i
	.type	_Z45__device_stub__Z16backpropagation2PfS_S_S_S_iPfS_S_S_S_i, @function
_Z45__device_stub__Z16backpropagation2PfS_S_S_S_iPfS_S_S_S_i:
.LFB4045:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	56(%rsp), %rcx
	movq	%r8, 8(%rsp)
	movl	%r9d, 4(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 88(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L39
	pushq	56(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z16backpropagation2PfS_S_S_S_i(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 176
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	104(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L39:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L41
	call	__stack_chk_fail@PLT
.L41:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4045:
	.size	_Z45__device_stub__Z16backpropagation2PfS_S_S_S_iPfS_S_S_S_i, .-_Z45__device_stub__Z16backpropagation2PfS_S_S_S_iPfS_S_S_S_i
	.globl	_Z16backpropagation2PfS_S_S_S_i
	.type	_Z16backpropagation2PfS_S_S_S_i, @function
_Z16backpropagation2PfS_S_S_S_i:
.LFB4046:
	.cfi_startproc
	endbr64
	jmp	_Z45__device_stub__Z16backpropagation2PfS_S_S_S_iPfS_S_S_S_i
	.cfi_endproc
.LFE4046:
	.size	_Z16backpropagation2PfS_S_S_S_i, .-_Z16backpropagation2PfS_S_S_S_i
	.globl	_Z30__device_stub__Z8laplace1PfS_iPfS_i
	.type	_Z30__device_stub__Z8laplace1PfS_iPfS_i, @function
_Z30__device_stub__Z8laplace1PfS_iPfS_i:
.LFB4047:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rcx
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L44
	pushq	48(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z8laplace1PfS_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 144
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L44:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L46
	call	__stack_chk_fail@PLT
.L46:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4047:
	.size	_Z30__device_stub__Z8laplace1PfS_iPfS_i, .-_Z30__device_stub__Z8laplace1PfS_iPfS_i
	.globl	_Z8laplace1PfS_i
	.type	_Z8laplace1PfS_i, @function
_Z8laplace1PfS_i:
.LFB4048:
	.cfi_startproc
	endbr64
	jmp	_Z30__device_stub__Z8laplace1PfS_iPfS_i
	.cfi_endproc
.LFE4048:
	.size	_Z8laplace1PfS_i, .-_Z8laplace1PfS_i
	.globl	_Z30__device_stub__Z8laplace2PfS_iPfS_i
	.type	_Z30__device_stub__Z8laplace2PfS_iPfS_i, @function
_Z30__device_stub__Z8laplace2PfS_iPfS_i:
.LFB4049:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rcx
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L49
	pushq	48(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z8laplace2PfS_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 144
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L49:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L51
	call	__stack_chk_fail@PLT
.L51:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4049:
	.size	_Z30__device_stub__Z8laplace2PfS_iPfS_i, .-_Z30__device_stub__Z8laplace2PfS_iPfS_i
	.globl	_Z8laplace2PfS_i
	.type	_Z8laplace2PfS_i, @function
_Z8laplace2PfS_i:
.LFB4050:
	.cfi_startproc
	endbr64
	jmp	_Z30__device_stub__Z8laplace2PfS_iPfS_i
	.cfi_endproc
.LFE4050:
	.size	_Z8laplace2PfS_i, .-_Z8laplace2PfS_i
	.globl	_Z43__device_stub__Z17init_differentialPfS_S_S_PfS_S_S_
	.type	_Z43__device_stub__Z17init_differentialPfS_S_S_PfS_S_S_, @function
_Z43__device_stub__Z17init_differentialPfS_S_S_PfS_S_S_:
.LFB4051:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rsp)
	leaq	40(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L54
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z17init_differentialPfS_S_S_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L54:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L56
	call	__stack_chk_fail@PLT
.L56:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4051:
	.size	_Z43__device_stub__Z17init_differentialPfS_S_S_PfS_S_S_, .-_Z43__device_stub__Z17init_differentialPfS_S_S_PfS_S_S_
	.globl	_Z17init_differentialPfS_S_S_
	.type	_Z17init_differentialPfS_S_S_, @function
_Z17init_differentialPfS_S_S_:
.LFB4052:
	.cfi_startproc
	endbr64
	jmp	_Z43__device_stub__Z17init_differentialPfS_S_S_PfS_S_S_
	.cfi_endproc
.LFE4052:
	.size	_Z17init_differentialPfS_S_S_, .-_Z17init_differentialPfS_S_S_
	.globl	_Z46__device_stub__Z19update_differentialPfS_S_S_iPfS_S_S_i
	.type	_Z46__device_stub__Z19update_differentialPfS_S_S_iPfS_S_S_i, @function
_Z46__device_stub__Z19update_differentialPfS_S_S_iPfS_S_S_i:
.LFB4053:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 96(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L59
	pushq	64(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z19update_differentialPfS_S_S_i(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 176
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	112(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L59:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L61
	call	__stack_chk_fail@PLT
.L61:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4053:
	.size	_Z46__device_stub__Z19update_differentialPfS_S_S_iPfS_S_S_i, .-_Z46__device_stub__Z19update_differentialPfS_S_S_iPfS_S_S_i
	.globl	_Z19update_differentialPfS_S_S_i
	.type	_Z19update_differentialPfS_S_S_i, @function
_Z19update_differentialPfS_S_S_i:
.LFB4054:
	.cfi_startproc
	endbr64
	jmp	_Z46__device_stub__Z19update_differentialPfS_S_S_iPfS_S_S_i
	.cfi_endproc
.LFE4054:
	.size	_Z19update_differentialPfS_S_S_i, .-_Z19update_differentialPfS_S_S_i
	.globl	_Z40__device_stub__Z12update_fieldPfS_S_S_S_PfS_S_S_S_
	.type	_Z40__device_stub__Z12update_fieldPfS_S_S_S_PfS_S_S_S_, @function
_Z40__device_stub__Z12update_fieldPfS_S_S_S_PfS_S_S_S_:
.LFB4055:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	64(%rsp), %rcx
	movq	%r8, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 96(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L64
	pushq	64(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z12update_fieldPfS_S_S_S_(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 176
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	112(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L64:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L66
	call	__stack_chk_fail@PLT
.L66:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4055:
	.size	_Z40__device_stub__Z12update_fieldPfS_S_S_S_PfS_S_S_S_, .-_Z40__device_stub__Z12update_fieldPfS_S_S_S_PfS_S_S_S_
	.globl	_Z12update_fieldPfS_S_S_S_
	.type	_Z12update_fieldPfS_S_S_S_, @function
_Z12update_fieldPfS_S_S_S_:
.LFB4056:
	.cfi_startproc
	endbr64
	jmp	_Z40__device_stub__Z12update_fieldPfS_S_S_S_PfS_S_S_S_
	.cfi_endproc
.LFE4056:
	.size	_Z12update_fieldPfS_S_S_S_, .-_Z12update_fieldPfS_S_S_S_
	.globl	_Z32__device_stub__Z5resetPfS_S_S_S_PfS_S_S_S_
	.type	_Z32__device_stub__Z5resetPfS_S_S_S_PfS_S_S_S_, @function
_Z32__device_stub__Z5resetPfS_S_S_S_PfS_S_S_S_:
.LFB4057:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	64(%rsp), %rcx
	movq	%r8, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 96(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L69
	pushq	64(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z5resetPfS_S_S_S_(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 176
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	112(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L69:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L71
	call	__stack_chk_fail@PLT
.L71:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4057:
	.size	_Z32__device_stub__Z5resetPfS_S_S_S_PfS_S_S_S_, .-_Z32__device_stub__Z5resetPfS_S_S_S_PfS_S_S_S_
	.globl	_Z5resetPfS_S_S_S_
	.type	_Z5resetPfS_S_S_S_, @function
_Z5resetPfS_S_S_S_:
.LFB4058:
	.cfi_startproc
	endbr64
	jmp	_Z32__device_stub__Z5resetPfS_S_S_S_PfS_S_S_S_
	.cfi_endproc
.LFE4058:
	.size	_Z5resetPfS_S_S_S_, .-_Z5resetPfS_S_S_S_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"_Z5resetPfS_S_S_S_"
.LC2:
	.string	"_Z12update_fieldPfS_S_S_S_"
.LC3:
	.string	"_Z19update_differentialPfS_S_S_i"
.LC4:
	.string	"_Z17init_differentialPfS_S_S_"
.LC5:
	.string	"_Z8laplace2PfS_i"
.LC6:
	.string	"_Z8laplace1PfS_i"
.LC7:
	.string	"_Z16backpropagation2PfS_S_S_S_i"
.LC8:
	.string	"_Z16backpropagation1PfS_i"
.LC9:
	.string	"_Z17difference_signalPfS_S_S_S_S_S_S_S_i"
.LC10:
	.string	"_Z14initial_signalPfS_S_S_S_i"
.LC11:
	.string	"_Z22propagation_at_cornersPf"
.LC12:
	.string	"_Z11propagationiiiiPfS_S_S_S_i"
.LC13:
	.string	"_Z11field_setupPfS_S_S_S_S_S_"
.LC14:
	.string	"hx"
.LC15:
	.string	"hy"
.LC16:
	.string	"h"
.LC17:
	.string	"T"
.LC18:
	.string	"dt"
.LC19:
	.string	"fre"
.LC20:
	.string	"omegac"
.LC21:
	.string	"tao"
.LC22:
	.string	"tt"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB4060:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC1(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z5resetPfS_S_S_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC2(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z12update_fieldPfS_S_S_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC3(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z19update_differentialPfS_S_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC4(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z17init_differentialPfS_S_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC5(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z8laplace2PfS_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC6(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z8laplace1PfS_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC7(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z16backpropagation2PfS_S_S_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC8(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z16backpropagation1PfS_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	leaq	.LC9(%rip), %rdx
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	_Z17difference_signalPfS_S_S_S_S_S_S_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC10(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z14initial_signalPfS_S_S_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC11(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z22propagation_at_cornersPf(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC12(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z11propagationiiiiPfS_S_S_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC13(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z11field_setupPfS_S_S_S_S_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC14(%rip), %rdx
	movl	$4, %r9d
	leaq	_ZL2hx(%rip), %rsi
	pushq	$1
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$1
	.cfi_def_cfa_offset 32
	leaq	.LC15(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$4, %r9d
	leaq	_ZL2hy(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$1
	.cfi_def_cfa_offset 32
	leaq	.LC16(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$4, %r9d
	leaq	_ZL1h(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$1
	.cfi_def_cfa_offset 32
	leaq	.LC17(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$4, %r9d
	leaq	_ZL1T(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$1
	.cfi_def_cfa_offset 32
	leaq	.LC18(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$4, %r9d
	leaq	_ZL2dt(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r11
	.cfi_def_cfa_offset 24
	popq	%rax
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$1
	.cfi_def_cfa_offset 32
	leaq	.LC19(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$4, %r9d
	leaq	_ZL3fre(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$1
	.cfi_def_cfa_offset 32
	leaq	.LC20(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$4, %r9d
	leaq	_ZL6omegac(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$1
	.cfi_def_cfa_offset 32
	leaq	.LC21(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$4, %r9d
	leaq	_ZL3tao(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$1
	.cfi_def_cfa_offset 32
	leaq	.LC22(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movl	$4, %r9d
	movq	%rdx, %rcx
	leaq	_ZL2tt(%rip), %rsi
	call	__cudaRegisterVar@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE4060:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.text._ZZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD2Ev,"axG",@progbits,_ZZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD5Ev,comdat
	.align 2
	.weak	_ZZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD2Ev
	.type	_ZZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD2Ev, @function
_ZZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD2Ev:
.LFB4139:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movq	%rdi, %rbx
	call	__errno_location@PLT
	cmpl	$0, (%rax)
	jne	.L76
	movl	(%rbx), %edx
	movl	%edx, (%rax)
.L76:
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4139:
	.size	_ZZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD2Ev, .-_ZZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD2Ev
	.weak	_ZZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD1Ev
	.set	_ZZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD1Ev,_ZZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD2Ev
	.section	.text._ZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_,"axG",@progbits,_ZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_,comdat
	.weak	_ZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_
	.type	_ZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_, @function
_ZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_:
.LFB4134:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA4134
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rdi, %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rsi, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rcx, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rdx, %rbx
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	movl	%r8d, 12(%rsp)
	leaq	28(%rsp), %r13
	movq	%fs:40, %rax
	movq	%rax, 40(%rsp)
	xorl	%eax, %eax
	call	__errno_location@PLT
	movl	12(%rsp), %edx
	leaq	32(%rsp), %rsi
	movq	%rbx, %rdi
	movq	%rax, %rbp
	movl	(%rax), %eax
	movl	%eax, 28(%rsp)
	xorl	%eax, %eax
	movl	%eax, 0(%rbp)
.LEHB0:
	call	*%r15
	movq	32(%rsp), %rdx
	cmpq	%rbx, %rdx
	jne	.L80
	movq	40(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L93
	movq	%r14, %rdi
	call	_ZSt24__throw_invalid_argumentPKc@PLT
.L80:
	cmpl	$34, 0(%rbp)
	je	.L82
	movl	$2147483648, %ecx
	movl	$4294967295, %esi
	addq	%rax, %rcx
	cmpq	%rcx, %rsi
	jnb	.L83
.L82:
	movq	40(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L93
	movq	%r14, %rdi
	call	_ZSt20__throw_out_of_rangePKc@PLT
.LEHE0:
.L83:
	testq	%r12, %r12
	je	.L85
	subq	%rbx, %rdx
	movq	%rdx, (%r12)
.L85:
	movq	%r13, %rdi
	movl	%eax, 12(%rsp)
	call	_ZZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD1Ev
	movl	12(%rsp), %eax
	movq	40(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L88
	jmp	.L93
.L89:
	endbr64
	movq	%rax, %rbx
.L86:
	movq	%r13, %rdi
	call	_ZZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD1Ev
	movq	40(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L93
	movq	%rbx, %rdi
.LEHB1:
	call	_Unwind_Resume@PLT
.LEHE1:
.L93:
	call	__stack_chk_fail@PLT
.L88:
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4134:
	.globl	__gxx_personality_v0
	.section	.gcc_except_table._ZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_,"aG",@progbits,_ZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_,comdat
.LLSDA4134:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE4134-.LLSDACSB4134
.LLSDACSB4134:
	.uleb128 .LEHB0-.LFB4134
	.uleb128 .LEHE0-.LEHB0
	.uleb128 .L89-.LFB4134
	.uleb128 0
	.uleb128 .LEHB1-.LFB4134
	.uleb128 .LEHE1-.LEHB1
	.uleb128 0
	.uleb128 0
.LLSDACSE4134:
	.section	.text._ZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_,"axG",@progbits,_ZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_,comdat
	.size	_ZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_, .-_ZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_
	.section	.text._ZZN9__gnu_cxx6__stoaIffcJEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD2Ev,"axG",@progbits,_ZZN9__gnu_cxx6__stoaIffcJEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD5Ev,comdat
	.align 2
	.weak	_ZZN9__gnu_cxx6__stoaIffcJEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD2Ev
	.type	_ZZN9__gnu_cxx6__stoaIffcJEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD2Ev, @function
_ZZN9__gnu_cxx6__stoaIffcJEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD2Ev:
.LFB4184:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movq	%rdi, %rbx
	call	__errno_location@PLT
	cmpl	$0, (%rax)
	jne	.L96
	movl	(%rbx), %edx
	movl	%edx, (%rax)
.L96:
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4184:
	.size	_ZZN9__gnu_cxx6__stoaIffcJEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD2Ev, .-_ZZN9__gnu_cxx6__stoaIffcJEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD2Ev
	.weak	_ZZN9__gnu_cxx6__stoaIffcJEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD1Ev
	.set	_ZZN9__gnu_cxx6__stoaIffcJEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD1Ev,_ZZN9__gnu_cxx6__stoaIffcJEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD2Ev
	.section	.rodata._ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_.str1.1,"aMS",@progbits,1
.LC23:
	.string	"basic_string: construction from null is not valid"
	.section	.text._ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_,"axG",@progbits,_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC5IS3_EEPKcRKS3_,comdat
	.align 2
	.weak	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_
	.type	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_, @function
_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_:
.LFB4378:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	subq	$16, %rsp
	.cfi_def_cfa_offset 48
	movq	%fs:40, %rax
	movq	%rax, 8(%rsp)
	xorl	%eax, %eax
	leaq	16(%rdi), %rax
	movq	%rax, (%rdi)
	testq	%rsi, %rsi
	jne	.L100
	movq	8(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L105
	leaq	.LC23(%rip), %rdi
	call	_ZSt19__throw_logic_errorPKc@PLT
.L100:
	movq	%rdi, %rbx
	movq	%rsi, %rdi
	movq	%rsi, %rbp
	call	strlen@PLT
	movq	%rax, (%rsp)
	leaq	0(%rbp,%rax), %r12
	cmpq	$15, %rax
	jbe	.L102
	movq	%rsp, %rsi
	xorl	%edx, %edx
	movq	%rbx, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE9_M_createERmm@PLT
	movq	%rax, (%rbx)
	movq	(%rsp), %rax
	movq	%rax, 16(%rbx)
.L102:
	movq	(%rbx), %rdi
	movq	%r12, %rdx
	movq	%rbp, %rsi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE13_S_copy_charsEPcPKcS7_@PLT
	movq	(%rsp), %rax
	movq	(%rbx), %rdx
	movq	%rax, 8(%rbx)
	movb	$0, (%rdx,%rax)
	movq	8(%rsp), %rax
	subq	%fs:40, %rax
	je	.L103
.L105:
	call	__stack_chk_fail@PLT
.L103:
	addq	$16, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4378:
	.size	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_, .-_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_
	.weak	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1IS3_EEPKcRKS3_
	.set	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1IS3_EEPKcRKS3_,_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_
	.section	.rodata.str1.1
.LC24:
	.string	"dev_x.txt"
.LC25:
	.string	"dev_y.txt"
.LC26:
	.string	"dev_f0.txt"
.LC27:
	.string	"dev_f.txt"
.LC28:
	.string	"\n"
.LC29:
	.string	"\t"
.LC30:
	.string	" "
	.text
	.globl	_Z8IO_FilesPfS_S_S_
	.type	_Z8IO_FilesPfS_S_S_, @function
_Z8IO_FilesPfS_S_S_:
.LFB4007:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA4007
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rdx, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rdi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rcx, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rsi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$2104, %rsp
	.cfi_def_cfa_offset 2160
	movq	%fs:40, %rax
	movq	%rax, 2088(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movq	%rax, %rdi
	movq	%rax, 16(%rsp)
.LEHB2:
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEEC1Ev@PLT
.LEHE2:
	leaq	552(%rsp), %rax
	movq	%rax, %rdi
	movq	%rax, 24(%rsp)
.LEHB3:
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEEC1Ev@PLT
.LEHE3:
	leaq	1064(%rsp), %rax
	movq	%rax, %rdi
	movq	%rax, (%rsp)
.LEHB4:
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEEC1Ev@PLT
.LEHE4:
	leaq	1576(%rsp), %rax
	movq	%rax, %rdi
	movq	%rax, 8(%rsp)
.LEHB5:
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEEC1Ev@PLT
.LEHE5:
	movq	16(%rsp), %rdi
	movl	$16, %edx
	leaq	.LC24(%rip), %rsi
.LEHB6:
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEE4openEPKcSt13_Ios_Openmode@PLT
	movq	24(%rsp), %rdi
	movl	$16, %edx
	leaq	.LC25(%rip), %rsi
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEE4openEPKcSt13_Ios_Openmode@PLT
	movq	(%rsp), %rdi
	movl	$16, %edx
	leaq	.LC26(%rip), %rsi
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEE4openEPKcSt13_Ios_Openmode@PLT
	movq	8(%rsp), %rdi
	movl	$16, %edx
	leaq	.LC27(%rip), %rsi
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEE4openEPKcSt13_Ios_Openmode@PLT
	xorl	%ebx, %ebx
.L107:
	movq	16(%rsp), %rdi
	cvtss2sd	0(%r13,%rbx,4), %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	16(%rsp), %rdi
	leaq	.LC28(%rip), %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	incq	%rbx
	cmpq	$201, %rbx
	jne	.L107
	xorl	%ebx, %ebx
.L108:
	movq	24(%rsp), %rdi
	cvtss2sd	0(%rbp,%rbx,4), %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	24(%rsp), %rdi
	leaq	.LC28(%rip), %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	incq	%rbx
	cmpq	$201, %rbx
	jne	.L108
	xorl	%ebp, %ebp
	leaq	.LC29(%rip), %r15
.L109:
	imulq	$804, %rbp, %r13
	xorl	%ebx, %ebx
	addq	%r14, %r13
.L110:
	movq	(%rsp), %rdi
	cvtss2sd	0(%r13,%rbx,4), %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	(%rsp), %rdi
	movq	%r15, %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	incq	%rbx
	cmpq	$201, %rbx
	jne	.L110
	movq	(%rsp), %rdi
	leaq	.LC28(%rip), %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	incq	%rbp
	cmpq	$201, %rbp
	jne	.L109
	xorl	%ebp, %ebp
	leaq	.LC30(%rip), %r14
.L111:
	imulq	$804, %rbp, %r13
	xorl	%ebx, %ebx
	addq	%r12, %r13
.L112:
	movq	8(%rsp), %rdi
	cvtss2sd	0(%r13,%rbx,4), %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	8(%rsp), %rdi
	movq	%r14, %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	incq	%rbx
	cmpq	$201, %rbx
	jne	.L112
	movq	8(%rsp), %rdi
	leaq	.LC28(%rip), %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	incq	%rbp
	cmpq	$201, %rbp
	jne	.L111
	movq	16(%rsp), %rdi
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEE5closeEv@PLT
	movq	24(%rsp), %rdi
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEE5closeEv@PLT
	movq	(%rsp), %rdi
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEE5closeEv@PLT
	movq	8(%rsp), %rdi
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEE5closeEv@PLT
.LEHE6:
	leaq	1576(%rsp), %rdi
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev@PLT
	leaq	1064(%rsp), %rdi
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev@PLT
	leaq	552(%rsp), %rdi
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev@PLT
	leaq	40(%rsp), %rdi
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev@PLT
	movq	2088(%rsp), %rax
	subq	%fs:40, %rax
	je	.L119
	jmp	.L129
.L124:
	endbr64
	movq	%rax, %rbx
.L114:
	movq	8(%rsp), %rdi
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev@PLT
	jmp	.L115
.L123:
	endbr64
	movq	%rax, %rbx
.L115:
	movq	(%rsp), %rdi
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev@PLT
	jmp	.L116
.L122:
	endbr64
	movq	%rax, %rbx
.L116:
	movq	24(%rsp), %rdi
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev@PLT
	jmp	.L117
.L121:
	endbr64
	movq	%rax, %rbx
.L117:
	movq	16(%rsp), %rdi
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev@PLT
	movq	2088(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L129
	movq	%rbx, %rdi
.LEHB7:
	call	_Unwind_Resume@PLT
.LEHE7:
.L129:
	call	__stack_chk_fail@PLT
.L119:
	addq	$2104, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4007:
	.section	.gcc_except_table,"a",@progbits
.LLSDA4007:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE4007-.LLSDACSB4007
.LLSDACSB4007:
	.uleb128 .LEHB2-.LFB4007
	.uleb128 .LEHE2-.LEHB2
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB3-.LFB4007
	.uleb128 .LEHE3-.LEHB3
	.uleb128 .L121-.LFB4007
	.uleb128 0
	.uleb128 .LEHB4-.LFB4007
	.uleb128 .LEHE4-.LEHB4
	.uleb128 .L122-.LFB4007
	.uleb128 0
	.uleb128 .LEHB5-.LFB4007
	.uleb128 .LEHE5-.LEHB5
	.uleb128 .L123-.LFB4007
	.uleb128 0
	.uleb128 .LEHB6-.LFB4007
	.uleb128 .LEHE6-.LEHB6
	.uleb128 .L124-.LFB4007
	.uleb128 0
	.uleb128 .LEHB7-.LFB4007
	.uleb128 .LEHE7-.LEHB7
	.uleb128 0
	.uleb128 0
.LLSDACSE4007:
	.text
	.size	_Z8IO_FilesPfS_S_S_, .-_Z8IO_FilesPfS_S_S_
	.section	.rodata.str1.1
.LC34:
	.string	"art_convergence0.txt"
.LC35:
	.string	"art_time0.txt"
.LC36:
	.string	"\nIter: "
.LC39:
	.string	"epsilon = "
	.text
	.globl	_Z21Ultrasonic_Tomographyifii
	.type	_Z21Ultrasonic_Tomographyifii, @function
_Z21Ultrasonic_Tomographyifii:
.LFB4006:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA4006
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register 6
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$1368, %rsp
	.cfi_offset 15, -24
	.cfi_offset 14, -32
	.cfi_offset 13, -40
	.cfi_offset 12, -48
	.cfi_offset 3, -56
	movl	%edx, -1368(%rbp)
	movl	%esi, -1396(%rbp)
	movl	%edi, -1316(%rbp)
	movl	$804, %edi
	movss	%xmm0, -1392(%rbp)
	movq	%fs:40, %rax
	movq	%rax, -56(%rbp)
	xorl	%eax, %eax
.LEHB8:
	call	_Znam@PLT
	movl	$804, %edi
	movq	%rax, -1344(%rbp)
	call	_Znam@PLT
	movl	$161604, %edi
	movq	%rax, -1352(%rbp)
	call	_Znam@PLT
	leaq	-1304(%rbp), %rdi
	movl	$804, %esi
	movl	$1, -1120(%rbp)
	movq	%rax, -1360(%rbp)
	movabsq	$55834574861, %rax
	movq	%rax, -1128(%rbp)
	movabsq	$68719476752, %rax
	movq	%rax, -1116(%rbp)
	movl	$1, -1108(%rbp)
	call	cudaMalloc@PLT
	leaq	-1296(%rbp), %rdi
	movl	$804, %esi
	call	cudaMalloc@PLT
	leaq	-1288(%rbp), %rdi
	movl	$161604, %esi
	call	cudaMalloc@PLT
	leaq	-1280(%rbp), %rdi
	movl	$161604, %esi
	call	cudaMalloc@PLT
	leaq	-1272(%rbp), %rdi
	movl	$161604, %esi
	call	cudaMalloc@PLT
	leaq	-1264(%rbp), %rdi
	movl	$161604, %esi
	call	cudaMalloc@PLT
	leaq	-1256(%rbp), %rdi
	movl	$161604, %esi
	call	cudaMalloc@PLT
	leaq	-1248(%rbp), %rdi
	movl	$64803204, %esi
	call	cudaMalloc@PLT
	movl	$640, %eax
	leaq	-1240(%rbp), %rdi
	cltd
	idivl	-1316(%rbp)
	imull	$80601, %eax, %eax
	leal	0(,%rax,4), %ebx
	movslq	%ebx, %rbx
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
	leaq	-1232(%rbp), %rdi
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
	leaq	-1224(%rbp), %rdi
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
	leaq	-1216(%rbp), %rdi
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
	movq	-1248(%rbp), %rdi
	movl	$64803204, %edx
	xorl	%esi, %esi
	call	cudaMemset@PLT
	movq	-1240(%rbp), %rdi
	movq	%rbx, %rdx
	xorl	%esi, %esi
	call	cudaMemset@PLT
	movq	-1232(%rbp), %rdi
	movq	%rbx, %rdx
	xorl	%esi, %esi
	call	cudaMemset@PLT
	movq	-1224(%rbp), %rdi
	movq	%rbx, %rdx
	xorl	%esi, %esi
	call	cudaMemset@PLT
	movq	-1216(%rbp), %rdi
	movq	%rbx, %rdx
	xorl	%esi, %esi
	call	cudaMemset@PLT
	movss	.LC32(%rip), %xmm2
	movss	.LC33(%rip), %xmm1
	xorl	%eax, %eax
.L132:
	cvtsi2ssl	%eax, %xmm0
	movq	-1344(%rbp), %rbx
	mulss	%xmm2, %xmm0
	subss	%xmm1, %xmm0
	movss	%xmm0, (%rbx,%rax,4)
	incq	%rax
	cmpq	$201, %rax
	jne	.L132
	xorl	%eax, %eax
.L133:
	cvtsi2ssl	%eax, %xmm0
	movq	-1352(%rbp), %rbx
	mulss	%xmm2, %xmm0
	subss	%xmm1, %xmm0
	movss	%xmm0, (%rbx,%rax,4)
	incq	%rax
	cmpq	$201, %rax
	jne	.L133
	movq	-1344(%rbp), %rsi
	movl	$1, %ecx
	movl	$804, %edx
	movq	-1304(%rbp), %rdi
	call	cudaMemcpy@PLT
	movl	$1, %ecx
	movl	$804, %edx
	movq	-1352(%rbp), %rsi
	movq	-1296(%rbp), %rdi
	call	cudaMemcpy@PLT
	movl	-1108(%rbp), %ecx
	xorl	%r9d, %r9d
	movq	-1116(%rbp), %rdx
	movq	-1128(%rbp), %rdi
	movl	-1120(%rbp), %esi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L134
	pushq	%rdx
	pushq	-1256(%rbp)
	movq	-1280(%rbp), %rcx
	movq	-1296(%rbp), %rsi
	movq	-1264(%rbp), %r9
	movq	-1272(%rbp), %r8
	movq	-1288(%rbp), %rdx
	movq	-1304(%rbp), %rdi
	call	_Z43__device_stub__Z11field_setupPfS_S_S_S_S_S_PfS_S_S_S_S_S_
	popq	%rcx
	popq	%rsi
.L134:
	movq	-1288(%rbp), %rsi
	movl	$2, %ecx
	movl	$161604, %edx
	movq	-1360(%rbp), %rdi
	call	cudaMemcpy@PLT
	movl	$2560, %edi
	call	_Znam@PLT
	movl	$2560, %edi
	movq	%rax, %r13
	call	_Znam@PLT
	movq	%rax, %r12
	xorl	%eax, %eax
.L135:
	movl	$181, 0(%r13,%rax,4)
	leal	22(%rax), %edx
	movl	%edx, (%r12,%rax,4)
	incq	%rax
	cmpq	$160, %rax
	jne	.L135
	movl	$340, %ecx
.L136:
	movl	%ecx, %edx
	movl	$181, (%r12,%rax,4)
	subl	%eax, %edx
	movl	%edx, 0(%r13,%rax,4)
	incq	%rax
	cmpq	$320, %rax
	jne	.L136
	movl	$500, %ecx
.L137:
	movl	$21, 0(%r13,%rax,4)
	movl	%ecx, %edx
	subl	%eax, %edx
	movl	%edx, (%r12,%rax,4)
	incq	%rax
	cmpq	$480, %rax
	jne	.L137
.L138:
	leal	-458(%rax), %edx
	movl	$21, (%r12,%rax,4)
	movl	%edx, 0(%r13,%rax,4)
	incq	%rax
	cmpq	$640, %rax
	jne	.L138
	movslq	-1316(%rbp), %rax
	xorl	%r15d, %r15d
	movq	%rax, -1328(%rbp)
	movq	%rax, %rbx
.L145:
	movq	-1248(%rbp), %rdi
	movl	$64803204, %edx
	xorl	%esi, %esi
	call	cudaMemset@PLT
	movl	0(%r13,%r15,4), %eax
	movl	-4(%r12,%rbx,4), %r14d
	movl	%eax, -1332(%rbp)
	movl	-4(%r13,%rbx,4), %eax
	movl	%eax, -1320(%rbp)
	movl	(%r12,%r15,4), %eax
	movl	-1320(%rbp), %ecx
	movl	%eax, -1336(%rbp)
	cmpl	%ecx, -1332(%rbp)
	jg	.L139
	movl	%ecx, %eax
	movl	-1332(%rbp), %ecx
	movl	%eax, -1332(%rbp)
	movl	%ecx, -1320(%rbp)
.L139:
	cmpl	%r14d, -1336(%rbp)
	jg	.L140
	movl	%r14d, %eax
	movl	-1336(%rbp), %r14d
	movl	%eax, -1336(%rbp)
.L140:
	movl	$1, -1364(%rbp)
.L142:
	movl	-1108(%rbp), %ecx
	movq	-1116(%rbp), %rdx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	-1128(%rbp), %rdi
	movl	-1120(%rbp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L141
	movl	-1364(%rbp), %eax
	movl	-1336(%rbp), %ecx
	movl	%r14d, %edx
	movl	-1332(%rbp), %esi
	movl	-1320(%rbp), %edi
	pushq	%rax
	pushq	-1248(%rbp)
	pushq	-1256(%rbp)
	pushq	-1264(%rbp)
	movq	-1272(%rbp), %r9
	movq	-1280(%rbp), %r8
	call	_Z44__device_stub__Z11propagationiiiiPfS_S_S_S_iiiiiPfS_S_S_S_i
	addq	$32, %rsp
.L141:
	incl	-1364(%rbp)
	cmpl	$400, -1364(%rbp)
	jne	.L142
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	movl	$1, %esi
	movabsq	$4294967697, %rax
	movabsq	$4294967297, %rdi
	movl	$1, -1084(%rbp)
	movq	%rax, %rdx
	movq	%rax, -1092(%rbp)
	movq	%rdi, -1104(%rbp)
	movl	$1, -1096(%rbp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L143
	movq	-1248(%rbp), %rdi
	call	_Z42__device_stub__Z22propagation_at_cornersPfPf
.L143:
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	movl	$1, %esi
	movabsq	$4294967455, %rdx
	movabsq	$4294967695, %rdi
	movl	$1, -1084(%rbp)
	movq	%rdx, -1092(%rbp)
	movq	%rdi, -1104(%rbp)
	movl	$1, -1096(%rbp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L144
	movl	-1316(%rbp), %ecx
	movl	%ebx, %eax
	movq	-1216(%rbp), %r8
	movq	-1240(%rbp), %rsi
	movq	-1248(%rbp), %rdi
	subl	%ecx, %eax
	cltd
	idivl	%ecx
	movq	-1224(%rbp), %rcx
	movq	-1232(%rbp), %rdx
	movl	%eax, %r9d
	call	_Z43__device_stub__Z14initial_signalPfS_S_S_S_iPfS_S_S_S_i
.L144:
	movq	-1328(%rbp), %rax
	movl	-1316(%rbp), %ecx
	addq	%rax, %rbx
	addq	%rax, %r15
	movl	%ebx, %eax
	subl	%ecx, %eax
	cmpl	$639, %eax
	jle	.L145
	leaq	-1208(%rbp), %rdi
	movl	$322404, %esi
	call	cudaMalloc@PLT
	leaq	-1200(%rbp), %rdi
	movl	$322404, %esi
	call	cudaMalloc@PLT
	leaq	-1192(%rbp), %rdi
	movl	$322404, %esi
	call	cudaMalloc@PLT
	leaq	-1184(%rbp), %rdi
	movl	$322404, %esi
	call	cudaMalloc@PLT
	leaq	-1176(%rbp), %rdi
	movl	$64964808, %esi
	call	cudaMalloc@PLT
	leaq	-1168(%rbp), %rdi
	movl	$64803204, %esi
	call	cudaMalloc@PLT
	leaq	-1160(%rbp), %rdi
	movl	$161604, %esi
	call	cudaMalloc@PLT
	leaq	-1152(%rbp), %rdi
	movl	$161604, %esi
	call	cudaMalloc@PLT
	leaq	-1144(%rbp), %rdi
	movl	$161604, %esi
	call	cudaMalloc@PLT
	leaq	-1136(%rbp), %rdi
	movl	$161604, %esi
	call	cudaMalloc@PLT
	movq	-1208(%rbp), %rdi
	movl	$322404, %edx
	xorl	%esi, %esi
	call	cudaMemset@PLT
	movq	-1200(%rbp), %rdi
	movl	$322404, %edx
	xorl	%esi, %esi
	call	cudaMemset@PLT
	movq	-1192(%rbp), %rdi
	movl	$322404, %edx
	xorl	%esi, %esi
	call	cudaMemset@PLT
	movq	-1184(%rbp), %rdi
	movl	$322404, %edx
	xorl	%esi, %esi
	call	cudaMemset@PLT
	movq	-1160(%rbp), %rdi
	movl	$161604, %edx
	xorl	%esi, %esi
	call	cudaMemset@PLT
	movq	-1168(%rbp), %rdi
	movl	$64803204, %edx
	xorl	%esi, %esi
	call	cudaMemset@PLT
	movl	$161604, %edi
	call	_Znam@PLT
	movl	$161604, %edi
	movq	%rax, -1376(%rbp)
	call	_Znam@PLT
	leaq	-1080(%rbp), %rdi
	movl	$16, %edx
	leaq	.LC34(%rip), %rsi
	movq	%rax, -1384(%rbp)
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEEC1EPKcSt13_Ios_Openmode@PLT
.LEHE8:
	leaq	-568(%rbp), %rdi
	movl	$16, %edx
	leaq	.LC35(%rip), %rsi
.LEHB9:
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEEC1EPKcSt13_Ios_Openmode@PLT
.LEHE9:
	xorl	%eax, %eax
	movss	.LC31(%rip), %xmm6
	movl	%eax, -1364(%rbp)
	movslq	-1368(%rbp), %rax
	movss	%xmm6, -1388(%rbp)
	movq	%rax, -1408(%rbp)
.L146:
	movl	-1396(%rbp), %ebx
	cmpl	%ebx, -1364(%rbp)
	jge	.L185
	leaq	.LC36(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
.LEHB10:
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	-1364(%rbp), %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	movq	%rax, %rdi
	leaq	.LC28(%rip), %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	-1248(%rbp), %rdi
	movl	$64803204, %edx
	xorl	%esi, %esi
	call	cudaMemset@PLT
	movq	-1328(%rbp), %r15
	xorl	%r14d, %r14d
.L179:
	movl	0(%r13,%r14,4), %eax
	movl	-4(%r13,%r15,4), %ebx
	movl	%eax, -1320(%rbp)
	movl	(%r12,%r14,4), %eax
	movl	%eax, -1336(%rbp)
	movl	-4(%r12,%r15,4), %eax
	movl	%eax, -1332(%rbp)
	cmpl	%ebx, -1320(%rbp)
	jg	.L147
	movl	%ebx, %eax
	movl	-1320(%rbp), %ebx
	movl	%eax, -1320(%rbp)
.L147:
	movl	-1332(%rbp), %ecx
	cmpl	%ecx, -1336(%rbp)
	jg	.L148
	movl	%ecx, %eax
	movl	-1336(%rbp), %ecx
	movl	%eax, -1336(%rbp)
	movl	%ecx, -1332(%rbp)
.L148:
	movl	-1108(%rbp), %ecx
	movq	-1116(%rbp), %rdx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	-1128(%rbp), %rdi
	movl	-1120(%rbp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L149
	movq	-1256(%rbp), %r8
	movq	-1264(%rbp), %rcx
	movq	-1272(%rbp), %rdx
	movq	-1280(%rbp), %rsi
	movq	-1160(%rbp), %rdi
	call	_Z32__device_stub__Z5resetPfS_S_S_S_PfS_S_S_S_
.L149:
	movl	$1, -1368(%rbp)
.L151:
	movl	-1108(%rbp), %ecx
	movq	-1116(%rbp), %rdx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	-1128(%rbp), %rdi
	movl	-1120(%rbp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	je	.L150
.L153:
	incl	-1368(%rbp)
	cmpl	$400, -1368(%rbp)
	jne	.L151
	jmp	.L218
.L150:
	movl	-1368(%rbp), %eax
	movl	-1336(%rbp), %ecx
	movl	%ebx, %edi
	movl	-1332(%rbp), %edx
	movl	-1320(%rbp), %esi
	pushq	%rax
	pushq	-1248(%rbp)
	pushq	-1256(%rbp)
	pushq	-1264(%rbp)
	movq	-1272(%rbp), %r9
	movq	-1280(%rbp), %r8
	.cfi_escape 0x2e,0x20
	call	_Z44__device_stub__Z11propagationiiiiPfS_S_S_S_iiiiiPfS_S_S_S_i
	addq	$32, %rsp
	jmp	.L153
.L218:
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	movl	$1, %esi
	movabsq	$4294967697, %rax
	movabsq	$4294967297, %rdi
	movl	$1, -1084(%rbp)
	movq	%rax, %rdx
	movq	%rax, -1092(%rbp)
	movq	%rdi, -1104(%rbp)
	movl	$1, -1096(%rbp)
	.cfi_escape 0x2e,0
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	je	.L154
.L156:
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	movl	$1, %esi
	movabsq	$4294967455, %rdx
	movabsq	$4294967695, %rdi
	movl	$1, -1084(%rbp)
	movq	%rdx, -1092(%rbp)
	movq	%rdi, -1104(%rbp)
	movl	$1, -1096(%rbp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	je	.L157
	jmp	.L159
.L154:
	movq	-1248(%rbp), %rdi
	call	_Z42__device_stub__Z22propagation_at_cornersPfPf
	jmp	.L156
.L157:
	movl	-1316(%rbp), %ebx
	movl	%r15d, %eax
	subl	%ebx, %eax
	cltd
	idivl	%ebx
	pushq	%rax
	pushq	-1184(%rbp)
	pushq	-1192(%rbp)
	pushq	-1200(%rbp)
	movq	-1208(%rbp), %r9
	movq	-1216(%rbp), %r8
	movq	-1224(%rbp), %rcx
	movq	-1232(%rbp), %rdx
	movq	-1240(%rbp), %rsi
	movq	-1248(%rbp), %rdi
	.cfi_escape 0x2e,0x20
	call	_Z54__device_stub__Z17difference_signalPfS_S_S_S_S_S_S_S_iPfS_S_S_S_S_S_S_S_i
	addq	$32, %rsp
.L159:
	movq	-1176(%rbp), %rdi
	movl	$64964808, %edx
	xorl	%esi, %esi
	.cfi_escape 0x2e,0
	call	cudaMemset@PLT
	movl	$399, %ebx
.L158:
	movl	-1108(%rbp), %ecx
	movq	-1116(%rbp), %rdx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	-1128(%rbp), %rdi
	movl	-1120(%rbp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	je	.L160
.L162:
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	movl	$1, %esi
	movabsq	$4294967497, %rax
	movabsq	$4294967297, %rdi
	movl	$1, -1084(%rbp)
	movq	%rax, %rdx
	movq	%rax, -1092(%rbp)
	movq	%rdi, -1104(%rbp)
	movl	$1, -1096(%rbp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L165
	jmp	.L219
.L160:
	movq	-1160(%rbp), %rsi
	movq	-1176(%rbp), %rdi
	movl	%ebx, %edx
	call	_Z39__device_stub__Z16backpropagation1PfS_iPfS_i
	jmp	.L162
.L219:
	movq	-1184(%rbp), %r8
	movq	-1192(%rbp), %rcx
	movl	%ebx, %r9d
	movq	-1200(%rbp), %rdx
	movq	-1208(%rbp), %rsi
	movq	-1176(%rbp), %rdi
	call	_Z45__device_stub__Z16backpropagation2PfS_S_S_S_iPfS_S_S_S_i
.L165:
	decl	%ebx
	jne	.L158
	movl	$1, %ebx
	jmp	.L164
.L222:
	testl	%eax, %eax
	je	.L166
.L168:
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	movl	$1, %esi
	movabsq	$4294967497, %rax
	movabsq	$4294967297, %rdi
	movl	$1, -1084(%rbp)
	movq	%rax, %rdx
	movq	%rax, -1092(%rbp)
	movq	%rdi, -1104(%rbp)
	movl	$1, -1096(%rbp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	je	.L220
.L171:
	incl	%ebx
	cmpl	$401, %ebx
	je	.L221
.L164:
	movl	-1108(%rbp), %ecx
	movq	-1116(%rbp), %rdx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	-1128(%rbp), %rdi
	movl	-1120(%rbp), %esi
	call	__cudaPushCallConfiguration@PLT
	jmp	.L222
.L166:
	movq	-1168(%rbp), %rsi
	movq	-1248(%rbp), %rdi
	movl	%ebx, %edx
	call	_Z30__device_stub__Z8laplace1PfS_iPfS_i
	jmp	.L168
.L220:
	movq	-1168(%rbp), %rsi
	movq	-1248(%rbp), %rdi
	movl	%ebx, %edx
	call	_Z30__device_stub__Z8laplace2PfS_iPfS_i
	jmp	.L171
.L221:
	movl	-1108(%rbp), %ecx
	movq	-1116(%rbp), %rdx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	-1128(%rbp), %rdi
	movl	-1120(%rbp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	je	.L172
.L174:
	movl	$2, %ebx
	jmp	.L173
.L172:
	movq	-1160(%rbp), %rcx
	movq	-1168(%rbp), %rdx
	movq	-1176(%rbp), %rsi
	movq	-1152(%rbp), %rdi
	call	_Z43__device_stub__Z17init_differentialPfS_S_S_PfS_S_S_
	jmp	.L174
.L224:
	testl	%eax, %eax
	je	.L175
.L177:
	incl	%ebx
	cmpl	$401, %ebx
	je	.L223
.L173:
	movl	-1108(%rbp), %ecx
	movq	-1116(%rbp), %rdx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	-1128(%rbp), %rdi
	movl	-1120(%rbp), %esi
	call	__cudaPushCallConfiguration@PLT
	jmp	.L224
.L175:
	movq	-1160(%rbp), %rcx
	movq	-1168(%rbp), %rdx
	movl	%ebx, %r8d
	movq	-1176(%rbp), %rsi
	movq	-1152(%rbp), %rdi
	call	_Z46__device_stub__Z19update_differentialPfS_S_S_iPfS_S_S_i
	jmp	.L177
.L223:
	movl	-1108(%rbp), %ecx
	movq	-1116(%rbp), %rdx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	-1128(%rbp), %rdi
	movl	-1120(%rbp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	je	.L178
.L181:
	movq	-1328(%rbp), %rax
	movl	-1316(%rbp), %ebx
	addq	%rax, %r15
	addq	%rax, %r14
	movl	%r15d, %eax
	subl	%ebx, %eax
	cmpl	$639, %eax
	jle	.L179
	jmp	.L225
.L178:
	movq	-1288(%rbp), %r8
	movq	-1136(%rbp), %rcx
	movq	-1152(%rbp), %rdx
	movq	-1160(%rbp), %rsi
	movq	-1144(%rbp), %rdi
	call	_Z40__device_stub__Z12update_fieldPfS_S_S_S_PfS_S_S_S_
	jmp	.L181
.L225:
	movq	-1136(%rbp), %rsi
	movl	$2, %ecx
	movl	$161604, %edx
	movq	-1384(%rbp), %rdi
	call	cudaMemcpy@PLT
	movq	-1384(%rbp), %rdi
	movl	$40401, %esi
	call	_Z4normPfi
	movq	-1360(%rbp), %rdi
	movl	$40401, %esi
	movd	%xmm0, %ebx
	call	_Z4normPfi
	movaps	%xmm0, %xmm1
	movd	%ebx, %xmm0
	divss	%xmm1, %xmm0
	mulss	.LC37(%rip), %xmm0
	movss	%xmm0, -1320(%rbp)
	call	clock@PLT
	movq	-1408(%rbp), %rbx
	cvtss2sd	-1320(%rbp), %xmm3
	leaq	-1080(%rbp), %rdi
	movq	%xmm3, %r14
	subq	%rbx, %rax
	cvtsi2ssq	%rax, %xmm0
	divss	.LC38(%rip), %xmm0
	movd	%xmm0, %ebx
	movaps	%xmm3, %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%rax, %rdi
	leaq	.LC30(%rip), %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movd	%ebx, %xmm4
	leaq	-568(%rbp), %rdi
	cvtss2sd	%xmm4, %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%rax, %rdi
	leaq	.LC30(%rip), %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC39(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	movq	%r14, %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%rax, %rdi
	leaq	.LC28(%rip), %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movss	-1392(%rbp), %xmm5
	comiss	-1320(%rbp), %xmm5
	jb	.L214
.L185:
	movq	-1160(%rbp), %rsi
	movl	$2, %ecx
	movl	$161604, %edx
	movq	-1376(%rbp), %rdi
	call	cudaMemcpy@PLT
	jmp	.L226
.L214:
	movss	-1320(%rbp), %xmm7
	comiss	-1388(%rbp), %xmm7
	ja	.L185
	ucomiss	%xmm7, %xmm7
	jp	.L185
	incl	-1364(%rbp)
	movss	%xmm7, -1388(%rbp)
	jmp	.L146
.L226:
	movq	-1376(%rbp), %rcx
	movq	-1360(%rbp), %rdx
	movq	-1352(%rbp), %rsi
	movq	-1344(%rbp), %rdi
	call	_Z8IO_FilesPfS_S_S_
	movq	-1304(%rbp), %rdi
	call	cudaFree@PLT
	movq	-1296(%rbp), %rdi
	call	cudaFree@PLT
	movq	-1288(%rbp), %rdi
	call	cudaFree@PLT
	movq	-1280(%rbp), %rdi
	call	cudaFree@PLT
	movq	-1272(%rbp), %rdi
	call	cudaFree@PLT
	movq	-1264(%rbp), %rdi
	call	cudaFree@PLT
	movq	-1256(%rbp), %rdi
	call	cudaFree@PLT
	movq	-1248(%rbp), %rdi
	call	cudaFree@PLT
	movq	-1240(%rbp), %rdi
	call	cudaFree@PLT
	movq	-1232(%rbp), %rdi
	call	cudaFree@PLT
	movq	-1224(%rbp), %rdi
	call	cudaFree@PLT
	movq	-1216(%rbp), %rdi
	call	cudaFree@PLT
	movq	-1208(%rbp), %rdi
	call	cudaFree@PLT
	movq	-1200(%rbp), %rdi
	call	cudaFree@PLT
	movq	-1192(%rbp), %rdi
	call	cudaFree@PLT
	movq	-1184(%rbp), %rdi
	call	cudaFree@PLT
	movq	-1176(%rbp), %rdi
	call	cudaFree@PLT
	movq	-1168(%rbp), %rdi
	call	cudaFree@PLT
	movq	-1160(%rbp), %rdi
	call	cudaFree@PLT
	movq	-1152(%rbp), %rdi
	call	cudaFree@PLT
	movq	-1144(%rbp), %rdi
	call	cudaFree@PLT
	movq	-1136(%rbp), %rdi
	call	cudaFree@PLT
	movq	-1344(%rbp), %rdi
	call	_ZdaPv@PLT
	movq	-1352(%rbp), %rdi
	call	_ZdaPv@PLT
	movq	-1360(%rbp), %rdi
	call	_ZdaPv@PLT
	movq	%r12, %rdi
	call	_ZdaPv@PLT
	movq	%r13, %rdi
	call	_ZdaPv@PLT
	movq	-1376(%rbp), %rdi
	call	_ZdaPv@PLT
	movq	-1384(%rbp), %rdi
	call	_ZdaPv@PLT
	call	cudaDeviceReset@PLT
.LEHE10:
	leaq	-568(%rbp), %rdi
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev@PLT
	leaq	-1080(%rbp), %rdi
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev@PLT
	movq	-56(%rbp), %rax
	subq	%fs:40, %rax
	je	.L190
	jmp	.L216
.L194:
	endbr64
	movq	%rax, %rbx
.L187:
	leaq	-568(%rbp), %rdi
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev@PLT
	jmp	.L188
.L193:
	endbr64
	movq	%rax, %rbx
.L188:
	leaq	-1080(%rbp), %rdi
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev@PLT
	movq	-56(%rbp), %rax
	subq	%fs:40, %rax
	jne	.L216
	movq	%rbx, %rdi
.LEHB11:
	call	_Unwind_Resume@PLT
.LEHE11:
.L216:
	call	__stack_chk_fail@PLT
.L190:
	leaq	-40(%rbp), %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE4006:
	.section	.gcc_except_table
.LLSDA4006:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE4006-.LLSDACSB4006
.LLSDACSB4006:
	.uleb128 .LEHB8-.LFB4006
	.uleb128 .LEHE8-.LEHB8
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB9-.LFB4006
	.uleb128 .LEHE9-.LEHB9
	.uleb128 .L193-.LFB4006
	.uleb128 0
	.uleb128 .LEHB10-.LFB4006
	.uleb128 .LEHE10-.LEHB10
	.uleb128 .L194-.LFB4006
	.uleb128 0
	.uleb128 .LEHB11-.LFB4006
	.uleb128 .LEHE11-.LEHB11
	.uleb128 0
	.uleb128 0
.LLSDACSE4006:
	.text
	.size	_Z21Ultrasonic_Tomographyifii, .-_Z21Ultrasonic_Tomographyifii
	.section	.rodata.str1.1
.LC40:
	.string	"Usage: "
.LC41:
	.string	" <sensor group size> <target epsilon> <max iterations>\n\n"
.LC42:
	.string	"stoi"
.LC43:
	.string	"stof"
.LC44:
	.string	"Ultrasonic Tomography Running:\n\n"
.LC45:
	.string	"ti = "
.LC46:
	.string	"tf = "
.LC47:
	.string	"tt = "
.LC48:
	.string	"Total Seconds = "
	.section	.text.startup
	.globl	main
	.type	main, @function
main:
.LFB4005:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA4005
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	leaq	_ZSt4cerr(%rip), %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rsi, %rbx
	subq	$104, %rsp
	.cfi_def_cfa_offset 160
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	cmpl	$4, %edi
	je	.L228
	leaq	.LC40(%rip), %rsi
	movq	%r13, %rdi
.LEHB12:
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	(%rbx), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC41(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	$1, %edi
	call	exit@PLT
.L228:
	leaq	56(%rsp), %rax
	movq	8(%rsi), %rsi
	leaq	48(%rsp), %r12
	movq	%r12, %rdx
	movq	%rax, %rdi
	movq	%rax, 8(%rsp)
	leaq	.LC42(%rip), %r15
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1IS3_EEPKcRKS3_
.LEHE12:
	movq	56(%rsp), %rdx
	xorl	%ecx, %ecx
	movq	%r15, %rsi
	movq	__isoc23_strtol@GOTPCREL(%rip), %rdi
	movl	$10, %r8d
.LEHB13:
	call	_ZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_
.LEHE13:
	movq	8(%rsp), %rdi
	movl	%eax, %ebp
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	movq	16(%rbx), %rsi
	movq	8(%rsp), %rdi
	leaq	43(%rsp), %rdx
.LEHB14:
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1IS3_EEPKcRKS3_
.LEHE14:
	movq	56(%rsp), %r14
	call	__errno_location@PLT
	movq	%r12, %rsi
	movl	(%rax), %edx
	movq	%r14, %rdi
	movq	%rax, 24(%rsp)
	movl	%edx, 44(%rsp)
	xorl	%edx, %edx
	movl	%edx, (%rax)
	call	strtof@PLT
	cmpq	48(%rsp), %r14
	movq	24(%rsp), %rax
	leaq	44(%rsp), %r14
	movss	%xmm0, 20(%rsp)
	jne	.L229
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L246
	leaq	.LC43(%rip), %rdi
.LEHB15:
	call	_ZSt24__throw_invalid_argumentPKc@PLT
.L229:
	cmpl	$34, (%rax)
	jne	.L231
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L246
	leaq	.LC43(%rip), %rdi
	call	_ZSt20__throw_out_of_rangePKc@PLT
.LEHE15:
.L231:
	movq	%r14, %rdi
	call	_ZZN9__gnu_cxx6__stoaIffcJEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD1Ev
	movq	8(%rsp), %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	movq	24(%rbx), %rsi
	movq	8(%rsp), %rdi
	movq	%r12, %rdx
.LEHB16:
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1IS3_EEPKcRKS3_
.LEHE16:
	movq	56(%rsp), %rdx
	xorl	%ecx, %ecx
	movq	%r15, %rsi
	movq	__isoc23_strtol@GOTPCREL(%rip), %rdi
	movl	$10, %r8d
.LEHB17:
	call	_ZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_
.LEHE17:
	movq	8(%rsp), %rdi
	movl	%eax, %ebx
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	cmpl	$-1, %ebx
	jne	.L236
	movl	$2147483647, %ebx
	jmp	.L236
.L245:
	endbr64
	movq	%rax, %rbx
.L234:
	movq	%r14, %rdi
	call	_ZZN9__gnu_cxx6__stoaIffcJEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD1Ev
	jmp	.L239
.L236:
	leaq	_ZSt4cout(%rip), %r14
	leaq	_ZSt5fixedRSt8ios_base(%rip), %r12
	movq	%r12, %rsi
	movq	%r14, %rdi
.LEHB18:
	call	_ZNSolsEPFRSt8ios_baseS0_E@PLT
	movq	%r12, %rsi
	movq	%r13, %rdi
	leaq	.LC28(%rip), %r12
	movq	(%rax), %rdx
	movq	-24(%rdx), %rdx
	movq	$10, 8(%rax,%rdx)
	call	_ZNSolsEPFRSt8ios_baseS0_E@PLT
	leaq	.LC44(%rip), %rsi
	movq	%r14, %rdi
	movq	(%rax), %rdx
	movq	-24(%rdx), %rdx
	movq	$10, 8(%rax,%rdx)
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	call	clock@PLT
	leaq	.LC45(%rip), %rsi
	movq	%r14, %rdi
	movq	%rax, %r15
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%r15d, %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	movq	%r12, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movss	20(%rsp), %xmm0
	movl	%r15d, %edx
	movl	%ebx, %esi
	movl	%ebp, %edi
	call	_Z21Ultrasonic_Tomographyifii
	call	clock@PLT
	leaq	.LC46(%rip), %rsi
	movq	%r14, %rdi
	movq	%rax, %rbx
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%ebx, %esi
	subl	%r15d, %ebx
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	movq	%r12, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC47(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%ebx, %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	movq	%r12, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC48(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	cvtsi2ssl	%ebx, %xmm0
	divss	.LC38(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%r12, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L241
	jmp	.L246
.L243:
	endbr64
	jmp	.L249
.L244:
	endbr64
.L249:
	movq	%rax, %rbx
.L239:
	movq	8(%rsp), %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L246
	movq	%rbx, %rdi
	call	_Unwind_Resume@PLT
.LEHE18:
.L246:
	call	__stack_chk_fail@PLT
.L241:
	addq	$104, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4005:
	.section	.gcc_except_table
.LLSDA4005:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE4005-.LLSDACSB4005
.LLSDACSB4005:
	.uleb128 .LEHB12-.LFB4005
	.uleb128 .LEHE12-.LEHB12
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB13-.LFB4005
	.uleb128 .LEHE13-.LEHB13
	.uleb128 .L243-.LFB4005
	.uleb128 0
	.uleb128 .LEHB14-.LFB4005
	.uleb128 .LEHE14-.LEHB14
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB15-.LFB4005
	.uleb128 .LEHE15-.LEHB15
	.uleb128 .L245-.LFB4005
	.uleb128 0
	.uleb128 .LEHB16-.LFB4005
	.uleb128 .LEHE16-.LEHB16
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB17-.LFB4005
	.uleb128 .LEHE17-.LEHB17
	.uleb128 .L244-.LFB4005
	.uleb128 0
	.uleb128 .LEHB18-.LFB4005
	.uleb128 .LEHE18-.LEHB18
	.uleb128 0
	.uleb128 0
.LLSDACSE4005:
	.section	.text.startup
	.size	main, .-main
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.local	_ZL2tt
	.comm	_ZL2tt,4,4
	.local	_ZL3tao
	.comm	_ZL3tao,4,4
	.local	_ZL6omegac
	.comm	_ZL6omegac,4,4
	.local	_ZL3fre
	.comm	_ZL3fre,4,4
	.local	_ZL2dt
	.comm	_ZL2dt,4,4
	.local	_ZL1T
	.comm	_ZL1T,4,4
	.local	_ZL1h
	.comm	_ZL1h,4,4
	.local	_ZL2hy
	.comm	_ZL2hy,4,4
	.local	_ZL2hx
	.comm	_ZL2hx,4,4
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC31:
	.long	2139095040
	.align 4
.LC32:
	.long	981668463
	.align 4
.LC33:
	.long	1036831949
	.align 4
.LC37:
	.long	1120403456
	.align 4
.LC38:
	.long	1232348160
	.hidden	DW.ref.__gxx_personality_v0
	.weak	DW.ref.__gxx_personality_v0
	.section	.data.rel.local.DW.ref.__gxx_personality_v0,"awG",@progbits,DW.ref.__gxx_personality_v0,comdat
	.align 8
	.type	DW.ref.__gxx_personality_v0, @object
	.size	DW.ref.__gxx_personality_v0, 8
DW.ref.__gxx_personality_v0:
	.quad	__gxx_personality_v0
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

// HEADERS


#include <hip/hip_runtime.h>
#include <iostream>
#include <iomanip>
#include <limits>

#include <stdlib.h>
#include <fstream>
#include <math.h>
#include <time.h>

using namespace std;

// DEFINITIONS

#define NX		201
#define NY		201
#define NT		401
#define NS		640


__constant__ float hx = 0.001f;
__constant__ float hy = 0.001f;
__constant__ float h = 0.001f;
__constant__ float T = 1.3333e-04f; // 0.2f / 1500.0f;
__constant__ float dt = 3.3333e-07f; // T / 400.0f;
__constant__ float fre = 125000.0f;
__constant__ float omegac = 7.8540e+05f; // 2.0f * pi * fre;
__constant__ float tao = 4.0000e-06f; // pi / omegac;
__constant__ float tt = 8.1573e-06f; // sqrtf(6.0f * logf(2.0f)) * tao;

// FUNCTIONS DECLARATION

void Ultrasonic_Tomography(int group_size, float target_epsilon, int max_iterations, int ti);
void IO_Files(float*, float*, float*, float*);
float norm(float*, int);

__global__ void field_setup(float*, float*, float*, float*, float*, float*, float*);
__global__ void propagation(int, int, int, int, float*, float*, float* , float*, float*, int);
__global__ void propagation_at_corners(float*);
__global__ void initial_signal(float*, float*, float*, float*, float*, int);
__global__ void difference_signal(float*, float*, float*, float*, float*, float*, float*, float*, float*, int);
__global__ void backpropagation1(float*, float*, int);
__global__ void backpropagation2(float*, float*, float*, float*, float*, int);
__global__ void laplace1(float*, float*, int);
__global__ void laplace2(float*, float*, int);
__global__ void init_differential(float*, float*, float*, float*);
__global__ void update_differential(float*, float*, float*, float*, int);
__global__ void update_field(float*, float*, float*, float*, float*);
__global__ void reset(float*, float*, float*, float*, float*);

// MAIN PROGRAM

int main(int argc, char **argv)
{
	if (argc != 4) {
		cerr << "Usage: " << argv[0] << " <sensor group size> <target epsilon> <max iterations>\n\n";
		exit(1);
	}

	int group_size = stoi(argv[1]);
	float target_epsilon = stof(argv[2]);
	int max_iterations = stoi(argv[3]);

	if (max_iterations == -1)
		max_iterations = numeric_limits<int>::max();

	// Time measuring variables

	int ti = 0, tf = 0;

	// Function Execution

	// set floting-point precision on stdout and stderr
	cout << fixed << setprecision(10);
	cerr << fixed << setprecision(10);

	cout << "Ultrasonic Tomography Running:\n\n";

	ti = clock();
	cout << "ti = " << ti << "\n";

	Ultrasonic_Tomography(group_size, target_epsilon, max_iterations, ti);

	tf = clock();
	cout << "tf = " << tf << "\n"
		 << "tt = " << tf - ti << "\n"
		 << "Total Seconds = " << (float)(tf - ti) / CLOCKS_PER_SEC << "\n";

	// End of the program

	return 0;
}

// FUNCTIONS DEFINITION

void Ultrasonic_Tomography(int group_size, float target_epsilon, int max_iterations, int ti)
{
	// Simulation Variables

	float hx = 0.001f;
	float hy = 0.001f;

	int Nx_Ny = NX * NY;
	int Nx_Ny_Nt = NX * NY * NT;
	int Nx_Nt = NX * NT;

	float* x = new float[NX];
	float* y = new float[NY];
	float* fo = new float[Nx_Ny];

	// Kernel Preparation

	/*dim3 Grid_Size(13, 26);
	dim3 Block_Size(16, 8);*/

	/*dim3 Grid_Size(7, 51);
	dim3 Block_Size(32, 4);*/

	/*dim3 Grid_Size(7, 26);
	dim3 Block_Size(32, 8);*/

	dim3 Grid_Size(13, 13);
	dim3 Block_Size(16, 16);

	// Variables of allocation

	float* dev_x;
	int size_x = NX * sizeof(float);

	float* dev_y;
	int size_y = NX * sizeof(float);

	float* dev_fo;
	int size_fo = Nx_Ny * sizeof(float);

	float* dev_v;
	int size_v = Nx_Ny * sizeof(float);

	float* dev_r;
	int size_r = Nx_Ny * sizeof(float);

	float* dev_r2;
	int size_r2 = Nx_Ny * sizeof(float);

	float* dev_s;
	int size_s = Nx_Ny * sizeof(float);

	float* dev_u;
	int size_u = Nx_Ny_Nt * sizeof(float);

	int Ng = NS / group_size;

	float* dev_g1;
	int size_g1 = Nx_Nt * Ng * sizeof(float);

	float* dev_g2;
	int size_g2 = Nx_Nt * Ng * sizeof(float);

	float* dev_g3;
	int size_g3 = Nx_Nt * Ng * sizeof(float);

	float* dev_g4;
	int size_g4 = Nx_Nt * Ng * sizeof(float);

	hipMalloc((void**) &dev_x, size_x);
	hipMalloc((void**) &dev_y, size_y);
	hipMalloc((void**) &dev_fo, size_fo);
	hipMalloc((void**) &dev_v, size_v);
	hipMalloc((void**) &dev_r, size_r);
	hipMalloc((void**) &dev_r2, size_r2);
	hipMalloc((void**) &dev_s, size_s);
	hipMalloc((void**) &dev_u, size_u);
	hipMalloc((void**) &dev_g1, size_g1);
	hipMalloc((void**) &dev_g2, size_g2);
	hipMalloc((void**) &dev_g3, size_g3);
	hipMalloc((void**) &dev_g4, size_g4);

	hipMemset(dev_u, 0.0, size_u);
	hipMemset(dev_g1, 0.0, size_g1);
	hipMemset(dev_g2, 0.0, size_g2);
	hipMemset(dev_g3, 0.0, size_g3);
	hipMemset(dev_g4, 0.0, size_g4);

	// Environment Initialization

	for (int i = 0; i < NX; i++)
	{
		x[i] = -0.1f + i * hx;
	}

	for (int j = 0; j < NY; j++)
	{
		y[j] = -0.1f + j * hy;
	}

	hipMemcpy(dev_x, x, size_x, hipMemcpyHostToDevice);
	hipMemcpy(dev_y, y, size_y, hipMemcpyHostToDevice);

	field_setup<<<Grid_Size, Block_Size>>>(dev_x, dev_y, dev_fo, dev_v, dev_r, dev_r2, dev_s);

	hipMemcpy(fo, dev_fo, size_fo, hipMemcpyDeviceToHost);

	// Position of the transducers

	int* jj = new int[NS];
	int* ii = new int[NS];

	for (int p = 0; p < 160; p++)
	{
		jj[p] = 181;
		ii[p] = 21 + (p + 1);
	}

	for (int p = 160; p < 320; p++)
	{
		ii[p] = 181;
		jj[p] = 181 - ((p + 1) - 160);
	}

	for (int p = 320; p < 480; p++)
	{
		jj[p] = 21;
		ii[p] = 181 - ((p + 1) - 320);
	}

	for (int p = 480; p < NS; p++)
	{
		ii[p] = 21;
		jj[p] = 21 + ((p + 1) - 480);
	}

	for (int p = 0; p < NS; p += group_size)
	{
		hipMemset(dev_u, 0.0, size_u);

		int jp1 = jj[p];
		int jp2 = jj[p + group_size - 1];
		int ip1 = ii[p];
		int ip2 = ii[p + group_size - 1];

		if (jp2 < jp1)
		{
			int jp = jp1;
			jp1 = jp2;
			jp2 = jp;
		}

		if (ip2 < ip1)
		{
			int ip = ip1;
			ip1 = ip2;
			ip2 = ip;
		}

		// Boundary

		for (int k = 1; k < NT - 1; k++)
		{
			propagation<<<Grid_Size, Block_Size>>>(jp1, jp2, ip1, ip2, dev_v, dev_r, dev_r2 , dev_s, dev_u, k);
		}

		// Four corners

		propagation_at_corners<<<1, NT>>>(dev_u);

		initial_signal<<<dim3(NT - 2, 1) , dim3(159, 1)>>>(dev_u, dev_g1, dev_g2, dev_g3, dev_g4, p / group_size);
	}

	// Kaczmarz method
	// propagation

	float* dev_rr1;
	int size_rr1 = Nx_Nt * sizeof(float);

	float* dev_rr2;
	int size_rr2 = Nx_Nt * sizeof(float);

	float* dev_rr3;
	int size_rr3 = Nx_Nt * sizeof(float);

	float* dev_rr4;
	int size_rr4 = Nx_Nt * sizeof(float);

	float* dev_z;
	int size_z = Nx_Ny * (NT + 1) * sizeof(float);

	float* dev_Lu;
	int size_Lu = Nx_Ny_Nt * sizeof(float);

	float* dev_f;
	int size_f = Nx_Ny * sizeof(float);

	float* dev_df;
	int size_df = Nx_Ny * sizeof(float);

	float* dev_alpha;
	int size_alpha = Nx_Ny * sizeof(float);

	float* dev_f_minus_fo;
	int size_f_minus_fo = Nx_Ny * sizeof(float);

	// Allocation

	hipMalloc((void**) &dev_rr1, size_rr1);
	hipMalloc((void**) &dev_rr2, size_rr2);
	hipMalloc((void**) &dev_rr3, size_rr3);
	hipMalloc((void**) &dev_rr4, size_rr4);
	hipMalloc((void**) &dev_z, size_z);
	hipMalloc((void**) &dev_Lu, size_Lu);
	hipMalloc((void**) &dev_f, size_f);
	hipMalloc((void**) &dev_df, size_df);
	hipMalloc((void**) &dev_alpha, size_alpha);
	hipMalloc((void**) &dev_f_minus_fo, size_f_minus_fo);

	hipMemset(dev_rr1, 0.0, size_rr1);
	hipMemset(dev_rr2, 0.0, size_rr2);
	hipMemset(dev_rr3, 0.0, size_rr3);
	hipMemset(dev_rr4, 0.0, size_rr4);
	hipMemset(dev_f, 0.0, size_f);
	hipMemset(dev_Lu, 0.0, size_Lu);

	float* f = new float[Nx_Ny];
	float* f_minus_fo = new float[Nx_Ny];

	// initialize epsilon values
	float prev_epsilon = std::numeric_limits<float>::infinity();
	float curr_epsilon = -std::numeric_limits<float>::infinity();

	ofstream convergence_file("art_convergence0.txt");
	ofstream time_file("art_time0.txt");

	for (int iter = 0; iter < max_iterations; iter++)
	{
		cout << "\nIter: " << iter << "\n";
		hipMemset(dev_u, 0.f, size_u);

		for (int p = 0; p < NS; p += group_size)
		{
			int jp1 = jj[p];
			int jp2 = jj[p + group_size - 1];
			int ip1 = ii[p];
			int ip2 = ii[p + group_size - 1];

			if (jp2 < jp1)
			{
				int jp = jp1;
				jp1 = jp2;
				jp2 = jp;
			}

			if (ip2 < ip1)
			{
				int ip = ip1;
				ip1 = ip2;
				ip2 = ip;
			}

			reset<<<Grid_Size, Block_Size>>>(dev_f, dev_v, dev_r, dev_r2, dev_s);

			// Boundary

			for (int k = 1; k < NT - 1; k++)
			{
				propagation<<<Grid_Size, Block_Size>>>(jp1, jp2, ip1, ip2, dev_v, dev_r, dev_r2 , dev_s, dev_u, k);
			}

			// Four corners

			propagation_at_corners<<<1, NT>>>(dev_u);

			difference_signal<<<dim3(NT - 2, 1), dim3(159, 1)>>>(dev_u, dev_g1, dev_g2, dev_g3, dev_g4, dev_rr1, dev_rr2, dev_rr3, dev_rr4, p / group_size);

			hipMemset(dev_z, 0.0, size_z);

			for (int k = NT - 2; k > 0; k--)
			{
				backpropagation1<<<Grid_Size, Block_Size>>>(dev_z, dev_f, k);
				backpropagation2<<<1, NX>>>(dev_z, dev_rr1, dev_rr2, dev_rr3, dev_rr4, k);
			}

			for (int k = 1; k < NT; k++)
			{
				laplace1<<<Grid_Size, Block_Size>>>(dev_u, dev_Lu, k);
				laplace2<<<1, NX>>>(dev_u, dev_Lu, k);
			}

			init_differential<<<Grid_Size, Block_Size>>>(dev_df, dev_z, dev_Lu, dev_f);

			for (int k = 2; k < NT; k++)
			{
				update_differential<<<Grid_Size, Block_Size>>>(dev_df, dev_z, dev_Lu, dev_f, k);
			}

			update_field<<<Grid_Size, Block_Size>>>(dev_alpha, dev_f, dev_df, dev_f_minus_fo, dev_fo);
		}

		hipMemcpy(f_minus_fo, dev_f_minus_fo, size_f_minus_fo, hipMemcpyDeviceToHost);

		curr_epsilon = norm(f_minus_fo, Nx_Ny) / norm(fo, Nx_Ny) * 100.0f;
		float current_t = (float)(clock()-ti) / CLOCKS_PER_SEC;

		convergence_file << curr_epsilon << " ";
		time_file << (current_t)<<" ";

		cout << "epsilon = " << curr_epsilon << "\n";

		// stop if reached target epsilon
		if (curr_epsilon <= target_epsilon) {
			break;
		}

		// stop if epsilon diverges
		if (curr_epsilon > prev_epsilon ||
				std::isnan(curr_epsilon)) {
			break;
		}

		// update prev_epsilon
		prev_epsilon = curr_epsilon;
	}

	hipMemcpy(f, dev_f, size_f, hipMemcpyDeviceToHost);

	IO_Files(x, y, fo, f);

	// Free Variables

	hipFree(dev_x);
	hipFree(dev_y);
	hipFree(dev_fo);
	hipFree(dev_v);
	hipFree(dev_r);
	hipFree(dev_r2);
	hipFree(dev_s);
	hipFree(dev_u);
	hipFree(dev_g1);
	hipFree(dev_g2);
	hipFree(dev_g3);
	hipFree(dev_g4);
	hipFree(dev_rr1);
	hipFree(dev_rr2);
	hipFree(dev_rr3);
	hipFree(dev_rr4);
	hipFree(dev_z);
	hipFree(dev_Lu);
	hipFree(dev_f);
	hipFree(dev_df);
	hipFree(dev_alpha);
	hipFree(dev_f_minus_fo);

	delete [] x;
	delete [] y;
	delete [] fo;
	delete [] ii;
	delete [] jj;
	delete [] f;
	delete [] f_minus_fo;

	hipDeviceReset();
}

__global__ void field_setup(float* x, float* y, float* fo, float* v, float* r, float* r2, float* s)
{
	// Map from threadIdx / BlockIdx to pixel position

	int i = threadIdx.x + blockIdx.x * blockDim.x;
	int j = threadIdx.y + blockIdx.y * blockDim.y;

	if (i < NX && j < NY)
	{
		int offset = i + NX * j;
		float value = 0.0f;

		/* if(((sqrtf(powf(x[i] - 0.015f, 2.0f) + powf(y[j] + 0.000f, 2.0f))) <= 0.005f) || ((sqrtf(powf(x[i] + 0.015f, 2.0f) + powf(y[j] + 0.000f, 2.0f))) <= 0.005f)) */
		/* { */
		/*	value = 0.06f; */
		/* } */
		/* else */
		/* { */
		/*	if(sqrtf(x[i] * x[i] + y[j] * y[j]) <= 0.03f) */
		/*	{ */
		/*		value = 0.02f; */
		/*	} */
		/*	else */
		/*	{ */
		/*		value = 0.0f; */
		/*	} */
		/* } */

		float rc = 0.015f;
		float rp = 0.005f;
		/* float lim = 0.020f; */

		float sc = 0.03f;
		float sp = 0.05f;
		/* float sb = 0.02f; */

		if (powf(x[i], 2) + powf(y[j], 2) <= powf(rc, 2))
		{
			value = sc;
		}

		if (powf(x[i] - rc * cos(-30 * (3.14159265f / 180)), 2) + powf(y[j] - rc * sin(30 * (3.14159265f / 180)), 2) <= powf(rp, 2))
		{
			value = sp;
		}

		if (powf(x[i] + rc * cos(-30 * (3.14159265f / 180)), 2) + powf(y[j] - rc * sin(30 * (3.14159265f / 180)), 2) <= powf(rp, 2))
		{
			value = sp;
		}

		if (powf(x[i], 2) + powf(y[j] + rc, 2) <= powf(rp, 2))
		{
			value = sp;
		}

		fo[offset] = value;
		v[offset] = 1500.0f * sqrtf(1.0f + value);
		r[offset] = v[offset] * dt / hx;
		r2[offset] = powf(r[offset], 2.0f);
		s[offset] = 2.0f - 4.0f * r2[offset];

		/*int offset = i + NX * j;
		float value = 0.0f;

		if (((sqrtf(powf(x[i] - 0.05f, 2.0f) + powf(y[j] + 0.000f, 2.0f))) <= 0.005f) || ((sqrtf(powf(x[i] + 0.05f, 2.0f) + powf(y[j] + 0.000f, 2.0f))) <= 0.005f))
		{
			value = 0.06f;
		}
		else
		{
			if (sqrtf(x[i] * x[i] + y[j] * y[j]) <= 0.03f)
			{
				value = 0.02f;
			}
			else
			{
				if ((x[i] >= -0.05f) && (x[i] <= 0.05f) && (y[j] >= -0.06f) && (y[j] <= -0.045f))
				{
					value = 0.04f;
				}
				else
				{
					if ((x[i] >= -0.03f) && (x[i] <= 0.00f) && (y[j] <= 0.065f) && (y[j] >= (0.04f - 0.5f * x[i])))
					{
						value = 0.03f;
					}
					else
					{
						if ((x[i] >= 0.00f) && (x[i] <= 0.03f) && (y[j] <= 0.065f) && (y[j] >= (0.04f + 0.5f * x[i])))
						{
							value = 0.03f;
						}
						else
						{
							value = 0.0f;
						}
					}
				}
			}
		}*/

		fo[offset] = value;
		v[offset] = 1500.0f * sqrtf(1.0f + value);
		r[offset] = v[offset] * dt / hx;
		r2[offset] = powf(r[offset], 2.0f);
		s[offset] = 2.0f - 4.0f * r2[offset];
	}
}

__global__ void propagation(int jp1, int jp2, int ip1, int ip2, float* v, float* r, float* r2 , float* s, float* u, int k)
{
	// Map from threadIdx / BlockIdx to pixel position

	int i = threadIdx.x + blockIdx.x * blockDim.x;
	int j = threadIdx.y + blockIdx.y * blockDim.y;

	int Nx_Ny = NX * NY;
	int Nx_Ny_k = Nx_Ny * k;

	if((i < NX) && (j < NY))
	{
		int offset = i + NX * j;

		if (((j + 1) >= jp1) && ((j + 1) <= jp2) && ((i + 1) >= ip1) && ((i + 1) <= ip2) && ((k + 1) <= 24))
		{
			u[offset + Nx_Ny * (k + 1)] = powf(v[offset], 2.0f) * powf(dt, 2.0f) * cosf(omegac * (k * dt - tt)) * expf(-powf(k * dt - tt, 2.0f) / (2.0f * powf(tao, 2.0f))) + r2[offset] * (u[(i + 1) + NX * j + Nx_Ny_k] + u[(i - 1) + NX * j + Nx_Ny_k] + u[i + NX * (j - 1) + Nx_Ny_k] + u[i + NX * (j + 1) + Nx_Ny_k]) + s[offset] * u[offset + Nx_Ny_k] - u[offset + Nx_Ny * (k - 1)];
		}
		else
		{
			u[offset + Nx_Ny * (k + 1)] = r2[offset] * (u[(i + 1) + NX * j + Nx_Ny_k] + u[(i - 1) + NX * j + Nx_Ny_k] + u[i + NX * (j - 1) + Nx_Ny_k] + u[i + NX * (j + 1) + Nx_Ny_k]) + s[offset] * u[offset + Nx_Ny_k] - u[offset + Nx_Ny * (k - 1)];
		}

		if ((i == 0) && (j > 0) && (j < (NY - 1)))
		{
			u[offset + Nx_Ny * (k + 1)] = (2.0f - 2.0f * r[offset] - r2[offset]) * u[offset + Nx_Ny_k] + 2.0f * r[offset] * (1.0f + r[offset]) * u[(offset + 1) + Nx_Ny_k] - r2[offset] * u[(offset + 2) + Nx_Ny_k] + (2.0f * r[offset] - 1.0f) * u[offset + Nx_Ny * (k - 1)] - 2.0f * r[offset] * u[(offset + 1) + Nx_Ny * (k - 1)];
		}


		if ((i == NX - 1) && (j > 0) && (j < (NY - 1)))
		{
			u[offset + Nx_Ny * (k + 1)] = (2.0f - 2.0f * r[offset] - r2[offset]) * u[offset + Nx_Ny_k] + 2.0f * r[offset] * (1.0f + r[offset]) * u[(offset - 1) + Nx_Ny_k] - r2[offset] * u[(offset - 2) + Nx_Ny_k] + (2.0f * r[offset] - 1.0f) * u[offset + Nx_Ny * (k - 1)] - 2.0f * r[offset] * u[(offset - 1) + Nx_Ny * (k - 1)];
		}


		if ((j == 0) && (i > 0) && (i < (NX - 1)))
		{
			u[offset + Nx_Ny * (k + 1)] = (2.0f - 2.0f * r[offset] - r2[offset]) * u[offset + Nx_Ny_k] + 2.0f * r[offset] * (1.0f + r[offset]) * u[(i + (j + 1) * NX) + Nx_Ny_k] - r2[offset] * u[(i + (j + 2) * NX) + Nx_Ny_k] + (2.0f * r[offset] - 1.0f) * u[offset + Nx_Ny * (k - 1)] - 2.0f * r[offset] * u[(i + (j + 1) * NX) + Nx_Ny * (k - 1)];
		}


		if ((j == NY - 1) && (i > 0) && (i < (NX - 1)))
		{
			u[offset + Nx_Ny * (k + 1)] = (2.0f - 2.0f * r[offset] - r2[offset]) * u[offset + Nx_Ny_k] + 2.0f * r[offset] * (1.0f + r[offset]) * u[(i + (j - 1) * NX) + Nx_Ny_k] - r2[offset] * u[(i + (j - 2) * NX) + Nx_Ny_k] + (2.0f * r[offset] - 1.0f) * u[offset + Nx_Ny * (k - 1)] - 2.0f * r[offset] * u[(i + (j - 1) * NX) + Nx_Ny * (k - 1)];
		}
	}
}

__global__ void propagation_at_corners(float* u)
{
	int k = threadIdx.x;
	int Nx_Ny = NX * NY;
	int Nx_Ny_k = Nx_Ny * k;

	u[Nx_Ny_k] = 1.0f / 2.0f * (u[NX + k] + u[1 + k]);
	u[(NX - 1) + Nx_Ny_k] = 1.0f / 2.0f * (u[(NX - 2) + Nx_Ny_k] + u[(NX - 1) + NX + Nx_Ny_k]);
	u[(NY - 1) * NX + Nx_Ny_k] = 1.0f / 2.0f * (u[(NY - 2) * NX + Nx_Ny_k] + u[1 +(NY - 1) * NX + Nx_Ny_k]);
	u[(NX - 1) + (NY - 1) * NX + Nx_Ny_k] = 1.0f / 2.0f * (u[(NX - 2) + (NY - 1) * NX + Nx_Ny_k] + u[(NX - 1) + (NY - 2) * NX + Nx_Ny_k]);
}

__global__ void initial_signal(float* u, float* g1, float* g2, float* g3, float* g4, int p)
{
	int i = threadIdx.x + 21;
	int k = blockIdx.x + 2;

	int Nx_Ny_k = NX * NY * k;
	int i_k_Nx_Nx_Nt_p = i + NX * k + NX * NT * p;

	g1[i_k_Nx_Nx_Nt_p] = u[i + NX * 180 + Nx_Ny_k];
	g3[i_k_Nx_Nx_Nt_p] = u[i + NX * 20 + Nx_Ny_k];

	g2[i_k_Nx_Nx_Nt_p] = u[180 + NX * i + Nx_Ny_k];
	g4[i_k_Nx_Nx_Nt_p] = u[20 + NX * i + Nx_Ny_k];
}

__global__ void difference_signal(float* u, float* g1, float* g2, float* g3, float* g4, float* rr1, float* rr2, float* rr3, float* rr4, int p)
{
	int i = threadIdx.x + 21;
	int k = blockIdx.x + 2;

	int Nx_Ny_k = NX * NY * k;
	int i_k_Nx_Nx_Nt_p = i + k * NX + NX * NT * p;
	int i_Nx_k = i + NX * k;

	rr1[i_Nx_k] = g1[i_k_Nx_Nx_Nt_p] - u[i + NX * 180 + Nx_Ny_k];
	rr3[i_Nx_k] = g3[i_k_Nx_Nx_Nt_p] - u[i + NX * 20 + Nx_Ny_k];

	rr2[i_Nx_k] = g2[i_k_Nx_Nx_Nt_p] - u[180 + NX * i + Nx_Ny_k];
	rr4[i_Nx_k] = g4[i_k_Nx_Nx_Nt_p] - u[20 + NX * i + Nx_Ny_k];
}

__global__ void backpropagation1(float* z, float* f, int k)
{
	// Map from threadIdx / BlockIdx to pixel position

	int i = threadIdx.x + blockIdx.x * blockDim.x;
	int j = threadIdx.y + blockIdx.y * blockDim.y;

	int Nx_Ny = NX * NY;
	int Nx_Ny_k_p_1 = Nx_Ny * (k + 1);

	if((i >= 1) && (i < (NX - 1)) && (j >= 1) && (j < (NY - 1)))
	{
		int offset = i + NX * j;
		int up = i + NX * (j - 1);
		int down = i + NX * (j + 1);
		int left = (i - 1) + NX * j;
		int right = (i + 1) + NX * j;

		z[offset + Nx_Ny * k] = powf(1500.0f, 2.0f) * (dt * dt) * ((1.0f + f[up]) * z[up + Nx_Ny_k_p_1] + (1.0f + f[down]) * z[down + Nx_Ny_k_p_1] + (1.0f + f[left]) * z[left + Nx_Ny_k_p_1] + (1.0f + f[right]) * z[right + Nx_Ny_k_p_1] - 4.0f * (1.0f + f[offset]) * z[offset + Nx_Ny_k_p_1]) / (h * h) + 2.0f * z[offset + Nx_Ny_k_p_1] - z[offset + Nx_Ny * (k + 2)];
	}
}

__global__ void backpropagation2(float* z, float* rr1, float* rr2, float* rr3, float* rr4, int k)
{
	int i = threadIdx.x;
	int Nx_Ny_k = NX * NY * k;
	int i_Nx_k = i + NX * k;

	if((i >= 21) && (i < 180))
	{
		z[i + NX * 180 + Nx_Ny_k] = z[i + NX * 179 + Nx_Ny_k] + rr1[i_Nx_k] * h * 1000.0f;
		z[i + NX * 20 + Nx_Ny_k] = z[i + NX * 21 + Nx_Ny_k] + rr3[i_Nx_k] * h * 1000.0f;

		z[180 + NX * i + Nx_Ny_k] = z[179 + NX * i + Nx_Ny_k] + rr2[i_Nx_k] * h * 1000.0f;
		z[20 + NX * i + Nx_Ny_k] = z[21 + NX * i + Nx_Ny_k] + rr4[i_Nx_k] * h * 1000.0f;
	}

	if((i >= 1) && (i < (NX - 1)))
	{
		z[i + Nx_Ny_k] = z[i + NX + Nx_Ny_k];
		z[i + NX * (NY - 1) + Nx_Ny_k] = z[i + NX * (NY - 2) + Nx_Ny_k];

		z[NX * i + Nx_Ny_k] = z[1 + NX * i + Nx_Ny_k];
		z[(NX - 1) + NX * i + Nx_Ny_k] = z[(NX - 2) + NX * i + Nx_Ny_k];
	}

	if(i == 0)
	{
		z[Nx_Ny_k] = (z[1 + Nx_Ny_k] + z[NX + Nx_Ny_k]) / 2.0f;
		z[(NX - 1) + Nx_Ny_k] = (z[(NX - 2) + Nx_Ny_k] + z[(NX - 1) + NX + Nx_Ny_k]) / 2.0f;
		z[NX * (NY - 1) + Nx_Ny_k] = (z[1 + NX * (NY - 1) + Nx_Ny_k] + z[NX * (NY - 2) + Nx_Ny_k]) / 2.0f;
		z[(NX - 1) + NX * (NY - 1) + Nx_Ny_k] = (z[(NX - 2) + NX * (NY - 1) + Nx_Ny_k] + z[(NX - 1) + NX * (NY - 2) + Nx_Ny_k]) / 2.0f;
	}
}

__global__ void laplace1(float* u, float* Lu, int k)
{
	// Map from threadIdx / BlockIdx to pixel position

	int i = threadIdx.x + blockIdx.x * blockDim.x;
	int j = threadIdx.y + blockIdx.y * blockDim.y;

	int Nx_Ny = NX * NY;
	int Nx_Ny_k = Nx_Ny * k;

	if((i >= 1) && (i < (NX - 1)) && (j >= 1) && (j < (NY - 1)))
	{
		int offset = i + NX * j;

		Lu[offset + Nx_Ny_k] = (u[i + NX * (j - 1) + Nx_Ny_k] + u[i + NX * (j + 1) + Nx_Ny_k] + u[(i - 1) + NX * j + Nx_Ny_k] + u[(i + 1) + NX * j + Nx_Ny_k] - 4.0f * u[offset + Nx_Ny_k]) / (h * h);
	}
}

__global__ void laplace2(float* u, float* Lu, int k)
{
	int i = threadIdx.x;
	int Nx_Ny_k = NX * NY * k;

	if((i >= 1) && (i < (NX - 1)))
	{
		Lu[i + Nx_Ny_k] = (u[i + Nx_Ny_k] + u[i + NX + Nx_Ny_k] + u[(i - 1) + Nx_Ny_k] + u[(i + 1) + Nx_Ny_k] - 4.0f * u[i + Nx_Ny_k]) / (h * h);
		Lu[i + NX * (NY - 1) + Nx_Ny_k] = (u[i + NX * (NY - 1) + Nx_Ny_k] + u[i + NX * (NY - 2) + Nx_Ny_k] + u[(i - 1) + NX * (NY - 1) + Nx_Ny_k] + u[(i + 1) + NX * (NY - 1) + Nx_Ny_k] - 4.0f * u[i + NX * (NY - 1) + Nx_Ny_k]) / (h * h);

		Lu[NX * i + Nx_Ny_k] = (u[NX * i + Nx_Ny_k] + u[1 + NX * i + Nx_Ny_k] + u[NX * (i - 1) + Nx_Ny_k] + u[NX * (i + 1) + Nx_Ny_k] - 4.0f * u[NX * i + Nx_Ny_k]) / (h * h);
		Lu[(NX - 1) + NX * i + Nx_Ny_k] = (u[(NX - 1) + NX * i + Nx_Ny_k] + u[(NX - 2) + NX * i + Nx_Ny_k] + u[(NX - 1) + NX * (i - 1) + Nx_Ny_k] + u[(NX - 1) + NX * (i + 1) + Nx_Ny_k] - 4.0f * u[(NX - 1) + NX * i + Nx_Ny_k]) / (h * h);
	}

	if(i == 0)
	{
		Lu[Nx_Ny_k] = (Lu[1 + Nx_Ny_k] + Lu[NX + Nx_Ny_k]) / 2.0f;
		Lu[(NX - 1) + Nx_Ny_k] = (Lu[(NX - 2) + Nx_Ny_k] + Lu[(NX - 1) + NX + Nx_Ny_k]) / 2.0f;
		Lu[NX * (NY - 1) + Nx_Ny_k] = (Lu[1 + NX * (NY - 1) + Nx_Ny_k] + Lu[NX * (NY - 2) + Nx_Ny_k]) / 2.0f;
		Lu[(NX - 1) + NX * (NY - 1) + Nx_Ny_k] = (Lu[(NX - 2) + NX * (NY - 1) + Nx_Ny_k] + Lu[(NX - 1) + NX * (NY - 2) + Nx_Ny_k]) / 2.0f;
	}
}

__global__ void init_differential(float* df, float* z, float* Lu, float* f)
{
	// Map from threadIdx / BlockIdx to pixel position

	int i = threadIdx.x + blockIdx.x * blockDim.x;
	int j = threadIdx.y + blockIdx.y * blockDim.y;

	int Nx_Ny = NX * NY;

	if((i < NX) && (j < NY))
	{
		int offset = i + NX * j;

		df[offset] = z[offset + Nx_Ny] * Lu[offset + Nx_Ny] / (1.0f + f[offset]);
	}
}

__global__ void update_differential(float* df, float* z, float* Lu, float* f, int k)
{
	// Map from threadIdx / BlockIdx to pixel position

	int i = threadIdx.x + blockIdx.x * blockDim.x;
	int j = threadIdx.y + blockIdx.y * blockDim.y;

	int Nx_Ny_k = NX * NY * k;

	if((i < NX) && (j < NY))
	{
		int offset = i + NX * j;

		df[offset] += z[offset + Nx_Ny_k] * Lu[offset + Nx_Ny_k] / (1.0f + f[offset]);
	}
}

__global__ void update_field(float* alpha, float* f, float* df, float* f_minus_fo, float* fo)
{
	int i = threadIdx.x + blockIdx.x * blockDim.x;
	int j = threadIdx.y + blockIdx.y * blockDim.y;

	if((i < NX) && (j < NY))
	{
		int offset = i + NX * j;

		if((i >= 21) && (i < 180) && (j >= 21) && (j < 180))
		{
			alpha[offset] = 1.0f;
		}
		else
		{
			alpha[offset] = 0.0f;
		}

		f[offset] += 20000.0f * alpha[offset] * df[offset];

		f_minus_fo[offset] = f[offset] - fo[offset];
	}
}

__global__ void reset(float* f, float* v, float* r, float* r2, float* s)
{
	int i = threadIdx.x + blockIdx.x * blockDim.x;
	int j = threadIdx.y + blockIdx.y * blockDim.y;

	if((i < NX) && (j < NY))
	{
		int offset = i + NX * j;

		v[offset] = 1500.0f * sqrtf(1.0f + f[offset]);
		r[offset] = v[offset] * dt / hx;
		r2[offset] = powf(r[offset], 2.0f);
		s[offset] = 2.0f - 4.0f * r2[offset];
	}
}

void IO_Files(float *x, float *y, float *fo, float *f)
{
	// I/O Files

	ofstream x_file, y_file;
	ofstream fo_file;
	ofstream f_file;

	x_file.open("dev_x.txt");
	y_file.open("dev_y.txt");
	fo_file.open("dev_f0.txt");
	f_file.open("dev_f.txt");

	for (int i = 0; i < NX; i++)
	{
		x_file << x[i];
		x_file << "\n";
	}

	for (int j = 0; j < NX; j++)
	{
		y_file << y[j];
		y_file << "\n";
	}

	for (int j = 0; j < NY; j++)
	{
		for (int i = 0; i < NX; i++)
		{
			fo_file << fo[i + NX * j];
			fo_file << "\t";
		}

		fo_file << "\n";
	}

	for (int j = 0; j < NY; j++)
	{
		for (int i = 0; i < NX; i++)
		{
			f_file << f[i + NX * j];
			f_file << " ";
		}

		f_file << "\n";
	}

	x_file.close();
	y_file.close();
	fo_file.close();
	f_file.close();
}

float norm(float* A, int lenght)
{
	float sum = 0;

	for (int i = 0; i < lenght; i++)
	{
		sum += A[i] * A[i];
	}

	return sqrtf(sum);
}

	.text
	.file	"art-mimo-original.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI0_0:
	.long	0x49742400                      # float 1.0E+6
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
.Lfunc_begin0:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception0
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %r15
	cmpl	$4, %edi
	jne	.LBB0_52
# %bb.1:
	movq	8(%r15), %rsi
.Ltmp0:
	leaq	8(%rsp), %rdi
	leaq	7(%rsp), %rdx
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_
.Ltmp1:
# %bb.2:
	movq	8(%rsp), %r12
	callq	__errno_location
	movq	%rax, %rbx
	movl	(%rax), %ebp
	movl	$0, (%rax)
	leaq	48(%rsp), %r13
	movq	%r12, %rdi
	movq	%r13, %rsi
	movl	$10, %edx
	callq	__isoc23_strtol
	cmpq	%r12, (%r13)
	je	.LBB0_3
# %bb.10:
	movq	%rax, %r14
	movslq	%r14d, %rax
	cmpq	%r14, %rax
	jne	.LBB0_12
# %bb.11:
	movl	(%rbx), %eax
	cmpl	$34, %eax
	je	.LBB0_12
# %bb.14:
	testl	%eax, %eax
	jne	.LBB0_16
# %bb.15:
	movl	%ebp, (%rbx)
.LBB0_16:
	leaq	24(%rsp), %rax
	movq	-16(%rax), %rdi
	cmpq	%rax, %rdi
	je	.LBB0_18
# %bb.17:                               # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i
	callq	_ZdlPv
.LBB0_18:                               # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit
	movq	16(%r15), %rsi
.Ltmp3:
	leaq	8(%rsp), %rdi
	leaq	7(%rsp), %rdx
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_
.Ltmp4:
# %bb.19:
	movq	8(%rsp), %r12
	movl	(%rbx), %ebp
	movl	$0, (%rbx)
	leaq	48(%rsp), %r13
	movq	%r12, %rdi
	movq	%r13, %rsi
	callq	strtof
	cmpq	%r12, (%r13)
	je	.LBB0_20
# %bb.26:
	movl	(%rbx), %eax
	testl	%eax, %eax
	movss	%xmm0, 44(%rsp)                 # 4-byte Spill
	je	.LBB0_30
# %bb.27:
	cmpl	$34, %eax
	jne	.LBB0_31
# %bb.28:                               # %.critedge.i.i32
.Ltmp6:
	movl	$.L.str.19, %edi
	callq	_ZSt20__throw_out_of_rangePKc
.Ltmp7:
# %bb.29:
.LBB0_30:
	movl	%ebp, (%rbx)
.LBB0_31:
	movq	8(%rsp), %rdi
	leaq	24(%rsp), %rax
	cmpq	%rax, %rdi
	je	.LBB0_33
# %bb.32:                               # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i35
	callq	_ZdlPv
.LBB0_33:                               # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit37
	movq	24(%r15), %rsi
.Ltmp8:
	leaq	8(%rsp), %rdi
	leaq	7(%rsp), %rdx
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_
.Ltmp9:
# %bb.34:
	movq	8(%rsp), %r12
	movl	(%rbx), %ebp
	movl	$0, (%rbx)
	leaq	48(%rsp), %r13
	movq	%r12, %rdi
	movq	%r13, %rsi
	movl	$10, %edx
	callq	__isoc23_strtol
	cmpq	%r12, (%r13)
	je	.LBB0_35
# %bb.38:
	movq	%rax, %r15
	movabsq	$-4294967296, %rax              # imm = 0xFFFFFFFF00000000
	leaq	-2147483648(%r15), %rcx
	cmpq	%rax, %rcx
	jb	.LBB0_40
# %bb.39:
	movl	(%rbx), %eax
	cmpl	$34, %eax
	je	.LBB0_40
# %bb.42:
	testl	%eax, %eax
	jne	.LBB0_44
# %bb.43:
	movl	%ebp, (%rbx)
.LBB0_44:
	movq	8(%rsp), %rdi
	leaq	24(%rsp), %rax
	cmpq	%rax, %rdi
	je	.LBB0_46
# %bb.45:                               # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i44
	callq	_ZdlPv
.LBB0_46:                               # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit46
	cmpl	$-1, %r15d
	movl	$2147483647, %ebp               # imm = 0x7FFFFFFF
	cmovnel	%r15d, %ebp
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rcx
	movl	$-261, %edx                     # imm = 0xFEFB
	movl	_ZSt4cout+24(%rcx), %esi
	andl	%edx, %esi
	orl	$4, %esi
	movl	%esi, _ZSt4cout+24(%rcx)
	movq	-24(%rax), %rax
	movl	$10, %ecx
	movq	%rcx, _ZSt4cout+8(%rax)
	movq	_ZSt4cerr(%rip), %rax
	movq	-24(%rax), %rsi
	andl	_ZSt4cerr+24(%rsi), %edx
	orl	$4, %edx
	movl	%edx, _ZSt4cerr+24(%rsi)
	movq	-24(%rax), %rax
	movq	%rcx, _ZSt4cerr+8(%rax)
	movl	$_ZSt4cout, %edi
	movl	$.L.str.2, %esi
	movl	$32, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	callq	clock
	movq	%rax, %rbx
	movl	$_ZSt4cout, %edi
	movl	$.L.str.3, %esi
	movl	$5, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	%ebx, %esi
	callq	_ZNSolsEi
	movl	$.L.str.4, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%r14d, %edi
	movss	44(%rsp), %xmm0                 # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	movl	%ebp, %esi
	movl	%ebx, %edx
	callq	_Z21Ultrasonic_Tomographyifii
	callq	clock
	movq	%rax, %r14
	movl	$_ZSt4cout, %edi
	movl	$.L.str.5, %esi
	movl	$5, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	%r14d, %esi
	callq	_ZNSolsEi
	movq	%rax, %r15
	movl	$.L.str.4, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$.L.str.6, %esi
	movl	$5, %edx
	movq	%r15, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	subl	%ebx, %r14d
	movq	%r15, %rdi
	movl	%r14d, %esi
	callq	_ZNSolsEi
	movq	%rax, %rbx
	movl	$.L.str.4, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$.L.str.7, %esi
	movl	$16, %edx
	movq	%rbx, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	xorps	%xmm0, %xmm0
	cvtsi2ss	%r14d, %xmm0
	divss	.LCPI0_0(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	movq	%rbx, %rdi
	callq	_ZNSo9_M_insertIdEERSoT_
	movl	$.L.str.4, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	xorl	%eax, %eax
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB0_52:
	.cfi_def_cfa_offset 112
	movl	$_ZSt4cerr, %edi
	movl	$.L.str, %esi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movq	(%r15), %rsi
	movq	%rax, %rdi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movl	$.L.str.1, %esi
	movq	%rax, %rdi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movl	$1, %edi
	callq	exit
.LBB0_3:
.Ltmp21:
	movl	$.L.str.18, %edi
	callq	_ZSt24__throw_invalid_argumentPKc
.Ltmp22:
# %bb.4:
.LBB0_12:                               # %.critedge.i.i
.Ltmp19:
	movl	$.L.str.18, %edi
	callq	_ZSt20__throw_out_of_rangePKc
.Ltmp20:
# %bb.13:
.LBB0_20:
.Ltmp16:
	movl	$.L.str.19, %edi
	callq	_ZSt24__throw_invalid_argumentPKc
.Ltmp17:
# %bb.21:
.LBB0_35:
.Ltmp13:
	movl	$.L.str.18, %edi
	callq	_ZSt24__throw_invalid_argumentPKc
.Ltmp14:
# %bb.36:
.LBB0_40:                               # %.critedge.i.i39
.Ltmp11:
	movl	$.L.str.18, %edi
	callq	_ZSt20__throw_out_of_rangePKc
.Ltmp12:
# %bb.41:
.LBB0_49:
.Ltmp10:
	jmp	.LBB0_50
.LBB0_48:
.Ltmp5:
	jmp	.LBB0_50
.LBB0_47:
.Ltmp2:
.LBB0_50:
	movq	%rax, %r14
	jmp	.LBB0_51
.LBB0_22:
.Ltmp18:
	jmp	.LBB0_23
.LBB0_37:
.Ltmp15:
.LBB0_23:
	movq	%rax, %r14
	cmpl	$0, (%rbx)
	jne	.LBB0_25
# %bb.24:
	movl	%ebp, (%rbx)
.LBB0_25:                               # %_ZZN9__gnu_cxx6__stoaIffcJEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD2Ev.exit.i.i
	movq	8(%rsp), %rdi
	leaq	24(%rsp), %rax
	jmp	.LBB0_8
.LBB0_5:
.Ltmp23:
	movq	%rax, %r14
	cmpl	$0, (%rbx)
	jne	.LBB0_7
# %bb.6:
	movl	%ebp, (%rbx)
.LBB0_7:                                # %_ZZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD2Ev.exit.i.i
	leaq	24(%rsp), %rax
	movq	-16(%rax), %rdi
.LBB0_8:                                # %_ZZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD2Ev.exit.i.i
	cmpq	%rax, %rdi
	je	.LBB0_51
# %bb.9:                                # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i47
	callq	_ZdlPv
.LBB0_51:
	movq	%r14, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end0:
	.size	main, .Lfunc_end0-main
	.cfi_endproc
	.section	.gcc_except_table,"a",@progbits
	.p2align	2, 0x0
GCC_except_table0:
.Lexception0:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end0-.Lcst_begin0
.Lcst_begin0:
	.uleb128 .Ltmp0-.Lfunc_begin0           # >> Call Site 1 <<
	.uleb128 .Ltmp1-.Ltmp0                  #   Call between .Ltmp0 and .Ltmp1
	.uleb128 .Ltmp2-.Lfunc_begin0           #     jumps to .Ltmp2
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp3-.Lfunc_begin0           # >> Call Site 2 <<
	.uleb128 .Ltmp4-.Ltmp3                  #   Call between .Ltmp3 and .Ltmp4
	.uleb128 .Ltmp5-.Lfunc_begin0           #     jumps to .Ltmp5
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp6-.Lfunc_begin0           # >> Call Site 3 <<
	.uleb128 .Ltmp7-.Ltmp6                  #   Call between .Ltmp6 and .Ltmp7
	.uleb128 .Ltmp18-.Lfunc_begin0          #     jumps to .Ltmp18
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp8-.Lfunc_begin0           # >> Call Site 4 <<
	.uleb128 .Ltmp9-.Ltmp8                  #   Call between .Ltmp8 and .Ltmp9
	.uleb128 .Ltmp10-.Lfunc_begin0          #     jumps to .Ltmp10
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp9-.Lfunc_begin0           # >> Call Site 5 <<
	.uleb128 .Ltmp21-.Ltmp9                 #   Call between .Ltmp9 and .Ltmp21
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp21-.Lfunc_begin0          # >> Call Site 6 <<
	.uleb128 .Ltmp20-.Ltmp21                #   Call between .Ltmp21 and .Ltmp20
	.uleb128 .Ltmp23-.Lfunc_begin0          #     jumps to .Ltmp23
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp16-.Lfunc_begin0          # >> Call Site 7 <<
	.uleb128 .Ltmp17-.Ltmp16                #   Call between .Ltmp16 and .Ltmp17
	.uleb128 .Ltmp18-.Lfunc_begin0          #     jumps to .Ltmp18
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp13-.Lfunc_begin0          # >> Call Site 8 <<
	.uleb128 .Ltmp12-.Ltmp13                #   Call between .Ltmp13 and .Ltmp12
	.uleb128 .Ltmp15-.Lfunc_begin0          #     jumps to .Ltmp15
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp12-.Lfunc_begin0          # >> Call Site 9 <<
	.uleb128 .Lfunc_end0-.Ltmp12            #   Call between .Ltmp12 and .Lfunc_end0
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end0:
	.p2align	2, 0x0
                                        # -- End function
	.section	.text._ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_,"axG",@progbits,_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_,comdat
	.weak	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_ # -- Begin function _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_
	.p2align	1, 0x90
	.type	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_,@function
_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_: # @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	pushq	%rax
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	leaq	16(%rdi), %rax
	movq	%rax, (%rdi)
	testq	%rsi, %rsi
	je	.LBB1_1
# %bb.2:
	movq	%rsi, %rbx
	movq	%rdi, %r14
	movq	%rsi, %rdi
	callq	strlen
	leaq	(%rax,%rbx), %rdx
	movq	%r14, %rdi
	movq	%rbx, %rsi
	addq	$8, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	jmp	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag # TAILCALL
.LBB1_1:
	.cfi_def_cfa_offset 32
	movl	$.L.str.20, %edi
	callq	_ZSt19__throw_logic_errorPKc
.Lfunc_end1:
	.size	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_, .Lfunc_end1-_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z21Ultrasonic_Tomographyifii
.LCPI2_0:
	.long	0x3a83126f                      # float 0.00100000005
.LCPI2_1:
	.long	0xbdcccccd                      # float -0.100000001
.LCPI2_2:
	.long	0x7f800000                      # float +Inf
.LCPI2_3:
	.long	0x42c80000                      # float 100
.LCPI2_4:
	.long	0x49742400                      # float 1.0E+6
.LCPI2_5:
	.long	0x00000000                      # float 0
	.text
	.globl	_Z21Ultrasonic_Tomographyifii
	.type	_Z21Ultrasonic_Tomographyifii,@function
_Z21Ultrasonic_Tomographyifii:          # @_Z21Ultrasonic_Tomographyifii
.Lfunc_begin1:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception1
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$1336, %rsp                     # imm = 0x538
	.cfi_def_cfa_offset 1392
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%edx, 152(%rsp)                 # 4-byte Spill
	movl	%esi, 92(%rsp)                  # 4-byte Spill
	movss	%xmm0, 284(%rsp)                # 4-byte Spill
	movl	%edi, %ebx
	.cfi_escape 0x2e, 0x00
	movl	$804, %edi                      # imm = 0x324
	callq	_Znam
	movq	%rax, 144(%rsp)                 # 8-byte Spill
	.cfi_escape 0x2e, 0x00
	movl	$804, %edi                      # imm = 0x324
	callq	_Znam
	movq	%rax, 136(%rsp)                 # 8-byte Spill
	.cfi_escape 0x2e, 0x00
	movl	$161604, %edi                   # imm = 0x27744
	callq	_Znam
	movq	%rax, 160(%rsp)                 # 8-byte Spill
	xorl	%r14d, %r14d
	movl	$640, %eax                      # imm = 0x280
	xorl	%edx, %edx
	movl	%ebx, 28(%rsp)                  # 4-byte Spill
	idivl	%ebx
	imull	$322404, %eax, %ebx             # imm = 0x4EB64
	.cfi_escape 0x2e, 0x00
	leaq	272(%rsp), %rdi
	movl	$804, %esi                      # imm = 0x324
	callq	hipMalloc
	.cfi_escape 0x2e, 0x00
	leaq	264(%rsp), %rdi
	movl	$804, %esi                      # imm = 0x324
	callq	hipMalloc
	.cfi_escape 0x2e, 0x00
	leaq	120(%rsp), %rdi
	movl	$161604, %esi                   # imm = 0x27744
	callq	hipMalloc
	.cfi_escape 0x2e, 0x00
	leaq	80(%rsp), %rdi
	movl	$161604, %esi                   # imm = 0x27744
	callq	hipMalloc
	.cfi_escape 0x2e, 0x00
	leaq	72(%rsp), %rdi
	movl	$161604, %esi                   # imm = 0x27744
	callq	hipMalloc
	.cfi_escape 0x2e, 0x00
	leaq	64(%rsp), %rdi
	movl	$161604, %esi                   # imm = 0x27744
	callq	hipMalloc
	.cfi_escape 0x2e, 0x00
	leaq	56(%rsp), %rdi
	movl	$161604, %esi                   # imm = 0x27744
	callq	hipMalloc
	.cfi_escape 0x2e, 0x00
	movq	%rsp, %r13
	movl	$64803204, %esi                 # imm = 0x3DCD184
	movq	%r13, %rdi
	callq	hipMalloc
	movslq	%ebx, %rbx
	.cfi_escape 0x2e, 0x00
	leaq	256(%rsp), %rbp
	movq	%rbp, %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	.cfi_escape 0x2e, 0x00
	leaq	248(%rsp), %r12
	movq	%r12, %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	.cfi_escape 0x2e, 0x00
	leaq	240(%rsp), %r15
	movq	%r15, %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	.cfi_escape 0x2e, 0x00
	leaq	112(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	(%r13), %rdi
	.cfi_escape 0x2e, 0x00
	movl	$64803204, %edx                 # imm = 0x3DCD184
	xorl	%esi, %esi
	callq	hipMemset
	movq	(%rbp), %rdi
	.cfi_escape 0x2e, 0x00
	xorl	%esi, %esi
	movq	%rbx, %rdx
	callq	hipMemset
	movq	(%r12), %rdi
	.cfi_escape 0x2e, 0x00
	xorl	%esi, %esi
	movq	%rbx, %rdx
	callq	hipMemset
	movq	(%r15), %rdi
	.cfi_escape 0x2e, 0x00
	xorl	%esi, %esi
	movq	%rbx, %rdx
	callq	hipMemset
	leaq	112(%rsp), %rax
	movq	(%rax), %rdi
	.cfi_escape 0x2e, 0x00
	xorl	%esi, %esi
	movq	%rbx, %rdx
	callq	hipMemset
	movq	144(%rsp), %rsi                 # 8-byte Reload
	movss	.LCPI2_0(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	movss	.LCPI2_1(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
.LBB2_1:                                # =>This Inner Loop Header: Depth=1
	xorps	%xmm2, %xmm2
	cvtsi2ss	%r14d, %xmm2
	mulss	%xmm0, %xmm2
	addss	%xmm1, %xmm2
	movss	%xmm2, (%rsi,%r14,4)
	incq	%r14
	cmpq	$201, %r14
	jne	.LBB2_1
# %bb.2:                                # %.preheader472.preheader
	xorl	%eax, %eax
	movq	136(%rsp), %rbx                 # 8-byte Reload
.LBB2_3:                                # %.preheader472
                                        # =>This Inner Loop Header: Depth=1
	xorps	%xmm2, %xmm2
	cvtsi2ss	%eax, %xmm2
	mulss	%xmm0, %xmm2
	addss	%xmm1, %xmm2
	movss	%xmm2, (%rbx,%rax,4)
	incq	%rax
	cmpq	$201, %rax
	jne	.LBB2_3
# %bb.4:
	movabsq	$68719476752, %r14              # imm = 0x1000000010
	movabsq	$55834574861, %r15              # imm = 0xD0000000D
	movq	272(%rsp), %rdi
	.cfi_escape 0x2e, 0x00
	movl	$804, %edx                      # imm = 0x324
	movl	$1, %ecx
	callq	hipMemcpy
	movq	264(%rsp), %rdi
	.cfi_escape 0x2e, 0x00
	movl	$804, %edx                      # imm = 0x324
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	.cfi_escape 0x2e, 0x00
	movq	%r15, %rdi
	movl	$1, %esi
	movq	%r14, %r15
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_6
# %bb.5:
	movq	272(%rsp), %rdi
	movq	264(%rsp), %rsi
	movq	120(%rsp), %rdx
	movq	80(%rsp), %rcx
	movq	72(%rsp), %r8
	movq	64(%rsp), %r9
	.cfi_escape 0x2e, 0x10
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	pushq	64(%rsp)
	.cfi_adjust_cfa_offset 8
	callq	_Z26__device_stub__field_setupPfS_S_S_S_S_S_
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
.LBB2_6:
	movq	120(%rsp), %rsi
	.cfi_escape 0x2e, 0x00
	movl	$161604, %edx                   # imm = 0x27744
	movq	160(%rsp), %rdi                 # 8-byte Reload
	movl	$2, %ecx
	callq	hipMemcpy
	.cfi_escape 0x2e, 0x00
	movl	$2560, %edi                     # imm = 0xA00
	callq	_Znam
	movq	%rax, %rbx
	.cfi_escape 0x2e, 0x00
	movl	$2560, %edi                     # imm = 0xA00
	callq	_Znam
	movq	%rax, %r14
	xorl	%eax, %eax
.LBB2_7:                                # =>This Inner Loop Header: Depth=1
	movl	$181, (%rbx,%rax,4)
	leal	22(%rax), %ecx
	movl	%ecx, (%r14,%rax,4)
	leaq	1(%rax), %rcx
	movq	%rcx, %rax
	cmpq	$160, %rcx
	jne	.LBB2_7
# %bb.8:                                # %.preheader471.preheader
	movl	$160, %eax
	movl	$180, %ecx
.LBB2_9:                                # %.preheader471
                                        # =>This Inner Loop Header: Depth=1
	movl	$181, (%r14,%rax,4)
	movl	%ecx, (%rbx,%rax,4)
	incq	%rax
	decl	%ecx
	cmpq	$320, %rax                      # imm = 0x140
	jne	.LBB2_9
# %bb.10:                               # %.preheader470.preheader
	movl	$320, %eax                      # imm = 0x140
	movl	$180, %ecx
.LBB2_11:                               # %.preheader470
                                        # =>This Inner Loop Header: Depth=1
	movl	$21, (%rbx,%rax,4)
	movl	%ecx, (%r14,%rax,4)
	incq	%rax
	decl	%ecx
	cmpq	$480, %rax                      # imm = 0x1E0
	jne	.LBB2_11
# %bb.12:                               # %.preheader469.preheader
	movl	$480, %eax                      # imm = 0x1E0
.LBB2_13:                               # %.preheader469
                                        # =>This Inner Loop Header: Depth=1
	movl	$21, (%r14,%rax,4)
	leal	-458(%rax), %ecx
	movl	%ecx, (%rbx,%rax,4)
	leaq	1(%rax), %rcx
	movq	%rcx, %rax
	cmpq	$640, %rcx                      # imm = 0x280
	jne	.LBB2_13
# %bb.14:                               # %.preheader468.preheader
	movabsq	$4294967297, %rcx               # imm = 0x100000001
	movslq	28(%rsp), %rax                  # 4-byte Folded Reload
	movq	%rax, 288(%rsp)                 # 8-byte Spill
	xorl	%edx, %edx
	leaq	400(%rcx), %rax
	movq	%rax, 96(%rsp)                  # 8-byte Spill
	leaq	158(%rcx), %rax
	movq	%rax, 176(%rsp)                 # 8-byte Spill
	leaq	398(%rcx), %rax
	movq	%rax, 168(%rsp)                 # 8-byte Spill
	movq	%rbx, 184(%rsp)                 # 8-byte Spill
	movq	%r14, 192(%rsp)                 # 8-byte Spill
.LBB2_15:                               # %.preheader468
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_16 Depth 2
	movq	%rdx, %r12
	movq	(%rsp), %rdi
	.cfi_escape 0x2e, 0x00
	movl	$64803204, %edx                 # imm = 0x3DCD184
	xorl	%esi, %esi
	callq	hipMemset
	movl	(%rbx,%r12,4), %ebp
	movq	288(%rsp), %rax                 # 8-byte Reload
	leaq	(%r12,%rax), %rcx
	movl	-4(%rbx,%rcx,4), %eax
	movq	%r12, 40(%rsp)                  # 8-byte Spill
	movl	(%r14,%r12,4), %ebx
	movq	%rcx, 8(%rsp)                   # 8-byte Spill
	movl	-4(%r14,%rcx,4), %ecx
	cmpl	%ebp, %eax
	movl	%ebp, %r12d
	cmovgl	%eax, %r12d
	cmovll	%eax, %ebp
	cmpl	%ebx, %ecx
	movl	%ebx, %r13d
	cmovgl	%ecx, %r13d
	cmovll	%ecx, %ebx
	movl	$1, %r14d
.LBB2_16:                               #   Parent Loop BB2_15 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	.cfi_escape 0x2e, 0x00
	movabsq	$55834574861, %rdi              # imm = 0xD0000000D
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_18
# %bb.17:                               #   in Loop: Header=BB2_16 Depth=2
	movq	80(%rsp), %r8
	movq	72(%rsp), %r9
	.cfi_escape 0x2e, 0x20
	movl	%ebp, %edi
	movl	%r12d, %esi
	movl	%ebx, %edx
	movl	%r13d, %ecx
	pushq	%r14
	.cfi_adjust_cfa_offset 8
	pushq	8(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	72(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	88(%rsp)
	.cfi_adjust_cfa_offset 8
	callq	_Z26__device_stub__propagationiiiiPfS_S_S_S_i
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
.LBB2_18:                               #   in Loop: Header=BB2_16 Depth=2
	incl	%r14d
	cmpl	$400, %r14d                     # imm = 0x190
	jne	.LBB2_16
# %bb.19:                               #   in Loop: Header=BB2_15 Depth=1
	.cfi_escape 0x2e, 0x00
	movabsq	$4294967297, %rdi               # imm = 0x100000001
	movl	$1, %esi
	movq	96(%rsp), %rdx                  # 8-byte Reload
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_21
# %bb.20:                               #   in Loop: Header=BB2_15 Depth=1
	movq	(%rsp), %rdi
	.cfi_escape 0x2e, 0x00
	callq	_Z37__device_stub__propagation_at_cornersPf
.LBB2_21:                               #   in Loop: Header=BB2_15 Depth=1
	.cfi_escape 0x2e, 0x00
	movq	168(%rsp), %rdi                 # 8-byte Reload
	movl	$1, %esi
	movq	176(%rsp), %rdx                 # 8-byte Reload
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	movq	184(%rsp), %rbx                 # 8-byte Reload
	movq	192(%rsp), %r14                 # 8-byte Reload
	jne	.LBB2_23
# %bb.22:                               #   in Loop: Header=BB2_15 Depth=1
	movq	(%rsp), %rdi
	movq	256(%rsp), %rsi
	movq	248(%rsp), %r9
	movq	240(%rsp), %rcx
	movq	112(%rsp), %r8
	movq	40(%rsp), %rax                  # 8-byte Reload
                                        # kill: def $eax killed $eax killed $rax
	cltd
	idivl	28(%rsp)                        # 4-byte Folded Reload
	.cfi_escape 0x2e, 0x00
	movq	%r9, %rdx
	movl	%eax, %r9d
	callq	_Z29__device_stub__initial_signalPfS_S_S_S_i
.LBB2_23:                               #   in Loop: Header=BB2_15 Depth=1
	movq	8(%rsp), %rdx                   # 8-byte Reload
	cmpq	$640, %rdx                      # imm = 0x280
	jl	.LBB2_15
# %bb.24:
	.cfi_escape 0x2e, 0x00
	leaq	232(%rsp), %r13
	movl	$322404, %esi                   # imm = 0x4EB64
	movq	%r13, %rdi
	callq	hipMalloc
	.cfi_escape 0x2e, 0x00
	leaq	224(%rsp), %r12
	movl	$322404, %esi                   # imm = 0x4EB64
	movq	%r12, %rdi
	callq	hipMalloc
	.cfi_escape 0x2e, 0x00
	leaq	216(%rsp), %r15
	movl	$322404, %esi                   # imm = 0x4EB64
	movq	%r15, %rdi
	callq	hipMalloc
	.cfi_escape 0x2e, 0x00
	leaq	208(%rsp), %r14
	movl	$322404, %esi                   # imm = 0x4EB64
	movq	%r14, %rdi
	callq	hipMalloc
	.cfi_escape 0x2e, 0x00
	leaq	32(%rsp), %rdi
	movl	$64964808, %esi                 # imm = 0x3DF48C8
	callq	hipMalloc
	.cfi_escape 0x2e, 0x00
	leaq	48(%rsp), %rbx
	movl	$64803204, %esi                 # imm = 0x3DCD184
	movq	%rbx, %rdi
	callq	hipMalloc
	.cfi_escape 0x2e, 0x00
	leaq	16(%rsp), %rbp
	movl	$161604, %esi                   # imm = 0x27744
	movq	%rbp, %rdi
	callq	hipMalloc
	.cfi_escape 0x2e, 0x00
	leaq	104(%rsp), %rdi
	movl	$161604, %esi                   # imm = 0x27744
	callq	hipMalloc
	.cfi_escape 0x2e, 0x00
	leaq	296(%rsp), %rdi
	movl	$161604, %esi                   # imm = 0x27744
	callq	hipMalloc
	.cfi_escape 0x2e, 0x00
	leaq	200(%rsp), %rdi
	movl	$161604, %esi                   # imm = 0x27744
	callq	hipMalloc
	movq	(%r13), %rdi
	.cfi_escape 0x2e, 0x00
	movl	$322404, %edx                   # imm = 0x4EB64
	xorl	%esi, %esi
	callq	hipMemset
	movq	(%r12), %rdi
	.cfi_escape 0x2e, 0x00
	movl	$322404, %edx                   # imm = 0x4EB64
	xorl	%esi, %esi
	callq	hipMemset
	movq	(%r15), %rdi
	.cfi_escape 0x2e, 0x00
	movl	$322404, %edx                   # imm = 0x4EB64
	xorl	%esi, %esi
	callq	hipMemset
	movq	(%r14), %rdi
	.cfi_escape 0x2e, 0x00
	movl	$322404, %edx                   # imm = 0x4EB64
	xorl	%esi, %esi
	callq	hipMemset
	movq	(%rbp), %rdi
	.cfi_escape 0x2e, 0x00
	movl	$161604, %edx                   # imm = 0x27744
	xorl	%esi, %esi
	callq	hipMemset
	movq	(%rbx), %rdi
	.cfi_escape 0x2e, 0x00
	movl	$64803204, %edx                 # imm = 0x3DCD184
	xorl	%esi, %esi
	callq	hipMemset
	.cfi_escape 0x2e, 0x00
	movl	$161604, %edi                   # imm = 0x27744
	callq	_Znam
	movq	%rax, 128(%rsp)                 # 8-byte Spill
	.cfi_escape 0x2e, 0x00
	movl	$161604, %edi                   # imm = 0x27744
	callq	_Znam
	movq	%rax, %r13
	.cfi_escape 0x2e, 0x00
	leaq	824(%rsp), %rdi
	movl	$.L.str.8, %esi
	movl	$16, %edx
	callq	_ZNSt14basic_ofstreamIcSt11char_traitsIcEEC1EPKcSt13_Ios_Openmode
.Ltmp24:
	.cfi_escape 0x2e, 0x00
	leaq	312(%rsp), %rdi
	movl	$.L.str.9, %esi
	movl	$16, %edx
	callq	_ZNSt14basic_ofstreamIcSt11char_traitsIcEEC1EPKcSt13_Ios_Openmode
.Ltmp25:
# %bb.25:                               # %.preheader467
	cmpl	$0, 92(%rsp)                    # 4-byte Folded Reload
	movq	160(%rsp), %rbx                 # 8-byte Reload
	movq	184(%rsp), %r15                 # 8-byte Reload
	movq	192(%rsp), %r12                 # 8-byte Reload
	jle	.LBB2_101
# %bb.26:                               # %.lr.ph
	movslq	152(%rsp), %rax                 # 4-byte Folded Reload
	movq	%rax, 152(%rsp)                 # 8-byte Spill
	xorl	%ebp, %ebp
	movss	.LCPI2_2(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, 96(%rsp)                 # 4-byte Spill
	movabsq	$68719476752, %r14              # imm = 0x1000000010
	movq	%r13, 304(%rsp)                 # 8-byte Spill
.LBB2_27:                               # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_32 Depth 2
                                        #       Child Loop BB2_35 Depth 3
                                        #       Child Loop BB2_47 Depth 3
                                        #       Child Loop BB2_55 Depth 3
                                        #       Child Loop BB2_65 Depth 3
                                        #     Child Loop BB2_75 Depth 2
                                        #     Child Loop BB2_86 Depth 2
.Ltmp27:
	.cfi_escape 0x2e, 0x00
	movl	$_ZSt4cout, %edi
	movl	$.L.str.10, %esi
	movl	$7, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp28:
# %bb.28:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit
                                        #   in Loop: Header=BB2_27 Depth=1
.Ltmp29:
	.cfi_escape 0x2e, 0x00
	movl	$_ZSt4cout, %edi
	movl	%ebp, %esi
	callq	_ZNSolsEi
.Ltmp30:
# %bb.29:                               #   in Loop: Header=BB2_27 Depth=1
.Ltmp31:
	.cfi_escape 0x2e, 0x00
	movl	$.L.str.4, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp32:
# %bb.30:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit381
                                        #   in Loop: Header=BB2_27 Depth=1
	movq	(%rsp), %rdi
.Ltmp33:
	.cfi_escape 0x2e, 0x00
	movl	$64803204, %edx                 # imm = 0x3DCD184
	xorl	%esi, %esi
	callq	hipMemset
.Ltmp34:
# %bb.31:                               # %.preheader466.preheader
                                        #   in Loop: Header=BB2_27 Depth=1
	movq	%rbp, 176(%rsp)                 # 8-byte Spill
	xorl	%edx, %edx
.LBB2_32:                               # %.preheader466
                                        #   Parent Loop BB2_27 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB2_35 Depth 3
                                        #       Child Loop BB2_47 Depth 3
                                        #       Child Loop BB2_55 Depth 3
                                        #       Child Loop BB2_65 Depth 3
	movl	(%r15,%rdx,4), %ebp
	movq	288(%rsp), %rax                 # 8-byte Reload
	leaq	(%rdx,%rax), %rcx
	movl	-4(%r15,%rcx,4), %eax
	movq	%rdx, 40(%rsp)                  # 8-byte Spill
	movl	(%r12,%rdx,4), %r13d
	movq	%rcx, 8(%rsp)                   # 8-byte Spill
	movl	-4(%r12,%rcx,4), %ecx
	cmpl	%ebp, %eax
	movl	%ebp, %ebx
	cmovgl	%eax, %ebx
	cmovll	%eax, %ebp
	cmpl	%r13d, %ecx
	movl	%r13d, %r15d
	cmovgl	%ecx, %r15d
	cmovll	%ecx, %r13d
.Ltmp35:
	.cfi_escape 0x2e, 0x00
	movabsq	$55834574861, %rdi              # imm = 0xD0000000D
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
.Ltmp36:
# %bb.33:                               #   in Loop: Header=BB2_32 Depth=2
	testl	%eax, %eax
	jne	.LBB2_34
# %bb.79:                               #   in Loop: Header=BB2_32 Depth=2
	movq	16(%rsp), %rdi
	movq	80(%rsp), %rsi
	movq	72(%rsp), %rdx
	movq	64(%rsp), %rcx
	movq	56(%rsp), %r8
.Ltmp37:
	.cfi_escape 0x2e, 0x00
	callq	_Z20__device_stub__resetPfS_S_S_S_
.Ltmp38:
.LBB2_34:                               # %.preheader527
                                        #   in Loop: Header=BB2_32 Depth=2
	movl	$1, %r12d
.LBB2_35:                               #   Parent Loop BB2_27 Depth=1
                                        #     Parent Loop BB2_32 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
.Ltmp39:
	.cfi_escape 0x2e, 0x00
	movabsq	$55834574861, %rdi              # imm = 0xD0000000D
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
.Ltmp40:
# %bb.36:                               #   in Loop: Header=BB2_35 Depth=3
	testl	%eax, %eax
	jne	.LBB2_38
# %bb.37:                               #   in Loop: Header=BB2_35 Depth=3
	movq	80(%rsp), %r8
	movq	72(%rsp), %r9
.Ltmp41:
	.cfi_escape 0x2e, 0x20
	movl	%ebp, %edi
	movl	%ebx, %esi
	movl	%r13d, %edx
	movl	%r15d, %ecx
	pushq	%r12
	.cfi_adjust_cfa_offset 8
	pushq	8(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	72(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	88(%rsp)
	.cfi_adjust_cfa_offset 8
	callq	_Z26__device_stub__propagationiiiiPfS_S_S_S_i
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
.Ltmp42:
.LBB2_38:                               #   in Loop: Header=BB2_35 Depth=3
	incl	%r12d
	cmpl	$400, %r12d                     # imm = 0x190
	jne	.LBB2_35
# %bb.39:                               #   in Loop: Header=BB2_32 Depth=2
.Ltmp44:
	.cfi_escape 0x2e, 0x00
	movabsq	$4294967297, %rdi               # imm = 0x100000001
	movl	$1, %esi
	movabsq	$4294967697, %rdx               # imm = 0x100000191
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
.Ltmp45:
	movq	192(%rsp), %r12                 # 8-byte Reload
# %bb.40:                               #   in Loop: Header=BB2_32 Depth=2
	testl	%eax, %eax
	jne	.LBB2_42
# %bb.41:                               #   in Loop: Header=BB2_32 Depth=2
	movq	(%rsp), %rdi
.Ltmp46:
	.cfi_escape 0x2e, 0x00
	callq	_Z37__device_stub__propagation_at_cornersPf
.Ltmp47:
.LBB2_42:                               #   in Loop: Header=BB2_32 Depth=2
.Ltmp48:
	.cfi_escape 0x2e, 0x00
	movabsq	$4294967695, %rdi               # imm = 0x10000018F
	movl	$1, %esi
	movabsq	$4294967455, %rdx               # imm = 0x10000009F
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
.Ltmp49:
# %bb.43:                               #   in Loop: Header=BB2_32 Depth=2
	testl	%eax, %eax
	jne	.LBB2_45
# %bb.44:                               #   in Loop: Header=BB2_32 Depth=2
	movq	(%rsp), %rdi
	movq	256(%rsp), %rsi
	movq	248(%rsp), %r10
	movq	240(%rsp), %rcx
	movq	112(%rsp), %r8
	movq	232(%rsp), %r9
	movq	224(%rsp), %r11
	movq	216(%rsp), %rbx
	movq	208(%rsp), %r15
	movq	40(%rsp), %rax                  # 8-byte Reload
                                        # kill: def $eax killed $eax killed $rax
	cltd
	idivl	28(%rsp)                        # 4-byte Folded Reload
                                        # kill: def $eax killed $eax def $rax
.Ltmp50:
	.cfi_escape 0x2e, 0x20
	movq	%r10, %rdx
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	%r15
	.cfi_adjust_cfa_offset 8
	pushq	%rbx
	.cfi_adjust_cfa_offset 8
	pushq	%r11
	.cfi_adjust_cfa_offset 8
	callq	_Z32__device_stub__difference_signalPfS_S_S_S_S_S_S_S_i
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
.Ltmp51:
.LBB2_45:                               #   in Loop: Header=BB2_32 Depth=2
	movq	32(%rsp), %rdi
.Ltmp52:
	.cfi_escape 0x2e, 0x00
	movl	$64964808, %edx                 # imm = 0x3DF48C8
	xorl	%esi, %esi
	callq	hipMemset
.Ltmp53:
# %bb.46:                               # %.preheader465.preheader
                                        #   in Loop: Header=BB2_32 Depth=2
	movl	$400, %ebx                      # imm = 0x190
	movabsq	$55834574861, %r15              # imm = 0xD0000000D
	movabsq	$4294967497, %r13               # imm = 0x1000000C9
.LBB2_47:                               # %.preheader465
                                        #   Parent Loop BB2_27 Depth=1
                                        #     Parent Loop BB2_32 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
.Ltmp54:
	.cfi_escape 0x2e, 0x00
	movq	%r15, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
.Ltmp55:
# %bb.48:                               #   in Loop: Header=BB2_47 Depth=3
	decl	%ebx
	testl	%eax, %eax
	jne	.LBB2_50
# %bb.49:                               #   in Loop: Header=BB2_47 Depth=3
	movq	32(%rsp), %rdi
	movq	16(%rsp), %rsi
.Ltmp56:
	.cfi_escape 0x2e, 0x00
	movl	%ebx, %edx
	callq	_Z31__device_stub__backpropagation1PfS_i
.Ltmp57:
.LBB2_50:                               #   in Loop: Header=BB2_47 Depth=3
.Ltmp58:
	.cfi_escape 0x2e, 0x00
	movabsq	$4294967297, %rdi               # imm = 0x100000001
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
.Ltmp59:
# %bb.51:                               #   in Loop: Header=BB2_47 Depth=3
	testl	%eax, %eax
	jne	.LBB2_53
# %bb.52:                               #   in Loop: Header=BB2_47 Depth=3
	movq	32(%rsp), %rdi
	movq	232(%rsp), %rsi
	movq	224(%rsp), %rdx
	movq	216(%rsp), %rcx
	movq	208(%rsp), %r8
.Ltmp60:
	.cfi_escape 0x2e, 0x00
	movl	%ebx, %r9d
	callq	_Z31__device_stub__backpropagation2PfS_S_S_S_i
.Ltmp61:
.LBB2_53:                               #   in Loop: Header=BB2_47 Depth=3
	cmpl	$1, %ebx
	ja	.LBB2_47
# %bb.54:                               # %.preheader.preheader
                                        #   in Loop: Header=BB2_32 Depth=2
	movl	$1, %ebx
.LBB2_55:                               # %.preheader
                                        #   Parent Loop BB2_27 Depth=1
                                        #     Parent Loop BB2_32 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
.Ltmp63:
	.cfi_escape 0x2e, 0x00
	movq	%r15, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
.Ltmp64:
# %bb.56:                               #   in Loop: Header=BB2_55 Depth=3
	testl	%eax, %eax
	jne	.LBB2_58
# %bb.57:                               #   in Loop: Header=BB2_55 Depth=3
	movq	(%rsp), %rdi
	movq	48(%rsp), %rsi
.Ltmp65:
	.cfi_escape 0x2e, 0x00
	movl	%ebx, %edx
	callq	_Z23__device_stub__laplace1PfS_i
.Ltmp66:
.LBB2_58:                               #   in Loop: Header=BB2_55 Depth=3
.Ltmp67:
	.cfi_escape 0x2e, 0x00
	movabsq	$4294967297, %rdi               # imm = 0x100000001
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
.Ltmp68:
# %bb.59:                               #   in Loop: Header=BB2_55 Depth=3
	testl	%eax, %eax
	jne	.LBB2_61
# %bb.60:                               #   in Loop: Header=BB2_55 Depth=3
	movq	(%rsp), %rdi
	movq	48(%rsp), %rsi
.Ltmp69:
	.cfi_escape 0x2e, 0x00
	movl	%ebx, %edx
	callq	_Z23__device_stub__laplace2PfS_i
.Ltmp70:
.LBB2_61:                               #   in Loop: Header=BB2_55 Depth=3
	incl	%ebx
	cmpl	$401, %ebx                      # imm = 0x191
	jne	.LBB2_55
# %bb.62:                               #   in Loop: Header=BB2_32 Depth=2
.Ltmp72:
	.cfi_escape 0x2e, 0x00
	movq	%r15, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
.Ltmp73:
# %bb.63:                               #   in Loop: Header=BB2_32 Depth=2
	testl	%eax, %eax
	jne	.LBB2_64
# %bb.82:                               #   in Loop: Header=BB2_32 Depth=2
	movq	104(%rsp), %rdi
	movq	32(%rsp), %rsi
	movq	48(%rsp), %rdx
	movq	16(%rsp), %rcx
.Ltmp74:
	.cfi_escape 0x2e, 0x00
	callq	_Z32__device_stub__init_differentialPfS_S_S_
.Ltmp75:
.LBB2_64:                               # %.preheader526
                                        #   in Loop: Header=BB2_32 Depth=2
	movl	$2, %ebx
	movabsq	$55834574861, %r15              # imm = 0xD0000000D
.LBB2_65:                               #   Parent Loop BB2_27 Depth=1
                                        #     Parent Loop BB2_32 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
.Ltmp76:
	.cfi_escape 0x2e, 0x00
	movq	%r15, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
.Ltmp77:
# %bb.66:                               #   in Loop: Header=BB2_65 Depth=3
	testl	%eax, %eax
	jne	.LBB2_68
# %bb.67:                               #   in Loop: Header=BB2_65 Depth=3
	movq	104(%rsp), %rdi
	movq	32(%rsp), %rsi
	movq	48(%rsp), %rdx
	movq	16(%rsp), %rcx
.Ltmp78:
	.cfi_escape 0x2e, 0x00
	movl	%ebx, %r8d
	callq	_Z34__device_stub__update_differentialPfS_S_S_i
.Ltmp79:
.LBB2_68:                               #   in Loop: Header=BB2_65 Depth=3
	incl	%ebx
	cmpl	$401, %ebx                      # imm = 0x191
	jne	.LBB2_65
# %bb.69:                               #   in Loop: Header=BB2_32 Depth=2
.Ltmp81:
	.cfi_escape 0x2e, 0x00
	movq	%r15, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
.Ltmp82:
# %bb.70:                               #   in Loop: Header=BB2_32 Depth=2
	testl	%eax, %eax
	jne	.LBB2_72
# %bb.71:                               #   in Loop: Header=BB2_32 Depth=2
	movq	296(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	104(%rsp), %rdx
	movq	200(%rsp), %rcx
	movq	120(%rsp), %r8
.Ltmp83:
	.cfi_escape 0x2e, 0x00
	callq	_Z27__device_stub__update_fieldPfS_S_S_S_
.Ltmp84:
.LBB2_72:                               #   in Loop: Header=BB2_32 Depth=2
	movq	8(%rsp), %rax                   # 8-byte Reload
	movq	%rax, %rdx
	cmpq	$640, %rax                      # imm = 0x280
	movq	184(%rsp), %r15                 # 8-byte Reload
	jl	.LBB2_32
# %bb.73:                               #   in Loop: Header=BB2_27 Depth=1
	movq	200(%rsp), %rsi
.Ltmp86:
	.cfi_escape 0x2e, 0x00
	movl	$161604, %edx                   # imm = 0x27744
	movq	304(%rsp), %r13                 # 8-byte Reload
	movq	%r13, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
.Ltmp87:
	movq	176(%rsp), %rbp                 # 8-byte Reload
# %bb.74:                               # %.lr.ph.i.preheader
                                        #   in Loop: Header=BB2_27 Depth=1
	xorps	%xmm0, %xmm0
	xorl	%eax, %eax
	movq	160(%rsp), %rbx                 # 8-byte Reload
.LBB2_75:                               # %.lr.ph.i
                                        #   Parent Loop BB2_27 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movss	(%r13,%rax,4), %xmm1            # xmm1 = mem[0],zero,zero,zero
	mulss	%xmm1, %xmm1
	addss	%xmm1, %xmm0
	incq	%rax
	cmpq	$40401, %rax                    # imm = 0x9DD1
	jne	.LBB2_75
# %bb.76:                               # %_Z4normPfi.exit
                                        #   in Loop: Header=BB2_27 Depth=1
	ucomiss	.LCPI2_5(%rip), %xmm0
	jb	.LBB2_84
# %bb.77:                               #   in Loop: Header=BB2_27 Depth=1
	sqrtss	%xmm0, %xmm2
	jmp	.LBB2_85
.LBB2_84:                               # %call.sqrt
                                        #   in Loop: Header=BB2_27 Depth=1
	.cfi_escape 0x2e, 0x00
	callq	sqrtf
	movaps	%xmm0, %xmm2
.LBB2_85:                               # %_Z4normPfi.exit.split
                                        #   in Loop: Header=BB2_27 Depth=1
	xorps	%xmm0, %xmm0
	xorl	%eax, %eax
.LBB2_86:                               # %.lr.ph.i382
                                        #   Parent Loop BB2_27 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movss	(%rbx,%rax,4), %xmm1            # xmm1 = mem[0],zero,zero,zero
	mulss	%xmm1, %xmm1
	addss	%xmm1, %xmm0
	incq	%rax
	cmpq	$40401, %rax                    # imm = 0x9DD1
	jne	.LBB2_86
# %bb.87:                               # %_Z4normPfi.exit387
                                        #   in Loop: Header=BB2_27 Depth=1
	ucomiss	.LCPI2_5(%rip), %xmm0
	jb	.LBB2_89
# %bb.88:                               #   in Loop: Header=BB2_27 Depth=1
	sqrtss	%xmm0, %xmm0
	jmp	.LBB2_90
.LBB2_89:                               # %call.sqrt552
                                        #   in Loop: Header=BB2_27 Depth=1
	.cfi_escape 0x2e, 0x00
	movss	%xmm2, 8(%rsp)                  # 4-byte Spill
	callq	sqrtf
	movss	8(%rsp), %xmm2                  # 4-byte Reload
                                        # xmm2 = mem[0],zero,zero,zero
.LBB2_90:                               # %_Z4normPfi.exit387.split
                                        #   in Loop: Header=BB2_27 Depth=1
	divss	%xmm0, %xmm2
	mulss	.LCPI2_3(%rip), %xmm2
	movss	%xmm2, 8(%rsp)                  # 4-byte Spill
	.cfi_escape 0x2e, 0x00
	callq	clock
	subq	152(%rsp), %rax                 # 8-byte Folded Reload
	xorps	%xmm0, %xmm0
	cvtsi2ss	%rax, %xmm0
	divss	.LCPI2_4(%rip), %xmm0
	movss	%xmm0, 40(%rsp)                 # 4-byte Spill
	xorps	%xmm0, %xmm0
	cvtss2sd	8(%rsp), %xmm0                  # 4-byte Folded Reload
.Ltmp89:
	.cfi_escape 0x2e, 0x00
	leaq	824(%rsp), %rdi
	movsd	%xmm0, 168(%rsp)                # 8-byte Spill
	callq	_ZNSo9_M_insertIdEERSoT_
.Ltmp90:
# %bb.91:                               # %_ZNSolsEf.exit
                                        #   in Loop: Header=BB2_27 Depth=1
.Ltmp91:
	.cfi_escape 0x2e, 0x00
	movl	$.L.str.11, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp92:
# %bb.92:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit388
                                        #   in Loop: Header=BB2_27 Depth=1
	xorps	%xmm0, %xmm0
	cvtss2sd	40(%rsp), %xmm0                 # 4-byte Folded Reload
.Ltmp93:
	.cfi_escape 0x2e, 0x00
	leaq	312(%rsp), %rdi
	callq	_ZNSo9_M_insertIdEERSoT_
.Ltmp94:
# %bb.93:                               # %_ZNSolsEf.exit389
                                        #   in Loop: Header=BB2_27 Depth=1
.Ltmp95:
	.cfi_escape 0x2e, 0x00
	movl	$.L.str.11, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp96:
# %bb.94:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit390
                                        #   in Loop: Header=BB2_27 Depth=1
.Ltmp97:
	.cfi_escape 0x2e, 0x00
	movl	$_ZSt4cout, %edi
	movl	$.L.str.12, %esi
	movl	$10, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp98:
# %bb.95:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit391
                                        #   in Loop: Header=BB2_27 Depth=1
.Ltmp99:
	.cfi_escape 0x2e, 0x00
	movl	$_ZSt4cout, %edi
	movsd	168(%rsp), %xmm0                # 8-byte Reload
                                        # xmm0 = mem[0],zero
	callq	_ZNSo9_M_insertIdEERSoT_
.Ltmp100:
# %bb.96:                               # %_ZNSolsEf.exit392
                                        #   in Loop: Header=BB2_27 Depth=1
.Ltmp101:
	.cfi_escape 0x2e, 0x00
	movl	$.L.str.4, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp102:
# %bb.97:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit393
                                        #   in Loop: Header=BB2_27 Depth=1
	movss	8(%rsp), %xmm1                  # 4-byte Reload
                                        # xmm1 = mem[0],zero,zero,zero
	ucomiss	%xmm1, %xmm1
	jp	.LBB2_101
# %bb.98:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit393
                                        #   in Loop: Header=BB2_27 Depth=1
	movss	284(%rsp), %xmm0                # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	ucomiss	%xmm1, %xmm0
	jae	.LBB2_101
# %bb.99:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit393
                                        #   in Loop: Header=BB2_27 Depth=1
	ucomiss	96(%rsp), %xmm1                 # 4-byte Folded Reload
	ja	.LBB2_101
# %bb.100:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit393
                                        #   in Loop: Header=BB2_27 Depth=1
	incl	%ebp
	movss	%xmm1, 96(%rsp)                 # 4-byte Spill
	cmpl	92(%rsp), %ebp                  # 4-byte Folded Reload
	jne	.LBB2_27
.LBB2_101:                              # %.thread
	movq	16(%rsp), %rsi
.Ltmp104:
	.cfi_escape 0x2e, 0x00
	movl	$161604, %edx                   # imm = 0x27744
	movq	128(%rsp), %rdi                 # 8-byte Reload
	movl	$2, %ecx
	callq	hipMemcpy
.Ltmp105:
# %bb.102:
.Ltmp106:
	.cfi_escape 0x2e, 0x00
	movq	144(%rsp), %rdi                 # 8-byte Reload
	movq	136(%rsp), %rsi                 # 8-byte Reload
	movq	%rbx, %rdx
	movq	128(%rsp), %rcx                 # 8-byte Reload
	callq	_Z8IO_FilesPfS_S_S_
.Ltmp107:
# %bb.103:
	movq	272(%rsp), %rdi
.Ltmp108:
	.cfi_escape 0x2e, 0x00
	callq	hipFree
.Ltmp109:
# %bb.104:
	movq	264(%rsp), %rdi
.Ltmp110:
	.cfi_escape 0x2e, 0x00
	callq	hipFree
.Ltmp111:
# %bb.105:
	movq	120(%rsp), %rdi
.Ltmp112:
	.cfi_escape 0x2e, 0x00
	callq	hipFree
.Ltmp113:
# %bb.106:
	movq	80(%rsp), %rdi
.Ltmp114:
	.cfi_escape 0x2e, 0x00
	callq	hipFree
.Ltmp115:
# %bb.107:
	movq	72(%rsp), %rdi
.Ltmp116:
	.cfi_escape 0x2e, 0x00
	callq	hipFree
.Ltmp117:
# %bb.108:
	movq	64(%rsp), %rdi
.Ltmp118:
	.cfi_escape 0x2e, 0x00
	callq	hipFree
.Ltmp119:
# %bb.109:
	movq	56(%rsp), %rdi
.Ltmp120:
	.cfi_escape 0x2e, 0x00
	callq	hipFree
.Ltmp121:
# %bb.110:
	movq	(%rsp), %rdi
.Ltmp122:
	.cfi_escape 0x2e, 0x00
	callq	hipFree
.Ltmp123:
# %bb.111:
	movq	256(%rsp), %rdi
.Ltmp124:
	.cfi_escape 0x2e, 0x00
	callq	hipFree
.Ltmp125:
# %bb.112:
	movq	248(%rsp), %rdi
.Ltmp126:
	.cfi_escape 0x2e, 0x00
	callq	hipFree
.Ltmp127:
# %bb.113:
	movq	240(%rsp), %rdi
.Ltmp128:
	.cfi_escape 0x2e, 0x00
	callq	hipFree
.Ltmp129:
# %bb.114:
	movq	112(%rsp), %rdi
.Ltmp130:
	.cfi_escape 0x2e, 0x00
	callq	hipFree
.Ltmp131:
# %bb.115:
	movq	232(%rsp), %rdi
.Ltmp132:
	.cfi_escape 0x2e, 0x00
	callq	hipFree
.Ltmp133:
# %bb.116:
	movq	224(%rsp), %rdi
.Ltmp134:
	.cfi_escape 0x2e, 0x00
	callq	hipFree
.Ltmp135:
# %bb.117:
	movq	216(%rsp), %rdi
.Ltmp136:
	.cfi_escape 0x2e, 0x00
	callq	hipFree
.Ltmp137:
# %bb.118:
	movq	208(%rsp), %rdi
.Ltmp138:
	.cfi_escape 0x2e, 0x00
	callq	hipFree
.Ltmp139:
# %bb.119:
	movq	32(%rsp), %rdi
.Ltmp140:
	.cfi_escape 0x2e, 0x00
	callq	hipFree
.Ltmp141:
# %bb.120:
	movq	48(%rsp), %rdi
.Ltmp142:
	.cfi_escape 0x2e, 0x00
	callq	hipFree
.Ltmp143:
# %bb.121:
	movq	16(%rsp), %rdi
.Ltmp144:
	.cfi_escape 0x2e, 0x00
	callq	hipFree
.Ltmp145:
# %bb.122:
	movq	104(%rsp), %rdi
.Ltmp146:
	.cfi_escape 0x2e, 0x00
	callq	hipFree
.Ltmp147:
# %bb.123:
	movq	296(%rsp), %rdi
.Ltmp148:
	.cfi_escape 0x2e, 0x00
	callq	hipFree
.Ltmp149:
# %bb.124:
	movq	200(%rsp), %rdi
.Ltmp150:
	.cfi_escape 0x2e, 0x00
	callq	hipFree
.Ltmp151:
# %bb.125:
	.cfi_escape 0x2e, 0x00
	movq	144(%rsp), %rdi                 # 8-byte Reload
	callq	_ZdaPv
	.cfi_escape 0x2e, 0x00
	movq	136(%rsp), %rdi                 # 8-byte Reload
	callq	_ZdaPv
	.cfi_escape 0x2e, 0x00
	movq	%rbx, %rdi
	callq	_ZdaPv
	.cfi_escape 0x2e, 0x00
	movq	%r12, %rdi
	callq	_ZdaPv
	.cfi_escape 0x2e, 0x00
	movq	%r15, %rdi
	callq	_ZdaPv
	.cfi_escape 0x2e, 0x00
	movq	128(%rsp), %rdi                 # 8-byte Reload
	callq	_ZdaPv
	.cfi_escape 0x2e, 0x00
	movq	%r13, %rdi
	callq	_ZdaPv
.Ltmp152:
	.cfi_escape 0x2e, 0x00
	callq	hipDeviceReset
.Ltmp153:
# %bb.126:
	movq	_ZTTSt14basic_ofstreamIcSt11char_traitsIcEE(%rip), %rbx
	leaq	320(%rsp), %rdi
	movq	%rbx, -8(%rdi)
	movq	_ZTTSt14basic_ofstreamIcSt11char_traitsIcEE+24(%rip), %r14
	movq	-24(%rbx), %rax
	movq	%r14, 312(%rsp,%rax)
	.cfi_escape 0x2e, 0x00
	callq	_ZNSt13basic_filebufIcSt11char_traitsIcEED2Ev
	movl	$248, %r15d
	leaq	312(%rsp), %rdi
	addq	%r15, %rdi
	.cfi_escape 0x2e, 0x00
	callq	_ZNSt8ios_baseD2Ev
	leaq	832(%rsp), %rdi
	movq	%rbx, -8(%rdi)
	movq	-24(%rbx), %rax
	movq	%r14, 824(%rsp,%rax)
	.cfi_escape 0x2e, 0x00
	callq	_ZNSt13basic_filebufIcSt11char_traitsIcEED2Ev
	leaq	824(%rsp), %rdi
	addq	%r15, %rdi
	.cfi_escape 0x2e, 0x00
	callq	_ZNSt8ios_baseD2Ev
	addq	$1336, %rsp                     # imm = 0x538
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB2_133:
	.cfi_def_cfa_offset 1392
.Ltmp26:
	movq	%rax, %rbx
	movq	_ZTTSt14basic_ofstreamIcSt11char_traitsIcEE(%rip), %r14
	movq	_ZTTSt14basic_ofstreamIcSt11char_traitsIcEE+24(%rip), %r15
	jmp	.LBB2_129
.LBB2_127:
.Ltmp154:
	jmp	.LBB2_128
.LBB2_78:
.Ltmp88:
	jmp	.LBB2_128
.LBB2_132:
.Ltmp103:
	jmp	.LBB2_128
.LBB2_80:
.Ltmp85:
	jmp	.LBB2_128
.LBB2_83:
.Ltmp80:
	jmp	.LBB2_128
.LBB2_81:
.Ltmp43:
	jmp	.LBB2_128
.LBB2_131:
.Ltmp71:
	jmp	.LBB2_128
.LBB2_130:
.Ltmp62:
.LBB2_128:
	movq	%rax, %rbx
	movq	_ZTTSt14basic_ofstreamIcSt11char_traitsIcEE(%rip), %r14
	leaq	320(%rsp), %rdi
	movq	%r14, -8(%rdi)
	movq	_ZTTSt14basic_ofstreamIcSt11char_traitsIcEE+24(%rip), %r15
	movq	-24(%r14), %rax
	movq	%r15, 312(%rsp,%rax)
	.cfi_escape 0x2e, 0x00
	callq	_ZNSt13basic_filebufIcSt11char_traitsIcEED2Ev
	leaq	560(%rsp), %rdi
	.cfi_escape 0x2e, 0x00
	callq	_ZNSt8ios_baseD2Ev
.LBB2_129:
	leaq	832(%rsp), %rdi
	movq	%r14, -8(%rdi)
	movq	-24(%r14), %rax
	movq	%r15, 824(%rsp,%rax)
	.cfi_escape 0x2e, 0x00
	callq	_ZNSt13basic_filebufIcSt11char_traitsIcEED2Ev
	leaq	1072(%rsp), %rdi
	.cfi_escape 0x2e, 0x00
	callq	_ZNSt8ios_baseD2Ev
	.cfi_escape 0x2e, 0x00
	movq	%rbx, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end2:
	.size	_Z21Ultrasonic_Tomographyifii, .Lfunc_end2-_Z21Ultrasonic_Tomographyifii
	.cfi_endproc
	.section	.gcc_except_table,"a",@progbits
	.p2align	2, 0x0
GCC_except_table2:
.Lexception1:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end1-.Lcst_begin1
.Lcst_begin1:
	.uleb128 .Lfunc_begin1-.Lfunc_begin1    # >> Call Site 1 <<
	.uleb128 .Ltmp24-.Lfunc_begin1          #   Call between .Lfunc_begin1 and .Ltmp24
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp24-.Lfunc_begin1          # >> Call Site 2 <<
	.uleb128 .Ltmp25-.Ltmp24                #   Call between .Ltmp24 and .Ltmp25
	.uleb128 .Ltmp26-.Lfunc_begin1          #     jumps to .Ltmp26
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp27-.Lfunc_begin1          # >> Call Site 3 <<
	.uleb128 .Ltmp34-.Ltmp27                #   Call between .Ltmp27 and .Ltmp34
	.uleb128 .Ltmp88-.Lfunc_begin1          #     jumps to .Ltmp88
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp35-.Lfunc_begin1          # >> Call Site 4 <<
	.uleb128 .Ltmp38-.Ltmp35                #   Call between .Ltmp35 and .Ltmp38
	.uleb128 .Ltmp85-.Lfunc_begin1          #     jumps to .Ltmp85
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp39-.Lfunc_begin1          # >> Call Site 5 <<
	.uleb128 .Ltmp42-.Ltmp39                #   Call between .Ltmp39 and .Ltmp42
	.uleb128 .Ltmp43-.Lfunc_begin1          #     jumps to .Ltmp43
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp44-.Lfunc_begin1          # >> Call Site 6 <<
	.uleb128 .Ltmp53-.Ltmp44                #   Call between .Ltmp44 and .Ltmp53
	.uleb128 .Ltmp85-.Lfunc_begin1          #     jumps to .Ltmp85
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp54-.Lfunc_begin1          # >> Call Site 7 <<
	.uleb128 .Ltmp61-.Ltmp54                #   Call between .Ltmp54 and .Ltmp61
	.uleb128 .Ltmp62-.Lfunc_begin1          #     jumps to .Ltmp62
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp63-.Lfunc_begin1          # >> Call Site 8 <<
	.uleb128 .Ltmp70-.Ltmp63                #   Call between .Ltmp63 and .Ltmp70
	.uleb128 .Ltmp71-.Lfunc_begin1          #     jumps to .Ltmp71
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp72-.Lfunc_begin1          # >> Call Site 9 <<
	.uleb128 .Ltmp75-.Ltmp72                #   Call between .Ltmp72 and .Ltmp75
	.uleb128 .Ltmp85-.Lfunc_begin1          #     jumps to .Ltmp85
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp76-.Lfunc_begin1          # >> Call Site 10 <<
	.uleb128 .Ltmp79-.Ltmp76                #   Call between .Ltmp76 and .Ltmp79
	.uleb128 .Ltmp80-.Lfunc_begin1          #     jumps to .Ltmp80
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp81-.Lfunc_begin1          # >> Call Site 11 <<
	.uleb128 .Ltmp84-.Ltmp81                #   Call between .Ltmp81 and .Ltmp84
	.uleb128 .Ltmp85-.Lfunc_begin1          #     jumps to .Ltmp85
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp86-.Lfunc_begin1          # >> Call Site 12 <<
	.uleb128 .Ltmp87-.Ltmp86                #   Call between .Ltmp86 and .Ltmp87
	.uleb128 .Ltmp88-.Lfunc_begin1          #     jumps to .Ltmp88
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp89-.Lfunc_begin1          # >> Call Site 13 <<
	.uleb128 .Ltmp102-.Ltmp89               #   Call between .Ltmp89 and .Ltmp102
	.uleb128 .Ltmp103-.Lfunc_begin1         #     jumps to .Ltmp103
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp104-.Lfunc_begin1         # >> Call Site 14 <<
	.uleb128 .Ltmp153-.Ltmp104              #   Call between .Ltmp104 and .Ltmp153
	.uleb128 .Ltmp154-.Lfunc_begin1         #     jumps to .Ltmp154
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp153-.Lfunc_begin1         # >> Call Site 15 <<
	.uleb128 .Lfunc_end2-.Ltmp153           #   Call between .Ltmp153 and .Lfunc_end2
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end1:
	.p2align	2, 0x0
                                        # -- End function
	.text
	.globl	_Z26__device_stub__field_setupPfS_S_S_S_S_S_ # -- Begin function _Z26__device_stub__field_setupPfS_S_S_S_S_S_
	.type	_Z26__device_stub__field_setupPfS_S_S_S_S_S_,@function
_Z26__device_stub__field_setupPfS_S_S_S_S_S_: # @_Z26__device_stub__field_setupPfS_S_S_S_S_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	16(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11field_setupPfS_S_S_S_S_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z26__device_stub__field_setupPfS_S_S_S_S_S_, .Lfunc_end3-_Z26__device_stub__field_setupPfS_S_S_S_S_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z26__device_stub__propagationiiiiPfS_S_S_S_i # -- Begin function _Z26__device_stub__propagationiiiiPfS_S_S_S_i
	.type	_Z26__device_stub__propagationiiiiPfS_S_S_S_i,@function
_Z26__device_stub__propagationiiiiPfS_S_S_S_i: # @_Z26__device_stub__propagationiiiiPfS_S_S_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rax
	movl	%edi, (%rax)
	leaq	8(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	4(%rsp), %rsi
	movl	%edx, (%rsi)
	movq	%rsp, %rdx
	movl	%ecx, (%rdx)
	leaq	40(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	32(%rsp), %r8
	movq	%r9, (%r8)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	216(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	224(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	232(%rsp), %rax
	movq	%rax, 72(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11propagationiiiiPfS_S_S_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z26__device_stub__propagationiiiiPfS_S_S_S_i, .Lfunc_end4-_Z26__device_stub__propagationiiiiPfS_S_S_S_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z37__device_stub__propagation_at_cornersPf # -- Begin function _Z37__device_stub__propagation_at_cornersPf
	.type	_Z37__device_stub__propagation_at_cornersPf,@function
_Z37__device_stub__propagation_at_cornersPf: # @_Z37__device_stub__propagation_at_cornersPf
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$64, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	movq	%rsp, %rbx
	movq	%rax, (%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z22propagation_at_cornersPf, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$80, %rsp
	.cfi_adjust_cfa_offset -80
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	_Z37__device_stub__propagation_at_cornersPf, .Lfunc_end5-_Z37__device_stub__propagation_at_cornersPf
	.cfi_endproc
                                        # -- End function
	.globl	_Z29__device_stub__initial_signalPfS_S_S_S_i # -- Begin function _Z29__device_stub__initial_signalPfS_S_S_S_i
	.type	_Z29__device_stub__initial_signalPfS_S_S_S_i,@function
_Z29__device_stub__initial_signalPfS_S_S_S_i: # @_Z29__device_stub__initial_signalPfS_S_S_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	4(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z14initial_signalPfS_S_S_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	_Z29__device_stub__initial_signalPfS_S_S_S_i, .Lfunc_end6-_Z29__device_stub__initial_signalPfS_S_S_S_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z20__device_stub__resetPfS_S_S_S_ # -- Begin function _Z20__device_stub__resetPfS_S_S_S_
	.type	_Z20__device_stub__resetPfS_S_S_S_,@function
_Z20__device_stub__resetPfS_S_S_S_:     # @_Z20__device_stub__resetPfS_S_S_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z5resetPfS_S_S_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end7:
	.size	_Z20__device_stub__resetPfS_S_S_S_, .Lfunc_end7-_Z20__device_stub__resetPfS_S_S_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z32__device_stub__difference_signalPfS_S_S_S_S_S_S_S_i # -- Begin function _Z32__device_stub__difference_signalPfS_S_S_S_S_S_S_S_i
	.type	_Z32__device_stub__difference_signalPfS_S_S_S_S_S_S_S_i,@function
_Z32__device_stub__difference_signalPfS_S_S_S_S_S_S_S_i: # @_Z32__device_stub__difference_signalPfS_S_S_S_S_S_S_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$176, %rsp
	.cfi_def_cfa_offset 224
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	16(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	224(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	232(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	240(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	248(%rsp), %rax
	movq	%rax, 72(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z17difference_signalPfS_S_S_S_S_S_S_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$192, %rsp
	.cfi_adjust_cfa_offset -192
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end8:
	.size	_Z32__device_stub__difference_signalPfS_S_S_S_S_S_S_S_i, .Lfunc_end8-_Z32__device_stub__difference_signalPfS_S_S_S_S_S_S_S_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z31__device_stub__backpropagation1PfS_i # -- Begin function _Z31__device_stub__backpropagation1PfS_i
	.type	_Z31__device_stub__backpropagation1PfS_i,@function
_Z31__device_stub__backpropagation1PfS_i: # @_Z31__device_stub__backpropagation1PfS_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16backpropagation1PfS_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end9:
	.size	_Z31__device_stub__backpropagation1PfS_i, .Lfunc_end9-_Z31__device_stub__backpropagation1PfS_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z31__device_stub__backpropagation2PfS_S_S_S_i # -- Begin function _Z31__device_stub__backpropagation2PfS_S_S_S_i
	.type	_Z31__device_stub__backpropagation2PfS_S_S_S_i,@function
_Z31__device_stub__backpropagation2PfS_S_S_S_i: # @_Z31__device_stub__backpropagation2PfS_S_S_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	4(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16backpropagation2PfS_S_S_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end10:
	.size	_Z31__device_stub__backpropagation2PfS_S_S_S_i, .Lfunc_end10-_Z31__device_stub__backpropagation2PfS_S_S_S_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z23__device_stub__laplace1PfS_i # -- Begin function _Z23__device_stub__laplace1PfS_i
	.type	_Z23__device_stub__laplace1PfS_i,@function
_Z23__device_stub__laplace1PfS_i:       # @_Z23__device_stub__laplace1PfS_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z8laplace1PfS_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end11:
	.size	_Z23__device_stub__laplace1PfS_i, .Lfunc_end11-_Z23__device_stub__laplace1PfS_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z23__device_stub__laplace2PfS_i # -- Begin function _Z23__device_stub__laplace2PfS_i
	.type	_Z23__device_stub__laplace2PfS_i,@function
_Z23__device_stub__laplace2PfS_i:       # @_Z23__device_stub__laplace2PfS_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z8laplace2PfS_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end12:
	.size	_Z23__device_stub__laplace2PfS_i, .Lfunc_end12-_Z23__device_stub__laplace2PfS_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z32__device_stub__init_differentialPfS_S_S_ # -- Begin function _Z32__device_stub__init_differentialPfS_S_S_
	.type	_Z32__device_stub__init_differentialPfS_S_S_,@function
_Z32__device_stub__init_differentialPfS_S_S_: # @_Z32__device_stub__init_differentialPfS_S_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	16(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z17init_differentialPfS_S_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end13:
	.size	_Z32__device_stub__init_differentialPfS_S_S_, .Lfunc_end13-_Z32__device_stub__init_differentialPfS_S_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z34__device_stub__update_differentialPfS_S_S_i # -- Begin function _Z34__device_stub__update_differentialPfS_S_S_i
	.type	_Z34__device_stub__update_differentialPfS_S_S_i,@function
_Z34__device_stub__update_differentialPfS_S_S_i: # @_Z34__device_stub__update_differentialPfS_S_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	12(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z19update_differentialPfS_S_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end14:
	.size	_Z34__device_stub__update_differentialPfS_S_S_i, .Lfunc_end14-_Z34__device_stub__update_differentialPfS_S_S_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z27__device_stub__update_fieldPfS_S_S_S_ # -- Begin function _Z27__device_stub__update_fieldPfS_S_S_S_
	.type	_Z27__device_stub__update_fieldPfS_S_S_S_,@function
_Z27__device_stub__update_fieldPfS_S_S_S_: # @_Z27__device_stub__update_fieldPfS_S_S_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z12update_fieldPfS_S_S_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end15:
	.size	_Z27__device_stub__update_fieldPfS_S_S_S_, .Lfunc_end15-_Z27__device_stub__update_fieldPfS_S_S_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z4normPfi                      # -- Begin function _Z4normPfi
	.type	_Z4normPfi,@function
_Z4normPfi:                             # @_Z4normPfi
	.cfi_startproc
# %bb.0:
	xorps	%xmm1, %xmm1
	xorps	%xmm0, %xmm0
	testl	%esi, %esi
	jle	.LBB16_3
# %bb.1:                                # %.lr.ph.preheader
	movl	%esi, %eax
	xorl	%ecx, %ecx
.LBB16_2:                               # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movss	(%rdi,%rcx,4), %xmm2            # xmm2 = mem[0],zero,zero,zero
	mulss	%xmm2, %xmm2
	addss	%xmm2, %xmm0
	incq	%rcx
	cmpq	%rcx, %rax
	jne	.LBB16_2
.LBB16_3:                               # %._crit_edge
	ucomiss	%xmm1, %xmm0
	jb	sqrtf                           # TAILCALL
# %bb.4:                                # %._crit_edge.split
	sqrtss	%xmm0, %xmm0
	retq
.Lfunc_end16:
	.size	_Z4normPfi, .Lfunc_end16-_Z4normPfi
	.cfi_endproc
                                        # -- End function
	.globl	_Z8IO_FilesPfS_S_S_             # -- Begin function _Z8IO_FilesPfS_S_S_
	.type	_Z8IO_FilesPfS_S_S_,@function
_Z8IO_FilesPfS_S_S_:                    # @_Z8IO_FilesPfS_S_S_
.Lfunc_begin2:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception2
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$2056, %rsp                     # imm = 0x808
	.cfi_def_cfa_offset 2112
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rcx, %rbx
	movq	%rdx, %r14
	movq	%rsi, %r15
	movq	%rdi, %r12
	leaq	1544(%rsp), %rdi
	callq	_ZNSt14basic_ofstreamIcSt11char_traitsIcEEC1Ev
.Ltmp155:
	leaq	1032(%rsp), %rdi
	callq	_ZNSt14basic_ofstreamIcSt11char_traitsIcEEC1Ev
.Ltmp156:
# %bb.1:
.Ltmp158:
	leaq	520(%rsp), %rdi
	callq	_ZNSt14basic_ofstreamIcSt11char_traitsIcEEC1Ev
.Ltmp159:
# %bb.2:
.Ltmp161:
	leaq	8(%rsp), %rdi
	callq	_ZNSt14basic_ofstreamIcSt11char_traitsIcEEC1Ev
.Ltmp162:
# %bb.3:
.Ltmp164:
	leaq	1544(%rsp), %rdi
	movl	$.L.str.13, %esi
	movl	$16, %edx
	callq	_ZNSt14basic_ofstreamIcSt11char_traitsIcEE4openEPKcSt13_Ios_Openmode
.Ltmp165:
# %bb.4:
.Ltmp166:
	leaq	1032(%rsp), %rdi
	movl	$.L.str.14, %esi
	movl	$16, %edx
	callq	_ZNSt14basic_ofstreamIcSt11char_traitsIcEE4openEPKcSt13_Ios_Openmode
.Ltmp167:
# %bb.5:
.Ltmp168:
	leaq	520(%rsp), %rdi
	movl	$.L.str.15, %esi
	movl	$16, %edx
	callq	_ZNSt14basic_ofstreamIcSt11char_traitsIcEE4openEPKcSt13_Ios_Openmode
.Ltmp169:
# %bb.6:
.Ltmp170:
	leaq	8(%rsp), %rdi
	movl	$.L.str.16, %esi
	movl	$16, %edx
	callq	_ZNSt14basic_ofstreamIcSt11char_traitsIcEE4openEPKcSt13_Ios_Openmode
.Ltmp171:
# %bb.7:                                # %.preheader55.preheader
	xorl	%ebp, %ebp
	leaq	1544(%rsp), %r13
.LBB17_8:                               # %.preheader55
                                        # =>This Inner Loop Header: Depth=1
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r12,%rbp,4), %xmm0
.Ltmp172:
	movq	%r13, %rdi
	callq	_ZNSo9_M_insertIdEERSoT_
.Ltmp173:
# %bb.9:                                # %_ZNSolsEf.exit
                                        #   in Loop: Header=BB17_8 Depth=1
.Ltmp174:
	movl	$.L.str.4, %esi
	movl	$1, %edx
	movq	%r13, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp175:
# %bb.10:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit
                                        #   in Loop: Header=BB17_8 Depth=1
	incq	%rbp
	cmpq	$201, %rbp
	jne	.LBB17_8
# %bb.11:                               # %.preheader54.preheader
	xorl	%r13d, %r13d
	leaq	1032(%rsp), %r12
.LBB17_12:                              # %.preheader54
                                        # =>This Inner Loop Header: Depth=1
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r15,%r13,4), %xmm0
.Ltmp177:
	movq	%r12, %rdi
	callq	_ZNSo9_M_insertIdEERSoT_
.Ltmp178:
# %bb.13:                               # %_ZNSolsEf.exit43
                                        #   in Loop: Header=BB17_12 Depth=1
.Ltmp179:
	movl	$.L.str.4, %esi
	movl	$1, %edx
	movq	%r12, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp180:
# %bb.14:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit44
                                        #   in Loop: Header=BB17_12 Depth=1
	incq	%r13
	cmpq	$201, %r13
	jne	.LBB17_12
# %bb.15:                               # %.preheader52.preheader
	xorl	%r12d, %r12d
	leaq	520(%rsp), %r15
.LBB17_16:                              # %.preheader52
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB17_17 Depth 2
	xorl	%r13d, %r13d
.LBB17_17:                              #   Parent Loop BB17_16 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r14,%r13,4), %xmm0
.Ltmp182:
	movq	%r15, %rdi
	callq	_ZNSo9_M_insertIdEERSoT_
.Ltmp183:
# %bb.18:                               # %_ZNSolsEf.exit46
                                        #   in Loop: Header=BB17_17 Depth=2
.Ltmp184:
	movl	$.L.str.17, %esi
	movl	$1, %edx
	movq	%r15, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp185:
# %bb.19:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit47
                                        #   in Loop: Header=BB17_17 Depth=2
	incq	%r13
	cmpq	$201, %r13
	jne	.LBB17_17
# %bb.20:                               #   in Loop: Header=BB17_16 Depth=1
.Ltmp187:
	movl	$.L.str.4, %esi
	movl	$1, %edx
	movq	%r15, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp188:
# %bb.21:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit45
                                        #   in Loop: Header=BB17_16 Depth=1
	incq	%r12
	addq	$804, %r14                      # imm = 0x324
	cmpq	$201, %r12
	jne	.LBB17_16
# %bb.22:                               # %.preheader.preheader
	xorl	%r15d, %r15d
	leaq	8(%rsp), %r14
.LBB17_23:                              # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB17_24 Depth 2
	xorl	%r12d, %r12d
.LBB17_24:                              #   Parent Loop BB17_23 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rbx,%r12,4), %xmm0
.Ltmp190:
	movq	%r14, %rdi
	callq	_ZNSo9_M_insertIdEERSoT_
.Ltmp191:
# %bb.25:                               # %_ZNSolsEf.exit49
                                        #   in Loop: Header=BB17_24 Depth=2
.Ltmp192:
	movl	$.L.str.11, %esi
	movl	$1, %edx
	movq	%r14, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp193:
# %bb.26:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit50
                                        #   in Loop: Header=BB17_24 Depth=2
	incq	%r12
	cmpq	$201, %r12
	jne	.LBB17_24
# %bb.27:                               #   in Loop: Header=BB17_23 Depth=1
.Ltmp195:
	movl	$.L.str.4, %esi
	movl	$1, %edx
	movq	%r14, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp196:
# %bb.28:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit48
                                        #   in Loop: Header=BB17_23 Depth=1
	incq	%r15
	addq	$804, %rbx                      # imm = 0x324
	cmpq	$201, %r15
	jne	.LBB17_23
# %bb.29:
.Ltmp198:
	leaq	1544(%rsp), %rbx
	movq	%rbx, %rdi
	callq	_ZNSt14basic_ofstreamIcSt11char_traitsIcEE5closeEv
.Ltmp199:
# %bb.30:
.Ltmp200:
	leaq	1032(%rsp), %r14
	movq	%r14, %rdi
	callq	_ZNSt14basic_ofstreamIcSt11char_traitsIcEE5closeEv
.Ltmp201:
# %bb.31:
.Ltmp202:
	leaq	520(%rsp), %r15
	movq	%r15, %rdi
	callq	_ZNSt14basic_ofstreamIcSt11char_traitsIcEE5closeEv
.Ltmp203:
# %bb.32:
.Ltmp204:
	leaq	8(%rsp), %r12
	movq	%r12, %rdi
	callq	_ZNSt14basic_ofstreamIcSt11char_traitsIcEE5closeEv
.Ltmp205:
# %bb.33:
	movq	_ZTTSt14basic_ofstreamIcSt11char_traitsIcEE(%rip), %r13
	leaq	16(%rsp), %rdi
	movq	%r13, -8(%rdi)
	movq	_ZTTSt14basic_ofstreamIcSt11char_traitsIcEE+24(%rip), %rcx
	movq	-24(%r13), %rax
	movq	%rcx, 8(%rsp,%rax)
	callq	_ZNSt13basic_filebufIcSt11char_traitsIcEED2Ev
	movl	$248, %ebp
	addq	%rbp, %r12
	movq	%r12, %rdi
	callq	_ZNSt8ios_baseD2Ev
	leaq	528(%rsp), %rdi
	movq	%r13, -8(%rdi)
	movq	-24(%r13), %rax
	movq	_ZTTSt14basic_ofstreamIcSt11char_traitsIcEE+24(%rip), %r12
	movq	%r12, 520(%rsp,%rax)
	callq	_ZNSt13basic_filebufIcSt11char_traitsIcEED2Ev
	addq	%rbp, %r15
	movq	%r15, %rdi
	callq	_ZNSt8ios_baseD2Ev
	leaq	1040(%rsp), %rdi
	movq	%r13, -8(%rdi)
	movq	-24(%r13), %rax
	movq	%r12, 1032(%rsp,%rax)
	callq	_ZNSt13basic_filebufIcSt11char_traitsIcEED2Ev
	addq	%rbp, %r14
	movq	%r14, %rdi
	callq	_ZNSt8ios_baseD2Ev
	leaq	1552(%rsp), %rdi
	movq	%r13, -8(%rdi)
	movq	-24(%r13), %rax
	movq	%r12, 1544(%rsp,%rax)
	callq	_ZNSt13basic_filebufIcSt11char_traitsIcEED2Ev
	addq	%rbp, %rbx
	movq	%rbx, %rdi
	callq	_ZNSt8ios_baseD2Ev
	addq	$2056, %rsp                     # imm = 0x808
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB17_36:
	.cfi_def_cfa_offset 2112
.Ltmp163:
	movq	%rax, %rbx
	jmp	.LBB17_45
.LBB17_35:
.Ltmp160:
	movq	%rax, %rbx
	jmp	.LBB17_46
.LBB17_34:
.Ltmp157:
	movq	%rax, %rbx
	jmp	.LBB17_47
.LBB17_43:
.Ltmp206:
	jmp	.LBB17_44
.LBB17_42:
.Ltmp197:
	jmp	.LBB17_44
.LBB17_40:
.Ltmp189:
	jmp	.LBB17_44
.LBB17_38:
.Ltmp181:
	jmp	.LBB17_44
.LBB17_37:
.Ltmp176:
	jmp	.LBB17_44
.LBB17_41:
.Ltmp194:
	jmp	.LBB17_44
.LBB17_39:
.Ltmp186:
.LBB17_44:
	movq	%rax, %rbx
	leaq	8(%rsp), %rdi
	callq	_ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev
.LBB17_45:
	leaq	520(%rsp), %rdi
	callq	_ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev
.LBB17_46:
	leaq	1032(%rsp), %rdi
	callq	_ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev
.LBB17_47:
	leaq	1544(%rsp), %rdi
	callq	_ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev
	movq	%rbx, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end17:
	.size	_Z8IO_FilesPfS_S_S_, .Lfunc_end17-_Z8IO_FilesPfS_S_S_
	.cfi_endproc
	.section	.gcc_except_table,"a",@progbits
	.p2align	2, 0x0
GCC_except_table17:
.Lexception2:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end2-.Lcst_begin2
.Lcst_begin2:
	.uleb128 .Lfunc_begin2-.Lfunc_begin2    # >> Call Site 1 <<
	.uleb128 .Ltmp155-.Lfunc_begin2         #   Call between .Lfunc_begin2 and .Ltmp155
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp155-.Lfunc_begin2         # >> Call Site 2 <<
	.uleb128 .Ltmp156-.Ltmp155              #   Call between .Ltmp155 and .Ltmp156
	.uleb128 .Ltmp157-.Lfunc_begin2         #     jumps to .Ltmp157
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp158-.Lfunc_begin2         # >> Call Site 3 <<
	.uleb128 .Ltmp159-.Ltmp158              #   Call between .Ltmp158 and .Ltmp159
	.uleb128 .Ltmp160-.Lfunc_begin2         #     jumps to .Ltmp160
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp161-.Lfunc_begin2         # >> Call Site 4 <<
	.uleb128 .Ltmp162-.Ltmp161              #   Call between .Ltmp161 and .Ltmp162
	.uleb128 .Ltmp163-.Lfunc_begin2         #     jumps to .Ltmp163
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp164-.Lfunc_begin2         # >> Call Site 5 <<
	.uleb128 .Ltmp171-.Ltmp164              #   Call between .Ltmp164 and .Ltmp171
	.uleb128 .Ltmp206-.Lfunc_begin2         #     jumps to .Ltmp206
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp172-.Lfunc_begin2         # >> Call Site 6 <<
	.uleb128 .Ltmp175-.Ltmp172              #   Call between .Ltmp172 and .Ltmp175
	.uleb128 .Ltmp176-.Lfunc_begin2         #     jumps to .Ltmp176
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp177-.Lfunc_begin2         # >> Call Site 7 <<
	.uleb128 .Ltmp180-.Ltmp177              #   Call between .Ltmp177 and .Ltmp180
	.uleb128 .Ltmp181-.Lfunc_begin2         #     jumps to .Ltmp181
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp182-.Lfunc_begin2         # >> Call Site 8 <<
	.uleb128 .Ltmp185-.Ltmp182              #   Call between .Ltmp182 and .Ltmp185
	.uleb128 .Ltmp186-.Lfunc_begin2         #     jumps to .Ltmp186
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp187-.Lfunc_begin2         # >> Call Site 9 <<
	.uleb128 .Ltmp188-.Ltmp187              #   Call between .Ltmp187 and .Ltmp188
	.uleb128 .Ltmp189-.Lfunc_begin2         #     jumps to .Ltmp189
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp190-.Lfunc_begin2         # >> Call Site 10 <<
	.uleb128 .Ltmp193-.Ltmp190              #   Call between .Ltmp190 and .Ltmp193
	.uleb128 .Ltmp194-.Lfunc_begin2         #     jumps to .Ltmp194
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp195-.Lfunc_begin2         # >> Call Site 11 <<
	.uleb128 .Ltmp196-.Ltmp195              #   Call between .Ltmp195 and .Ltmp196
	.uleb128 .Ltmp197-.Lfunc_begin2         #     jumps to .Ltmp197
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp198-.Lfunc_begin2         # >> Call Site 12 <<
	.uleb128 .Ltmp205-.Ltmp198              #   Call between .Ltmp198 and .Ltmp205
	.uleb128 .Ltmp206-.Lfunc_begin2         #     jumps to .Ltmp206
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp205-.Lfunc_begin2         # >> Call Site 13 <<
	.uleb128 .Lfunc_end17-.Ltmp205          #   Call between .Ltmp205 and .Lfunc_end17
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end2:
	.p2align	2, 0x0
                                        # -- End function
	.section	.text._ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag,"axG",@progbits,_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag,comdat
	.weak	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag # -- Begin function _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag
	.p2align	1, 0x90
	.type	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag,@function
_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag: # @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdx, %r14
	movq	%rsi, %r15
	movq	%rdi, %rbx
	subq	%rsi, %r14
	movq	%r14, (%rsp)
	cmpq	$15, %r14
	jbe	.LBB18_1
# %bb.2:
	movq	%rsp, %r12
	movq	%rbx, %rdi
	movq	%r12, %rsi
	xorl	%edx, %edx
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE9_M_createERmm
	movq	%rax, (%rbx)
	movq	(%r12), %rcx
	movq	%rcx, 16(%rbx)
	jmp	.LBB18_3
.LBB18_1:                               # %._crit_edge
	movq	(%rbx), %rax
.LBB18_3:
	testq	%r14, %r14
	je	.LBB18_7
# %bb.4:
	cmpq	$1, %r14
	jne	.LBB18_6
# %bb.5:
	movb	(%r15), %cl
	movb	%cl, (%rax)
	jmp	.LBB18_7
.LBB18_6:
	movq	%rax, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	callq	memcpy@PLT
.LBB18_7:                               # %_ZZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tagEN6_GuardD2Ev.exit
	movq	(%rsp), %rax
	movq	%rax, 8(%rbx)
	movq	(%rbx), %rcx
	movb	$0, (%rcx,%rax)
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end18:
	.size	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag, .Lfunc_end18-_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag
	.cfi_endproc
                                        # -- End function
	.text
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB19_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB19_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11field_setupPfS_S_S_S_S_S_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11propagationiiiiPfS_S_S_S_i, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z22propagation_at_cornersPf, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z14initial_signalPfS_S_S_S_i, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z17difference_signalPfS_S_S_S_S_S_S_S_i, %esi
	movl	$.L__unnamed_5, %edx
	movl	$.L__unnamed_5, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z16backpropagation1PfS_i, %esi
	movl	$.L__unnamed_6, %edx
	movl	$.L__unnamed_6, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z16backpropagation2PfS_S_S_S_i, %esi
	movl	$.L__unnamed_7, %edx
	movl	$.L__unnamed_7, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z8laplace1PfS_i, %esi
	movl	$.L__unnamed_8, %edx
	movl	$.L__unnamed_8, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z8laplace2PfS_i, %esi
	movl	$.L__unnamed_9, %edx
	movl	$.L__unnamed_9, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z17init_differentialPfS_S_S_, %esi
	movl	$.L__unnamed_10, %edx
	movl	$.L__unnamed_10, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z19update_differentialPfS_S_S_i, %esi
	movl	$.L__unnamed_11, %edx
	movl	$.L__unnamed_11, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z12update_fieldPfS_S_S_S_, %esi
	movl	$.L__unnamed_12, %edx
	movl	$.L__unnamed_12, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z5resetPfS_S_S_S_, %esi
	movl	$.L__unnamed_13, %edx
	movl	$.L__unnamed_13, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$0, 8(%rsp)
	movl	$1, (%rsp)
	movl	$hx, %esi
	movl	$.L__unnamed_14, %edx
	movl	$.L__unnamed_14, %ecx
	movl	$4, %r9d
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	callq	__hipRegisterVar
	movl	$0, 8(%rsp)
	movl	$1, (%rsp)
	movl	$hy, %esi
	movl	$.L__unnamed_15, %edx
	movl	$.L__unnamed_15, %ecx
	movl	$4, %r9d
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	callq	__hipRegisterVar
	movl	$0, 8(%rsp)
	movl	$1, (%rsp)
	movl	$h, %esi
	movl	$.L__unnamed_16, %edx
	movl	$.L__unnamed_16, %ecx
	movl	$4, %r9d
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	callq	__hipRegisterVar
	movl	$0, 8(%rsp)
	movl	$1, (%rsp)
	movl	$T, %esi
	movl	$.L__unnamed_17, %edx
	movl	$.L__unnamed_17, %ecx
	movl	$4, %r9d
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	callq	__hipRegisterVar
	movl	$0, 8(%rsp)
	movl	$1, (%rsp)
	movl	$dt, %esi
	movl	$.L__unnamed_18, %edx
	movl	$.L__unnamed_18, %ecx
	movl	$4, %r9d
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	callq	__hipRegisterVar
	movl	$0, 8(%rsp)
	movl	$1, (%rsp)
	movl	$fre, %esi
	movl	$.L__unnamed_19, %edx
	movl	$.L__unnamed_19, %ecx
	movl	$4, %r9d
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	callq	__hipRegisterVar
	movl	$0, 8(%rsp)
	movl	$1, (%rsp)
	movl	$omegac, %esi
	movl	$.L__unnamed_20, %edx
	movl	$.L__unnamed_20, %ecx
	movl	$4, %r9d
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	callq	__hipRegisterVar
	movl	$0, 8(%rsp)
	movl	$1, (%rsp)
	movl	$tao, %esi
	movl	$.L__unnamed_21, %edx
	movl	$.L__unnamed_21, %ecx
	movl	$4, %r9d
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	callq	__hipRegisterVar
	movl	$0, 8(%rsp)
	movl	$1, (%rsp)
	movl	$tt, %esi
	movl	$.L__unnamed_22, %edx
	movl	$.L__unnamed_22, %ecx
	movl	$4, %r9d
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	callq	__hipRegisterVar
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end19:
	.size	__hip_module_ctor, .Lfunc_end19-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB20_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB20_2:
	retq
.Lfunc_end20:
	.size	__hip_module_dtor, .Lfunc_end20-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	hx,@object                      # @hx
	.local	hx
	.comm	hx,4,4
	.type	hy,@object                      # @hy
	.local	hy
	.comm	hy,4,4
	.type	h,@object                       # @h
	.local	h
	.comm	h,4,4
	.type	T,@object                       # @T
	.local	T
	.comm	T,4,4
	.type	dt,@object                      # @dt
	.local	dt
	.comm	dt,4,4
	.type	fre,@object                     # @fre
	.local	fre
	.comm	fre,4,4
	.type	omegac,@object                  # @omegac
	.local	omegac
	.comm	omegac,4,4
	.type	tao,@object                     # @tao
	.local	tao
	.comm	tao,4,4
	.type	tt,@object                      # @tt
	.local	tt
	.comm	tt,4,4
	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Usage: "
	.size	.L.str, 8

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	" <sensor group size> <target epsilon> <max iterations>\n\n"
	.size	.L.str.1, 57

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Ultrasonic Tomography Running:\n\n"
	.size	.L.str.2, 33

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"ti = "
	.size	.L.str.3, 6

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"\n"
	.size	.L.str.4, 2

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"tf = "
	.size	.L.str.5, 6

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"tt = "
	.size	.L.str.6, 6

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"Total Seconds = "
	.size	.L.str.7, 17

	.type	_Z11field_setupPfS_S_S_S_S_S_,@object # @_Z11field_setupPfS_S_S_S_S_S_
	.section	.rodata,"a",@progbits
	.globl	_Z11field_setupPfS_S_S_S_S_S_
	.p2align	3, 0x0
_Z11field_setupPfS_S_S_S_S_S_:
	.quad	_Z26__device_stub__field_setupPfS_S_S_S_S_S_
	.size	_Z11field_setupPfS_S_S_S_S_S_, 8

	.type	_Z11propagationiiiiPfS_S_S_S_i,@object # @_Z11propagationiiiiPfS_S_S_S_i
	.globl	_Z11propagationiiiiPfS_S_S_S_i
	.p2align	3, 0x0
_Z11propagationiiiiPfS_S_S_S_i:
	.quad	_Z26__device_stub__propagationiiiiPfS_S_S_S_i
	.size	_Z11propagationiiiiPfS_S_S_S_i, 8

	.type	_Z22propagation_at_cornersPf,@object # @_Z22propagation_at_cornersPf
	.globl	_Z22propagation_at_cornersPf
	.p2align	3, 0x0
_Z22propagation_at_cornersPf:
	.quad	_Z37__device_stub__propagation_at_cornersPf
	.size	_Z22propagation_at_cornersPf, 8

	.type	_Z14initial_signalPfS_S_S_S_i,@object # @_Z14initial_signalPfS_S_S_S_i
	.globl	_Z14initial_signalPfS_S_S_S_i
	.p2align	3, 0x0
_Z14initial_signalPfS_S_S_S_i:
	.quad	_Z29__device_stub__initial_signalPfS_S_S_S_i
	.size	_Z14initial_signalPfS_S_S_S_i, 8

	.type	.L.str.8,@object                # @.str.8
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.8:
	.asciz	"art_convergence0.txt"
	.size	.L.str.8, 21

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"art_time0.txt"
	.size	.L.str.9, 14

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"\nIter: "
	.size	.L.str.10, 8

	.type	_Z5resetPfS_S_S_S_,@object      # @_Z5resetPfS_S_S_S_
	.section	.rodata,"a",@progbits
	.globl	_Z5resetPfS_S_S_S_
	.p2align	3, 0x0
_Z5resetPfS_S_S_S_:
	.quad	_Z20__device_stub__resetPfS_S_S_S_
	.size	_Z5resetPfS_S_S_S_, 8

	.type	_Z17difference_signalPfS_S_S_S_S_S_S_S_i,@object # @_Z17difference_signalPfS_S_S_S_S_S_S_S_i
	.globl	_Z17difference_signalPfS_S_S_S_S_S_S_S_i
	.p2align	3, 0x0
_Z17difference_signalPfS_S_S_S_S_S_S_S_i:
	.quad	_Z32__device_stub__difference_signalPfS_S_S_S_S_S_S_S_i
	.size	_Z17difference_signalPfS_S_S_S_S_S_S_S_i, 8

	.type	_Z16backpropagation1PfS_i,@object # @_Z16backpropagation1PfS_i
	.globl	_Z16backpropagation1PfS_i
	.p2align	3, 0x0
_Z16backpropagation1PfS_i:
	.quad	_Z31__device_stub__backpropagation1PfS_i
	.size	_Z16backpropagation1PfS_i, 8

	.type	_Z16backpropagation2PfS_S_S_S_i,@object # @_Z16backpropagation2PfS_S_S_S_i
	.globl	_Z16backpropagation2PfS_S_S_S_i
	.p2align	3, 0x0
_Z16backpropagation2PfS_S_S_S_i:
	.quad	_Z31__device_stub__backpropagation2PfS_S_S_S_i
	.size	_Z16backpropagation2PfS_S_S_S_i, 8

	.type	_Z8laplace1PfS_i,@object        # @_Z8laplace1PfS_i
	.globl	_Z8laplace1PfS_i
	.p2align	3, 0x0
_Z8laplace1PfS_i:
	.quad	_Z23__device_stub__laplace1PfS_i
	.size	_Z8laplace1PfS_i, 8

	.type	_Z8laplace2PfS_i,@object        # @_Z8laplace2PfS_i
	.globl	_Z8laplace2PfS_i
	.p2align	3, 0x0
_Z8laplace2PfS_i:
	.quad	_Z23__device_stub__laplace2PfS_i
	.size	_Z8laplace2PfS_i, 8

	.type	_Z17init_differentialPfS_S_S_,@object # @_Z17init_differentialPfS_S_S_
	.globl	_Z17init_differentialPfS_S_S_
	.p2align	3, 0x0
_Z17init_differentialPfS_S_S_:
	.quad	_Z32__device_stub__init_differentialPfS_S_S_
	.size	_Z17init_differentialPfS_S_S_, 8

	.type	_Z19update_differentialPfS_S_S_i,@object # @_Z19update_differentialPfS_S_S_i
	.globl	_Z19update_differentialPfS_S_S_i
	.p2align	3, 0x0
_Z19update_differentialPfS_S_S_i:
	.quad	_Z34__device_stub__update_differentialPfS_S_S_i
	.size	_Z19update_differentialPfS_S_S_i, 8

	.type	_Z12update_fieldPfS_S_S_S_,@object # @_Z12update_fieldPfS_S_S_S_
	.globl	_Z12update_fieldPfS_S_S_S_
	.p2align	3, 0x0
_Z12update_fieldPfS_S_S_S_:
	.quad	_Z27__device_stub__update_fieldPfS_S_S_S_
	.size	_Z12update_fieldPfS_S_S_S_, 8

	.type	.L.str.11,@object               # @.str.11
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.11:
	.asciz	" "
	.size	.L.str.11, 2

	.type	.L.str.12,@object               # @.str.12
.L.str.12:
	.asciz	"epsilon = "
	.size	.L.str.12, 11

	.type	.L.str.13,@object               # @.str.13
.L.str.13:
	.asciz	"dev_x.txt"
	.size	.L.str.13, 10

	.type	.L.str.14,@object               # @.str.14
.L.str.14:
	.asciz	"dev_y.txt"
	.size	.L.str.14, 10

	.type	.L.str.15,@object               # @.str.15
.L.str.15:
	.asciz	"dev_f0.txt"
	.size	.L.str.15, 11

	.type	.L.str.16,@object               # @.str.16
.L.str.16:
	.asciz	"dev_f.txt"
	.size	.L.str.16, 10

	.type	.L.str.17,@object               # @.str.17
.L.str.17:
	.asciz	"\t"
	.size	.L.str.17, 2

	.type	.L.str.18,@object               # @.str.18
.L.str.18:
	.asciz	"stoi"
	.size	.L.str.18, 5

	.type	.L.str.19,@object               # @.str.19
.L.str.19:
	.asciz	"stof"
	.size	.L.str.19, 5

	.type	.L.str.20,@object               # @.str.20
.L.str.20:
	.asciz	"basic_string: construction from null is not valid"
	.size	.L.str.20, 50

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z11field_setupPfS_S_S_S_S_S_"
	.size	.L__unnamed_1, 30

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z11propagationiiiiPfS_S_S_S_i"
	.size	.L__unnamed_2, 31

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z22propagation_at_cornersPf"
	.size	.L__unnamed_3, 29

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"_Z14initial_signalPfS_S_S_S_i"
	.size	.L__unnamed_4, 30

	.type	.L__unnamed_5,@object           # @4
.L__unnamed_5:
	.asciz	"_Z17difference_signalPfS_S_S_S_S_S_S_S_i"
	.size	.L__unnamed_5, 41

	.type	.L__unnamed_6,@object           # @5
.L__unnamed_6:
	.asciz	"_Z16backpropagation1PfS_i"
	.size	.L__unnamed_6, 26

	.type	.L__unnamed_7,@object           # @6
.L__unnamed_7:
	.asciz	"_Z16backpropagation2PfS_S_S_S_i"
	.size	.L__unnamed_7, 32

	.type	.L__unnamed_8,@object           # @7
.L__unnamed_8:
	.asciz	"_Z8laplace1PfS_i"
	.size	.L__unnamed_8, 17

	.type	.L__unnamed_9,@object           # @8
.L__unnamed_9:
	.asciz	"_Z8laplace2PfS_i"
	.size	.L__unnamed_9, 17

	.type	.L__unnamed_10,@object          # @9
.L__unnamed_10:
	.asciz	"_Z17init_differentialPfS_S_S_"
	.size	.L__unnamed_10, 30

	.type	.L__unnamed_11,@object          # @10
.L__unnamed_11:
	.asciz	"_Z19update_differentialPfS_S_S_i"
	.size	.L__unnamed_11, 33

	.type	.L__unnamed_12,@object          # @11
.L__unnamed_12:
	.asciz	"_Z12update_fieldPfS_S_S_S_"
	.size	.L__unnamed_12, 27

	.type	.L__unnamed_13,@object          # @12
.L__unnamed_13:
	.asciz	"_Z5resetPfS_S_S_S_"
	.size	.L__unnamed_13, 19

	.type	.L__unnamed_14,@object          # @13
.L__unnamed_14:
	.asciz	"hx"
	.size	.L__unnamed_14, 3

	.type	.L__unnamed_15,@object          # @14
.L__unnamed_15:
	.asciz	"hy"
	.size	.L__unnamed_15, 3

	.type	.L__unnamed_16,@object          # @15
.L__unnamed_16:
	.asciz	"h"
	.size	.L__unnamed_16, 2

	.type	.L__unnamed_17,@object          # @16
.L__unnamed_17:
	.asciz	"T"
	.size	.L__unnamed_17, 2

	.type	.L__unnamed_18,@object          # @17
.L__unnamed_18:
	.asciz	"dt"
	.size	.L__unnamed_18, 3

	.type	.L__unnamed_19,@object          # @18
.L__unnamed_19:
	.asciz	"fre"
	.size	.L__unnamed_19, 4

	.type	.L__unnamed_20,@object          # @19
.L__unnamed_20:
	.asciz	"omegac"
	.size	.L__unnamed_20, 7

	.type	.L__unnamed_21,@object          # @20
.L__unnamed_21:
	.asciz	"tao"
	.size	.L__unnamed_21, 4

	.type	.L__unnamed_22,@object          # @21
.L__unnamed_22:
	.asciz	"tt"
	.size	.L__unnamed_22, 3

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __gxx_personality_v0
	.addrsig_sym _Z26__device_stub__field_setupPfS_S_S_S_S_S_
	.addrsig_sym _Z26__device_stub__propagationiiiiPfS_S_S_S_i
	.addrsig_sym _Z37__device_stub__propagation_at_cornersPf
	.addrsig_sym _Z29__device_stub__initial_signalPfS_S_S_S_i
	.addrsig_sym _Z20__device_stub__resetPfS_S_S_S_
	.addrsig_sym _Z32__device_stub__difference_signalPfS_S_S_S_S_S_S_S_i
	.addrsig_sym _Z31__device_stub__backpropagation1PfS_i
	.addrsig_sym _Z31__device_stub__backpropagation2PfS_S_S_S_i
	.addrsig_sym _Z23__device_stub__laplace1PfS_i
	.addrsig_sym _Z23__device_stub__laplace2PfS_i
	.addrsig_sym _Z32__device_stub__init_differentialPfS_S_S_
	.addrsig_sym _Z34__device_stub__update_differentialPfS_S_S_i
	.addrsig_sym _Z27__device_stub__update_fieldPfS_S_S_S_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Unwind_Resume
	.addrsig_sym hx
	.addrsig_sym hy
	.addrsig_sym h
	.addrsig_sym T
	.addrsig_sym dt
	.addrsig_sym fre
	.addrsig_sym omegac
	.addrsig_sym tao
	.addrsig_sym tt
	.addrsig_sym _ZSt4cerr
	.addrsig_sym _ZSt4cout
	.addrsig_sym _Z11field_setupPfS_S_S_S_S_S_
	.addrsig_sym _Z11propagationiiiiPfS_S_S_S_i
	.addrsig_sym _Z22propagation_at_cornersPf
	.addrsig_sym _Z14initial_signalPfS_S_S_S_i
	.addrsig_sym _Z5resetPfS_S_S_S_
	.addrsig_sym _Z17difference_signalPfS_S_S_S_S_S_S_S_i
	.addrsig_sym _Z16backpropagation1PfS_i
	.addrsig_sym _Z16backpropagation2PfS_S_S_S_i
	.addrsig_sym _Z8laplace1PfS_i
	.addrsig_sym _Z8laplace2PfS_i
	.addrsig_sym _Z17init_differentialPfS_S_S_
	.addrsig_sym _Z19update_differentialPfS_S_S_i
	.addrsig_sym _Z12update_fieldPfS_S_S_S_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z11field_setupPfS_S_S_S_S_S_ ; -- Begin function _Z11field_setupPfS_S_S_S_S_S_
	.globl	_Z11field_setupPfS_S_S_S_S_S_
	.p2align	8
	.type	_Z11field_setupPfS_S_S_S_S_S_,@function
_Z11field_setupPfS_S_S_S_S_S_:          ; @_Z11field_setupPfS_S_S_S_S_S_
; %bb.0:
	s_load_b32 s2, s[0:1], 0x44
	v_and_b32_e32 v1, 0x3ff, v0
	v_bfe_u32 v0, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[4:5], null, s14, s2, v[1:2]
	v_mad_u64_u32 v[2:3], null, s15, s3, v[0:1]
	s_mov_b32 s2, exec_lo
	v_max_i32_e32 v0, v4, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e32 0xc9, v0
	s_cbranch_execz .LBB0_2
; %bb.1:
	s_load_b256 s[8:15], s[0:1], 0x0
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[0:1], null, 0xc9, v2, v[4:5]
	v_ashrrev_i32_e32 v5, 31, v4
	v_ashrrev_i32_e32 v3, 31, v2
	s_mov_b32 s16, 0x3e76c4e1
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[6:7], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v4, vcc_lo, s8, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v5, vcc_lo, s9, v5, vcc_lo
	v_add_co_u32 v3, vcc_lo, s10, v6
	global_load_b32 v2, v[4:5], off
	v_add_co_ci_u32_e32 v4, vcc_lo, s11, v7, vcc_lo
	global_load_b32 v1, v[3:4], off
	s_waitcnt vmcnt(1)
	v_frexp_mant_f32_e64 v11, |v2|
	v_cmp_eq_f32_e32 vcc_lo, 1.0, v2
	v_frexp_exp_i32_f32_e32 v12, v2
	v_cmp_class_f32_e64 s17, v2, 0x204
	s_delay_alu instid0(VALU_DEP_4)
	v_cmp_gt_f32_e64 s3, 0x3f2aaaab, v11
	s_waitcnt vmcnt(0)
	v_frexp_mant_f32_e64 v13, |v1|
	v_cndmask_b32_e64 v5, 2.0, 1.0, vcc_lo
	v_cmp_eq_f32_e64 s2, 1.0, v1
	v_frexp_exp_i32_f32_e32 v14, v1
	v_cndmask_b32_e64 v17, 0, 1, s3
	v_cmp_gt_f32_e64 s5, 0x3f2aaaab, v13
	v_trunc_f32_e32 v18, v5
	v_cndmask_b32_e64 v6, 2.0, 1.0, s2
	v_mul_f32_e32 v19, 0.5, v5
	v_ldexp_f32 v17, v11, v17
	v_add_f32_e32 v3, 0xbc54d59b, v2
	v_cndmask_b32_e64 v20, 0, 1, s5
	v_mul_f32_e32 v22, 0.5, v6
	v_subrev_co_ci_u32_e64 v11, s3, 0, v12, s3
	v_add_f32_e32 v36, 1.0, v17
	v_cmp_eq_f32_e64 s4, 1.0, v3
	v_frexp_mant_f32_e64 v23, |v3|
	v_trunc_f32_e32 v12, v19
	v_trunc_f32_e32 v21, v6
	v_frexp_exp_i32_f32_e32 v24, v3
	v_cndmask_b32_e64 v16, 2.0, 1.0, s4
	v_add_f32_e32 v4, 0xbbf5c28f, v1
	v_cmp_neq_f32_e64 s10, v12, v19
	v_cvt_f32_i32_e32 v37, v11
	v_cmp_eq_f32_e32 vcc_lo, 0, v2
	v_mul_f32_e32 v31, 0.5, v16
	v_cmp_eq_f32_e64 s4, 1.0, v4
	v_frexp_mant_f32_e64 v25, |v4|
	v_frexp_exp_i32_f32_e32 v26, v4
	v_cmp_eq_f32_e64 s2, 0, v1
	v_cndmask_b32_e64 v10, 0x7f800000, 0, vcc_lo
	v_cndmask_b32_e64 v9, 2.0, 1.0, s4
	v_cmp_eq_f32_e64 s4, v18, v5
	v_ldexp_f32 v18, v13, v20
	v_add_f32_e32 v8, 0x3c75c28f, v1
	v_subrev_co_ci_u32_e64 v13, s3, 0, v14, s5
	v_cmp_gt_f32_e64 s3, 0x3f2aaaab, v23
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f32_e32 v19, -1.0, v18
	v_frexp_mant_f32_e64 v29, |v8|
	v_cmp_gt_f32_e64 s7, 0x3f2aaaab, v25
	v_cmp_eq_f32_e64 s5, v21, v6
	v_cndmask_b32_e64 v20, 0, 1, s3
	v_trunc_f32_e32 v21, v16
	v_cmp_gt_f32_e64 s9, 0x3f2aaaab, v29
	v_cndmask_b32_e64 v32, 0, 1, s7
	v_trunc_f32_e32 v14, v22
	v_ldexp_f32 v20, v23, v20
	v_add_f32_e32 v7, 0x3c54d59b, v2
	v_cndmask_b32_e64 v34, 0, 1, s9
	v_cmp_eq_f32_e64 s6, v21, v16
	v_ldexp_f32 v21, v25, v32
	v_frexp_exp_i32_f32_e32 v30, v8
	v_dual_add_f32 v35, -1.0, v17 :: v_dual_add_f32 v38, 1.0, v18
	v_ldexp_f32 v25, v29, v34
	v_add_f32_e32 v34, -1.0, v20
	v_frexp_mant_f32_e64 v27, |v7|
	v_frexp_exp_i32_f32_e32 v28, v7
	v_cvt_f32_i32_e32 v39, v13
	v_cmp_neq_f32_e64 s11, v14, v22
	v_subrev_co_ci_u32_e64 v11, s3, 0, v24, s3
	v_cmp_gt_f32_e64 s8, 0x3f2aaaab, v27
	v_subrev_co_ci_u32_e64 v22, s3, 0, v26, s7
	v_trunc_f32_e32 v14, v31
	v_subrev_co_ci_u32_e64 v26, s3, 0, v30, s9
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v33, 0, 1, s8
	v_subrev_co_ci_u32_e64 v24, s3, 0, v28, s8
	v_rcp_f32_e32 v29, v36
	v_mul_f32_e32 v28, 0x3f317218, v37
	v_ldexp_f32 v23, v27, v33
	v_dual_add_f32 v27, -1.0, v36 :: v_dual_add_f32 v30, -1.0, v38
	v_mul_f32_e32 v33, 0x3f317218, v39
	v_rcp_f32_e32 v32, v38
	v_add_f32_e32 v40, 1.0, v20
	v_cvt_f32_i32_e32 v41, v11
	v_dual_add_f32 v42, 1.0, v21 :: v_dual_add_f32 v43, -1.0, v23
	v_cvt_f32_i32_e32 v22, v22
	v_dual_add_f32 v44, 1.0, v23 :: v_dual_add_f32 v47, 1.0, v25
	v_cvt_f32_i32_e32 v45, v24
	s_and_b32 s3, s4, s10
	s_and_b32 s7, s5, s11
	v_cndmask_b32_e64 v15, 0x7f800000, 0, s2
	v_cmp_neq_f32_e64 s8, v14, v31
	v_add_f32_e32 v31, -1.0, v21
	v_cvt_f32_i32_e32 v11, v26
	v_cndmask_b32_e64 v24, 0, v2, s3
	v_cndmask_b32_e64 v26, 0, v1, s7
	v_fma_f32 v48, 0x3f317218, v37, -v28
	v_dual_sub_f32 v30, v18, v30 :: v_dual_mul_f32 v51, 0x3f317218, v41
	v_fma_f32 v49, 0x3f317218, v39, -v33
	v_dual_add_f32 v18, -1.0, v40 :: v_dual_mul_f32 v57, 0x3f317218, v45
	v_rcp_f32_e32 v50, v40
	v_dual_add_f32 v52, -1.0, v42 :: v_dual_add_f32 v55, -1.0, v44
	v_rcp_f32_e32 v53, v42
	v_mul_f32_e32 v54, 0x3f317218, v22
	v_rcp_f32_e32 v59, v47
	v_dual_add_f32 v46, -1.0, v25 :: v_dual_sub_f32 v27, v17, v27
	v_rcp_f32_e32 v56, v44
	v_add_f32_e32 v58, -1.0, v47
	v_bfi_b32 v17, 0x7fffffff, v10, v24
	v_bfi_b32 v10, 0x7fffffff, v15, v26
	v_dual_sub_f32 v15, v20, v18 :: v_dual_mul_f32 v60, v35, v29
	v_dual_fmac_f32 v49, 0xb102e308, v39 :: v_dual_fmac_f32 v48, 0xb102e308, v37
	v_sub_f32_e32 v39, v21, v52
	v_mul_f32_e32 v37, v19, v32
	v_fma_f32 v20, 0x3f317218, v41, -v51
	v_fma_f32 v52, 0x3f317218, v22, -v54
	v_fma_f32 v61, 0x3f317218, v45, -v57
	v_dual_sub_f32 v55, v23, v55 :: v_dual_sub_f32 v58, v25, v58
	v_dual_mul_f32 v62, v36, v60 :: v_dual_mul_f32 v63, v38, v37
	v_dual_add_f32 v24, v28, v48 :: v_dual_add_f32 v25, v33, v49
	v_mul_f32_e32 v64, v34, v50
	v_dual_fmac_f32 v20, 0xb102e308, v41 :: v_dual_mul_f32 v65, v43, v56
	v_dual_mul_f32 v41, v31, v53 :: v_dual_fmac_f32 v52, 0xb102e308, v22
	v_fmac_f32_e32 v61, 0xb102e308, v45
	v_dual_mul_f32 v45, v46, v59 :: v_dual_sub_f32 v26, v25, v33
	v_fma_f32 v36, v60, v36, -v62
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_dual_sub_f32 v23, v24, v28 :: v_dual_mul_f32 v66, v42, v41
	v_fma_f32 v38, v37, v38, -v63
	v_dual_mul_f32 v33, v40, v64 :: v_dual_add_f32 v18, v57, v61
	v_dual_add_f32 v21, v51, v20 :: v_dual_fmac_f32 v36, v60, v27
	s_delay_alu instid0(VALU_DEP_4)
	v_dual_mul_f32 v68, v47, v45 :: v_dual_sub_f32 v27, v48, v23
	v_dual_add_f32 v22, v54, v52 :: v_dual_mul_f32 v67, v44, v65
	v_fmac_f32_e32 v38, v37, v30
	v_fma_f32 v30, v64, v40, -v33
	v_sub_f32_e32 v23, v21, v51
	v_fma_f32 v47, v45, v47, -v68
	v_sub_f32_e32 v28, v49, v26
	v_fma_f32 v40, v41, v42, -v66
	v_sub_f32_e32 v42, v22, v54
	v_add_f32_e32 v49, v62, v36
	v_dual_sub_f32 v48, v18, v57 :: v_dual_add_f32 v51, v63, v38
	v_fmac_f32_e32 v30, v64, v15
	v_dual_sub_f32 v26, v20, v23 :: v_dual_fmac_f32 v47, v45, v58
	v_fma_f32 v44, v65, v44, -v67
	v_dual_fmac_f32 v40, v41, v39 :: v_dual_sub_f32 v23, v52, v42
	v_sub_f32_e32 v15, v61, v48
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_dual_add_f32 v52, v33, v30 :: v_dual_add_f32 v57, v68, v47
	v_sub_f32_e32 v48, v19, v51
	v_sub_f32_e32 v39, v35, v49
	v_dual_sub_f32 v42, v51, v63 :: v_dual_sub_f32 v33, v52, v33
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_sub_f32_e32 v63, v57, v68
	v_dual_fmac_f32 v44, v65, v55 :: v_dual_sub_f32 v19, v19, v48
	v_sub_f32_e32 v20, v49, v62
	v_dual_add_f32 v54, v66, v40 :: v_dual_sub_f32 v35, v35, v39
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f32_e32 v55, v67, v44
	v_dual_sub_f32 v19, v19, v51 :: v_dual_sub_f32 v20, v20, v36
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_dual_sub_f32 v36, v42, v38 :: v_dual_sub_f32 v35, v35, v49
	v_sub_f32_e32 v38, v34, v52
	v_dual_sub_f32 v42, v54, v66 :: v_dual_sub_f32 v61, v55, v67
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_add_f32 v19, v36, v19 :: v_dual_sub_f32 v58, v31, v54
	v_dual_sub_f32 v30, v33, v30 :: v_dual_sub_f32 v33, v42, v40
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_sub_f32 v66, v46, v57 :: v_dual_add_f32 v19, v48, v19
	v_sub_f32_e32 v31, v31, v58
	v_sub_f32_e32 v62, v43, v55
	v_sub_f32_e32 v42, v61, v44
	v_cndmask_b32_e64 v13, 1.0, v1, s7
	v_mul_f32_e32 v19, v32, v19
	v_sub_f32_e32 v31, v31, v54
	v_sub_f32_e32 v40, v43, v62
	v_dual_sub_f32 v43, v46, v66 :: v_dual_add_f32 v20, v20, v35
	v_cndmask_b32_e64 v12, 1.0, v2, s3
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_add_f32 v31, v33, v31 :: v_dual_sub_f32 v34, v34, v38
	v_dual_sub_f32 v35, v40, v55 :: v_dual_add_f32 v20, v39, v20
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_sub_f32_e32 v36, v43, v57
	v_cmp_class_f32_e64 s18, v1, 0x204
	v_sub_f32_e32 v34, v34, v52
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_dual_add_f32 v33, v42, v35 :: v_dual_mul_f32 v20, v29, v20
	s_or_b32 vcc_lo, vcc_lo, s17
	s_and_b32 s3, s6, s8
	v_add_f32_e32 v30, v30, v34
	v_sub_f32_e32 v44, v63, v47
	v_cndmask_b32_e64 v14, 1.0, v3, s3
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_f32_e32 v29, v38, v30
	v_add_f32_e32 v30, v58, v31
	v_add_f32_e32 v31, v62, v33
	v_mul_f32_e32 v29, v50, v29
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v31, v56, v31
	v_add_f32_e32 v33, v60, v20
	v_sub_f32_e32 v35, v33, v60
	v_mul_f32_e32 v30, v53, v30
	v_add_f32_e32 v34, v44, v36
	v_ldexp_f32 v38, v33, 1
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_sub_f32_e32 v35, v20, v35
	v_add_f32_e32 v43, v41, v30
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f32_e32 v32, v66, v34
	v_add_f32_e32 v34, v37, v19
	v_add_f32_e32 v42, v64, v29
	v_dual_add_f32 v44, v65, v31 :: v_dual_sub_f32 v41, v43, v41
	v_mul_f32_e32 v51, v43, v43
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_sub_f32_e32 v37, v34, v37
	v_dual_mul_f32 v36, v33, v33 :: v_dual_mul_f32 v49, v42, v42
	v_dual_sub_f32 v20, v42, v64 :: v_dual_add_f32 v57, v35, v35
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_sub_f32_e32 v37, v19, v37
	v_dual_mul_f32 v32, v59, v32 :: v_dual_mul_f32 v39, v34, v34
	v_fma_f32 v47, v33, v33, -v36
	v_sub_f32_e32 v53, v44, v65
	v_dual_sub_f32 v29, v29, v20 :: v_dual_sub_f32 v30, v30, v41
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f32_e32 v46, v45, v32
	v_dual_mul_f32 v54, v44, v44 :: v_dual_fmac_f32 v47, v33, v57
	v_fma_f32 v48, v34, v34, -v39
	v_add_f32_e32 v59, v37, v37
	s_delay_alu instid0(VALU_DEP_4)
	v_sub_f32_e32 v45, v46, v45
	v_mul_f32_e32 v56, v46, v46
	v_fma_f32 v61, v42, v42, -v49
	v_add_f32_e32 v66, v36, v47
	v_fma_f32 v41, v43, v43, -v51
	v_sub_f32_e32 v20, v32, v45
	v_add_f32_e32 v45, v29, v29
	v_dual_sub_f32 v31, v31, v53 :: v_dual_fmac_f32 v48, v34, v59
	v_add_f32_e32 v59, v30, v30
	v_sub_f32_e32 v36, v66, v36
	s_delay_alu instid0(VALU_DEP_4)
	v_fmac_f32_e32 v61, v42, v45
	v_fma_f32 v53, v44, v44, -v54
	v_fma_f32 v32, v46, v46, -v56
	v_ldexp_f32 v60, v37, 1
	v_sub_f32_e32 v36, v47, v36
	v_dual_add_f32 v65, v20, v20 :: v_dual_add_f32 v68, v49, v61
	v_fmac_f32_e32 v41, v43, v59
	v_add_f32_e32 v63, v31, v31
	v_ldexp_f32 v40, v34, 1
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fmac_f32_e32 v32, v46, v65
	v_dual_fmaak_f32 v72, s16, v68, 0x3e91f4c4 :: v_dual_add_f32 v69, v51, v41
	v_ldexp_f32 v58, v35, 1
	v_ldexp_f32 v62, v30, 1
	v_ldexp_f32 v64, v31, 1
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_4)
	v_fmaak_f32 v72, v68, v72, 0x3ecccdef
	v_dual_fmac_f32 v53, v44, v63 :: v_dual_fmaak_f32 v74, s16, v69, 0x3e91f4c4
	v_add_f32_e32 v67, v39, v48
	v_add_f32_e32 v71, v56, v32
	v_ldexp_f32 v55, v44, 1
	v_add_f32_e32 v70, v54, v53
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_dual_fmaak_f32 v74, v69, v74, 0x3ecccdef :: v_dual_sub_f32 v39, v67, v39
	v_mul_f32_e32 v65, v34, v67
	v_dual_mul_f32 v59, v33, v66 :: v_dual_sub_f32 v56, v71, v56
	v_dual_sub_f32 v54, v70, v54 :: v_dual_sub_f32 v39, v48, v39
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_fma_f32 v48, v67, v34, -v65
	v_dual_fmaak_f32 v63, s16, v67, 0x3e91f4c4 :: v_dual_fmaak_f32 v76, s16, v70, 0x3e91f4c4
	v_dual_sub_f32 v51, v69, v51 :: v_dual_sub_f32 v32, v32, v56
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_dual_fmac_f32 v48, v67, v37 :: v_dual_mul_f32 v79, v46, v71
	v_dual_fmaak_f32 v45, s16, v66, 0x3e91f4c4 :: v_dual_fmaak_f32 v78, s16, v71, 0x3e91f4c4
	v_dual_fmaak_f32 v63, v67, v63, 0x3ecccdef :: v_dual_fmaak_f32 v76, v70, v76, 0x3ecccdef
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_fma_f32 v56, v71, v46, -v79
	v_mul_f32_e32 v77, v44, v70
	v_sub_f32_e32 v53, v53, v54
	v_dual_fmaak_f32 v45, v66, v45, 0x3ecccdef :: v_dual_fmaak_f32 v78, v71, v78, 0x3ecccdef
	v_fmac_f32_e32 v56, v71, v20
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_fma_f32 v54, v70, v44, -v77
	v_mul_f32_e32 v75, v43, v69
	v_fma_f32 v47, v66, v33, -v59
	v_dual_mul_f32 v37, v67, v63 :: v_dual_fmac_f32 v56, v32, v46
	v_sub_f32_e32 v41, v41, v51
	v_fmac_f32_e32 v54, v70, v31
	v_fma_f32 v51, v69, v43, -v75
	v_fmac_f32_e32 v47, v66, v35
	v_mul_f32_e32 v31, v70, v76
	v_mul_f32_e32 v73, v42, v68
	v_fmac_f32_e32 v54, v53, v44
	v_fmac_f32_e32 v51, v69, v30
	v_dual_mul_f32 v30, v69, v74 :: v_dual_sub_f32 v49, v68, v49
	v_fmac_f32_e32 v48, v39, v34
	v_fma_f32 v34, v67, v63, -v37
	v_mul_f32_e32 v35, v66, v45
	v_fmac_f32_e32 v47, v36, v33
	v_ldexp_f32 v50, v42, 1
	v_ldexp_f32 v19, v46, 1
	v_fmac_f32_e32 v34, v39, v63
	v_fma_f32 v33, v66, v45, -v35
	v_mul_f32_e32 v66, v71, v78
	v_ldexp_f32 v52, v43, 1
	v_ldexp_f32 v57, v29, 1
	v_add_f32_e32 v63, v37, v34
	v_fmac_f32_e32 v33, v36, v45
	v_fma_f32 v44, v71, v78, -v66
	v_sub_f32_e32 v49, v61, v49
	v_fma_f32 v61, v68, v42, -v73
	v_sub_f32_e32 v37, v63, v37
	v_add_f32_e32 v46, v35, v33
	v_dual_fmac_f32 v44, v32, v78 :: v_dual_fmac_f32 v51, v41, v43
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v61, v68, v29
	v_fma_f32 v43, v70, v76, -v31
	v_add_f32_e32 v36, v65, v48
	v_dual_sub_f32 v34, v34, v37 :: v_dual_fmac_f32 v61, v49, v42
	v_fma_f32 v42, v69, v74, -v30
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f32_e32 v34, 0x31739010, v34
	v_dual_fmac_f32 v42, v41, v74 :: v_dual_mul_f32 v29, v68, v72
	v_dual_add_f32 v67, v59, v47 :: v_dual_add_f32 v74, v66, v44
	v_add_f32_e32 v41, v77, v54
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f32_e32 v70, v30, v42
	v_fma_f32 v39, v68, v72, -v29
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_sub_f32 v45, v67, v59 :: v_dual_sub_f32 v66, v74, v66
	v_dual_sub_f32 v71, v41, v77 :: v_dual_sub_f32 v30, v70, v30
	v_sub_f32_e32 v59, v36, v65
	v_add_f32_e32 v65, v73, v61
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_dual_fmac_f32 v39, v49, v72 :: v_dual_sub_f32 v32, v47, v45
	v_dual_sub_f32 v30, v42, v30 :: v_dual_fmac_f32 v43, v53, v76
	v_dual_add_f32 v53, v79, v56 :: v_dual_sub_f32 v54, v54, v71
	v_sub_f32_e32 v47, v48, v59
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_sub_f32 v59, v65, v73 :: v_dual_add_f32 v30, 0x31739010, v30
	v_dual_sub_f32 v73, v53, v79 :: v_dual_sub_f32 v44, v44, v66
	v_sub_f32_e32 v35, v46, v35
	v_add_f32_e32 v68, v29, v39
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_dual_sub_f32 v59, v61, v59 :: v_dual_sub_f32 v56, v56, v73
	v_add_f32_e32 v49, v75, v51
	v_add_f32_e32 v61, 0x3f2aaaaa, v68
	v_sub_f32_e32 v29, v68, v29
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v69, v49, v75
	v_sub_f32_e32 v29, v39, v29
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f32_e32 v39, 0xbf2aaaaa, v61
	v_sub_f32_e32 v51, v51, v69
	v_add_f32_e32 v69, 0x3f2aaaaa, v70
	v_add_f32_e32 v73, 0x3f2aaaaa, v74
	v_add_f32_e32 v29, 0x31739010, v29
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f32_e32 v42, 0xbf2aaaaa, v69
	v_add_f32_e32 v48, 0x3f2aaaaa, v63
	v_add_f32_e32 v37, 0xbf2aaaaa, v48
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v37, v63, v37
	v_add_f32_e32 v34, v34, v37
	v_sub_f32_e32 v37, v70, v42
	v_dual_add_f32 v45, 0x3f2aaaaa, v46 :: v_dual_add_f32 v72, v31, v43
	v_dual_add_f32 v42, 0x31739010, v44 :: v_dual_sub_f32 v33, v33, v35
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f32_e32 v30, v30, v37
	v_add_f32_e32 v35, 0xbf2aaaaa, v45
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f32_e32 v71, 0x3f2aaaaa, v72
	v_sub_f32_e32 v31, v72, v31
	v_add_f32_e32 v33, 0x31739010, v33
	v_dual_sub_f32 v35, v46, v35 :: v_dual_add_f32 v46, 0xbf2aaaaa, v73
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_sub_f32_e32 v31, v43, v31
	v_add_f32_e32 v43, 0xbf2aaaaa, v71
	v_add_f32_e32 v33, v33, v35
	v_sub_f32_e32 v35, v68, v39
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f32_e32 v31, 0x31739010, v31
	v_sub_f32_e32 v39, v72, v43
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_dual_sub_f32 v43, v74, v46 :: v_dual_add_f32 v44, v45, v33
	v_dual_add_f32 v29, v29, v35 :: v_dual_add_f32 v46, v48, v34
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f32_e32 v31, v31, v39
	v_sub_f32_e32 v37, v45, v44
	v_mul_f32_e32 v39, v67, v44
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f32_e32 v45, v61, v29
	v_add_f32_e32 v33, v33, v37
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f32 v37, v67, v44, -v39
	v_mul_f32_e32 v68, v65, v45
	v_sub_f32_e32 v61, v61, v45
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v37, v67, v33
	v_fma_f32 v33, v65, v45, -v68
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f32_e32 v29, v29, v61
	v_fmac_f32_e32 v37, v32, v44
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v33, v65, v29
	v_add_f32_e32 v29, v39, v37
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f32_e32 v32, v38, v29
	v_dual_add_f32 v35, v42, v43 :: v_dual_sub_f32 v42, v48, v46
	v_dual_mul_f32 v43, v36, v46 :: v_dual_add_f32 v66, v73, v35
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f32_e32 v34, v34, v42
	v_fma_f32 v42, v36, v46, -v43
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_mul_f32 v74, v53, v66 :: v_dual_add_f32 v63, v71, v31
	v_fmac_f32_e32 v42, v36, v34
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f32 v61, v53, v66, -v74
	v_sub_f32_e32 v71, v71, v63
	v_mul_f32_e32 v72, v41, v63
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v42, v47, v46
	v_add_f32_e32 v31, v31, v71
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v36, v41, v63, -v72
	v_fmac_f32_e32 v36, v41, v31
	v_add_f32_e32 v48, v69, v30
	v_sub_f32_e32 v31, v29, v39
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_dual_fmac_f32 v36, v54, v63 :: v_dual_sub_f32 v69, v69, v48
	v_mul_f32_e32 v70, v49, v48
	v_sub_f32_e32 v31, v37, v31
	v_sub_f32_e32 v37, v32, v38
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	v_add_f32_e32 v44, v72, v36
	v_add_f32_e32 v30, v30, v69
	v_fma_f32 v34, v49, v48, -v70
	v_add_f32_e32 v31, v58, v31
	v_sub_f32_e32 v29, v29, v37
	v_fmac_f32_e32 v34, v49, v30
	v_add_f32_e32 v30, v43, v42
	v_fmac_f32_e32 v33, v59, v45
	v_add_f32_e32 v49, v55, v44
	v_add_f32_e32 v29, v31, v29
	v_dual_fmac_f32 v34, v51, v48 :: v_dual_sub_f32 v73, v73, v66
	v_add_f32_e32 v39, v40, v30
	v_add_f32_e32 v41, v68, v33
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_sub_f32 v48, v44, v72 :: v_dual_add_f32 v35, v35, v73
	v_sub_f32_e32 v38, v39, v40
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_f32_e32 v40, v41, v68
	v_dual_sub_f32 v36, v36, v48 :: v_dual_fmac_f32 v61, v53, v35
	v_sub_f32_e32 v35, v30, v43
	v_add_f32_e32 v43, v70, v34
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_dual_sub_f32 v30, v30, v38 :: v_dual_sub_f32 v33, v33, v40
	v_sub_f32_e32 v40, v49, v55
	v_sub_f32_e32 v35, v42, v35
	v_add_f32_e32 v42, v50, v41
	v_dual_sub_f32 v46, v43, v70 :: v_dual_add_f32 v47, v52, v43
	v_add_f32_e32 v33, v57, v33
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f32_e32 v35, v60, v35
	v_sub_f32_e32 v37, v42, v50
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_sub_f32_e32 v34, v34, v46
	v_sub_f32_e32 v38, v47, v52
	v_add_f32_e32 v36, v64, v36
	v_dual_add_f32 v30, v35, v30 :: v_dual_sub_f32 v31, v41, v37
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f32_e32 v34, v62, v34
	v_sub_f32_e32 v35, v43, v38
	v_sub_f32_e32 v37, v44, v40
	v_add_f32_e32 v38, v32, v29
	v_dual_add_f32 v40, v39, v30 :: v_dual_add_f32 v31, v33, v31
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_add_f32 v33, v34, v35 :: v_dual_add_f32 v34, v36, v37
	v_dual_sub_f32 v32, v38, v32 :: v_dual_add_f32 v35, v24, v38
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_sub_f32 v36, v40, v39 :: v_dual_add_f32 v37, v25, v40
	v_sub_f32_e32 v29, v29, v32
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_f32_e32 v32, v35, v24
	v_sub_f32_e32 v30, v30, v36
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_f32_e32 v36, v37, v25
	v_sub_f32_e32 v50, v35, v32
	v_sub_f32_e32 v32, v38, v32
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_sub_f32_e32 v52, v37, v36
	v_sub_f32_e32 v36, v40, v36
	v_add_f32_e32 v40, v28, v30
	v_sub_f32_e32 v24, v24, v50
	v_dual_add_f32 v38, v27, v29 :: v_dual_sub_f32 v25, v25, v52
	v_fmac_f32_e32 v61, v56, v66
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_sub_f32_e32 v50, v40, v28
	v_add_f32_e32 v24, v32, v24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_add_f32 v25, v36, v25 :: v_dual_sub_f32 v30, v30, v50
	v_dual_add_f32 v41, v47, v33 :: v_dual_add_f32 v24, v38, v24
	v_sub_f32_e32 v36, v40, v50
	v_add_f32_e32 v43, v49, v34
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_add_f32 v25, v40, v25 :: v_dual_sub_f32 v46, v41, v47
	v_dual_add_f32 v47, v22, v41 :: v_dual_sub_f32 v28, v28, v36
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_sub_f32 v48, v43, v49 :: v_dual_sub_f32 v33, v33, v46
	v_sub_f32_e32 v46, v47, v22
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f32_e32 v28, v30, v28
	v_sub_f32_e32 v34, v34, v48
	v_sub_f32_e32 v48, v38, v27
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_sub_f32_e32 v54, v47, v46
	v_dual_sub_f32 v41, v41, v46 :: v_dual_add_f32 v46, v23, v33
	v_sub_f32_e32 v32, v38, v48
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_sub_f32 v29, v29, v48 :: v_dual_sub_f32 v22, v22, v54
	v_dual_sub_f32 v50, v46, v23 :: v_dual_sub_f32 v27, v27, v32
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f32_e32 v22, v41, v22
	v_dual_sub_f32 v36, v46, v50 :: v_dual_add_f32 v27, v29, v27
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_dual_add_f32 v29, v35, v24 :: v_dual_add_f32 v22, v46, v22
	v_add_f32_e32 v39, v42, v31
	v_sub_f32_e32 v23, v23, v36
	v_sub_f32_e32 v33, v33, v50
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_sub_f32_e32 v42, v39, v42
	v_add_f32_e32 v44, v21, v39
	v_add_f32_e32 v23, v33, v23
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v31, v31, v42 :: v_dual_sub_f32 v42, v44, v21
	v_dual_add_f32 v45, v74, v61 :: v_dual_sub_f32 v52, v44, v42
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_sub_f32 v39, v39, v42 :: v_dual_add_f32 v42, v26, v31
	v_sub_f32_e32 v51, v45, v74
	v_add_f32_e32 v53, v19, v45
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v21, v21, v52 :: v_dual_sub_f32 v48, v42, v26
	v_dual_add_f32 v21, v39, v21 :: v_dual_sub_f32 v32, v42, v48
	v_sub_f32_e32 v31, v31, v48
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f32_e32 v21, v42, v21
	v_sub_f32_e32 v26, v26, v32
	v_sub_f32_e32 v32, v29, v35
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f32_e32 v36, v44, v21
	v_add_f32_e32 v26, v31, v26
	v_add_f32_e32 v30, v37, v25
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_sub_f32_e32 v24, v24, v32
	v_sub_f32_e32 v31, v36, v44
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_sub_f32 v35, v30, v37 :: v_dual_add_f32 v24, v27, v24
	v_sub_f32_e32 v21, v21, v31
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_f32_e32 v25, v25, v35
	v_add_f32_e32 v27, v29, v24
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f32_e32 v21, v26, v21
	v_add_f32_e32 v49, v18, v43
	v_dual_add_f32 v25, v28, v25 :: v_dual_mul_f32 v26, v5, v27
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_sub_f32_e32 v28, v49, v18
	v_add_f32_e32 v37, v47, v22
	v_add_f32_e32 v31, v30, v25
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_class_f32_e64 s7, v26, 0x204
	v_sub_f32_e32 v32, v37, v47
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v22, v22, v32
	v_add_f32_e32 v32, v36, v21
	v_add_f32_e32 v22, v23, v22
	v_sub_f32_e32 v23, v27, v29
	v_dual_sub_f32 v29, v31, v30 :: v_dual_mul_f32 v30, v6, v31
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f32_e32 v33, v37, v22
	v_sub_f32_e32 v23, v24, v23
	v_fma_f32 v24, v5, v27, -v26
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_4)
	v_sub_f32_e32 v25, v25, v29
	v_fma_f32 v27, v6, v31, -v30
	v_sub_f32_e32 v29, v32, v36
	v_mul_f32_e32 v31, v16, v32
	v_sub_f32_e32 v35, v33, v37
	v_dual_fmac_f32 v24, v5, v23 :: v_dual_fmac_f32 v27, v6, v25
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_sub_f32_e32 v5, v21, v29
	v_fma_f32 v6, v16, v32, -v31
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_sub_f32_e32 v21, v22, v35
	v_add_f32_e32 v22, v26, v24
	v_dual_add_f32 v25, v30, v27 :: v_dual_mul_f32 v36, v9, v33
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v6, v16, v5
	v_cndmask_b32_e64 v5, v22, v26, s7
	v_cmp_class_f32_e64 s7, v30, 0x204
	v_sub_f32_e32 v22, v22, v26
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f32_e32 v26, v31, v6
	v_fma_f32 v23, v9, v33, -v36
	v_cndmask_b32_e64 v16, v25, v30, s7
	v_cmp_eq_f32_e64 s7, 0x42b17218, v5
	v_sub_f32_e32 v25, v25, v30
	v_sub_f32_e32 v22, v24, v22
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v29, 0, 0x37000000, s7
	v_cmp_eq_f32_e64 s7, 0x42b17218, v16
	v_sub_f32_e32 v25, v27, v25
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_f32_e32 v30, v5, v29
	v_cndmask_b32_e64 v32, 0, 0x37000000, s7
	v_cmp_class_f32_e64 s7, v31, 0x204
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_mul_f32 v37, 0x3fb8aa3b, v30 :: v_dual_sub_f32 v24, v16, v32
	v_cndmask_b32_e64 v33, v26, v31, s7
	v_sub_f32_e32 v26, v26, v31
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f32 v38, 0x3fb8aa3b, v30, -v37
	v_mul_f32_e32 v27, 0x3fb8aa3b, v24
	s_delay_alu instid0(VALU_DEP_4)
	v_cmp_eq_f32_e64 s7, 0x42b17218, v33
	v_rndne_f32_e32 v39, v37
	v_sub_f32_e32 v6, v6, v26
	v_fmac_f32_e32 v38, 0x32a5705f, v30
	v_fma_f32 v40, 0x3fb8aa3b, v24, -v27
	v_cndmask_b32_e64 v35, 0, 0x37000000, s7
	v_rndne_f32_e32 v41, v27
	v_sub_f32_e32 v37, v37, v39
	v_cmp_neq_f32_e64 s7, 0x7f800000, |v5|
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_dual_fmac_f32 v40, 0x32a5705f, v24 :: v_dual_sub_f32 v31, v33, v35
	v_sub_f32_e32 v27, v27, v41
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f32_e32 v37, v37, v38
	v_cndmask_b32_e64 v5, 0, v22, s7
	v_cmp_neq_f32_e64 s7, 0x7f800000, |v16|
	v_mul_f32_e32 v42, 0x3fb8aa3b, v31
	v_add_f32_e32 v22, v27, v40
	v_exp_f32_e32 v37, v37
	v_cvt_i32_f32_e32 v26, v39
	v_cndmask_b32_e64 v16, 0, v25, s7
	v_fma_f32 v44, 0x3fb8aa3b, v31, -v42
	v_rndne_f32_e32 v46, v42
	v_exp_f32_e32 v22, v22
	v_cmp_neq_f32_e64 s7, 0x7f800000, |v33|
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_add_f32 v5, v29, v5 :: v_dual_fmac_f32 v44, 0x32a5705f, v31
	v_sub_f32_e32 v27, v42, v46
	s_delay_alu instid0(TRANS32_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_ldexp_f32 v26, v37, v26
	v_cndmask_b32_e64 v6, 0, v6, s7
	v_cmp_ngt_f32_e64 s7, 0xc2ce8ed0, v30
	v_add_f32_e32 v16, v32, v16
	v_add_f32_e32 v25, v27, v44
	v_cvt_i32_f32_e32 v27, v41
	v_add_f32_e32 v6, v35, v6
	v_cndmask_b32_e64 v26, 0, v26, s7
	v_cmp_ngt_f32_e64 s7, 0xc2ce8ed0, v24
	v_exp_f32_e32 v25, v25
	v_ldexp_f32 v22, v22, v27
	v_cvt_i32_f32_e32 v27, v46
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e64 v22, 0, v22, s7
	v_cmp_nlt_f32_e64 s7, 0x42b17218, v30
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v25, v25, v27
	v_cndmask_b32_e64 v26, 0x7f800000, v26, s7
	v_cmp_nlt_f32_e64 s7, 0x42b17218, v24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v5, v26, v5, v26
	v_cndmask_b32_e64 v22, 0x7f800000, v22, s7
	v_cmp_ngt_f32_e64 s7, 0xc2ce8ed0, v31
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v16, v22, v16, v22
	v_cndmask_b32_e64 v24, 0, v25, s7
	v_cmp_eq_f32_e64 s7, 0x7f800000, v26
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v5, v5, v26, s7
	v_cmp_nlt_f32_e64 s7, 0x42b17218, v31
	v_bfi_b32 v5, 0x7fffffff, v5, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v24, 0x7f800000, v24, s7
	v_cmp_eq_f32_e64 s7, 0x7f800000, v22
	v_sub_f32_e32 v12, v49, v28
	v_fma_f32 v6, v24, v6, v24
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v16, v16, v22, s7
	v_cmp_class_f32_e64 s7, v7, 0x204
	v_bfi_b32 v13, 0x7fffffff, v16, v13
	v_cndmask_b32_e64 v16, 0x7fc00000, v5, s4
	v_cmp_eq_f32_e64 s4, 0x7f800000, v24
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v22, 0x7fc00000, v13, s5
	v_cndmask_b32_e64 v6, v6, v24, s4
	v_cmp_gt_f32_e64 s4, 0, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_bfi_b32 v6, 0x7fffffff, v6, v14
	v_cndmask_b32_e64 v5, v5, v16, s4
	v_cmp_gt_f32_e64 s4, 0, v1
	v_dual_sub_f32 v16, v53, v19 :: v_dual_add_f32 v19, v15, v34
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v14, 0x7fc00000, v6, s6
	v_cndmask_b32_e32 v5, v5, v17, vcc_lo
	s_delay_alu instid0(VALU_DEP_4)
	v_cndmask_b32_e64 v13, v13, v22, s4
	s_or_b32 vcc_lo, s2, s18
	v_sub_f32_e32 v17, v61, v51
	v_sub_f32_e32 v16, v45, v16
	v_cmp_eq_f32_e64 s2, 1.0, v7
	v_cndmask_b32_e32 v10, v13, v10, vcc_lo
	v_cmp_o_f32_e32 vcc_lo, v2, v2
	v_ldexp_f32 v13, v20, 1
	v_cmp_class_f32_e64 s4, v3, 0x204
	v_dual_cndmask_b32 v2, 0x7fc00000, v5 :: v_dual_sub_f32 v5, v18, v12
	v_mul_f32_e32 v12, 0x3f317218, v11
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_dual_sub_f32 v18, v43, v28 :: v_dual_add_f32 v13, v13, v17
	v_cmp_class_f32_e64 vcc_lo, v36, 0x204
	v_fma_f32 v20, 0x3f317218, v11, -v12
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_add_f32 v5, v18, v5 :: v_dual_sub_f32 v18, v19, v15
	v_dual_fmac_f32 v20, 0xb102e308, v11 :: v_dual_add_f32 v11, v13, v16
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_f32_e32 v16, v19, v18
	v_dual_add_f32 v5, v19, v5 :: v_dual_sub_f32 v18, v34, v18
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_add_f32 v19, v12, v20 :: v_dual_add_f32 v22, v53, v11
	v_sub_f32_e32 v15, v15, v16
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_sub_f32 v12, v19, v12 :: v_dual_fmac_f32 v23, v9, v21
	v_dual_add_f32 v16, v19, v22 :: v_dual_add_f32 v15, v18, v15
	v_sub_f32_e32 v18, v22, v53
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_sub_f32_e32 v12, v20, v12
	v_add_f32_e32 v21, v36, v23
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_sub_f32_e32 v27, v16, v19
	v_sub_f32_e32 v11, v11, v18
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v17, v21, v36 :: v_dual_sub_f32 v18, v22, v27
	v_add_f32_e32 v20, v12, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_cmp_eq_f32_e32 vcc_lo, 0x42b17218, v17
	v_cndmask_b32_e64 v13, 0, 0x37000000, vcc_lo
	v_cmp_gt_f32_e32 vcc_lo, 0, v3
	v_sub_f32_e32 v24, v17, v13
	v_cndmask_b32_e32 v6, v6, v14, vcc_lo
	v_add_f32_e32 v14, v49, v5
	v_cmp_eq_f32_e32 vcc_lo, 0, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mul_f32 v26, 0x3fb8aa3b, v24 :: v_dual_sub_f32 v25, v14, v49
	v_fma_f32 v28, 0x3fb8aa3b, v24, -v26
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_sub_f32_e32 v5, v5, v25
	v_sub_f32_e32 v25, v16, v27
	v_rndne_f32_e32 v27, v26
	v_dual_fmac_f32 v28, 0x32a5705f, v24 :: v_dual_add_f32 v5, v15, v5
	s_delay_alu instid0(VALU_DEP_3)
	v_sub_f32_e32 v15, v19, v25
	v_sub_f32_e32 v25, v20, v12
	v_cndmask_b32_e64 v19, 0x7f800000, 0, vcc_lo
	v_sub_f32_e32 v26, v26, v27
	v_add_f32_e32 v22, v14, v5
	v_add_f32_e32 v15, v18, v15
	v_cndmask_b32_e64 v18, 2.0, 1.0, s2
	v_sub_f32_e32 v11, v11, v25
	s_or_b32 vcc_lo, vcc_lo, s4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_sub_f32 v14, v22, v14 :: v_dual_add_f32 v15, v20, v15
	v_dual_mul_f32 v29, v18, v22 :: v_dual_sub_f32 v20, v20, v25
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_sub_f32 v5, v5, v14 :: v_dual_add_f32 v30, v16, v15
	v_fma_f32 v14, v18, v22, -v29
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_sub_f32_e32 v12, v12, v20
	v_cndmask_b32_e64 v20, 0, v3, s3
	v_add_f32_e32 v22, v26, v28
	v_sub_f32_e32 v16, v30, v16
	v_dual_fmac_f32 v14, v18, v5 :: v_dual_add_f32 v5, v11, v12
	v_cmp_class_f32_e64 s2, v29, 0x204
	v_sub_f32_e32 v12, v21, v36
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_sub_f32_e32 v11, v15, v16
	v_bfi_b32 v15, 0x7fffffff, v19, v20
	v_add_f32_e32 v19, v29, v14
	v_exp_f32_e32 v16, v22
	v_add_f32_e32 v5, v5, v11
	v_sub_f32_e32 v11, v23, v12
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v20, v19, v29, s2
	v_cmp_eq_f32_e64 s2, 1.0, v8
	v_cvt_i32_f32_e32 v12, v27
	v_add_f32_e32 v21, v30, v5
	v_sub_f32_e32 v19, v19, v29
	v_cndmask_b32_e64 v22, 2.0, 1.0, s2
	v_cmp_neq_f32_e64 s2, 0x7f800000, |v17|
	v_ldexp_f32 v12, v16, v12
	v_sub_f32_e32 v16, v21, v30
	v_sub_f32_e32 v14, v14, v19
	v_mul_f32_e32 v17, v22, v21
	v_cndmask_b32_e64 v11, 0, v11, s2
	v_cmp_eq_f32_e64 s2, 0x42b17218, v20
	v_sub_f32_e32 v5, v5, v16
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f32 v16, v22, v21, -v17
	v_add_f32_e32 v11, v13, v11
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v23, 0, 0x37000000, s2
	v_cmp_ngt_f32_e64 s2, 0xc2ce8ed0, v24
	v_fmac_f32_e32 v16, v22, v5
	v_cndmask_b32_e32 v5, v6, v15, vcc_lo
	s_delay_alu instid0(VALU_DEP_4)
	v_sub_f32_e32 v13, v20, v23
	v_cmp_class_f32_e64 vcc_lo, v17, 0x204
	v_cndmask_b32_e64 v12, 0, v12, s2
	v_add_f32_e32 v21, v17, v16
	v_cmp_nlt_f32_e64 s2, 0x42b17218, v24
	v_mul_f32_e32 v6, 0x3fb8aa3b, v13
	v_mul_f32_e32 v24, 0.5, v9
	v_trunc_f32_e32 v15, v9
	v_cndmask_b32_e32 v27, v21, v17, vcc_lo
	v_cndmask_b32_e64 v12, 0x7f800000, v12, s2
	v_fma_f32 v25, 0x3fb8aa3b, v13, -v6
	v_rndne_f32_e32 v26, v6
	v_trunc_f32_e32 v28, v24
	v_cmp_eq_f32_e64 s2, 0x42b17218, v27
	v_fma_f32 v11, v12, v11, v12
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_dual_fmac_f32 v25, 0x32a5705f, v13 :: v_dual_sub_f32 v6, v6, v26
	v_cmp_eq_f32_e32 vcc_lo, v15, v9
	v_cndmask_b32_e64 v9, 0, 0x37000000, s2
	v_cmp_eq_f32_e64 s3, 0x7f800000, v12
	v_cmp_neq_f32_e64 s2, v28, v24
	v_add_f32_e32 v6, v6, v25
	v_sub_f32_e32 v17, v21, v17
	v_cmp_neq_f32_e64 s4, 0x7f800000, |v27|
	v_cndmask_b32_e64 v11, v11, v12, s3
	v_sub_f32_e32 v12, v27, v9
	v_exp_f32_e32 v6, v6
	v_cmp_o_f32_e64 s3, v3, v3
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v15, 1.0, v4, s2
	v_mul_f32_e32 v24, 0x3fb8aa3b, v12
	v_cndmask_b32_e64 v3, 0x7fc00000, v5, s3
	v_cvt_i32_f32_e32 v5, v26
	v_cmp_neq_f32_e64 s3, 0x7f800000, |v20|
	v_bfi_b32 v11, 0x7fffffff, v11, v15
	v_fma_f32 v15, 0x3fb8aa3b, v12, -v24
	v_rndne_f32_e32 v19, v24
	v_ldexp_f32 v5, v6, v5
	v_cndmask_b32_e64 v6, 0, v14, s3
	v_cmp_ngt_f32_e64 s3, 0xc2ce8ed0, v13
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_dual_fmac_f32 v15, 0x32a5705f, v12 :: v_dual_sub_f32 v14, v24, v19
	v_cndmask_b32_e32 v20, 0x7fc00000, v11, vcc_lo
	v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v13
	v_cndmask_b32_e64 v5, 0, v5, s3
	v_add_f32_e32 v6, v23, v6
	v_dual_add_f32 v14, v14, v15 :: v_dual_mul_f32 v13, 0.5, v18
	v_trunc_f32_e32 v15, v18
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_cndmask_b32_e32 v5, 0x7f800000, v5, vcc_lo
	v_cmp_gt_f32_e32 vcc_lo, 0, v4
	v_exp_f32_e32 v14, v14
	v_cvt_i32_f32_e32 v19, v19
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_fma_f32 v6, v5, v6, v5
	v_cndmask_b32_e32 v11, v11, v20, vcc_lo
	v_cmp_eq_f32_e32 vcc_lo, 0x7f800000, v5
	v_trunc_f32_e32 v20, v13
	v_cndmask_b32_e32 v5, v6, v5, vcc_lo
	v_sub_f32_e32 v6, v16, v17
	v_cmp_eq_f32_e32 vcc_lo, v15, v18
	s_delay_alu instid0(VALU_DEP_4)
	v_cmp_neq_f32_e64 s3, v20, v13
	v_ldexp_f32 v14, v14, v19
	v_mul_f32_e32 v15, 0.5, v22
	v_cndmask_b32_e64 v6, 0, v6, s4
	v_cmp_ngt_f32_e64 s4, 0xc2ce8ed0, v12
	s_and_b32 s3, vcc_lo, s3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f32_e32 v6, v9, v6
	v_cndmask_b32_e64 v13, 0, v14, s4
	v_cndmask_b32_e64 v14, 1.0, v7, s3
	v_cmp_nlt_f32_e64 s4, 0x42b17218, v12
	v_trunc_f32_e32 v12, v22
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_bfi_b32 v5, 0x7fffffff, v5, v14
	v_cndmask_b32_e64 v9, 0x7f800000, v13, s4
	v_trunc_f32_e32 v13, v15
	s_delay_alu instid0(VALU_DEP_4)
	v_cmp_eq_f32_e64 s5, v12, v22
	v_cndmask_b32_e64 v12, 0, v4, s2
	v_cmp_gt_f32_e64 s2, 0, v7
	v_fma_f32 v6, v9, v6, v9
	v_cmp_neq_f32_e64 s6, v13, v15
	v_cndmask_b32_e32 v13, 0x7fc00000, v5, vcc_lo
	v_cmp_eq_f32_e32 vcc_lo, 0x7f800000, v9
	v_cmp_eq_f32_e64 s4, 0, v4
	s_delay_alu instid0(VALU_DEP_3)
	v_cndmask_b32_e64 v5, v5, v13, s2
	v_cndmask_b32_e32 v6, v6, v9, vcc_lo
	s_and_b32 vcc_lo, s5, s6
	v_cmp_eq_f32_e64 s2, 0, v7
	v_cndmask_b32_e32 v9, 1.0, v8, vcc_lo
	v_cndmask_b32_e64 v16, 0x7f800000, 0, s4
	v_cndmask_b32_e64 v13, 0, v7, s3
	v_cmp_eq_f32_e64 s3, 0, v8
	v_cmp_class_f32_e64 s6, v4, 0x204
	v_bfi_b32 v6, 0x7fffffff, v6, v9
	v_cndmask_b32_e64 v9, 0x7f800000, 0, s2
	v_bfi_b32 v12, 0x7fffffff, v16, v12
	v_cndmask_b32_e32 v16, 0, v8, vcc_lo
	v_cmp_gt_f32_e32 vcc_lo, 0, v8
	v_cndmask_b32_e64 v14, 0x7fc00000, v6, s5
	v_cndmask_b32_e64 v15, 0x7f800000, 0, s3
	v_bfi_b32 v9, 0x7fffffff, v9, v13
	v_cmp_class_f32_e64 s5, v8, 0x204
	s_delay_alu instid0(VALU_DEP_4)
	v_cndmask_b32_e32 v6, v6, v14, vcc_lo
	s_or_b32 vcc_lo, s4, s6
	v_bfi_b32 v13, 0x7fffffff, v15, v16
	v_cndmask_b32_e32 v11, v11, v12, vcc_lo
	s_or_b32 vcc_lo, s2, s7
	v_cndmask_b32_e32 v5, v5, v9, vcc_lo
	s_or_b32 vcc_lo, s3, s5
	v_cndmask_b32_e32 v6, v6, v13, vcc_lo
	v_cmp_o_f32_e32 vcc_lo, v4, v4
	v_cndmask_b32_e32 v4, 0x7fc00000, v11, vcc_lo
	v_cmp_o_f32_e32 vcc_lo, v7, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_add_f32_e32 v3, v3, v4
	v_cndmask_b32_e32 v5, 0x7fc00000, v5, vcc_lo
	v_cmp_o_f32_e32 vcc_lo, v8, v8
	v_add_f32_e32 v4, v5, v4
	v_cndmask_b32_e32 v6, 0x7fc00000, v6, vcc_lo
	v_cmp_o_f32_e32 vcc_lo, v1, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f32_e32 v5, v2, v6
	v_cndmask_b32_e32 v1, 0x7fc00000, v10, vcc_lo
	v_add_f32_e32 v1, v2, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_min3_f32 v2, v5, v4, v3
	v_cmp_nge_f32_e32 vcc_lo, 0x396bedfa, v1
	v_cndmask_b32_e64 v1, 0x3cf5c28f, 0, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_nge_f32_e32 vcc_lo, 0x37d1b717, v2
	v_cndmask_b32_e32 v10, 0x3d4ccccd, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v1, 1.0, v10
	v_mul_f32_e32 v2, 0x4f800000, v1
	v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v1, v1, v2, vcc_lo
	v_sqrt_f32_e32 v2, v1
	s_waitcnt_depctr 0xfff
	v_add_nc_u32_e32 v3, -1, v2
	v_add_nc_u32_e32 v4, 1, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v5, -v3, v2, v1
	v_fma_f32 v6, -v4, v2, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ge_f32_e64 s2, 0, v5
	v_cndmask_b32_e64 v2, v2, v3, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_lt_f32_e64 s2, 0, v6
	v_cndmask_b32_e64 v2, v2, v4, s2
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, dt@rel32@lo+4
	s_addc_u32 s3, s3, dt@rel32@hi+12
	s_load_b32 s4, s[2:3], 0x0
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, hx@rel32@lo+4
	s_addc_u32 s3, s3, hx@rel32@hi+12
	v_mul_f32_e32 v3, 0x37800000, v2
	s_load_b32 s2, s[2:3], 0x0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v2, v2, v3, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v1, 0x260
	v_cndmask_b32_e32 v1, v2, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v11, 0x44bb8000, v1
	s_waitcnt lgkmcnt(0)
	v_mul_f32_e32 v1, s4, v11
	s_load_b256 s[4:11], s[0:1], 0x20
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_scale_f32 v2, null, s2, s2, v1
	v_rcp_f32_e32 v3, v2
	s_waitcnt_depctr 0xfff
	v_fma_f32 v4, -v2, v3, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v3, v4, v3
	v_div_scale_f32 v4, vcc_lo, v1, s2, v1
	v_mul_f32_e32 v5, v4, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v6, -v2, v5, v4
	v_fmac_f32_e32 v5, v6, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v2, -v2, v5, v4
	v_div_fmas_f32 v2, v2, v3, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f32 v12, v2, s2, v1
	v_frexp_mant_f32_e64 v1, |v12|
	v_cmp_eq_f32_e64 s0, 0, v12
	v_cmp_class_f32_e64 s1, v12, 0x204
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f32_e32 vcc_lo, 0x3f2aaaab, v1
	v_cndmask_b32_e64 v2, 0, 1, vcc_lo
	v_ldexp_f32 v1, v1, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f32_e32 v2, 1.0, v1
	v_add_f32_e32 v4, -1.0, v1
	v_rcp_f32_e32 v3, v2
	v_add_f32_e32 v6, -1.0, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v1, v1, v6
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v5, v4, v3
	v_mul_f32_e32 v7, v2, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v2, v5, v2, -v7
	v_fmac_f32_e32 v2, v5, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v1, v7, v2
	v_dual_sub_f32 v6, v4, v1 :: v_dual_sub_f32 v7, v1, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v4, v4, v6
	v_dual_sub_f32 v2, v7, v2 :: v_dual_sub_f32 v1, v4, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v1, v2, v1
	v_add_f32_e32 v1, v6, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v1, v3, v1
	v_add_f32_e32 v2, v5, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v3, v2, v5
	v_dual_mul_f32 v4, v2, v2 :: v_dual_sub_f32 v1, v1, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v3, v2, v2, -v4
	v_add_f32_e32 v5, v1, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v3, v2, v5
	v_add_f32_e32 v5, v4, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmaak_f32 v6, s16, v5, 0x3e91f4c4
	v_dual_sub_f32 v4, v5, v4 :: v_dual_mul_f32 v9, v2, v5
	v_dual_fmaak_f32 v6, v5, v6, 0x3ecccdef :: v_dual_sub_f32 v3, v3, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v13, v5, v2, -v9
	v_mul_f32_e32 v7, v5, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v13, v5, v1
	v_ldexp_f32 v1, v1, 1
	v_fma_f32 v4, v5, v6, -v7
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v13, v3, v2
	v_ldexp_f32 v2, v2, 1
	v_dual_fmac_f32 v4, v3, v6 :: v_dual_add_f32 v5, v9, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v6, v7, v4
	v_dual_sub_f32 v7, v6, v7 :: v_dual_add_f32 v8, 0x3f2aaaaa, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v4, v4, v7 :: v_dual_add_f32 v7, 0xbf2aaaaa, v8
	v_add_f32_e32 v4, 0x31739010, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v6, v6, v7
	v_add_f32_e32 v4, v4, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v3, v8, v4
	v_sub_f32_e32 v6, v8, v3
	v_mul_f32_e32 v7, v5, v3
	v_sub_f32_e32 v8, v5, v9
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f32_e32 v4, v4, v6
	v_fma_f32 v6, v5, v3, -v7
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v8, v13, v8
	v_fmac_f32_e32 v6, v5, v4
	v_frexp_exp_i32_f32_e32 v4, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v6, v8, v3
	v_subrev_co_ci_u32_e32 v3, vcc_lo, 0, v4, vcc_lo
	v_cmp_eq_f32_e32 vcc_lo, 1.0, v12
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f32_e32 v4, v7, v6
	v_cvt_f32_i32_e32 v3, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f32_e32 v5, v2, v4
	v_sub_f32_e32 v7, v4, v7
	v_mul_f32_e32 v8, 0x3f317218, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_f32_e32 v2, v5, v2
	v_sub_f32_e32 v6, v6, v7
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f32 v7, 0x3f317218, v3, -v8
	v_sub_f32_e32 v2, v4, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f32_e32 v1, v1, v6
	v_fmac_f32_e32 v7, 0xb102e308, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_add_f32 v1, v1, v2 :: v_dual_add_f32 v2, v8, v7
	v_dual_add_f32 v3, v5, v1 :: v_dual_sub_f32 v8, v2, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_add_f32 v4, v2, v3 :: v_dual_sub_f32 v5, v3, v5
	v_dual_sub_f32 v7, v7, v8 :: v_dual_sub_f32 v6, v4, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v1, v1, v5
	v_sub_f32_e32 v9, v4, v6
	v_sub_f32_e32 v3, v3, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f32_e32 v5, v7, v1
	v_sub_f32_e32 v2, v2, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_add_f32 v2, v3, v2 :: v_dual_sub_f32 v3, v5, v7
	v_add_f32_e32 v2, v5, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v5, v5, v3
	v_dual_sub_f32 v1, v1, v3 :: v_dual_add_f32 v6, v4, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v3, v7, v5 :: v_dual_sub_f32 v4, v6, v4
	v_add_f32_e32 v1, v1, v3
	v_cndmask_b32_e64 v3, 2.0, 1.0, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v2, v2, v4
	v_add_f32_e32 v1, v1, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v2, v6, v1
	v_sub_f32_e32 v4, v2, v6
	v_mul_f32_e32 v5, v3, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v1, v1, v4
	v_fma_f32 v2, v3, v2, -v5
	v_cmp_class_f32_e64 vcc_lo, v5, 0x204
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v2, v3, v1
	v_add_f32_e32 v1, v5, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v4, v1, v5, vcc_lo
	v_sub_f32_e32 v1, v1, v5
	v_cmp_eq_f32_e32 vcc_lo, 0x42b17218, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v1, v2, v1
	v_cndmask_b32_e64 v6, 0, 0x37000000, vcc_lo
	v_cmp_neq_f32_e64 vcc_lo, 0x7f800000, |v4|
	v_sub_f32_e32 v7, v4, v6
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v1, 0, v1, vcc_lo
	v_trunc_f32_e32 v4, v3
	v_mul_f32_e32 v8, 0x3fb8aa3b, v7
	v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v7
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f32_e32 v1, v6, v1
	v_fma_f32 v9, 0x3fb8aa3b, v7, -v8
	v_rndne_f32_e32 v13, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_fmac_f32 v9, 0x32a5705f, v7 :: v_dual_sub_f32 v8, v8, v13
	v_cvt_i32_f32_e32 v5, v13
	v_add_f32_e32 v8, v8, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_exp_f32_e32 v8, v8
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v2, v8, v5
	v_dual_mul_f32 v5, 0.5, v3 :: v_dual_cndmask_b32 v2, 0, v2
	v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_trunc_f32_e32 v8, v5
	v_cndmask_b32_e32 v2, 0x7f800000, v2, vcc_lo
	v_cmp_eq_f32_e32 vcc_lo, v4, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_cmp_neq_f32_e64 s2, v8, v5
	v_cndmask_b32_e64 v5, 0x7f800000, 0, s0
	v_fma_f32 v1, v2, v1, v2
	v_cmp_eq_f32_e64 s3, 0x7f800000, v2
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, vcc_lo, s2
	v_cndmask_b32_e64 v3, 1.0, v12, s2
	v_cndmask_b32_e64 v6, 0, v12, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v2, v1, v2, s3
	v_ashrrev_i32_e32 v1, 31, v0
	v_bfi_b32 v6, 0x7fffffff, v5, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_bfi_b32 v4, 0x7fffffff, v2, v3
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v7, 0x7fc00000, v4, vcc_lo
	v_add_co_u32 v2, vcc_lo, s12, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e32 v3, vcc_lo, s13, v1, vcc_lo
	v_cmp_gt_f32_e32 vcc_lo, 0, v12
	v_cndmask_b32_e32 v7, v4, v7, vcc_lo
	v_add_co_u32 v4, vcc_lo, s14, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s15, v1, vcc_lo
	s_or_b32 vcc_lo, s0, s1
	s_delay_alu instid0(VALU_DEP_3)
	v_cndmask_b32_e32 v8, v7, v6, vcc_lo
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v6, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v1, vcc_lo
	v_cmp_o_f32_e32 vcc_lo, v12, v12
	v_cndmask_b32_e32 v13, 0x7fc00000, v8, vcc_lo
	v_add_co_u32 v8, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v9, vcc_lo, s7, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s8, v0
	s_delay_alu instid0(VALU_DEP_4)
	v_fma_f32 v14, v13, -4.0, 2.0
	v_add_co_ci_u32_e32 v1, vcc_lo, s9, v1, vcc_lo
	global_store_b32 v[2:3], v10, off
	global_store_b32 v[4:5], v11, off
	global_store_b32 v[6:7], v12, off
	global_store_b32 v[8:9], v13, off
	global_store_b32 v[0:1], v14, off
.LBB0_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11field_setupPfS_S_S_S_S_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 312
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 80
		.amdhsa_next_free_sgpr 19
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z11field_setupPfS_S_S_S_S_S_, .Lfunc_end0-_Z11field_setupPfS_S_S_S_S_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 7636
; NumSgprs: 21
; NumVgprs: 80
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 9
; NumSGPRsForWavesPerEU: 21
; NumVGPRsForWavesPerEU: 80
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z11propagationiiiiPfS_S_S_S_i ; -- Begin function _Z11propagationiiiiPfS_S_S_S_i
	.globl	_Z11propagationiiiiPfS_S_S_S_i
	.p2align	8
	.type	_Z11propagationiiiiPfS_S_S_S_i,@function
_Z11propagationiiiiPfS_S_S_S_i:         ; @_Z11propagationiiiiPfS_S_S_S_i
; %bb.0:
	s_load_b32 s2, s[0:1], 0x4c
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v5, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[0:1], null, s14, s2, v[2:3]
	v_mad_u64_u32 v[3:4], null, s15, s3, v[5:6]
	s_mov_b32 s2, exec_lo
	v_max_i32_e32 v1, v0, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e32 0xc9, v1
	s_cbranch_execz .LBB1_20
; %bb.1:
	s_clause 0x3
	s_load_b128 s[12:15], s[0:1], 0x0
	s_load_b32 s2, s[0:1], 0x38
	s_load_b64 s[16:17], s[0:1], 0x30
	s_load_b256 s[4:11], s[0:1], 0x10
	v_add_nc_u32_e32 v12, 1, v3
	v_mul_lo_u32 v14, 0xc9, v3
	s_mov_b32 s1, 0
                                        ; implicit-def: $vgpr16
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v1, v14, v0
	s_waitcnt lgkmcnt(0)
	v_cmp_le_i32_e32 vcc_lo, s12, v12
	v_cmp_gt_i32_e64 s0, s13, v3
	s_mul_i32 s12, s2, 0x9dd1
	s_and_b32 s0, s0, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s3, s0, -1
	s_and_saveexec_b32 s13, s0
; %bb.2:
	v_add_nc_u32_e32 v16, 1, v0
	v_cmp_le_i32_e64 s0, s15, v0
	s_mov_b32 s1, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e32 vcc_lo, s14, v16
	s_or_b32 s0, s0, vcc_lo
	s_cmp_gt_i32 s2, 23
	s_cselect_b32 s14, -1, 0
	s_and_not1_b32 s3, s3, exec_lo
	s_or_b32 s0, s14, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, s0, exec_lo
	s_or_b32 s3, s3, s0
; %bb.3:                                ; %Flow313
	s_or_b32 exec_lo, exec_lo, s13
	v_add_nc_u32_e32 v4, s12, v1
	v_ashrrev_i32_e32 v2, 31, v1
	v_add_nc_u32_e32 v6, s12, v0
                                        ; implicit-def: $vgpr10
                                        ; implicit-def: $vgpr7
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_ashrrev_i32_e32 v5, 31, v4
	s_and_saveexec_b32 s0, s3
	s_xor_b32 s0, exec_lo, s0
	s_cbranch_execz .LBB1_5
; %bb.4:
	v_add_nc_u32_e32 v8, v6, v14
	v_lshlrev_b64 v[21:22], 2, v[1:2]
	s_and_not1_b32 s1, s1, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v7, 1, v8
	v_add_nc_u32_e32 v17, -1, v8
	v_add_nc_u32_e32 v19, 0xffffff37, v8
	v_ashrrev_i32_e32 v8, 31, v7
	v_mad_u64_u32 v[9:10], null, 0xc9, v12, v[6:7]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_ashrrev_i32_e32 v18, 31, v17
	v_ashrrev_i32_e32 v20, 31, v19
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[7:8], 2, v[7:8]
	v_lshlrev_b64 v[17:18], 2, v[17:18]
	v_ashrrev_i32_e32 v10, 31, v9
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_lshlrev_b64 v[19:20], 2, v[19:20]
	v_add_co_u32 v7, vcc_lo, s16, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s17, v8, vcc_lo
	v_add_co_u32 v17, vcc_lo, s16, v17
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	v_add_co_ci_u32_e32 v18, vcc_lo, s17, v18, vcc_lo
	v_add_co_u32 v19, vcc_lo, s16, v19
	v_add_co_ci_u32_e32 v20, vcc_lo, s17, v20, vcc_lo
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_u32 v9, vcc_lo, s16, v9
	v_add_co_ci_u32_e32 v10, vcc_lo, s17, v10, vcc_lo
	s_clause 0x3
	global_load_b32 v11, v[7:8], off
	global_load_b32 v13, v[17:18], off
	global_load_b32 v15, v[19:20], off
	global_load_b32 v17, v[9:10], off
	v_add_co_u32 v23, vcc_lo, s8, v21
	v_lshlrev_b64 v[7:8], 2, v[4:5]
	v_add_co_ci_u32_e32 v24, vcc_lo, s9, v22, vcc_lo
	v_add_co_u32 v9, vcc_lo, s10, v21
	v_add_co_ci_u32_e32 v10, vcc_lo, s11, v22, vcc_lo
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_u32 v7, vcc_lo, s16, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s17, v8, vcc_lo
	global_load_b32 v18, v[23:24], off
	global_load_b32 v9, v[9:10], off
	global_load_b32 v7, v[7:8], off
	s_waitcnt vmcnt(5)
	v_add_f32_e32 v8, v11, v13
	s_waitcnt vmcnt(4)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f32_e32 v8, v8, v15
	s_waitcnt vmcnt(3)
	v_add_f32_e32 v8, v8, v17
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mul_f32 v10, v18, v8 :: v_dual_mul_f32 v7, v9, v7
.LBB1_5:                                ; %Flow314
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s13, s1
	s_cbranch_execz .LBB1_12
; %bb.6:
	v_lshlrev_b64 v[7:8], 2, v[1:2]
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, dt@rel32@lo+4
	s_addc_u32 s1, s1, dt@rel32@hi+12
	s_getpc_b64 s[14:15]
	s_add_u32 s14, s14, tt@rel32@lo+4
	s_addc_u32 s15, s15, tt@rel32@hi+12
	v_add_co_u32 v9, vcc_lo, s4, v7
	v_add_co_ci_u32_e32 v10, vcc_lo, s5, v8, vcc_lo
	s_load_b32 s5, s[0:1], 0x0
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, omegac@rel32@lo+4
	s_addc_u32 s1, s1, omegac@rel32@hi+12
	global_load_b32 v10, v[9:10], off
	s_load_b32 s3, s[14:15], 0x0
	s_load_b32 s0, s[0:1], 0x0
	v_cvt_f32_i32_e32 v9, s2
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v11, s5, v9, -s3
	v_mul_f32_e32 v9, s0, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cmp_ngt_f32_e64 s1, 0x48000000, |v9|
	v_readfirstlane_b32 s0, v9
	s_and_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccz .LBB1_8
; %bb.7:
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_bitset0_b32 s0, 31
	s_and_b32 s1, s0, 0x7fffff
	s_lshr_b32 s0, s0, 23
	s_bitset1_b32 s1, 23
	s_addk_i32 s0, 0xff88
	s_mul_hi_u32 s2, s1, 0xfe5163ab
	s_mul_i32 s3, s1, 0x3c439041
	s_mul_hi_u32 s4, s1, 0x3c439041
	s_add_u32 s2, s2, s3
	s_addc_u32 s3, 0, s4
	s_mul_i32 s4, s1, 0xdb629599
	s_mul_hi_u32 s14, s1, 0xdb629599
	s_add_u32 s3, s3, s4
	s_addc_u32 s4, 0, s14
	s_mul_i32 s14, s1, 0xf534ddc0
	s_mul_hi_u32 s15, s1, 0xf534ddc0
	s_add_u32 s4, s4, s14
	s_addc_u32 s14, 0, s15
	s_mul_i32 s15, s1, 0xfc2757d1
	s_mul_hi_u32 s18, s1, 0xfc2757d1
	s_add_u32 s14, s14, s15
	s_addc_u32 s15, 0, s18
	s_mul_i32 s18, s1, 0x4e441529
	s_mul_hi_u32 s19, s1, 0x4e441529
	s_add_u32 s15, s15, s18
	s_addc_u32 s18, 0, s19
	s_cmp_gt_u32 s0, 63
	s_mul_i32 s19, s1, 0xfe5163ab
	s_mul_hi_u32 s20, s1, 0xa2f9836e
	s_mul_i32 s1, s1, 0xa2f9836e
	s_cselect_b32 s21, s3, s14
	s_cselect_b32 s2, s2, s4
	s_cselect_b32 s3, s19, s3
	s_add_u32 s1, s18, s1
	s_addc_u32 s18, 0, s20
	s_cmp_gt_u32 s0, 63
	s_cselect_b32 s19, 0xffffffc0, 0
	s_cselect_b32 s4, s4, s15
	s_cselect_b32 s1, s14, s1
	s_cselect_b32 s14, s15, s18
	s_add_i32 s19, s19, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_gt_u32 s19, 31
	s_cselect_b32 s0, 0xffffffe0, 0
	s_cselect_b32 s15, s4, s1
	s_cselect_b32 s1, s1, s14
	s_cselect_b32 s4, s21, s4
	s_cselect_b32 s14, s2, s21
	s_cselect_b32 s2, s3, s2
	s_add_i32 s0, s0, s19
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_gt_u32 s0, 31
	s_cselect_b32 s3, 0xffffffe0, 0
	s_cselect_b32 s1, s15, s1
	s_cselect_b32 s15, s4, s15
	s_cselect_b32 s4, s14, s4
	s_cselect_b32 s2, s2, s14
	s_add_i32 s3, s3, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	s_sub_i32 s0, 32, s3
	s_cmp_eq_u32 s3, 0
	v_mov_b32_e32 v13, s0
	s_cselect_b32 s3, -1, 0
	v_alignbit_b32 v15, s1, s15, v13
	v_alignbit_b32 v17, s15, s4, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s0, v15
	v_cndmask_b32_e64 v15, v17, s15, s3
	s_delay_alu instid0(VALU_DEP_2)
	s_cselect_b32 s0, s1, s0
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_alignbit_b32 v17, s0, v15, 30
	s_bfe_u32 s1, s0, 0x1001d
	s_delay_alu instid0(SALU_CYCLE_1)
	s_sub_i32 s14, 0, s1
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_xor_b32_e32 v17, s14, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_clz_i32_u32_e32 v18, v17
	v_min_u32_e32 v18, 32, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v20, 23, v18
	v_alignbit_b32 v13, s4, s2, v13
	v_sub_nc_u32_e32 v19, 31, v18
	v_cndmask_b32_e64 v13, v13, s4, s3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_alignbit_b32 v15, v15, v13, 30
	v_alignbit_b32 v13, v13, s2, 30
	s_lshr_b32 s2, s0, 29
	s_lshl_b32 s2, s2, 31
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v15, s14, v15
	v_xor_b32_e32 v13, s14, v13
	s_or_b32 s3, s2, 0.5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_nc_u32_e32 v20, s3, v20
	v_alignbit_b32 v17, v17, v15, v19
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_alignbit_b32 v13, v15, v13, v19
	v_alignbit_b32 v15, v17, v13, 9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_clz_i32_u32_e32 v19, v15
	v_min_u32_e32 v19, 32, v19
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v21, 31, v19
	v_alignbit_b32 v13, v15, v13, v21
	v_lshrrev_b32_e32 v15, 9, v17
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshrrev_b32_e32 v13, 9, v13
	v_or_b32_e32 v15, v15, v20
	v_add_nc_u32_e32 v18, v19, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v17, 23, v18
	v_sub_nc_u32_e32 v13, v13, v17
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v17, 0x3fc90fda, v15
	v_add_nc_u32_e32 v13, 0x33000000, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v18, 0x3fc90fda, v15, -v17
	v_or_b32_e32 v13, s2, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_fmamk_f32 v15, v15, 0x33a22168, v18
	s_lshr_b32 s2, s0, 30
	s_mov_b32 s0, 0
	s_add_i32 s1, s1, s2
	v_fmac_f32_e32 v15, 0x3fc90fda, v13
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f32_e32 v13, v17, v15
	s_branch .LBB1_9
.LBB1_8:
	s_mov_b32 s0, -1
                                        ; implicit-def: $sgpr1
                                        ; implicit-def: $vgpr13
.LBB1_9:                                ; %Flow312
	v_mov_b32_e32 v15, s1
	s_and_not1_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccnz .LBB1_11
; %bb.10:
	v_mul_f32_e64 v13, 0x3f22f983, |v9|
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f32_e32 v15, v13
	v_fma_f32 v13, 0xbfc90fda, v15, |v9|
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmamk_f32 v13, v15, 0xb3a22168, v13
	v_fmamk_f32 v13, v15, 0xa7c234c4, v13
	v_cvt_i32_f32_e32 v15, v15
.LBB1_11:                               ; %_ZL4cosff.exit
	s_waitcnt vmcnt(0)
	v_frexp_mant_f32_e64 v17, |v10|
	v_cmp_eq_f32_e64 s0, 1.0, v10
	v_frexp_mant_f32_e64 v20, |s5|
	v_frexp_mant_f32_e64 v23, |v11|
	v_frexp_exp_i32_f32_e32 v19, v10
	v_cmp_gt_f32_e32 vcc_lo, 0x3f2aaaab, v17
	v_frexp_exp_i32_f32_e32 v24, v11
	v_frexp_exp_i32_f32_e32 v22, s5
	v_cmp_gt_f32_e64 s1, 0x3f2aaaab, v23
	s_getpc_b64 s[14:15]
	s_add_u32 s14, s14, tao@rel32@lo+4
	s_addc_u32 s15, s15, tao@rel32@hi+12
	v_cndmask_b32_e64 v18, 0, 1, vcc_lo
	v_subrev_co_ci_u32_e32 v19, vcc_lo, 0, v19, vcc_lo
	v_cndmask_b32_e64 v27, 0, 1, s1
	v_subrev_co_ci_u32_e64 v24, vcc_lo, 0, v24, s1
	s_delay_alu instid0(VALU_DEP_4)
	v_ldexp_f32 v18, v17, v18
	v_cndmask_b32_e64 v17, 2.0, 1.0, s0
	v_cmp_gt_f32_e64 s0, 0x3f2aaaab, v20
	v_ldexp_f32 v23, v23, v27
	v_cvt_f32_i32_e32 v19, v19
	v_add_f32_e32 v28, -1.0, v18
	v_add_f32_e32 v21, 1.0, v18
	v_cndmask_b32_e64 v26, 0, 1, s0
	v_subrev_co_ci_u32_e64 v22, vcc_lo, 0, v22, s0
	s_load_b32 s14, s[14:15], 0x0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_rcp_f32_e32 v25, v21
	v_ldexp_f32 v20, v20, v26
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_cvt_f32_i32_e32 v22, v22
	v_add_f32_e32 v31, -1.0, v23
	s_mov_b32 s2, 0x3e76c4e1
	v_add_f32_e32 v32, 1.0, v23
	v_add_f32_e32 v30, 1.0, v20
	v_dual_mul_f32 v36, 0x3f317218, v22 :: v_dual_add_f32 v37, -1.0, v32
	s_delay_alu instid0(TRANS32_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_mul_f32_e32 v26, v28, v25
	v_add_f32_e32 v27, -1.0, v21
	v_rcp_f32_e32 v35, v30
	v_rcp_f32_e32 v38, v32
	v_sub_f32_e32 v23, v23, v37
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_mul_f32 v29, v21, v26 :: v_dual_sub_f32 v18, v18, v27
	v_add_f32_e32 v27, -1.0, v20
	v_fma_f32 v21, v26, v21, -v29
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v21, v26, v18
	v_cvt_f32_i32_e32 v18, v24
	v_dual_mul_f32 v24, 0x3f317218, v19 :: v_dual_add_f32 v33, -1.0, v30
	v_add_f32_e32 v34, v29, v21
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f32_e32 v40, 0x3f317218, v18
	v_fma_f32 v41, 0x3f317218, v19, -v24
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_sub_f32_e32 v33, v20, v33
	v_dual_sub_f32 v39, v28, v34 :: v_dual_sub_f32 v20, v34, v29
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_fmac_f32_e32 v41, 0xb102e308, v19
	v_fma_f32 v29, 0x3f317218, v22, -v36
	v_fma_f32 v37, 0x3f317218, v18, -v40
	v_sub_f32_e32 v28, v28, v39
	v_sub_f32_e32 v20, v20, v21
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_dual_sub_f32 v21, v28, v34 :: v_dual_mul_f32 v34, v27, v35
	s_waitcnt lgkmcnt(0)
	v_frexp_mant_f32_e64 v28, |s14|
	v_dual_add_f32 v19, v20, v21 :: v_dual_mul_f32 v42, v30, v34
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_f32_e32 vcc_lo, 0x3f2aaaab, v28
	v_add_f32_e32 v19, v39, v19
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_mul_f32_e32 v19, v25, v19
	v_add_f32_e32 v39, v24, v41
	v_fmac_f32_e32 v37, 0xb102e308, v18
	v_fma_f32 v25, v34, v30, -v42
	v_dual_sub_f32 v24, v39, v24 :: v_dual_fmac_f32 v29, 0xb102e308, v22
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_dual_add_f32 v20, v40, v37 :: v_dual_mul_f32 v21, v31, v38
	v_cndmask_b32_e64 v22, 0, 1, vcc_lo
	v_fmac_f32_e32 v25, v34, v33
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f32_e32 v18, v36, v29
	v_sub_f32_e32 v24, v41, v24
	v_ldexp_f32 v22, v28, v22
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_dual_mul_f32 v43, v32, v21 :: v_dual_sub_f32 v30, v18, v36
	v_sub_f32_e32 v36, v20, v40
	v_add_f32_e32 v28, v26, v19
	v_add_f32_e32 v40, -1.0, v22
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_fma_f32 v32, v21, v32, -v43
	v_dual_add_f32 v44, 1.0, v22 :: v_dual_add_f32 v45, v42, v25
	v_sub_f32_e32 v26, v28, v26
	v_sub_f32_e32 v36, v37, v36
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_dual_fmac_f32 v32, v21, v23 :: v_dual_mul_f32 v23, v28, v28
	v_rcp_f32_e32 v33, v44
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_sub_f32 v26, v19, v26 :: v_dual_add_f32 v19, -1.0, v44
	v_add_f32_e32 v48, v43, v32
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f32 v46, v28, v28, -v23
	v_add_f32_e32 v47, v26, v26
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_dual_sub_f32 v19, v22, v19 :: v_dual_sub_f32 v22, v45, v42
	v_dual_sub_f32 v42, v27, v45 :: v_dual_sub_f32 v43, v48, v43
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(TRANS32_DEP_1)
	v_dual_fmac_f32 v46, v28, v47 :: v_dual_sub_f32 v47, v31, v48
	v_mul_f32_e32 v49, v40, v33
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_sub_f32 v27, v27, v42 :: v_dual_sub_f32 v22, v22, v25
	v_add_f32_e32 v50, v23, v46
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_sub_f32_e32 v25, v31, v47
	v_dual_mul_f32 v31, v44, v49 :: v_dual_sub_f32 v32, v43, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v44, v49, v44, -v31
	v_dual_sub_f32 v27, v27, v45 :: v_dual_fmac_f32 v44, v49, v19
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_fmaak_f32 v43, s2, v50, 0x3e91f4c4 :: v_dual_add_f32 v22, v22, v27
	v_sub_f32_e32 v25, v25, v48
	v_dual_add_f32 v27, v31, v44 :: v_dual_add_f32 v22, v42, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_fmaak_f32 v41, v50, v43, 0x3ecccdef :: v_dual_mul_f32 v22, v35, v22
	v_sub_f32_e32 v19, v50, v23
	v_mul_f32_e32 v23, v50, v41
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_dual_add_f32 v25, v32, v25 :: v_dual_sub_f32 v32, v46, v19
	v_dual_sub_f32 v19, v29, v30 :: v_dual_sub_f32 v30, v27, v31
	v_fma_f32 v42, v50, v41, -v23
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f32_e32 v25, v47, v25
	v_add_f32_e32 v31, v34, v22
	v_dual_sub_f32 v29, v40, v27 :: v_dual_sub_f32 v30, v30, v44
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v42, v32, v41
	v_dual_mul_f32 v25, v38, v25 :: v_dual_sub_f32 v34, v31, v34
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_sub_f32_e32 v38, v40, v29
	v_ldexp_f32 v41, v28, 1
	v_add_f32_e32 v40, v23, v42
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v22, v22, v34 :: v_dual_sub_f32 v23, v40, v23
	v_dual_add_f32 v44, 0x3f2aaaaa, v40 :: v_dual_sub_f32 v23, v42, v23
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_dual_add_f32 v42, 0xbf2aaaaa, v44 :: v_dual_add_f32 v35, v21, v25
	v_mul_f32_e32 v43, v31, v31
	v_ldexp_f32 v46, v31, 1
	v_sub_f32_e32 v40, v40, v42
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_dual_mul_f32 v45, v28, v50 :: v_dual_mul_f32 v48, v35, v35
	v_fma_f32 v34, v31, v31, -v43
	v_ldexp_f32 v51, v35, 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v47, v50, v28, -v45
	v_fmac_f32_e32 v47, v50, v26
	v_ldexp_f32 v26, v26, 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_dual_fmac_f32 v47, v32, v28 :: v_dual_add_f32 v32, v22, v22
	v_sub_f32_e32 v27, v38, v27
	v_ldexp_f32 v38, v22, 1
	v_dual_fmac_f32 v34, v31, v32 :: v_dual_add_f32 v27, v30, v27
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f32_e32 v30, v45, v47
	v_add_f32_e32 v23, 0x31739010, v23
	v_add_f32_e32 v23, v23, v40
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v21, v35, v21 :: v_dual_add_f32 v28, v44, v23
	v_sub_f32_e32 v21, v25, v21
	v_fma_f32 v25, v35, v35, -v48
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_f32_e32 v40, v44, v28
	v_add_f32_e32 v44, v21, v21
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v25, v35, v44
	v_dual_add_f32 v32, v48, v25 :: v_dual_add_f32 v23, v23, v40
	v_dual_mul_f32 v42, v30, v28 :: v_dual_add_f32 v27, v29, v27
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_sub_f32 v29, v30, v45 :: v_dual_fmaak_f32 v44, s2, v32, 0x3e91f4c4
	v_fma_f32 v40, v30, v28, -v42
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v40, v30, v23 :: v_dual_sub_f32 v29, v47, v29
	v_fmac_f32_e32 v40, v29, v28
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v45, v42, v40
	v_dual_add_f32 v23, v43, v34 :: v_dual_add_f32 v52, v41, v45
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_fmaak_f32 v28, s2, v23, 0x3e91f4c4
	v_mul_f32_e32 v27, v33, v27
	v_dual_sub_f32 v42, v45, v42 :: v_dual_sub_f32 v29, v23, v43
	v_ldexp_f32 v30, v21, 1
	v_dual_fmaak_f32 v28, v23, v28, 0x3ecccdef :: v_dual_add_f32 v33, v49, v27
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_dual_sub_f32 v40, v40, v42 :: v_dual_mul_f32 v43, v31, v23
	v_dual_fmaak_f32 v42, v32, v44, 0x3ecccdef :: v_dual_sub_f32 v29, v34, v29
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f32_e32 v50, v33, v33
	v_add_f32_e32 v26, v26, v40
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_fma_f32 v34, v23, v31, -v43
	v_sub_f32_e32 v49, v33, v49
	v_fma_f32 v40, v33, v33, -v50
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v34, v23, v22
	v_dual_mul_f32 v22, v23, v28 :: v_dual_sub_f32 v41, v52, v41
	v_fma_f32 v23, v23, v28, -v22
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_sub_f32_e32 v41, v45, v41
	v_sub_f32_e32 v47, v32, v48
	v_mul_f32_e32 v48, v35, v32
	v_add_f32_e32 v26, v26, v41
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v44, v32, v35, -v48
	v_dual_sub_f32 v25, v25, v47 :: v_dual_fmac_f32 v44, v32, v21
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mul_f32 v21, v32, v42 :: v_dual_fmac_f32 v44, v25, v35
	v_fma_f32 v32, v32, v42, -v21
	v_dual_sub_f32 v27, v27, v49 :: v_dual_fmac_f32 v34, v29, v31
	v_fmac_f32_e32 v23, v29, v28
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f32_e32 v28, v48, v44
	v_dual_fmac_f32 v32, v25, v42 :: v_dual_add_f32 v41, v27, v27
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_sub_f32 v48, v28, v48 :: v_dual_add_f32 v45, v22, v23
	v_dual_fmac_f32 v40, v33, v41 :: v_dual_add_f32 v41, v43, v34
	v_add_f32_e32 v31, v52, v26
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_sub_f32_e32 v44, v44, v48
	v_sub_f32_e32 v22, v45, v22
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v42, v41, v43 :: v_dual_sub_f32 v43, v31, v52
	v_sub_f32_e32 v26, v26, v43
	v_add_f32_e32 v35, v39, v31
	v_add_f32_e32 v49, v21, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_add_f32 v29, v50, v40 :: v_dual_add_f32 v48, 0x3f2aaaaa, v49
	v_sub_f32_e32 v43, v29, v50
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_add_f32 v50, v24, v26 :: v_dual_sub_f32 v25, v35, v39
	v_dual_sub_f32 v40, v40, v43 :: v_dual_sub_f32 v47, v35, v25
	v_sub_f32_e32 v25, v31, v25
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v31, v39, v47
	v_add_f32_e32 v25, v25, v31
	v_dual_sub_f32 v31, v34, v42 :: v_dual_add_f32 v34, 0x3f2aaaaa, v45
	v_dual_sub_f32 v42, v50, v24 :: v_dual_mul_f32 v47, v33, v29
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_sub_f32 v22, v23, v22 :: v_dual_add_f32 v25, v50, v25
	v_dual_sub_f32 v50, v50, v42 :: v_dual_fmaak_f32 v39, s2, v29, 0x3e91f4c4
	v_sub_f32_e32 v26, v26, v42
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_dual_add_f32 v52, v35, v25 :: v_dual_add_f32 v23, 0xbf2aaaaa, v34
	v_dual_sub_f32 v21, v49, v21 :: v_dual_add_f32 v22, 0x31739010, v22
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_sub_f32_e32 v24, v24, v50
	v_fma_f32 v42, v29, v33, -v47
	v_sub_f32_e32 v23, v45, v23
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_dual_sub_f32 v21, v32, v21 :: v_dual_add_f32 v24, v26, v24
	v_fmaak_f32 v39, v29, v39, 0x3ecccdef
	v_add_f32_e32 v22, v22, v23
	v_sub_f32_e32 v35, v52, v35
	v_fmac_f32_e32 v42, v29, v27
	v_add_f32_e32 v26, 0xbf2aaaaa, v48
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_mul_f32 v32, v29, v39 :: v_dual_add_f32 v43, v34, v22
	v_dual_sub_f32 v25, v25, v35 :: v_dual_fmac_f32 v42, v40, v33
	v_add_f32_e32 v21, 0x31739010, v21
	v_ldexp_f32 v33, v33, 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f32_e32 v24, v24, v25
	v_fma_f32 v29, v29, v39, -v32
	v_fmac_f32_e32 v29, v40, v39
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_dual_add_f32 v40, v32, v29 :: v_dual_sub_f32 v25, v49, v26
	v_add_f32_e32 v26, v52, v24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_sub_f32 v32, v40, v32 :: v_dual_add_f32 v21, v21, v25
	v_sub_f32_e32 v23, v26, v52
	v_mul_f32_e32 v25, v17, v26
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v23, v24, v23
	v_fma_f32 v24, v17, v26, -v25
	v_sub_f32_e32 v26, v34, v43
	v_mul_f32_e32 v34, v41, v43
	v_cmp_class_f32_e64 s0, v25, 0x204
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f32_e32 v22, v22, v26
	v_fma_f32 v26, v41, v43, -v34
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v26, v41, v22
	v_dual_add_f32 v35, v47, v42 :: v_dual_fmac_f32 v24, v17, v23
	v_dual_fmac_f32 v26, v31, v43 :: v_dual_add_f32 v45, v48, v21
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f32_e32 v31, v34, v26
	v_dual_sub_f32 v39, v48, v45 :: v_dual_add_f32 v48, v25, v24
	v_mul_f32_e32 v23, v28, v45
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_add_f32 v41, 0x3f2aaaaa, v40 :: v_dual_sub_f32 v34, v31, v34
	v_add_f32_e32 v21, v21, v39
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v22, v48, v25, s0
	v_fma_f32 v39, v28, v45, -v23
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_f32_e32 v26, v26, v34
	v_cmp_eq_f32_e64 s0, 0x42b17218, v22
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_fmac_f32 v39, v28, v21 :: v_dual_sub_f32 v28, v29, v32
	v_add_f32_e32 v26, v38, v26
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v21, 0, 0x37000000, s0
	v_dual_fmac_f32 v39, v44, v45 :: v_dual_add_f32 v44, v46, v31
	v_add_f32_e32 v29, 0xbf2aaaaa, v41
	v_add_f32_e32 v28, 0x31739010, v28
	s_delay_alu instid0(VALU_DEP_4)
	v_sub_f32_e32 v32, v22, v21
	v_sub_f32_e32 v25, v48, v25
	v_sub_f32_e32 v46, v44, v46
	v_sub_f32_e32 v29, v40, v29
	v_cmp_neq_f32_e64 s0, 0x7f800000, |v22|
	v_mul_f32_e32 v40, 0x3fb8aa3b, v32
	v_sub_f32_e32 v24, v24, v25
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f32 v34, 0x3fb8aa3b, v32, -v40
	v_rndne_f32_e32 v49, v40
	v_cndmask_b32_e64 v22, 0, v24, s0
	v_cmp_eq_f32_e64 s0, s14, 1.0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fmac_f32_e32 v34, 0x32a5705f, v32
	v_dual_sub_f32 v40, v40, v49 :: v_dual_add_f32 v43, v23, v39
	v_cvt_i32_f32_e32 v24, v49
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_dual_add_f32 v34, v40, v34 :: v_dual_add_f32 v45, v51, v43
	v_sub_f32_e32 v31, v31, v46
	v_dual_sub_f32 v23, v43, v23 :: v_dual_add_f32 v40, v21, v22
	v_exp_f32_e32 v25, v34
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f32_e32 v31, v26, v31
	v_sub_f32_e32 v23, v39, v23
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f32_e32 v34, v44, v31
	v_sub_f32_e32 v39, v45, v51
	v_sub_f32_e32 v38, v43, v39
	v_add_f32_e32 v26, v28, v29
	s_delay_alu instid0(TRANS32_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_ldexp_f32 v43, v25, v24
	v_sub_f32_e32 v25, v35, v47
	v_frexp_exp_i32_f32_e32 v24, s14
	v_dual_add_f32 v28, v41, v26 :: v_dual_add_f32 v23, v30, v23
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_f32_e32 v25, v42, v25
	v_subrev_co_ci_u32_e32 v24, vcc_lo, 0, v24, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_sub_f32_e32 v22, v41, v28
	v_mul_f32_e32 v29, v35, v28
	v_add_f32_e32 v23, v23, v38
	v_cvt_f32_i32_e32 v42, v24
	v_add3_u32 v30, v0, s12, v14
	v_add_f32_e32 v22, v26, v22
	v_fma_f32 v41, v35, v28, -v29
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_add_f32 v38, v45, v23 :: v_dual_fmac_f32 v41, v35, v22
	v_sub_f32_e32 v21, v38, v45
	v_sub_f32_e32 v39, v34, v44
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_add_f32 v44, v18, v34 :: v_dual_fmac_f32 v41, v25, v28
	v_add_nc_u32_e32 v25, 0xffffff37, v30
	v_add_f32_e32 v47, v29, v41
	v_add_f32_e32 v37, v20, v38
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v26, 31, v25
	v_dual_sub_f32 v48, v47, v29 :: v_dual_sub_f32 v45, v37, v20
	v_add_f32_e32 v49, v33, v47
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[25:26], 2, v[25:26]
	v_sub_f32_e32 v46, v37, v45
	v_sub_f32_e32 v35, v23, v21
	v_add3_u32 v21, v16, s12, v14
	v_ldexp_f32 v16, v27, 1
	v_add_nc_u32_e32 v27, 0xc9, v30
	v_sub_f32_e32 v20, v20, v46
	v_add_nc_u32_e32 v23, -1, v30
	v_ashrrev_i32_e32 v22, 31, v21
	v_mul_f32_e32 v14, 0x3f317218, v42
	v_ashrrev_i32_e32 v28, 31, v27
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_ashrrev_i32_e32 v24, 31, v23
	v_lshlrev_b64 v[21:22], 2, v[21:22]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[27:28], 2, v[27:28]
	v_lshlrev_b64 v[23:24], 2, v[23:24]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v21, vcc_lo, s16, v21
	v_add_co_ci_u32_e32 v22, vcc_lo, s17, v22, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v23, vcc_lo, s16, v23
	v_add_co_ci_u32_e32 v24, vcc_lo, s17, v24, vcc_lo
	v_add_co_u32 v25, vcc_lo, s16, v25
	v_add_co_ci_u32_e32 v26, vcc_lo, s17, v26, vcc_lo
	v_add_co_u32 v27, vcc_lo, s16, v27
	v_add_co_ci_u32_e32 v28, vcc_lo, s17, v28, vcc_lo
	v_add_co_u32 v29, vcc_lo, s8, v7
	s_clause 0x3
	global_load_b32 v50, v[21:22], off
	global_load_b32 v23, v[23:24], off
	global_load_b32 v24, v[25:26], off
	global_load_b32 v25, v[27:28], off
	v_lshlrev_b64 v[21:22], 2, v[4:5]
	v_add_co_ci_u32_e32 v30, vcc_lo, s9, v8, vcc_lo
	v_add_co_u32 v7, vcc_lo, s10, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s11, v8, vcc_lo
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_u32 v21, vcc_lo, s16, v21
	v_sub_f32_e32 v26, v41, v48
	v_sub_f32_e32 v27, v49, v33
	v_add_co_ci_u32_e32 v22, vcc_lo, s17, v22, vcc_lo
	global_load_b32 v28, v[29:30], off
	global_load_b32 v8, v[7:8], off
	global_load_b32 v21, v[21:22], off
	v_sub_f32_e32 v22, v47, v27
	v_add_f32_e32 v16, v16, v26
	v_fma_f32 v7, 0x3f317218, v42, -v14
	v_sub_f32_e32 v26, v38, v45
	v_cmp_eq_f32_e32 vcc_lo, 1.0, v11
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f32_e32 v16, v16, v22
	v_sub_f32_e32 v22, v44, v18
	v_dual_add_f32 v20, v26, v20 :: v_dual_sub_f32 v33, v44, v22
	v_fmac_f32_e32 v7, 0xb102e308, v42
	v_sub_f32_e32 v22, v34, v22
	v_cndmask_b32_e64 v34, 2.0, 1.0, vcc_lo
	v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v32
	v_sub_f32_e32 v18, v18, v33
	v_add_f32_e32 v29, v14, v7
	v_add_f32_e32 v27, v36, v35
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_sub_f32 v31, v31, v39 :: v_dual_add_f32 v18, v22, v18
	v_sub_f32_e32 v14, v29, v14
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f32_e32 v20, v27, v20
	v_dual_add_f32 v30, v49, v16 :: v_dual_sub_f32 v7, v7, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f32_e32 v38, v29, v30
	v_sub_f32_e32 v26, v27, v36
	v_sub_f32_e32 v27, v27, v26
	v_dual_sub_f32 v26, v35, v26 :: v_dual_add_f32 v33, v37, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v35, v33, v37
	v_dual_sub_f32 v37, v30, v49 :: v_dual_sub_f32 v20, v20, v35
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v27, v36, v27
	v_sub_f32_e32 v14, v16, v37
	v_sub_f32_e32 v36, v38, v29
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f32_e32 v26, v26, v27
	v_sub_f32_e32 v41, v38, v36
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_add_f32 v39, v19, v31 :: v_dual_add_f32 v20, v26, v20
	v_dual_sub_f32 v16, v29, v41 :: v_dual_sub_f32 v27, v30, v36
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f32_e32 v18, v39, v18
	v_sub_f32_e32 v29, v39, v19
	v_add_f32_e32 v30, v7, v14
	v_add_f32_e32 v16, v27, v16
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_add_f32 v27, v33, v20 :: v_dual_sub_f32 v22, v39, v29
	v_sub_f32_e32 v26, v30, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_add_f32 v16, v30, v16 :: v_dual_sub_f32 v33, v27, v33
	v_sub_f32_e32 v30, v30, v26
	v_mul_f32_e32 v36, v34, v27
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_add_f32 v35, v38, v16 :: v_dual_sub_f32 v20, v20, v33
	v_sub_f32_e32 v7, v7, v30
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v27, v34, v27, -v36
	v_dual_add_f32 v30, v44, v18 :: v_dual_fmac_f32 v27, v34, v20
	v_sub_f32_e32 v14, v14, v26
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v26, v35, v38 :: v_dual_add_f32 v7, v14, v7
	v_sub_f32_e32 v14, v16, v26
	v_sub_f32_e32 v16, v19, v22
	v_sub_f32_e32 v19, v31, v29
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_add_f32 v7, v7, v14 :: v_dual_cndmask_b32 v14, 0, v43
	v_cmp_class_f32_e64 vcc_lo, v36, 0x204
	v_add_f32_e32 v20, v35, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v26, v20, v35
	v_dual_sub_f32 v22, v30, v44 :: v_dual_sub_f32 v7, v7, v26
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v18, v18, v22
	v_cndmask_b32_e64 v22, 2.0, 1.0, s0
	v_cmp_eq_f32_e64 s0, s5, 1.0
	v_mul_f32_e32 v29, v22, v20
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v31, 2.0, 1.0, s0
	v_fma_f32 v20, v22, v20, -v29
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v20, v22, v7
	v_add_f32_e32 v37, v29, v20
	v_dual_add_f32 v16, v19, v16 :: v_dual_add_f32 v19, v36, v27
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f32_e32 v16, v16, v18
	v_cndmask_b32_e32 v18, v19, v36, vcc_lo
	v_sub_f32_e32 v19, v19, v36
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f32_e32 v33, v30, v16
	v_cmp_eq_f32_e32 vcc_lo, 0x42b17218, v18
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_sub_f32_e32 v7, v33, v30
	v_cndmask_b32_e64 v26, 0, 0x37000000, vcc_lo
	v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v32
	v_dual_mul_f32 v30, v31, v33 :: v_dual_sub_f32 v7, v16, v7
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v32, v18, v26
	v_fma_f32 v16, v31, v33, -v30
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mul_f32 v33, 0x3fb8aa3b, v32 :: v_dual_fmac_f32 v16, v31, v7
	v_fma_f32 v7, 0x3fb8aa3b, v32, -v33
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v7, 0x32a5705f, v32
	v_cndmask_b32_e32 v14, 0x7f800000, v14, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v29, 0x204
	v_fma_f32 v35, v14, v40, v14
	v_cndmask_b32_e32 v38, v37, v29, vcc_lo
	v_cmp_eq_f32_e32 vcc_lo, 0x7f800000, v14
	v_trunc_f32_e32 v40, v17
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_cmp_neq_f32_e64 s1, 0x7f800000, |v38|
	v_cndmask_b32_e32 v14, v35, v14, vcc_lo
	v_cmp_eq_f32_e32 vcc_lo, 0x42b17218, v38
	v_rndne_f32_e32 v35, v33
	v_cndmask_b32_e64 v39, 0, 0x37000000, vcc_lo
	v_sub_f32_e32 v33, v33, v35
	v_cvt_i32_f32_e32 v35, v35
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_f32_e32 v42, v38, v39
	v_add_f32_e32 v7, v33, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_mul_f32_e32 v33, 0x3fb8aa3b, v42
	v_add_f32_e32 v41, v30, v16
	v_cmp_class_f32_e64 vcc_lo, v30, 0x204
	v_exp_f32_e32 v7, v7
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_rndne_f32_e32 v44, v33
	v_cndmask_b32_e32 v43, v41, v30, vcc_lo
	v_cmp_eq_f32_e32 vcc_lo, v40, v17
	v_mul_f32_e32 v17, 0.5, v17
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_cmp_eq_f32_e64 s0, 0x42b17218, v43
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v7, v7, v35
	v_cndmask_b32_e64 v40, 0, 0x37000000, s0
	v_cmp_neq_f32_e64 s0, 0x7f800000, |v18|
	v_sub_f32_e32 v45, v43, v40
	v_fma_f32 v36, 0x3fb8aa3b, v42, -v33
	v_sub_f32_e32 v19, v27, v19
	v_sub_f32_e32 v27, v33, v44
	v_cmp_nlt_f32_e64 s2, 0x42b17218, v42
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fmac_f32_e32 v36, 0x32a5705f, v42
	v_cndmask_b32_e64 v18, 0, v19, s0
	v_mul_f32_e32 v33, 0x3fb8aa3b, v45
	v_cmp_ngt_f32_e64 s0, 0xc2ce8ed0, v32
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_dual_add_f32 v19, v27, v36 :: v_dual_add_f32 v18, v26, v18
	v_sub_f32_e32 v26, v37, v29
	v_fma_f32 v27, 0x3fb8aa3b, v45, -v33
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v7, 0, v7, s0
	v_exp_f32_e32 v19, v19
	v_cmp_nlt_f32_e64 s0, 0x42b17218, v32
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_dual_sub_f32 v20, v20, v26 :: v_dual_fmac_f32 v27, 0x32a5705f, v45
	v_cvt_i32_f32_e32 v32, v44
	v_trunc_f32_e32 v29, v34
	v_cndmask_b32_e64 v7, 0x7f800000, v7, s0
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(TRANS32_DEP_1)
	v_cndmask_b32_e64 v20, 0, v20, s1
	v_mul_f32_e32 v35, 0.5, v34
	v_cmp_ngt_f32_e64 s1, 0xc2ce8ed0, v42
	v_ldexp_f32 v19, v19, v32
	v_fma_f32 v18, v7, v18, v7
	v_add_f32_e32 v20, v39, v20
	v_trunc_f32_e32 v26, v35
	v_cmp_eq_f32_e64 s0, v29, v34
	v_cndmask_b32_e64 v19, 0, v19, s1
	v_trunc_f32_e32 v29, v22
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_cmp_neq_f32_e64 s1, v26, v35
	v_mul_f32_e32 v26, 0.5, v22
	v_cndmask_b32_e64 v19, 0x7f800000, v19, s2
	v_cmp_eq_f32_e64 s2, 0x7f800000, v7
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	s_and_b32 s1, s0, s1
	v_trunc_f32_e32 v32, v26
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_eq_f32_e64 s4, 0x7f800000, v19
	v_cndmask_b32_e64 v7, v18, v7, s2
	v_cmp_eq_f32_e64 s2, v29, v22
	v_fma_f32 v18, v19, v20, v19
	v_cmp_neq_f32_e64 s3, v32, v26
	v_cndmask_b32_e64 v20, 1.0, v11, s1
	v_rndne_f32_e32 v22, v33
	v_cndmask_b32_e64 v35, 0, v11, s1
	v_cndmask_b32_e64 v18, v18, v19, s4
	s_and_b32 s3, s2, s3
	v_bfi_b32 v7, 0x7fffffff, v7, v20
	v_cndmask_b32_e64 v19, 1.0, s14, s3
	v_cmp_lt_f32_e64 s1, s14, 0
	v_cndmask_b32_e64 v34, 0, s14, s3
	v_cmp_class_f32_e64 s3, s14, 0x204
	v_cndmask_b32_e64 v26, 0x7fc00000, v7, s0
	v_bfi_b32 v18, 0x7fffffff, v18, v19
	v_sub_f32_e32 v19, v33, v22
	v_cmp_eq_f32_e64 s0, 0, v11
	v_cmp_class_f32_e64 s4, v11, 0x204
	v_trunc_f32_e32 v20, v17
	v_cndmask_b32_e64 v32, 0x7fc00000, v18, s2
	v_cmp_eq_f32_e64 s2, s14, 0
	v_cndmask_b32_e64 v29, 0x7f800000, 0, s0
	v_add_f32_e32 v19, v19, v27
	s_or_b32 s0, s0, s4
	v_cndmask_b32_e64 v18, v18, v32, s1
	v_cndmask_b32_e64 v33, 0x7f800000, 0, s2
	v_cmp_gt_f32_e64 s1, 0, v11
	v_cvt_i32_f32_e32 v22, v22
	v_trunc_f32_e32 v27, v31
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_bfi_b32 v32, 0x7fffffff, v33, v34
	v_cndmask_b32_e64 v7, v7, v26, s1
	s_or_b32 s1, s2, s3
	v_bfi_b32 v26, 0x7fffffff, v29, v35
	v_cmp_eq_f32_e64 s2, v27, v31
	v_cndmask_b32_e64 v18, v18, v32, s1
	v_cmp_o_f32_e64 s1, v11, v11
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v7, v7, v26, s0
	v_cmp_neq_f32_e64 s0, v20, v17
	v_add_f32_e32 v17, v18, v18
	v_exp_f32_e32 v18, v19
	v_sub_f32_e32 v19, v41, v30
	v_cndmask_b32_e64 v7, 0x7fc00000, v7, s1
	v_cmp_o_f32_e64 s1, s14, s14
	s_and_b32 s0, vcc_lo, s0
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v18, v18, v22
	v_mul_f32_e32 v22, 0.5, v31
	v_sub_f32_e32 v16, v16, v19
	v_cndmask_b32_e64 v11, 0x7fc00000, v17, s1
	v_cndmask_b32_e64 v17, 1.0, v10, s0
	v_cmp_neq_f32_e64 s1, 0x7f800000, |v43|
	v_trunc_f32_e32 v29, v22
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_div_scale_f32 v20, null, v11, v11, -v7
	v_bfi_b32 v14, 0x7fffffff, v14, v17
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v16, 0, v16, s1
	v_cmp_neq_f32_e64 s3, v29, v22
	s_delay_alu instid0(VALU_DEP_4)
	v_rcp_f32_e32 v17, v20
	v_cndmask_b32_e64 v22, 0, v10, s0
	v_cndmask_b32_e32 v19, 0x7fc00000, v14, vcc_lo
	v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v45
	v_add_f32_e32 v16, v40, v16
	v_cmp_eq_f32_e64 s1, 0, v10
	s_and_b32 s3, s2, s3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(TRANS32_DEP_1)
	v_cndmask_b32_e64 v29, 1.0, s5, s3
	v_fma_f32 v26, -v20, v17, 1.0
	v_cndmask_b32_e32 v18, 0, v18, vcc_lo
	v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v45
	v_cndmask_b32_e64 v30, 0x7f800000, 0, s1
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v17, v26, v17 :: v_dual_cndmask_b32 v18, 0x7f800000, v18
	v_div_scale_f32 v26, vcc_lo, -v7, v11, -v7
	v_mul_f32_e32 v27, v26, v17
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f32 v16, v18, v16, v18
	v_cmp_eq_f32_e64 s0, 0x7f800000, v18
	v_cndmask_b32_e64 v16, v16, v18, s0
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f32 v18, -v20, v27, v26
	v_cmp_gt_f32_e64 s0, 0, v10
	v_bfi_b32 v16, 0x7fffffff, v16, v29
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v27, v18, v17
	v_cndmask_b32_e64 v14, v14, v19, s0
	v_cmp_class_f32_e64 s0, v10, 0x204
	v_bfi_b32 v18, 0x7fffffff, v30, v22
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_fma_f32 v19, -v20, v27, v26
	v_cndmask_b32_e64 v26, 0, s5, s3
	s_or_b32 s0, s1, s0
	s_mov_b32 s1, 0x37d75334
	v_cndmask_b32_e64 v14, v14, v18, s0
	v_div_fmas_f32 v17, v19, v17, v27
	v_cmp_o_f32_e32 vcc_lo, v10, v10
	s_mov_b32 s0, 0xb94c1982
	v_cndmask_b32_e64 v18, 0x7fc00000, v16, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_div_fixup_f32 v7, v17, v11, -v7
	v_cndmask_b32_e32 v10, 0x7fc00000, v14, vcc_lo
	v_mul_f32_e32 v14, v13, v13
	v_cmp_lt_f32_e64 vcc_lo, s5, 0
	v_fmaak_f32 v11, s0, v14, 0x3c0881c4
	v_cmp_eq_f32_e64 s0, s5, 0
	v_fmaak_f32 v17, s1, v14, 0xbab64f3b
	v_cmp_class_f32_e64 s1, s5, 0x204
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_dual_cndmask_b32 v16, v16, v18 :: v_dual_fmaak_f32 v11, v14, v11, 0xbe2aaa9d
	v_cndmask_b32_e64 v19, 0x7f800000, 0, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 vcc_lo, s0, s1
	v_bfi_b32 v19, 0x7fffffff, v19, v26
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_fmaak_f32 v17, v14, v17, 0x3d2aabf7 :: v_dual_cndmask_b32 v16, v16, v19
	v_mul_f32_e32 v11, v14, v11
	v_fmaak_f32 v17, v14, v17, 0xbf000004
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v13, v13, v11
	v_fma_f32 v11, v14, v17, 1.0
	v_and_b32_e32 v17, 1, v15
	v_lshlrev_b32_e32 v15, 30, v15
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cmp_eq_u32_e32 vcc_lo, 0, v17
	v_cndmask_b32_e64 v11, -v13, v11, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_and_b32_e32 v13, 0x80000000, v15
	v_cmp_o_f32_e64 vcc_lo, s5, s5
	v_xor_b32_e32 v11, v13, v11
	v_cndmask_b32_e32 v16, 0x7fc00000, v16, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v9, 0x1f8
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_mul_f32 v10, v10, v16 :: v_dual_cndmask_b32 v9, 0x7fc00000, v11
	v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v7
	v_dual_mul_f32 v18, 0x3fb8aa3b, v7 :: v_dual_mul_f32 v9, v10, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f32 v20, 0x3fb8aa3b, v7, -v18
	v_rndne_f32_e32 v22, v18
	v_fmac_f32_e32 v20, 0x32a5705f, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v18, v18, v22
	v_cvt_i32_f32_e32 v15, v22
	v_add_f32_e32 v14, v18, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_exp_f32_e32 v14, v14
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v13, v14, v15
	v_cndmask_b32_e32 v11, 0, v13, vcc_lo
	s_waitcnt vmcnt(5)
	v_add_f32_e32 v13, v50, v23
	v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v7
	s_waitcnt vmcnt(4)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_add_f32 v10, v13, v24 :: v_dual_cndmask_b32 v7, 0x7f800000, v11
	v_mul_f32_e32 v7, v9, v7
	s_waitcnt vmcnt(3)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_add_f32_e32 v9, v10, v25
	s_waitcnt vmcnt(0)
	v_mul_f32_e32 v10, v8, v21
	v_fmac_f32_e32 v7, v28, v9
.LBB1_12:                               ; %Flow315
	s_or_b32 exec_lo, exec_lo, s13
	s_add_i32 s2, s12, 0xffff622f
	v_add3_u32 v13, 0x9dd1, s12, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_dual_add_f32 v7, v10, v7 :: v_dual_add_nc_u32 v8, s2, v1
	v_add_nc_u32_e32 v16, -1, v3
	v_cmp_eq_u32_e64 s0, 0, v0
	v_ashrrev_i32_e32 v14, 31, v13
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v9, 31, v8
	v_lshlrev_b64 v[10:11], 2, v[13:14]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[8:9], 2, v[8:9]
	v_add_co_u32 v10, s1, s16, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v8, vcc_lo, s16, v8
	v_add_co_ci_u32_e32 v9, vcc_lo, s17, v9, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, 0xc7, v16
	v_add_co_ci_u32_e64 v11, s1, s17, v11, s1
	global_load_b32 v15, v[8:9], off
	s_and_b32 s0, s0, vcc_lo
	s_waitcnt vmcnt(0)
	v_sub_f32_e32 v7, v7, v15
	global_store_b32 v[10:11], v7, off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_14
; %bb.13:
	v_lshlrev_b64 v[13:14], 2, v[1:2]
	v_lshlrev_b64 v[19:20], 2, v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v17, s0, s6, v13
	v_add_co_ci_u32_e64 v18, s0, s7, v14, s0
	v_add_co_u32 v13, s0, s8, v13
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v14, s0, s9, v14, s0
	global_load_b32 v7, v[17:18], off
	v_add_co_u32 v17, s0, s16, v19
	v_add_nc_u32_e32 v15, 2, v4
	v_add_co_ci_u32_e64 v18, s0, s17, v20, s0
	global_load_b32 v19, v[13:14], off
	global_load_b64 v[13:14], v[17:18], off
	s_waitcnt vmcnt(2)
	v_add_f32_e32 v18, v7, v7
	v_ashrrev_i32_e32 v16, 31, v15
	v_add_f32_e32 v20, 1.0, v7
	v_fma_f32 v21, v7, -2.0, 2.0
	v_fma_f32 v7, v7, 2.0, -1.0
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[15:16], 2, v[15:16]
	s_waitcnt vmcnt(1)
	v_dual_mul_f32 v20, v18, v20 :: v_dual_sub_f32 v21, v21, v19
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v15, s0, s16, v15
	v_add_co_ci_u32_e64 v16, s0, s17, v16, s0
	s_clause 0x1
	global_load_b32 v17, v[15:16], off
	global_load_b64 v[15:16], v[8:9], off
	s_waitcnt vmcnt(2)
	v_mul_f32_e32 v14, v20, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v14, v13, v21
	s_waitcnt vmcnt(1)
	v_fma_f32 v13, -v19, v17, v14
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v13, v7, v15
	v_fma_f32 v7, -v18, v16, v13
	global_store_b32 v[10:11], v7, off
.LBB1_14:
	s_or_b32 exec_lo, exec_lo, s1
	v_cmp_eq_u32_e64 s0, 0xc8, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, s0, vcc_lo
	s_and_saveexec_b32 s0, s1
	s_cbranch_execz .LBB1_16
; %bb.15:
	v_lshlrev_b64 v[13:14], 2, v[1:2]
	v_lshlrev_b64 v[19:20], 2, v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v17, vcc_lo, s6, v13
	v_add_co_ci_u32_e32 v18, vcc_lo, s7, v14, vcc_lo
	v_add_co_u32 v13, vcc_lo, s8, v13
	v_add_co_ci_u32_e32 v14, vcc_lo, s9, v14, vcc_lo
	global_load_b32 v7, v[17:18], off
	v_add_co_u32 v17, vcc_lo, s16, v19
	v_add_co_ci_u32_e32 v18, vcc_lo, s17, v20, vcc_lo
	v_add_nc_u32_e32 v15, -2, v4
	global_load_b32 v19, v[13:14], off
	global_load_b64 v[13:14], v[17:18], off offset:-4
	s_waitcnt vmcnt(2)
	v_add_f32_e32 v18, v7, v7
	v_ashrrev_i32_e32 v16, 31, v15
	v_fma_f32 v21, v7, -2.0, 2.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[15:16], 2, v[15:16]
	s_waitcnt vmcnt(1)
	v_sub_f32_e32 v21, v21, v19
	v_add_f32_e32 v20, 1.0, v7
	v_fma_f32 v7, v7, 2.0, -1.0
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_co_u32 v15, vcc_lo, s16, v15
	v_add_co_ci_u32_e32 v16, vcc_lo, s17, v16, vcc_lo
	v_mul_f32_e32 v20, v18, v20
	s_clause 0x1
	global_load_b32 v17, v[15:16], off
	global_load_b64 v[15:16], v[8:9], off offset:-4
	s_waitcnt vmcnt(2)
	v_mul_f32_e32 v13, v20, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v13, v14, v21
	s_waitcnt vmcnt(1)
	v_fma_f32 v13, -v19, v17, v13
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v13, v7, v16
	v_fma_f32 v7, -v18, v15, v13
	global_store_b32 v[10:11], v7, off
.LBB1_16:
	s_or_b32 exec_lo, exec_lo, s0
	v_add_nc_u32_e32 v7, -1, v0
	v_cmp_eq_u32_e64 s0, 0, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_u32_e32 vcc_lo, 0xc7, v7
	s_and_b32 s0, s0, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_18
; %bb.17:
	v_mad_u64_u32 v[13:14], null, 0xc9, v12, v[0:1]
	v_lshlrev_b64 v[14:15], 2, v[1:2]
	v_lshlrev_b64 v[16:17], 2, v[4:5]
	v_ashrrev_i32_e32 v7, 31, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v20, s0, s6, v14
	v_add_co_ci_u32_e64 v21, s0, s7, v15, s0
	v_add_co_u32 v14, s0, s8, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v15, s0, s9, v15, s0
	global_load_b32 v20, v[20:21], off
	v_add_nc_u32_e32 v18, s12, v13
	v_add_co_u32 v16, s0, s16, v16
	v_add_co_ci_u32_e64 v17, s0, s17, v17, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v19, 31, v18
	v_lshlrev_b64 v[6:7], 2, v[6:7]
	v_lshlrev_b64 v[18:19], 2, v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v18, s0, s16, v18
	v_add_co_ci_u32_e64 v19, s0, s17, v19, s0
	global_load_b32 v14, v[14:15], off
	s_clause 0x1
	global_load_b32 v15, v[16:17], off
	global_load_b32 v16, v[18:19], off
	v_add_nc_u32_e32 v12, s2, v13
	v_add_co_u32 v6, s0, s16, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v7, s0, s17, v7, s0
	v_ashrrev_i32_e32 v13, 31, v12
	s_clause 0x1
	global_load_b32 v17, v[6:7], off offset:1608
	global_load_b32 v18, v[8:9], off
	v_lshlrev_b64 v[12:13], 2, v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v6, s0, s16, v12
	v_add_co_ci_u32_e64 v7, s0, s17, v13, s0
	global_load_b32 v6, v[6:7], off
	s_waitcnt vmcnt(6)
	v_add_f32_e32 v7, v20, v20
	v_add_f32_e32 v12, 1.0, v20
	v_fma_f32 v13, v20, -2.0, 2.0
	s_waitcnt vmcnt(5)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_dual_mul_f32 v12, v7, v12 :: v_dual_sub_f32 v13, v13, v14
	s_waitcnt vmcnt(3)
	v_mul_f32_e32 v12, v12, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v12, v15, v13
	v_fma_f32 v13, v20, 2.0, -1.0
	s_waitcnt vmcnt(2)
	v_fma_f32 v12, -v14, v17, v12
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v12, v13, v18
	s_waitcnt vmcnt(0)
	v_fma_f32 v6, -v7, v6, v12
	global_store_b32 v[10:11], v6, off
.LBB1_18:
	s_or_b32 exec_lo, exec_lo, s1
	v_cmp_eq_u32_e64 s0, 0xc8, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, s0, vcc_lo
	s_and_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB1_20
; %bb.19:
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_nc_u32_e32 v7, 0x9c3f, v0
	v_lshlrev_b64 v[3:4], 2, v[4:5]
	v_add3_u32 v0, v0, s12, 0x9b76
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_u32 v12, vcc_lo, s6, v1
	v_add_co_ci_u32_e32 v13, vcc_lo, s7, v2, vcc_lo
	v_add_co_u32 v14, vcc_lo, s8, v1
	v_add_co_ci_u32_e32 v15, vcc_lo, s9, v2, vcc_lo
	global_load_b32 v12, v[12:13], off
	v_add_nc_u32_e32 v5, s12, v7
	v_add_co_u32 v2, vcc_lo, s16, v3
	v_ashrrev_i32_e32 v1, 31, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, s17, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v6, 31, v5
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], 2, v[5:6]
	v_add_co_u32 v4, vcc_lo, s16, v5
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, s17, v6, vcc_lo
	v_add_nc_u32_e32 v6, s2, v7
	global_load_b32 v13, v[14:15], off
	s_clause 0x1
	global_load_b32 v14, v[2:3], off
	global_load_b32 v4, v[4:5], off
	v_add_co_u32 v0, vcc_lo, s16, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s17, v1, vcc_lo
	v_ashrrev_i32_e32 v7, 31, v6
	s_delay_alu instid0(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[6:7]
	s_clause 0x1
	global_load_b32 v5, v[0:1], off
	global_load_b32 v6, v[8:9], off
	v_add_co_u32 v0, vcc_lo, s16, v2
	v_add_co_ci_u32_e32 v1, vcc_lo, s17, v3, vcc_lo
	global_load_b32 v0, v[0:1], off
	s_waitcnt vmcnt(6)
	v_add_f32_e32 v1, v12, v12
	v_add_f32_e32 v2, 1.0, v12
	v_fma_f32 v3, v12, -2.0, 2.0
	s_waitcnt vmcnt(5)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_dual_mul_f32 v2, v1, v2 :: v_dual_sub_f32 v3, v3, v13
	s_waitcnt vmcnt(3)
	v_mul_f32_e32 v2, v2, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v2, v14, v3
	v_fma_f32 v3, v12, 2.0, -1.0
	s_waitcnt vmcnt(2)
	v_fma_f32 v2, -v13, v5, v2
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v2, v3, v6
	s_waitcnt vmcnt(0)
	v_fma_f32 v0, -v1, v0, v2
	global_store_b32 v[10:11], v0, off
.LBB1_20:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11propagationiiiiPfS_S_S_S_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 320
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 53
		.amdhsa_next_free_sgpr 22
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z11propagationiiiiPfS_S_S_S_i, .Lfunc_end1-_Z11propagationiiiiPfS_S_S_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 7704
; NumSgprs: 24
; NumVgprs: 53
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 6
; NumSGPRsForWavesPerEU: 24
; NumVGPRsForWavesPerEU: 53
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z22propagation_at_cornersPf ; -- Begin function _Z22propagation_at_cornersPf
	.globl	_Z22propagation_at_cornersPf
	.p2align	8
	.type	_Z22propagation_at_cornersPf,@function
_Z22propagation_at_cornersPf:           ; @_Z22propagation_at_cornersPf
; %bb.0:
	s_load_b64 s[0:1], s[0:1], 0x0
	v_mul_u32_u24_e32 v1, 0x9dd1, v0
	v_lshlrev_b32_e32 v0, 2, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v3, 2, v1
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v1, s2, s0, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e64 v2, null, s1, 0, s2
	v_add_co_u32 v1, vcc_lo, 0x27000, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, 0, v2, vcc_lo
	s_clause 0x7
	global_load_b32 v4, v3, s[0:1] offset:796
	global_load_b32 v5, v3, s[0:1] offset:1604
	global_load_b32 v6, v[1:2], off offset:252
	global_load_b32 v7, v[1:2], off offset:1852
	global_load_b32 v8, v[1:2], off offset:1052
	global_load_b32 v9, v0, s[0:1] offset:804
	global_load_b32 v0, v0, s[0:1] offset:4
	global_load_b32 v10, v[1:2], off offset:1060
	s_waitcnt vmcnt(6)
	v_add_f32_e32 v4, v4, v5
	s_waitcnt vmcnt(0)
	v_dual_add_f32 v0, v9, v0 :: v_dual_add_f32 v5, v6, v10
	v_add_f32_e32 v6, v7, v8
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f32_e32 v4, 0.5, v4
	v_dual_mul_f32 v0, 0.5, v0 :: v_dual_mul_f32 v5, 0.5, v5
	s_delay_alu instid0(VALU_DEP_3)
	v_mul_f32_e32 v6, 0.5, v6
	s_clause 0x3
	global_store_b32 v3, v0, s[0:1]
	global_store_b32 v3, v4, s[0:1] offset:800
	global_store_b32 v[1:2], v5, off offset:1056
	global_store_b32 v[1:2], v6, off offset:1856
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z22propagation_at_cornersPf
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 8
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 11
		.amdhsa_next_free_sgpr 3
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z22propagation_at_cornersPf, .Lfunc_end2-_Z22propagation_at_cornersPf
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 236
; NumSgprs: 5
; NumVgprs: 11
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 0
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 5
; NumVGPRsForWavesPerEU: 11
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z14initial_signalPfS_S_S_S_i ; -- Begin function _Z14initial_signalPfS_S_S_S_i
	.globl	_Z14initial_signalPfS_S_S_S_i
	.p2align	8
	.type	_Z14initial_signalPfS_S_S_S_i,@function
_Z14initial_signalPfS_S_S_S_i:          ; @_Z14initial_signalPfS_S_S_S_i
; %bb.0:
	s_add_i32 s2, s15, 2
	s_load_b256 s[4:11], s[0:1], 0x0
	s_mul_i32 s3, s2, 0x9dd1
	s_load_b32 s12, s[0:1], 0x28
	v_add_nc_u32_e32 v3, s3, v0
	s_mulk_i32 s2, 0xc9
	s_load_b64 s[0:1], s[0:1], 0x20
	s_ashr_i32 s14, s2, 31
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v1, 0x8d69, v3
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s12, s12, 0x13ad9
	s_ashr_i32 s13, s12, 31
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v1, vcc_lo, s4, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s5, v2, vcc_lo
	s_add_u32 s2, s12, s2
	s_addc_u32 s12, s13, s14
	global_load_b32 v7, v[1:2], off
	v_add_nc_u32_e32 v1, 0xfc9, v3
	v_add_co_u32 v3, s2, s2, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v4, null, s12, 0, s2
	v_ashrrev_i32_e32 v2, 31, v1
	v_add_nc_u32_e32 v0, 21, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mad_u32_u24 v0, 0xc9, v0, s3
	v_add_co_u32 v5, vcc_lo, s6, v3
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e32 v6, vcc_lo, s7, v4, vcc_lo
	v_add_co_u32 v1, vcc_lo, s4, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s5, v2, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[5:6], v7, off offset:84
	global_load_b32 v2, v[1:2], off
	v_ashrrev_i32_e32 v1, 31, v0
	v_add_co_u32 v5, vcc_lo, s10, v3
	v_add_co_ci_u32_e32 v6, vcc_lo, s11, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	v_add_co_u32 v0, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[5:6], v2, off offset:84
	global_load_b32 v2, v[0:1], off offset:720
	v_add_co_u32 v5, vcc_lo, s8, v3
	v_add_co_ci_u32_e32 v6, vcc_lo, s9, v4, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[5:6], v2, off offset:84
	global_load_b32 v2, v[0:1], off offset:80
	v_add_co_u32 v0, vcc_lo, s0, v3
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v4, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[0:1], v2, off offset:84
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z14initial_signalPfS_S_S_S_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 44
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end3:
	.size	_Z14initial_signalPfS_S_S_S_i, .Lfunc_end3-_Z14initial_signalPfS_S_S_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 376
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z17difference_signalPfS_S_S_S_S_S_S_S_i ; -- Begin function _Z17difference_signalPfS_S_S_S_S_S_S_S_i
	.globl	_Z17difference_signalPfS_S_S_S_S_S_S_S_i
	.p2align	8
	.type	_Z17difference_signalPfS_S_S_S_S_S_S_S_i,@function
_Z17difference_signalPfS_S_S_S_S_S_S_S_i: ; @_Z17difference_signalPfS_S_S_S_S_S_S_S_i
; %bb.0:
	s_load_b32 s2, s[0:1], 0x48
	s_add_i32 s3, s15, 2
	s_load_b512 s[4:19], s[0:1], 0x0
	s_mul_i32 s20, s3, 0x9dd1
	s_mulk_i32 s3, 0xc9
	v_add_nc_u32_e32 v9, s20, v0
	s_ashr_i32 s21, s3, 31
	v_add_co_u32 v3, s3, s3, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v4, null, s21, 0, s3
	v_add_nc_u32_e32 v1, 0x8d69, v9
	s_load_b64 s[0:1], s[0:1], 0x40
	v_add_nc_u32_e32 v0, 21, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v2, 31, v1
	v_mad_u32_u24 v0, 0xc9, v0, s20
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s2, s2, 0x13ad9
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	s_ashr_i32 s3, s2, 31
	v_add_co_u32 v5, vcc_lo, s2, v3
	v_add_co_ci_u32_e32 v6, vcc_lo, s3, v4, vcc_lo
	v_add_co_u32 v1, vcc_lo, s4, v1
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v2, vcc_lo, s5, v2, vcc_lo
	v_lshlrev_b64 v[5:6], 2, v[5:6]
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v7, vcc_lo, s6, v5
	v_add_co_ci_u32_e32 v8, vcc_lo, s7, v6, vcc_lo
	global_load_b32 v11, v[1:2], off
	global_load_b32 v12, v[7:8], off offset:84
	v_add_nc_u32_e32 v1, 0xfc9, v9
	v_add_co_u32 v7, vcc_lo, s14, v3
	v_add_co_ci_u32_e32 v8, vcc_lo, s15, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v2, 31, v1
	v_add_co_u32 v9, vcc_lo, s10, v5
	v_add_co_ci_u32_e32 v10, vcc_lo, s11, v6, vcc_lo
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v1, vcc_lo, s4, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s5, v2, vcc_lo
	s_waitcnt vmcnt(0)
	v_sub_f32_e32 v11, v12, v11
	global_store_b32 v[7:8], v11, off offset:84
	global_load_b32 v11, v[9:10], off offset:84
	global_load_b32 v2, v[1:2], off
	v_add_co_u32 v7, vcc_lo, s18, v3
	v_ashrrev_i32_e32 v1, 31, v0
	v_add_co_ci_u32_e32 v8, vcc_lo, s19, v4, vcc_lo
	v_add_co_u32 v9, vcc_lo, s8, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	v_add_co_ci_u32_e32 v10, vcc_lo, s9, v6, vcc_lo
	v_add_co_u32 v0, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
	s_waitcnt vmcnt(0)
	v_sub_f32_e32 v2, v11, v2
	global_store_b32 v[7:8], v2, off offset:84
	global_load_b32 v2, v[9:10], off offset:84
	global_load_b32 v9, v[0:1], off offset:720
	v_add_co_u32 v7, vcc_lo, s16, v3
	v_add_co_ci_u32_e32 v8, vcc_lo, s17, v4, vcc_lo
	v_add_co_u32 v5, vcc_lo, s12, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, s13, v6, vcc_lo
	s_waitcnt vmcnt(0)
	v_sub_f32_e32 v2, v2, v9
	global_store_b32 v[7:8], v2, off offset:84
	global_load_b32 v2, v[5:6], off offset:84
	global_load_b32 v0, v[0:1], off offset:80
	s_waitcnt vmcnt(0)
	v_sub_f32_e32 v2, v2, v0
	v_add_co_u32 v0, vcc_lo, s0, v3
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v4, vcc_lo
	global_store_b32 v[0:1], v2, off offset:84
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z17difference_signalPfS_S_S_S_S_S_S_S_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 76
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 13
		.amdhsa_next_free_sgpr 22
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end4:
	.size	_Z17difference_signalPfS_S_S_S_S_S_S_S_i, .Lfunc_end4-_Z17difference_signalPfS_S_S_S_S_S_S_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 484
; NumSgprs: 24
; NumVgprs: 13
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 24
; NumVGPRsForWavesPerEU: 13
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z16backpropagation1PfS_i ; -- Begin function _Z16backpropagation1PfS_i
	.globl	_Z16backpropagation1PfS_i
	.p2align	8
	.type	_Z16backpropagation1PfS_i,@function
_Z16backpropagation1PfS_i:              ; @_Z16backpropagation1PfS_i
; %bb.0:
	s_load_b32 s2, s[0:1], 0x24
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[0:1], null, s14, s2, v[2:3]
	v_mad_u64_u32 v[1:2], null, s15, s3, v[3:4]
	s_mov_b32 s2, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, -1, v0
	v_add_nc_u32_e32 v3, -1, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_max_u32_e32 v3, v2, v3
	v_cmpx_gt_u32_e32 0xc7, v3
	s_cbranch_execz .LBB5_2
; %bb.1:
	s_load_b32 s4, s[0:1], 0x10
	v_mul_lo_u32 v8, 0xc9, v1
	s_load_b128 s[0:3], s[0:1], 0x0
	v_ashrrev_i32_e32 v9, 31, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_4)
	v_dual_mov_b32 v3, 0 :: v_dual_add_nc_u32 v4, v8, v2
	v_ashrrev_i32_e32 v10, 31, v8
	v_add_nc_u32_e32 v1, v8, v0
	v_add_co_u32 v6, s5, v0, v8
	v_add_co_u32 v0, vcc_lo, v0, v8
	v_add_co_ci_u32_e32 v9, vcc_lo, v9, v10, vcc_lo
	v_add_co_ci_u32_e64 v7, null, 0, 0, s5
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s4, s4, 0x9dd1
	v_dual_mov_b32 v5, v3 :: v_dual_add_nc_u32 v2, 0xffffff37, v1
	s_add_i32 s5, s4, 0x9dd1
	v_lshlrev_b64 v[6:7], 2, v[6:7]
	s_ashr_i32 s6, s5, 31
	v_add_co_u32 v8, vcc_lo, v0, s5
	v_add_co_ci_u32_e32 v9, vcc_lo, s6, v9, vcc_lo
	v_lshlrev_b64 v[10:11], 2, v[2:3]
	v_lshlrev_b64 v[12:13], 2, v[4:5]
	v_mov_b32_e32 v2, v3
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_lshlrev_b64 v[8:9], 2, v[8:9]
	v_add_co_u32 v10, vcc_lo, s2, v10
	v_add_co_ci_u32_e32 v11, vcc_lo, s3, v11, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v8, vcc_lo, s0, v8
	v_add_co_ci_u32_e32 v9, vcc_lo, s1, v9, vcc_lo
	v_add_co_u32 v5, vcc_lo, s2, v6
	v_add_co_ci_u32_e32 v6, vcc_lo, s3, v7, vcc_lo
	global_load_b32 v7, v[10:11], off
	global_load_b32 v14, v[8:9], off offset:-804
	v_add_nc_u32_e32 v10, s5, v4
	v_add_co_u32 v3, vcc_lo, s2, v12
	v_add_co_ci_u32_e32 v4, vcc_lo, s3, v13, vcc_lo
	v_lshlrev_b64 v[12:13], 2, v[1:2]
	global_load_b32 v15, v[8:9], off offset:804
	s_clause 0x1
	global_load_b32 v16, v[5:6], off offset:804
	global_load_b32 v4, v[3:4], off
	v_add_nc_u32_e32 v0, s4, v1
	v_add_co_u32 v12, vcc_lo, s2, v12
	v_add_co_ci_u32_e32 v13, vcc_lo, s3, v13, vcc_lo
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, dt@rel32@lo+4
	s_addc_u32 s3, s3, dt@rel32@hi+12
	s_load_b32 s4, s[2:3], 0x0
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, h@rel32@lo+4
	s_addc_u32 s3, s3, h@rel32@hi+12
	s_load_b32 s2, s[2:3], 0x0
	s_waitcnt vmcnt(4)
	v_add_f32_e32 v7, 1.0, v7
	v_ashrrev_i32_e32 v11, 31, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[2:3], 2, v[10:11]
	v_add_nc_u32_e32 v10, s5, v1
	v_add_co_u32 v2, vcc_lo, s0, v2
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
	s_clause 0x1
	global_load_b32 v5, v[5:6], off offset:4
	global_load_b32 v6, v[12:13], off
	s_clause 0x1
	global_load_b32 v12, v[2:3], off
	global_load_b32 v8, v[8:9], off offset:4
	v_ashrrev_i32_e32 v11, 31, v10
	v_add_nc_u32_e32 v1, 0x13ba2, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[10:11], 2, v[10:11]
	v_add_co_u32 v2, vcc_lo, s0, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v11, vcc_lo
	global_load_b32 v3, v[2:3], off
	s_waitcnt vmcnt(3)
	v_add_f32_e32 v6, 1.0, v6
	v_ashrrev_i32_e32 v2, 31, v1
	v_dual_add_f32 v5, 1.0, v5 :: v_dual_mul_f32 v6, -4.0, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, vcc_lo, s0, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
	global_load_b32 v2, v[1:2], off
	v_add_f32_e32 v1, 1.0, v16
	v_dual_mul_f32 v1, v1, v15 :: v_dual_add_f32 v4, 1.0, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v1, v7, v14
	s_waitcnt vmcnt(3)
	v_fmac_f32_e32 v1, v4, v12
	s_waitcnt lgkmcnt(0)
	v_mul_f32_e64 v4, s4, s4
	s_waitcnt vmcnt(2)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v5, v8
	v_mul_f32_e32 v4, 0x4a095440, v4
	v_mul_f32_e64 v5, s2, s2
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v1, v3, v6
	v_mul_f32_e32 v1, v4, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_scale_f32 v4, null, v5, v5, v1
	v_div_scale_f32 v8, vcc_lo, v1, v5, v1
	v_rcp_f32_e32 v6, v4
	s_waitcnt_depctr 0xfff
	v_fma_f32 v7, -v4, v6, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v6, v7, v6
	v_mul_f32_e32 v7, v8, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v9, -v4, v7, v8
	v_fmac_f32_e32 v7, v9, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v4, -v4, v7, v8
	v_div_fmas_f32 v4, v4, v6, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_fixup_f32 v4, v4, v5, v1
	v_ashrrev_i32_e32 v1, 31, v0
	v_fmac_f32_e32 v4, 2.0, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_waitcnt vmcnt(0)
	v_sub_f32_e32 v2, v4, v2
	global_store_b32 v[0:1], v2, off
.LBB5_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16backpropagation1PfS_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 17
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end5:
	.size	_Z16backpropagation1PfS_i, .Lfunc_end5-_Z16backpropagation1PfS_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 876
; NumSgprs: 18
; NumVgprs: 17
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 17
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z16backpropagation2PfS_S_S_S_i ; -- Begin function _Z16backpropagation2PfS_S_S_S_i
	.globl	_Z16backpropagation2PfS_S_S_S_i
	.p2align	8
	.type	_Z16backpropagation2PfS_S_S_S_i,@function
_Z16backpropagation2PfS_S_S_S_i:        ; @_Z16backpropagation2PfS_S_S_S_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s12, s[0:1], 0x28
	s_load_b256 s[4:11], s[0:1], 0x0
	v_subrev_nc_u32_e32 v1, 21, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_u32_e32 vcc_lo, 0x9f, v1
	v_mul_u32_u24_e32 v1, 0xc9, v0
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s2, s12, 0x9dd1
	s_and_saveexec_b32 s3, vcc_lo
	s_cbranch_execz .LBB6_2
; %bb.1:
	v_mad_u64_u32 v[2:3], null, 0xc9, s12, v[0:1]
	s_load_b64 s[0:1], s[0:1], 0x20
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[4:5], null, 0x9d08, s12, v[2:3]
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v7, vcc_lo, s6, v2
	v_add_co_ci_u32_e32 v8, vcc_lo, s7, v3, vcc_lo
	s_getpc_b64 s[6:7]
	s_add_u32 s6, s6, h@rel32@lo+4
	s_addc_u32 s7, s7, h@rel32@hi+12
	s_load_b32 s6, s[6:7], 0x0
	v_add_nc_u32_e32 v5, 0x8c8b, v4
	global_load_b32 v11, v[7:8], off
	v_add_nc_u32_e32 v7, 0x107d, v4
	s_ashr_i32 s7, s2, 31
	v_ashrrev_i32_e32 v6, 31, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v8, 31, v7
	v_lshlrev_b64 v[5:6], 2, v[5:6]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[7:8], 2, v[7:8]
	v_add_co_u32 v5, vcc_lo, s4, v5
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v6, vcc_lo, s5, v6, vcc_lo
	v_add_co_u32 v9, vcc_lo, s10, v2
	v_add_co_ci_u32_e32 v10, vcc_lo, s11, v3, vcc_lo
	global_load_b32 v12, v[5:6], off
	v_add_nc_u32_e32 v5, 0x8d54, v4
	v_add_nc_u32_e32 v4, 0xfb4, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v6, 31, v5
	v_lshlrev_b64 v[5:6], 2, v[5:6]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v5, vcc_lo, s4, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, s5, v6, vcc_lo
	v_add_co_u32 v7, vcc_lo, s4, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s5, v8, vcc_lo
	s_waitcnt vmcnt(1) lgkmcnt(0)
	v_mul_f32_e32 v11, s6, v11
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_fmac_f32_e32 v12, 0x447a0000, v11
	global_store_b32 v[5:6], v12, off
	global_load_b32 v10, v[9:10], off
	global_load_b32 v11, v[7:8], off
	v_ashrrev_i32_e32 v5, 31, v4
	v_add_co_u32 v6, s10, v1, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v7, null, 0, s7, s10
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	v_add_co_u32 v8, vcc_lo, s8, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_lshlrev_b64 v[6:7], 2, v[6:7]
	v_add_co_ci_u32_e32 v9, vcc_lo, s9, v3, vcc_lo
	v_add_co_u32 v4, vcc_lo, s4, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_u32 v6, vcc_lo, s4, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v7, vcc_lo
	v_add_co_u32 v2, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
	s_waitcnt vmcnt(1)
	v_mul_f32_e32 v10, s6, v10
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_fmac_f32_e32 v11, 0x447a0000, v10
	global_store_b32 v[4:5], v11, off
	global_load_b32 v4, v[8:9], off
	s_clause 0x1
	global_load_b32 v5, v[6:7], off offset:716
	global_load_b32 v8, v[6:7], off offset:84
	s_waitcnt vmcnt(2)
	v_mul_f32_e32 v4, s6, v4
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v5, 0x447a0000, v4
	global_store_b32 v[6:7], v5, off offset:720
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(0)
	v_mul_f32_e32 v2, s6, v2
	v_fmac_f32_e32 v8, 0x447a0000, v2
	global_store_b32 v[6:7], v8, off offset:80
.LBB6_2:
	s_or_b32 exec_lo, exec_lo, s3
	v_add_nc_u32_e32 v2, -1, v0
	s_mov_b32 s0, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e32 0xc7, v2
	s_cbranch_execz .LBB6_4
; %bb.3:
	v_add_nc_u32_e32 v2, s2, v0
	s_ashr_i32 s1, s2, 31
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v4, 0x9c3f, v2
	v_ashrrev_i32_e32 v3, 31, v2
	v_ashrrev_i32_e32 v5, 31, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[6:7], 2, v[2:3]
	v_lshlrev_b64 v[3:4], 2, v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v5, vcc_lo, s4, v6
	v_add_co_ci_u32_e32 v6, vcc_lo, s5, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v3, vcc_lo, s4, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
	v_add_co_u32 v7, s3, v1, s2
	s_clause 0x1
	global_load_b32 v9, v[5:6], off offset:804
	global_load_b32 v10, v[3:4], off
	v_add_nc_u32_e32 v3, 0x9d08, v2
	v_add_co_ci_u32_e64 v8, null, 0, s1, s3
	v_mad_u32_u24 v1, 0xc8, v0, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v4, 31, v3
	v_lshlrev_b64 v[7:8], 2, v[7:8]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v2, 31, v1
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v7, vcc_lo, s4, v7
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_ci_u32_e32 v8, vcc_lo, s5, v8, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_co_u32 v3, vcc_lo, s4, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
	v_add_co_u32 v1, vcc_lo, s4, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s5, v2, vcc_lo
	s_waitcnt vmcnt(1)
	global_store_b32 v[5:6], v9, off
	s_waitcnt vmcnt(0)
	global_store_b32 v[3:4], v10, off
	s_clause 0x1
	global_load_b32 v3, v[7:8], off offset:4
	global_load_b32 v4, v[1:2], off offset:796
	s_waitcnt vmcnt(1)
	global_store_b32 v[1:2], v3, off
	s_waitcnt vmcnt(0)
	global_store_b32 v[1:2], v4, off offset:800
.LBB6_4:
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB6_6
; %bb.5:
	s_ashr_i32 s3, s2, 31
	v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 0x27000
	s_lshl_b64 s[0:1], s[2:3], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s0, s4, s0
	s_addc_u32 s1, s5, s1
	s_clause 0x7
	global_load_b32 v2, v0, s[0:1] offset:4
	global_load_b32 v3, v0, s[0:1] offset:1604
	global_load_b32 v4, v1, s[0:1] offset:252
	global_load_b32 v5, v1, s[0:1] offset:1852
	global_load_b32 v6, v1, s[0:1] offset:1052
	global_load_b32 v7, v0, s[0:1] offset:804
	global_load_b32 v8, v0, s[0:1] offset:796
	global_load_b32 v9, v1, s[0:1] offset:1060
	s_waitcnt vmcnt(2)
	v_dual_add_f32 v5, v5, v6 :: v_dual_add_f32 v2, v2, v7
	s_waitcnt vmcnt(0)
	v_dual_add_f32 v3, v8, v3 :: v_dual_add_f32 v4, v9, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_mul_f32 v5, 0.5, v5 :: v_dual_mul_f32 v2, 0.5, v2
	v_dual_mul_f32 v3, 0.5, v3 :: v_dual_mul_f32 v4, 0.5, v4
	s_clause 0x3
	global_store_b32 v0, v2, s[0:1]
	global_store_b32 v0, v3, s[0:1] offset:800
	global_store_b32 v1, v4, s[0:1] offset:1056
	global_store_b32 v1, v5, s[0:1] offset:1856
.LBB6_6:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16backpropagation2PfS_S_S_S_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 44
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 13
		.amdhsa_next_free_sgpr 13
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end6:
	.size	_Z16backpropagation2PfS_S_S_S_i, .Lfunc_end6-_Z16backpropagation2PfS_S_S_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1108
; NumSgprs: 15
; NumVgprs: 13
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 1
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 15
; NumVGPRsForWavesPerEU: 13
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z8laplace1PfS_i        ; -- Begin function _Z8laplace1PfS_i
	.globl	_Z8laplace1PfS_i
	.p2align	8
	.type	_Z8laplace1PfS_i,@function
_Z8laplace1PfS_i:                       ; @_Z8laplace1PfS_i
; %bb.0:
	s_load_b32 s2, s[0:1], 0x24
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[0:1], null, s14, s2, v[2:3]
	v_mad_u64_u32 v[1:2], null, s15, s3, v[3:4]
	s_mov_b32 s2, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, -1, v0
	v_add_nc_u32_e32 v3, -1, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_max_u32_e32 v3, v2, v3
	v_cmpx_gt_u32_e32 0xc7, v3
	s_cbranch_execz .LBB7_2
; %bb.1:
	s_load_b32 s2, s[0:1], 0x10
	v_mul_lo_u32 v4, 0xc9, v1
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s4, s2, 0x9dd1
	s_load_b128 s[0:3], s[0:1], 0x0
	s_add_i32 s5, s4, 0xffffff37
	s_add_i32 s6, s4, 0xc9
	s_delay_alu instid0(VALU_DEP_1)
	v_add3_u32 v3, s5, v0, v4
	s_add_i32 s5, s4, 1
	v_add3_u32 v7, s6, v0, v4
	v_add3_u32 v1, v2, s4, v4
	v_add3_u32 v5, v0, s4, v4
	v_add3_u32 v9, s5, v0, v4
	v_ashrrev_i32_e32 v4, 31, v3
	v_ashrrev_i32_e32 v8, 31, v7
	v_ashrrev_i32_e32 v2, 31, v1
	v_ashrrev_i32_e32 v6, 31, v5
	v_ashrrev_i32_e32 v10, 31, v9
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_lshlrev_b64 v[7:8], 2, v[7:8]
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	v_lshlrev_b64 v[5:6], 2, v[5:6]
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s0, v3
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v4, vcc_lo
	v_add_co_u32 v7, vcc_lo, s0, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s1, v8, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_clause 0x1
	global_load_b32 v4, v[2:3], off
	global_load_b32 v7, v[7:8], off
	v_add_co_u32 v2, vcc_lo, s0, v9
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v10, vcc_lo
	global_load_b32 v8, v[0:1], off
	v_add_co_u32 v0, vcc_lo, s0, v5
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v6, vcc_lo
	s_clause 0x1
	global_load_b32 v2, v[2:3], off
	global_load_b32 v0, v[0:1], off
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, h@rel32@lo+4
	s_addc_u32 s1, s1, h@rel32@hi+12
	s_load_b32 s0, s[0:1], 0x0
	s_waitcnt vmcnt(3)
	v_add_f32_e32 v1, v4, v7
	s_waitcnt vmcnt(2)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f32_e32 v1, v1, v8
	s_waitcnt vmcnt(1)
	v_add_f32_e32 v1, v1, v2
	s_waitcnt lgkmcnt(0)
	v_mul_f32_e64 v2, s0, s0
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v1, -4.0, v0
	v_div_scale_f32 v0, null, v2, v2, v1
	v_div_scale_f32 v7, vcc_lo, v1, v2, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v3, v0
	s_waitcnt_depctr 0xfff
	v_fma_f32 v4, -v0, v3, 1.0
	v_fmac_f32_e32 v3, v4, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v4, v7, v3
	v_fma_f32 v8, -v0, v4, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v4, v8, v3
	v_fma_f32 v0, -v0, v4, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v0, v0, v3, v4
	v_div_fixup_f32 v2, v0, v2, v1
	v_add_co_u32 v0, vcc_lo, s2, v5
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v6, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB7_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z8laplace1PfS_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 11
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end7:
	.size	_Z8laplace1PfS_i, .Lfunc_end7-_Z8laplace1PfS_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 576
; NumSgprs: 18
; NumVgprs: 11
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 11
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z8laplace2PfS_i        ; -- Begin function _Z8laplace2PfS_i
	.globl	_Z8laplace2PfS_i
	.p2align	8
	.type	_Z8laplace2PfS_i,@function
_Z8laplace2PfS_i:                       ; @_Z8laplace2PfS_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x10
	s_load_b128 s[4:7], s[0:1], 0x0
	v_add_nc_u32_e32 v1, -1, v0
	s_mov_b32 s1, exec_lo
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s2, s2, 0x9dd1
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e32 0xc7, v1
	s_cbranch_execz .LBB8_2
; %bb.1:
	v_add_nc_u32_e32 v1, s2, v0
	s_ashr_i32 s0, s2, 31
	v_add_co_u32 v3, s3, s2, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v4, null, s0, 0, s3
	v_ashrrev_i32_e32 v2, 31, v1
	s_getpc_b64 s[8:9]
	s_add_u32 s8, s8, h@rel32@lo+4
	s_addc_u32 s9, s9, h@rel32@hi+12
	s_load_b32 s0, s[8:9], 0x0
	v_lshlrev_b64 v[5:6], 2, v[1:2]
	v_lshlrev_b64 v[2:3], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v7, vcc_lo, s4, v5
	v_add_co_ci_u32_e32 v8, vcc_lo, s5, v6, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v2, vcc_lo, s4, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_clause 0x3
	global_load_b32 v4, v[7:8], off
	global_load_b32 v7, v[7:8], off offset:804
	global_load_b32 v8, v[2:3], off offset:-4
	global_load_b32 v2, v[2:3], off offset:4
	s_waitcnt lgkmcnt(0)
	v_mul_f32_e64 v16, s0, s0
	s_waitcnt vmcnt(2)
	v_add_f32_e32 v3, v4, v7
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f32_e32 v3, v3, v8
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v15, v3, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v15, -4.0, v4
	v_div_scale_f32 v13, null, v16, v16, v15
	v_div_scale_f32 v14, vcc_lo, v15, v16, v15
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v17, v13
	s_waitcnt_depctr 0xfff
	v_fma_f32 v2, -v13, v17, 1.0
	v_fmac_f32_e32 v17, v2, v17
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f32_e32 v18, v14, v17
	v_add_nc_u32_e32 v2, 0x9d08, v1
	v_add_nc_u32_e32 v7, 0x9c3f, v1
	v_add_nc_u32_e32 v9, 0x9d07, v1
	v_add_nc_u32_e32 v11, 0x9d09, v1
	v_fma_f32 v4, -v13, v18, v14
	v_ashrrev_i32_e32 v3, 31, v2
	v_ashrrev_i32_e32 v8, 31, v7
	v_ashrrev_i32_e32 v10, 31, v9
	v_ashrrev_i32_e32 v12, 31, v11
	v_fmac_f32_e32 v18, v4, v17
	v_add_co_u32 v4, s0, s6, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v5, s0, s7, v6, s0
	v_fma_f32 v6, -v13, v18, v14
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	v_lshlrev_b64 v[7:8], 2, v[7:8]
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	v_lshlrev_b64 v[11:12], 2, v[11:12]
	v_div_fmas_f32 v17, v6, v17, v18
	v_add_co_u32 v13, s0, s4, v2
	v_add_co_u32 v6, vcc_lo, s4, v7
	s_delay_alu instid0(VALU_DEP_3)
	v_div_fixup_f32 v15, v17, v16, v15
	v_add_co_ci_u32_e64 v14, s0, s5, v3, s0
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v8, vcc_lo
	v_add_co_u32 v8, vcc_lo, s4, v9
	v_add_co_ci_u32_e32 v9, vcc_lo, s5, v10, vcc_lo
	global_store_b32 v[4:5], v15, off
	s_clause 0x1
	global_load_b32 v10, v[13:14], off
	global_load_b32 v6, v[6:7], off
	v_add_co_u32 v4, vcc_lo, s4, v11
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v12, vcc_lo
	s_clause 0x1
	global_load_b32 v7, v[8:9], off
	global_load_b32 v4, v[4:5], off
	s_waitcnt vmcnt(2)
	v_add_f32_e32 v5, v10, v6
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f32_e32 v5, v5, v7
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v12, v5, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v12, -4.0, v10
	v_div_scale_f32 v10, null, v16, v16, v12
	v_div_scale_f32 v13, vcc_lo, v12, v16, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v11, v10
	s_waitcnt_depctr 0xfff
	v_fma_f32 v4, -v10, v11, 1.0
	v_fmac_f32_e32 v11, v4, v11
	v_mad_u32_u24 v4, 0xc8, v0, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v14, v13, v11
	v_add_nc_u32_e32 v6, 0xffffff37, v4
	v_ashrrev_i32_e32 v5, 31, v4
	v_add_nc_u32_e32 v8, 0xc9, v4
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f32 v1, -v10, v14, v13
	v_ashrrev_i32_e32 v7, 31, v6
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	v_ashrrev_i32_e32 v9, 31, v8
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v14, v1, v11
	v_add_co_u32 v1, s0, s6, v2
	v_add_co_ci_u32_e64 v2, s0, s7, v3, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f32 v10, -v10, v14, v13
	v_lshlrev_b64 v[6:7], 2, v[6:7]
	v_lshlrev_b64 v[8:9], 2, v[8:9]
	v_div_fmas_f32 v3, v10, v11, v14
	v_add_co_u32 v10, vcc_lo, s4, v4
	v_add_co_ci_u32_e32 v11, vcc_lo, s5, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_div_fixup_f32 v3, v3, v16, v12
	v_add_co_u32 v6, vcc_lo, s4, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v7, vcc_lo
	global_store_b32 v[1:2], v3, off
	global_load_b64 v[1:2], v[10:11], off
	v_add_co_u32 v8, vcc_lo, s4, v8
	v_add_co_ci_u32_e32 v9, vcc_lo, s5, v9, vcc_lo
	s_clause 0x1
	global_load_b32 v3, v[6:7], off
	global_load_b32 v12, v[8:9], off
	s_waitcnt vmcnt(2)
	v_add_f32_e32 v2, v1, v2
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f32_e32 v2, v2, v3
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v3, v2, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v3, -4.0, v1
	v_div_scale_f32 v1, null, v16, v16, v3
	v_div_scale_f32 v13, vcc_lo, v3, v16, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v2, v1
	s_waitcnt_depctr 0xfff
	v_fma_f32 v12, -v1, v2, 1.0
	v_fmac_f32_e32 v2, v12, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v12, v13, v2
	v_fma_f32 v14, -v1, v12, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v12, v14, v2
	v_fma_f32 v1, -v1, v12, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_div_fmas_f32 v12, v1, v2, v12
	v_add_co_u32 v1, vcc_lo, s6, v4
	v_add_co_ci_u32_e32 v2, vcc_lo, s7, v5, vcc_lo
	v_div_fixup_f32 v3, v12, v16, v3
	global_store_b32 v[1:2], v3, off
	s_clause 0x2
	global_load_b64 v[3:4], v[10:11], off offset:796
	global_load_b32 v5, v[6:7], off offset:800
	global_load_b32 v6, v[8:9], off offset:800
	s_waitcnt vmcnt(2)
	v_add_f32_e32 v3, v4, v3
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f32_e32 v3, v3, v5
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v3, v3, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v3, -4.0, v4
	v_div_scale_f32 v4, null, v16, v16, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v5, v4
	s_waitcnt_depctr 0xfff
	v_fma_f32 v6, -v4, v5, 1.0
	v_fmac_f32_e32 v5, v6, v5
	v_div_scale_f32 v6, vcc_lo, v3, v16, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v7, v6, v5
	v_fma_f32 v8, -v4, v7, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v7, v8, v5
	v_fma_f32 v4, -v4, v7, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v4, v4, v5, v7
	v_div_fixup_f32 v3, v4, v16, v3
	global_store_b32 v[1:2], v3, off offset:800
.LBB8_2:
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB8_4
; %bb.3:
	s_ashr_i32 s3, s2, 31
	v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 0x27000
	s_lshl_b64 s[0:1], s[2:3], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s0, s6, s0
	s_addc_u32 s1, s7, s1
	s_clause 0x7
	global_load_b32 v2, v0, s[0:1] offset:4
	global_load_b32 v3, v0, s[0:1] offset:1604
	global_load_b32 v4, v1, s[0:1] offset:252
	global_load_b32 v5, v1, s[0:1] offset:1852
	global_load_b32 v6, v1, s[0:1] offset:1052
	global_load_b32 v7, v0, s[0:1] offset:804
	global_load_b32 v8, v0, s[0:1] offset:796
	global_load_b32 v9, v1, s[0:1] offset:1060
	s_waitcnt vmcnt(2)
	v_dual_add_f32 v5, v5, v6 :: v_dual_add_f32 v2, v2, v7
	s_waitcnt vmcnt(0)
	v_dual_add_f32 v3, v8, v3 :: v_dual_add_f32 v4, v9, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_mul_f32 v5, 0.5, v5 :: v_dual_mul_f32 v2, 0.5, v2
	v_dual_mul_f32 v3, 0.5, v3 :: v_dual_mul_f32 v4, 0.5, v4
	s_clause 0x3
	global_store_b32 v0, v2, s[0:1]
	global_store_b32 v0, v3, s[0:1] offset:800
	global_store_b32 v1, v4, s[0:1] offset:1056
	global_store_b32 v1, v5, s[0:1] offset:1856
.LBB8_4:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z8laplace2PfS_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 20
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 19
		.amdhsa_next_free_sgpr 10
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end8:
	.size	_Z8laplace2PfS_i, .Lfunc_end8-_Z8laplace2PfS_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1352
; NumSgprs: 12
; NumVgprs: 19
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 1
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 12
; NumVGPRsForWavesPerEU: 19
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z17init_differentialPfS_S_S_ ; -- Begin function _Z17init_differentialPfS_S_S_
	.globl	_Z17init_differentialPfS_S_S_
	.p2align	8
	.type	_Z17init_differentialPfS_S_S_,@function
_Z17init_differentialPfS_S_S_:          ; @_Z17init_differentialPfS_S_S_
; %bb.0:
	s_load_b32 s2, s[0:1], 0x2c
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[0:1], null, s14, s2, v[2:3]
	v_mad_u64_u32 v[1:2], null, s15, s3, v[3:4]
	s_mov_b32 s2, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_max_i32_e32 v2, v0, v1
	v_cmpx_gt_i32_e32 0xc9, v2
	s_cbranch_execz .LBB9_2
; %bb.1:
	v_mad_u64_u32 v[2:3], null, 0xc9, v1, v[0:1]
	s_load_b256 s[0:7], s[0:1], 0x0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[0:1], 2, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, 0x27744, v0
	v_add_co_ci_u32_e32 v7, vcc_lo, 0, v1, vcc_lo
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s2, v6
	v_add_co_ci_u32_e32 v5, vcc_lo, s3, v7, vcc_lo
	v_add_co_u32 v6, vcc_lo, s4, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v7, vcc_lo
	global_load_b32 v2, v[2:3], off
	global_load_b32 v3, v[4:5], off
	global_load_b32 v4, v[6:7], off
	s_waitcnt vmcnt(0)
	v_dual_add_f32 v2, 1.0, v2 :: v_dual_mul_f32 v3, v3, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_scale_f32 v4, null, v2, v2, v3
	v_div_scale_f32 v7, vcc_lo, v3, v2, v3
	v_rcp_f32_e32 v5, v4
	s_waitcnt_depctr 0xfff
	v_fma_f32 v6, -v4, v5, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v5, v6, v5
	v_mul_f32_e32 v6, v7, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v8, -v4, v6, v7
	v_fmac_f32_e32 v6, v8, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v4, -v4, v6, v7
	v_div_fmas_f32 v4, v4, v5, v6
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_div_fixup_f32 v2, v4, v2, v3
	global_store_b32 v[0:1], v2, off
.LBB9_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z17init_differentialPfS_S_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end9:
	.size	_Z17init_differentialPfS_S_S_, .Lfunc_end9-_Z17init_differentialPfS_S_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 344
; NumSgprs: 18
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z19update_differentialPfS_S_S_i ; -- Begin function _Z19update_differentialPfS_S_S_i
	.globl	_Z19update_differentialPfS_S_S_i
	.p2align	8
	.type	_Z19update_differentialPfS_S_S_i,@function
_Z19update_differentialPfS_S_S_i:       ; @_Z19update_differentialPfS_S_S_i
; %bb.0:
	s_load_b32 s2, s[0:1], 0x34
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[0:1], null, s14, s2, v[2:3]
	v_mad_u64_u32 v[1:2], null, s15, s3, v[3:4]
	s_mov_b32 s2, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_max_i32_e32 v2, v0, v1
	v_cmpx_gt_i32_e32 0xc9, v2
	s_cbranch_execz .LBB10_2
; %bb.1:
	s_load_b32 s8, s[0:1], 0x20
	v_mad_u64_u32 v[2:3], null, 0xc9, v1, v[0:1]
	s_load_b256 s[0:7], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[0:1], null, 0x9dd1, s8, v[2:3]
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v1, 31, v0
	v_add_co_u32 v4, vcc_lo, s6, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v7, vcc_lo, s3, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
	global_load_b32 v4, v[4:5], off
	global_load_b32 v5, v[6:7], off
	global_load_b32 v6, v[0:1], off
	v_add_co_u32 v0, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v3, vcc_lo
	global_load_b32 v2, v[0:1], off
	s_waitcnt vmcnt(1)
	v_dual_add_f32 v3, 1.0, v4 :: v_dual_mul_f32 v4, v5, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_scale_f32 v5, null, v3, v3, v4
	v_rcp_f32_e32 v6, v5
	s_waitcnt_depctr 0xfff
	v_fma_f32 v7, -v5, v6, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v6, v7, v6
	v_div_scale_f32 v7, vcc_lo, v4, v3, v4
	v_mul_f32_e32 v8, v7, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v9, -v5, v8, v7
	v_fmac_f32_e32 v8, v9, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v5, -v5, v8, v7
	v_div_fmas_f32 v5, v5, v6, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_div_fixup_f32 v3, v5, v3, v4
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v2, v2, v3
	global_store_b32 v[0:1], v2, off
.LBB10_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z19update_differentialPfS_S_S_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end10:
	.size	_Z19update_differentialPfS_S_S_i, .Lfunc_end10-_Z19update_differentialPfS_S_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 384
; NumSgprs: 18
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z12update_fieldPfS_S_S_S_ ; -- Begin function _Z12update_fieldPfS_S_S_S_
	.globl	_Z12update_fieldPfS_S_S_S_
	.p2align	8
	.type	_Z12update_fieldPfS_S_S_S_,@function
_Z12update_fieldPfS_S_S_S_:             ; @_Z12update_fieldPfS_S_S_S_
; %bb.0:
	s_load_b32 s2, s[0:1], 0x34
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[0:1], null, s14, s2, v[2:3]
	v_mad_u64_u32 v[1:2], null, s15, s3, v[3:4]
	s_mov_b32 s2, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_max_i32_e32 v2, v0, v1
	v_cmpx_gt_i32_e32 0xc9, v2
	s_cbranch_execz .LBB11_2
; %bb.1:
	s_load_b256 s[4:11], s[0:1], 0x0
	v_mad_u64_u32 v[2:3], null, 0xc9, v1, v[0:1]
	v_subrev_nc_u32_e32 v0, 21, v0
	v_subrev_nc_u32_e32 v1, 21, v1
	s_load_b64 s[0:1], s[0:1], 0x20
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_max_u32_e32 v4, v0, v1
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_u32_e32 vcc_lo, 0x9f, v4
	v_lshlrev_b64 v[0:1], 2, v[2:3]
	v_cndmask_b32_e64 v8, 0, 1.0, vcc_lo
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v2, s2, s4, v0
	v_add_co_ci_u32_e64 v3, s2, s5, v1, s2
	v_add_co_u32 v4, s2, s8, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v5, s2, s9, v1, s2
	v_add_co_u32 v6, s2, s6, v0
	v_add_co_ci_u32_e64 v7, s2, s7, v1, s2
	global_store_b32 v[2:3], v8, off
	global_load_b32 v2, v[4:5], off
	global_load_b32 v4, v[6:7], off
	v_cndmask_b32_e64 v3, 0, 0x469c4000, vcc_lo
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_fmac_f32_e32 v4, v3, v2
	v_add_co_u32 v2, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[6:7], v4, off
	v_add_co_u32 v0, vcc_lo, s10, v0
	global_load_b32 v2, v[2:3], off
	v_add_co_ci_u32_e32 v1, vcc_lo, s11, v1, vcc_lo
	s_waitcnt vmcnt(0)
	v_sub_f32_e32 v2, v4, v2
	global_store_b32 v[0:1], v2, off
.LBB11_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z12update_fieldPfS_S_S_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end11:
	.size	_Z12update_fieldPfS_S_S_S_, .Lfunc_end11-_Z12update_fieldPfS_S_S_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 336
; NumSgprs: 18
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z5resetPfS_S_S_S_      ; -- Begin function _Z5resetPfS_S_S_S_
	.globl	_Z5resetPfS_S_S_S_
	.p2align	8
	.type	_Z5resetPfS_S_S_S_,@function
_Z5resetPfS_S_S_S_:                     ; @_Z5resetPfS_S_S_S_
; %bb.0:
	s_load_b32 s2, s[0:1], 0x34
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[0:1], null, s14, s2, v[2:3]
	v_mad_u64_u32 v[1:2], null, s15, s3, v[3:4]
	s_mov_b32 s2, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_max_i32_e32 v2, v0, v1
	v_cmpx_gt_i32_e32 0xc9, v2
	s_cbranch_execz .LBB12_2
; %bb.1:
	s_load_b256 s[4:11], s[0:1], 0x0
	v_mad_u64_u32 v[2:3], null, 0xc9, v1, v[0:1]
	s_load_b64 s[0:1], s[0:1], 0x20
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[0:1], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	s_getpc_b64 s[4:5]
	s_add_u32 s4, s4, dt@rel32@lo+4
	s_addc_u32 s5, s5, dt@rel32@hi+12
	s_load_b32 s4, s[4:5], 0x0
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v2, 1.0, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v3, 0x4f800000, v2
	v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v2
	v_cndmask_b32_e32 v2, v2, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_sqrt_f32_e32 v3, v2
	s_waitcnt_depctr 0xfff
	v_add_nc_u32_e32 v4, -1, v3
	v_add_nc_u32_e32 v5, 1, v3
	v_fma_f32 v6, -v4, v3, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v7, -v5, v3, v2
	v_cmp_ge_f32_e64 s2, 0, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v3, v3, v4, s2
	v_cmp_lt_f32_e64 s2, 0, v7
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e64 v3, v3, v5, s2
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, hx@rel32@lo+4
	s_addc_u32 s3, s3, hx@rel32@hi+12
	s_load_b32 s2, s[2:3], 0x0
	v_mul_f32_e32 v4, 0x37800000, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v3, v3, v4, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v2, 0x260
	v_cndmask_b32_e32 v2, v3, v2, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v8, 0x44bb8000, v2
	s_waitcnt lgkmcnt(0)
	v_mul_f32_e32 v2, s4, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_scale_f32 v3, null, s2, s2, v2
	v_div_scale_f32 v6, vcc_lo, v2, s2, v2
	v_rcp_f32_e32 v4, v3
	s_waitcnt_depctr 0xfff
	v_fma_f32 v5, -v3, v4, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v4, v5, v4
	v_mul_f32_e32 v5, v6, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v7, -v3, v5, v6
	v_fmac_f32_e32 v5, v7, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v3, -v3, v5, v6
	v_div_fmas_f32 v3, v3, v4, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_div_fixup_f32 v9, v3, s2, v2
	s_mov_b32 s2, 0x3e76c4e1
	v_frexp_mant_f32_e64 v2, |v9|
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f32_e32 vcc_lo, 0x3f2aaaab, v2
	v_cndmask_b32_e64 v3, 0, 1, vcc_lo
	v_ldexp_f32 v2, v2, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f32_e32 v3, 1.0, v2
	v_add_f32_e32 v5, -1.0, v2
	v_add_f32_e32 v7, -1.0, v3
	v_rcp_f32_e32 v4, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v2, v2, v7
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v6, v5, v4
	v_mul_f32_e32 v10, v3, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v3, v6, v3, -v10
	v_fmac_f32_e32 v3, v6, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v2, v10, v3
	v_sub_f32_e32 v7, v5, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v5, v5, v7 :: v_dual_sub_f32 v10, v2, v10
	v_dual_sub_f32 v2, v5, v2 :: v_dual_sub_f32 v3, v10, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v2, v3, v2
	v_add_f32_e32 v2, v7, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v2, v4, v2
	v_add_f32_e32 v3, v6, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v4, v3, v6
	v_dual_mul_f32 v5, v3, v3 :: v_dual_sub_f32 v2, v2, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v4, v3, v3, -v5
	v_add_f32_e32 v6, v2, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v4, v3, v6
	v_add_f32_e32 v6, v5, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmaak_f32 v7, s2, v6, 0x3e91f4c4
	v_sub_f32_e32 v5, v6, v5
	v_dual_fmaak_f32 v7, v6, v7, 0x3ecccdef :: v_dual_sub_f32 v4, v4, v5
	v_mul_f32_e32 v12, v3, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v10, v6, v7
	v_fma_f32 v13, v6, v3, -v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v5, v6, v7, -v10
	v_fmac_f32_e32 v5, v4, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v7, v10, v5
	v_add_f32_e32 v11, 0x3f2aaaaa, v7
	v_fmac_f32_e32 v13, v6, v2
	v_sub_f32_e32 v10, v7, v10
	v_ldexp_f32 v2, v2, 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v13, v4, v3
	v_dual_sub_f32 v5, v5, v10 :: v_dual_add_f32 v10, 0xbf2aaaaa, v11
	v_ldexp_f32 v3, v3, 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f32_e32 v5, 0x31739010, v5
	v_sub_f32_e32 v7, v7, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v5, v5, v7
	v_add_f32_e32 v4, v11, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v7, v11, v4
	v_dual_add_f32 v5, v5, v7 :: v_dual_add_f32 v6, v12, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v11, v6, v12
	v_dual_mul_f32 v10, v6, v4 :: v_dual_sub_f32 v11, v13, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v7, v6, v4, -v10
	v_fmac_f32_e32 v7, v6, v5
	v_frexp_exp_i32_f32_e32 v5, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v7, v11, v4
	v_subrev_co_ci_u32_e32 v4, vcc_lo, 0, v5, vcc_lo
	v_cmp_eq_f32_e32 vcc_lo, 1.0, v9
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f32_e32 v5, v10, v7
	v_cvt_f32_i32_e32 v4, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_add_f32 v6, v3, v5 :: v_dual_mul_f32 v11, 0x3f317218, v4
	v_dual_sub_f32 v10, v5, v10 :: v_dual_sub_f32 v3, v6, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v3, v5, v3
	v_sub_f32_e32 v7, v7, v10
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v10, 0x3f317218, v4, -v11
	v_fmamk_f32 v4, v4, 0xb102e308, v10
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v2, v2, v7
	v_dual_add_f32 v2, v2, v3 :: v_dual_add_f32 v3, v11, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f32_e32 v5, v6, v2
	v_sub_f32_e32 v11, v3, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_add_f32 v7, v3, v5 :: v_dual_sub_f32 v4, v4, v11
	v_sub_f32_e32 v10, v7, v3
	v_sub_f32_e32 v6, v5, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v12, v7, v10
	v_sub_f32_e32 v2, v2, v6
	v_sub_f32_e32 v5, v5, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_add_f32 v6, v4, v2 :: v_dual_sub_f32 v3, v3, v12
	v_add_f32_e32 v3, v5, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v5, v6, v4
	v_sub_f32_e32 v2, v2, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f32_e32 v3, v6, v3
	v_sub_f32_e32 v6, v6, v5
	v_add_f32_e32 v10, v7, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v4, v4, v6 :: v_dual_sub_f32 v5, v10, v7
	v_add_f32_e32 v2, v2, v4
	v_cndmask_b32_e64 v4, 2.0, 1.0, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v3, v3, v5
	v_add_f32_e32 v2, v2, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v3, v10, v2
	v_dual_sub_f32 v5, v3, v10 :: v_dual_mul_f32 v6, v4, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v2, v2, v5
	v_fma_f32 v3, v4, v3, -v6
	v_cmp_class_f32_e64 vcc_lo, v6, 0x204
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v3, v4, v2
	v_add_f32_e32 v2, v6, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v5, v2, v6, vcc_lo
	v_cmp_eq_f32_e32 vcc_lo, 0x42b17218, v5
	v_cndmask_b32_e64 v7, 0, 0x37000000, vcc_lo
	v_cmp_neq_f32_e64 vcc_lo, 0x7f800000, |v5|
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v10, v5, v7
	v_trunc_f32_e32 v5, v4
	v_mul_f32_e32 v11, 0x3fb8aa3b, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f32 v12, 0x3fb8aa3b, v10, -v11
	v_rndne_f32_e32 v13, v11
	v_dual_fmamk_f32 v12, v10, 0x32a5705f, v12 :: v_dual_sub_f32 v11, v11, v13
	v_sub_f32_e32 v2, v2, v6
	v_cvt_i32_f32_e32 v6, v13
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f32_e32 v11, v11, v12
	v_sub_f32_e32 v2, v3, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_exp_f32_e32 v11, v11
	v_cndmask_b32_e32 v2, 0, v2, vcc_lo
	v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v10
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v3, v11, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_mul_f32 v6, 0.5, v4 :: v_dual_cndmask_b32 v3, 0, v3
	v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v10
	v_trunc_f32_e32 v11, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_dual_add_f32 v2, v7, v2 :: v_dual_cndmask_b32 v3, 0x7f800000, v3
	v_cmp_eq_f32_e32 vcc_lo, v5, v4
	v_cmp_neq_f32_e64 s2, v11, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f32 v2, v3, v2, v3
	v_cmp_eq_f32_e64 s3, 0x7f800000, v3
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v4, 1.0, v9, s2
	v_cndmask_b32_e64 v2, v2, v3, s3
	v_cmp_eq_f32_e64 s3, 0, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_bfi_b32 v2, 0x7fffffff, v2, v4
	v_cndmask_b32_e64 v3, 0x7f800000, 0, s3
	v_cndmask_b32_e64 v4, 0, v9, s2
	v_cmp_class_f32_e64 s2, v9, 0x204
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_cndmask_b32_e32 v5, 0x7fc00000, v2, vcc_lo
	v_cmp_gt_f32_e32 vcc_lo, 0, v9
	v_bfi_b32 v4, 0x7fffffff, v3, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v5, v2, v5, vcc_lo
	v_add_co_u32 v2, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v1, vcc_lo
	s_or_b32 vcc_lo, s3, s2
	v_cndmask_b32_e32 v6, v5, v4, vcc_lo
	v_add_co_u32 v4, vcc_lo, s8, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s9, v1, vcc_lo
	v_cmp_o_f32_e32 vcc_lo, v9, v9
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_cndmask_b32_e32 v10, 0x7fc00000, v6, vcc_lo
	v_add_co_u32 v6, vcc_lo, s10, v0
	v_add_co_ci_u32_e32 v7, vcc_lo, s11, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_fma_f32 v11, v10, -4.0, 2.0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[2:3], v8, off
	global_store_b32 v[4:5], v9, off
	global_store_b32 v[6:7], v10, off
	global_store_b32 v[0:1], v11, off
.LBB12_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z5resetPfS_S_S_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 14
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end12:
	.size	_Z5resetPfS_S_S_S_, .Lfunc_end12-_Z5resetPfS_S_S_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1624
; NumSgprs: 18
; NumVgprs: 14
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 14
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.protected	hx                      ; @hx
	.type	hx,@object
	.data
	.globl	hx
	.p2align	2, 0x0
hx:
	.long	0x3a83126f                      ; float 0.00100000005
	.size	hx, 4

	.protected	hy                      ; @hy
	.type	hy,@object
	.globl	hy
	.p2align	2, 0x0
hy:
	.long	0x3a83126f                      ; float 0.00100000005
	.size	hy, 4

	.protected	h                       ; @h
	.type	h,@object
	.globl	h
	.p2align	2, 0x0
h:
	.long	0x3a83126f                      ; float 0.00100000005
	.size	h, 4

	.protected	T                       ; @T
	.type	T,@object
	.globl	T
	.p2align	2, 0x0
T:
	.long	0x390bce80                      ; float 1.33330002E-4
	.size	T, 4

	.protected	dt                      ; @dt
	.type	dt,@object
	.globl	dt
	.p2align	2, 0x0
dt:
	.long	0x34b2f487                      ; float 3.33330007E-7
	.size	dt, 4

	.protected	fre                     ; @fre
	.type	fre,@object
	.globl	fre
	.p2align	2, 0x0
fre:
	.long	0x47f42400                      ; float 125000
	.size	fre, 4

	.protected	omegac                  ; @omegac
	.type	omegac,@object
	.globl	omegac
	.p2align	2, 0x0
omegac:
	.long	0x493fbf80                      ; float 785400
	.size	omegac, 4

	.protected	tao                     ; @tao
	.type	tao,@object
	.globl	tao
	.p2align	2, 0x0
tao:
	.long	0x368637bd                      ; float 3.99999999E-6
	.size	tao, 4

	.protected	tt                      ; @tt
	.type	tt,@object
	.globl	tt
	.p2align	2, 0x0
tt:
	.long	0x3708db56                      ; float 8.15729982E-6
	.size	tt, 4

	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym hx
	.addrsig_sym h
	.addrsig_sym dt
	.addrsig_sym omegac
	.addrsig_sym tao
	.addrsig_sym tt
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         48
        .size:           8
        .value_kind:     global_buffer
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         60
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         64
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         68
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         70
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         72
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         74
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         76
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         78
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         112
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         120
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 312
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z11field_setupPfS_S_S_S_S_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     21
    .sgpr_spill_count: 0
    .symbol:         _Z11field_setupPfS_S_S_S_S_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     80
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .offset:         4
        .size:           4
        .value_kind:     by_value
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .offset:         12
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         48
        .size:           8
        .value_kind:     global_buffer
      - .offset:         56
        .size:           4
        .value_kind:     by_value
      - .offset:         64
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         68
        .size:           4
        .value_kind:     hidden_block_count_y
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