#include <iostream>
#include <string>
#include <stdlib.h>
#include <time.h>
#include <stdio.h>
using namespace std;

void print_matrix(float* matrix, int rows, int cols) {
    for (int i = 0; i < rows; ++i) {
        for (int j = 0; j < cols; ++j) 
            cout<<matrix[i*cols+j]<<" ";
        cout<<endl;
    }
}

void cpu(float* matrix, float* transpose, int rows, int cols)
{
    for (int i = 0; i < rows; ++i)
        for (int j = 0; j < cols; ++j)
            transpose[j*rows+i] = matrix[i*cols+j];
}

__global__ void naive_gpu(float* matrix, float* transpose, int rows, int cols) {
    int i = blockIdx.y * blockDim.y + threadIdx.y;
    int j = blockIdx.x * blockDim.x + threadIdx.x;
    if ((i >= rows) || (j >= cols)) {
        return;
    }
    int index_in = i * cols + j;
    int index_out = j * rows + i;
    transpose[index_out] = matrix[index_in];
}

const int BLOCK_SIZE_X = 32;
const int BLOCK_SIZE_Y = 32;
__global__ void shared_memory(float* matrix, float* transpose, int rows, int cols) {
    __shared__ float mat[BLOCK_SIZE_X][BLOCK_SIZE_Y];
    int bx = blockIdx.x * BLOCK_SIZE_X;
    int by = blockIdx.y * BLOCK_SIZE_Y;
    int i = by + threadIdx.y; int j = bx +threadIdx.x;
    int ti = bx + threadIdx.y; int tj = by + threadIdx.x;
    if ((i < rows) && (j < cols))
        mat[threadIdx.x][threadIdx.y] = matrix[i * cols + j];
    __syncthreads();
    if ((tj < rows) && (ti < cols))
        transpose[ti * rows + tj] = mat[threadIdx.y][threadIdx.x];
}

__global__ void no_bank_conflict(float * matrix, float * transpose, int rows, int cols) {
    __shared__ float mat[BLOCK_SIZE_X][BLOCK_SIZE_Y + 1];
    int bx = blockIdx.x * BLOCK_SIZE_X;
    int by = blockIdx.y * BLOCK_SIZE_Y;
    int i = by + threadIdx.y; int j = bx +threadIdx.x;
    int ti = bx + threadIdx.y; int tj = by + threadIdx.x;
    if ((i < rows) && (j < cols))
        mat[threadIdx.x][threadIdx.y] = matrix[i * cols + j];
    __syncthreads();
    if ((tj < rows) && (ti < cols))
        transpose[ti * rows + tj] = mat[threadIdx.y][threadIdx.x];
}


const int TILE = 32;
const int SIDE = 8;
__global__ void loop_unrolled(float * matrix, float * transpose, int rows, int cols) {
    __shared__ float mat[TILE][TILE + 1];
    int x = blockIdx.x * TILE + threadIdx.x;
    int y = blockIdx.y * TILE + threadIdx.y;
#pragma unroll
    for(int k = 0; k < TILE ; k += SIDE) {
        if(x < rows && y + k < cols)
            mat[threadIdx.y+k][threadIdx.x] = matrix[(y + k)*rows + x];
    }
    __syncthreads();
    x = blockIdx.y * TILE + threadIdx.x;
    y = blockIdx.x * TILE + threadIdx.y;
#pragma unroll
    for(int k = 0; k < TILE; k += SIDE) {
        if(x < cols && y + k < rows)
            transpose[(y + k) * cols + x] = mat[threadIdx.x][threadIdx.y+k];
    }
}


int main(int argc, char *argv[])
{
    int rows = 4000;
    int cols = 4000;
    string ver = "cpu";
    if (argc == 1) {
        ;
    } else if (argc == 3) {
        string str1 = argv[1];
        rows = atoi(str1.c_str());
        string str2 = argv[2];
        cols = atoi(str2.c_str());
    } else if (argc == 4) {
        string str1 = argv[1];
        rows = atoi(str1.c_str());
        string str2 = argv[2];
        cols = atoi(str2.c_str());
        ver = argv[3];
        if ((ver != "cpu") && (ver != "naive_gpu") && (ver != "shared_memory")\
         && (ver != "no_bank_conflict") && (ver != "loop_unrolled")) {
            cout<<"Wrong parameters of program version, you can only choose from following:";
            cout<<" cpu, naive_gpu, shared_memory, no_bank_conflict, loop_unrolled."<<endl;
            return 1;
        }
    } else {
        cout<<"Wrong number of parameters."<<endl;
        return 1;
    }
    if ((rows <= 0) || (cols <= 0)) {
        cout<<"Wrong parameters of the the matrix dimension, should be two positive numbers.";
        cout<<endl;
        return 1;
    }
    cout<<"Matrix Dimension: ("<<rows<<", "<<cols<<")"<<endl;
    cout<<"Program Version: "<<ver<<endl;
    
    float* matrix = new float[rows*cols];
    float* transpose = new float[rows*cols]; 
    srand((unsigned)time(NULL));
    for (int i = 0; i < rows; ++i)
        for (int j = 0; j < cols; ++j)
            matrix[i*cols+j] = rand();
    
    if (ver == "cpu") {
        cudaEvent_t start, stop;
        cudaEventCreate(&start);
        cudaEventCreate(&stop);
        cudaEventRecord(start, 0);
        for (int iter = 0; iter < 100; ++iter)
            cpu(matrix, transpose, rows, cols);    
        cudaEventRecord(stop, 0);
        cudaEventSynchronize(stop);
        float elapsedTime=0;
        cudaEventElapsedTime(&elapsedTime, start, stop);
        printf("Elapsed time：%f <ms>\n", elapsedTime);    
        cudaEventDestroy(start);
        cudaEventDestroy(stop);
    }
    else {
        float *dev_matrix, *dev_transpose;         
        cudaMalloc((void**)&dev_matrix, rows*cols*sizeof(float));  
        cudaMalloc((void**)&dev_transpose, rows*cols*sizeof(float));
        cudaMemcpy(dev_matrix, matrix, rows*cols*sizeof(float), cudaMemcpyHostToDevice);
        
        cudaEvent_t start, stop;
        cudaEventCreate(&start);
        cudaEventCreate(&stop);
        cudaEventRecord(start, 0);
        dim3 dimGrad(cols/32+1,rows/32+1,1);
        dim3 dimBlock(32,32,1);
        if (ver == "naive_gpu") {
            naive_gpu<<<dimGrad, dimBlock>>>(dev_matrix, dev_transpose, rows, cols);
        } else if (ver == "shared_memory") {
            shared_memory<<<dimGrad, dimBlock>>>(dev_matrix, dev_transpose, rows, cols);
        } else if (ver == "no_bank_conflict") {
            no_bank_conflict<<<dimGrad, dimBlock>>>(dev_matrix, dev_transpose, rows, cols);
        } else {
            dim3 dimGrad(cols/32+1,rows/32+1,1);
            dim3 dimBlock(32,8,1);
            loop_unrolled<<<dimGrad, dimBlock>>>(dev_matrix, dev_transpose, cols, rows); 
        }
        cudaEventRecord(stop, 0);
        cudaEventSynchronize(stop);
        float elapsedTime=0;
        cudaEventElapsedTime(&elapsedTime, start, stop);
        printf("Elapsed time：%f <ms>\n", elapsedTime);
        cudaEventDestroy(start);
        cudaEventDestroy(stop);
        cudaMemcpy(transpose, dev_transpose, rows*cols*sizeof(float), cudaMemcpyDeviceToHost);
        
        //print_matrix(matrix, rows, cols);
        //printf("==========================\n");
        //print_matrix(transpose, cols, rows);
        
        cudaFree(dev_matrix);
        cudaFree(dev_transpose);
    }
    free(matrix);
    free(transpose);
    return 0;
}

	.file	"tmpxft_0020a50f_00000000-6_matrix_main.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3640:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3640:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.align 2
	.type	_ZNSolsEPFRSoS_E.isra.0, @function
_ZNSolsEPFRSoS_E.isra.0:
.LFB4311:
	.cfi_startproc
	jmp	*%rsi
	.cfi_endproc
.LFE4311:
	.size	_ZNSolsEPFRSoS_E.isra.0, .-_ZNSolsEPFRSoS_E.isra.0
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	" "
	.text
	.globl	_Z12print_matrixPfii
	.type	_Z12print_matrixPfii, @function
_Z12print_matrixPfii:
.LFB3635:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movl	%esi, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	xorl	%r13d, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	xorl	%r12d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rdi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%edx, %ebx
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
.L4:
	cmpl	%r14d, %r13d
	jge	.L3
	movslq	%r12d, %rax
	xorl	%r15d, %r15d
	leaq	0(%rbp,%rax,4), %rcx
.L7:
	cmpl	%r15d, %ebx
	jle	.L10
	leaq	_ZSt4cout(%rip), %rdi
	cvtss2sd	(%rcx,%r15,4), %xmm0
	movq	%rcx, 8(%rsp)
	incq	%r15
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC0(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	8(%rsp), %rcx
	jmp	.L7
.L10:
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	incl	%r13d
	addl	%ebx, %r12d
	call	_ZNSolsEPFRSoS_E.isra.0
	jmp	.L4
.L3:
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3635:
	.size	_Z12print_matrixPfii, .-_Z12print_matrixPfii
	.globl	_Z3cpuPfS_ii
	.type	_Z3cpuPfS_ii, @function
_Z3cpuPfS_ii:
.LFB3636:
	.cfi_startproc
	endbr64
	movslq	%edx, %r11
	xorl	%r10d, %r10d
	movq	%rdi, %r8
	xorl	%r9d, %r9d
	salq	$2, %r11
	cmpl	%edx, %r10d
	jl	.L20
	ret
.L20:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
.L18:
	movslq	%r9d, %rax
	movq	%rsi, %rdi
	leaq	(%r8,%rax,4), %rbx
	xorl	%eax, %eax
.L15:
	cmpl	%eax, %ecx
	jle	.L21
	movss	(%rbx,%rax,4), %xmm0
	incq	%rax
	movss	%xmm0, (%rdi)
	addq	%r11, %rdi
	jmp	.L15
.L21:
	incl	%r10d
	addq	$4, %rsi
	addl	%ecx, %r9d
	cmpl	%edx, %r10d
	jl	.L18
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3636:
	.size	_Z3cpuPfS_ii, .-_Z3cpuPfS_ii
	.globl	_Z32__device_stub__Z9naive_gpuPfS_iiPfS_ii
	.type	_Z32__device_stub__Z9naive_gpuPfS_iiPfS_ii, @function
_Z32__device_stub__Z9naive_gpuPfS_iiPfS_ii:
.LFB3662:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L22
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z9naive_gpuPfS_ii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L22:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L24
	call	__stack_chk_fail@PLT
.L24:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3662:
	.size	_Z32__device_stub__Z9naive_gpuPfS_iiPfS_ii, .-_Z32__device_stub__Z9naive_gpuPfS_iiPfS_ii
	.globl	_Z9naive_gpuPfS_ii
	.type	_Z9naive_gpuPfS_ii, @function
_Z9naive_gpuPfS_ii:
.LFB3663:
	.cfi_startproc
	endbr64
	jmp	_Z32__device_stub__Z9naive_gpuPfS_iiPfS_ii
	.cfi_endproc
.LFE3663:
	.size	_Z9naive_gpuPfS_ii, .-_Z9naive_gpuPfS_ii
	.globl	_Z37__device_stub__Z13shared_memoryPfS_iiPfS_ii
	.type	_Z37__device_stub__Z13shared_memoryPfS_iiPfS_ii, @function
_Z37__device_stub__Z13shared_memoryPfS_iiPfS_ii:
.LFB3664:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L27
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z13shared_memoryPfS_ii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L27:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L29
	call	__stack_chk_fail@PLT
.L29:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3664:
	.size	_Z37__device_stub__Z13shared_memoryPfS_iiPfS_ii, .-_Z37__device_stub__Z13shared_memoryPfS_iiPfS_ii
	.globl	_Z13shared_memoryPfS_ii
	.type	_Z13shared_memoryPfS_ii, @function
_Z13shared_memoryPfS_ii:
.LFB3665:
	.cfi_startproc
	endbr64
	jmp	_Z37__device_stub__Z13shared_memoryPfS_iiPfS_ii
	.cfi_endproc
.LFE3665:
	.size	_Z13shared_memoryPfS_ii, .-_Z13shared_memoryPfS_ii
	.globl	_Z40__device_stub__Z16no_bank_conflictPfS_iiPfS_ii
	.type	_Z40__device_stub__Z16no_bank_conflictPfS_iiPfS_ii, @function
_Z40__device_stub__Z16no_bank_conflictPfS_iiPfS_ii:
.LFB3666:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L32
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z16no_bank_conflictPfS_ii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L32:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L34
	call	__stack_chk_fail@PLT
.L34:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3666:
	.size	_Z40__device_stub__Z16no_bank_conflictPfS_iiPfS_ii, .-_Z40__device_stub__Z16no_bank_conflictPfS_iiPfS_ii
	.globl	_Z16no_bank_conflictPfS_ii
	.type	_Z16no_bank_conflictPfS_ii, @function
_Z16no_bank_conflictPfS_ii:
.LFB3667:
	.cfi_startproc
	endbr64
	jmp	_Z40__device_stub__Z16no_bank_conflictPfS_iiPfS_ii
	.cfi_endproc
.LFE3667:
	.size	_Z16no_bank_conflictPfS_ii, .-_Z16no_bank_conflictPfS_ii
	.globl	_Z37__device_stub__Z13loop_unrolledPfS_iiPfS_ii
	.type	_Z37__device_stub__Z13loop_unrolledPfS_iiPfS_ii, @function
_Z37__device_stub__Z13loop_unrolledPfS_iiPfS_ii:
.LFB3668:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L37
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z13loop_unrolledPfS_ii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L37:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L39
	call	__stack_chk_fail@PLT
.L39:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3668:
	.size	_Z37__device_stub__Z13loop_unrolledPfS_iiPfS_ii, .-_Z37__device_stub__Z13loop_unrolledPfS_iiPfS_ii
	.globl	_Z13loop_unrolledPfS_ii
	.type	_Z13loop_unrolledPfS_ii, @function
_Z13loop_unrolledPfS_ii:
.LFB3669:
	.cfi_startproc
	endbr64
	jmp	_Z37__device_stub__Z13loop_unrolledPfS_iiPfS_ii
	.cfi_endproc
.LFE3669:
	.size	_Z13loop_unrolledPfS_ii, .-_Z13loop_unrolledPfS_ii
	.section	.rodata.str1.1
.LC1:
	.string	"_Z13loop_unrolledPfS_ii"
.LC2:
	.string	"_Z16no_bank_conflictPfS_ii"
.LC3:
	.string	"_Z13shared_memoryPfS_ii"
.LC4:
	.string	"_Z9naive_gpuPfS_ii"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3671:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC1(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z13loop_unrolledPfS_ii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC2(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z16no_bank_conflictPfS_ii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC3(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z13shared_memoryPfS_ii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC4(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z9naive_gpuPfS_ii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3671:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.rodata._ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_.str1.1,"aMS",@progbits,1
.LC5:
	.string	"basic_string: construction from null is not valid"
	.section	.text._ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_,"axG",@progbits,_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC5IS3_EEPKcRKS3_,comdat
	.align 2
	.weak	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_
	.type	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_, @function
_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_:
.LFB3976:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	subq	$16, %rsp
	.cfi_def_cfa_offset 48
	movq	%fs:40, %rax
	movq	%rax, 8(%rsp)
	xorl	%eax, %eax
	leaq	16(%rdi), %rax
	movq	%rax, (%rdi)
	testq	%rsi, %rsi
	jne	.L45
	movq	8(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L50
	leaq	.LC5(%rip), %rdi
	call	_ZSt19__throw_logic_errorPKc@PLT
.L45:
	movq	%rdi, %rbx
	movq	%rsi, %rdi
	movq	%rsi, %rbp
	call	strlen@PLT
	movq	%rax, (%rsp)
	leaq	0(%rbp,%rax), %r12
	cmpq	$15, %rax
	jbe	.L47
	movq	%rsp, %rsi
	xorl	%edx, %edx
	movq	%rbx, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE9_M_createERmm@PLT
	movq	%rax, (%rbx)
	movq	(%rsp), %rax
	movq	%rax, 16(%rbx)
.L47:
	movq	(%rbx), %rdi
	movq	%r12, %rdx
	movq	%rbp, %rsi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE13_S_copy_charsEPcPKcS7_@PLT
	movq	(%rsp), %rax
	movq	(%rbx), %rdx
	movq	%rax, 8(%rbx)
	movb	$0, (%rdx,%rax)
	movq	8(%rsp), %rax
	subq	%fs:40, %rax
	je	.L48
.L50:
	call	__stack_chk_fail@PLT
.L48:
	addq	$16, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3976:
	.size	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_, .-_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_
	.weak	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1IS3_EEPKcRKS3_
	.set	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1IS3_EEPKcRKS3_,_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_
	.section	.text._ZSteqIcSt11char_traitsIcESaIcEEbRKNSt7__cxx1112basic_stringIT_T0_T1_EEPKS5_,"axG",@progbits,_ZSteqIcSt11char_traitsIcESaIcEEbRKNSt7__cxx1112basic_stringIT_T0_T1_EEPKS5_,comdat
	.weak	_ZSteqIcSt11char_traitsIcESaIcEEbRKNSt7__cxx1112basic_stringIT_T0_T1_EEPKS5_
	.type	_ZSteqIcSt11char_traitsIcESaIcEEbRKNSt7__cxx1112basic_stringIT_T0_T1_EEPKS5_, @function
_ZSteqIcSt11char_traitsIcESaIcEEbRKNSt7__cxx1112basic_stringIT_T0_T1_EEPKS5_:
.LFB3981:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	movq	%rdi, %rbx
	subq	$24, %rsp
	.cfi_def_cfa_offset 48
	movq	8(%rdi), %r12
	movq	%rsi, %rdi
	movq	%rsi, 8(%rsp)
	call	strlen@PLT
	movq	8(%rsp), %rsi
	movq	%rax, %rdx
	xorl	%eax, %eax
	cmpq	%rdx, %r12
	jne	.L51
	movb	$1, %al
	testq	%r12, %r12
	je	.L51
	movq	(%rbx), %rdi
	movq	%r12, %rdx
	call	memcmp@PLT
	testl	%eax, %eax
	sete	%al
.L51:
	addq	$24, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3981:
	.size	_ZSteqIcSt11char_traitsIcESaIcEEbRKNSt7__cxx1112basic_stringIT_T0_T1_EEPKS5_, .-_ZSteqIcSt11char_traitsIcESaIcEEbRKNSt7__cxx1112basic_stringIT_T0_T1_EEPKS5_
	.section	.rodata.str1.1
.LC6:
	.string	"cpu"
.LC7:
	.string	"naive_gpu"
.LC8:
	.string	"shared_memory"
.LC9:
	.string	"no_bank_conflict"
.LC10:
	.string	"loop_unrolled"
.LC11:
	.string	"Wrong parameters of program version, you can only choose from following:"
.LC12:
	.string	" cpu, naive_gpu, shared_memory, no_bank_conflict, loop_unrolled."
.LC13:
	.string	"Wrong number of parameters."
.LC14:
	.string	"Wrong parameters of the the matrix dimension, should be two positive numbers."
.LC15:
	.string	"Matrix Dimension: ("
.LC16:
	.string	", "
.LC17:
	.string	")"
.LC18:
	.string	"Program Version: "
.LC20:
	.string	"Elapsed time\357\274\232%f <ms>\n"
	.section	.text.startup
	.globl	main
	.type	main, @function
main:
.LFB3637:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA3637
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rsi, %r15
	leaq	.LC6(%rip), %rsi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	leaq	_ZSt4cout(%rip), %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%edi, %ebx
	subq	$248, %rsp
	.cfi_def_cfa_offset 304
	movq	%fs:40, %rax
	movq	%rax, 232(%rsp)
	xorl	%eax, %eax
	leaq	120(%rsp), %rax
	movq	%rax, 16(%rsp)
	leaq	136(%rsp), %rax
	movq	16(%rsp), %rdx
	movq	%rax, %rdi
	movq	%rax, 8(%rsp)
.LEHB0:
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1IS3_EEPKcRKS3_
.LEHE0:
	cmpl	$1, %ebx
	je	.L87
	cmpl	$3, %ebx
	jne	.L58
	leaq	168(%rsp), %rax
	movq	8(%r15), %rsi
	movq	16(%rsp), %rdx
	movq	%rax, %rdi
	movq	%rax, %r14
.LEHB1:
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1IS3_EEPKcRKS3_
.LEHE1:
	movq	168(%rsp), %rdi
	call	atoi@PLT
	movq	16(%r15), %rsi
	movq	16(%rsp), %rdx
	leaq	200(%rsp), %r15
	movq	%r15, %rdi
	movl	%eax, %ebp
.LEHB2:
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1IS3_EEPKcRKS3_
.LEHE2:
	movq	200(%rsp), %rdi
	call	atoi@PLT
	movq	%r15, %rdi
	movl	%eax, %ebx
	jmp	.L100
.L58:
	cmpl	$4, %ebx
	jne	.L59
	leaq	168(%rsp), %rax
	movq	8(%r15), %rsi
	movq	16(%rsp), %rdx
	movq	%rax, %rdi
	movq	%rax, %r14
.LEHB3:
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1IS3_EEPKcRKS3_
.LEHE3:
	movq	168(%rsp), %rdi
	call	atoi@PLT
	movq	16(%r15), %rsi
	movq	16(%rsp), %rdx
	movl	%eax, %ebp
	leaq	200(%rsp), %rax
	movq	%rax, %rdi
	movq	%rax, %r12
.LEHB4:
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1IS3_EEPKcRKS3_
.LEHE4:
	movq	200(%rsp), %rdi
	call	atoi@PLT
	movq	24(%r15), %r15
	movl	%eax, %ebx
	movq	%r15, %rdi
	call	strlen@PLT
	movq	8(%rsp), %rdi
	movq	%r15, %rcx
	xorl	%esi, %esi
	movq	144(%rsp), %rdx
	movq	%rax, %r8
.LEHB5:
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_replaceEmmPKcm@PLT
	movq	8(%rsp), %rdi
	leaq	.LC6(%rip), %rsi
	call	_ZSteqIcSt11char_traitsIcESaIcEEbRKNSt7__cxx1112basic_stringIT_T0_T1_EEPKS5_
	testb	%al, %al
	jne	.L60
	movq	8(%rsp), %rdi
	leaq	.LC7(%rip), %rsi
	call	_ZSteqIcSt11char_traitsIcESaIcEEbRKNSt7__cxx1112basic_stringIT_T0_T1_EEPKS5_
	testb	%al, %al
	jne	.L60
	movq	8(%rsp), %rdi
	leaq	.LC8(%rip), %rsi
	call	_ZSteqIcSt11char_traitsIcESaIcEEbRKNSt7__cxx1112basic_stringIT_T0_T1_EEPKS5_
	testb	%al, %al
	jne	.L60
	movq	8(%rsp), %rdi
	leaq	.LC9(%rip), %rsi
	call	_ZSteqIcSt11char_traitsIcESaIcEEbRKNSt7__cxx1112basic_stringIT_T0_T1_EEPKS5_
	testb	%al, %al
	jne	.L60
	movq	8(%rsp), %rdi
	leaq	.LC10(%rip), %rsi
	call	_ZSteqIcSt11char_traitsIcESaIcEEbRKNSt7__cxx1112basic_stringIT_T0_T1_EEPKS5_
	testb	%al, %al
	jne	.L60
	leaq	.LC11(%rip), %rsi
	movq	%r13, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	jmp	.L102
.L60:
	movq	%r12, %rdi
.L100:
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	movq	%r14, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	jmp	.L57
.L102:
	leaq	.LC12(%rip), %rsi
	movq	%r13, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
.LEHE5:
	movq	%r12, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	movq	%r14, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	jmp	.L62
.L59:
	leaq	.LC13(%rip), %rsi
	movq	%r13, %rdi
.LEHB6:
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
.L99:
	call	_ZNSolsEPFRSoS_E.isra.0
.L62:
	movl	$1, %ebx
	jmp	.L63
.L87:
	movl	$4000, %ebx
	movl	$4000, %ebp
.L57:
	testl	%ebp, %ebp
	jle	.L92
	testl	%ebx, %ebx
	jg	.L64
.L92:
	leaq	.LC14(%rip), %rsi
	movq	%r13, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%r13, %rdi
	jmp	.L99
.L64:
	leaq	.LC15(%rip), %rsi
	movq	%r13, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	movl	%ebp, %esi
	call	_ZNSolsEi@PLT
	movq	%rax, %rdi
	leaq	.LC16(%rip), %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	movl	%ebx, %esi
	call	_ZNSolsEi@PLT
	movq	%rax, %rdi
	leaq	.LC17(%rip), %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	leaq	.LC18(%rip), %rsi
	movq	%r13, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	8(%rsp), %rsi
	movq	%rax, %rdi
	call	_ZStlsIcSt11char_traitsIcESaIcEERSt13basic_ostreamIT_T0_ES7_RKNSt7__cxx1112basic_stringIS4_S5_T1_EE@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movl	%ebp, %eax
	imull	%ebx, %eax
	cltq
	salq	$2, %rax
	movq	%rax, %rdi
	movq	%rax, 24(%rsp)
	call	_Znam@PLT
	movq	24(%rsp), %rdi
	movq	%rax, 32(%rsp)
	call	_Znam@PLT
	xorl	%edi, %edi
	movq	%rax, 40(%rsp)
	movslq	%ebx, %r15
	xorl	%r13d, %r13d
	call	time@PLT
	salq	$2, %r15
	movl	%eax, %edi
	call	srand@PLT
	movq	32(%rsp), %r14
.L67:
	xorl	%r12d, %r12d
.L68:
	call	rand@PLT
	cvtsi2ssl	%eax, %xmm0
	movss	%xmm0, (%r14,%r12,4)
	incq	%r12
	cmpl	%r12d, %ebx
	jg	.L68
	incl	%r13d
	addq	%r15, %r14
	cmpl	%r13d, %ebp
	jg	.L67
	movq	8(%rsp), %rdi
	leaq	.LC6(%rip), %rsi
	call	_ZSteqIcSt11char_traitsIcESaIcEEbRKNSt7__cxx1112basic_stringIT_T0_T1_EEPKS5_
	testb	%al, %al
	je	.L70
	leaq	104(%rsp), %rdi
	call	cudaEventCreate@PLT
	movq	16(%rsp), %rdi
	call	cudaEventCreate@PLT
	movq	104(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movl	$100, %r12d
.L71:
	movq	40(%rsp), %rsi
	movq	32(%rsp), %rdi
	movl	%ebx, %ecx
	movl	%ebp, %edx
	call	_Z3cpuPfS_ii
	decl	%r12d
	jne	.L71
	movq	120(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	120(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	120(%rsp), %rdx
	movq	104(%rsp), %rsi
	leaq	92(%rsp), %rdi
	movl	$0x00000000, 92(%rsp)
	call	cudaEventElapsedTime@PLT
	leaq	.LC20(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	92(%rsp), %xmm0
	call	__printf_chk@PLT
	movq	104(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	120(%rsp), %rdi
	call	cudaEventDestroy@PLT
	jmp	.L72
.L70:
	movq	24(%rsp), %rsi
	leaq	48(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	24(%rsp), %rsi
	leaq	56(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	24(%rsp), %rdx
	movq	32(%rsp), %rsi
	movl	$1, %ecx
	movq	48(%rsp), %rdi
	call	cudaMemcpy@PLT
	leaq	64(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	72(%rsp), %rdi
	call	cudaEventCreate@PLT
	movq	64(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movl	%ebp, %r14d
	movl	%ebx, %r15d
	movq	8(%rsp), %rdi
	movabsq	$137438953504, %r12
	sarl	$5, %r14d
	sarl	$5, %r15d
	leaq	.LC7(%rip), %rsi
	movq	%r12, 92(%rsp)
	incl	%r14d
	incl	%r15d
	movl	$1, 100(%rsp)
	movl	%r15d, 80(%rsp)
	movl	%r14d, 84(%rsp)
	call	_ZSteqIcSt11char_traitsIcESaIcEEbRKNSt7__cxx1112basic_stringIT_T0_T1_EEPKS5_
	testb	%al, %al
	je	.L73
	movq	80(%rsp), %rdi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%r12, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L75
	movq	56(%rsp), %rsi
	movq	48(%rsp), %rdi
	movl	%ebx, %ecx
	movl	%ebp, %edx
	call	_Z32__device_stub__Z9naive_gpuPfS_iiPfS_ii
	jmp	.L75
.L73:
	movq	8(%rsp), %rdi
	leaq	.LC8(%rip), %rsi
	call	_ZSteqIcSt11char_traitsIcESaIcEEbRKNSt7__cxx1112basic_stringIT_T0_T1_EEPKS5_
	testb	%al, %al
	je	.L77
	movq	80(%rsp), %rdi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%r12, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L75
	movq	56(%rsp), %rsi
	movq	48(%rsp), %rdi
	movl	%ebx, %ecx
	movl	%ebp, %edx
	call	_Z37__device_stub__Z13shared_memoryPfS_iiPfS_ii
	jmp	.L75
.L77:
	movq	8(%rsp), %rdi
	leaq	.LC9(%rip), %rsi
	call	_ZSteqIcSt11char_traitsIcESaIcEEbRKNSt7__cxx1112basic_stringIT_T0_T1_EEPKS5_
	testb	%al, %al
	je	.L78
	movq	80(%rsp), %rdi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%r12, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L75
	movq	56(%rsp), %rsi
	movq	48(%rsp), %rdi
	movl	%ebx, %ecx
	movl	%ebp, %edx
	call	_Z40__device_stub__Z16no_bank_conflictPfS_iiPfS_ii
	jmp	.L75
.L78:
	movl	%r15d, 104(%rsp)
	movl	$1073741825, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	%r14d, 108(%rsp)
	movq	104(%rsp), %rdi
	salq	$5, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	movq	%rdx, 120(%rsp)
	movl	$1, 112(%rsp)
	movl	$1, 128(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L75
	movq	56(%rsp), %rsi
	movq	48(%rsp), %rdi
	movl	%ebp, %ecx
	movl	%ebx, %edx
	call	_Z37__device_stub__Z13loop_unrolledPfS_iiPfS_ii
.L75:
	movq	72(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	72(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	72(%rsp), %rdx
	movq	64(%rsp), %rsi
	movl	$0x00000000, 120(%rsp)
	movq	16(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	leaq	.LC20(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	120(%rsp), %xmm0
	call	__printf_chk@PLT
	movq	64(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	72(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	24(%rsp), %rdx
	movq	56(%rsp), %rsi
	movl	$2, %ecx
	movq	40(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	48(%rsp), %rdi
	call	cudaFree@PLT
	movq	56(%rsp), %rdi
	call	cudaFree@PLT
.LEHE6:
.L72:
	movq	32(%rsp), %rdi
	xorl	%ebx, %ebx
	call	free@PLT
	movq	40(%rsp), %rdi
	call	free@PLT
.L63:
	movq	8(%rsp), %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	movq	232(%rsp), %rax
	subq	%fs:40, %rax
	je	.L86
	jmp	.L96
.L88:
	endbr64
	jmp	.L101
.L91:
	endbr64
	movq	%rax, %rbx
.L83:
	movq	%r12, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	jmp	.L84
.L90:
	endbr64
.L101:
	movq	%rax, %rbx
.L84:
	movq	%r14, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	jmp	.L82
.L89:
	endbr64
	movq	%rax, %rbx
.L82:
	movq	8(%rsp), %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	movq	232(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L96
	movq	%rbx, %rdi
.LEHB7:
	call	_Unwind_Resume@PLT
.LEHE7:
.L96:
	call	__stack_chk_fail@PLT
.L86:
	addq	$248, %rsp
	.cfi_def_cfa_offset 56
	movl	%ebx, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3637:
	.globl	__gxx_personality_v0
	.section	.gcc_except_table,"a",@progbits
.LLSDA3637:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE3637-.LLSDACSB3637
.LLSDACSB3637:
	.uleb128 .LEHB0-.LFB3637
	.uleb128 .LEHE0-.LEHB0
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB1-.LFB3637
	.uleb128 .LEHE1-.LEHB1
	.uleb128 .L89-.LFB3637
	.uleb128 0
	.uleb128 .LEHB2-.LFB3637
	.uleb128 .LEHE2-.LEHB2
	.uleb128 .L88-.LFB3637
	.uleb128 0
	.uleb128 .LEHB3-.LFB3637
	.uleb128 .LEHE3-.LEHB3
	.uleb128 .L89-.LFB3637
	.uleb128 0
	.uleb128 .LEHB4-.LFB3637
	.uleb128 .LEHE4-.LEHB4
	.uleb128 .L90-.LFB3637
	.uleb128 0
	.uleb128 .LEHB5-.LFB3637
	.uleb128 .LEHE5-.LEHB5
	.uleb128 .L91-.LFB3637
	.uleb128 0
	.uleb128 .LEHB6-.LFB3637
	.uleb128 .LEHE6-.LEHB6
	.uleb128 .L89-.LFB3637
	.uleb128 0
	.uleb128 .LEHB7-.LFB3637
	.uleb128 .LEHE7-.LEHB7
	.uleb128 0
	.uleb128 0
.LLSDACSE3637:
	.section	.text.startup
	.size	main, .-main
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.hidden	DW.ref.__gxx_personality_v0
	.weak	DW.ref.__gxx_personality_v0
	.section	.data.rel.local.DW.ref.__gxx_personality_v0,"awG",@progbits,DW.ref.__gxx_personality_v0,comdat
	.align 8
	.type	DW.ref.__gxx_personality_v0, @object
	.size	DW.ref.__gxx_personality_v0, 8
DW.ref.__gxx_personality_v0:
	.quad	__gxx_personality_v0
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <iostream>
#include <string>
#include <stdlib.h>
#include <time.h>
#include <stdio.h>
using namespace std;

void print_matrix(float* matrix, int rows, int cols) {
    for (int i = 0; i < rows; ++i) {
        for (int j = 0; j < cols; ++j) 
            cout<<matrix[i*cols+j]<<" ";
        cout<<endl;
    }
}

void cpu(float* matrix, float* transpose, int rows, int cols)
{
    for (int i = 0; i < rows; ++i)
        for (int j = 0; j < cols; ++j)
            transpose[j*rows+i] = matrix[i*cols+j];
}

__global__ void naive_gpu(float* matrix, float* transpose, int rows, int cols) {
    int i = blockIdx.y * blockDim.y + threadIdx.y;
    int j = blockIdx.x * blockDim.x + threadIdx.x;
    if ((i >= rows) || (j >= cols)) {
        return;
    }
    int index_in = i * cols + j;
    int index_out = j * rows + i;
    transpose[index_out] = matrix[index_in];
}

const int BLOCK_SIZE_X = 32;
const int BLOCK_SIZE_Y = 32;
__global__ void shared_memory(float* matrix, float* transpose, int rows, int cols) {
    __shared__ float mat[BLOCK_SIZE_X][BLOCK_SIZE_Y];
    int bx = blockIdx.x * BLOCK_SIZE_X;
    int by = blockIdx.y * BLOCK_SIZE_Y;
    int i = by + threadIdx.y; int j = bx +threadIdx.x;
    int ti = bx + threadIdx.y; int tj = by + threadIdx.x;
    if ((i < rows) && (j < cols))
        mat[threadIdx.x][threadIdx.y] = matrix[i * cols + j];
    __syncthreads();
    if ((tj < rows) && (ti < cols))
        transpose[ti * rows + tj] = mat[threadIdx.y][threadIdx.x];
}

__global__ void no_bank_conflict(float * matrix, float * transpose, int rows, int cols) {
    __shared__ float mat[BLOCK_SIZE_X][BLOCK_SIZE_Y + 1];
    int bx = blockIdx.x * BLOCK_SIZE_X;
    int by = blockIdx.y * BLOCK_SIZE_Y;
    int i = by + threadIdx.y; int j = bx +threadIdx.x;
    int ti = bx + threadIdx.y; int tj = by + threadIdx.x;
    if ((i < rows) && (j < cols))
        mat[threadIdx.x][threadIdx.y] = matrix[i * cols + j];
    __syncthreads();
    if ((tj < rows) && (ti < cols))
        transpose[ti * rows + tj] = mat[threadIdx.y][threadIdx.x];
}


const int TILE = 32;
const int SIDE = 8;
__global__ void loop_unrolled(float * matrix, float * transpose, int rows, int cols) {
    __shared__ float mat[TILE][TILE + 1];
    int x = blockIdx.x * TILE + threadIdx.x;
    int y = blockIdx.y * TILE + threadIdx.y;
#pragma unroll
    for(int k = 0; k < TILE ; k += SIDE) {
        if(x < rows && y + k < cols)
            mat[threadIdx.y+k][threadIdx.x] = matrix[(y + k)*rows + x];
    }
    __syncthreads();
    x = blockIdx.y * TILE + threadIdx.x;
    y = blockIdx.x * TILE + threadIdx.y;
#pragma unroll
    for(int k = 0; k < TILE; k += SIDE) {
        if(x < cols && y + k < rows)
            transpose[(y + k) * cols + x] = mat[threadIdx.x][threadIdx.y+k];
    }
}


int main(int argc, char *argv[])
{
    int rows = 4000;
    int cols = 4000;
    string ver = "cpu";
    if (argc == 1) {
        ;
    } else if (argc == 3) {
        string str1 = argv[1];
        rows = atoi(str1.c_str());
        string str2 = argv[2];
        cols = atoi(str2.c_str());
    } else if (argc == 4) {
        string str1 = argv[1];
        rows = atoi(str1.c_str());
        string str2 = argv[2];
        cols = atoi(str2.c_str());
        ver = argv[3];
        if ((ver != "cpu") && (ver != "naive_gpu") && (ver != "shared_memory")\
         && (ver != "no_bank_conflict") && (ver != "loop_unrolled")) {
            cout<<"Wrong parameters of program version, you can only choose from following:";
            cout<<" cpu, naive_gpu, shared_memory, no_bank_conflict, loop_unrolled."<<endl;
            return 1;
        }
    } else {
        cout<<"Wrong number of parameters."<<endl;
        return 1;
    }
    if ((rows <= 0) || (cols <= 0)) {
        cout<<"Wrong parameters of the the matrix dimension, should be two positive numbers.";
        cout<<endl;
        return 1;
    }
    cout<<"Matrix Dimension: ("<<rows<<", "<<cols<<")"<<endl;
    cout<<"Program Version: "<<ver<<endl;
    
    float* matrix = new float[rows*cols];
    float* transpose = new float[rows*cols]; 
    srand((unsigned)time(NULL));
    for (int i = 0; i < rows; ++i)
        for (int j = 0; j < cols; ++j)
            matrix[i*cols+j] = rand();
    
    if (ver == "cpu") {
        hipEvent_t start, stop;
        hipEventCreate(&start);
        hipEventCreate(&stop);
        hipEventRecord(start, 0);
        for (int iter = 0; iter < 100; ++iter)
            cpu(matrix, transpose, rows, cols);    
        hipEventRecord(stop, 0);
        hipEventSynchronize(stop);
        float elapsedTime=0;
        hipEventElapsedTime(&elapsedTime, start, stop);
        printf("Elapsed time：%f <ms>\n", elapsedTime);    
        hipEventDestroy(start);
        hipEventDestroy(stop);
    }
    else {
        float *dev_matrix, *dev_transpose;         
        hipMalloc((void**)&dev_matrix, rows*cols*sizeof(float));  
        hipMalloc((void**)&dev_transpose, rows*cols*sizeof(float));
        hipMemcpy(dev_matrix, matrix, rows*cols*sizeof(float), hipMemcpyHostToDevice);
        
        hipEvent_t start, stop;
        hipEventCreate(&start);
        hipEventCreate(&stop);
        hipEventRecord(start, 0);
        dim3 dimGrad(cols/32+1,rows/32+1,1);
        dim3 dimBlock(32,32,1);
        if (ver == "naive_gpu") {
            naive_gpu<<<dimGrad, dimBlock>>>(dev_matrix, dev_transpose, rows, cols);
        } else if (ver == "shared_memory") {
            shared_memory<<<dimGrad, dimBlock>>>(dev_matrix, dev_transpose, rows, cols);
        } else if (ver == "no_bank_conflict") {
            no_bank_conflict<<<dimGrad, dimBlock>>>(dev_matrix, dev_transpose, rows, cols);
        } else {
            dim3 dimGrad(cols/32+1,rows/32+1,1);
            dim3 dimBlock(32,8,1);
            loop_unrolled<<<dimGrad, dimBlock>>>(dev_matrix, dev_transpose, cols, rows); 
        }
        hipEventRecord(stop, 0);
        hipEventSynchronize(stop);
        float elapsedTime=0;
        hipEventElapsedTime(&elapsedTime, start, stop);
        printf("Elapsed time：%f <ms>\n", elapsedTime);
        hipEventDestroy(start);
        hipEventDestroy(stop);
        hipMemcpy(transpose, dev_transpose, rows*cols*sizeof(float), hipMemcpyDeviceToHost);
        
        //print_matrix(matrix, rows, cols);
        //printf("==========================\n");
        //print_matrix(transpose, cols, rows);
        
        hipFree(dev_matrix);
        hipFree(dev_transpose);
    }
    free(matrix);
    free(transpose);
    return 0;
}

	.text
	.file	"matrix_main.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z12print_matrixPfii            # -- Begin function _Z12print_matrixPfii
	.type	_Z12print_matrixPfii,@function
_Z12print_matrixPfii:                   # @_Z12print_matrixPfii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdi, 8(%rsp)                   # 8-byte Spill
	testl	%esi, %esi
	jle	.LBB0_6
# %bb.1:                                # %.preheader.lr.ph
	movl	%edx, %ebx
	movl	%esi, %eax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movl	%edx, %r12d
	xorl	%r13d, %r13d
	xorl	%ebp, %ebp
.LBB0_2:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB0_4 Depth 2
	testl	%ebx, %ebx
	jle	.LBB0_5
# %bb.3:                                # %.lr.ph
                                        #   in Loop: Header=BB0_2 Depth=1
	movl	%r13d, %eax
	movq	8(%rsp), %rcx                   # 8-byte Reload
	leaq	(%rcx,%rax,4), %r14
	xorl	%r15d, %r15d
.LBB0_4:                                #   Parent Loop BB0_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r14,%r15,4), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movl	$.L.str, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	incq	%r15
	cmpq	%r15, %r12
	jne	.LBB0_4
.LBB0_5:                                # %._crit_edge
                                        #   in Loop: Header=BB0_2 Depth=1
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	movl	$_ZSt4cout, %eax
	addq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	incq	%rbp
	addl	%ebx, %r13d
	cmpq	16(%rsp), %rbp                  # 8-byte Folded Reload
	jne	.LBB0_2
.LBB0_6:                                # %._crit_edge13
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z12print_matrixPfii, .Lfunc_end0-_Z12print_matrixPfii
	.cfi_endproc
                                        # -- End function
	.globl	_Z3cpuPfS_ii                    # -- Begin function _Z3cpuPfS_ii
	.type	_Z3cpuPfS_ii,@function
_Z3cpuPfS_ii:                           # @_Z3cpuPfS_ii
	.cfi_startproc
# %bb.0:
	testl	%edx, %edx
	jle	.LBB1_7
# %bb.1:                                # %.preheader.lr.ph
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	movl	%edx, %eax
	movl	%ecx, %edx
	leaq	(,%rax,4), %r8
	xorl	%r9d, %r9d
	xorl	%r10d, %r10d
.LBB1_2:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_4 Depth 2
	testl	%ecx, %ecx
	jle	.LBB1_5
# %bb.3:                                # %.lr.ph
                                        #   in Loop: Header=BB1_2 Depth=1
	movl	%r9d, %r11d
	leaq	(%rdi,%r11,4), %r11
	movq	%rsi, %rbx
	xorl	%r14d, %r14d
.LBB1_4:                                #   Parent Loop BB1_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movss	(%r11,%r14,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, (%rbx)
	incq	%r14
	addq	%r8, %rbx
	cmpq	%r14, %rdx
	jne	.LBB1_4
.LBB1_5:                                # %._crit_edge
                                        #   in Loop: Header=BB1_2 Depth=1
	incq	%r10
	addl	%ecx, %r9d
	addq	$4, %rsi
	cmpq	%rax, %r10
	jne	.LBB1_2
# %bb.6:
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r14
.LBB1_7:                                # %._crit_edge18
	retq
.Lfunc_end1:
	.size	_Z3cpuPfS_ii, .Lfunc_end1-_Z3cpuPfS_ii
	.cfi_endproc
                                        # -- End function
	.globl	_Z24__device_stub__naive_gpuPfS_ii # -- Begin function _Z24__device_stub__naive_gpuPfS_ii
	.type	_Z24__device_stub__naive_gpuPfS_ii,@function
_Z24__device_stub__naive_gpuPfS_ii:     # @_Z24__device_stub__naive_gpuPfS_ii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9naive_gpuPfS_ii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z24__device_stub__naive_gpuPfS_ii, .Lfunc_end2-_Z24__device_stub__naive_gpuPfS_ii
	.cfi_endproc
                                        # -- End function
	.globl	_Z28__device_stub__shared_memoryPfS_ii # -- Begin function _Z28__device_stub__shared_memoryPfS_ii
	.type	_Z28__device_stub__shared_memoryPfS_ii,@function
_Z28__device_stub__shared_memoryPfS_ii: # @_Z28__device_stub__shared_memoryPfS_ii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z13shared_memoryPfS_ii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z28__device_stub__shared_memoryPfS_ii, .Lfunc_end3-_Z28__device_stub__shared_memoryPfS_ii
	.cfi_endproc
                                        # -- End function
	.globl	_Z31__device_stub__no_bank_conflictPfS_ii # -- Begin function _Z31__device_stub__no_bank_conflictPfS_ii
	.type	_Z31__device_stub__no_bank_conflictPfS_ii,@function
_Z31__device_stub__no_bank_conflictPfS_ii: # @_Z31__device_stub__no_bank_conflictPfS_ii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16no_bank_conflictPfS_ii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z31__device_stub__no_bank_conflictPfS_ii, .Lfunc_end4-_Z31__device_stub__no_bank_conflictPfS_ii
	.cfi_endproc
                                        # -- End function
	.globl	_Z28__device_stub__loop_unrolledPfS_ii # -- Begin function _Z28__device_stub__loop_unrolledPfS_ii
	.type	_Z28__device_stub__loop_unrolledPfS_ii,@function
_Z28__device_stub__loop_unrolledPfS_ii: # @_Z28__device_stub__loop_unrolledPfS_ii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z13loop_unrolledPfS_ii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	_Z28__device_stub__loop_unrolledPfS_ii, .Lfunc_end5-_Z28__device_stub__loop_unrolledPfS_ii
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
.Lfunc_begin0:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception0
# %bb.0:                                # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_.exit
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$152, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %r14
	movl	%edi, %ebx
	leaq	24(%rsp), %r15
	movq	%r15, -16(%r15)
	leaq	8(%rsp), %rdi
	movl	$.L.str.1, %esi
	movl	$.L.str.1+3, %edx
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag
	cmpl	$1, %ebx
	je	.LBB6_17
# %bb.1:                                # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_.exit
	cmpl	$4, %ebx
	je	.LBB6_10
# %bb.2:                                # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_.exit
	cmpl	$3, %ebx
	jne	.LBB6_18
# %bb.3:
	movq	8(%r14), %rsi
.Ltmp17:
	leaq	80(%rsp), %rdi
	leaq	48(%rsp), %rdx
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_
.Ltmp18:
# %bb.4:
	movq	80(%rsp), %rdi
	callq	atoi
	movl	%eax, %r12d
	movq	16(%r14), %rsi
.Ltmp20:
	leaq	48(%rsp), %rdi
	movq	%rsp, %rdx
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_
.Ltmp21:
# %bb.5:
	leaq	64(%rsp), %rbx
	movq	-16(%rbx), %r14
	movq	%r14, %rdi
	callq	atoi
	movl	%eax, %ebp
	cmpq	%rbx, %r14
	je	.LBB6_7
# %bb.6:                                # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i
	movq	%r14, %rdi
	callq	_ZdlPv
.LBB6_7:                                # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit
	leaq	96(%rsp), %rax
	movq	-16(%rax), %rdi
	cmpq	%rax, %rdi
	je	.LBB6_9
# %bb.8:                                # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i128
	callq	_ZdlPv
.LBB6_9:                                # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit130
	movl	%ebp, %ebx
	jmp	.LBB6_39
.LBB6_10:
	movq	8(%r14), %rsi
.Ltmp0:
	leaq	80(%rsp), %rdi
	leaq	48(%rsp), %rdx
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_
.Ltmp1:
# %bb.11:
	movq	80(%rsp), %rdi
	callq	atoi
	movl	%eax, %ebp
	movq	16(%r14), %rsi
.Ltmp3:
	leaq	48(%rsp), %rdi
	movq	%rsp, %rdx
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_
.Ltmp4:
# %bb.12:
	movq	48(%rsp), %rdi
	callq	atoi
	movl	%eax, %ebx
	movq	24(%r14), %r14
	leaq	8(%rsp), %r15
	movq	8(%r15), %r12
	movq	%r14, %rdi
	callq	strlen
.Ltmp6:
	movq	%r15, %rdi
	xorl	%esi, %esi
	movq	%r12, %rdx
	movq	%r14, %rcx
	movq	%rax, %r8
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_replaceEmmPKcm
.Ltmp7:
# %bb.13:                               # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEaSEPKc.exit
	movq	16(%rsp), %rdx
	cmpq	$12, %rdx
	jg	.LBB6_19
# %bb.14:                               # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEaSEPKc.exit
	cmpq	$3, %rdx
	leaq	24(%rsp), %r15
	je	.LBB6_22
# %bb.15:                               # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEaSEPKc.exit
	cmpq	$9, %rdx
	jne	.LBB6_26
# %bb.16:                               # %_ZStneIcSt11char_traitsIcESaIcEEbRKNSt7__cxx1112basic_stringIT_T0_T1_EEPKS5_.exit135
	movq	8(%rsp), %rdi
	movl	$.L.str.2, %esi
	jmp	.LBB6_25
.LBB6_17:
	movl	$4000, %ebx                     # imm = 0xFA0
	movl	$4000, %ebp                     # imm = 0xFA0
	jmp	.LBB6_40
.LBB6_18:
	movl	$27, %edx
	movl	$.L.str.8, %esi
	jmp	.LBB6_76
.LBB6_19:                               # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEaSEPKc.exit
	cmpq	$13, %rdx
	leaq	24(%rsp), %r15
	je	.LBB6_24
# %bb.20:                               # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEaSEPKc.exit
	cmpq	$16, %rdx
	jne	.LBB6_26
# %bb.21:                               # %_ZStneIcSt11char_traitsIcESaIcEEbRKNSt7__cxx1112basic_stringIT_T0_T1_EEPKS5_.exit139
	movq	8(%rsp), %rdi
	movl	$.L.str.4, %esi
	jmp	.LBB6_25
.LBB6_22:                               # %_ZStneIcSt11char_traitsIcESaIcEEbRKNSt7__cxx1112basic_stringIT_T0_T1_EEPKS5_.exit
	movq	8(%rsp), %rax
	movzwl	(%rax), %ecx
	xorl	$28771, %ecx                    # imm = 0x7063
	movzbl	2(%rax), %eax
	xorl	$117, %eax
	orw	%cx, %ax
	jne	.LBB6_26
.LBB6_23:
	movl	%ebp, %r12d
	xorl	%r14d, %r14d
	movb	$1, %bpl
	jmp	.LBB6_34
.LBB6_24:                               # %_ZStneIcSt11char_traitsIcESaIcEEbRKNSt7__cxx1112basic_stringIT_T0_T1_EEPKS5_.exit137
	movq	8(%rsp), %rdi
	movl	$.L.str.3, %esi
.LBB6_25:                               # %_ZStneIcSt11char_traitsIcESaIcEEbRKNSt7__cxx1112basic_stringIT_T0_T1_EEPKS5_.exit135
	callq	bcmp@PLT
	testl	%eax, %eax
	je	.LBB6_23
.LBB6_26:                               # %_ZStneIcSt11char_traitsIcESaIcEEbRKNSt7__cxx1112basic_stringIT_T0_T1_EEPKS5_.exit139.thread
.Ltmp8:
	leaq	8(%rsp), %rdi
	movl	$.L.str.5, %esi
	callq	_ZStneIcSt11char_traitsIcESaIcEEbRKNSt7__cxx1112basic_stringIT_T0_T1_EEPKS5_
.Ltmp9:
# %bb.27:
	testb	%al, %al
	je	.LBB6_32
# %bb.28:
.Ltmp10:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.6, %esi
	movl	$72, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp11:
# %bb.29:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit
.Ltmp12:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.7, %esi
	movl	$64, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp13:
# %bb.30:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit140
.Ltmp14:
	movl	$_ZSt4cout, %edi
	callq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_
.Ltmp15:
# %bb.31:
	movl	%ebp, %r12d
	movl	$1, %r14d
	xorl	%ebp, %ebp
	jmp	.LBB6_33
.LBB6_32:
	movl	%ebp, %r12d
	xorl	%r14d, %r14d
	movb	$1, %bpl
.LBB6_33:                               # %_ZNSolsEPFRSoS_E.exit
	leaq	24(%rsp), %r15
.LBB6_34:                               # %_ZNSolsEPFRSoS_E.exit
	leaq	64(%rsp), %rax
	movq	-16(%rax), %rdi
	cmpq	%rax, %rdi
	je	.LBB6_36
# %bb.35:                               # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i144
	callq	_ZdlPv
.LBB6_36:                               # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit146
	leaq	96(%rsp), %rax
	movq	-16(%rax), %rdi
	cmpq	%rax, %rdi
	je	.LBB6_38
# %bb.37:                               # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i147
	callq	_ZdlPv
.LBB6_38:                               # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit149
	testb	%bpl, %bpl
	je	.LBB6_97
.LBB6_39:
	movl	%r12d, %ebp
.LBB6_40:
	movl	$77, %edx
	movl	$.L.str.9, %esi
	testl	%ebp, %ebp
	jle	.LBB6_76
# %bb.41:
	testl	%ebx, %ebx
	jle	.LBB6_76
# %bb.42:
.Ltmp23:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.10, %esi
	movl	$19, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp24:
# %bb.43:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit157
.Ltmp25:
	movl	$_ZSt4cout, %edi
	movl	%ebp, %esi
	callq	_ZNSolsEi
.Ltmp26:
# %bb.44:
.Ltmp27:
	movq	%rax, %r14
	movl	$.L.str.11, %esi
	movl	$2, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp28:
# %bb.45:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit158
.Ltmp29:
	movq	%r14, %rdi
	movl	%ebx, %esi
	callq	_ZNSolsEi
.Ltmp30:
# %bb.46:
.Ltmp31:
	movq	%rax, %r14
	movl	$.L.str.12, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp32:
# %bb.47:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit159
	movq	(%r14), %rax
	movq	-24(%rax), %rdi
	addq	%r14, %rdi
.Ltmp33:
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp34:
# %bb.48:                               # %.noexc181
.Ltmp35:
	movsbl	%al, %esi
	movq	%r14, %rdi
	callq	_ZNSo3putEc
.Ltmp36:
# %bb.49:                               # %.noexc182
.Ltmp37:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp38:
# %bb.50:                               # %_ZNSolsEPFRSoS_E.exit160
.Ltmp39:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.13, %esi
	movl	$17, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp40:
# %bb.51:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit161
	movq	8(%rsp), %rsi
	movq	16(%rsp), %rdx
.Ltmp41:
	movl	$_ZSt4cout, %edi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp42:
# %bb.52:                               # %_ZStlsIcSt11char_traitsIcESaIcEERSt13basic_ostreamIT_T0_ES7_RKNSt7__cxx1112basic_stringIS4_S5_T1_EE.exit
	movq	%rax, %r14
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%r14, %rdi
.Ltmp43:
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp44:
# %bb.53:                               # %.noexc185
.Ltmp45:
	movsbl	%al, %esi
	movq	%r14, %rdi
	callq	_ZNSo3putEc
.Ltmp46:
# %bb.54:                               # %.noexc186
.Ltmp47:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp48:
# %bb.55:                               # %_ZNSolsEPFRSoS_E.exit162
	movl	%ebp, %eax
	imull	%ebx, %eax
	cltq
	leaq	(,%rax,4), %r12
	testl	%eax, %eax
	movq	$-1, %r15
	cmovnsq	%r12, %r15
.Ltmp49:
	movq	%r15, %rdi
	callq	_Znam
.Ltmp50:
# %bb.56:
.Ltmp52:
	movq	%rax, %r14
	movq	%r12, 136(%rsp)                 # 8-byte Spill
	movq	%r15, %rdi
	callq	_Znam
	movq	%rax, 112(%rsp)                 # 8-byte Spill
.Ltmp53:
# %bb.57:                               # %.preheader215.lr.ph
	xorl	%r12d, %r12d
	xorl	%edi, %edi
	callq	time
	movl	%eax, %edi
	callq	srand
	movl	%ebp, 124(%rsp)                 # 4-byte Spill
	movl	%ebp, %r13d
	movl	%ebx, %ebp
	xorl	%r15d, %r15d
	movl	%ebx, 128(%rsp)                 # 4-byte Spill
	movq	%r14, 144(%rsp)                 # 8-byte Spill
.LBB6_58:                               # %.preheader215
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB6_59 Depth 2
	movl	%r12d, %eax
	leaq	(%r14,%rax,4), %rbx
	xorl	%r14d, %r14d
.LBB6_59:                               #   Parent Loop BB6_58 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	movss	%xmm0, (%rbx,%r14,4)
	incq	%r14
	cmpq	%r14, %rbp
	jne	.LBB6_59
# %bb.60:                               # %._crit_edge
                                        #   in Loop: Header=BB6_58 Depth=1
	incq	%r15
	movl	128(%rsp), %ebx                 # 4-byte Reload
	addl	%ebx, %r12d
	cmpq	%r13, %r15
	movq	144(%rsp), %r14                 # 8-byte Reload
	jne	.LBB6_58
# %bb.61:                               # %._crit_edge218
	cmpq	$3, 16(%rsp)
	jne	.LBB6_63
# %bb.62:                               # %_ZSteqIcSt11char_traitsIcESaIcEEbRKNSt7__cxx1112basic_stringIT_T0_T1_EEPKS5_.exit
	movq	8(%rsp), %rax
	movzwl	(%rax), %ecx
	xorl	$28771, %ecx                    # imm = 0x7063
	movzbl	2(%rax), %eax
	xorl	$117, %eax
	orw	%cx, %ax
	je	.LBB6_100
.LBB6_63:                               # %_ZSteqIcSt11char_traitsIcESaIcEEbRKNSt7__cxx1112basic_stringIT_T0_T1_EEPKS5_.exit.thread207
.Ltmp55:
	leaq	80(%rsp), %rdi
	movq	136(%rsp), %r12                 # 8-byte Reload
	movq	%r12, %rsi
	callq	hipMalloc
.Ltmp56:
# %bb.64:
.Ltmp57:
	leaq	48(%rsp), %rdi
	movq	%r12, %rsi
	callq	hipMalloc
.Ltmp58:
# %bb.65:
	movq	80(%rsp), %rdi
.Ltmp59:
	movq	%r14, %rsi
	movq	%r12, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
.Ltmp60:
# %bb.66:
.Ltmp62:
	movq	%rsp, %rdi
	leaq	24(%rsp), %r15
	callq	hipEventCreate
.Ltmp63:
	movl	124(%rsp), %ebp                 # 4-byte Reload
# %bb.67:
.Ltmp64:
	leaq	40(%rsp), %rdi
	callq	hipEventCreate
.Ltmp65:
# %bb.68:
	movq	(%rsp), %rdi
.Ltmp66:
	xorl	%esi, %esi
	callq	hipEventRecord
.Ltmp67:
# %bb.69:
	movl	%ebx, %eax
	shrl	$5, %eax
	movl	%ebp, %ecx
	shrl	$5, %ecx
	incl	%ecx
	shlq	$32, %rcx
	leaq	(%rcx,%rax), %r13
	incq	%r13
	movq	16(%rsp), %rdx
	cmpq	$16, %rdx
	je	.LBB6_84
# %bb.70:
	cmpq	$13, %rdx
	je	.LBB6_80
# %bb.71:
	cmpq	$9, %rdx
	jne	.LBB6_85
# %bb.72:                               # %_ZSteqIcSt11char_traitsIcESaIcEEbRKNSt7__cxx1112basic_stringIT_T0_T1_EEPKS5_.exit164
	movq	8(%rsp), %rax
	movabsq	$8099547344232079726, %rcx      # imm = 0x70675F657669616E
	xorq	(%rax), %rcx
	movzbl	8(%rax), %eax
	xorq	$117, %rax
	orq	%rcx, %rax
	jne	.LBB6_85
# %bb.73:                               # %_ZSteqIcSt11char_traitsIcESaIcEEbRKNSt7__cxx1112basic_stringIT_T0_T1_EEPKS5_.exit164.thread
.Ltmp77:
	movabsq	$137438953504, %rdx             # imm = 0x2000000020
	movq	%r13, %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
.Ltmp78:
# %bb.74:
	testl	%eax, %eax
	jne	.LBB6_88
# %bb.75:
	movq	80(%rsp), %rdi
	movq	48(%rsp), %rsi
.Ltmp79:
	movl	%ebp, %edx
	movl	%ebx, %ecx
	callq	_Z24__device_stub__naive_gpuPfS_ii
.Ltmp80:
	jmp	.LBB6_88
.LBB6_76:                               # %.invoke
.Ltmp122:
	movl	$_ZSt4cout, %ebx
	movl	$_ZSt4cout, %edi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp123:
# %bb.77:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit155.invoke
	movq	_ZSt4cout(%rip), %rax
	addq	-24(%rax), %rbx
.Ltmp124:
	movq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp125:
# %bb.78:                               # %.noexc177.invoke
.Ltmp126:
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
.Ltmp127:
# %bb.79:                               # %.noexc178.invoke
	movl	$1, %r14d
.Ltmp128:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp129:
	jmp	.LBB6_97
.LBB6_80:                               # %_ZSteqIcSt11char_traitsIcESaIcEEbRKNSt7__cxx1112basic_stringIT_T0_T1_EEPKS5_.exit166
	movq	8(%rsp), %rdi
	movl	$.L.str.3, %esi
	callq	bcmp@PLT
	testl	%eax, %eax
	jne	.LBB6_85
# %bb.81:                               # %_ZSteqIcSt11char_traitsIcESaIcEEbRKNSt7__cxx1112basic_stringIT_T0_T1_EEPKS5_.exit166.thread
.Ltmp73:
	movabsq	$137438953504, %rdx             # imm = 0x2000000020
	movq	%r13, %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
.Ltmp74:
# %bb.82:
	testl	%eax, %eax
	jne	.LBB6_88
# %bb.83:
	movq	80(%rsp), %rdi
	movq	48(%rsp), %rsi
.Ltmp75:
	movl	%ebp, %edx
	movl	%ebx, %ecx
	callq	_Z28__device_stub__shared_memoryPfS_ii
.Ltmp76:
	jmp	.LBB6_88
.LBB6_84:                               # %_ZSteqIcSt11char_traitsIcESaIcEEbRKNSt7__cxx1112basic_stringIT_T0_T1_EEPKS5_.exit168
	movq	8(%rsp), %rdi
	movl	$.L.str.4, %esi
	callq	bcmp@PLT
	testl	%eax, %eax
	je	.LBB6_115
.LBB6_85:                               # %_ZSteqIcSt11char_traitsIcESaIcEEbRKNSt7__cxx1112basic_stringIT_T0_T1_EEPKS5_.exit168.thread210
.Ltmp81:
	movabsq	$34359738400, %rdx              # imm = 0x800000020
	movq	%r13, %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
.Ltmp82:
# %bb.86:
	testl	%eax, %eax
	jne	.LBB6_88
# %bb.87:
	movq	80(%rsp), %rdi
	movq	48(%rsp), %rsi
.Ltmp83:
	movl	%ebx, %edx
	movl	%ebp, %ecx
	callq	_Z28__device_stub__loop_unrolledPfS_ii
.Ltmp84:
.LBB6_88:
	movq	40(%rsp), %rdi
.Ltmp86:
	xorl	%esi, %esi
	callq	hipEventRecord
.Ltmp87:
# %bb.89:
	movq	40(%rsp), %rdi
.Ltmp88:
	callq	hipEventSynchronize
.Ltmp89:
# %bb.90:
	leaq	132(%rsp), %rdi
	movl	$0, (%rdi)
	movq	(%rsp), %rsi
	movq	40(%rsp), %rdx
.Ltmp91:
	callq	hipEventElapsedTime
.Ltmp92:
# %bb.91:
	cvtss2sd	132(%rsp), %xmm0
	movl	$.L.str.14, %edi
	movb	$1, %al
	callq	printf
	movq	(%rsp), %rdi
.Ltmp93:
	callq	hipEventDestroy
.Ltmp94:
# %bb.92:
	movq	40(%rsp), %rdi
.Ltmp95:
	callq	hipEventDestroy
.Ltmp96:
# %bb.93:
	movq	48(%rsp), %rsi
.Ltmp97:
	movq	112(%rsp), %rdi                 # 8-byte Reload
	movq	%r12, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
.Ltmp98:
# %bb.94:
	movq	80(%rsp), %rdi
.Ltmp99:
	callq	hipFree
.Ltmp100:
# %bb.95:
	movq	48(%rsp), %rdi
.Ltmp101:
	callq	hipFree
.Ltmp102:
.LBB6_96:
	movq	%r14, %rdi
	callq	free
	movq	112(%rsp), %rdi                 # 8-byte Reload
	callq	free
	xorl	%r14d, %r14d
.LBB6_97:                               # %_ZNSolsEPFRSoS_E.exit154
	movq	8(%rsp), %rdi
	cmpq	%r15, %rdi
	je	.LBB6_99
# %bb.98:                               # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i169
	callq	_ZdlPv
.LBB6_99:                               # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit171
	movl	%r14d, %eax
	addq	$152, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB6_100:                              # %_ZSteqIcSt11char_traitsIcESaIcEEbRKNSt7__cxx1112basic_stringIT_T0_T1_EEPKS5_.exit.thread
	.cfi_def_cfa_offset 208
.Ltmp104:
	leaq	80(%rsp), %rdi
	callq	hipEventCreate
.Ltmp105:
# %bb.101:
.Ltmp106:
	leaq	48(%rsp), %rdi
	callq	hipEventCreate
.Ltmp107:
# %bb.102:
	movq	80(%rsp), %rdi
.Ltmp108:
	xorl	%r12d, %r12d
	xorl	%esi, %esi
	callq	hipEventRecord
.Ltmp109:
# %bb.103:                              # %.preheader
	leaq	(,%r13,4), %rax
	movq	112(%rsp), %r10                 # 8-byte Reload
.LBB6_104:                              # %.preheader.lr.ph.i
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB6_105 Depth 2
                                        #       Child Loop BB6_106 Depth 3
	xorl	%ecx, %ecx
	movq	%r10, %rdx
	xorl	%esi, %esi
.LBB6_105:                              # %.preheader.i
                                        #   Parent Loop BB6_104 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB6_106 Depth 3
	movl	%ecx, %edi
	leaq	(%r14,%rdi,4), %rdi
	movq	%rdx, %r8
	xorl	%r9d, %r9d
.LBB6_106:                              #   Parent Loop BB6_104 Depth=1
                                        #     Parent Loop BB6_105 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movss	(%rdi,%r9,4), %xmm0             # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, (%r8)
	incq	%r9
	addq	%rax, %r8
	cmpq	%r9, %rbp
	jne	.LBB6_106
# %bb.107:                              # %._crit_edge.i.loopexit
                                        #   in Loop: Header=BB6_105 Depth=2
	incq	%rsi
	addq	$4, %rdx
	addl	%ebx, %ecx
	cmpq	%r13, %rsi
	jne	.LBB6_105
# %bb.108:                              # %_Z3cpuPfS_ii.exit.loopexit
                                        #   in Loop: Header=BB6_104 Depth=1
	incl	%r12d
	cmpl	$100, %r12d
	jne	.LBB6_104
# %bb.109:
	movq	48(%rsp), %rdi
.Ltmp110:
	xorl	%esi, %esi
	callq	hipEventRecord
.Ltmp111:
# %bb.110:
	movq	48(%rsp), %rdi
.Ltmp112:
	callq	hipEventSynchronize
.Ltmp113:
# %bb.111:
	movq	%rsp, %rdi
	movl	$0, (%rdi)
	movq	80(%rsp), %rsi
	movq	48(%rsp), %rdx
.Ltmp115:
	callq	hipEventElapsedTime
.Ltmp116:
# %bb.112:
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rsp), %xmm0
	movl	$.L.str.14, %edi
	movb	$1, %al
	callq	printf
	movq	80(%rsp), %rdi
.Ltmp117:
	callq	hipEventDestroy
.Ltmp118:
# %bb.113:
	movq	48(%rsp), %rdi
.Ltmp119:
	callq	hipEventDestroy
.Ltmp120:
# %bb.114:
	leaq	24(%rsp), %r15
	jmp	.LBB6_96
.LBB6_115:                              # %_ZSteqIcSt11char_traitsIcESaIcEEbRKNSt7__cxx1112basic_stringIT_T0_T1_EEPKS5_.exit168.thread
.Ltmp69:
	movabsq	$137438953504, %rdx             # imm = 0x2000000020
	movq	%r13, %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
.Ltmp70:
# %bb.116:
	testl	%eax, %eax
	jne	.LBB6_88
# %bb.117:
	movq	80(%rsp), %rdi
	movq	48(%rsp), %rsi
.Ltmp71:
	movl	%ebp, %edx
	movl	%ebx, %ecx
	callq	_Z31__device_stub__no_bank_conflictPfS_ii
.Ltmp72:
	jmp	.LBB6_88
.LBB6_118:
.Ltmp121:
	jmp	.LBB6_137
.LBB6_119:
.Ltmp5:
	jmp	.LBB6_121
.LBB6_120:
.Ltmp22:
.LBB6_121:
	movq	%rax, %rbx
	jmp	.LBB6_131
.LBB6_122:
.Ltmp2:
	jmp	.LBB6_137
.LBB6_123:
.Ltmp19:
	jmp	.LBB6_137
.LBB6_124:
.Ltmp85:
	jmp	.LBB6_137
.LBB6_125:
.Ltmp114:
	jmp	.LBB6_137
.LBB6_126:
.Ltmp54:
	jmp	.LBB6_137
.LBB6_127:
.Ltmp51:
	jmp	.LBB6_137
.LBB6_128:
.Ltmp90:
	jmp	.LBB6_137
.LBB6_129:
.Ltmp16:
	movq	%rax, %rbx
	leaq	64(%rsp), %rax
	movq	-16(%rax), %rdi
	cmpq	%rax, %rdi
	je	.LBB6_131
# %bb.130:                              # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i141
	callq	_ZdlPv
.LBB6_131:
	leaq	96(%rsp), %rax
	movq	-16(%rax), %rdi
	cmpq	%rax, %rdi
	je	.LBB6_138
# %bb.132:                              # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i131
	callq	_ZdlPv
	jmp	.LBB6_138
.LBB6_133:
.Ltmp68:
	jmp	.LBB6_137
.LBB6_134:
.Ltmp61:
	jmp	.LBB6_137
.LBB6_135:
.Ltmp103:
	jmp	.LBB6_137
.LBB6_136:
.Ltmp130:
.LBB6_137:
	movq	%rax, %rbx
.LBB6_138:
	movq	8(%rsp), %rdi
	leaq	24(%rsp), %rax
	cmpq	%rax, %rdi
	je	.LBB6_140
# %bb.139:                              # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i172
	callq	_ZdlPv
.LBB6_140:                              # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit174
	movq	%rbx, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end6:
	.size	main, .Lfunc_end6-main
	.cfi_endproc
	.section	.gcc_except_table,"a",@progbits
	.p2align	2, 0x0
GCC_except_table6:
.Lexception0:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end0-.Lcst_begin0
.Lcst_begin0:
	.uleb128 .Lfunc_begin0-.Lfunc_begin0    # >> Call Site 1 <<
	.uleb128 .Ltmp17-.Lfunc_begin0          #   Call between .Lfunc_begin0 and .Ltmp17
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp17-.Lfunc_begin0          # >> Call Site 2 <<
	.uleb128 .Ltmp18-.Ltmp17                #   Call between .Ltmp17 and .Ltmp18
	.uleb128 .Ltmp19-.Lfunc_begin0          #     jumps to .Ltmp19
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp20-.Lfunc_begin0          # >> Call Site 3 <<
	.uleb128 .Ltmp21-.Ltmp20                #   Call between .Ltmp20 and .Ltmp21
	.uleb128 .Ltmp22-.Lfunc_begin0          #     jumps to .Ltmp22
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp0-.Lfunc_begin0           # >> Call Site 4 <<
	.uleb128 .Ltmp1-.Ltmp0                  #   Call between .Ltmp0 and .Ltmp1
	.uleb128 .Ltmp2-.Lfunc_begin0           #     jumps to .Ltmp2
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp3-.Lfunc_begin0           # >> Call Site 5 <<
	.uleb128 .Ltmp4-.Ltmp3                  #   Call between .Ltmp3 and .Ltmp4
	.uleb128 .Ltmp5-.Lfunc_begin0           #     jumps to .Ltmp5
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp6-.Lfunc_begin0           # >> Call Site 6 <<
	.uleb128 .Ltmp15-.Ltmp6                 #   Call between .Ltmp6 and .Ltmp15
	.uleb128 .Ltmp16-.Lfunc_begin0          #     jumps to .Ltmp16
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp23-.Lfunc_begin0          # >> Call Site 7 <<
	.uleb128 .Ltmp48-.Ltmp23                #   Call between .Ltmp23 and .Ltmp48
	.uleb128 .Ltmp130-.Lfunc_begin0         #     jumps to .Ltmp130
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp49-.Lfunc_begin0          # >> Call Site 8 <<
	.uleb128 .Ltmp50-.Ltmp49                #   Call between .Ltmp49 and .Ltmp50
	.uleb128 .Ltmp51-.Lfunc_begin0          #     jumps to .Ltmp51
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp52-.Lfunc_begin0          # >> Call Site 9 <<
	.uleb128 .Ltmp53-.Ltmp52                #   Call between .Ltmp52 and .Ltmp53
	.uleb128 .Ltmp54-.Lfunc_begin0          #     jumps to .Ltmp54
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp55-.Lfunc_begin0          # >> Call Site 10 <<
	.uleb128 .Ltmp60-.Ltmp55                #   Call between .Ltmp55 and .Ltmp60
	.uleb128 .Ltmp61-.Lfunc_begin0          #     jumps to .Ltmp61
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp62-.Lfunc_begin0          # >> Call Site 11 <<
	.uleb128 .Ltmp67-.Ltmp62                #   Call between .Ltmp62 and .Ltmp67
	.uleb128 .Ltmp68-.Lfunc_begin0          #     jumps to .Ltmp68
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp77-.Lfunc_begin0          # >> Call Site 12 <<
	.uleb128 .Ltmp80-.Ltmp77                #   Call between .Ltmp77 and .Ltmp80
	.uleb128 .Ltmp90-.Lfunc_begin0          #     jumps to .Ltmp90
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp122-.Lfunc_begin0         # >> Call Site 13 <<
	.uleb128 .Ltmp129-.Ltmp122              #   Call between .Ltmp122 and .Ltmp129
	.uleb128 .Ltmp130-.Lfunc_begin0         #     jumps to .Ltmp130
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp73-.Lfunc_begin0          # >> Call Site 14 <<
	.uleb128 .Ltmp76-.Ltmp73                #   Call between .Ltmp73 and .Ltmp76
	.uleb128 .Ltmp90-.Lfunc_begin0          #     jumps to .Ltmp90
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp81-.Lfunc_begin0          # >> Call Site 15 <<
	.uleb128 .Ltmp84-.Ltmp81                #   Call between .Ltmp81 and .Ltmp84
	.uleb128 .Ltmp85-.Lfunc_begin0          #     jumps to .Ltmp85
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp86-.Lfunc_begin0          # >> Call Site 16 <<
	.uleb128 .Ltmp89-.Ltmp86                #   Call between .Ltmp86 and .Ltmp89
	.uleb128 .Ltmp90-.Lfunc_begin0          #     jumps to .Ltmp90
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp91-.Lfunc_begin0          # >> Call Site 17 <<
	.uleb128 .Ltmp102-.Ltmp91               #   Call between .Ltmp91 and .Ltmp102
	.uleb128 .Ltmp103-.Lfunc_begin0         #     jumps to .Ltmp103
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp104-.Lfunc_begin0         # >> Call Site 18 <<
	.uleb128 .Ltmp113-.Ltmp104              #   Call between .Ltmp104 and .Ltmp113
	.uleb128 .Ltmp114-.Lfunc_begin0         #     jumps to .Ltmp114
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp115-.Lfunc_begin0         # >> Call Site 19 <<
	.uleb128 .Ltmp120-.Ltmp115              #   Call between .Ltmp115 and .Ltmp120
	.uleb128 .Ltmp121-.Lfunc_begin0         #     jumps to .Ltmp121
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp69-.Lfunc_begin0          # >> Call Site 20 <<
	.uleb128 .Ltmp72-.Ltmp69                #   Call between .Ltmp69 and .Ltmp72
	.uleb128 .Ltmp90-.Lfunc_begin0          #     jumps to .Ltmp90
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp72-.Lfunc_begin0          # >> Call Site 21 <<
	.uleb128 .Lfunc_end6-.Ltmp72            #   Call between .Ltmp72 and .Lfunc_end6
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end0:
	.p2align	2, 0x0
                                        # -- End function
	.section	.text._ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_,"axG",@progbits,_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_,comdat
	.weak	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_ # -- Begin function _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_
	.p2align	1, 0x90
	.type	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_,@function
_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_: # @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	pushq	%rax
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	leaq	16(%rdi), %rax
	movq	%rax, (%rdi)
	testq	%rsi, %rsi
	je	.LBB7_1
# %bb.2:
	movq	%rsi, %rbx
	movq	%rdi, %r14
	movq	%rsi, %rdi
	callq	strlen
	leaq	(%rax,%rbx), %rdx
	movq	%r14, %rdi
	movq	%rbx, %rsi
	addq	$8, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	jmp	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag # TAILCALL
.LBB7_1:
	.cfi_def_cfa_offset 32
	movl	$.L.str.15, %edi
	callq	_ZSt19__throw_logic_errorPKc
.Lfunc_end7:
	.size	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_, .Lfunc_end7-_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZStneIcSt11char_traitsIcESaIcEEbRKNSt7__cxx1112basic_stringIT_T0_T1_EEPKS5_,"axG",@progbits,_ZStneIcSt11char_traitsIcESaIcEEbRKNSt7__cxx1112basic_stringIT_T0_T1_EEPKS5_,comdat
	.weak	_ZStneIcSt11char_traitsIcESaIcEEbRKNSt7__cxx1112basic_stringIT_T0_T1_EEPKS5_ # -- Begin function _ZStneIcSt11char_traitsIcESaIcEEbRKNSt7__cxx1112basic_stringIT_T0_T1_EEPKS5_
	.type	_ZStneIcSt11char_traitsIcESaIcEEbRKNSt7__cxx1112basic_stringIT_T0_T1_EEPKS5_,@function
_ZStneIcSt11char_traitsIcESaIcEEbRKNSt7__cxx1112basic_stringIT_T0_T1_EEPKS5_: # @_ZStneIcSt11char_traitsIcESaIcEEbRKNSt7__cxx1112basic_stringIT_T0_T1_EEPKS5_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rsi, %rbx
	movq	%rdi, %r15
	movq	8(%rdi), %r14
	movq	%rsi, %rdi
	callq	strlen
	movq	%rax, %rcx
	movb	$1, %al
	cmpq	%rcx, %r14
	jne	.LBB8_4
# %bb.1:
	testq	%r14, %r14
	je	.LBB8_2
# %bb.3:
	movq	(%r15), %rdi
	movq	%rbx, %rsi
	movq	%r14, %rdx
	callq	bcmp@PLT
	testl	%eax, %eax
	setne	%al
	jmp	.LBB8_4
.LBB8_2:
	xorl	%eax, %eax
.LBB8_4:                                # %_ZSteqIcSt11char_traitsIcESaIcEEbRKNSt7__cxx1112basic_stringIT_T0_T1_EEPKS5_.exit
                                        # kill: def $al killed $al killed $eax
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end8:
	.size	_ZStneIcSt11char_traitsIcESaIcEEbRKNSt7__cxx1112basic_stringIT_T0_T1_EEPKS5_, .Lfunc_end8-_ZStneIcSt11char_traitsIcESaIcEEbRKNSt7__cxx1112basic_stringIT_T0_T1_EEPKS5_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag,"axG",@progbits,_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag,comdat
	.weak	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag # -- Begin function _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag
	.p2align	1, 0x90
	.type	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag,@function
_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag: # @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdx, %r14
	movq	%rsi, %r15
	movq	%rdi, %rbx
	subq	%rsi, %r14
	movq	%r14, (%rsp)
	cmpq	$15, %r14
	jbe	.LBB9_1
# %bb.2:
	movq	%rsp, %r12
	movq	%rbx, %rdi
	movq	%r12, %rsi
	xorl	%edx, %edx
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE9_M_createERmm
	movq	%rax, (%rbx)
	movq	(%r12), %rcx
	movq	%rcx, 16(%rbx)
	jmp	.LBB9_3
.LBB9_1:                                # %._crit_edge
	movq	(%rbx), %rax
.LBB9_3:
	testq	%r14, %r14
	je	.LBB9_7
# %bb.4:
	cmpq	$1, %r14
	jne	.LBB9_6
# %bb.5:
	movb	(%r15), %cl
	movb	%cl, (%rax)
	jmp	.LBB9_7
.LBB9_6:
	movq	%rax, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	callq	memcpy@PLT
.LBB9_7:                                # %_ZZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tagEN6_GuardD2Ev.exit
	movq	(%rsp), %rax
	movq	%rax, 8(%rbx)
	movq	(%rbx), %rcx
	movb	$0, (%rcx,%rax)
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end9:
	.size	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag, .Lfunc_end9-_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag
	.cfi_endproc
                                        # -- End function
	.text
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB10_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB10_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9naive_gpuPfS_ii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z13shared_memoryPfS_ii, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z16no_bank_conflictPfS_ii, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z13loop_unrolledPfS_ii, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end10:
	.size	__hip_module_ctor, .Lfunc_end10-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB11_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB11_2:
	retq
.Lfunc_end11:
	.size	__hip_module_dtor, .Lfunc_end11-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	" "
	.size	.L.str, 2

	.type	_Z9naive_gpuPfS_ii,@object      # @_Z9naive_gpuPfS_ii
	.section	.rodata,"a",@progbits
	.globl	_Z9naive_gpuPfS_ii
	.p2align	3, 0x0
_Z9naive_gpuPfS_ii:
	.quad	_Z24__device_stub__naive_gpuPfS_ii
	.size	_Z9naive_gpuPfS_ii, 8

	.type	_Z13shared_memoryPfS_ii,@object # @_Z13shared_memoryPfS_ii
	.globl	_Z13shared_memoryPfS_ii
	.p2align	3, 0x0
_Z13shared_memoryPfS_ii:
	.quad	_Z28__device_stub__shared_memoryPfS_ii
	.size	_Z13shared_memoryPfS_ii, 8

	.type	_Z16no_bank_conflictPfS_ii,@object # @_Z16no_bank_conflictPfS_ii
	.globl	_Z16no_bank_conflictPfS_ii
	.p2align	3, 0x0
_Z16no_bank_conflictPfS_ii:
	.quad	_Z31__device_stub__no_bank_conflictPfS_ii
	.size	_Z16no_bank_conflictPfS_ii, 8

	.type	_Z13loop_unrolledPfS_ii,@object # @_Z13loop_unrolledPfS_ii
	.globl	_Z13loop_unrolledPfS_ii
	.p2align	3, 0x0
_Z13loop_unrolledPfS_ii:
	.quad	_Z28__device_stub__loop_unrolledPfS_ii
	.size	_Z13loop_unrolledPfS_ii, 8

	.type	.L.str.1,@object                # @.str.1
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.1:
	.asciz	"cpu"
	.size	.L.str.1, 4

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"naive_gpu"
	.size	.L.str.2, 10

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"shared_memory"
	.size	.L.str.3, 14

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"no_bank_conflict"
	.size	.L.str.4, 17

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"loop_unrolled"
	.size	.L.str.5, 14

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"Wrong parameters of program version, you can only choose from following:"
	.size	.L.str.6, 73

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	" cpu, naive_gpu, shared_memory, no_bank_conflict, loop_unrolled."
	.size	.L.str.7, 65

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"Wrong number of parameters."
	.size	.L.str.8, 28

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"Wrong parameters of the the matrix dimension, should be two positive numbers."
	.size	.L.str.9, 78

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"Matrix Dimension: ("
	.size	.L.str.10, 20

	.type	.L.str.11,@object               # @.str.11
.L.str.11:
	.asciz	", "
	.size	.L.str.11, 3

	.type	.L.str.12,@object               # @.str.12
.L.str.12:
	.asciz	")"
	.size	.L.str.12, 2

	.type	.L.str.13,@object               # @.str.13
.L.str.13:
	.asciz	"Program Version: "
	.size	.L.str.13, 18

	.type	.L.str.14,@object               # @.str.14
.L.str.14:
	.asciz	"Elapsed time\357\274\232%f <ms>\n"
	.size	.L.str.14, 24

	.type	.L.str.15,@object               # @.str.15
.L.str.15:
	.asciz	"basic_string: construction from null is not valid"
	.size	.L.str.15, 50

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z9naive_gpuPfS_ii"
	.size	.L__unnamed_1, 19

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z13shared_memoryPfS_ii"
	.size	.L__unnamed_2, 24

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z16no_bank_conflictPfS_ii"
	.size	.L__unnamed_3, 27

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"_Z13loop_unrolledPfS_ii"
	.size	.L__unnamed_4, 24

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z24__device_stub__naive_gpuPfS_ii
	.addrsig_sym _Z28__device_stub__shared_memoryPfS_ii
	.addrsig_sym _Z31__device_stub__no_bank_conflictPfS_ii
	.addrsig_sym _Z28__device_stub__loop_unrolledPfS_ii
	.addrsig_sym __gxx_personality_v0
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Unwind_Resume
	.addrsig_sym _ZSt4cout
	.addrsig_sym _Z9naive_gpuPfS_ii
	.addrsig_sym _Z13shared_memoryPfS_ii
	.addrsig_sym _Z16no_bank_conflictPfS_ii
	.addrsig_sym _Z13loop_unrolledPfS_ii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z9naive_gpuPfS_ii      ; -- Begin function _Z9naive_gpuPfS_ii
	.globl	_Z9naive_gpuPfS_ii
	.p2align	8
	.type	_Z9naive_gpuPfS_ii,@function
_Z9naive_gpuPfS_ii:                     ; @_Z9naive_gpuPfS_ii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b64 s[4:5], s[0:1], 0x10
	v_bfe_u32 v2, v0, 10, 10
	v_and_b32_e32 v3, 0x3ff, v0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[0:1], null, s15, s3, v[2:3]
	v_mad_u64_u32 v[1:2], null, s14, s2, v[3:4]
	v_cmp_gt_i32_e32 vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_i32_e64 s2, s5, v1
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_2
; %bb.1:
	s_load_b128 s[0:3], s[0:1], 0x0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, v0, s5, v[1:2]
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s0, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
	global_load_b32 v4, v[2:3], off
	v_mad_u64_u32 v[2:3], null, v1, s4, v[0:1]
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[2:3]
	v_add_co_u32 v0, vcc_lo, s2, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[0:1], v4, off
.LBB0_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9naive_gpuPfS_ii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z9naive_gpuPfS_ii, .Lfunc_end0-_Z9naive_gpuPfS_ii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 232
; NumSgprs: 18
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z13shared_memoryPfS_ii ; -- Begin function _Z13shared_memoryPfS_ii
	.globl	_Z13shared_memoryPfS_ii
	.p2align	8
	.type	_Z13shared_memoryPfS_ii,@function
_Z13shared_memoryPfS_ii:                ; @_Z13shared_memoryPfS_ii
; %bb.0:
	s_clause 0x1
	s_load_b64 s[2:3], s[0:1], 0x10
	s_load_b128 s[4:7], s[0:1], 0x0
	v_bfe_u32 v1, v0, 10, 10
	v_and_b32_e32 v2, 0x3ff, v0
	s_lshl_b32 s8, s15, 5
	s_lshl_b32 s1, s14, 5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, s8, v1
	v_add_nc_u32_e32 v0, s1, v2
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e32 vcc_lo, s2, v3
	v_cmp_gt_i32_e64 s0, s3, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s9, vcc_lo, s0
	s_and_saveexec_b32 s0, s9
	s_cbranch_execz .LBB1_2
; %bb.1:
	v_mad_u64_u32 v[4:5], null, v3, s3, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v5, 31, v4
	v_lshlrev_b64 v[3:4], 2, v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, s4, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
	global_load_b32 v0, v[3:4], off
	v_lshlrev_b32_e32 v3, 2, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_lshl_add_u32 v3, v2, 7, v3
	s_waitcnt vmcnt(0)
	ds_store_b32 v3, v0
.LBB1_2:
	s_or_b32 exec_lo, exec_lo, s0
	v_add_nc_u32_e32 v0, s8, v2
	v_add_nc_u32_e32 v3, s1, v1
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmp_gt_i32_e32 vcc_lo, s2, v0
	v_cmp_gt_i32_e64 s0, s3, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, vcc_lo, s0
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_4
; %bb.3:
	v_lshlrev_b32_e32 v2, 2, v2
	v_mad_u64_u32 v[4:5], null, v3, s2, v[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshl_add_u32 v0, v1, 7, v2
	v_ashrrev_i32_e32 v5, 31, v4
	ds_load_b32 v2, v0
	v_lshlrev_b64 v[0:1], 2, v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[0:1], v2, off
.LBB1_4:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z13shared_memoryPfS_ii
		.amdhsa_group_segment_fixed_size 4096
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 24
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z13shared_memoryPfS_ii, .Lfunc_end1-_Z13shared_memoryPfS_ii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 308
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 4096 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z16no_bank_conflictPfS_ii ; -- Begin function _Z16no_bank_conflictPfS_ii
	.globl	_Z16no_bank_conflictPfS_ii
	.p2align	8
	.type	_Z16no_bank_conflictPfS_ii,@function
_Z16no_bank_conflictPfS_ii:             ; @_Z16no_bank_conflictPfS_ii
; %bb.0:
	s_clause 0x1
	s_load_b64 s[2:3], s[0:1], 0x10
	s_load_b128 s[4:7], s[0:1], 0x0
	v_bfe_u32 v1, v0, 10, 10
	v_and_b32_e32 v2, 0x3ff, v0
	s_lshl_b32 s8, s15, 5
	s_lshl_b32 s1, s14, 5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, s8, v1
	v_add_nc_u32_e32 v0, s1, v2
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e32 vcc_lo, s2, v3
	v_cmp_gt_i32_e64 s0, s3, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s9, vcc_lo, s0
	s_and_saveexec_b32 s0, s9
	s_cbranch_execz .LBB2_2
; %bb.1:
	v_mad_u64_u32 v[4:5], null, v3, s3, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v5, 31, v4
	v_lshlrev_b64 v[3:4], 2, v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, s4, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
	global_load_b32 v0, v[3:4], off
	v_lshlrev_b32_e32 v3, 2, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u32_u24 v3, 0x84, v2, v3
	s_waitcnt vmcnt(0)
	ds_store_b32 v3, v0
.LBB2_2:
	s_or_b32 exec_lo, exec_lo, s0
	v_add_nc_u32_e32 v0, s8, v2
	v_add_nc_u32_e32 v3, s1, v1
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmp_gt_i32_e32 vcc_lo, s2, v0
	v_cmp_gt_i32_e64 s0, s3, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, vcc_lo, s0
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_4
; %bb.3:
	v_lshlrev_b32_e32 v2, 2, v2
	v_mad_u64_u32 v[4:5], null, v3, s2, v[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mad_u32_u24 v0, 0x84, v1, v2
	v_ashrrev_i32_e32 v5, 31, v4
	ds_load_b32 v2, v0
	v_lshlrev_b64 v[0:1], 2, v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[0:1], v2, off
.LBB2_4:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16no_bank_conflictPfS_ii
		.amdhsa_group_segment_fixed_size 4224
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 24
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z16no_bank_conflictPfS_ii, .Lfunc_end2-_Z16no_bank_conflictPfS_ii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 316
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 4224 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z13loop_unrolledPfS_ii ; -- Begin function _Z13loop_unrolledPfS_ii
	.globl	_Z13loop_unrolledPfS_ii
	.p2align	8
	.type	_Z13loop_unrolledPfS_ii,@function
_Z13loop_unrolledPfS_ii:                ; @_Z13loop_unrolledPfS_ii
; %bb.0:
	s_clause 0x1
	s_load_b64 s[2:3], s[0:1], 0x10
	s_load_b128 s[4:7], s[0:1], 0x0
	v_and_b32_e32 v1, 0x3ff, v0
	v_bfe_u32 v2, v0, 10, 10
	s_lshl_b32 s1, s14, 5
	s_lshl_b32 s8, s15, 5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v0, s1, v1
	v_add_nc_u32_e32 v4, s8, v2
	v_lshlrev_b32_e32 v3, 2, v1
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_gt_i32_e32 vcc_lo, s2, v0
	v_cmp_gt_i32_e64 s0, s3, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, vcc_lo, s0
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB3_2
; %bb.1:
	v_mad_u64_u32 v[5:6], null, v4, s2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v6, 31, v5
	v_lshlrev_b64 v[5:6], 2, v[5:6]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v5, s0, s4, v5
	v_add_co_ci_u32_e64 v6, s0, s5, v6, s0
	global_load_b32 v5, v[5:6], off
	v_mad_u32_u24 v6, 0x84, v2, v3
	s_waitcnt vmcnt(0)
	ds_store_b32 v6, v5
.LBB3_2:
	s_or_b32 exec_lo, exec_lo, s9
	s_and_saveexec_b32 s0, vcc_lo
	s_cbranch_execz .LBB3_9
; %bb.3:
	v_add_nc_u32_e32 v5, 8, v4
	s_mov_b32 s9, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s3, v5
	s_cbranch_execz .LBB3_5
; %bb.4:
	v_mad_u64_u32 v[6:7], null, v5, s2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v7, 31, v6
	v_lshlrev_b64 v[5:6], 2, v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v5, vcc_lo, s4, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, s5, v6, vcc_lo
	global_load_b32 v5, v[5:6], off
	v_mad_u32_u24 v6, 0x84, v2, v3
	s_waitcnt vmcnt(0)
	ds_store_b32 v6, v5 offset:1056
.LBB3_5:
	s_or_b32 exec_lo, exec_lo, s9
	v_add_nc_u32_e32 v5, 16, v4
	s_mov_b32 s9, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s3, v5
	s_cbranch_execz .LBB3_7
; %bb.6:
	v_mad_u64_u32 v[6:7], null, v5, s2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v7, 31, v6
	v_lshlrev_b64 v[5:6], 2, v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v5, vcc_lo, s4, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, s5, v6, vcc_lo
	global_load_b32 v5, v[5:6], off
	v_mad_u32_u24 v6, 0x84, v2, v3
	s_waitcnt vmcnt(0)
	ds_store_b32 v6, v5 offset:2112
.LBB3_7:                                ; %.critedge
	s_or_b32 exec_lo, exec_lo, s9
	v_add_nc_u32_e32 v4, 24, v4
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_i32_e32 vcc_lo, s3, v4
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB3_9
; %bb.8:
	v_mad_u64_u32 v[5:6], null, v4, s2, v[0:1]
	v_mad_u32_u24 v3, 0x84, v2, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v6, 31, v5
	v_lshlrev_b64 v[4:5], 2, v[5:6]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, s4, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v5, vcc_lo
	global_load_b32 v0, v[4:5], off
	s_waitcnt vmcnt(0)
	ds_store_b32 v3, v0 offset:3168
.LBB3_9:                                ; %Flow54
	s_or_b32 exec_lo, exec_lo, s0
	v_add_nc_u32_e32 v0, s8, v1
	v_add_nc_u32_e32 v3, s1, v2
	v_lshlrev_b32_e32 v2, 2, v2
	s_waitcnt lgkmcnt(0)
	s_barrier
	v_cmp_gt_i32_e32 vcc_lo, s3, v0
	v_cmp_gt_i32_e64 s0, s2, v3
	buffer_gl0_inv
	s_and_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB3_11
; %bb.10:
	v_mad_u64_u32 v[4:5], null, v3, s3, v[0:1]
	v_mad_u32_u24 v5, 0x84, v1, v2
	ds_load_b32 v6, v5
	v_ashrrev_i32_e32 v5, 31, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	v_add_co_u32 v4, s0, s6, v4
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v5, s0, s7, v5, s0
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[4:5], v6, off
.LBB3_11:
	s_or_b32 exec_lo, exec_lo, s1
	s_and_saveexec_b32 s0, vcc_lo
	s_cbranch_execz .LBB3_18
; %bb.12:
	v_add_nc_u32_e32 v4, 8, v3
	s_mov_b32 s0, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s2, v4
	s_cbranch_execz .LBB3_14
; %bb.13:
	v_mad_u64_u32 v[5:6], null, v4, s3, v[0:1]
	v_mad_u32_u24 v4, 0x84, v1, v2
	ds_load_b32 v7, v4 offset:32
	v_ashrrev_i32_e32 v6, 31, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 2, v[5:6]
	v_add_co_u32 v4, vcc_lo, s6, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v5, vcc_lo
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[4:5], v7, off
.LBB3_14:
	s_or_b32 exec_lo, exec_lo, s0
	v_add_nc_u32_e32 v4, 16, v3
	s_mov_b32 s0, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s2, v4
	s_cbranch_execz .LBB3_16
; %bb.15:
	v_mad_u64_u32 v[5:6], null, v4, s3, v[0:1]
	v_mad_u32_u24 v4, 0x84, v1, v2
	ds_load_b32 v7, v4 offset:64
	v_ashrrev_i32_e32 v6, 31, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 2, v[5:6]
	v_add_co_u32 v4, vcc_lo, s6, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v5, vcc_lo
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[4:5], v7, off
.LBB3_16:                               ; %.critedge39
	s_or_b32 exec_lo, exec_lo, s0
	v_add_nc_u32_e32 v3, 24, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_i32_e32 vcc_lo, s2, v3
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB3_18
; %bb.17:
	v_mad_u64_u32 v[4:5], null, v3, s3, v[0:1]
	v_mad_u32_u24 v0, 0x84, v1, v2
	ds_load_b32 v2, v0 offset:96
	v_ashrrev_i32_e32 v5, 31, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[4:5]
	v_add_co_u32 v0, vcc_lo, s6, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[0:1], v2, off
.LBB3_18:                               ; %.critedge40
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z13loop_unrolledPfS_ii
		.amdhsa_group_segment_fixed_size 4224
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 24
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end3:
	.size	_Z13loop_unrolledPfS_ii, .Lfunc_end3-_Z13loop_unrolledPfS_ii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 928
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 4224 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z9naive_gpuPfS_ii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z9naive_gpuPfS_ii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     5
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 4096
    .kernarg_segment_align: 8
    .kernarg_segment_size: 24
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z13shared_memoryPfS_ii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z13shared_memoryPfS_ii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     6
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 4224
    .kernarg_segment_align: 8
    .kernarg_segment_size: 24
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z16no_bank_conflictPfS_ii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z16no_bank_conflictPfS_ii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     6
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 4224
    .kernarg_segment_align: 8
    .kernarg_segment_size: 24
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z13loop_unrolledPfS_ii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z13loop_unrolledPfS_ii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     8
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
