#include <cmath>
#include <cstdlib>
#include <cstdio>
#include <sys/time.h>

#define BLOCK 16

__global__ void matmul(float *A, float *B, float *C, int M, int N, int K) {
	// Shared memory
	__shared__ float s_A[BLOCK][BLOCK];
	__shared__ float s_B[BLOCK][BLOCK];

	int a_begin = N * BLOCK * blockIdx.y; // N * blockDim.y * blockIdx.y
	int a_end = a_begin + N;
	int a_step = BLOCK; // blockDim.x

	int b_begin = BLOCK * blockIdx.x; // blockDim.y * blockIdx.x
	int b_step = BLOCK * K; // blockDim.y * K

	int a = a_begin;
	int b = b_begin;

	int a_th = N * threadIdx.y + threadIdx.x;
	int b_th = K * threadIdx.y + threadIdx.x;

	const int MN = M*N, NK = N*K;
	float sum = 0;

	if (M%BLOCK == 0 && N%BLOCK == 0 && K%BLOCK == 0) {
		while (a < a_end) {
			// Copy to shared memory
			__syncthreads();
			s_A[threadIdx.y][threadIdx.x] = A[a + a_th];
			s_B[threadIdx.y][threadIdx.x] = B[b + b_th];
			__syncthreads();

			// Multiply
		#pragma unroll
			for (int i=0; i<BLOCK; i++) {
				sum += s_A[threadIdx.y][i] * s_B[i][threadIdx.x];
			}

			a += a_step;
			b += b_step;
		}
	} else {
		// Out of bound case
		while (a < a_end) {
			// Copy to shared memory
			__syncthreads();
			s_A[threadIdx.y][threadIdx.x] = a + a_th < MN ? A[a + a_th] : 0.0;
			s_B[threadIdx.y][threadIdx.x] = b + b_th < NK ? B[b + b_th] : 0.0;
			__syncthreads();

			// Multiply
		#pragma unroll
			for (int i=0; i<BLOCK; i++) {
				sum += s_A[threadIdx.y][i] * s_B[i][threadIdx.x];
			}

			a += a_step;
			b += b_step;
		}

		if (blockIdx.y * BLOCK + threadIdx.y >= M) return;
		if (blockIdx.x * BLOCK + threadIdx.x >= K) return;
	}
		
	int c_idx = \
		K * BLOCK * blockIdx.y + \
		BLOCK * blockIdx.x + \
		K * threadIdx.y + \
		threadIdx.x;

	C[c_idx] = sum;
}
 
int main(int argc, char **argv) {
	int M, N, K;
	switch(argc) {
		case 2: M = atoi(argv[1]);
				N = M;
				K = M;
				break;
		case 4:	M = atoi(argv[1]);
				N = atoi(argv[2]);
				K = atoi(argv[3]);
				break;
		default: printf("Invalid number of parameters\n");
				 return 1;
	}

	// Host allocation
	float *h_A = new float [M*N];
	float *h_B = new float [N*K];
	float *h_C = new float [M*K];

	for (int i=0; i<M*N; i++) {
		h_A[i] = drand48();
	}
	for (int i=0; i<N*K; i++) {
		h_B[i] = drand48();
	}
	for (int i=0; i<M*K; i++) {
		h_C[i] = 0;
	}

	// Device allocation
	float *d_A, *d_B, *d_C;
	int mem_A = M * N * sizeof(float);
	int mem_B = N * K * sizeof(float);
	int mem_C = M * K * sizeof(float);
	cudaMalloc((void **) &d_A, mem_A);
	cudaMalloc((void **) &d_B, mem_B);
	cudaMalloc((void **) &d_C, mem_C);

	// Copy from Host to Device
	cudaMemcpy(d_A, h_A, mem_A, cudaMemcpyHostToDevice);
	cudaMemcpy(d_B, h_B, mem_B, cudaMemcpyHostToDevice);
	cudaMemcpy(d_C, h_C, mem_C, cudaMemcpyHostToDevice);

	dim3 grid((K/BLOCK)+(K%BLOCK!=0),(M/BLOCK)+(M%BLOCK!=0)); // number of blocks
	dim3 block(BLOCK,BLOCK); // threads per block

	// CUDA
	struct timeval tic, toc;
	gettimeofday(&tic, NULL);
	matmul<<<grid,block>>>(d_A, d_B, d_C, M, N, K);
	cudaDeviceSynchronize();
	gettimeofday(&toc, NULL);
	double time = toc.tv_sec-tic.tv_sec+(toc.tv_usec-tic.tv_usec)*1e-6;
	printf("[%dx%dx%d]\n", M, N, K);
	printf("CUDA  : %lfs (%lf GFlops)\n", time, 2.*M*N*K/time/1e9);

	// Copy Result from　Device to Host
	cudaMemcpy(h_C, d_C, mem_C, cudaMemcpyDeviceToHost);

	// CPU
	gettimeofday(&tic, NULL);
#pragma omp parallel for
	for (int i=0; i<M; ++i) {
		for(int j=0; j<K; j++) {
			for (int k=0; k<N; k++) {
				h_C[K*i+j] -= h_A[N*i+k] * h_B[K*k+j];
			}
		}
	}
	gettimeofday(&toc, NULL);
	time = toc.tv_sec-tic.tv_sec+(toc.tv_usec-tic.tv_usec)*1e-6;
	printf("CPU   : %lfs (%lf GFlops)\n", time, 2.*M*N*K/time/1e9);

	// Calculate error
	float err = 0;
	for (int i=0; i<M*K; ++i) { 
		err += fabs(h_C[i]);
	}
	printf("Error : %f\n",err/M/K);

	// Free memory
	delete[] h_A;
	delete[] h_B;
	delete[] h_C;

	cudaFree(d_A);
	cudaFree(d_B);
	cudaFree(d_C);

	return 0;
}

	.file	"tmpxft_0025f883_00000000-6_cuda_optimized.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2030:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z32__device_stub__Z6matmulPfS_S_iiiPfS_S_iii
	.type	_Z32__device_stub__Z6matmulPfS_S_iiiPfS_S_iii, @function
_Z32__device_stub__Z6matmulPfS_S_iiiPfS_S_iii:
.LFB2052:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movl	%r9d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z6matmulPfS_S_iii(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L2:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2052:
	.size	_Z32__device_stub__Z6matmulPfS_S_iiiPfS_S_iii, .-_Z32__device_stub__Z6matmulPfS_S_iiiPfS_S_iii
	.globl	_Z6matmulPfS_S_iii
	.type	_Z6matmulPfS_S_iii, @function
_Z6matmulPfS_S_iii:
.LFB2053:
	.cfi_startproc
	endbr64
	jmp	_Z32__device_stub__Z6matmulPfS_S_iiiPfS_S_iii
	.cfi_endproc
.LFE2053:
	.size	_Z6matmulPfS_S_iii, .-_Z6matmulPfS_S_iii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"Invalid number of parameters\n"
.LC3:
	.string	"[%dx%dx%d]\n"
.LC5:
	.string	"CUDA  : %lfs (%lf GFlops)\n"
.LC6:
	.string	"CPU   : %lfs (%lf GFlops)\n"
.LC8:
	.string	"Error : %f\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rsi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$152, %rsp
	.cfi_def_cfa_offset 208
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	cmpl	$2, %edi
	je	.L9
	cmpl	$4, %edi
	jne	.L36
	movq	8(%rsi), %rdi
	call	atoi@PLT
	movq	16(%rbp), %rdi
	movl	%eax, %ebx
	call	atoi@PLT
	movq	24(%rbp), %rdi
	movl	%eax, %r12d
	call	atoi@PLT
	movl	%eax, %ebp
	jmp	.L12
.L9:
	movq	8(%rsi), %rdi
	call	atoi@PLT
	movl	%eax, %ebx
	movl	%eax, %ebp
	movl	%eax, %r12d
	jmp	.L12
.L36:
	leaq	.LC1(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$1, %eax
	jmp	.L8
.L12:
	movabsq	$2305843009213693950, %r13
	movl	%ebx, %r15d
	imull	%r12d, %r15d
	movslq	%r15d, %rdi
	cmpq	%rdi, %r13
	jb	.L14
	movl	%r12d, %r14d
	salq	$2, %rdi
	call	_Znam@PLT
	imull	%ebp, %r14d
	movq	%rax, 8(%rsp)
	movslq	%r14d, %rdi
	cmpq	%rdi, %r13
	jnb	.L15
.L14:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L35
	call	__cxa_throw_bad_array_new_length@PLT
.L15:
	salq	$2, %rdi
	call	_Znam@PLT
	movq	%rax, 16(%rsp)
	movl	%ebx, %eax
	imull	%ebp, %eax
	movslq	%eax, %rdi
	movl	%eax, 4(%rsp)
	cmpq	%rdi, %r13
	jb	.L14
	salq	$2, %rdi
	call	_Znam@PLT
	movq	%rax, %r13
	xorl	%eax, %eax
.L17:
	cmpl	%eax, %r15d
	jle	.L37
	movq	%rax, 24(%rsp)
	call	drand48@PLT
	movq	24(%rsp), %rax
	movq	8(%rsp), %rcx
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, (%rcx,%rax,4)
	incq	%rax
	jmp	.L17
.L37:
	xorl	%eax, %eax
.L19:
	cmpl	%eax, %r14d
	jle	.L38
	movq	%rax, 24(%rsp)
	call	drand48@PLT
	movq	24(%rsp), %rax
	movq	16(%rsp), %rcx
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, (%rcx,%rax,4)
	incq	%rax
	jmp	.L19
.L38:
	xorl	%eax, %eax
.L21:
	cmpl	%eax, 4(%rsp)
	jle	.L39
	movl	$0x00000000, 0(%r13,%rax,4)
	incq	%rax
	jmp	.L21
.L39:
	sall	$2, %r15d
	sall	$2, %r14d
	leaq	56(%rsp), %rdi
	movslq	%r15d, %rdx
	movslq	%r14d, %r14
	movq	%rdx, %rsi
	movq	%rdx, 24(%rsp)
	call	cudaMalloc@PLT
	movq	%r14, %rsi
	leaq	64(%rsp), %rdi
	call	cudaMalloc@PLT
	movl	4(%rsp), %eax
	leaq	72(%rsp), %rdi
	leal	0(,%rax,4), %r15d
	movslq	%r15d, %r15
	movq	%r15, %rsi
	call	cudaMalloc@PLT
	movq	24(%rsp), %rdx
	movq	8(%rsp), %rsi
	movl	$1, %ecx
	movq	56(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rsi
	movq	64(%rsp), %rdi
	movq	%r14, %rdx
	movl	$1, %ecx
	leaq	104(%rsp), %r14
	call	cudaMemcpy@PLT
	movq	72(%rsp), %rdi
	movq	%r15, %rdx
	movq	%r13, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	xorl	%esi, %esi
	movl	%ebp, %eax
	testl	$15, %ebp
	setne	%sil
	movl	$16, %ecx
	cltd
	movq	%r14, %rdi
	idivl	%ecx
	movl	$1, 88(%rsp)
	movl	$1, 100(%rsp)
	addl	%eax, %esi
	movl	%ebx, %eax
	movl	%esi, 80(%rsp)
	xorl	%esi, %esi
	testb	$15, %bl
	setne	%sil
	cltd
	idivl	%ecx
	addl	%eax, %esi
	movabsq	$68719476752, %rax
	movl	%esi, 84(%rsp)
	xorl	%esi, %esi
	movq	%rax, 92(%rsp)
	call	gettimeofday@PLT
	movl	100(%rsp), %ecx
	movl	88(%rsp), %esi
	xorl	%r9d, %r9d
	movq	92(%rsp), %rdx
	movq	80(%rsp), %rdi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L23
	movq	72(%rsp), %rdx
	movq	64(%rsp), %rsi
	movl	%ebp, %r9d
	movl	%r12d, %r8d
	movq	56(%rsp), %rdi
	movl	%ebx, %ecx
	call	_Z32__device_stub__Z6matmulPfS_S_iiiPfS_S_iii
.L23:
	call	cudaDeviceSynchronize@PLT
	leaq	120(%rsp), %rax
	xorl	%esi, %esi
	movq	%rax, %rdi
	movq	%rax, 32(%rsp)
	call	gettimeofday@PLT
	movl	%ebp, %r8d
	movl	%r12d, %ecx
	movl	%ebx, %edx
	movq	128(%rsp), %rax
	subq	112(%rsp), %rax
	movl	$2, %edi
	leaq	.LC3(%rip), %rsi
	cvtsi2sdq	%rax, %xmm0
	movq	120(%rsp), %rax
	mulsd	.LC2(%rip), %xmm0
	subq	104(%rsp), %rax
	cvtsi2sdq	%rax, %xmm1
	xorl	%eax, %eax
	addsd	%xmm1, %xmm0
	movsd	%xmm0, 40(%rsp)
	call	__printf_chk@PLT
	cvtsi2sdl	%ebx, %xmm1
	movl	$2, %edi
	movb	$2, %al
	cvtsi2sdl	%r12d, %xmm2
	movsd	40(%rsp), %xmm0
	leaq	.LC5(%rip), %rsi
	addsd	%xmm1, %xmm1
	mulsd	%xmm2, %xmm1
	cvtsi2sdl	%ebp, %xmm2
	mulsd	%xmm2, %xmm1
	movsd	%xmm1, 24(%rsp)
	divsd	%xmm0, %xmm1
	divsd	.LC4(%rip), %xmm1
	call	__printf_chk@PLT
	movq	%r15, %rdx
	movq	72(%rsp), %rsi
	movl	$2, %ecx
	movq	%r13, %rdi
	call	cudaMemcpy@PLT
	movq	%r14, %rdi
	xorl	%esi, %esi
	call	gettimeofday@PLT
	movslq	%ebp, %rax
	xorl	%ecx, %ecx
	xorl	%r8d, %r8d
	leaq	0(,%rax,4), %r14
	xorl	%edi, %edi
.L24:
	cmpl	%edi, %ebx
	jle	.L28
	movq	8(%rsp), %rdx
	movslq	%ecx, %rax
	movq	16(%rsp), %rsi
	leaq	(%rdx,%rax,4), %r11
	xorl	%eax, %eax
.L29:
	cmpl	%eax, %ebp
	jle	.L26
	leal	(%rax,%r8), %edx
	movq	%rsi, %r9
	movslq	%edx, %rdx
	leaq	0(%r13,%rdx,4), %r10
	xorl	%edx, %edx
.L27:
	cmpl	%edx, %r12d
	jle	.L40
	movss	(%r11,%rdx,4), %xmm1
	mulss	(%r9), %xmm1
	incq	%rdx
	addq	%r14, %r9
	movss	(%r10), %xmm0
	subss	%xmm1, %xmm0
	movss	%xmm0, (%r10)
	jmp	.L27
.L40:
	incl	%eax
	addq	$4, %rsi
	jmp	.L29
.L26:
	incl	%edi
	addl	%ebp, %r8d
	addl	%r12d, %ecx
	jmp	.L24
.L28:
	movq	32(%rsp), %rdi
	xorl	%esi, %esi
	call	gettimeofday@PLT
	movq	128(%rsp), %rax
	subq	112(%rsp), %rax
	leaq	.LC6(%rip), %rsi
	cvtsi2sdq	%rax, %xmm0
	movq	120(%rsp), %rax
	subq	104(%rsp), %rax
	movl	$2, %edi
	mulsd	.LC2(%rip), %xmm0
	cvtsi2sdq	%rax, %xmm1
	movb	$2, %al
	addsd	%xmm1, %xmm0
	movsd	24(%rsp), %xmm1
	divsd	%xmm0, %xmm1
	divsd	.LC4(%rip), %xmm1
	call	__printf_chk@PLT
	xorl	%eax, %eax
	xorps	%xmm0, %xmm0
	movss	.LC7(%rip), %xmm2
.L30:
	cmpl	%eax, 4(%rsp)
	jle	.L41
	movss	0(%r13,%rax,4), %xmm1
	incq	%rax
	andps	%xmm2, %xmm1
	addss	%xmm1, %xmm0
	jmp	.L30
.L41:
	cvtsi2ssl	%ebx, %xmm1
	leaq	.LC8(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	divss	%xmm1, %xmm0
	cvtsi2ssl	%ebp, %xmm1
	divss	%xmm1, %xmm0
	cvtss2sd	%xmm0, %xmm0
	call	__printf_chk@PLT
	movq	8(%rsp), %rdi
	call	_ZdaPv@PLT
	movq	16(%rsp), %rdi
	call	_ZdaPv@PLT
	movq	%r13, %rdi
	call	_ZdaPv@PLT
	movq	56(%rsp), %rdi
	call	cudaFree@PLT
	movq	64(%rsp), %rdi
	call	cudaFree@PLT
	movq	72(%rsp), %rdi
	call	cudaFree@PLT
	xorl	%eax, %eax
.L8:
	movq	136(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L32
.L35:
	call	__stack_chk_fail@PLT
.L32:
	addq	$152, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	main, .-main
	.section	.rodata.str1.1
.LC9:
	.string	"_Z6matmulPfS_S_iii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2055:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC9(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z6matmulPfS_S_iii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2055:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC2:
	.long	-1598689907
	.long	1051772663
	.align 8
.LC4:
	.long	0
	.long	1104006501
	.section	.rodata.cst16,"aM",@progbits,16
	.align 16
.LC7:
	.long	2147483647
	.long	0
	.long	0
	.long	0
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <cmath>
#include <cstdlib>
#include <cstdio>
#include <sys/time.h>

#define BLOCK 16

__global__ void matmul(float *A, float *B, float *C, int M, int N, int K) {
	// Shared memory
	__shared__ float s_A[BLOCK][BLOCK];
	__shared__ float s_B[BLOCK][BLOCK];

	int a_begin = N * BLOCK * blockIdx.y; // N * blockDim.y * blockIdx.y
	int a_end = a_begin + N;
	int a_step = BLOCK; // blockDim.x

	int b_begin = BLOCK * blockIdx.x; // blockDim.y * blockIdx.x
	int b_step = BLOCK * K; // blockDim.y * K

	int a = a_begin;
	int b = b_begin;

	int a_th = N * threadIdx.y + threadIdx.x;
	int b_th = K * threadIdx.y + threadIdx.x;

	const int MN = M*N, NK = N*K;
	float sum = 0;

	if (M%BLOCK == 0 && N%BLOCK == 0 && K%BLOCK == 0) {
		while (a < a_end) {
			// Copy to shared memory
			__syncthreads();
			s_A[threadIdx.y][threadIdx.x] = A[a + a_th];
			s_B[threadIdx.y][threadIdx.x] = B[b + b_th];
			__syncthreads();

			// Multiply
		#pragma unroll
			for (int i=0; i<BLOCK; i++) {
				sum += s_A[threadIdx.y][i] * s_B[i][threadIdx.x];
			}

			a += a_step;
			b += b_step;
		}
	} else {
		// Out of bound case
		while (a < a_end) {
			// Copy to shared memory
			__syncthreads();
			s_A[threadIdx.y][threadIdx.x] = a + a_th < MN ? A[a + a_th] : 0.0;
			s_B[threadIdx.y][threadIdx.x] = b + b_th < NK ? B[b + b_th] : 0.0;
			__syncthreads();

			// Multiply
		#pragma unroll
			for (int i=0; i<BLOCK; i++) {
				sum += s_A[threadIdx.y][i] * s_B[i][threadIdx.x];
			}

			a += a_step;
			b += b_step;
		}

		if (blockIdx.y * BLOCK + threadIdx.y >= M) return;
		if (blockIdx.x * BLOCK + threadIdx.x >= K) return;
	}
		
	int c_idx = \
		K * BLOCK * blockIdx.y + \
		BLOCK * blockIdx.x + \
		K * threadIdx.y + \
		threadIdx.x;

	C[c_idx] = sum;
}
 
int main(int argc, char **argv) {
	int M, N, K;
	switch(argc) {
		case 2: M = atoi(argv[1]);
				N = M;
				K = M;
				break;
		case 4:	M = atoi(argv[1]);
				N = atoi(argv[2]);
				K = atoi(argv[3]);
				break;
		default: printf("Invalid number of parameters\n");
				 return 1;
	}

	// Host allocation
	float *h_A = new float [M*N];
	float *h_B = new float [N*K];
	float *h_C = new float [M*K];

	for (int i=0; i<M*N; i++) {
		h_A[i] = drand48();
	}
	for (int i=0; i<N*K; i++) {
		h_B[i] = drand48();
	}
	for (int i=0; i<M*K; i++) {
		h_C[i] = 0;
	}

	// Device allocation
	float *d_A, *d_B, *d_C;
	int mem_A = M * N * sizeof(float);
	int mem_B = N * K * sizeof(float);
	int mem_C = M * K * sizeof(float);
	hipMalloc((void **) &d_A, mem_A);
	hipMalloc((void **) &d_B, mem_B);
	hipMalloc((void **) &d_C, mem_C);

	// Copy from Host to Device
	hipMemcpy(d_A, h_A, mem_A, hipMemcpyHostToDevice);
	hipMemcpy(d_B, h_B, mem_B, hipMemcpyHostToDevice);
	hipMemcpy(d_C, h_C, mem_C, hipMemcpyHostToDevice);

	dim3 grid((K/BLOCK)+(K%BLOCK!=0),(M/BLOCK)+(M%BLOCK!=0)); // number of blocks
	dim3 block(BLOCK,BLOCK); // threads per block

	// CUDA
	struct timeval tic, toc;
	gettimeofday(&tic, NULL);
	matmul<<<grid,block>>>(d_A, d_B, d_C, M, N, K);
	hipDeviceSynchronize();
	gettimeofday(&toc, NULL);
	double time = toc.tv_sec-tic.tv_sec+(toc.tv_usec-tic.tv_usec)*1e-6;
	printf("[%dx%dx%d]\n", M, N, K);
	printf("CUDA  : %lfs (%lf GFlops)\n", time, 2.*M*N*K/time/1e9);

	// Copy Result from　Device to Host
	hipMemcpy(h_C, d_C, mem_C, hipMemcpyDeviceToHost);

	// CPU
	gettimeofday(&tic, NULL);
#pragma omp parallel for
	for (int i=0; i<M; ++i) {
		for(int j=0; j<K; j++) {
			for (int k=0; k<N; k++) {
				h_C[K*i+j] -= h_A[N*i+k] * h_B[K*k+j];
			}
		}
	}
	gettimeofday(&toc, NULL);
	time = toc.tv_sec-tic.tv_sec+(toc.tv_usec-tic.tv_usec)*1e-6;
	printf("CPU   : %lfs (%lf GFlops)\n", time, 2.*M*N*K/time/1e9);

	// Calculate error
	float err = 0;
	for (int i=0; i<M*K; ++i) { 
		err += fabs(h_C[i]);
	}
	printf("Error : %f\n",err/M/K);

	// Free memory
	delete[] h_A;
	delete[] h_B;
	delete[] h_C;

	hipFree(d_A);
	hipFree(d_B);
	hipFree(d_C);

	return 0;
}

	.text
	.file	"cuda_optimized.hip"
	.globl	_Z21__device_stub__matmulPfS_S_iii # -- Begin function _Z21__device_stub__matmulPfS_S_iii
	.type	_Z21__device_stub__matmulPfS_S_iii,@function
_Z21__device_stub__matmulPfS_S_iii:     # @_Z21__device_stub__matmulPfS_S_iii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	20(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	16(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z6matmulPfS_S_iii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z21__device_stub__matmulPfS_S_iii, .Lfunc_end0-_Z21__device_stub__matmulPfS_S_iii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI1_0:
	.quad	0x3eb0c6f7a0b5ed8d              # double 9.9999999999999995E-7
.LCPI1_1:
	.quad	0x41cdcd6500000000              # double 1.0E+9
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0
.LCPI1_2:
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$136, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %rbx
	cmpl	$4, %edi
	je	.LBB1_3
# %bb.1:
	cmpl	$2, %edi
	jne	.LBB1_29
# %bb.2:
	movq	8(%rbx), %rdi
	callq	atoi
	movl	%eax, %r13d
	movl	%eax, %ebp
	movl	%eax, %r15d
	jmp	.LBB1_4
.LBB1_3:
	movq	8(%rbx), %rdi
	callq	atoi
	movl	%eax, %r15d
	movq	16(%rbx), %rdi
	callq	atoi
	movl	%eax, %ebp
	movq	24(%rbx), %rdi
	callq	atoi
	movl	%eax, %r13d
.LBB1_4:
	movl	%r15d, %eax
	imull	%ebp, %eax
	movl	%eax, 8(%rsp)                   # 4-byte Spill
	movslq	%eax, %r14
	leaq	(,%r14,4), %rdi
	testl	%r14d, %r14d
	movq	$-1, %rax
	cmovsq	%rax, %rdi
	callq	_Znam
	movq	%rax, %r12
	movl	%ebp, %ebx
	imull	%r13d, %ebx
	movslq	%ebx, %rax
	leaq	(,%rax,4), %rdi
	testl	%eax, %eax
	movq	$-1, %rax
	cmovsq	%rax, %rdi
	callq	_Znam
	movq	%rax, 24(%rsp)                  # 8-byte Spill
	movq	%r15, 16(%rsp)                  # 8-byte Spill
	movl	%r15d, %ecx
	movq	%r13, 72(%rsp)                  # 8-byte Spill
	imull	%r13d, %ecx
	movq	%rcx, 40(%rsp)                  # 8-byte Spill
	movslq	%ecx, %rax
	leaq	(,%rax,4), %rdi
	testl	%eax, %eax
	movq	$-1, %rax
	cmovsq	%rax, %rdi
	callq	_Znam
	movq	%rax, %r13
	testl	%r14d, %r14d
	jle	.LBB1_7
# %bb.5:                                # %.lr.ph.preheader
	movl	8(%rsp), %r14d                  # 4-byte Reload
	xorl	%r15d, %r15d
.LBB1_6:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	callq	drand48
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, (%r12,%r15,4)
	incq	%r15
	cmpq	%r15, %r14
	jne	.LBB1_6
.LBB1_7:                                # %.preheader124
	movq	%r12, 32(%rsp)                  # 8-byte Spill
	testl	%ebx, %ebx
	movq	24(%rsp), %r12                  # 8-byte Reload
	jle	.LBB1_10
# %bb.8:                                # %.lr.ph127.preheader
	movl	%ebx, %r14d
	xorl	%r15d, %r15d
.LBB1_9:                                # %.lr.ph127
                                        # =>This Inner Loop Header: Depth=1
	callq	drand48
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, (%r12,%r15,4)
	incq	%r15
	cmpq	%r15, %r14
	jne	.LBB1_9
.LBB1_10:                               # %.preheader123
	movq	40(%rsp), %rax                  # 8-byte Reload
	movl	%eax, %r14d
	testl	%eax, %eax
	jle	.LBB1_12
# %bb.11:                               # %.lr.ph129.preheader
	leaq	(,%r14,4), %rdx
	movq	%r13, %rdi
	xorl	%esi, %esi
	callq	memset@PLT
.LBB1_12:                               # %._crit_edge
	movq	%r14, 96(%rsp)                  # 8-byte Spill
	movl	8(%rsp), %ecx                   # 4-byte Reload
	shll	$2, %ecx
	shll	$2, %ebx
	movq	40(%rsp), %rax                  # 8-byte Reload
	leal	(,%rax,4), %r14d
	movslq	%ecx, %rsi
	movq	%rsi, 8(%rsp)                   # 8-byte Spill
	leaq	64(%rsp), %rdi
	callq	hipMalloc
	movslq	%ebx, %r15
	leaq	56(%rsp), %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	movslq	%r14d, %rbx
	leaq	48(%rsp), %r14
	movq	%r14, %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	leaq	64(%rsp), %rax
	movq	(%rax), %rdi
	movq	32(%rsp), %rsi                  # 8-byte Reload
	movq	8(%rsp), %rdx                   # 8-byte Reload
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	56(%rsp), %rax
	movq	(%rax), %rdi
	movq	%r12, %rsi
	movq	%r15, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r14), %rdi
	movq	%r13, %rsi
	movq	%rbx, 104(%rsp)                 # 8-byte Spill
	movq	%rbx, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	72(%rsp), %r14                  # 8-byte Reload
	leal	15(%r14), %eax
	testl	%r14d, %r14d
	cmovnsl	%r14d, %eax
	sarl	$4, %eax
	movl	%r14d, %ecx
	andl	$15, %ecx
	cmpl	$1, %ecx
	sbbl	$-1, %eax
	movq	16(%rsp), %r15                  # 8-byte Reload
	leal	15(%r15), %ebx
	testl	%r15d, %r15d
	cmovnsl	%r15d, %ebx
	sarl	$4, %ebx
	movl	%r15d, %ecx
	andl	$15, %ecx
	cmpl	$1, %ecx
	sbbl	$-1, %ebx
	shlq	$32, %rbx
	orq	%rax, %rbx
	leaq	80(%rsp), %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	movabsq	$68719476752, %rdx              # imm = 0x1000000010
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_14
# %bb.13:
	movq	64(%rsp), %rdi
	movq	56(%rsp), %rsi
	movq	48(%rsp), %rdx
	movl	%r15d, %ecx
	movl	%ebp, %r8d
	movl	%r14d, %r9d
	callq	_Z21__device_stub__matmulPfS_S_iii
.LBB1_14:
	callq	hipDeviceSynchronize
	xorl	%ebx, %ebx
	leaq	120(%rsp), %r12
	movq	%r12, %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	movq	(%r12), %rax
	movq	8(%r12), %rcx
	leaq	80(%rsp), %rdx
	subq	(%rdx), %rax
	cvtsi2sd	%rax, %xmm0
	subq	8(%rdx), %rcx
	cvtsi2sd	%rcx, %xmm1
	mulsd	.LCPI1_0(%rip), %xmm1
	addsd	%xmm0, %xmm1
	movsd	%xmm1, 112(%rsp)                # 8-byte Spill
	movl	$.L.str.1, %edi
	movl	%r15d, %esi
	movl	%ebp, %edx
	movl	%r14d, %ecx
	xorl	%eax, %eax
	callq	printf
	xorps	%xmm0, %xmm0
	cvtsi2sd	%r15d, %xmm0
	addsd	%xmm0, %xmm0
	xorps	%xmm1, %xmm1
	cvtsi2sd	%ebp, %xmm1
	mulsd	%xmm0, %xmm1
	xorps	%xmm0, %xmm0
	cvtsi2sd	%r14d, %xmm0
	mulsd	%xmm1, %xmm0
	movsd	%xmm0, 8(%rsp)                  # 8-byte Spill
	movapd	%xmm0, %xmm1
	movsd	112(%rsp), %xmm0                # 8-byte Reload
                                        # xmm0 = mem[0],zero
	divsd	%xmm0, %xmm1
	divsd	.LCPI1_1(%rip), %xmm1
	movl	$.L.str.2, %edi
	movb	$2, %al
	callq	printf
	movq	48(%rsp), %rsi
	movq	%r13, %rdi
	movq	104(%rsp), %rdx                 # 8-byte Reload
	movl	$2, %ecx
	callq	hipMemcpy
	leaq	80(%rsp), %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	testl	%r15d, %r15d
	jle	.LBB1_24
# %bb.15:                               # %.preheader122.lr.ph
	movslq	%r14d, %rax
	movl	16(%rsp), %ecx                  # 4-byte Reload
	movl	%r14d, %edx
	movl	%ebp, %esi
	leaq	(,%rax,4), %rdi
	xorl	%r8d, %r8d
.LBB1_16:                               # %.preheader122
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_18 Depth 2
                                        #       Child Loop BB1_20 Depth 3
	testl	%r14d, %r14d
	jle	.LBB1_23
# %bb.17:                               # %.preheader.lr.ph
                                        #   in Loop: Header=BB1_16 Depth=1
	movl	%ebx, %r9d
	movq	32(%rsp), %r10                  # 8-byte Reload
	leaq	(%r10,%r9,4), %r9
	movq	%r8, %r10
	imulq	%rax, %r10
	leaq	(,%r10,4), %r10
	addq	%r13, %r10
	movq	24(%rsp), %r12                  # 8-byte Reload
	xorl	%r14d, %r14d
.LBB1_18:                               # %.preheader
                                        #   Parent Loop BB1_16 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB1_20 Depth 3
	testl	%ebp, %ebp
	jle	.LBB1_22
# %bb.19:                               # %.lr.ph131
                                        #   in Loop: Header=BB1_18 Depth=2
	movss	(%r10,%r14,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	movq	%r12, %r11
	xorl	%r15d, %r15d
.LBB1_20:                               #   Parent Loop BB1_16 Depth=1
                                        #     Parent Loop BB1_18 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movss	(%r9,%r15,4), %xmm1             # xmm1 = mem[0],zero,zero,zero
	mulss	(%r11), %xmm1
	subss	%xmm1, %xmm0
	incq	%r15
	addq	%rdi, %r11
	cmpq	%r15, %rsi
	jne	.LBB1_20
# %bb.21:                               # %._crit_edge132
                                        #   in Loop: Header=BB1_18 Depth=2
	movss	%xmm0, (%r10,%r14,4)
.LBB1_22:                               #   in Loop: Header=BB1_18 Depth=2
	incq	%r14
	addq	$4, %r12
	cmpq	%rdx, %r14
	jne	.LBB1_18
.LBB1_23:                               # %._crit_edge134
                                        #   in Loop: Header=BB1_16 Depth=1
	incq	%r8
	addl	%ebp, %ebx
	cmpq	%rcx, %r8
	movq	72(%rsp), %r14                  # 8-byte Reload
	jne	.LBB1_16
.LBB1_24:                               # %._crit_edge136
	xorl	%ebp, %ebp
	leaq	120(%rsp), %rbx
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	movq	(%rbx), %rax
	movq	8(%rbx), %rcx
	subq	80(%rsp), %rax
	xorps	%xmm1, %xmm1
	cvtsi2sd	%rax, %xmm1
	subq	88(%rsp), %rcx
	xorps	%xmm0, %xmm0
	cvtsi2sd	%rcx, %xmm0
	mulsd	.LCPI1_0(%rip), %xmm0
	addsd	%xmm1, %xmm0
	movsd	8(%rsp), %xmm1                  # 8-byte Reload
                                        # xmm1 = mem[0],zero
	divsd	%xmm0, %xmm1
	divsd	.LCPI1_1(%rip), %xmm1
	movl	$.L.str.3, %edi
	movb	$2, %al
	callq	printf
	cmpl	$0, 40(%rsp)                    # 4-byte Folded Reload
	jle	.LBB1_25
# %bb.26:                               # %.lr.ph140.preheader
	xorpd	%xmm0, %xmm0
	xorl	%eax, %eax
	movaps	.LCPI1_2(%rip), %xmm1           # xmm1 = [NaN,NaN,NaN,NaN]
	movq	16(%rsp), %rcx                  # 8-byte Reload
	movq	32(%rsp), %rbx                  # 8-byte Reload
	movq	24(%rsp), %r15                  # 8-byte Reload
	movq	96(%rsp), %rdx                  # 8-byte Reload
.LBB1_27:                               # %.lr.ph140
                                        # =>This Inner Loop Header: Depth=1
	movss	(%r13,%rax,4), %xmm2            # xmm2 = mem[0],zero,zero,zero
	andps	%xmm1, %xmm2
	addss	%xmm2, %xmm0
	incq	%rax
	cmpq	%rax, %rdx
	jne	.LBB1_27
	jmp	.LBB1_28
.LBB1_29:
	movl	$.Lstr, %edi
	callq	puts@PLT
	movl	$1, %ebp
	jmp	.LBB1_30
.LBB1_25:
	xorpd	%xmm0, %xmm0
	movq	16(%rsp), %rcx                  # 8-byte Reload
	movq	32(%rsp), %rbx                  # 8-byte Reload
	movq	24(%rsp), %r15                  # 8-byte Reload
.LBB1_28:                               # %._crit_edge141
	xorps	%xmm1, %xmm1
	cvtsi2ss	%ecx, %xmm1
	xorps	%xmm2, %xmm2
	cvtsi2ss	%r14d, %xmm2
	divss	%xmm1, %xmm0
	divss	%xmm2, %xmm0
	cvtss2sd	%xmm0, %xmm0
	movl	$.L.str.4, %edi
	movb	$1, %al
	callq	printf
	movq	%rbx, %rdi
	callq	_ZdaPv
	movq	%r15, %rdi
	callq	_ZdaPv
	movq	%r13, %rdi
	callq	_ZdaPv
	movq	64(%rsp), %rdi
	callq	hipFree
	movq	56(%rsp), %rdi
	callq	hipFree
	movq	48(%rsp), %rdi
	callq	hipFree
.LBB1_30:
	movl	%ebp, %eax
	addq	$136, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z6matmulPfS_S_iii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z6matmulPfS_S_iii,@object      # @_Z6matmulPfS_S_iii
	.section	.rodata,"a",@progbits
	.globl	_Z6matmulPfS_S_iii
	.p2align	3, 0x0
_Z6matmulPfS_S_iii:
	.quad	_Z21__device_stub__matmulPfS_S_iii
	.size	_Z6matmulPfS_S_iii, 8

	.type	.L.str.1,@object                # @.str.1
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.1:
	.asciz	"[%dx%dx%d]\n"
	.size	.L.str.1, 12

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"CUDA  : %lfs (%lf GFlops)\n"
	.size	.L.str.2, 27

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"CPU   : %lfs (%lf GFlops)\n"
	.size	.L.str.3, 27

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"Error : %f\n"
	.size	.L.str.4, 12

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z6matmulPfS_S_iii"
	.size	.L__unnamed_1, 19

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"Invalid number of parameters"
	.size	.Lstr, 29

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z21__device_stub__matmulPfS_S_iii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z6matmulPfS_S_iii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z6matmulPfS_S_iii      ; -- Begin function _Z6matmulPfS_S_iii
	.globl	_Z6matmulPfS_S_iii
	.p2align	8
	.type	_Z6matmulPfS_S_iii,@function
_Z6matmulPfS_S_iii:                     ; @_Z6matmulPfS_S_iii
; %bb.0:
	s_clause 0x1
	s_load_b128 s[8:11], s[0:1], 0x18
	s_load_b128 s[4:7], s[0:1], 0x0
	s_lshl_b32 s3, s14, 4
	v_bfe_u32 v8, v0, 10, 10
	v_and_b32_e32 v2, 0x3ff, v0
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s2, s9, s15
	s_or_b32 s13, s9, s8
	s_lshl_b32 s12, s2, 4
	s_or_b32 s2, s13, s10
	s_lshl_b32 s11, s10, 4
	s_add_i32 s13, s12, s9
	s_and_b32 s2, s2, 15
	s_cmp_gt_i32 s9, 0
	s_cselect_b32 s14, -1, 0
	s_cmp_eq_u32 s2, 0
	v_cndmask_b32_e64 v3, 0, 1, s14
	s_mov_b32 s2, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[0:1], null, v8, s10, v[2:3]
	v_cmp_ne_u32_e32 vcc_lo, 1, v3
	s_cbranch_scc1 .LBB0_8
; %bb.1:                                ; %.preheader77
	s_and_b32 vcc_lo, exec_lo, vcc_lo
	s_cbranch_vccnz .LBB0_9
; %bb.2:                                ; %.lr.ph
	v_lshlrev_b32_e32 v4, 2, v2
	v_lshl_add_u32 v7, s15, 4, v8
	s_delay_alu instid0(VALU_DEP_4)
	v_add_nc_u32_e32 v3, s3, v0
	v_lshlrev_b32_e32 v1, 6, v8
	s_mul_i32 s2, s9, s8
	s_mul_i32 s16, s10, s9
	s_mov_b32 s17, s12
	v_mad_u64_u32 v[5:6], null, s9, v7, v[2:3]
	v_mov_b32_e32 v7, 0
	v_add_nc_u32_e32 v9, 0x400, v4
	v_add_nc_u32_e32 v10, v1, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_nc_u32_e32 v11, v9, v1
.LBB0_3:                                ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v4, 0
	s_mov_b32 s18, exec_lo
	s_barrier
	buffer_gl0_inv
	v_cmpx_gt_i32_e64 s2, v5
	s_cbranch_execz .LBB0_5
; %bb.4:                                ;   in Loop: Header=BB0_3 Depth=1
	v_ashrrev_i32_e32 v6, 31, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[12:13], 2, v[5:6]
	v_add_co_u32 v12, vcc_lo, s4, v12
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v13, vcc_lo, s5, v13, vcc_lo
	global_load_b32 v4, v[12:13], off
.LBB0_5:                                ;   in Loop: Header=BB0_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s18
	v_mov_b32_e32 v6, 0
	s_mov_b32 s18, exec_lo
	s_waitcnt vmcnt(0)
	ds_store_b32 v10, v4
	v_cmpx_gt_i32_e64 s16, v3
	s_cbranch_execz .LBB0_7
; %bb.6:                                ;   in Loop: Header=BB0_3 Depth=1
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[12:13], 2, v[3:4]
	v_add_co_u32 v12, vcc_lo, s6, v12
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v13, vcc_lo, s7, v13, vcc_lo
	global_load_b32 v6, v[12:13], off
.LBB0_7:                                ;   in Loop: Header=BB0_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s18
	s_waitcnt vmcnt(0)
	ds_store_b32 v11, v6
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_2addr_b32 v[20:21], v9 offset1:16
	ds_load_b128 v[12:15], v1
	ds_load_2addr_b32 v[22:23], v9 offset0:32 offset1:48
	ds_load_b128 v[16:19], v1 offset:16
	ds_load_2addr_b32 v[24:25], v9 offset0:64 offset1:80
	v_add_nc_u32_e32 v5, 16, v5
	v_add_nc_u32_e32 v3, s11, v3
	s_add_i32 s17, s17, 16
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_cmp_lt_i32 s17, s13
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v7, v12, v20
	v_fmac_f32_e32 v7, v13, v21
	ds_load_2addr_b32 v[20:21], v9 offset0:96 offset1:112
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v7, v14, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v7, v15, v23
	ds_load_2addr_b32 v[22:23], v9 offset0:128 offset1:144
	ds_load_b128 v[12:15], v1 offset:32
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v7, v16, v24
	v_fmac_f32_e32 v7, v17, v25
	ds_load_2addr_b32 v[24:25], v9 offset0:160 offset1:176
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v7, v18, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v7, v19, v21
	ds_load_b128 v[16:19], v1 offset:48
	ds_load_2addr_b32 v[20:21], v9 offset0:192 offset1:208
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v7, v12, v22
	v_fmac_f32_e32 v7, v13, v23
	ds_load_2addr_b32 v[12:13], v9 offset0:224 offset1:240
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v7, v14, v24
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v7, v15, v25
	s_waitcnt lgkmcnt(1)
	v_fmac_f32_e32 v7, v16, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v7, v17, v21
	s_waitcnt lgkmcnt(0)
	v_fmac_f32_e32 v7, v18, v12
	s_delay_alu instid0(VALU_DEP_1)
	v_fmac_f32_e32 v7, v19, v13
	s_cbranch_scc1 .LBB0_3
	s_branch .LBB0_10
.LBB0_8:
	s_mov_b32 s8, -1
                                        ; implicit-def: $vgpr7
	s_branch .LBB0_11
.LBB0_9:
	v_mov_b32_e32 v7, 0
.LBB0_10:                               ; %._crit_edge
	v_lshl_add_u32 v1, s15, 4, v8
	v_add_nc_u32_e32 v3, s3, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_u32_e32 vcc_lo, s8, v1
	v_cmp_gt_u32_e64 s2, s10, v3
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 s2, vcc_lo, s2
.LBB0_11:                               ; %Flow181
	s_and_b32 vcc_lo, exec_lo, s8
	s_cbranch_vccz .LBB0_17
; %bb.12:                               ; %.preheader
	s_and_not1_b32 vcc_lo, exec_lo, s14
	s_cbranch_vccnz .LBB0_15
; %bb.13:                               ; %.lr.ph88
	v_lshlrev_b32_e32 v7, 2, v2
	v_lshl_add_u32 v9, s15, 4, v8
	v_lshlrev_b32_e32 v5, 6, v8
	v_add_nc_u32_e32 v1, s3, v0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_nc_u32_e32 v6, 0x400, v7
	v_mad_u64_u32 v[3:4], null, s9, v9, v[2:3]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_mov_b32 v7, 0 :: v_dual_add_nc_u32 v8, v5, v7
	v_add_nc_u32_e32 v9, v6, v5
.LBB0_14:                               ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_3)
	v_ashrrev_i32_e32 v4, 31, v3
	v_ashrrev_i32_e32 v2, 31, v1
	s_barrier
	buffer_gl0_inv
	v_lshlrev_b64 v[10:11], 2, v[3:4]
	v_lshlrev_b64 v[12:13], 2, v[1:2]
	v_add_nc_u32_e32 v3, 16, v3
	v_add_nc_u32_e32 v1, s11, v1
	s_add_i32 s12, s12, 16
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_ge_i32 s12, s13
	v_add_co_u32 v10, vcc_lo, s4, v10
	v_add_co_ci_u32_e32 v11, vcc_lo, s5, v11, vcc_lo
	v_add_co_u32 v12, vcc_lo, s6, v12
	v_add_co_ci_u32_e32 v13, vcc_lo, s7, v13, vcc_lo
	global_load_b32 v2, v[10:11], off
	global_load_b32 v4, v[12:13], off
	s_waitcnt vmcnt(1)
	ds_store_b32 v8, v2
	s_waitcnt vmcnt(0)
	ds_store_b32 v9, v4
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_2addr_b32 v[18:19], v6 offset1:16
	ds_load_b128 v[10:13], v5
	ds_load_2addr_b32 v[20:21], v6 offset0:32 offset1:48
	ds_load_b128 v[14:17], v5 offset:16
	ds_load_2addr_b32 v[22:23], v6 offset0:64 offset1:80
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v7, v10, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v7, v11, v19
	ds_load_2addr_b32 v[18:19], v6 offset0:96 offset1:112
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v7, v12, v20
	v_fmac_f32_e32 v7, v13, v21
	ds_load_2addr_b32 v[20:21], v6 offset0:128 offset1:144
	ds_load_b128 v[10:13], v5 offset:32
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v7, v14, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v7, v15, v23
	ds_load_2addr_b32 v[22:23], v6 offset0:160 offset1:176
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v7, v16, v18
	v_fmac_f32_e32 v7, v17, v19
	ds_load_b128 v[14:17], v5 offset:48
	ds_load_2addr_b32 v[18:19], v6 offset0:192 offset1:208
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v7, v10, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v7, v11, v21
	ds_load_2addr_b32 v[10:11], v6 offset0:224 offset1:240
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v7, v12, v22
	v_fmac_f32_e32 v7, v13, v23
	s_waitcnt lgkmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v7, v14, v18
	v_fmac_f32_e32 v7, v15, v19
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v7, v16, v10
	v_fmac_f32_e32 v7, v17, v11
	s_cbranch_scc0 .LBB0_14
	s_branch .LBB0_16
.LBB0_15:
	v_mov_b32_e32 v7, 0
.LBB0_16:                               ; %Flow180
	s_mov_b32 s2, -1
.LBB0_17:                               ; %Flow182
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s4, s2
	s_cbranch_execz .LBB0_19
; %bb.18:                               ; %.loopexit
	s_load_b64 s[0:1], s[0:1], 0x10
	s_mul_i32 s11, s11, s15
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v0, s11, s3, v0
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v7, off
.LBB0_19:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z6matmulPfS_S_iii
		.amdhsa_group_segment_fixed_size 2048
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 36
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 26
		.amdhsa_next_free_sgpr 19
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z6matmulPfS_S_iii, .Lfunc_end0-_Z6matmulPfS_S_iii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1196
; NumSgprs: 21
; NumVgprs: 26
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 2048 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 3
; NumSGPRsForWavesPerEU: 21
; NumVGPRsForWavesPerEU: 26
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 2048
    .kernarg_segment_align: 8
    .kernarg_segment_size: 36
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z6matmulPfS_S_iii
    .private_segment_fixed_size: 0
    .sgpr_count:     21
    .sgpr_spill_count: 0
    .symbol:         _Z6matmulPfS_S_iii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     26
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
