////////////////////////////////////////////////////////////////////////////////
//
// FILE:        max_parallel_reduct.cu
// DESCRIPTION: uses parallel reduction to find max element in 1000 num array
// AUTHOR:      Dan Fabian
// DATE:        2/23/2020

#include <iostream>
#include <random>
#include <chrono>

using std::cout; using std::endl;
using namespace std::chrono;

// all constants
const int SIZE = 1000;

// kernal func prototypes
__global__ void globalMax(int *vals); // uses global mem
__global__ void interleavingMax(int *vals); // uses interleaving addressing shared mem
__global__ void sequentialMax(int *vals); // uses sequential addressing shared mem

////////////////////////////////////////////////////////////////////////////////
//
// MAIN
int main()
{
    // create array of vals
    int vals[SIZE], *vals_d;

    // create rng
    unsigned int seed = system_clock::now().time_since_epoch().count();
    std::default_random_engine generator(seed);
    std::uniform_int_distribution<int> dist(0, 1000);

    // init vals
    for (int i = 0; i < SIZE; ++i) vals[i] = dist(generator);

    /*
    // print vals
    for (int i = 0; i < SIZE; ++i)
        cout << vals[i] << ' ';
    cout << endl;
    */

    // copy vals to device memory
    int valMem = sizeof(int) * SIZE;
    cudaMalloc((void**)&vals_d, valMem);
    cudaMemcpy(vals_d, vals, valMem, cudaMemcpyHostToDevice);

    // call funcs
    //globalMax<<<1, SIZE / 2>>>(vals_d);
    //interleavingMax<<<1, SIZE>>>(vals_d);
    sequentialMax<<<1, SIZE>>>(vals_d);

    // copy device memory back to host
    cudaMemcpy(vals, vals_d, valMem, cudaMemcpyDeviceToHost);

    // print max
    //cout << vals[0] << endl;

    // free all device memory
    cudaFree(vals_d);
}

////////////////////////////////////////////////////////////////////////////////
//
// KERNEL functions
////////////////////////////////////////
// global memory implementation
__global__ void globalMax(int *vals)
{
    // thread index
    unsigned int idx = threadIdx.x;

    // reduction algorithm
    unsigned int elemIdx;
    for (unsigned int i = 1; i < SIZE; i *= 2)
    {
        elemIdx = idx * i * 2;

        if (elemIdx < SIZE)
            vals[elemIdx] = vals[elemIdx] < vals[elemIdx + i] ? 
                            vals[elemIdx + i] : vals[elemIdx];

        __syncthreads();
    }
}

////////////////////////////////////////
// interleaving addressing shared memory implementation
__global__ void interleavingMax(int *vals)
{
    // create shared val array
    static __shared__ int vals_s[SIZE];

    // thread index
    unsigned int idx = threadIdx.x;

    // load 1 element in per thread
    vals_s[idx] = vals[idx];
    __syncthreads();

    // reduction algorithm
    unsigned int elemIdx;
    for (unsigned int i = 1; i < SIZE; i *= 2)
    {
        elemIdx = idx * i * 2;

        if (elemIdx < SIZE)
            vals_s[elemIdx] = vals_s[elemIdx] < vals_s[elemIdx + i] ? 
                              vals_s[elemIdx + i] : vals_s[elemIdx];

        __syncthreads();
    }

    // transfer max val to global mem
    if (idx == 0) vals[0] = vals_s[0];
}

////////////////////////////////////////
// sequential addressing shared memory implementation
__global__ void sequentialMax(int *vals)
{
    // create shared val array
    static __shared__ int vals_s[SIZE];

    // thread index
    unsigned int idx = threadIdx.x;

    // load 1 element in per thread
    vals_s[idx] = vals[idx];
    __syncthreads();

    // reduction algorithm
    for (unsigned int i = SIZE / 2; i > 0; i /= 2)
    {
        if (idx < i)
            vals_s[idx] = vals_s[idx] < vals_s[idx + i] ? 
                          vals_s[idx + i] : vals_s[idx];

        __syncthreads();
    }

    // transfer max val to global mem
    if (idx == 0) vals[0] = vals_s[0];
}

	.file	"tmpxft_0028e65f_00000000-6_max_parallel_reduct.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4821:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE4821:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.align 2
	.type	_ZNSt24uniform_int_distributionIiEclISt26linear_congruential_engineImLm16807ELm0ELm2147483647EEEEiRT_RKNS0_10param_typeE.isra.0, @function
_ZNSt24uniform_int_distributionIiEclISt26linear_congruential_engineImLm16807ELm0ELm2147483647EEEEiRT_RKNS0_10param_typeE.isra.0:
.LFB5571:
	.cfi_startproc
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movslq	%esi, %rax
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	movq	%rdi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	movq	%rax, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	movslq	%edx, %rbp
	subq	%rax, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	cmpq	$2147483644, %rbp
	ja	.L3
	incq	%rbp
	movl	$2147483645, %eax
	xorl	%edx, %edx
	movl	$2147483647, %esi
	divq	%rbp
	movq	(%rdi), %rdx
	imulq	%rax, %rbp
	movq	%rax, %rcx
.L4:
	imulq	$16807, %rdx, %rax
	xorl	%edx, %edx
	divq	%rsi
	leaq	-1(%rdx), %rax
	cmpq	%rbp, %rax
	jnb	.L4
	movq	%rdx, 0(%r13)
	xorl	%edx, %edx
	divq	%rcx
	jmp	.L5
.L3:
	cmpq	$2147483645, %rbp
	je	.L6
	movl	$2147483646, %ecx
	movq	%rbp, %rax
	xorl	%edx, %edx
	movl	$2147483647, %ebx
	divq	%rcx
	movq	%rax, %r14
.L11:
	movl	%r14d, %edx
	xorl	%esi, %esi
	movq	%r13, %rdi
	call	_ZNSt24uniform_int_distributionIiEclISt26linear_congruential_engineImLm16807ELm0ELm2147483647EEEEiRT_RKNS0_10param_typeE.isra.0
	xorl	%edx, %edx
	movl	%eax, %ecx
	imulq	$16807, 0(%r13), %rax
	divq	%rbx
	movslq	%ecx, %rax
	imulq	$2147483646, %rax, %rax
	movq	%rdx, 0(%r13)
	decq	%rdx
	addq	%rdx, %rax
	setc	%dl
	movzbl	%dl, %edx
	cmpq	%rax, %rbp
	jb	.L11
	testq	%rdx, %rdx
	jne	.L11
	jmp	.L5
.L6:
	imulq	$16807, (%rdi), %rax
	movl	$2147483647, %ecx
	xorl	%edx, %edx
	divq	%rcx
	movq	%rdx, (%rdi)
	leaq	-1(%rdx), %rax
.L5:
	popq	%rbx
	.cfi_def_cfa_offset 40
	addl	%r12d, %eax
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE5571:
	.size	_ZNSt24uniform_int_distributionIiEclISt26linear_congruential_engineImLm16807ELm0ELm2147483647EEEEiRT_RKNS0_10param_typeE.isra.0, .-_ZNSt24uniform_int_distributionIiEclISt26linear_congruential_engineImLm16807ELm0ELm2147483647EEEEiRT_RKNS0_10param_typeE.isra.0
	.globl	_Z28__device_stub__Z9globalMaxPiPi
	.type	_Z28__device_stub__Z9globalMaxPiPi, @function
_Z28__device_stub__Z9globalMaxPiPi:
.LFB4843:
	.cfi_startproc
	endbr64
	subq	$104, %rsp
	.cfi_def_cfa_offset 112
	movq	%rdi, 8(%rsp)
	leaq	24(%rsp), %rcx
	leaq	16(%rsp), %rdx
	leaq	44(%rsp), %rsi
	leaq	32(%rsp), %rdi
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 40(%rsp)
	movq	%rax, 80(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L14
	pushq	24(%rsp)
	.cfi_def_cfa_offset 120
	leaq	_Z9globalMaxPi(%rip), %rdi
	pushq	24(%rsp)
	.cfi_def_cfa_offset 128
	movq	60(%rsp), %rcx
	movl	68(%rsp), %r8d
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	leaq	96(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 120
	popq	%rdx
	.cfi_def_cfa_offset 112
.L14:
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L16
	call	__stack_chk_fail@PLT
.L16:
	addq	$104, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4843:
	.size	_Z28__device_stub__Z9globalMaxPiPi, .-_Z28__device_stub__Z9globalMaxPiPi
	.globl	_Z9globalMaxPi
	.type	_Z9globalMaxPi, @function
_Z9globalMaxPi:
.LFB4844:
	.cfi_startproc
	endbr64
	jmp	_Z28__device_stub__Z9globalMaxPiPi
	.cfi_endproc
.LFE4844:
	.size	_Z9globalMaxPi, .-_Z9globalMaxPi
	.globl	_Z35__device_stub__Z15interleavingMaxPiPi
	.type	_Z35__device_stub__Z15interleavingMaxPiPi, @function
_Z35__device_stub__Z15interleavingMaxPiPi:
.LFB4845:
	.cfi_startproc
	endbr64
	subq	$104, %rsp
	.cfi_def_cfa_offset 112
	movq	%rdi, 8(%rsp)
	leaq	24(%rsp), %rcx
	leaq	16(%rsp), %rdx
	leaq	44(%rsp), %rsi
	leaq	32(%rsp), %rdi
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 40(%rsp)
	movq	%rax, 80(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L19
	pushq	24(%rsp)
	.cfi_def_cfa_offset 120
	leaq	_Z15interleavingMaxPi(%rip), %rdi
	pushq	24(%rsp)
	.cfi_def_cfa_offset 128
	movq	60(%rsp), %rcx
	movl	68(%rsp), %r8d
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	leaq	96(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 120
	popq	%rdx
	.cfi_def_cfa_offset 112
.L19:
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L21
	call	__stack_chk_fail@PLT
.L21:
	addq	$104, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4845:
	.size	_Z35__device_stub__Z15interleavingMaxPiPi, .-_Z35__device_stub__Z15interleavingMaxPiPi
	.globl	_Z15interleavingMaxPi
	.type	_Z15interleavingMaxPi, @function
_Z15interleavingMaxPi:
.LFB4846:
	.cfi_startproc
	endbr64
	jmp	_Z35__device_stub__Z15interleavingMaxPiPi
	.cfi_endproc
.LFE4846:
	.size	_Z15interleavingMaxPi, .-_Z15interleavingMaxPi
	.globl	_Z33__device_stub__Z13sequentialMaxPiPi
	.type	_Z33__device_stub__Z13sequentialMaxPiPi, @function
_Z33__device_stub__Z13sequentialMaxPiPi:
.LFB4847:
	.cfi_startproc
	endbr64
	subq	$104, %rsp
	.cfi_def_cfa_offset 112
	movq	%rdi, 8(%rsp)
	leaq	24(%rsp), %rcx
	leaq	16(%rsp), %rdx
	leaq	44(%rsp), %rsi
	leaq	32(%rsp), %rdi
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 40(%rsp)
	movq	%rax, 80(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L24
	pushq	24(%rsp)
	.cfi_def_cfa_offset 120
	leaq	_Z13sequentialMaxPi(%rip), %rdi
	pushq	24(%rsp)
	.cfi_def_cfa_offset 128
	movq	60(%rsp), %rcx
	movl	68(%rsp), %r8d
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	leaq	96(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 120
	popq	%rdx
	.cfi_def_cfa_offset 112
.L24:
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L26
	call	__stack_chk_fail@PLT
.L26:
	addq	$104, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4847:
	.size	_Z33__device_stub__Z13sequentialMaxPiPi, .-_Z33__device_stub__Z13sequentialMaxPiPi
	.globl	_Z13sequentialMaxPi
	.type	_Z13sequentialMaxPi, @function
_Z13sequentialMaxPi:
.LFB4848:
	.cfi_startproc
	endbr64
	jmp	_Z33__device_stub__Z13sequentialMaxPiPi
	.cfi_endproc
.LFE4848:
	.size	_Z13sequentialMaxPi, .-_Z13sequentialMaxPi
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB4818:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	subq	$4048, %rsp
	.cfi_def_cfa_offset 4064
	movq	%fs:40, %rax
	movq	%rax, 4040(%rsp)
	xorl	%eax, %eax
	call	_ZNSt6chrono3_V212system_clock3nowEv@PLT
	xorl	%edx, %edx
	movl	$2147483647, %ecx
	leaq	8(%rsp), %r9
	movl	%eax, %eax
	divq	%rcx
	movl	$1, %eax
	testq	%rdx, %rdx
	cmove	%rax, %rdx
	xorl	%r8d, %r8d
	movq	%rdx, 8(%rsp)
.L30:
	movl	$1000, %edx
	xorl	%esi, %esi
	leaq	40(%rsp), %rbx
	movq	%r9, %rdi
	call	_ZNSt24uniform_int_distributionIiEclISt26linear_congruential_engineImLm16807ELm0ELm2147483647EEEEiRT_RKNS0_10param_typeE.isra.0
	movl	%eax, (%rbx,%r8,4)
	incq	%r8
	cmpq	$1000, %r8
	jne	.L30
	movq	%rsp, %rdi
	movl	$4000, %esi
	call	cudaMalloc@PLT
	movq	(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	movl	$4000, %edx
	call	cudaMemcpy@PLT
	movl	$536871037, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$3, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	movabsq	$4294967297, %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L31
	movq	(%rsp), %rdi
	call	_Z33__device_stub__Z13sequentialMaxPiPi
.L31:
	movq	(%rsp), %rsi
	movq	%rbx, %rdi
	movl	$2, %ecx
	movl	$4000, %edx
	call	cudaMemcpy@PLT
	movq	(%rsp), %rdi
	call	cudaFree@PLT
	movq	4040(%rsp), %rax
	subq	%fs:40, %rax
	je	.L32
	call	__stack_chk_fail@PLT
.L32:
	addq	$4048, %rsp
	.cfi_def_cfa_offset 16
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4818:
	.size	main, .-main
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z13sequentialMaxPi"
.LC1:
	.string	"_Z15interleavingMaxPi"
.LC2:
	.string	"_Z9globalMaxPi"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB4850:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z13sequentialMaxPi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC1(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z15interleavingMaxPi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC2(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z9globalMaxPi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE4850:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

////////////////////////////////////////////////////////////////////////////////
//
// FILE:        max_parallel_reduct.cu
// DESCRIPTION: uses parallel reduction to find max element in 1000 num array
// AUTHOR:      Dan Fabian
// DATE:        2/23/2020


#include <hip/hip_runtime.h>
#include <iostream>
#include <random>
#include <chrono>

using std::cout; using std::endl;
using namespace std::chrono;

// all constants
const int SIZE = 1000;

// kernal func prototypes
__global__ void globalMax(int *vals); // uses global mem
__global__ void interleavingMax(int *vals); // uses interleaving addressing shared mem
__global__ void sequentialMax(int *vals); // uses sequential addressing shared mem

////////////////////////////////////////////////////////////////////////////////
//
// MAIN
int main()
{
    // create array of vals
    int vals[SIZE], *vals_d;

    // create rng
    unsigned int seed = system_clock::now().time_since_epoch().count();
    std::default_random_engine generator(seed);
    std::uniform_int_distribution<int> dist(0, 1000);

    // init vals
    for (int i = 0; i < SIZE; ++i) vals[i] = dist(generator);

    /*
    // print vals
    for (int i = 0; i < SIZE; ++i)
        cout << vals[i] << ' ';
    cout << endl;
    */

    // copy vals to device memory
    int valMem = sizeof(int) * SIZE;
    hipMalloc((void**)&vals_d, valMem);
    hipMemcpy(vals_d, vals, valMem, hipMemcpyHostToDevice);

    // call funcs
    //globalMax<<<1, SIZE / 2>>>(vals_d);
    //interleavingMax<<<1, SIZE>>>(vals_d);
    sequentialMax<<<1, SIZE>>>(vals_d);

    // copy device memory back to host
    hipMemcpy(vals, vals_d, valMem, hipMemcpyDeviceToHost);

    // print max
    //cout << vals[0] << endl;

    // free all device memory
    hipFree(vals_d);
}

////////////////////////////////////////////////////////////////////////////////
//
// KERNEL functions
////////////////////////////////////////
// global memory implementation
__global__ void globalMax(int *vals)
{
    // thread index
    unsigned int idx = threadIdx.x;

    // reduction algorithm
    unsigned int elemIdx;
    for (unsigned int i = 1; i < SIZE; i *= 2)
    {
        elemIdx = idx * i * 2;

        if (elemIdx < SIZE)
            vals[elemIdx] = vals[elemIdx] < vals[elemIdx + i] ? 
                            vals[elemIdx + i] : vals[elemIdx];

        __syncthreads();
    }
}

////////////////////////////////////////
// interleaving addressing shared memory implementation
__global__ void interleavingMax(int *vals)
{
    // create shared val array
    static __shared__ int vals_s[SIZE];

    // thread index
    unsigned int idx = threadIdx.x;

    // load 1 element in per thread
    vals_s[idx] = vals[idx];
    __syncthreads();

    // reduction algorithm
    unsigned int elemIdx;
    for (unsigned int i = 1; i < SIZE; i *= 2)
    {
        elemIdx = idx * i * 2;

        if (elemIdx < SIZE)
            vals_s[elemIdx] = vals_s[elemIdx] < vals_s[elemIdx + i] ? 
                              vals_s[elemIdx + i] : vals_s[elemIdx];

        __syncthreads();
    }

    // transfer max val to global mem
    if (idx == 0) vals[0] = vals_s[0];
}

////////////////////////////////////////
// sequential addressing shared memory implementation
__global__ void sequentialMax(int *vals)
{
    // create shared val array
    static __shared__ int vals_s[SIZE];

    // thread index
    unsigned int idx = threadIdx.x;

    // load 1 element in per thread
    vals_s[idx] = vals[idx];
    __syncthreads();

    // reduction algorithm
    for (unsigned int i = SIZE / 2; i > 0; i /= 2)
    {
        if (idx < i)
            vals_s[idx] = vals_s[idx] < vals_s[idx + i] ? 
                          vals_s[idx + i] : vals_s[idx];

        __syncthreads();
    }

    // transfer max val to global mem
    if (idx == 0) vals[0] = vals_s[0];
}

	.text
	.file	"max_parallel_reduct.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$4032, %rsp                     # imm = 0xFC0
	.cfi_def_cfa_offset 4064
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movl	%eax, %ecx
	leaq	(%rcx,%rcx,2), %rcx
	shrq	$32, %rcx
	movl	%eax, %edx
	subl	%ecx, %edx
	shrl	%edx
	addl	%ecx, %edx
	shrl	$30, %edx
	movl	%edx, %ecx
	shll	$31, %ecx
	orl	%edx, %ecx
	leal	(%rax,%rcx), %edx
	cmpl	$1, %edx
	adcl	%eax, %ecx
	leaq	16(%rsp), %rbx
	movq	%rcx, (%rbx)
	movabsq	$4294967296000, %rax            # imm = 0x3E800000000
	leaq	24(%rsp), %r14
	movq	%rax, (%r14)
	xorl	%r15d, %r15d
.LBB0_1:                                # =>This Inner Loop Header: Depth=1
	movq	%r14, %rdi
	movq	%rbx, %rsi
	movq	%r14, %rdx
	callq	_ZNSt24uniform_int_distributionIiEclISt26linear_congruential_engineImLm16807ELm0ELm2147483647EEEEiRT_RKNS0_10param_typeE
	movl	%eax, 32(%rsp,%r15,4)
	incq	%r15
	cmpq	$1000, %r15                     # imm = 0x3E8
	jne	.LBB0_1
# %bb.2:
	leaq	8(%rsp), %rbx
	movl	$4000, %esi                     # imm = 0xFA0
	movq	%rbx, %rdi
	callq	hipMalloc
	movq	(%rbx), %rdi
	leaq	32(%rsp), %rsi
	movl	$4000, %edx                     # imm = 0xFA0
	movl	$1, %ecx
	callq	hipMemcpy
	movabsq	$4294967297, %rdi               # imm = 0x100000001
	leaq	999(%rdi), %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB0_4
# %bb.3:
	movq	8(%rsp), %rdi
	callq	_Z28__device_stub__sequentialMaxPi
.LBB0_4:
	movq	8(%rsp), %rsi
	leaq	32(%rsp), %rdi
	movl	$4000, %edx                     # imm = 0xFA0
	movl	$2, %ecx
	callq	hipMemcpy
	movq	8(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$4032, %rsp                     # imm = 0xFC0
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	main, .Lfunc_end0-main
	.cfi_endproc
                                        # -- End function
	.globl	_Z28__device_stub__sequentialMaxPi # -- Begin function _Z28__device_stub__sequentialMaxPi
	.type	_Z28__device_stub__sequentialMaxPi,@function
_Z28__device_stub__sequentialMaxPi:     # @_Z28__device_stub__sequentialMaxPi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$64, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	movq	%rsp, %rbx
	movq	%rax, (%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z13sequentialMaxPi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$80, %rsp
	.cfi_adjust_cfa_offset -80
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z28__device_stub__sequentialMaxPi, .Lfunc_end1-_Z28__device_stub__sequentialMaxPi
	.cfi_endproc
                                        # -- End function
	.globl	_Z24__device_stub__globalMaxPi  # -- Begin function _Z24__device_stub__globalMaxPi
	.type	_Z24__device_stub__globalMaxPi,@function
_Z24__device_stub__globalMaxPi:         # @_Z24__device_stub__globalMaxPi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$64, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	movq	%rsp, %rbx
	movq	%rax, (%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9globalMaxPi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$80, %rsp
	.cfi_adjust_cfa_offset -80
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z24__device_stub__globalMaxPi, .Lfunc_end2-_Z24__device_stub__globalMaxPi
	.cfi_endproc
                                        # -- End function
	.globl	_Z30__device_stub__interleavingMaxPi # -- Begin function _Z30__device_stub__interleavingMaxPi
	.type	_Z30__device_stub__interleavingMaxPi,@function
_Z30__device_stub__interleavingMaxPi:   # @_Z30__device_stub__interleavingMaxPi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$64, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	movq	%rsp, %rbx
	movq	%rax, (%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z15interleavingMaxPi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$80, %rsp
	.cfi_adjust_cfa_offset -80
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z30__device_stub__interleavingMaxPi, .Lfunc_end3-_Z30__device_stub__interleavingMaxPi
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt24uniform_int_distributionIiEclISt26linear_congruential_engineImLm16807ELm0ELm2147483647EEEEiRT_RKNS0_10param_typeE,"axG",@progbits,_ZNSt24uniform_int_distributionIiEclISt26linear_congruential_engineImLm16807ELm0ELm2147483647EEEEiRT_RKNS0_10param_typeE,comdat
	.weak	_ZNSt24uniform_int_distributionIiEclISt26linear_congruential_engineImLm16807ELm0ELm2147483647EEEEiRT_RKNS0_10param_typeE # -- Begin function _ZNSt24uniform_int_distributionIiEclISt26linear_congruential_engineImLm16807ELm0ELm2147483647EEEEiRT_RKNS0_10param_typeE
	.p2align	1, 0x90
	.type	_ZNSt24uniform_int_distributionIiEclISt26linear_congruential_engineImLm16807ELm0ELm2147483647EEEEiRT_RKNS0_10param_typeE,@function
_ZNSt24uniform_int_distributionIiEclISt26linear_congruential_engineImLm16807ELm0ELm2147483647EEEEiRT_RKNS0_10param_typeE: # @_ZNSt24uniform_int_distributionIiEclISt26linear_congruential_engineImLm16807ELm0ELm2147483647EEEEiRT_RKNS0_10param_typeE
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %rbx
	movq	%rdi, %r15
	movslq	4(%rdx), %rbp
	movslq	(%rdx), %rdi
	subq	%rdi, %rbp
	cmpq	$2147483644, %rbp               # imm = 0x7FFFFFFC
	ja	.LBB4_4
# %bb.1:
	incq	%rbp
	movl	$2147483645, %eax               # imm = 0x7FFFFFFD
	xorl	%edx, %edx
	divl	%ebp
	movl	%eax, %ecx
	imulq	%rcx, %rbp
	movq	(%rbx), %rdx
	movabsq	$8589934597, %r8                # imm = 0x200000005
.LBB4_2:                                # =>This Inner Loop Header: Depth=1
	imulq	$16807, %rdx, %rsi              # imm = 0x41A7
	movq	%rsi, %rax
	mulq	%r8
	movq	%rsi, %rax
	subq	%rdx, %rax
	shrq	%rax
	addq	%rdx, %rax
	shrq	$30, %rax
	movq	%rax, %rdx
	shlq	$31, %rdx
	subq	%rdx, %rax
	leaq	(%rsi,%rax), %rdx
	addq	%rsi, %rax
	decq	%rax
	cmpq	%rbp, %rax
	jae	.LBB4_2
# %bb.3:
	movq	%rdx, (%rbx)
	xorl	%edx, %edx
	divq	%rcx
	jmp	.LBB4_9
.LBB4_4:
	cmpq	$2147483645, %rbp               # imm = 0x7FFFFFFD
	jne	.LBB4_5
# %bb.10:
	imulq	$16807, (%rbx), %rcx            # imm = 0x41A7
	movabsq	$8589934597, %rdx               # imm = 0x200000005
	movq	%rcx, %rax
	mulq	%rdx
	movq	%rcx, %rax
	subq	%rdx, %rax
	shrq	%rax
	addq	%rdx, %rax
	shrq	$30, %rax
	movq	%rax, %rdx
	shlq	$31, %rdx
	subq	%rdx, %rax
	leaq	(%rcx,%rax), %rdx
	movq	%rdx, (%rbx)
	addq	%rcx, %rax
	decq	%rax
	jmp	.LBB4_9
.LBB4_5:                                # %.preheader
	movq	%rdx, 16(%rsp)                  # 8-byte Spill
	movq	%rbp, %rax
	shrq	%rax
	movabsq	$-9223372028264841207, %rcx     # imm = 0x8000000200000009
	mulq	%rcx
	movq	%rdx, %r12
	shrq	$29, %r12
	leaq	8(%rsp), %r13
	movabsq	$8589934597, %r14               # imm = 0x200000005
.LBB4_6:                                # =>This Inner Loop Header: Depth=1
	movl	$0, 8(%rsp)
	movl	%r12d, 12(%rsp)
	movq	%r15, %rdi
	movq	%rbx, %rsi
	movq	%r13, %rdx
	callq	_ZNSt24uniform_int_distributionIiEclISt26linear_congruential_engineImLm16807ELm0ELm2147483647EEEEiRT_RKNS0_10param_typeE
	movslq	%eax, %rsi
	leaq	(%rsi,%rsi), %rax
	shlq	$31, %rsi
	subq	%rax, %rsi
	imulq	$16807, (%rbx), %rcx            # imm = 0x41A7
	movq	%rcx, %rax
	mulq	%r14
	movq	%rcx, %rax
	subq	%rdx, %rax
	shrq	%rax
	addq	%rdx, %rax
	shrq	$30, %rax
	movq	%rax, %rdx
	shlq	$31, %rdx
	subq	%rdx, %rax
	addq	%rcx, %rax
	movq	%rax, (%rbx)
	addq	%rsi, %rax
	decq	%rax
	cmpq	%rbp, %rax
	ja	.LBB4_6
# %bb.7:                                #   in Loop: Header=BB4_6 Depth=1
	cmpq	%rsi, %rax
	jb	.LBB4_6
# %bb.8:                                # %.loopexit.loopexit
	movq	16(%rsp), %rcx                  # 8-byte Reload
	movl	(%rcx), %edi
.LBB4_9:                                # %.loopexit
	addl	%edi, %eax
                                        # kill: def $eax killed $eax killed $rax
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_ZNSt24uniform_int_distributionIiEclISt26linear_congruential_engineImLm16807ELm0ELm2147483647EEEEiRT_RKNS0_10param_typeE, .Lfunc_end4-_ZNSt24uniform_int_distributionIiEclISt26linear_congruential_engineImLm16807ELm0ELm2147483647EEEEiRT_RKNS0_10param_typeE
	.cfi_endproc
                                        # -- End function
	.text
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB5_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB5_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9globalMaxPi, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z15interleavingMaxPi, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z13sequentialMaxPi, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end5:
	.size	__hip_module_ctor, .Lfunc_end5-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB6_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB6_2:
	retq
.Lfunc_end6:
	.size	__hip_module_dtor, .Lfunc_end6-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z13sequentialMaxPi,@object     # @_Z13sequentialMaxPi
	.section	.rodata,"a",@progbits
	.globl	_Z13sequentialMaxPi
	.p2align	3, 0x0
_Z13sequentialMaxPi:
	.quad	_Z28__device_stub__sequentialMaxPi
	.size	_Z13sequentialMaxPi, 8

	.type	_Z9globalMaxPi,@object          # @_Z9globalMaxPi
	.globl	_Z9globalMaxPi
	.p2align	3, 0x0
_Z9globalMaxPi:
	.quad	_Z24__device_stub__globalMaxPi
	.size	_Z9globalMaxPi, 8

	.type	_Z15interleavingMaxPi,@object   # @_Z15interleavingMaxPi
	.globl	_Z15interleavingMaxPi
	.p2align	3, 0x0
_Z15interleavingMaxPi:
	.quad	_Z30__device_stub__interleavingMaxPi
	.size	_Z15interleavingMaxPi, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z9globalMaxPi"
	.size	.L__unnamed_1, 15

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z15interleavingMaxPi"
	.size	.L__unnamed_2, 22

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z13sequentialMaxPi"
	.size	.L__unnamed_3, 20

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z28__device_stub__sequentialMaxPi
	.addrsig_sym _Z24__device_stub__globalMaxPi
	.addrsig_sym _Z30__device_stub__interleavingMaxPi
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z13sequentialMaxPi
	.addrsig_sym _Z9globalMaxPi
	.addrsig_sym _Z15interleavingMaxPi
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z9globalMaxPi          ; -- Begin function _Z9globalMaxPi
	.globl	_Z9globalMaxPi
	.p2align	8
	.type	_Z9globalMaxPi,@function
_Z9globalMaxPi:                         ; @_Z9globalMaxPi
; %bb.0:
	s_load_b64 s[0:1], s[0:1], 0x0
	v_mov_b32_e32 v2, 0
	s_mov_b32 s2, 1
.LBB0_1:                                ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v1, s2, v0
	s_mov_b32 s4, exec_lo
	v_cmpx_gt_u32_e32 0x1f4, v1
	s_cbranch_execz .LBB0_3
; %bb.2:                                ;   in Loop: Header=BB0_1 Depth=1
	v_lshlrev_b32_e32 v1, 1, v1
	s_ashr_i32 s3, s2, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_lshl_b64 s[6:7], s[2:3], 2
	v_lshlrev_b64 v[3:4], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, s0, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v5, vcc_lo, v3, s6
	v_add_co_ci_u32_e32 v6, vcc_lo, s7, v4, vcc_lo
	s_clause 0x1
	global_load_b32 v1, v[3:4], off
	global_load_b32 v5, v[5:6], off
	s_waitcnt vmcnt(0)
	v_max_i32_e32 v1, v1, v5
	global_store_b32 v[3:4], v1, off
.LBB0_3:                                ;   in Loop: Header=BB0_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	s_lshl_b32 s3, s2, 1
	s_cmpk_gt_u32 s2, 0x1f3
	s_mov_b32 s2, s3
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB0_1
; %bb.4:
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9globalMaxPi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 8
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 8
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z9globalMaxPi, .Lfunc_end0-_Z9globalMaxPi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 184
; NumSgprs: 10
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 1
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 10
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z15interleavingMaxPi   ; -- Begin function _Z15interleavingMaxPi
	.globl	_Z15interleavingMaxPi
	.p2align	8
	.type	_Z15interleavingMaxPi,@function
_Z15interleavingMaxPi:                  ; @_Z15interleavingMaxPi
; %bb.0:
	s_load_b64 s[0:1], s[0:1], 0x0
	v_lshlrev_b32_e32 v1, 2, v0
	s_mov_b32 s2, 1
	s_waitcnt lgkmcnt(0)
	global_load_b32 v2, v1, s[0:1]
	s_waitcnt vmcnt(0)
	ds_store_b32 v1, v2
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB1_1:                                ; =>This Inner Loop Header: Depth=1
	v_mul_lo_u32 v1, s2, v0
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e32 0x1f4, v1
	s_cbranch_execz .LBB1_3
; %bb.2:                                ;   in Loop: Header=BB1_1 Depth=1
	v_lshlrev_b32_e32 v1, 3, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_lshl_add_u32 v2, s2, 2, v1
	ds_load_b32 v3, v1
	ds_load_b32 v2, v2
	s_waitcnt lgkmcnt(0)
	v_max_i32_e32 v2, v3, v2
	ds_store_b32 v1, v2
.LBB1_3:                                ;   in Loop: Header=BB1_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	s_lshl_b32 s3, s2, 1
	s_cmpk_gt_u32 s2, 0x1f3
	s_mov_b32 s2, s3
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB1_1
; %bb.4:
	s_mov_b32 s2, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB1_6
; %bb.5:
	v_mov_b32_e32 v0, 0
	ds_load_b32 v1, v0
	s_waitcnt lgkmcnt(0)
	global_store_b32 v0, v1, s[0:1]
.LBB1_6:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z15interleavingMaxPi
		.amdhsa_group_segment_fixed_size 4000
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 8
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 4
		.amdhsa_reserve_vcc 0
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z15interleavingMaxPi, .Lfunc_end1-_Z15interleavingMaxPi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 216
; NumSgprs: 4
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 4000 bytes/workgroup (compile time only)
; SGPRBlocks: 0
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 4
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z13sequentialMaxPi     ; -- Begin function _Z13sequentialMaxPi
	.globl	_Z13sequentialMaxPi
	.p2align	8
	.type	_Z13sequentialMaxPi,@function
_Z13sequentialMaxPi:                    ; @_Z13sequentialMaxPi
; %bb.0:
	s_load_b64 s[0:1], s[0:1], 0x0
	v_lshlrev_b32_e32 v1, 2, v0
	s_movk_i32 s2, 0x1f4
	s_waitcnt lgkmcnt(0)
	global_load_b32 v2, v1, s[0:1]
	s_waitcnt vmcnt(0)
	ds_store_b32 v1, v2
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB2_1:                                ; =>This Inner Loop Header: Depth=1
	s_mov_b32 s3, exec_lo
	v_cmpx_gt_u32_e64 s2, v0
	s_cbranch_execz .LBB2_3
; %bb.2:                                ;   in Loop: Header=BB2_1 Depth=1
	v_lshl_add_u32 v2, s2, 2, v1
	ds_load_b32 v3, v1
	ds_load_b32 v2, v2
	s_waitcnt lgkmcnt(0)
	v_max_i32_e32 v2, v3, v2
	ds_store_b32 v1, v2
.LBB2_3:                                ;   in Loop: Header=BB2_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	s_lshr_b32 s3, s2, 1
	s_cmp_lt_u32 s2, 2
	s_mov_b32 s2, s3
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB2_1
; %bb.4:
	s_mov_b32 s2, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB2_6
; %bb.5:
	v_mov_b32_e32 v0, 0
	ds_load_b32 v1, v0
	s_waitcnt lgkmcnt(0)
	global_store_b32 v0, v1, s[0:1]
.LBB2_6:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z13sequentialMaxPi
		.amdhsa_group_segment_fixed_size 4000
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 8
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 4
		.amdhsa_reserve_vcc 0
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z13sequentialMaxPi, .Lfunc_end2-_Z13sequentialMaxPi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 196
; NumSgprs: 4
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 4000 bytes/workgroup (compile time only)
; SGPRBlocks: 0
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 4
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 8
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z9globalMaxPi
    .private_segment_fixed_size: 0
    .sgpr_count:     10
    .sgpr_spill_count: 0
    .symbol:         _Z9globalMaxPi.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     7
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 4000
    .kernarg_segment_align: 8
    .kernarg_segment_size: 8
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z15interleavingMaxPi
    .private_segment_fixed_size: 0
    .sgpr_count:     4
    .sgpr_spill_count: 0
    .symbol:         _Z15interleavingMaxPi.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     4
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 4000
    .kernarg_segment_align: 8
    .kernarg_segment_size: 8
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z13sequentialMaxPi
    .private_segment_fixed_size: 0
    .sgpr_count:     4
    .sgpr_spill_count: 0
    .symbol:         _Z13sequentialMaxPi.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     4
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
