#include<stdlib.h>
#include<stdio.h>
#include<time.h>
using namespace std;
__global__ void mul(int *d_in1,int *d_in2,int *d_out){
	int idx = threadIdx.x;
	d_out[idx] = d_in1[idx]*d_in2[idx];
}
__global__ void reduce_section(int *d_in,int &d_out,const int start,const int end){
	int idx = threadIdx.x;
	extern __shared__ int s_out[];
	s_out[idx] = d_in[start+idx];
	__syncthreads();
	int out;
	for(int step=1;step<end-start;step*=2){
		if(idx-step>=0){
			out = s_out[idx]+s_out[idx-1];
		}
		__syncthreads();
		if(idx-step>=0)
			s_out[idx] = out;
		__syncthreads();
	}
	if(idx == end-start-1)
		d_out = s_out[idx];
}
int main(){
	const int size = 6;
	int value[size] = {1,2,3,4,5,6};
	int cols[size] = {0,2,1,0,1,0};
	int rows[5] = {0,2,3,5,size};//最后一个元素记录非零元素个数
	int mul_val[3] = {1,2,3};
	int mul_valn[size];//非零元素相乘的对应元素
	printf("左矩阵:\n");
	int flag = 0;
	for(int i=0;i<4;i++){
		for(int i=0;i<3;i++){
			if(i == cols[flag])
				printf("%d ",value[flag++]);
			else
				printf("0 ");
		}
		printf("\n");
	}
	printf("\n右矩阵:\n");
	for(int i=0;i<3;i++){
		printf("%d\n",mul_val[i]);
	}
	printf("\n");
	for(int i=0;i<size;i++){
		mul_valn[i] = mul_val[cols[i]];
	}
	int *h_in1 = value;
	int *h_in2 = mul_valn;
	int *h_out;
	int *d_in1;
	int *d_in2;
	int *d_out_mid;
	int *d_out;
	h_out = (int *)malloc(4*sizeof(int));
	cudaMalloc((int **)&d_in1,size*sizeof(int));
	cudaMalloc((int **)&d_in2,size*sizeof(int));
	cudaMalloc((int **)&d_out,4*sizeof(int));
	cudaMalloc((int **)&d_out_mid,size*sizeof(int));
	cudaMemcpy(d_in1,h_in1,size*sizeof(int),cudaMemcpyHostToDevice);
	cudaMemcpy(d_in2,h_in2,size*sizeof(int),cudaMemcpyHostToDevice);
	dim3 thread(size);
	mul<<<1,thread>>>(d_in1,d_in2,d_out_mid);
	for(int i=1;i<5;i++){
		int sizenew = rows[i]-rows[i-1];
		dim3 threadnew(sizenew);
		reduce_section<<<1,threadnew,sizenew>>>(d_out_mid,d_out[i-1],rows[i-1],rows[i]);
	}
	cudaMemcpy(h_out,d_out,4*sizeof(int),cudaMemcpyDeviceToHost);
	printf("结果:\n");
	for(int i=0;i<4;i++){
		printf("%d\n",h_out[i]);
	}
	printf("\n");
	free(h_out);
	cudaFree(d_in1);
	cudaFree(d_in2);
	cudaFree(d_out_mid);
	cudaFree(d_out);
	return 0;
}

	.file	"tmpxft_00247a3a_00000000-6_scan_section.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2030:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z26__device_stub__Z3mulPiS_S_PiS_S_
	.type	_Z26__device_stub__Z3mulPiS_S_PiS_S_, @function
_Z26__device_stub__Z3mulPiS_S_PiS_S_:
.LFB2052:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z3mulPiS_S_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L2:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2052:
	.size	_Z26__device_stub__Z3mulPiS_S_PiS_S_, .-_Z26__device_stub__Z3mulPiS_S_PiS_S_
	.globl	_Z3mulPiS_S_
	.type	_Z3mulPiS_S_, @function
_Z3mulPiS_S_:
.LFB2053:
	.cfi_startproc
	endbr64
	jmp	_Z26__device_stub__Z3mulPiS_S_PiS_S_
	.cfi_endproc
.LFE2053:
	.size	_Z3mulPiS_S_, .-_Z3mulPiS_S_
	.globl	_Z38__device_stub__Z14reduce_sectionPiRiiiPiS_ii
	.type	_Z38__device_stub__Z14reduce_sectionPiRiiiPiS_ii, @function
_Z38__device_stub__Z14reduce_sectionPiRiiiPiS_ii:
.LFB2054:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z14reduce_sectionPiRiii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L8:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2054:
	.size	_Z38__device_stub__Z14reduce_sectionPiRiiiPiS_ii, .-_Z38__device_stub__Z14reduce_sectionPiRiiiPiS_ii
	.globl	_Z14reduce_sectionPiRiii
	.type	_Z14reduce_sectionPiRiii, @function
_Z14reduce_sectionPiRiii:
.LFB2055:
	.cfi_startproc
	endbr64
	jmp	_Z38__device_stub__Z14reduce_sectionPiRiiiPiS_ii
	.cfi_endproc
.LFE2055:
	.size	_Z14reduce_sectionPiRiii, .-_Z14reduce_sectionPiRiii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"\345\267\246\347\237\251\351\230\265:\n"
.LC1:
	.string	"%d "
.LC2:
	.string	"0 "
.LC3:
	.string	"\n"
.LC4:
	.string	"\n\345\217\263\347\237\251\351\230\265:\n"
.LC5:
	.string	"%d\n"
.LC6:
	.string	"\347\273\223\346\236\234:\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	$1, %edx
	movabsq	$17179869187, %rcx
	leaq	.LC0(%rip), %rsi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	salq	$33, %rdx
	movl	$2, %edi
	leaq	.LC2(%rip), %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movl	$4, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	xorl	%ebx, %ebx
	subq	$200, %rsp
	.cfi_def_cfa_offset 256
	movq	%fs:40, %rax
	movq	%rax, 184(%rsp)
	movabsq	$8589934593, %rax
	movq	%rcx, 120(%rsp)
	movabsq	$25769803781, %rcx
	movq	%rcx, 128(%rsp)
	movabsq	$21474836483, %rcx
	movq	%rdx, 136(%rsp)
	movq	$1, 144(%rsp)
	movq	$1, 152(%rsp)
	movq	%rdx, 92(%rsp)
	movq	%rax, 112(%rsp)
	movq	%rax, 80(%rsp)
	xorl	%eax, %eax
	movq	%rcx, 100(%rsp)
	movl	$6, 108(%rsp)
	movl	$3, 88(%rsp)
	call	__printf_chk@PLT
.L14:
	xorl	%ebp, %ebp
.L17:
	movslq	%ebx, %rax
	cmpl	%ebp, 136(%rsp,%rax,4)
	jne	.L15
	movl	112(%rsp,%rax,4), %edx
	leaq	.LC1(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	incl	%ebx
	call	__printf_chk@PLT
	jmp	.L16
.L15:
	movq	%r14, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L16:
	incl	%ebp
	cmpl	$3, %ebp
	jne	.L17
	xorl	%eax, %eax
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	call	__printf_chk@PLT
	decl	%r13d
	jne	.L14
	leaq	.LC4(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	xorl	%ebx, %ebx
	call	__printf_chk@PLT
	leaq	.LC5(%rip), %r13
.L19:
	movl	80(%rsp,%rbx,4), %edx
	movq	%r13, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	incq	%rbx
	call	__printf_chk@PLT
	cmpq	$3, %rbx
	jne	.L19
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	xorl	%eax, %eax
.L20:
	movslq	136(%rsp,%rax), %rdx
	leaq	160(%rsp), %rbx
	movl	80(%rsp,%rdx,4), %edx
	movl	%edx, 160(%rsp,%rax)
	addq	$4, %rax
	cmpq	$24, %rax
	jne	.L20
	movl	$16, %edi
	call	malloc@PLT
	leaq	8(%rsp), %rdi
	movl	$24, %esi
	movq	%rax, %rbp
	call	cudaMalloc@PLT
	leaq	16(%rsp), %rdi
	movl	$24, %esi
	call	cudaMalloc@PLT
	leaq	32(%rsp), %rdi
	movl	$16, %esi
	call	cudaMalloc@PLT
	leaq	24(%rsp), %rdi
	movl	$24, %esi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rdi
	leaq	112(%rsp), %rsi
	movl	$1, %ecx
	movl	$24, %edx
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	movl	$24, %edx
	call	cudaMemcpy@PLT
	movl	$2147483651, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	addq	%rdx, %rdx
	movl	$1, %ecx
	movabsq	$4294967297, %rdi
	movl	$1, %esi
	movq	%rdx, 44(%rsp)
	movl	$1, 52(%rsp)
	movq	%rdi, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L21
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdi
	call	_Z26__device_stub__Z3mulPiS_S_PiS_S_
.L21:
	movabsq	$4294967297, %r14
	xorl	%ebx, %ebx
.L23:
	movl	96(%rsp,%rbx), %r15d
	movl	92(%rsp,%rbx), %r12d
	xorl	%r9d, %r9d
	movq	%r14, %rdi
	movq	%r14, 60(%rsp)
	movl	64(%rsp), %ecx
	movl	$1, %esi
	movl	%r15d, %r8d
	movq	%r14, 68(%rsp)
	subl	%r12d, %r8d
	movl	$1, 76(%rsp)
	movl	%r8d, 56(%rsp)
	movq	56(%rsp), %rdx
	movslq	%r8d, %r8
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L22
	movq	32(%rsp), %rsi
	movq	24(%rsp), %rdi
	movl	%r15d, %ecx
	movl	%r12d, %edx
	addq	%rbx, %rsi
	call	_Z38__device_stub__Z14reduce_sectionPiRiiiPiS_ii
.L22:
	addq	$4, %rbx
	cmpq	$16, %rbx
	jne	.L23
	movq	32(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbp, %rdi
	xorl	%ebx, %ebx
	movl	$16, %edx
	call	cudaMemcpy@PLT
	leaq	.LC6(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L24:
	movl	0(%rbp,%rbx,4), %edx
	movq	%r13, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	incq	%rbx
	call	__printf_chk@PLT
	cmpq	$4, %rbx
	jne	.L24
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	%rbp, %rdi
	call	free@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	184(%rsp), %rax
	subq	%fs:40, %rax
	je	.L25
	call	__stack_chk_fail@PLT
.L25:
	addq	$200, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	main, .-main
	.section	.rodata.str1.1
.LC7:
	.string	"_Z14reduce_sectionPiRiii"
.LC8:
	.string	"_Z3mulPiS_S_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2057:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC7(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z14reduce_sectionPiRiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC8(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z3mulPiS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2057:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include<stdlib.h>
#include<stdio.h>
#include<time.h>
using namespace std;
__global__ void mul(int *d_in1,int *d_in2,int *d_out){
	int idx = threadIdx.x;
	d_out[idx] = d_in1[idx]*d_in2[idx];
}
__global__ void reduce_section(int *d_in,int &d_out,const int start,const int end){
	int idx = threadIdx.x;
	extern __shared__ int s_out[];
	s_out[idx] = d_in[start+idx];
	__syncthreads();
	int out;
	for(int step=1;step<end-start;step*=2){
		if(idx-step>=0){
			out = s_out[idx]+s_out[idx-1];
		}
		__syncthreads();
		if(idx-step>=0)
			s_out[idx] = out;
		__syncthreads();
	}
	if(idx == end-start-1)
		d_out = s_out[idx];
}
int main(){
	const int size = 6;
	int value[size] = {1,2,3,4,5,6};
	int cols[size] = {0,2,1,0,1,0};
	int rows[5] = {0,2,3,5,size};//最后一个元素记录非零元素个数
	int mul_val[3] = {1,2,3};
	int mul_valn[size];//非零元素相乘的对应元素
	printf("左矩阵:\n");
	int flag = 0;
	for(int i=0;i<4;i++){
		for(int i=0;i<3;i++){
			if(i == cols[flag])
				printf("%d ",value[flag++]);
			else
				printf("0 ");
		}
		printf("\n");
	}
	printf("\n右矩阵:\n");
	for(int i=0;i<3;i++){
		printf("%d\n",mul_val[i]);
	}
	printf("\n");
	for(int i=0;i<size;i++){
		mul_valn[i] = mul_val[cols[i]];
	}
	int *h_in1 = value;
	int *h_in2 = mul_valn;
	int *h_out;
	int *d_in1;
	int *d_in2;
	int *d_out_mid;
	int *d_out;
	h_out = (int *)malloc(4*sizeof(int));
	hipMalloc((int **)&d_in1,size*sizeof(int));
	hipMalloc((int **)&d_in2,size*sizeof(int));
	hipMalloc((int **)&d_out,4*sizeof(int));
	hipMalloc((int **)&d_out_mid,size*sizeof(int));
	hipMemcpy(d_in1,h_in1,size*sizeof(int),hipMemcpyHostToDevice);
	hipMemcpy(d_in2,h_in2,size*sizeof(int),hipMemcpyHostToDevice);
	dim3 thread(size);
	mul<<<1,thread>>>(d_in1,d_in2,d_out_mid);
	for(int i=1;i<5;i++){
		int sizenew = rows[i]-rows[i-1];
		dim3 threadnew(sizenew);
		reduce_section<<<1,threadnew,sizenew>>>(d_out_mid,d_out[i-1],rows[i-1],rows[i]);
	}
	hipMemcpy(h_out,d_out,4*sizeof(int),hipMemcpyDeviceToHost);
	printf("结果:\n");
	for(int i=0;i<4;i++){
		printf("%d\n",h_out[i]);
	}
	printf("\n");
	free(h_out);
	hipFree(d_in1);
	hipFree(d_in2);
	hipFree(d_out_mid);
	hipFree(d_out);
	return 0;
}

	.text
	.file	"scan_section.hip"
	.globl	_Z18__device_stub__mulPiS_S_    # -- Begin function _Z18__device_stub__mulPiS_S_
	.type	_Z18__device_stub__mulPiS_S_,@function
_Z18__device_stub__mulPiS_S_:           # @_Z18__device_stub__mulPiS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z3mulPiS_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z18__device_stub__mulPiS_S_, .Lfunc_end0-_Z18__device_stub__mulPiS_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z29__device_stub__reduce_sectionPiRiii # -- Begin function _Z29__device_stub__reduce_sectionPiRiii
	.type	_Z29__device_stub__reduce_sectionPiRiii,@function
_Z29__device_stub__reduce_sectionPiRiii: # @_Z29__device_stub__reduce_sectionPiRiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z14reduce_sectionPiRiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z29__device_stub__reduce_sectionPiRiii, .Lfunc_end1-_Z29__device_stub__reduce_sectionPiRiii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0                          # -- Begin function main
.LCPI2_0:
	.long	1                               # 0x1
	.long	2                               # 0x2
	.long	3                               # 0x3
	.long	4                               # 0x4
.LCPI2_1:
	.long	0                               # 0x0
	.long	2                               # 0x2
	.long	1                               # 0x1
	.long	0                               # 0x0
.LCPI2_2:
	.long	2                               # 0x2
	.long	3                               # 0x3
	.long	5                               # 0x5
	.long	6                               # 0x6
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$176, %rsp
	.cfi_def_cfa_offset 224
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movaps	.LCPI2_0(%rip), %xmm0           # xmm0 = [1,2,3,4]
	movaps	%xmm0, 80(%rsp)
	movabsq	$25769803781, %rax              # imm = 0x600000005
	movq	%rax, 96(%rsp)
	movaps	.LCPI2_1(%rip), %xmm0           # xmm0 = [0,2,1,0]
	movaps	%xmm0, 48(%rsp)
	movq	$1, 64(%rsp)
	movaps	.LCPI2_2(%rip), %xmm0           # xmm0 = [2,3,5,6]
	movups	%xmm0, 116(%rsp)
	movabsq	$8589934593, %rax               # imm = 0x200000001
	movq	%rax, 36(%rsp)
	movl	$3, 44(%rsp)
	movl	$.Lstr, %edi
	callq	puts@PLT
	xorl	%ebp, %ebp
	xorl	%ebx, %ebx
.LBB2_1:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_2 Depth 2
	xorl	%r14d, %r14d
.LBB2_2:                                #   Parent Loop BB2_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movslq	%ebp, %rax
	cmpl	48(%rsp,%rax,4), %r14d
	jne	.LBB2_17
# %bb.3:                                #   in Loop: Header=BB2_2 Depth=2
	leal	1(%rax), %ebp
	movl	80(%rsp,%rax,4), %esi
	movl	$.L.str.1, %edi
	xorl	%eax, %eax
	callq	printf
	jmp	.LBB2_18
.LBB2_17:                               #   in Loop: Header=BB2_2 Depth=2
	movl	$.L.str.2, %edi
	xorl	%eax, %eax
	callq	printf
.LBB2_18:                               #   in Loop: Header=BB2_2 Depth=2
	incl	%r14d
	cmpl	$3, %r14d
	jne	.LBB2_2
# %bb.4:                                #   in Loop: Header=BB2_1 Depth=1
	movl	$10, %edi
	callq	putchar@PLT
	incl	%ebx
	cmpl	$4, %ebx
	jne	.LBB2_1
# %bb.5:
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	xorl	%ebx, %ebx
.LBB2_6:                                # =>This Inner Loop Header: Depth=1
	movl	36(%rsp,%rbx,4), %esi
	movl	$.L.str.5, %edi
	xorl	%eax, %eax
	callq	printf
	incq	%rbx
	cmpq	$3, %rbx
	jne	.LBB2_6
# %bb.7:
	movl	$10, %edi
	callq	putchar@PLT
	xorl	%eax, %eax
.LBB2_8:                                # =>This Inner Loop Header: Depth=1
	movslq	48(%rsp,%rax,4), %rcx
	movl	36(%rsp,%rcx,4), %ecx
	movl	%ecx, 144(%rsp,%rax,4)
	incq	%rax
	cmpq	$6, %rax
	jne	.LBB2_8
# %bb.9:
	movabsq	$4294967297, %r14               # imm = 0x100000001
	movl	$16, %edi
	callq	malloc
	movq	%rax, %rbx
	leaq	24(%rsp), %r12
	movl	$24, %esi
	movq	%r12, %rdi
	callq	hipMalloc
	leaq	16(%rsp), %r15
	movl	$24, %esi
	movq	%r15, %rdi
	callq	hipMalloc
	movq	%rsp, %rdi
	movl	$16, %esi
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	movl	$24, %esi
	callq	hipMalloc
	movq	(%r12), %rdi
	leaq	80(%rsp), %rsi
	movl	$24, %edx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r15), %rdi
	leaq	144(%rsp), %rsi
	movl	$24, %edx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	5(%r14), %rdx
	xorl	%r15d, %r15d
	movq	%r14, %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_10
# %bb.19:
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
	callq	_Z18__device_stub__mulPiS_S_
.LBB2_10:                               # %.preheader81
	xorl	%r12d, %r12d
.LBB2_11:                               # =>This Inner Loop Header: Depth=1
	movl	116(%rsp,%r12), %ebp
	movl	%ebp, %eax
	subl	%r15d, %eax
	leaq	(%r14,%rax), %rdx
	decq	%rdx
	movslq	%eax, %r8
	movq	%r14, %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_13
# %bb.12:                               #   in Loop: Header=BB2_11 Depth=1
	movq	8(%rsp), %rdi
	movq	(%rsp), %rsi
	addq	%r12, %rsi
	movl	%r15d, %edx
	movl	%ebp, %ecx
	callq	_Z29__device_stub__reduce_sectionPiRiii
.LBB2_13:                               #   in Loop: Header=BB2_11 Depth=1
	addq	$4, %r12
	movl	%ebp, %r15d
	cmpq	$16, %r12
	jne	.LBB2_11
# %bb.14:
	movq	(%rsp), %rsi
	movl	$16, %edx
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movl	$.Lstr.2, %edi
	callq	puts@PLT
	xorl	%r14d, %r14d
.LBB2_15:                               # =>This Inner Loop Header: Depth=1
	movl	(%rbx,%r14,4), %esi
	movl	$.L.str.5, %edi
	xorl	%eax, %eax
	callq	printf
	incq	%r14
	cmpq	$4, %r14
	jne	.LBB2_15
# %bb.16:
	movl	$10, %edi
	callq	putchar@PLT
	movq	%rbx, %rdi
	callq	free
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$176, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z3mulPiS_S_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z14reduce_sectionPiRiii, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z3mulPiS_S_,@object            # @_Z3mulPiS_S_
	.section	.rodata,"a",@progbits
	.globl	_Z3mulPiS_S_
	.p2align	3, 0x0
_Z3mulPiS_S_:
	.quad	_Z18__device_stub__mulPiS_S_
	.size	_Z3mulPiS_S_, 8

	.type	_Z14reduce_sectionPiRiii,@object # @_Z14reduce_sectionPiRiii
	.globl	_Z14reduce_sectionPiRiii
	.p2align	3, 0x0
_Z14reduce_sectionPiRiii:
	.quad	_Z29__device_stub__reduce_sectionPiRiii
	.size	_Z14reduce_sectionPiRiii, 8

	.type	.L.str.1,@object                # @.str.1
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.1:
	.asciz	"%d "
	.size	.L.str.1, 4

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"0 "
	.size	.L.str.2, 3

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"%d\n"
	.size	.L.str.5, 4

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z3mulPiS_S_"
	.size	.L__unnamed_1, 13

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z14reduce_sectionPiRiii"
	.size	.L__unnamed_2, 25

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"\345\267\246\347\237\251\351\230\265:"
	.size	.Lstr, 11

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"\n\345\217\263\347\237\251\351\230\265:"
	.size	.Lstr.1, 12

	.type	.Lstr.2,@object                 # @str.2
.Lstr.2:
	.asciz	"\347\273\223\346\236\234:"
	.size	.Lstr.2, 8

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z18__device_stub__mulPiS_S_
	.addrsig_sym _Z29__device_stub__reduce_sectionPiRiii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z3mulPiS_S_
	.addrsig_sym _Z14reduce_sectionPiRiii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z3mulPiS_S_            ; -- Begin function _Z3mulPiS_S_
	.globl	_Z3mulPiS_S_
	.p2align	8
	.type	_Z3mulPiS_S_,@function
_Z3mulPiS_S_:                           ; @_Z3mulPiS_S_
; %bb.0:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_lshlrev_b32_e32 v0, 2, v0
	s_load_b64 s[0:1], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b32 v1, v0, s[4:5]
	global_load_b32 v2, v0, s[6:7]
	s_waitcnt vmcnt(0)
	v_mul_lo_u32 v1, v2, v1
	global_store_b32 v0, v1, s[0:1]
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z3mulPiS_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 24
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 3
		.amdhsa_next_free_sgpr 8
		.amdhsa_reserve_vcc 0
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z3mulPiS_S_, .Lfunc_end0-_Z3mulPiS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 76
; NumSgprs: 8
; NumVgprs: 3
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 0
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 8
; NumVGPRsForWavesPerEU: 3
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z14reduce_sectionPiRiii ; -- Begin function _Z14reduce_sectionPiRiii
	.globl	_Z14reduce_sectionPiRiii
	.p2align	8
	.type	_Z14reduce_sectionPiRiii,@function
_Z14reduce_sectionPiRiii:               ; @_Z14reduce_sectionPiRiii
; %bb.0:
	s_clause 0x1
	s_load_b64 s[4:5], s[0:1], 0x10
	s_load_b128 s[0:3], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, s4, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v2, 31, v1
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v1, vcc_lo, s0, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
	s_sub_i32 s0, s5, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lt_i32 s0, 2
	global_load_b32 v2, v[1:2], off
	v_lshl_add_u32 v1, v0, 2, 0
	s_waitcnt vmcnt(0)
	ds_store_b32 v1, v2
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB1_7
; %bb.1:                                ; %.lr.ph
	v_add_nc_u32_e32 v2, -4, v1
	s_mov_b32 s1, 1
                                        ; implicit-def: $vgpr3
.LBB1_2:                                ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	v_cmp_le_u32_e32 vcc_lo, s1, v0
	s_and_saveexec_b32 s4, vcc_lo
	s_cbranch_execz .LBB1_4
; %bb.3:                                ;   in Loop: Header=BB1_2 Depth=1
	ds_load_2addr_b32 v[3:4], v2 offset1:1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v3, v3, v4
.LBB1_4:                                ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s4, vcc_lo
	s_cbranch_execz .LBB1_6
; %bb.5:                                ;   in Loop: Header=BB1_2 Depth=1
	ds_store_b32 v1, v3
.LBB1_6:                                ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	s_lshl_b32 s1, s1, 1
	s_waitcnt lgkmcnt(0)
	s_cmp_ge_i32 s1, s0
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB1_2
.LBB1_7:                                ; %._crit_edge
	s_add_i32 s0, s0, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	v_cmp_eq_u32_e32 vcc_lo, s0, v0
	s_and_saveexec_b32 s0, vcc_lo
	s_cbranch_execz .LBB1_9
; %bb.8:
	ds_load_b32 v0, v1
	v_mov_b32_e32 v1, 0
	s_waitcnt lgkmcnt(0)
	global_store_b32 v1, v0, s[2:3]
.LBB1_9:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z14reduce_sectionPiRiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 24
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 6
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z14reduce_sectionPiRiii, .Lfunc_end1-_Z14reduce_sectionPiRiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 280
; NumSgprs: 8
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 0
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 8
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 24
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z3mulPiS_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     8
    .sgpr_spill_count: 0
    .symbol:         _Z3mulPiS_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     3
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 24
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z14reduce_sectionPiRiii
    .private_segment_fixed_size: 0
    .sgpr_count:     8
    .sgpr_spill_count: 0
    .symbol:         _Z14reduce_sectionPiRiii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     5
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
