__constant__ int numFreqs;
__constant__ int numPoints;
__constant__ float centerFreq;

/*Finds the index of largest value among the input (size numFreqs)*/
__device__ int argmax(float* input) {
    float max = input[0];
    int best = 0;
    for (int i = 1; i < numFreqs; i++) {
        if (input[i] > max) {
            max = input[i];
            best = i;
        }
    }

    return best;
}

__device__ int dCountPeaks(float *input, float *frequencies) {
    int peaks = 0;
    for (int i = 1; i < numFreqs - 1; i++) {
        if ((input[i] > input[i-1] ||
                    (input[i] == input[i-1] && i > 1 && input[i] > input[i-2])) //extra term where y progresses like 1, 4, 4, 2
                && input[i] > input[i+1]) peaks++;
    }

    return peaks;
}

/*Output is numPoints * 3 array: height, center, standard deviation (a*e^(-(x-b)^2/(2c^2)))
  Only uses the points surrounding the maximum value where y>ymax*cutoffPortion
  If quadratic is true, outputs an approximation for the top of the gaussian in the form a(x-b)^2 + c
  Otherwise outputs gaussian parameters*/
__global__ void reg(float *input, float *output, float *frequencies, float cutoffPortion, bool quadratic){
    int idx = threadIdx.x + blockDim.x * blockIdx.x;

    if (idx >= numPoints) return;

    input += idx * numFreqs;
    output += idx * 3;

    float scaleFactor = 1.0 / (frequencies[numFreqs-1] - frequencies[0]); //avoid float overflow, just scale things

    int maxI = argmax(input);

    float threshold = input[maxI] * cutoffPortion;

    float s40 = 0, s30 = 0, s20 = 0, s10 = 0, s00 = 0, s21 = 0, s11 = 0, s01 = 0; //quadratic regression stuff
    float yval, frequency;

    //go left from peak, then go right from peak
    for (int i = maxI; i < numFreqs && input[i] > threshold; i++) {
        yval = quadratic ? input[i] / input[maxI] : __logf(input[i]); //in quadratic, divide by input[maxI] to avoid underflow
        frequency = frequencies[i] - frequencies[0]; //shift over by maxFreq to avoid floating point errors
        frequency *= scaleFactor; //scale by scaleFactor to avoid underflow/overflow
        s00++;
        s10 += frequency;
        s20 += frequency * frequency;
        s30 += frequency * frequency * frequency;
        s40 += frequency * frequency * frequency * frequency;
        s01 += yval;
        s11 += frequency * yval;
        s21 += frequency * frequency * yval;
    }

    for (int i = maxI-1; i > 0 && input[i] > threshold; i--) {
        yval = quadratic ? input[i] / input[maxI] : __logf(input[i]);
        frequency = frequencies[i] - frequencies[0]; //shift over by maxFreq to avoid floating point errors
        frequency *= scaleFactor; //scale by scaleFactor to avoid underflow/overflow
        s00++;
        s10 += frequency;
        s20 += frequency * frequency;
        s30 += frequency * frequency * frequency;
        s40 += frequency * frequency * frequency * frequency;
        s01 += yval;
        s11 += frequency * yval;
        s21 += frequency * frequency * yval;
    }

    float a, b, c, q;
    //magical quadratic regression stuff
    q = (s40*(s20 * s00 - s10 * s10) -
            s30*(s30 * s00 - s10 * s20) + 
            s20*(s30 * s10 - s20 * s20));

    a = (s21*(s20 * s00 - s10 * s10) - 
            s11*(s30 * s00 - s10 * s20) + 
            s01*(s30 * s10 - s20 * s20))
        / q;

    b = (s40*(s11 * s00 - s01 * s10) - 
            s30*(s21 * s00 - s01 * s20) + 
            s20*(s21 * s10 - s11 * s20))
        / q;

    c = (s40*(s20 * s01 - s10 * s11) - 
            s30*(s30 * s01 - s10 * s21) + 
            s20*(s30 * s11 - s20 * s21))
        / q;

    //ax^2+bx+c=Ae^((x-b)^2/2c^2)
    if (a > 0) {
        output[0] = output[1] = output[2] = 0;
    }

    if (quadratic) { //scalefactors and input[maxI] and frequencies[0] terms are there to fix scaled/shifted values
        output[0] = a * input[maxI] / scaleFactor;
        output[1] = -b / scaleFactor / (2 * a) + frequencies[0];
        output[2] = (c - b * b / (4 * a)) * input[maxI];
    } else {
        output[0] = __expf(c - (b * b) / (4 * a));
        output[1] = -b / scaleFactor / (2 * a) + frequencies[0];
        output[2] = sqrtf(-1 / (2 * a)) / scaleFactor;
    }

    if (!isfinite(a) || !isfinite(b) || !isfinite(c)) {
        output[0] = output[1] = output[2] = 0;
        return;
    }
}

/*Finds the absolute peak values of the function.*/
__global__ void findPeaks(float *input, float *output, float *frequencies) {
    int idx = threadIdx.x + blockDim.x * blockIdx.x;

    if (idx >= numPoints) return;

    input = input + idx * numFreqs;
    output = output + idx;

    int maxI = argmax(input);

    output[0] = frequencies[maxI];
}

/*Counts the number of peaks, where d2y/df2 < 0 and dy/df=0*/
__global__ void countPeaks(float *input, int *output, float *frequencies) {
    int idx = threadIdx.x + blockDim.x * blockIdx.x;

    if (idx >= numPoints) return;

    input += idx * numFreqs;
    output += idx;

    *output = dCountPeaks(input, frequencies);
}

/*Does a single integration using frequency bounds*/
__device__ float integrate(float *input, float *frequencies, float lowerbound, float upperbound) {
    int i;
    float integral = 0, width, h1;

    for (i = 0; frequencies[i] < lowerbound && i < numFreqs; i++);
    if (i == numFreqs) return 0;

    if (i != 0) {
        //interpolation to find trapezoid size
        width = frequencies[i] - lowerbound;
        h1 = input[i-1] + (lowerbound - frequencies[i-1]) / (frequencies[i] - frequencies[i-1]) * (input[i] - input[i-1]);
        integral += (h1 + input[i]) * width / 2;
    }

    for(i++; frequencies[i] < upperbound && i < numFreqs; i++) {
        integral += (input[i] + input[i-1]) * (frequencies[i] - frequencies[i-1]) / 2;
    }

    if (i == numFreqs) return integral;

    //interpolation to find trapezoid size
    width = upperbound - frequencies[i-1];
    h1 = input[i-1] + (upperbound - frequencies[i-1]) / (frequencies[i] - frequencies[i-1]) * (input[i] - input[i-1]);
    integral += (h1 + input[i-1]) * width / 2;

    return integral;
}

/*Integrates everything to the left or right of a particular frequency until input hits limit * input[target]*/
__global__ void integrateLR(float *input, float *output, float *target, float *frequencies, float limit, bool left) {
    int idx = threadIdx.x + blockDim.x * blockIdx.x;

    if (idx >= numPoints) return;

    input = input + idx * numFreqs;
    output = output + idx;

    float targetFrequency = target[idx];
    float boundFrequency;

    int end;
    for (end = 0; frequencies[end] < targetFrequency; end++); //end is frequency position of target

    limit *= input[end]; //set limit input value

    if (left) {
        for (; end >= 0 && input[end] > limit; end--);
        boundFrequency = end >= 0 ? frequencies[end] : -INFINITY;
        *output = integrate(input, frequencies, boundFrequency, targetFrequency);
    } else { //right
        for (; end < numFreqs && input[end] > limit; end++);
        boundFrequency = end < numFreqs ? frequencies[end] : INFINITY;
        *output = integrate(input, frequencies, targetFrequency, boundFrequency);
    }
}

/*Does integration between bounds, where bounds is a n*2 array*/
__global__ void integrateBounds(float *input, float *output, float *bounds, float *frequencies) {
    int idx = threadIdx.x + blockDim.x * blockIdx.x;

    if (idx >= numPoints) return;

    input = input + idx * numFreqs;
    output = output + idx;

    float lowerbound = bounds[idx];
    float upperbound = bounds[idx + numPoints];

    *output = integrate(input, frequencies, lowerbound, upperbound);
}

/* Finds the width of the profile at half maximum.*/
__global__ void fwhm(float *input, float *output, float *frequencies) {
    int idx = threadIdx.x + blockDim.x * blockIdx.x;

    if (idx >= numPoints) return;

    input = input + idx * numFreqs;
    output = output + idx;

    int peak = argmax(input);
    float halfIntensity = input[peak] / 2;
    float upperbound = 0;
    float lowerbound = 0;

    int i;

    for (i = peak; input[i] > halfIntensity && i < numFreqs; i++);
    upperbound = frequencies[i-1] + (frequencies[i] - frequencies[i-1]) *
        (halfIntensity - input[i]) / (input[i-1] - input[i]);
    for (i = peak; input[i] > halfIntensity && i >= 0; i--);
    lowerbound = frequencies[i] + (frequencies[i+1] - frequencies[i]) *
        (halfIntensity - input[i]) / (input[i+1] - input[i]);

    if (upperbound != upperbound || lowerbound != lowerbound)
        *output = 0;
    else
        *output = upperbound - lowerbound;
}

	.file	"tmpxft_002e777d_00000000-6_sa.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2013:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2013:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z6argmaxPf
	.type	_Z6argmaxPf, @function
_Z6argmaxPf:
.LFB2008:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2008:
	.size	_Z6argmaxPf, .-_Z6argmaxPf
	.globl	_Z11dCountPeaksPfS_
	.type	_Z11dCountPeaksPfS_, @function
_Z11dCountPeaksPfS_:
.LFB2009:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2009:
	.size	_Z11dCountPeaksPfS_, .-_Z11dCountPeaksPfS_
	.globl	_Z9integratePfS_ff
	.type	_Z9integratePfS_ff, @function
_Z9integratePfS_ff:
.LFB2010:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2010:
	.size	_Z9integratePfS_ff, .-_Z9integratePfS_ff
	.globl	_Z28__device_stub__Z3regPfS_S_fbPfS_S_fb
	.type	_Z28__device_stub__Z3regPfS_S_fbPfS_S_fb, @function
_Z28__device_stub__Z3regPfS_S_fbPfS_S_fb:
.LFB2035:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movb	%cl, (%rsp)
	leaq	40(%rsp), %rcx
	movss	%xmm0, 4(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	pushq	40(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z3regPfS_S_fb(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 176
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L8:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2035:
	.size	_Z28__device_stub__Z3regPfS_S_fbPfS_S_fb, .-_Z28__device_stub__Z3regPfS_S_fbPfS_S_fb
	.globl	_Z3regPfS_S_fb
	.type	_Z3regPfS_S_fb, @function
_Z3regPfS_S_fb:
.LFB2036:
	.cfi_startproc
	endbr64
	movzbl	%cl, %ecx
	jmp	_Z28__device_stub__Z3regPfS_S_fbPfS_S_fb
	.cfi_endproc
.LFE2036:
	.size	_Z3regPfS_S_fb, .-_Z3regPfS_S_fb
	.globl	_Z32__device_stub__Z9findPeaksPfS_S_PfS_S_
	.type	_Z32__device_stub__Z9findPeaksPfS_S_PfS_S_, @function
_Z32__device_stub__Z9findPeaksPfS_S_PfS_S_:
.LFB2037:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L14
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z9findPeaksPfS_S_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L14:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L16
	call	__stack_chk_fail@PLT
.L16:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2037:
	.size	_Z32__device_stub__Z9findPeaksPfS_S_PfS_S_, .-_Z32__device_stub__Z9findPeaksPfS_S_PfS_S_
	.globl	_Z9findPeaksPfS_S_
	.type	_Z9findPeaksPfS_S_, @function
_Z9findPeaksPfS_S_:
.LFB2038:
	.cfi_startproc
	endbr64
	jmp	_Z32__device_stub__Z9findPeaksPfS_S_PfS_S_
	.cfi_endproc
.LFE2038:
	.size	_Z9findPeaksPfS_S_, .-_Z9findPeaksPfS_S_
	.globl	_Z34__device_stub__Z10countPeaksPfPiS_PfPiS_
	.type	_Z34__device_stub__Z10countPeaksPfPiS_PfPiS_, @function
_Z34__device_stub__Z10countPeaksPfPiS_PfPiS_:
.LFB2039:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L19
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z10countPeaksPfPiS_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L19:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L21
	call	__stack_chk_fail@PLT
.L21:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2039:
	.size	_Z34__device_stub__Z10countPeaksPfPiS_PfPiS_, .-_Z34__device_stub__Z10countPeaksPfPiS_PfPiS_
	.globl	_Z10countPeaksPfPiS_
	.type	_Z10countPeaksPfPiS_, @function
_Z10countPeaksPfPiS_:
.LFB2040:
	.cfi_startproc
	endbr64
	jmp	_Z34__device_stub__Z10countPeaksPfPiS_PfPiS_
	.cfi_endproc
.LFE2040:
	.size	_Z10countPeaksPfPiS_, .-_Z10countPeaksPfPiS_
	.globl	_Z39__device_stub__Z11integrateLRPfS_S_S_fbPfS_S_S_fb
	.type	_Z39__device_stub__Z11integrateLRPfS_S_S_fbPfS_S_S_fb, @function
_Z39__device_stub__Z11integrateLRPfS_S_S_fbPfS_S_S_fb:
.LFB2041:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	64(%rsp), %rcx
	movb	%r8b, 8(%rsp)
	movss	%xmm0, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L24
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z11integrateLRPfS_S_S_fb(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L24:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L26
	call	__stack_chk_fail@PLT
.L26:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2041:
	.size	_Z39__device_stub__Z11integrateLRPfS_S_S_fbPfS_S_S_fb, .-_Z39__device_stub__Z11integrateLRPfS_S_S_fbPfS_S_S_fb
	.globl	_Z11integrateLRPfS_S_S_fb
	.type	_Z11integrateLRPfS_S_S_fb, @function
_Z11integrateLRPfS_S_S_fb:
.LFB2042:
	.cfi_startproc
	endbr64
	movzbl	%r8b, %r8d
	jmp	_Z39__device_stub__Z11integrateLRPfS_S_S_fbPfS_S_S_fb
	.cfi_endproc
.LFE2042:
	.size	_Z11integrateLRPfS_S_S_fb, .-_Z11integrateLRPfS_S_S_fb
	.globl	_Z41__device_stub__Z15integrateBoundsPfS_S_S_PfS_S_S_
	.type	_Z41__device_stub__Z15integrateBoundsPfS_S_S_PfS_S_S_, @function
_Z41__device_stub__Z15integrateBoundsPfS_S_S_PfS_S_S_:
.LFB2043:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L29
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z15integrateBoundsPfS_S_S_(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L29:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L31
	call	__stack_chk_fail@PLT
.L31:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2043:
	.size	_Z41__device_stub__Z15integrateBoundsPfS_S_S_PfS_S_S_, .-_Z41__device_stub__Z15integrateBoundsPfS_S_S_PfS_S_S_
	.globl	_Z15integrateBoundsPfS_S_S_
	.type	_Z15integrateBoundsPfS_S_S_, @function
_Z15integrateBoundsPfS_S_S_:
.LFB2044:
	.cfi_startproc
	endbr64
	jmp	_Z41__device_stub__Z15integrateBoundsPfS_S_S_PfS_S_S_
	.cfi_endproc
.LFE2044:
	.size	_Z15integrateBoundsPfS_S_S_, .-_Z15integrateBoundsPfS_S_S_
	.globl	_Z27__device_stub__Z4fwhmPfS_S_PfS_S_
	.type	_Z27__device_stub__Z4fwhmPfS_S_PfS_S_, @function
_Z27__device_stub__Z4fwhmPfS_S_PfS_S_:
.LFB2045:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L34
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z4fwhmPfS_S_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L34:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L36
	call	__stack_chk_fail@PLT
.L36:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2045:
	.size	_Z27__device_stub__Z4fwhmPfS_S_PfS_S_, .-_Z27__device_stub__Z4fwhmPfS_S_PfS_S_
	.globl	_Z4fwhmPfS_S_
	.type	_Z4fwhmPfS_S_, @function
_Z4fwhmPfS_S_:
.LFB2046:
	.cfi_startproc
	endbr64
	jmp	_Z27__device_stub__Z4fwhmPfS_S_PfS_S_
	.cfi_endproc
.LFE2046:
	.size	_Z4fwhmPfS_S_, .-_Z4fwhmPfS_S_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z4fwhmPfS_S_"
.LC1:
	.string	"_Z15integrateBoundsPfS_S_S_"
.LC2:
	.string	"_Z11integrateLRPfS_S_S_fb"
.LC3:
	.string	"_Z10countPeaksPfPiS_"
.LC4:
	.string	"_Z9findPeaksPfS_S_"
.LC5:
	.string	"_Z3regPfS_S_fb"
.LC6:
	.string	"numFreqs"
.LC7:
	.string	"numPoints"
.LC8:
	.string	"centerFreq"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2048:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z4fwhmPfS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC1(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z15integrateBoundsPfS_S_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC2(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z11integrateLRPfS_S_S_fb(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC3(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z10countPeaksPfPiS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC4(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z9findPeaksPfS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC5(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z3regPfS_S_fb(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC6(%rip), %rdx
	movl	$4, %r9d
	leaq	_ZL8numFreqs(%rip), %rsi
	pushq	$1
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$1
	.cfi_def_cfa_offset 32
	leaq	.LC7(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$4, %r9d
	leaq	_ZL9numPoints(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$1
	.cfi_def_cfa_offset 32
	leaq	.LC8(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movl	$4, %r9d
	movq	%rdx, %rcx
	leaq	_ZL10centerFreq(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	popq	%r8
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2048:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.local	_ZL10centerFreq
	.comm	_ZL10centerFreq,4,4
	.local	_ZL9numPoints
	.comm	_ZL9numPoints,4,4
	.local	_ZL8numFreqs
	.comm	_ZL8numFreqs,4,4
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
__constant__ int numFreqs;
__constant__ int numPoints;
__constant__ float centerFreq;

/*Finds the index of largest value among the input (size numFreqs)*/
__device__ int argmax(float* input) {
    float max = input[0];
    int best = 0;
    for (int i = 1; i < numFreqs; i++) {
        if (input[i] > max) {
            max = input[i];
            best = i;
        }
    }

    return best;
}

__device__ int dCountPeaks(float *input, float *frequencies) {
    int peaks = 0;
    for (int i = 1; i < numFreqs - 1; i++) {
        if ((input[i] > input[i-1] ||
                    (input[i] == input[i-1] && i > 1 && input[i] > input[i-2])) //extra term where y progresses like 1, 4, 4, 2
                && input[i] > input[i+1]) peaks++;
    }

    return peaks;
}

/*Output is numPoints * 3 array: height, center, standard deviation (a*e^(-(x-b)^2/(2c^2)))
  Only uses the points surrounding the maximum value where y>ymax*cutoffPortion
  If quadratic is true, outputs an approximation for the top of the gaussian in the form a(x-b)^2 + c
  Otherwise outputs gaussian parameters*/
__global__ void reg(float *input, float *output, float *frequencies, float cutoffPortion, bool quadratic){
    int idx = threadIdx.x + blockDim.x * blockIdx.x;

    if (idx >= numPoints) return;

    input += idx * numFreqs;
    output += idx * 3;

    float scaleFactor = 1.0 / (frequencies[numFreqs-1] - frequencies[0]); //avoid float overflow, just scale things

    int maxI = argmax(input);

    float threshold = input[maxI] * cutoffPortion;

    float s40 = 0, s30 = 0, s20 = 0, s10 = 0, s00 = 0, s21 = 0, s11 = 0, s01 = 0; //quadratic regression stuff
    float yval, frequency;

    //go left from peak, then go right from peak
    for (int i = maxI; i < numFreqs && input[i] > threshold; i++) {
        yval = quadratic ? input[i] / input[maxI] : __logf(input[i]); //in quadratic, divide by input[maxI] to avoid underflow
        frequency = frequencies[i] - frequencies[0]; //shift over by maxFreq to avoid floating point errors
        frequency *= scaleFactor; //scale by scaleFactor to avoid underflow/overflow
        s00++;
        s10 += frequency;
        s20 += frequency * frequency;
        s30 += frequency * frequency * frequency;
        s40 += frequency * frequency * frequency * frequency;
        s01 += yval;
        s11 += frequency * yval;
        s21 += frequency * frequency * yval;
    }

    for (int i = maxI-1; i > 0 && input[i] > threshold; i--) {
        yval = quadratic ? input[i] / input[maxI] : __logf(input[i]);
        frequency = frequencies[i] - frequencies[0]; //shift over by maxFreq to avoid floating point errors
        frequency *= scaleFactor; //scale by scaleFactor to avoid underflow/overflow
        s00++;
        s10 += frequency;
        s20 += frequency * frequency;
        s30 += frequency * frequency * frequency;
        s40 += frequency * frequency * frequency * frequency;
        s01 += yval;
        s11 += frequency * yval;
        s21 += frequency * frequency * yval;
    }

    float a, b, c, q;
    //magical quadratic regression stuff
    q = (s40*(s20 * s00 - s10 * s10) -
            s30*(s30 * s00 - s10 * s20) + 
            s20*(s30 * s10 - s20 * s20));

    a = (s21*(s20 * s00 - s10 * s10) - 
            s11*(s30 * s00 - s10 * s20) + 
            s01*(s30 * s10 - s20 * s20))
        / q;

    b = (s40*(s11 * s00 - s01 * s10) - 
            s30*(s21 * s00 - s01 * s20) + 
            s20*(s21 * s10 - s11 * s20))
        / q;

    c = (s40*(s20 * s01 - s10 * s11) - 
            s30*(s30 * s01 - s10 * s21) + 
            s20*(s30 * s11 - s20 * s21))
        / q;

    //ax^2+bx+c=Ae^((x-b)^2/2c^2)
    if (a > 0) {
        output[0] = output[1] = output[2] = 0;
    }

    if (quadratic) { //scalefactors and input[maxI] and frequencies[0] terms are there to fix scaled/shifted values
        output[0] = a * input[maxI] / scaleFactor;
        output[1] = -b / scaleFactor / (2 * a) + frequencies[0];
        output[2] = (c - b * b / (4 * a)) * input[maxI];
    } else {
        output[0] = __expf(c - (b * b) / (4 * a));
        output[1] = -b / scaleFactor / (2 * a) + frequencies[0];
        output[2] = sqrtf(-1 / (2 * a)) / scaleFactor;
    }

    if (!isfinite(a) || !isfinite(b) || !isfinite(c)) {
        output[0] = output[1] = output[2] = 0;
        return;
    }
}

/*Finds the absolute peak values of the function.*/
__global__ void findPeaks(float *input, float *output, float *frequencies) {
    int idx = threadIdx.x + blockDim.x * blockIdx.x;

    if (idx >= numPoints) return;

    input = input + idx * numFreqs;
    output = output + idx;

    int maxI = argmax(input);

    output[0] = frequencies[maxI];
}

/*Counts the number of peaks, where d2y/df2 < 0 and dy/df=0*/
__global__ void countPeaks(float *input, int *output, float *frequencies) {
    int idx = threadIdx.x + blockDim.x * blockIdx.x;

    if (idx >= numPoints) return;

    input += idx * numFreqs;
    output += idx;

    *output = dCountPeaks(input, frequencies);
}

/*Does a single integration using frequency bounds*/
__device__ float integrate(float *input, float *frequencies, float lowerbound, float upperbound) {
    int i;
    float integral = 0, width, h1;

    for (i = 0; frequencies[i] < lowerbound && i < numFreqs; i++);
    if (i == numFreqs) return 0;

    if (i != 0) {
        //interpolation to find trapezoid size
        width = frequencies[i] - lowerbound;
        h1 = input[i-1] + (lowerbound - frequencies[i-1]) / (frequencies[i] - frequencies[i-1]) * (input[i] - input[i-1]);
        integral += (h1 + input[i]) * width / 2;
    }

    for(i++; frequencies[i] < upperbound && i < numFreqs; i++) {
        integral += (input[i] + input[i-1]) * (frequencies[i] - frequencies[i-1]) / 2;
    }

    if (i == numFreqs) return integral;

    //interpolation to find trapezoid size
    width = upperbound - frequencies[i-1];
    h1 = input[i-1] + (upperbound - frequencies[i-1]) / (frequencies[i] - frequencies[i-1]) * (input[i] - input[i-1]);
    integral += (h1 + input[i-1]) * width / 2;

    return integral;
}

/*Integrates everything to the left or right of a particular frequency until input hits limit * input[target]*/
__global__ void integrateLR(float *input, float *output, float *target, float *frequencies, float limit, bool left) {
    int idx = threadIdx.x + blockDim.x * blockIdx.x;

    if (idx >= numPoints) return;

    input = input + idx * numFreqs;
    output = output + idx;

    float targetFrequency = target[idx];
    float boundFrequency;

    int end;
    for (end = 0; frequencies[end] < targetFrequency; end++); //end is frequency position of target

    limit *= input[end]; //set limit input value

    if (left) {
        for (; end >= 0 && input[end] > limit; end--);
        boundFrequency = end >= 0 ? frequencies[end] : -INFINITY;
        *output = integrate(input, frequencies, boundFrequency, targetFrequency);
    } else { //right
        for (; end < numFreqs && input[end] > limit; end++);
        boundFrequency = end < numFreqs ? frequencies[end] : INFINITY;
        *output = integrate(input, frequencies, targetFrequency, boundFrequency);
    }
}

/*Does integration between bounds, where bounds is a n*2 array*/
__global__ void integrateBounds(float *input, float *output, float *bounds, float *frequencies) {
    int idx = threadIdx.x + blockDim.x * blockIdx.x;

    if (idx >= numPoints) return;

    input = input + idx * numFreqs;
    output = output + idx;

    float lowerbound = bounds[idx];
    float upperbound = bounds[idx + numPoints];

    *output = integrate(input, frequencies, lowerbound, upperbound);
}

/* Finds the width of the profile at half maximum.*/
__global__ void fwhm(float *input, float *output, float *frequencies) {
    int idx = threadIdx.x + blockDim.x * blockIdx.x;

    if (idx >= numPoints) return;

    input = input + idx * numFreqs;
    output = output + idx;

    int peak = argmax(input);
    float halfIntensity = input[peak] / 2;
    float upperbound = 0;
    float lowerbound = 0;

    int i;

    for (i = peak; input[i] > halfIntensity && i < numFreqs; i++);
    upperbound = frequencies[i-1] + (frequencies[i] - frequencies[i-1]) *
        (halfIntensity - input[i]) / (input[i-1] - input[i]);
    for (i = peak; input[i] > halfIntensity && i >= 0; i--);
    lowerbound = frequencies[i] + (frequencies[i+1] - frequencies[i]) *
        (halfIntensity - input[i]) / (input[i+1] - input[i]);

    if (upperbound != upperbound || lowerbound != lowerbound)
        *output = 0;
    else
        *output = upperbound - lowerbound;
}

	.text
	.file	"sa.hip"
	.globl	_Z18__device_stub__regPfS_S_fb  # -- Begin function _Z18__device_stub__regPfS_S_fb
	.type	_Z18__device_stub__regPfS_S_fb,@function
_Z18__device_stub__regPfS_S_fb:         # @_Z18__device_stub__regPfS_S_fb
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movss	%xmm0, (%rdx)
	leaq	3(%rsp), %r8
	movb	%cl, (%r8)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%r8, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z3regPfS_S_fb, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z18__device_stub__regPfS_S_fb, .Lfunc_end0-_Z18__device_stub__regPfS_S_fb
	.cfi_endproc
                                        # -- End function
	.globl	_Z24__device_stub__findPeaksPfS_S_ # -- Begin function _Z24__device_stub__findPeaksPfS_S_
	.type	_Z24__device_stub__findPeaksPfS_S_,@function
_Z24__device_stub__findPeaksPfS_S_:     # @_Z24__device_stub__findPeaksPfS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9findPeaksPfS_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z24__device_stub__findPeaksPfS_S_, .Lfunc_end1-_Z24__device_stub__findPeaksPfS_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z25__device_stub__countPeaksPfPiS_ # -- Begin function _Z25__device_stub__countPeaksPfPiS_
	.type	_Z25__device_stub__countPeaksPfPiS_,@function
_Z25__device_stub__countPeaksPfPiS_:    # @_Z25__device_stub__countPeaksPfPiS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10countPeaksPfPiS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z25__device_stub__countPeaksPfPiS_, .Lfunc_end2-_Z25__device_stub__countPeaksPfPiS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z26__device_stub__integrateLRPfS_S_S_fb # -- Begin function _Z26__device_stub__integrateLRPfS_S_S_fb
	.type	_Z26__device_stub__integrateLRPfS_S_S_fb,@function
_Z26__device_stub__integrateLRPfS_S_S_fb: # @_Z26__device_stub__integrateLRPfS_S_S_fb
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	12(%rsp), %rcx
	movss	%xmm0, (%rcx)
	leaq	11(%rsp), %r9
	movb	%r8b, (%r9)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r9, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11integrateLRPfS_S_S_fb, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z26__device_stub__integrateLRPfS_S_S_fb, .Lfunc_end3-_Z26__device_stub__integrateLRPfS_S_S_fb
	.cfi_endproc
                                        # -- End function
	.globl	_Z30__device_stub__integrateBoundsPfS_S_S_ # -- Begin function _Z30__device_stub__integrateBoundsPfS_S_S_
	.type	_Z30__device_stub__integrateBoundsPfS_S_S_,@function
_Z30__device_stub__integrateBoundsPfS_S_S_: # @_Z30__device_stub__integrateBoundsPfS_S_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	16(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z15integrateBoundsPfS_S_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z30__device_stub__integrateBoundsPfS_S_S_, .Lfunc_end4-_Z30__device_stub__integrateBoundsPfS_S_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z19__device_stub__fwhmPfS_S_   # -- Begin function _Z19__device_stub__fwhmPfS_S_
	.type	_Z19__device_stub__fwhmPfS_S_,@function
_Z19__device_stub__fwhmPfS_S_:          # @_Z19__device_stub__fwhmPfS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z4fwhmPfS_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	_Z19__device_stub__fwhmPfS_S_, .Lfunc_end5-_Z19__device_stub__fwhmPfS_S_
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB6_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB6_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z3regPfS_S_fb, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9findPeaksPfS_S_, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10countPeaksPfPiS_, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11integrateLRPfS_S_S_fb, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z15integrateBoundsPfS_S_S_, %esi
	movl	$.L__unnamed_5, %edx
	movl	$.L__unnamed_5, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z4fwhmPfS_S_, %esi
	movl	$.L__unnamed_6, %edx
	movl	$.L__unnamed_6, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$0, 8(%rsp)
	movl	$1, (%rsp)
	movl	$numFreqs, %esi
	movl	$.L__unnamed_7, %edx
	movl	$.L__unnamed_7, %ecx
	movl	$4, %r9d
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	callq	__hipRegisterVar
	movl	$0, 8(%rsp)
	movl	$1, (%rsp)
	movl	$numPoints, %esi
	movl	$.L__unnamed_8, %edx
	movl	$.L__unnamed_8, %ecx
	movl	$4, %r9d
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	callq	__hipRegisterVar
	movl	$0, 8(%rsp)
	movl	$1, (%rsp)
	movl	$centerFreq, %esi
	movl	$.L__unnamed_9, %edx
	movl	$.L__unnamed_9, %ecx
	movl	$4, %r9d
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	callq	__hipRegisterVar
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end6:
	.size	__hip_module_ctor, .Lfunc_end6-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB7_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB7_2:
	retq
.Lfunc_end7:
	.size	__hip_module_dtor, .Lfunc_end7-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	numFreqs,@object                # @numFreqs
	.local	numFreqs
	.comm	numFreqs,4,4
	.type	numPoints,@object               # @numPoints
	.local	numPoints
	.comm	numPoints,4,4
	.type	centerFreq,@object              # @centerFreq
	.local	centerFreq
	.comm	centerFreq,4,4
	.type	_Z3regPfS_S_fb,@object          # @_Z3regPfS_S_fb
	.section	.rodata,"a",@progbits
	.globl	_Z3regPfS_S_fb
	.p2align	3, 0x0
_Z3regPfS_S_fb:
	.quad	_Z18__device_stub__regPfS_S_fb
	.size	_Z3regPfS_S_fb, 8

	.type	_Z9findPeaksPfS_S_,@object      # @_Z9findPeaksPfS_S_
	.globl	_Z9findPeaksPfS_S_
	.p2align	3, 0x0
_Z9findPeaksPfS_S_:
	.quad	_Z24__device_stub__findPeaksPfS_S_
	.size	_Z9findPeaksPfS_S_, 8

	.type	_Z10countPeaksPfPiS_,@object    # @_Z10countPeaksPfPiS_
	.globl	_Z10countPeaksPfPiS_
	.p2align	3, 0x0
_Z10countPeaksPfPiS_:
	.quad	_Z25__device_stub__countPeaksPfPiS_
	.size	_Z10countPeaksPfPiS_, 8

	.type	_Z11integrateLRPfS_S_S_fb,@object # @_Z11integrateLRPfS_S_S_fb
	.globl	_Z11integrateLRPfS_S_S_fb
	.p2align	3, 0x0
_Z11integrateLRPfS_S_S_fb:
	.quad	_Z26__device_stub__integrateLRPfS_S_S_fb
	.size	_Z11integrateLRPfS_S_S_fb, 8

	.type	_Z15integrateBoundsPfS_S_S_,@object # @_Z15integrateBoundsPfS_S_S_
	.globl	_Z15integrateBoundsPfS_S_S_
	.p2align	3, 0x0
_Z15integrateBoundsPfS_S_S_:
	.quad	_Z30__device_stub__integrateBoundsPfS_S_S_
	.size	_Z15integrateBoundsPfS_S_S_, 8

	.type	_Z4fwhmPfS_S_,@object           # @_Z4fwhmPfS_S_
	.globl	_Z4fwhmPfS_S_
	.p2align	3, 0x0
_Z4fwhmPfS_S_:
	.quad	_Z19__device_stub__fwhmPfS_S_
	.size	_Z4fwhmPfS_S_, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z3regPfS_S_fb"
	.size	.L__unnamed_1, 15

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z9findPeaksPfS_S_"
	.size	.L__unnamed_2, 19

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z10countPeaksPfPiS_"
	.size	.L__unnamed_3, 21

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"_Z11integrateLRPfS_S_S_fb"
	.size	.L__unnamed_4, 26

	.type	.L__unnamed_5,@object           # @4
.L__unnamed_5:
	.asciz	"_Z15integrateBoundsPfS_S_S_"
	.size	.L__unnamed_5, 28

	.type	.L__unnamed_6,@object           # @5
.L__unnamed_6:
	.asciz	"_Z4fwhmPfS_S_"
	.size	.L__unnamed_6, 14

	.type	.L__unnamed_7,@object           # @6
.L__unnamed_7:
	.asciz	"numFreqs"
	.size	.L__unnamed_7, 9

	.type	.L__unnamed_8,@object           # @7
.L__unnamed_8:
	.asciz	"numPoints"
	.size	.L__unnamed_8, 10

	.type	.L__unnamed_9,@object           # @8
.L__unnamed_9:
	.asciz	"centerFreq"
	.size	.L__unnamed_9, 11

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z18__device_stub__regPfS_S_fb
	.addrsig_sym _Z24__device_stub__findPeaksPfS_S_
	.addrsig_sym _Z25__device_stub__countPeaksPfPiS_
	.addrsig_sym _Z26__device_stub__integrateLRPfS_S_S_fb
	.addrsig_sym _Z30__device_stub__integrateBoundsPfS_S_S_
	.addrsig_sym _Z19__device_stub__fwhmPfS_S_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym numFreqs
	.addrsig_sym numPoints
	.addrsig_sym centerFreq
	.addrsig_sym _Z3regPfS_S_fb
	.addrsig_sym _Z9findPeaksPfS_S_
	.addrsig_sym _Z10countPeaksPfPiS_
	.addrsig_sym _Z11integrateLRPfS_S_S_fb
	.addrsig_sym _Z15integrateBoundsPfS_S_S_
	.addrsig_sym _Z4fwhmPfS_S_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z3regPfS_S_fb          ; -- Begin function _Z3regPfS_S_fb
	.globl	_Z3regPfS_S_fb
	.p2align	8
	.type	_Z3regPfS_S_fb,@function
_Z3regPfS_S_fb:                         ; @_Z3regPfS_S_fb
; %bb.0:
	s_load_b32 s4, s[0:1], 0x2c
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, numPoints@rel32@lo+4
	s_addc_u32 s3, s3, numPoints@rel32@hi+12
	s_load_b32 s2, s[2:3], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s3, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, s15, s3, v[0:1]
	v_cmp_gt_i32_e32 vcc_lo, s2, v2
	s_and_saveexec_b32 s2, vcc_lo
	s_cbranch_execz .LBB0_35
; %bb.1:
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, numFreqs@rel32@lo+4
	s_addc_u32 s3, s3, numFreqs@rel32@hi+12
	v_mov_b32_e32 v5, 0
	s_load_b32 s10, s[2:3], 0x0
	s_clause 0x1
	s_load_b64 s[8:9], s[0:1], 0x10
	s_load_b128 s[4:7], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	v_mul_lo_u32 v0, s10, v2
	s_ashr_i32 s11, s10, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	s_lshl_b64 s[2:3], s[10:11], 2
	v_cmp_lt_i64_e64 s11, s[10:11], 2
	s_add_u32 s2, s8, s2
	s_addc_u32 s3, s9, s3
	s_add_u32 s12, s2, -4
	v_ashrrev_i32_e32 v1, 31, v0
	s_addc_u32 s13, s3, -1
	s_and_b32 vcc_lo, exec_lo, s11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[0:1]
	v_add_co_u32 v0, s2, s4, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v1, s2, s5, v4, s2
	s_cbranch_vccnz .LBB0_4
; %bb.2:                                ; %.lr.ph.preheader.i
	global_load_b32 v8, v[0:1], off
	v_add_co_u32 v5, vcc_lo, v3, s4
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v4, vcc_lo
	s_mov_b32 s3, 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v5, 4
	v_add_co_ci_u32_e32 v7, vcc_lo, 0, v7, vcc_lo
	v_mov_b32_e32 v5, 0
.LBB0_3:                                ; %.lr.ph.i
                                        ; =>This Inner Loop Header: Depth=1
	global_load_b32 v9, v[6:7], off
	v_add_co_u32 v6, vcc_lo, v6, 4
	v_add_co_ci_u32_e32 v7, vcc_lo, 0, v7, vcc_lo
	s_waitcnt vmcnt(0)
	v_cmp_gt_f32_e64 s2, v9, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_cndmask_b32_e64 v8, v8, v9, s2
	v_cndmask_b32_e64 v5, v5, s3, s2
	s_add_i32 s3, s3, 1
	s_cmp_lg_u32 s10, s3
	s_cbranch_scc1 .LBB0_3
.LBB0_4:                                ; %Flow315
	s_delay_alu instid0(VALU_DEP_1)
	v_ashrrev_i32_e32 v6, 31, v5
	s_clause 0x1
	s_load_b32 s3, s[12:13], 0x0
	s_load_b32 s2, s[8:9], 0x0
	s_load_b64 s[12:13], s[0:1], 0x18
	v_mov_b32_e32 v13, 0
	s_mov_b32 s11, 0
	v_lshlrev_b64 v[8:9], 2, v[5:6]
	v_mov_b32_e32 v12, 0
	v_mov_b32_e32 v16, 0
	v_mov_b32_e32 v18, 0
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_u32 v0, vcc_lo, v0, v8
	v_add_co_ci_u32_e32 v1, vcc_lo, v1, v9, vcc_lo
	global_load_b32 v19, v[0:1], off
	v_mov_b32_e32 v15, 0
	s_waitcnt lgkmcnt(0)
	v_sub_f32_e64 v6, s3, s2
	s_bitcmp1_b32 s13, 0
	s_mov_b32 s3, exec_lo
	s_cselect_b32 s1, -1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_div_scale_f32 v7, null, v6, v6, 1.0
	v_div_scale_f32 v14, vcc_lo, 1.0, v6, 1.0
	s_xor_b32 s1, s1, -1
	v_rcp_f32_e32 v10, v7
	s_waitcnt_depctr 0xfff
	v_fma_f32 v11, -v7, v10, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v10, v11, v10
	v_mul_f32_e32 v17, v14, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v11, -v7, v17, v14
	v_fmac_f32_e32 v17, v11, v10
	v_mov_b32_e32 v11, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f32 v7, -v7, v17, v14
	v_mov_b32_e32 v14, 0
	v_div_fmas_f32 v7, v7, v10, v17
	v_mov_b32_e32 v17, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_div_fixup_f32 v10, v7, v6, 1.0
	s_waitcnt vmcnt(0)
	v_mul_f32_e32 v20, s12, v19
	v_cmpx_gt_i32_e64 s10, v5
	s_cbranch_execz .LBB0_15
; %bb.5:                                ; %.lr.ph.preheader
	v_add_co_u32 v6, vcc_lo, v8, v3
	v_add_co_ci_u32_e32 v7, vcc_lo, v9, v4, vcc_lo
	v_dual_mov_b32 v11, 0 :: v_dual_mov_b32 v12, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, s4, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v7, vcc_lo
	v_add_co_u32 v8, vcc_lo, s8, v8
	v_add_co_ci_u32_e32 v9, vcc_lo, s9, v9, vcc_lo
	v_dual_mov_b32 v21, v5 :: v_dual_mov_b32 v16, 0
	v_dual_mov_b32 v13, 0 :: v_dual_mov_b32 v14, 0
	v_dual_mov_b32 v15, 0 :: v_dual_mov_b32 v18, 0
	v_mov_b32_e32 v17, 0
                                        ; implicit-def: $sgpr12
.LBB0_6:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	global_load_b32 v22, v[6:7], off
	s_or_b32 s12, s12, exec_lo
	s_mov_b32 s13, exec_lo
	s_waitcnt vmcnt(0)
	v_cmpx_gt_f32_e32 v22, v20
	s_cbranch_execz .LBB0_13
; %bb.7:                                ;   in Loop: Header=BB0_6 Depth=1
	s_and_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccz .LBB0_9
; %bb.8:                                ;   in Loop: Header=BB0_6 Depth=1
	v_cmp_gt_f32_e32 vcc_lo, 0x800000, v22
	v_cndmask_b32_e64 v23, 1.0, 0x4f800000, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v23, v22, v23
	v_log_f32_e32 v23, v23
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v24, 0x3f317217, v23
	v_cmp_gt_f32_e64 s0, 0x7f800000, |v23|
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v24, 0x3f317217, v23, -v24
	v_fmac_f32_e32 v24, 0x3377d1cf, v23
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v24, 0x3f317217, v23
	v_cndmask_b32_e64 v23, v23, v24, s0
	v_cndmask_b32_e64 v24, 0, 0x41b17218, vcc_lo
	s_mov_b32 s0, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_sub_f32_e32 v23, v23, v24
	s_branch .LBB0_10
.LBB0_9:                                ;   in Loop: Header=BB0_6 Depth=1
	s_mov_b32 s0, -1
                                        ; implicit-def: $vgpr23
.LBB0_10:                               ; %Flow309
                                        ;   in Loop: Header=BB0_6 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccnz .LBB0_12
; %bb.11:                               ;   in Loop: Header=BB0_6 Depth=1
	v_div_scale_f32 v23, null, v19, v19, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v24, v23
	s_waitcnt_depctr 0xfff
	v_fma_f32 v25, -v23, v24, 1.0
	v_fmac_f32_e32 v24, v25, v24
	v_div_scale_f32 v25, vcc_lo, v22, v19, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v26, v25, v24
	v_fma_f32 v27, -v23, v26, v25
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v26, v27, v24
	v_fma_f32 v23, -v23, v26, v25
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v23, v23, v24, v26
	v_div_fixup_f32 v23, v23, v19, v22
.LBB0_12:                               ;   in Loop: Header=BB0_6 Depth=1
	global_load_b32 v22, v[8:9], off
	v_add_co_u32 v6, vcc_lo, v6, 4
	v_dual_add_f32 v16, 1.0, v16 :: v_dual_add_nc_u32 v21, 1, v21
	v_add_co_ci_u32_e32 v7, vcc_lo, 0, v7, vcc_lo
	v_add_co_u32 v8, vcc_lo, v8, 4
	v_add_co_ci_u32_e32 v9, vcc_lo, 0, v9, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	v_cmp_le_i32_e32 vcc_lo, s10, v21
	s_and_not1_b32 s0, s12, exec_lo
	v_add_f32_e32 v13, v13, v23
	s_and_b32 s12, vcc_lo, exec_lo
	s_or_b32 s12, s0, s12
	s_waitcnt vmcnt(0)
	v_subrev_f32_e32 v22, s2, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v24, v10, v22
	v_mul_f32_e32 v25, v24, v24
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_4)
	v_fmac_f32_e32 v15, v23, v25
	v_dual_fmac_f32 v17, v10, v22 :: v_dual_mul_f32 v22, v24, v25
	v_fmac_f32_e32 v14, v24, v24
	v_fmac_f32_e32 v12, v23, v24
	v_fmac_f32_e32 v18, v24, v25
	v_fmac_f32_e32 v11, v24, v22
.LBB0_13:                               ; %Flow311
                                        ;   in Loop: Header=BB0_6 Depth=1
	s_or_b32 exec_lo, exec_lo, s13
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, exec_lo, s12
	s_or_b32 s11, s0, s11
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s11
	s_cbranch_execnz .LBB0_6
; %bb.14:                               ; %Flow312
	s_or_b32 exec_lo, exec_lo, s11
.LBB0_15:                               ; %Flow313
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s3
	s_mov_b32 s3, exec_lo
	v_cmpx_lt_i32_e32 1, v5
	s_cbranch_execz .LBB0_26
; %bb.16:                               ; %.lr.ph260.preheader
	v_dual_mov_b32 v7, 0 :: v_dual_add_nc_u32 v6, -1, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[8:9], 2, v[6:7]
	v_add_nc_u32_e32 v7, 1, v5
	v_add_co_u32 v3, vcc_lo, v3, v8
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, v4, v9, vcc_lo
	v_add_co_u32 v3, vcc_lo, s4, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
	v_add_co_u32 v5, vcc_lo, s8, v8
	v_add_co_ci_u32_e32 v6, vcc_lo, s9, v9, vcc_lo
	s_mov_b32 s4, 0
                                        ; implicit-def: $sgpr5
.LBB0_17:                               ; %.lr.ph260
                                        ; =>This Inner Loop Header: Depth=1
	global_load_b32 v8, v[3:4], off
	s_or_b32 s5, s5, exec_lo
	s_mov_b32 s10, exec_lo
	s_waitcnt vmcnt(0)
	v_cmpx_gt_f32_e32 v8, v20
	s_cbranch_execz .LBB0_24
; %bb.18:                               ;   in Loop: Header=BB0_17 Depth=1
	s_and_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccz .LBB0_20
; %bb.19:                               ;   in Loop: Header=BB0_17 Depth=1
	v_cmp_gt_f32_e32 vcc_lo, 0x800000, v8
	v_cndmask_b32_e64 v9, 1.0, 0x4f800000, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v9, v8, v9
	v_log_f32_e32 v9, v9
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v21, 0x3f317217, v9
	v_cmp_gt_f32_e64 s0, 0x7f800000, |v9|
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v21, 0x3f317217, v9, -v21
	v_fmac_f32_e32 v21, 0x3377d1cf, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v21, 0x3f317217, v9
	v_cndmask_b32_e64 v9, v9, v21, s0
	v_cndmask_b32_e64 v21, 0, 0x41b17218, vcc_lo
	s_mov_b32 s0, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_sub_f32_e32 v9, v9, v21
	s_branch .LBB0_21
.LBB0_20:                               ;   in Loop: Header=BB0_17 Depth=1
	s_mov_b32 s0, -1
                                        ; implicit-def: $vgpr9
.LBB0_21:                               ; %Flow304
                                        ;   in Loop: Header=BB0_17 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccnz .LBB0_23
; %bb.22:                               ;   in Loop: Header=BB0_17 Depth=1
	v_div_scale_f32 v9, null, v19, v19, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v21, v9
	s_waitcnt_depctr 0xfff
	v_fma_f32 v22, -v9, v21, 1.0
	v_fmac_f32_e32 v21, v22, v21
	v_div_scale_f32 v22, vcc_lo, v8, v19, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v23, v22, v21
	v_fma_f32 v24, -v9, v23, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v23, v24, v21
	v_fma_f32 v9, -v9, v23, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v9, v9, v21, v23
	v_div_fixup_f32 v9, v9, v19, v8
.LBB0_23:                               ;   in Loop: Header=BB0_17 Depth=1
	global_load_b32 v8, v[5:6], off
	v_add_co_u32 v3, vcc_lo, v3, -4
	v_dual_add_f32 v16, 1.0, v16 :: v_dual_add_nc_u32 v7, -1, v7
	v_add_co_ci_u32_e32 v4, vcc_lo, -1, v4, vcc_lo
	v_add_co_u32 v5, vcc_lo, v5, -4
	v_add_co_ci_u32_e32 v6, vcc_lo, -1, v6, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	v_cmp_gt_u32_e32 vcc_lo, 3, v7
	s_and_not1_b32 s0, s5, exec_lo
	v_add_f32_e32 v13, v13, v9
	s_and_b32 s5, vcc_lo, exec_lo
	s_or_b32 s5, s0, s5
	s_waitcnt vmcnt(0)
	v_subrev_f32_e32 v8, s2, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v21, v10, v8
	v_dual_fmac_f32 v17, v10, v8 :: v_dual_mul_f32 v22, v21, v21
	v_fmac_f32_e32 v14, v21, v21
	v_fmac_f32_e32 v12, v9, v21
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_f32_e32 v8, v21, v22
	v_fmac_f32_e32 v18, v21, v22
	v_fmac_f32_e32 v15, v9, v22
	v_fmac_f32_e32 v11, v21, v8
.LBB0_24:                               ; %Flow306
                                        ;   in Loop: Header=BB0_17 Depth=1
	s_or_b32 exec_lo, exec_lo, s10
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, exec_lo, s5
	s_or_b32 s4, s0, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s4
	s_cbranch_execnz .LBB0_17
; %bb.25:                               ; %Flow307
	s_or_b32 exec_lo, exec_lo, s4
.LBB0_26:                               ; %Flow308
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	s_or_b32 exec_lo, exec_lo, s3
	v_mul_f32_e32 v3, v14, v17
	v_dual_mul_f32 v4, v17, v17 :: v_dual_mul_f32 v5, v14, v14
	v_lshl_add_u32 v2, v2, 1, v2
	s_mov_b32 s0, exec_lo
	v_fma_f32 v3, v18, v16, -v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f32 v4, v14, v16, -v4
	v_fma_f32 v5, v18, v17, -v5
	v_mul_f32_e32 v6, v18, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v6, v4, v11, -v6
	v_dual_mul_f32 v3, v12, v3 :: v_dual_fmac_f32 v6, v14, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v4, v15, v4, -v3
	v_fmac_f32_e32 v4, v5, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_scale_f32 v3, null, v6, v6, v4
	v_rcp_f32_e32 v5, v3
	s_waitcnt_depctr 0xfff
	v_fma_f32 v7, -v3, v5, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v5, v7, v5
	v_div_scale_f32 v7, vcc_lo, v4, v6, v4
	v_mul_f32_e32 v8, v7, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v9, -v3, v8, v7
	v_fmac_f32_e32 v8, v9, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f32 v7, -v3, v8, v7
	v_ashrrev_i32_e32 v3, 31, v2
	v_div_fmas_f32 v5, v7, v5, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	v_div_fixup_f32 v4, v5, v6, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v2, vcc_lo, s6, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_cmpx_lt_f32_e32 0, v4
	s_cbranch_execz .LBB0_28
; %bb.27:
	v_mov_b32_e32 v7, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_mov_b32_e32 v8, v7
	v_mov_b32_e32 v9, v7
	global_store_b96 v[2:3], v[7:9], off
.LBB0_28:
	s_or_b32 exec_lo, exec_lo, s0
	v_mul_f32_e32 v5, v14, v13
	v_mul_f32_e32 v7, v17, v15
	v_mul_f32_e32 v8, v17, v13
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_fma_f32 v9, v16, v15, -v5
	v_mul_f32_e32 v15, v14, v15
	v_fma_f32 v13, v18, v13, -v7
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	v_fma_f32 v8, v16, v12, -v8
	v_fma_f32 v5, -v17, v12, v5
	v_mul_f32_e32 v9, v18, v9
	v_fma_f32 v7, -v14, v12, v7
	v_mul_f32_e32 v13, v18, v13
	v_fma_f32 v8, v11, v8, -v9
	v_fma_f32 v9, v18, v12, -v15
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f32 v11, v11, v5, -v13
	v_fmac_f32_e32 v8, v14, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v11, v14, v9
	v_div_scale_f32 v5, null, v6, v6, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_scale_f32 v7, null, v6, v6, v11
	v_rcp_f32_e32 v9, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_rcp_f32_e32 v12, v7
	s_waitcnt_depctr 0xfff
	v_fma_f32 v13, -v5, v9, 1.0
	v_fma_f32 v14, -v7, v12, 1.0
	v_fmac_f32_e32 v9, v13, v9
	v_div_scale_f32 v15, vcc_lo, v8, v6, v8
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v12, v14, v12
	v_div_scale_f32 v13, s0, v11, v6, v11
	v_mul_f32_e32 v14, v15, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v16, v13, v12
	v_fma_f32 v17, -v5, v14, v15
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v18, -v7, v16, v13
	v_fmac_f32_e32 v14, v17, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v5, -v5, v14, v15
	v_div_fmas_f32 v5, v5, v9, v14
	v_add_f32_e32 v9, v4, v4
	s_mov_b32 vcc_lo, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_div_fixup_f32 v5, v5, v6, v8
	v_fmac_f32_e32 v16, v18, v12
	v_mul_f32_e32 v8, -4.0, v4
	v_fma_f32 v7, -v7, v16, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v7, v7, v12, v16
	s_and_b32 vcc_lo, exec_lo, s1
	v_div_fixup_f32 v6, v7, v6, v11
	v_mul_f32_e32 v7, v5, v5
	s_cbranch_vccz .LBB0_30
; %bb.29:
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_scale_f32 v11, null, v8, v8, v7
	v_rcp_f32_e32 v12, v11
	s_waitcnt_depctr 0xfff
	v_fma_f32 v13, -v11, v12, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v12, v13, v12
	v_div_scale_f32 v13, vcc_lo, v7, v8, v7
	v_mul_f32_e32 v14, v13, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v15, -v11, v14, v13
	v_fmac_f32_e32 v14, v15, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v11, -v11, v14, v13
	v_div_fmas_f32 v11, v11, v12, v14
	v_mov_b32_e32 v12, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f32 v11, v11, v8, v7
	v_add_f32_e32 v11, v6, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v11, 0x3fb8aa3b, v11
	v_exp_f32_e32 v11, v11
	global_store_b32 v[2:3], v11, off
	global_load_b32 v11, v12, s[8:9]
	v_div_scale_f32 v12, null, v10, v10, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v13, v12
	s_waitcnt_depctr 0xfff
	v_fma_f32 v14, -v12, v13, 1.0
	v_fmac_f32_e32 v13, v14, v13
	v_div_scale_f32 v14, vcc_lo, v5, v10, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v15, v14, v13
	v_fma_f32 v16, -v12, v15, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v15, v16, v13
	v_fma_f32 v12, -v12, v15, v14
	v_div_scale_f32 v14, null, v9, v9, -1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_fmas_f32 v12, v12, v13, v15
	v_rcp_f32_e32 v16, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f32 v12, v12, v10, v5
	v_div_scale_f32 v13, null, v9, v9, v12
	s_waitcnt_depctr 0xfff
	v_fma_f32 v18, -v14, v16, 1.0
	v_rcp_f32_e32 v15, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v16, v18, v16
	v_div_scale_f32 v18, s0, -1.0, v9, -1.0
	v_mul_f32_e32 v20, v18, v16
	s_waitcnt_depctr 0xfff
	v_fma_f32 v17, -v13, v15, 1.0
	v_fma_f32 v22, -v14, v20, v18
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v15, v17, v15
	v_div_scale_f32 v17, vcc_lo, v12, v9, v12
	v_dual_fmac_f32 v20, v22, v16 :: v_dual_mul_f32 v19, v17, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v14, -v14, v20, v18
	v_fma_f32 v21, -v13, v19, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v19, v21, v15
	v_fma_f32 v13, -v13, v19, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_div_fmas_f32 v13, v13, v15, v19
	s_mov_b32 vcc_lo, s0
	v_div_fmas_f32 v14, v14, v16, v20
	v_div_fixup_f32 v12, v13, v9, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f32 v14, v14, v9, -1.0
	v_mul_f32_e32 v15, 0x4f800000, v14
	v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v14
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v14, v14, v15, vcc_lo
	v_sqrt_f32_e32 v15, v14
	s_waitcnt_depctr 0xfff
	v_add_nc_u32_e32 v16, -1, v15
	v_add_nc_u32_e32 v17, 1, v15
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v18, -v16, v15, v14
	v_fma_f32 v19, -v17, v15, v14
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ge_f32_e64 s0, 0, v18
	v_cndmask_b32_e64 v15, v15, v16, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_lt_f32_e64 s0, 0, v19
	v_cndmask_b32_e64 v15, v15, v17, s0
	s_mov_b32 s0, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v16, 0x37800000, v15
	v_cndmask_b32_e32 v15, v15, v16, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v14, 0x260
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v14, v15, v14, vcc_lo
	v_div_scale_f32 v15, null, v10, v10, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v16, v15
	s_waitcnt_depctr 0xfff
	v_fma_f32 v17, -v15, v16, 1.0
	v_fmac_f32_e32 v16, v17, v16
	v_div_scale_f32 v17, vcc_lo, v14, v10, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v18, v17, v16
	v_fma_f32 v19, -v15, v18, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v18, v19, v16
	v_fma_f32 v15, -v15, v18, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_div_fmas_f32 v13, v15, v16, v18
	s_waitcnt vmcnt(0)
	v_sub_f32_e32 v12, v11, v12
	v_div_fixup_f32 v11, v13, v10, v14
	global_store_b32 v[2:3], v12, off offset:4
	s_branch .LBB0_31
.LBB0_30:
	s_mov_b32 s0, -1
                                        ; implicit-def: $vgpr11
.LBB0_31:                               ; %Flow303
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccnz .LBB0_33
; %bb.32:
	global_load_b32 v11, v[0:1], off
	s_waitcnt vmcnt(0)
	v_mul_f32_e32 v11, v4, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_scale_f32 v12, null, v10, v10, v11
	v_rcp_f32_e32 v13, v12
	s_waitcnt_depctr 0xfff
	v_fma_f32 v14, -v12, v13, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v13, v14, v13
	v_div_scale_f32 v14, vcc_lo, v11, v10, v11
	v_mul_f32_e32 v15, v14, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v16, -v12, v15, v14
	v_fmac_f32_e32 v15, v16, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v12, -v12, v15, v14
	v_div_fmas_f32 v12, v12, v13, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_div_fixup_f32 v11, v12, v10, v11
	v_mov_b32_e32 v12, 0
	global_store_b32 v[2:3], v11, off
	global_load_b32 v11, v12, s[8:9]
	v_div_scale_f32 v12, null, v10, v10, v5
	v_rcp_f32_e32 v13, v12
	s_waitcnt_depctr 0xfff
	v_fma_f32 v14, -v12, v13, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v13, v14, v13
	v_div_scale_f32 v14, vcc_lo, v5, v10, v5
	v_mul_f32_e32 v15, v14, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v16, -v12, v15, v14
	v_fmac_f32_e32 v15, v16, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v12, -v12, v15, v14
	v_div_fmas_f32 v12, v12, v13, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f32 v10, v12, v10, v5
	v_div_scale_f32 v12, null, v9, v9, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v13, v12
	s_waitcnt_depctr 0xfff
	v_fma_f32 v14, -v12, v13, 1.0
	v_fmac_f32_e32 v13, v14, v13
	v_div_scale_f32 v14, vcc_lo, v10, v9, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v15, v14, v13
	v_fma_f32 v16, -v12, v15, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v15, v16, v13
	v_fma_f32 v12, -v12, v15, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v12, v12, v13, v15
	v_div_fixup_f32 v9, v12, v9, v10
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v9, v11, v9
	global_store_b32 v[2:3], v9, off offset:4
	global_load_b32 v0, v[0:1], off
	v_div_scale_f32 v1, null, v8, v8, v7
	v_rcp_f32_e32 v9, v1
	s_waitcnt_depctr 0xfff
	v_fma_f32 v10, -v1, v9, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v9, v10, v9
	v_div_scale_f32 v10, vcc_lo, v7, v8, v7
	v_mul_f32_e32 v11, v10, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v12, -v1, v11, v10
	v_fmac_f32_e32 v11, v12, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v1, -v1, v11, v10
	v_div_fmas_f32 v1, v1, v9, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f32 v1, v1, v8, v7
	v_add_f32_e32 v1, v6, v1
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f32_e32 v11, v1, v0
.LBB0_33:
	v_cmp_nlg_f32_e64 s0, 0x7f800000, |v4|
	v_cmp_nlg_f32_e64 s1, 0x7f800000, |v5|
	v_cmp_nlg_f32_e64 s2, 0x7f800000, |v6|
	global_store_b32 v[2:3], v11, off offset:8
	s_or_b32 s0, s0, s1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s0, s0, s2
	s_and_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB0_35
; %bb.34:
	v_mov_b32_e32 v4, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_mov_b32_e32 v5, v4
	v_mov_b32_e32 v6, v4
	global_store_b96 v[2:3], v[4:6], off
.LBB0_35:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z3regPfS_S_fb
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 28
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z3regPfS_S_fb, .Lfunc_end0-_Z3regPfS_S_fb
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 3392
; NumSgprs: 18
; NumVgprs: 28
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 3
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 28
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z9findPeaksPfS_S_      ; -- Begin function _Z9findPeaksPfS_S_
	.globl	_Z9findPeaksPfS_S_
	.p2align	8
	.type	_Z9findPeaksPfS_S_,@function
_Z9findPeaksPfS_S_:                     ; @_Z9findPeaksPfS_S_
; %bb.0:
	s_load_b32 s4, s[0:1], 0x24
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, numPoints@rel32@lo+4
	s_addc_u32 s3, s3, numPoints@rel32@hi+12
	s_load_b32 s2, s[2:3], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s3, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s3, v[0:1]
	v_cmp_gt_i32_e32 vcc_lo, s2, v1
	s_and_saveexec_b32 s2, vcc_lo
	s_cbranch_execz .LBB1_6
; %bb.1:
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, numFreqs@rel32@lo+4
	s_addc_u32 s3, s3, numFreqs@rel32@hi+12
	v_mov_b32_e32 v2, 0
	s_load_b32 s8, s[2:3], 0x0
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[2:3], s[0:1], 0x10
	v_mov_b32_e32 v3, 0
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s8, 2
	s_cbranch_scc1 .LBB1_5
; %bb.2:                                ; %.lr.ph.preheader.i
	v_mul_lo_u32 v2, s8, v1
	s_mov_b32 s1, 1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, v2, s4
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v3, vcc_lo
	v_mov_b32_e32 v2, 0
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_u32 v3, vcc_lo, v4, 4
	global_load_b32 v0, v[4:5], off
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v5, vcc_lo
.LBB1_3:                                ; %.lr.ph.i
                                        ; =>This Inner Loop Header: Depth=1
	global_load_b32 v5, v[3:4], off
	v_add_co_u32 v3, vcc_lo, v3, 4
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
	s_waitcnt vmcnt(0)
	v_cmp_gt_f32_e64 s0, v5, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_cndmask_b32_e64 v0, v0, v5, s0
	v_cndmask_b32_e64 v2, v2, s1, s0
	s_add_i32 s1, s1, 1
	s_cmp_lg_u32 s8, s1
	s_cbranch_scc1 .LBB1_3
; %bb.4:                                ; %_Z6argmaxPf.exit.loopexit
	s_delay_alu instid0(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
.LBB1_5:                                ; %_Z6argmaxPf.exit
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	v_add_co_u32 v2, vcc_lo, s2, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
	global_load_b32 v3, v[2:3], off
	v_ashrrev_i32_e32 v2, 31, v1
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[0:1], v3, off
.LBB1_6:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9findPeaksPfS_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z9findPeaksPfS_S_, .Lfunc_end1-_Z9findPeaksPfS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 372
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z10countPeaksPfPiS_    ; -- Begin function _Z10countPeaksPfPiS_
	.globl	_Z10countPeaksPfPiS_
	.p2align	8
	.type	_Z10countPeaksPfPiS_,@function
_Z10countPeaksPfPiS_:                   ; @_Z10countPeaksPfPiS_
; %bb.0:
	s_load_b32 s4, s[0:1], 0x24
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, numPoints@rel32@lo+4
	s_addc_u32 s3, s3, numPoints@rel32@hi+12
	s_load_b32 s2, s[2:3], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s3, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s3, v[0:1]
	v_cmp_gt_i32_e32 vcc_lo, s2, v1
	s_and_saveexec_b32 s2, vcc_lo
	s_cbranch_execz .LBB2_13
; %bb.1:
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, numFreqs@rel32@lo+4
	s_addc_u32 s3, s3, numFreqs@rel32@hi+12
	v_mov_b32_e32 v0, 0
	s_load_b32 s4, s[2:3], 0x0
	s_load_b128 s[0:3], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s4, 3
	s_cbranch_scc1 .LBB2_12
; %bb.2:                                ; %.lr.ph.preheader.i
	v_mul_lo_u32 v2, s4, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v2, s0
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
	s_mov_b32 s0, 2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v0, 4
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	v_mov_b32_e32 v0, 0
.LBB2_3:                                ; %.lr.ph.i
                                        ; =>This Inner Loop Header: Depth=1
	global_load_b64 v[4:5], v[2:3], off offset:-4
	s_mov_b32 s5, -1
	s_mov_b32 s1, exec_lo
	s_waitcnt vmcnt(0)
	v_cmpx_ngt_f32_e32 v5, v4
	s_cbranch_execz .LBB2_7
; %bb.4:                                ;   in Loop: Header=BB2_3 Depth=1
	s_add_i32 s5, s0, -1
	v_cmp_eq_f32_e32 vcc_lo, v5, v4
	s_cmp_gt_u32 s5, 1
	s_cselect_b32 s5, -1, 0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s7, s5, vcc_lo
	s_mov_b32 s5, 0
	s_and_saveexec_b32 s6, s7
	s_cbranch_execz .LBB2_6
; %bb.5:                                ;   in Loop: Header=BB2_3 Depth=1
	global_load_b32 v4, v[2:3], off offset:-8
	s_waitcnt vmcnt(0)
	v_cmp_gt_f32_e32 vcc_lo, v5, v4
	s_and_b32 s5, vcc_lo, exec_lo
.LBB2_6:                                ; %Flow21
                                        ;   in Loop: Header=BB2_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_not1_b32 s5, s5, exec_lo
.LBB2_7:                                ; %Flow20
                                        ;   in Loop: Header=BB2_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_and_saveexec_b32 s1, s5
	s_cbranch_execz .LBB2_11
; %bb.8:                                ;   in Loop: Header=BB2_3 Depth=1
	global_load_b32 v4, v[2:3], off offset:4
	s_mov_b32 s5, exec_lo
	s_waitcnt vmcnt(0)
	v_cmpx_gt_f32_e32 v5, v4
; %bb.9:                                ;   in Loop: Header=BB2_3 Depth=1
	v_add_nc_u32_e32 v0, 1, v0
; %bb.10:                               ; %Flow
                                        ;   in Loop: Header=BB2_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
.LBB2_11:                               ;   in Loop: Header=BB2_3 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_add_co_u32 v2, vcc_lo, v2, 4
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	s_add_i32 s0, s0, 1
	s_cmp_lg_u32 s4, s0
	s_cbranch_scc1 .LBB2_3
.LBB2_12:                               ; %_Z11dCountPeaksPfS_.exit
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, vcc_lo, s2, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, s3, v2, vcc_lo
	global_store_b32 v[1:2], v0, off
.LBB2_13:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10countPeaksPfPiS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z10countPeaksPfPiS_, .Lfunc_end2-_Z10countPeaksPfPiS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 408
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z11integrateLRPfS_S_S_fb ; -- Begin function _Z11integrateLRPfS_S_S_fb
	.globl	_Z11integrateLRPfS_S_S_fb
	.p2align	8
	.type	_Z11integrateLRPfS_S_S_fb,@function
_Z11integrateLRPfS_S_S_fb:              ; @_Z11integrateLRPfS_S_S_fb
; %bb.0:
	s_load_b32 s4, s[0:1], 0x34
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, numPoints@rel32@lo+4
	s_addc_u32 s3, s3, numPoints@rel32@hi+12
	s_load_b32 s2, s[2:3], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s3, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, s15, s3, v[0:1]
	v_cmp_gt_i32_e32 vcc_lo, s2, v2
	s_and_saveexec_b32 s2, vcc_lo
	s_cbranch_execz .LBB3_49
; %bb.1:
	s_load_b256 s[4:11], s[0:1], 0x0
	v_ashrrev_i32_e32 v3, 31, v2
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, numFreqs@rel32@lo+4
	s_addc_u32 s3, s3, numFreqs@rel32@hi+12
	s_mov_b32 s13, 0
	s_load_b32 s12, s[2:3], 0x0
	s_mov_b64 s[2:3], -1
	v_lshlrev_b64 v[0:1], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, s8, v0
	v_add_co_ci_u32_e32 v4, vcc_lo, s9, v1, vcc_lo
	v_mul_lo_u32 v2, s12, v2
	s_mov_b64 s[8:9], s[10:11]
	global_load_b32 v16, v[3:4], off
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	v_add_co_u32 v4, vcc_lo, v2, s4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v3, vcc_lo
	v_add_co_u32 v4, vcc_lo, v4, -4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, -1, v5, vcc_lo
.LBB3_2:                                ; =>This Inner Loop Header: Depth=1
	s_load_b32 s14, s[8:9], 0x0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, v4, 4
	v_add_co_ci_u32_e32 v5, vcc_lo, 0, v5, vcc_lo
	s_add_u32 s2, s2, 1
	s_addc_u32 s3, s3, 0
	s_add_u32 s8, s8, 4
	v_dual_mov_b32 v9, s3 :: v_dual_mov_b32 v8, s2
	s_addc_u32 s9, s9, 0
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_nlt_f32_e32 vcc_lo, s14, v16
	s_or_b32 s13, vcc_lo, s13
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s13
	s_cbranch_execnz .LBB3_2
; %bb.3:
	s_or_b32 exec_lo, exec_lo, s13
	v_lshlrev_b64 v[6:7], 2, v[8:9]
	v_add_co_u32 v2, vcc_lo, s4, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_load_b64 s[0:1], s[0:1], 0x20
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v2, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, v3, v7, vcc_lo
	s_mov_b32 s4, 0
	global_load_b32 v6, v[6:7], off
	s_waitcnt lgkmcnt(0)
	s_bitcmp0_b32 s1, 0
	s_waitcnt vmcnt(0)
	v_mul_f32_e32 v17, s0, v6
	s_cbranch_scc0 .LBB3_25
; %bb.4:                                ; %.preheader66
	v_mov_b32_e32 v19, 0x7f800000
	s_mov_b32 s1, exec_lo
	v_cmpx_gt_i32_e64 s12, v8
	s_cbranch_execz .LBB3_12
; %bb.5:                                ; %.lr.ph.preheader
	v_dual_mov_b32 v7, v5 :: v_dual_mov_b32 v6, v4
	v_dual_mov_b32 v13, v9 :: v_dual_mov_b32 v12, v8
	s_mov_b32 s3, 0
                                        ; implicit-def: $sgpr2
                                        ; implicit-def: $sgpr5
                                        ; implicit-def: $sgpr4
.LBB3_6:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	global_load_b32 v14, v[6:7], off
	v_dual_mov_b32 v10, v12 :: v_dual_mov_b32 v11, v13
	s_or_b32 s4, s4, exec_lo
	s_or_b32 s5, s5, exec_lo
	s_mov_b32 s8, exec_lo
                                        ; implicit-def: $vgpr12_vgpr13
                                        ; implicit-def: $sgpr0
	s_waitcnt vmcnt(0)
	v_cmpx_gt_f32_e32 v14, v17
; %bb.7:                                ;   in Loop: Header=BB3_6 Depth=1
	v_add_co_u32 v12, vcc_lo, v10, 1
	v_add_co_ci_u32_e32 v13, vcc_lo, 0, v11, vcc_lo
	v_add_co_u32 v6, s0, v6, 4
	s_delay_alu instid0(VALU_DEP_3)
	v_cmp_le_i32_e32 vcc_lo, s12, v12
	v_add_co_ci_u32_e64 v7, s0, 0, v7, s0
	s_and_not1_b32 s5, s5, exec_lo
	s_mov_b32 s0, 0x7f800000
	s_and_b32 s9, vcc_lo, exec_lo
	s_and_not1_b32 s4, s4, exec_lo
	s_or_b32 s5, s5, s9
; %bb.8:                                ; %Flow273
                                        ;   in Loop: Header=BB3_6 Depth=1
	s_or_b32 exec_lo, exec_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
	s_and_b32 s8, exec_lo, s5
	v_mov_b32_e32 v19, s0
	s_or_b32 s3, s8, s3
	s_and_not1_b32 s0, s2, exec_lo
	s_and_b32 s2, s4, exec_lo
	s_or_b32 s2, s0, s2
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB3_6
; %bb.9:                                ; %loop.exit.guard
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s0, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s0, exec_lo, s0
	s_cbranch_execz .LBB3_11
; %bb.10:                               ; %.critedge2
	v_lshlrev_b64 v[6:7], 2, v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, s10, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, s11, v7, vcc_lo
	global_load_b32 v19, v[6:7], off
.LBB3_11:                               ; %Flow271
	s_or_b32 exec_lo, exec_lo, s0
.LBB3_12:                               ; %Flow274
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_dual_mov_b32 v13, v3 :: v_dual_mov_b32 v12, v2
	s_add_u32 s2, s10, -4
	s_addc_u32 s3, s11, -1
	s_mov_b64 s[0:1], 0
	s_mov_b32 s4, 0
.LBB3_13:                               ; =>This Inner Loop Header: Depth=1
	s_load_b32 s5, s[2:3], 0x4
	v_add_co_u32 v12, vcc_lo, v12, 4
	s_add_u32 s2, s2, 4
	v_add_co_ci_u32_e32 v13, vcc_lo, 0, v13, vcc_lo
	s_addc_u32 s3, s3, 0
	s_cmp_ge_i32 s0, s12
	v_dual_mov_b32 v15, s3 :: v_dual_mov_b32 v14, s2
	s_cselect_b32 s8, -1, 0
	s_waitcnt lgkmcnt(0)
	v_cmp_nlt_f32_e32 vcc_lo, s5, v16
	v_mov_b32_e32 v22, s5
	s_or_b32 s5, vcc_lo, s8
	s_add_u32 s0, s0, 1
	s_addc_u32 s1, s1, 0
	s_and_b32 s5, exec_lo, s5
	v_dual_mov_b32 v7, s1 :: v_dual_mov_b32 v6, s0
	s_or_b32 s4, s5, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s4
	s_cbranch_execnz .LBB3_13
; %bb.14:
	s_or_b32 exec_lo, exec_lo, s4
	v_add_nc_u32_e32 v10, -1, v6
	v_mov_b32_e32 v18, 0
	s_mov_b32 s2, 0
	s_mov_b32 s4, 0
	s_mov_b32 s3, exec_lo
                                        ; implicit-def: $vgpr20
                                        ; implicit-def: $vgpr21
	v_cmpx_ne_u32_e64 s12, v10
	s_cbranch_execz .LBB3_24
; %bb.15:
	v_dual_mov_b32 v7, 0 :: v_dual_mov_b32 v18, 0
	s_mov_b32 s0, exec_lo
	v_cmpx_ne_u32_e32 0, v10
	s_cbranch_execz .LBB3_17
; %bb.16:
	v_ashrrev_i32_e32 v11, 31, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[20:21], 2, v[10:11]
	v_add_co_u32 v23, vcc_lo, s10, v20
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v24, vcc_lo, s11, v21, vcc_lo
	v_add_co_u32 v20, vcc_lo, v2, v20
	v_add_co_ci_u32_e32 v21, vcc_lo, v3, v21, vcc_lo
	global_load_b32 v11, v[23:24], off offset:-4
	global_load_b64 v[20:21], v[20:21], off offset:-4
	s_waitcnt vmcnt(1)
	v_sub_f32_e32 v18, v16, v11
	v_sub_f32_e32 v11, v22, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_scale_f32 v23, null, v11, v11, v18
	v_rcp_f32_e32 v24, v23
	s_waitcnt_depctr 0xfff
	v_fma_f32 v25, -v23, v24, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v24, v25, v24
	v_div_scale_f32 v26, vcc_lo, v18, v11, v18
	v_mul_f32_e32 v25, v26, v24
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v27, -v23, v25, v26
	v_fmac_f32_e32 v25, v27, v24
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v23, -v23, v25, v26
	v_div_fmas_f32 v23, v23, v24, v25
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_div_fixup_f32 v11, v23, v11, v18
	s_waitcnt vmcnt(0)
	v_sub_f32_e32 v18, v21, v20
	v_fma_f32 v11, v11, v18, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v18, v22, v16 :: v_dual_add_f32 v11, v21, v11
	v_mul_f32_e32 v11, v18, v11
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f32 v18, v11, 0.5, 0
.LBB3_17:
	s_or_b32 exec_lo, exec_lo, s0
	global_load_b32 v14, v[14:15], off offset:4
	v_cmp_gt_i32_e64 s0, s12, v6
	s_waitcnt vmcnt(0)
	v_cmp_lt_f32_e32 vcc_lo, v14, v19
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, vcc_lo, s0
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB3_21
; %bb.18:                               ; %.lr.ph.i59.preheader
	v_mov_b32_e32 v7, 0
	s_add_u32 s5, s10, 4
	s_addc_u32 s9, s11, 0
	s_mov_b32 s8, 0
.LBB3_19:                               ; %.lr.ph.i59
                                        ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v6, v10
	global_load_b32 v24, v[12:13], off
	v_lshlrev_b64 v[20:21], 2, v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v10, vcc_lo, s10, v20
	v_add_co_ci_u32_e32 v11, vcc_lo, s11, v21, vcc_lo
	v_add_co_u32 v20, vcc_lo, v2, v20
	v_add_co_ci_u32_e32 v21, vcc_lo, v3, v21, vcc_lo
	global_load_b32 v15, v[10:11], off
	v_dual_mov_b32 v11, v7 :: v_dual_add_nc_u32 v10, 1, v6
	s_waitcnt vmcnt(0)
	v_sub_f32_e32 v15, v14, v15
	s_delay_alu instid0(VALU_DEP_2)
	v_lshlrev_b64 v[22:23], 2, v[10:11]
	global_load_b32 v11, v[20:21], off
	v_add_nc_u32_e32 v6, 2, v6
	v_add_co_u32 v22, vcc_lo, s5, v22
	v_add_co_ci_u32_e32 v23, vcc_lo, s9, v23, vcc_lo
	v_add_co_u32 v12, vcc_lo, v12, 4
	v_add_co_ci_u32_e32 v13, vcc_lo, 0, v13, vcc_lo
	global_load_b32 v14, v[22:23], off
	s_waitcnt vmcnt(1)
	v_add_f32_e32 v11, v24, v11
	v_cmp_le_i32_e64 s0, s12, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v11, v11, v15
	v_fmac_f32_e32 v18, 0.5, v11
	s_waitcnt vmcnt(0)
	v_cmp_nlt_f32_e64 s1, v14, v19
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s0, s1, s0
	s_and_b32 s0, exec_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s8, s0, s8
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB3_19
; %bb.20:                               ; %Flow
	s_or_b32 exec_lo, exec_lo, s8
.LBB3_21:                               ; %Flow269
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s4
	s_mov_b32 s0, 0
	s_mov_b32 s1, exec_lo
                                        ; implicit-def: $vgpr20
                                        ; implicit-def: $vgpr21
	v_cmpx_ne_u32_e64 s12, v6
	s_xor_b32 s1, exec_lo, s1
	s_cbranch_execz .LBB3_23
; %bb.22:
	v_mov_b32_e32 v11, 0
	s_mov_b32 s0, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[12:13], 2, v[10:11]
	v_add_co_u32 v12, vcc_lo, s10, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v13, vcc_lo, s11, v13, vcc_lo
	global_load_b32 v12, v[12:13], off
	s_waitcnt vmcnt(0)
	v_sub_f32_e32 v20, v19, v12
	v_sub_f32_e32 v12, v14, v12
	v_div_scale_f32 v13, null, v12, v12, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v14, v13
	s_waitcnt_depctr 0xfff
	v_fma_f32 v15, -v13, v14, 1.0
	v_fmac_f32_e32 v14, v15, v14
	v_div_scale_f32 v15, vcc_lo, v20, v12, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v19, v15, v14
	v_fma_f32 v21, -v13, v19, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v19, v21, v14
	v_fma_f32 v13, -v13, v19, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v13, v13, v14, v19
	v_div_fixup_f32 v21, v13, v12, v20
.LBB3_23:                               ; %Flow288
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s4, s0, exec_lo
.LBB3_24:                               ; %Flow287
	s_or_b32 exec_lo, exec_lo, s3
	s_branch .LBB3_26
.LBB3_25:
	s_mov_b32 s2, -1
                                        ; implicit-def: $vgpr18
                                        ; implicit-def: $vgpr20
                                        ; implicit-def: $vgpr21
                                        ; implicit-def: $vgpr10_vgpr11
                                        ; implicit-def: $vgpr6_vgpr7
.LBB3_26:                               ; %Flow286
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s2
	s_cbranch_vccz .LBB3_46
; %bb.27:                               ; %.lr.ph83.preheader
	s_mov_b32 s1, 0
                                        ; implicit-def: $sgpr2
                                        ; implicit-def: $sgpr5
                                        ; implicit-def: $sgpr3
.LBB3_28:                               ; %.lr.ph83
                                        ; =>This Inner Loop Header: Depth=1
	global_load_b32 v10, v[4:5], off
	v_dual_mov_b32 v6, v8 :: v_dual_mov_b32 v7, v9
	s_or_b32 s3, s3, exec_lo
	s_or_b32 s5, s5, exec_lo
	s_mov_b32 s8, exec_lo
                                        ; implicit-def: $vgpr8_vgpr9
                                        ; implicit-def: $sgpr0
	s_waitcnt vmcnt(0)
	v_cmpx_gt_f32_e32 v10, v17
; %bb.29:                               ;   in Loop: Header=BB3_28 Depth=1
	v_add_co_u32 v8, vcc_lo, v6, -1
	v_add_co_ci_u32_e32 v9, vcc_lo, -1, v7, vcc_lo
	v_cmp_gt_i32_e32 vcc_lo, 1, v6
	v_add_co_u32 v4, s0, v4, -4
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v5, s0, -1, v5, s0
	s_and_not1_b32 s5, s5, exec_lo
	s_and_b32 s9, vcc_lo, exec_lo
	s_mov_b32 s0, 0xff800000
	s_and_not1_b32 s3, s3, exec_lo
	s_or_b32 s5, s5, s9
; %bb.30:                               ; %Flow280
                                        ;   in Loop: Header=BB3_28 Depth=1
	s_or_b32 exec_lo, exec_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
	s_and_b32 s8, exec_lo, s5
	v_mov_b32_e32 v12, s0
	s_or_b32 s1, s8, s1
	s_and_not1_b32 s0, s2, exec_lo
	s_and_b32 s2, s3, exec_lo
	s_or_b32 s2, s0, s2
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB3_28
; %bb.31:                               ; %loop.exit.guard267
	s_or_b32 exec_lo, exec_lo, s1
	s_and_saveexec_b32 s0, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s0, exec_lo, s0
	s_cbranch_execz .LBB3_33
; %bb.32:                               ; %.critedge
	v_lshlrev_b64 v[4:5], 2, v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, s10, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s11, v5, vcc_lo
	global_load_b32 v12, v[4:5], off
.LBB3_33:                               ; %.critedge48
	s_or_b32 exec_lo, exec_lo, s0
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_add_u32 s2, s10, -4
	s_addc_u32 s3, s11, -1
	s_mov_b64 s[0:1], 0
	s_mov_b32 s5, 0
.LBB3_34:                               ; =>This Inner Loop Header: Depth=1
	s_load_b32 s8, s[2:3], 0x4
	v_add_co_u32 v4, vcc_lo, v4, 4
	s_add_u32 s2, s2, 4
	v_add_co_ci_u32_e32 v5, vcc_lo, 0, v5, vcc_lo
	s_addc_u32 s3, s3, 0
	s_cmp_ge_i32 s0, s12
	v_dual_mov_b32 v9, s3 :: v_dual_mov_b32 v8, s2
	s_cselect_b32 s9, -1, 0
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_nlt_f32_e32 vcc_lo, s8, v12
	v_mov_b32_e32 v13, s8
	s_or_b32 s8, vcc_lo, s9
	s_add_u32 s0, s0, 1
	s_addc_u32 s1, s1, 0
	s_and_b32 s8, exec_lo, s8
	v_dual_mov_b32 v7, s1 :: v_dual_mov_b32 v6, s0
	s_or_b32 s5, s8, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s5
	s_cbranch_execnz .LBB3_34
; %bb.35:
	s_or_b32 exec_lo, exec_lo, s5
	v_add_nc_u32_e32 v10, -1, v6
	v_mov_b32_e32 v18, 0
	s_mov_b32 s2, exec_lo
                                        ; implicit-def: $vgpr20
                                        ; implicit-def: $vgpr21
	s_delay_alu instid0(VALU_DEP_2)
	v_cmpx_ne_u32_e64 s12, v10
	s_cbranch_execz .LBB3_45
; %bb.36:
	v_dual_mov_b32 v7, 0 :: v_dual_mov_b32 v18, 0
	s_mov_b32 s0, exec_lo
	v_cmpx_ne_u32_e32 0, v10
	s_cbranch_execz .LBB3_38
; %bb.37:
	v_ashrrev_i32_e32 v11, 31, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[14:15], 2, v[10:11]
	v_add_co_u32 v17, vcc_lo, s10, v14
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v18, vcc_lo, s11, v15, vcc_lo
	v_add_co_u32 v14, vcc_lo, v2, v14
	v_add_co_ci_u32_e32 v15, vcc_lo, v3, v15, vcc_lo
	global_load_b32 v11, v[17:18], off offset:-4
	global_load_b64 v[14:15], v[14:15], off offset:-4
	s_waitcnt vmcnt(1)
	v_dual_sub_f32 v17, v12, v11 :: v_dual_sub_f32 v12, v13, v12
	v_sub_f32_e32 v11, v13, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_scale_f32 v18, null, v11, v11, v17
	v_div_scale_f32 v21, vcc_lo, v17, v11, v17
	v_rcp_f32_e32 v19, v18
	s_waitcnt_depctr 0xfff
	v_fma_f32 v20, -v18, v19, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v19, v20, v19
	v_mul_f32_e32 v20, v21, v19
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v22, -v18, v20, v21
	v_fmac_f32_e32 v20, v22, v19
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v18, -v18, v20, v21
	v_div_fmas_f32 v18, v18, v19, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_div_fixup_f32 v11, v18, v11, v17
	s_waitcnt vmcnt(0)
	v_sub_f32_e32 v17, v15, v14
	v_fma_f32 v11, v11, v17, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v11, v15, v11
	v_mul_f32_e32 v11, v12, v11
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f32 v18, v11, 0.5, 0
.LBB3_38:
	s_or_b32 exec_lo, exec_lo, s0
	global_load_b32 v8, v[8:9], off offset:4
	v_cmp_gt_i32_e64 s0, s12, v6
	s_waitcnt vmcnt(0)
	v_cmp_lt_f32_e32 vcc_lo, v8, v16
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, vcc_lo, s0
	s_and_saveexec_b32 s3, s0
	s_cbranch_execz .LBB3_42
; %bb.39:                               ; %.lr.ph.i.preheader
	v_mov_b32_e32 v7, 0
	s_add_u32 s5, s10, 4
	s_addc_u32 s9, s11, 0
	s_mov_b32 s8, 0
.LBB3_40:                               ; %.lr.ph.i
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v6, v10 :: v_dual_mov_b32 v11, v7
	global_load_b32 v17, v[4:5], off
	v_lshlrev_b64 v[12:13], 2, v[6:7]
	v_add_co_u32 v9, vcc_lo, s10, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v10, vcc_lo, s11, v13, vcc_lo
	global_load_b32 v9, v[9:10], off
	s_waitcnt vmcnt(0)
	v_dual_sub_f32 v9, v8, v9 :: v_dual_add_nc_u32 v10, 1, v6
	v_lshlrev_b64 v[14:15], 2, v[10:11]
	v_add_co_u32 v11, vcc_lo, v2, v12
	v_add_co_ci_u32_e32 v12, vcc_lo, v3, v13, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v13, vcc_lo, s5, v14
	v_add_co_ci_u32_e32 v14, vcc_lo, s9, v15, vcc_lo
	global_load_b32 v11, v[11:12], off
	v_add_nc_u32_e32 v6, 2, v6
	v_add_co_u32 v4, vcc_lo, v4, 4
	global_load_b32 v8, v[13:14], off
	v_add_co_ci_u32_e32 v5, vcc_lo, 0, v5, vcc_lo
	s_waitcnt vmcnt(1)
	v_add_f32_e32 v11, v17, v11
	v_cmp_le_i32_e64 s0, s12, v6
	s_waitcnt vmcnt(0)
	v_cmp_nlt_f32_e64 s1, v8, v16
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v9, v11, v9
	s_or_b32 s0, s1, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_fmac_f32_e32 v18, 0.5, v9
	s_and_b32 s0, exec_lo, s0
	s_or_b32 s8, s0, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB3_40
; %bb.41:                               ; %Flow276
	s_or_b32 exec_lo, exec_lo, s8
.LBB3_42:                               ; %Flow277
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s3
	s_mov_b32 s1, s4
	s_mov_b32 s0, exec_lo
                                        ; implicit-def: $vgpr20
                                        ; implicit-def: $vgpr21
	v_cmpx_ne_u32_e64 s12, v6
	s_cbranch_execz .LBB3_44
; %bb.43:
	v_mov_b32_e32 v11, 0
	s_or_b32 s1, s4, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 2, v[10:11]
	v_add_co_u32 v4, vcc_lo, s10, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v5, vcc_lo, s11, v5, vcc_lo
	global_load_b32 v4, v[4:5], off
	s_waitcnt vmcnt(0)
	v_sub_f32_e32 v20, v16, v4
	v_sub_f32_e32 v4, v8, v4
	v_div_scale_f32 v5, null, v4, v4, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v8, v5
	s_waitcnt_depctr 0xfff
	v_fma_f32 v9, -v5, v8, 1.0
	v_fmac_f32_e32 v8, v9, v8
	v_div_scale_f32 v9, vcc_lo, v20, v4, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v12, v9, v8
	v_fma_f32 v13, -v5, v12, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v12, v13, v8
	v_fma_f32 v5, -v5, v12, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v5, v5, v8, v12
	v_div_fixup_f32 v21, v5, v4, v20
.LBB3_44:                               ; %Flow291
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_and_not1_b32 s0, s4, exec_lo
	s_and_b32 s1, s1, exec_lo
	s_or_b32 s4, s0, s1
.LBB3_45:                               ; %Flow290
	s_or_b32 exec_lo, exec_lo, s2
.LBB3_46:                               ; %Flow289
	s_and_saveexec_b32 s0, s4
	s_cbranch_execz .LBB3_48
; %bb.47:                               ; %_Z9integratePfS_ff.exit.sink.split
	v_lshlrev_b64 v[4:5], 2, v[10:11]
	v_lshlrev_b64 v[6:7], 2, v[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v4, vcc_lo, v2, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, v3, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v2, vcc_lo, v2, v6
	v_add_co_ci_u32_e32 v3, vcc_lo, v3, v7, vcc_lo
	s_clause 0x1
	global_load_b32 v4, v[4:5], off
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(0)
	v_sub_f32_e32 v2, v2, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v2, v21, v2, v4
	v_add_f32_e32 v2, v4, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v2, v20, v2
	v_fmac_f32_e32 v18, 0.5, v2
.LBB3_48:                               ; %_Z9integratePfS_ff.exit
	s_or_b32 exec_lo, exec_lo, s0
	v_add_co_u32 v0, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	global_store_b32 v[0:1], v18, off
.LBB3_49:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11integrateLRPfS_S_S_fb
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 28
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end3:
	.size	_Z11integrateLRPfS_S_S_fb, .Lfunc_end3-_Z11integrateLRPfS_S_S_fb
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 2668
; NumSgprs: 18
; NumVgprs: 28
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 3
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 28
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z15integrateBoundsPfS_S_S_ ; -- Begin function _Z15integrateBoundsPfS_S_S_
	.globl	_Z15integrateBoundsPfS_S_S_
	.p2align	8
	.type	_Z15integrateBoundsPfS_S_S_,@function
_Z15integrateBoundsPfS_S_S_:            ; @_Z15integrateBoundsPfS_S_S_
; %bb.0:
	s_load_b32 s4, s[0:1], 0x2c
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, numPoints@rel32@lo+4
	s_addc_u32 s3, s3, numPoints@rel32@hi+12
	s_load_b32 s8, s[2:3], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s8, v2
	s_cbranch_execz .LBB4_14
; %bb.1:
	s_load_b256 s[0:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v3, 31, v2
	s_ashr_i32 s9, s8, 31
	s_mov_b32 s11, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v3, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v1, vcc_lo
	s_lshl_b64 s[4:5], s[8:9], 2
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_add_co_u32 v5, vcc_lo, v3, s4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v6, vcc_lo, s5, v4, vcc_lo
	s_getpc_b64 s[4:5]
	s_add_u32 s4, s4, numFreqs@rel32@lo+4
	s_addc_u32 s5, s5, numFreqs@rel32@hi+12
	s_clause 0x1
	global_load_b32 v14, v[3:4], off
	global_load_b32 v12, v[5:6], off
	s_load_b32 s10, s[4:5], 0x0
	s_add_u32 s8, s6, -4
	s_addc_u32 s9, s7, -1
	s_mov_b64 s[4:5], 0
	s_waitcnt lgkmcnt(0)
	v_mul_lo_u32 v2, s10, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[10:11], 2, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, s0, v10
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v11, vcc_lo
.LBB4_2:                                ; =>This Inner Loop Header: Depth=1
	s_load_b32 s12, s[8:9], 0x4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, v4, 4
	s_add_u32 s8, s8, 4
	v_add_co_ci_u32_e32 v5, vcc_lo, 0, v5, vcc_lo
	s_addc_u32 s9, s9, 0
	s_cmp_ge_i32 s4, s10
	v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
	s_cselect_b32 s13, -1, 0
	s_waitcnt vmcnt(1) lgkmcnt(0)
	v_cmp_nlt_f32_e32 vcc_lo, s12, v14
	v_mov_b32_e32 v15, s12
	s_or_b32 s12, vcc_lo, s13
	s_add_u32 s4, s4, 1
	s_addc_u32 s5, s5, 0
	v_mov_b32_e32 v2, s4
	s_and_b32 s12, exec_lo, s12
	v_mov_b32_e32 v3, s5
	s_or_b32 s11, s12, s11
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s11
	s_cbranch_execnz .LBB4_2
; %bb.3:
	s_or_b32 exec_lo, exec_lo, s11
	v_dual_mov_b32 v13, 0 :: v_dual_add_nc_u32 v6, -1, v2
	s_mov_b32 s4, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_ne_u32_e64 s10, v6
	s_cbranch_execz .LBB4_13
; %bb.4:
	v_add_co_u32 v10, vcc_lo, s0, v10
	v_add_co_ci_u32_e32 v11, vcc_lo, s1, v11, vcc_lo
	v_mov_b32_e32 v3, 0
	v_mov_b32_e32 v13, 0
	s_mov_b32 s0, exec_lo
	v_cmpx_ne_u32_e32 0, v6
	s_cbranch_execz .LBB4_6
; %bb.5:
	v_ashrrev_i32_e32 v7, 31, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[16:17], 2, v[6:7]
	v_add_co_u32 v18, vcc_lo, s6, v16
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v19, vcc_lo, s7, v17, vcc_lo
	v_add_co_u32 v16, vcc_lo, v10, v16
	v_add_co_ci_u32_e32 v17, vcc_lo, v11, v17, vcc_lo
	global_load_b32 v7, v[18:19], off offset:-4
	global_load_b64 v[16:17], v[16:17], off offset:-4
	s_waitcnt vmcnt(1)
	v_sub_f32_e32 v13, v14, v7
	v_sub_f32_e32 v7, v15, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_scale_f32 v18, null, v7, v7, v13
	v_div_scale_f32 v21, vcc_lo, v13, v7, v13
	v_rcp_f32_e32 v19, v18
	s_waitcnt_depctr 0xfff
	v_fma_f32 v20, -v18, v19, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v19, v20, v19
	v_mul_f32_e32 v20, v21, v19
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v22, -v18, v20, v21
	v_fmac_f32_e32 v20, v22, v19
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v18, -v18, v20, v21
	v_div_fmas_f32 v18, v18, v19, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_div_fixup_f32 v7, v18, v7, v13
	s_waitcnt vmcnt(0)
	v_sub_f32_e32 v13, v17, v16
	v_fma_f32 v7, v7, v13, v16
	v_sub_f32_e32 v13, v15, v14
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v7, v17, v7
	v_mul_f32_e32 v7, v13, v7
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f32 v13, v7, 0.5, 0
.LBB4_6:
	s_or_b32 exec_lo, exec_lo, s0
	global_load_b32 v8, v[8:9], off offset:4
	v_cmp_gt_i32_e64 s0, s10, v2
	s_waitcnt vmcnt(0)
	v_cmp_lt_f32_e32 vcc_lo, v8, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, vcc_lo, s0
	s_and_saveexec_b32 s5, s0
	s_cbranch_execz .LBB4_10
; %bb.7:                                ; %.lr.ph.i.preheader
	v_mov_b32_e32 v3, 0
	s_add_u32 s8, s6, 4
	s_addc_u32 s11, s7, 0
	s_mov_b32 s9, 0
.LBB4_8:                                ; %.lr.ph.i
                                        ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, v6
	global_load_b32 v18, v[4:5], off
	v_lshlrev_b64 v[14:15], 2, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, s6, v14
	v_add_co_ci_u32_e32 v7, vcc_lo, s7, v15, vcc_lo
	v_add_co_u32 v14, vcc_lo, v10, v14
	v_add_co_ci_u32_e32 v15, vcc_lo, v11, v15, vcc_lo
	global_load_b32 v9, v[6:7], off
	v_dual_mov_b32 v7, v3 :: v_dual_add_nc_u32 v6, 1, v2
	s_waitcnt vmcnt(0)
	v_sub_f32_e32 v9, v8, v9
	s_delay_alu instid0(VALU_DEP_2)
	v_lshlrev_b64 v[16:17], 2, v[6:7]
	global_load_b32 v7, v[14:15], off
	v_add_nc_u32_e32 v2, 2, v2
	v_add_co_u32 v16, vcc_lo, s8, v16
	v_add_co_ci_u32_e32 v17, vcc_lo, s11, v17, vcc_lo
	v_add_co_u32 v4, vcc_lo, v4, 4
	v_add_co_ci_u32_e32 v5, vcc_lo, 0, v5, vcc_lo
	global_load_b32 v8, v[16:17], off
	s_waitcnt vmcnt(1)
	v_add_f32_e32 v7, v18, v7
	v_cmp_le_i32_e64 s0, s10, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v7, v7, v9
	v_fmac_f32_e32 v13, 0.5, v7
	s_waitcnt vmcnt(0)
	v_cmp_nlt_f32_e64 s1, v8, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s0, s1, s0
	s_and_b32 s0, exec_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s9, s0, s9
	s_and_not1_b32 exec_lo, exec_lo, s9
	s_cbranch_execnz .LBB4_8
; %bb.9:                                ; %Flow82
	s_or_b32 exec_lo, exec_lo, s9
.LBB4_10:                               ; %Flow83
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s5
	s_mov_b32 s0, exec_lo
	v_cmpx_ne_u32_e64 s10, v2
	s_cbranch_execz .LBB4_12
; %bb.11:
	v_mov_b32_e32 v7, 0
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 2, v[6:7]
	v_add_co_u32 v6, vcc_lo, s6, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v7, vcc_lo, s7, v5, vcc_lo
	v_add_co_u32 v4, vcc_lo, v10, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, v11, v5, vcc_lo
	global_load_b32 v6, v[6:7], off
	v_add_co_u32 v2, vcc_lo, v10, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, v11, v3, vcc_lo
	s_clause 0x1
	global_load_b32 v4, v[4:5], off
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(2)
	v_sub_f32_e32 v3, v12, v6
	v_sub_f32_e32 v5, v8, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_div_scale_f32 v6, null, v5, v5, v3
	v_div_scale_f32 v9, vcc_lo, v3, v5, v3
	s_waitcnt vmcnt(0)
	v_sub_f32_e32 v2, v2, v4
	v_rcp_f32_e32 v7, v6
	s_waitcnt_depctr 0xfff
	v_fma_f32 v8, -v6, v7, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v7, v8, v7
	v_mul_f32_e32 v8, v9, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v10, -v6, v8, v9
	v_fmac_f32_e32 v8, v10, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v6, -v6, v8, v9
	v_div_fmas_f32 v6, v6, v7, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f32 v5, v6, v5, v3
	v_fma_f32 v2, v5, v2, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v2, v4, v2
	v_mul_f32_e32 v2, v3, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_fmac_f32_e32 v13, 0.5, v2
.LBB4_12:                               ; %Flow
	s_or_b32 exec_lo, exec_lo, s0
.LBB4_13:                               ; %Flow85
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s4
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	global_store_b32 v[0:1], v13, off
.LBB4_14:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z15integrateBoundsPfS_S_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 23
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end4:
	.size	_Z15integrateBoundsPfS_S_S_, .Lfunc_end4-_Z15integrateBoundsPfS_S_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1196
; NumSgprs: 18
; NumVgprs: 23
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 23
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z4fwhmPfS_S_           ; -- Begin function _Z4fwhmPfS_S_
	.globl	_Z4fwhmPfS_S_
	.p2align	8
	.type	_Z4fwhmPfS_S_,@function
_Z4fwhmPfS_S_:                          ; @_Z4fwhmPfS_S_
; %bb.0:
	s_load_b32 s4, s[0:1], 0x24
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, numPoints@rel32@lo+4
	s_addc_u32 s3, s3, numPoints@rel32@hi+12
	s_load_b32 s2, s[2:3], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s3, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s3, v[0:1]
	v_cmp_gt_i32_e32 vcc_lo, s2, v1
	s_and_saveexec_b32 s2, vcc_lo
	s_cbranch_execz .LBB5_9
; %bb.1:
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, numFreqs@rel32@lo+4
	s_addc_u32 s3, s3, numFreqs@rel32@hi+12
	s_load_b32 s8, s[2:3], 0x0
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[2:3], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	v_mul_lo_u32 v2, s8, v1
	s_cmp_lt_i32 s8, 2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[4:5], 2, v[2:3]
	v_mov_b32_e32 v2, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, s4, v4
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v5, vcc_lo
	s_cbranch_scc1 .LBB5_4
; %bb.2:                                ; %.lr.ph.preheader.i
	global_load_b32 v0, v[6:7], off
	v_add_co_u32 v2, vcc_lo, v4, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v5, vcc_lo
	s_mov_b32 s1, 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, v2, 4
	v_add_co_ci_u32_e32 v9, vcc_lo, 0, v3, vcc_lo
	v_mov_b32_e32 v2, 0
.LBB5_3:                                ; %.lr.ph.i
                                        ; =>This Inner Loop Header: Depth=1
	global_load_b32 v3, v[8:9], off
	v_add_co_u32 v8, vcc_lo, v8, 4
	v_add_co_ci_u32_e32 v9, vcc_lo, 0, v9, vcc_lo
	s_waitcnt vmcnt(0)
	v_cmp_gt_f32_e64 s0, v3, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_cndmask_b32_e64 v0, v0, v3, s0
	v_cndmask_b32_e64 v2, v2, s1, s0
	s_add_i32 s1, s1, 1
	s_cmp_lg_u32 s8, s1
	s_cbranch_scc1 .LBB5_3
.LBB5_4:                                ; %_Z6argmaxPf.exit
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[8:9], 2, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v6, v8
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v9, vcc_lo
	v_add_co_u32 v4, vcc_lo, v8, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, v9, v5, vcc_lo
	global_load_b32 v0, v[6:7], off
	v_add_co_u32 v12, vcc_lo, v4, s4
	v_add_co_ci_u32_e32 v13, vcc_lo, s5, v5, vcc_lo
	s_mov_b32 s4, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v12, -4
	v_add_co_ci_u32_e32 v7, vcc_lo, -1, v13, vcc_lo
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_waitcnt vmcnt(0)
	v_mul_f32_e32 v0, 0.5, v0
.LBB5_5:                                ; =>This Inner Loop Header: Depth=1
	global_load_b32 v10, v[6:7], off offset:4
	v_dual_mov_b32 v9, v5 :: v_dual_mov_b32 v8, v4
	v_add_co_u32 v6, s0, v6, 4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v7, s0, 0, v7, s0
	v_cmp_le_i32_e32 vcc_lo, s8, v8
	v_add_co_u32 v4, s0, v8, 1
	s_waitcnt vmcnt(0)
	v_cmp_ngt_f32_e64 s1, v10, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_or_b32 s1, vcc_lo, s1
	v_add_co_ci_u32_e64 v5, vcc_lo, 0, v9, s0
	s_and_b32 s0, exec_lo, s1
	s_or_b32 s4, s0, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s4
	s_cbranch_execnz .LBB5_5
; %bb.6:
	s_or_b32 exec_lo, exec_lo, s4
	v_lshlrev_b64 v[4:5], 2, v[8:9]
	s_mov_b32 s4, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, s2, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s3, v5, vcc_lo
	global_load_b64 v[4:5], v[4:5], off offset:-4
	global_load_b32 v11, v[6:7], off offset:-4
	v_add_co_u32 v6, vcc_lo, v12, 4
	v_add_co_ci_u32_e32 v7, vcc_lo, 0, v13, vcc_lo
.LBB5_7:                                ; =>This Inner Loop Header: Depth=1
	global_load_b32 v12, v[6:7], off offset:-4
	v_dual_mov_b32 v9, v3 :: v_dual_mov_b32 v8, v2
	v_add_co_u32 v6, s0, v6, -4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v7, s0, -1, v7, s0
	v_cmp_gt_i32_e32 vcc_lo, 0, v8
	v_add_co_u32 v2, s0, v8, -1
	s_waitcnt vmcnt(0)
	v_cmp_ngt_f32_e64 s1, v12, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_or_b32 s1, vcc_lo, s1
	v_add_co_ci_u32_e64 v3, vcc_lo, -1, v9, s0
	s_and_b32 s0, exec_lo, s1
	s_or_b32 s4, s0, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s4
	s_cbranch_execnz .LBB5_7
; %bb.8:
	s_or_b32 exec_lo, exec_lo, s4
	v_lshlrev_b64 v[2:3], 2, v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s2, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
	global_load_b64 v[8:9], v[2:3], off
	global_load_b32 v2, v[6:7], off offset:4
	s_waitcnt vmcnt(1)
	v_dual_sub_f32 v7, v11, v10 :: v_dual_sub_f32 v6, v9, v8
	v_sub_f32_e32 v3, v5, v4
	s_waitcnt vmcnt(0)
	v_dual_sub_f32 v5, v0, v10 :: v_dual_sub_f32 v2, v2, v12
	v_sub_f32_e32 v0, v0, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v0, v0, v6
	v_div_scale_f32 v6, null, v2, v2, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v10, v6
	s_waitcnt_depctr 0xfff
	v_fma_f32 v12, -v6, v10, 1.0
	v_dual_mul_f32 v3, v5, v3 :: v_dual_fmac_f32 v10, v12, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_scale_f32 v5, null, v7, v7, v3
	v_div_scale_f32 v13, vcc_lo, v3, v7, v3
	v_rcp_f32_e32 v9, v5
	s_waitcnt_depctr 0xfff
	v_fma_f32 v11, -v5, v9, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v9, v11, v9
	v_div_scale_f32 v11, s0, v0, v2, v0
	v_mul_f32_e32 v12, v13, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v14, v11, v10
	v_fma_f32 v15, -v5, v12, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v16, -v6, v14, v11
	v_fmac_f32_e32 v12, v15, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v14, v16, v10
	v_fma_f32 v5, -v5, v12, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v6, -v6, v14, v11
	v_div_fmas_f32 v5, v5, v9, v12
	s_mov_b32 vcc_lo, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_fmas_f32 v6, v6, v10, v14
	v_div_fixup_f32 v3, v5, v7, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_div_fixup_f32 v0, v6, v2, v0
	v_ashrrev_i32_e32 v2, 31, v1
	v_add_f32_e32 v3, v4, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f32_e32 v4, v8, v0
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_u_f32_e32 vcc_lo, v3, v3
	v_cmp_u_f32_e64 s0, v4, v4
	v_sub_f32_e32 v2, v3, v4
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v0, s1, s6, v0
	v_add_co_ci_u32_e64 v1, s1, s7, v1, s1
	s_delay_alu instid0(VALU_DEP_4)
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(VALU_DEP_3) | instid1(SALU_CYCLE_1)
	v_cndmask_b32_e64 v2, v2, 0, s0
	global_store_b32 v[0:1], v2, off
.LBB5_9:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z4fwhmPfS_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 17
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end5:
	.size	_Z4fwhmPfS_S_, .Lfunc_end5-_Z4fwhmPfS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1020
; NumSgprs: 18
; NumVgprs: 17
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 17
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.protected	numFreqs                ; @numFreqs
	.type	numFreqs,@object
	.section	.bss,"aw",@nobits
	.globl	numFreqs
	.p2align	2, 0x0
numFreqs:
	.long	0                               ; 0x0
	.size	numFreqs, 4

	.protected	numPoints               ; @numPoints
	.type	numPoints,@object
	.globl	numPoints
	.p2align	2, 0x0
numPoints:
	.long	0                               ; 0x0
	.size	numPoints, 4

	.protected	centerFreq              ; @centerFreq
	.type	centerFreq,@object
	.globl	centerFreq
	.p2align	2, 0x0
centerFreq:
	.long	0x00000000                      ; float 0
	.size	centerFreq, 4

	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym numFreqs
	.addrsig_sym numPoints
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           1
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z3regPfS_S_fb
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z3regPfS_S_fb.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     28
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z9findPeaksPfS_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z9findPeaksPfS_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     6
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z10countPeaksPfPiS_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z10countPeaksPfPiS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     6
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         36
        .size:           1
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         44
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         52
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         54
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         56
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         58
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         60
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         62
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         104
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 296
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z11integrateLRPfS_S_S_fb
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z11integrateLRPfS_S_S_fb.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     28
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z15integrateBoundsPfS_S_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z15integrateBoundsPfS_S_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     23
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z4fwhmPfS_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z4fwhmPfS_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     17
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
