// #include <stdio.h>
// #include <iostream>
// #include <fstream>
// #include <time.h>
// #include <random>
// #include "reduction_fcm.cuh"

// using namespace std;

// __host__ void init_membership(float *i_membership, int i_rows, int i_cols, int i_num_clutsers) {
//     // cout << i_cols << endl;
//     // cout << i_rows << endl;
//     // cout << "Init m start"  << endl;

//     // 1d-configuration
//     int len = i_rows * i_cols * i_num_clutsers;
//     i_membership = new float[len];
//     for (int i = 0; i < len; ++i) {
//         i_membership[i] = 1 / (float)i_num_clutsers;
//     }

//     // cout << "Init m done"  << endl;

//     // 3d-configuration
//     // i_membership = new float** [i_rows];

//     // for (int i = 0; i < i_rows; ++i) {
//     //     i_membership[i] = new float* [i_cols];
//     //     // i_new_membership[i] = new float* [i_cols];
//     //     for (int j = 0; j < i_cols; ++j) {
//     //         i_membership[i][j] = new float[i_num_clutsers];
//     //         // i_new_membership[i][j] = new float[i_num_clutsers];
//     //     }
        
//     // }

//     // for (int i = 0; i < i_rows; ++i) {
//     //     for (int j = 0; j < i_cols; ++j) {
//     //         for (int k = 0; k < i_num_clutsers; ++k) {
//     //             i_membership[i][j][k] = 1 / (float)i_num_clutsers;
//     //             // i_new_membership[i][j][k] = 99999;
//     //         }
//     //     }
//     // }

// }

// __host__ void init_centers(float *i_cluster_centers, int i_num_clutsers) {
//     // cout << "Init c start"  << endl;
//     i_cluster_centers = new float[i_num_clutsers];

//     for (int i = 0; i < i_num_clutsers; ++i) {
//         // randomly select i_num_clutsers points as cluster centers

//         // random generator
//         random_device rd;
//         mt19937 eng(rd());
//         uniform_real_distribution<> dist(0, 1);

//         i_cluster_centers[i] = dist(eng);
//     }

//     // cout << "Init c done"  << endl;

//     // cout << "Centers: " << endl;
//     // for (int i = 0; i < i_num_clutsers; ++i) {
//     //     cout << i_cluster_centers[i] << endl;
//     // }
// }

// __host__ void init_final_cluster(int* i_final_cluster, int rows, int cols) {
//     // cout << "Init f start"  << endl;
//     // i_final_cluster = new int[rows * cols];
//     for (int i  = 0; i < rows * cols; ++i) {
//         i_final_cluster[i] = -1;
//     }
//     // cout << "Init f done"  << endl;
// }

// __device__ float eucl_distance(float center, float val) {
//     // val: data point value
//     // i: cluster center point value
//     return sqrt(pow(val - center, 2));
// }

// __global__ void update_centers_numerator_kernel(float *i_image, float *i_membership, float *i_cluster_centers, int i_rows, int i_cols, int i_num_clutsers, int i_m, float* numerator, int c) {
//     extern __shared__ float shared_d[];
//     int global_idx = blockIdx.x * blockDim.x + threadIdx.x;
//     int i = global_idx % i_rows;
//     int j = (global_idx - i) / i_rows;
//     int k = c;

//     // printf("1\n");

//     // each thread loads one element into shared memory
//     if (global_idx < i_rows * i_cols) {
//         shared_d[threadIdx.x] = i_image[i + i_rows * j] * pow(i_membership[k * i_rows * i_cols + j * i_rows + i], i_m); 
//     }
//     else {
//         shared_d[threadIdx.x] = 0;
//     }
//     __syncthreads();

//     // do reduction in shared memory
//     for (unsigned int s = blockDim.x / 2; s > 0; s >>= 1) {
//         if (threadIdx.x < s) {
//             shared_d[threadIdx.x] += shared_d[threadIdx.x + s];
//         }
//         __syncthreads();
//     }
    
//     // write result back to global memory
//     if (threadIdx.x == 0) {
//         numerator[blockIdx.x] = shared_d[0];
//     }

// }

// __global__ void update_centers_denominator_kernel(float *i_image, float *i_membership, float *i_cluster_centers, int i_rows, int i_cols, int i_num_clutsers, int i_m, float* denominator, int c) {
//     // printf("222\n");
//     extern __shared__ float shared_d[];
//     int global_idx = blockIdx.x * blockDim.x + threadIdx.x;
//     int i = global_idx % i_rows;
//     int j = (global_idx - i) / i_rows;
//     int k = c;

//     // printf("2\n");

//     // each thread loads one element into shared memory
//     if (global_idx < i_rows * i_cols) {
//         shared_d[threadIdx.x] = pow(i_membership[k * i_rows * i_cols + j * i_rows + i], i_m);
//     }
//     else {
//         shared_d[threadIdx.x] = 0;
//     }
//     __syncthreads();

//     // do reduction in shared memory
//     for (unsigned int s = blockDim.x / 2; s > 0; s >>= 1) {
//         if (threadIdx.x < s) {
//             shared_d[threadIdx.x] += shared_d[threadIdx.x + s];
//         }
//         __syncthreads();
//     }
    
//     // write result back to global memory
//     if (threadIdx.x == 0) {
//         denominator[blockIdx.x] = shared_d[0];
//     }
// }

// // __global__ void update_centers_kernel(float *i_image, float *i_membership, float *i_cluster_centers, int i_rows, int i_cols, int i_num_clutsers, int i_m, int threads_per_block) {
// //     int global_idx = blockIdx.x * blockDim.x + threadIdx.x;
// //     unsigned int blks = 1 + (i_rows * i_cols - 1) / threads_per_block;
// //     unsigned int in_size = i_rows * i_cols;
// //     unsigned int shared_size = threads_per_block * sizeof(float);
// //     float *res_num = new float[blks];
// //     float *res_den = new float[blks];
// //     float *device_in_num, *device_in_den, *device_out_num, *device_out_den;
// //     float numerator, denominator;

// //     // cudaMalloc((void **)&device_in_num, in_size * sizeof(float));
// //     // cudaMalloc((void **)&device_in_den, in_size * sizeof(float));
// //     // cudaMalloc((void **)&device_out_num, blks * sizeof(float));
// //     // cudaMalloc((void **)&device_out_den, blks * sizeof(float));
// //     // cudaMemcpyAsync(device_in_num, i_membership, in_size * sizeof(float), cudaMemcpyDeviceToDevice);
// //     // cudaMemcpyAsync(device_in_den, i_membership, in_size * sizeof(float), cudaMemcpyDeviceToDevice);

// //     // while (true) {
// //     //     update_centers_numerator_kernel<<<blks, threads_per_block, shared_size>>>(i_image, device_in_num, i_cluster_centers, i_rows, i_cols, i_num_clutsers, i_m, device_out_num, global_idx);
// //     //     printf("g\n");
// //     //     cudaDeviceSynchronize();
// //     //     update_centers_denominator_kernel<<<blks, threads_per_block, shared_size>>>(i_image, device_in_den, i_cluster_centers, i_rows, i_cols, i_num_clutsers, i_m, device_out_den, global_idx);
// //     //     cudaDeviceSynchronize();
// //     //     printf("gg\n");
// //     //     if (blks == 1) {
// //     //         break;
// //     //     }

// //     //     in_size = blks;
// //     //     // device_out now holds the reduce result, copy to device in and reduce again (next time)
// //     //     cudaMemcpyAsync(device_in_num, device_out_num, in_size * sizeof(float), cudaMemcpyDeviceToDevice);
// //     //     cudaMemcpyAsync(device_in_den, device_out_den, in_size * sizeof(float), cudaMemcpyDeviceToDevice);

// //     //     blks = 1 + ((blks - 1) / threads_per_block);
// //     // }

// //     // cudaMemcpyAsync(res_num, device_out_num, sizeof(float), cudaMemcpyDeviceToDevice);
// //     // cudaMemcpyAsync(res_den, device_out_den, sizeof(float), cudaMemcpyDeviceToDevice);

// //     // numerator = res_num[0];
// //     // denominator = res_den[0];

// //     // update the cluster center (finally!)
// //     // i_cluster_centers[global_idx] = numerator / denominator;
// //     __syncthreads();

// //     delete [] res_num;
// //     delete [] res_den;
// //     cudaFree(device_in_num);
// //     cudaFree(device_in_den);
// //     cudaFree(device_out_num);
// //     cudaFree(device_out_den);
// // }

// __global__ void update_membership_kernel(float *i_image, float *i_cluster_centers, float *i_membership, int i_rows, int i_cols, int i_num_clutsers, int i_m) {

//     // calculate degree of membership of each data point (image) regarding each cluster
//     // for (int i = 0; i < i_rows; ++i) {
//     //     for (int j = 0; j < i_cols; ++j) {
//     //         for (int k = 0; k < i_num_clutsers; ++k) {
//     //             // cout << "Hi" << endl;
//     //             // i_new_membership[i][j][k] = calculate_membership_point(i, j, k);
//     //             // FIX!!
//     //             // i_membership[i][j][k] = calculate_membership_point_kernel(i_image, i_cluster_centers, i, j, k, i_num_clutsers, i_m);
//     //         }
//     //     }
//     // }

//     // std::printf("Dafuq?\n");

//     // shared memory that stores: memberships for that pixel, 
//     extern __shared__ float shared_d[];
//     // std::printf("%f???\n", i_image[0]);

//     // global index
//     int global_idx = blockIdx.x * blockDim.x + threadIdx.x;
//     // std::printf("2?\n");
//     // chunk of shared memory each thread gets to use
//     int per_thread_len = 2 + i_num_clutsers;
//     // x, y, z indices in original membership matrix
//     int x = global_idx % i_rows ;
//     int y = ((global_idx - x) / i_rows) % i_cols;
//     int z = ((global_idx - x - y * i_rows) / (i_rows * i_cols));
//     // std::printf("3?\n");


//     // load data into shared memory (each thread loads info for a **single** pixel membership)
//     if (global_idx < i_rows * i_cols * i_num_clutsers) {
//         // load pixel (1)
//         // std::printf("fxxk this sxit %f\n", i_image[global_idx]);
//         shared_d[threadIdx.x * per_thread_len] = i_image[x + y * i_rows];
//         // std::printf("fxxk this sxit %f\n", i_image[global_idx]);
//         // load membership (1)
//         shared_d[threadIdx.x * per_thread_len + 1] = i_membership[(z * i_rows * i_cols) + y * i_rows + x];
//         // load centers (i_num_clutsers)
//         for (int i = 0; i < i_num_clutsers; ++i) {
//             // shared_d[threadIdx.x * per_thread_len + (i + 1)] = i_membership[(x + y * i_rows) * i_num_clutsers + i];
//             shared_d[threadIdx.x * per_thread_len + 1 + (i + 1)] = i_cluster_centers[i];
//         }
//     }
//     else {
//         // std::printf("else???? %f\n", i_image[global_idx]);
//         for (int i = 0; i < per_thread_len; ++i) {
//             shared_d[threadIdx.x] = 0;
//         }
//     }

    
//     // printf("image membership: %f %f \n", shared_d[threadIdx.x * per_thread_len], shared_d[threadIdx.x * per_thread_len + 1]);
//     // printf("   centers: ");
//     // for (int j = 0; j < i_num_clutsers; ++j) {
//     //     printf("center %f", shared_d[threadIdx.x * per_thread_len + 1 + (j + 1)]);
//     // }
//     // printf("\n");
    

//     __syncthreads();

//     // std::printf("Dafuq?\n");

//     // calculate membership for the loaded pixel
//     float d_center = 0, d_all = 0, aggr = 0.0;
//     d_center = eucl_distance(shared_d[threadIdx.x * per_thread_len + 1 + (z + 1)], shared_d[threadIdx.x * per_thread_len]);
//     // std::printf("a, b: %f, %f\n", shared_d[threadIdx.x * per_thread_len + 1 + (z + 1)], shared_d[threadIdx.x * per_thread_len]);
//     for (int c = 0; c < i_num_clutsers; ++c) {
//         d_all = eucl_distance(shared_d[threadIdx.x * per_thread_len + 1 + (c + 1)], shared_d[threadIdx.x * per_thread_len]);
//         aggr += pow((d_center / d_all), 2 / (i_m - 1));
//         // printf("z c d_center d_all: %d %d %f %f \n", z, c, d_center, d_all);
//     }

//     // printf("d_center: %f\n", d_center);
//     // printf("d_all: %f\n", d_all);

//     // std::printf("Dafuq2?\n");

//     // write aggregation results to membership value on shared memory
//     // std::printf("Aggr: %f\n", aggr);
//     // printf("z d_center d_all Aggr: %d %f %f %f\n", z, d_center, d_all, aggr);
//     shared_d[threadIdx.x * per_thread_len + 1] = 1.0 / (float)aggr;
//     // std::printf("PLZ %f\n", shared_d[threadIdx.x * per_thread_len + 1]);

//     // write back membership results to global memory
//     // std::printf("PLZ %f\n", shared_d[threadIdx.x * per_thread_len + 1]);
//     i_membership[(z * i_rows * i_cols) + y * i_rows + x] = 1.0 / (float)aggr;
//     // printf("Member: %f\n", i_membership[(z * i_rows * i_cols) + y * i_rows + x]);
//     // std::printf("WHY %d %d %d %f\n", x, y, z, i_membership[(z * i_rows * i_cols) + y * i_rows + x]);
//     __syncthreads();


//     // print_mebership();

// }


// __device__ float calculate_membership_point_kernel(float *i_image, float *i_cluster_centers, int i, int j, int k, int i_num_clutsers, int i_m) {
//     float d_center = 0, d_all = 0, aggr = 0.0;

//     // FIX!!
//     // d_center = eucl_distance(i_cluster_centers[k], i_image[i][j]);
//     // cout << "d_center: " << d_center << endl;
//     for (int c = 0; c < i_num_clutsers; ++c) {
//         // FIX!!
//         // d_all = eucl_distance(i_cluster_centers[c], i_image[i][j]);
//         // cout << "d_all " << c << ": " << d_all << endl;
//         // cout << "center " << c << ": " << i_cluster_centers[c] << endl;
//         aggr += pow((d_center / d_all), 2 / (i_m - 1));
//     }

//     // cout << "Aggr: " << aggr << endl;

//     return 1.0 /aggr;
// }

// __host__ void fcm_step(float *i_image, float *i_membership, float *i_cluster_centers, int rows, int cols, int T, int i_num_clutsers, int i_m, int threads_per_block, float *out_membership) {
//     // set block size and number of blocks to allocate
//     // dim3 dimBlock(threads_per_block, threads_per_block);
//     // dim3 dimGrid(((rows - 1) / dimBlock.x) + 1, ((cols - 1) / dimBlock.y) + 1);

//     unsigned int blks_m = 1 + (rows * cols * i_num_clutsers - 1) / threads_per_block;
//     // unsigned int blks_c = 1 + (i_num_clutsers - 1) / threads_per_block;
//     unsigned int shared_size_m = ((1 + 2 * i_num_clutsers) * threads_per_block) * sizeof(float);
//     // unsigned int shared_size_c = (i_num_clutsers * threads_per_block) * sizeof(float);

//     // cout << "blkm: " << blks_m << endl;
//     // cout << "blkc: " << blks_c << endl;

//     // // copy output memebership matrix
//     // for (int i = 0; i < rows; ++i) {
//     //     for (int j = 0; j < cols; ++j) {
//     //         for (int k = 0; k < i_num_clutsers; ++k) {
//     //             std::printf("%f\n", i_membership[(k * rows * cols) + j * rows + i]);
//     //         }
//     //     }
//     // }

//     // cudaMemcpy everything!
//     float *d_image, *d_membership, *d_cluster_centers;
//     cudaMalloc((void**)&d_image, rows * cols * sizeof(float));
//     cudaMalloc((void**)&d_membership, rows * cols * i_num_clutsers * sizeof(float));
//     cudaMalloc((void**)&d_cluster_centers, i_num_clutsers * sizeof(float));
//     // cudaMalloc((void**)&out_membership, rows * cols * i_num_clutsers * sizeof(float));

//     cudaMemcpy(d_image, i_image, rows * cols * sizeof(float), cudaMemcpyHostToDevice);
//     cudaMemcpy(d_membership, i_membership, rows * cols * i_num_clutsers * sizeof(float), cudaMemcpyHostToDevice);
//     cudaMemcpy(d_cluster_centers, i_cluster_centers, i_num_clutsers * sizeof(float), cudaMemcpyHostToDevice);

//     // kernel config parameters for reduction
//     unsigned int blks_c = 1 + (rows * cols - 1) / threads_per_block;
//     unsigned int in_size = rows * cols;
//     unsigned int shared_size_c = threads_per_block * sizeof(float);

//     // memory allocations for reduction
//     float *numerator = new float[1];
//     float *denominator = new float[1];
//     float *device_in_num, *device_in_den, *device_out_num, *device_out_den;
//     cudaMalloc((void **)&device_in_num, in_size * sizeof(float));
//     cudaMalloc((void **)&device_in_den, in_size * sizeof(float));
//     cudaMalloc((void **)&device_out_num, blks_c * sizeof(float));
//     cudaMalloc((void **)&device_out_den, blks_c * sizeof(float));


//     // iteratively update membership and centers for T epochs
//     for (int i = 0; i < T; ++i) {
//         // cout << "Hi" << endl;
//         // fcm_step_kernel<<<dimGrid, dimBlock, shared_size>>>(i_image, i_membership, i_cluster_centers, rows, cols, i_num_clutsers, i_m);
//         // 1D grid of 2D blocks
//         update_membership_kernel<<<blks_m, threads_per_block, shared_size_m>>>(d_image, d_cluster_centers, d_membership, rows, cols, i_num_clutsers, i_m);
//         // cudaDeviceSynchronize();
//         // reduce each center with numerator and denominator reduction
        
//         // cudaMemcpy(device_in_num, d_membership, in_size * sizeof(float), cudaMemcpyDeviceToDevice);
//         // cudaMemcpy(device_in_den, d_membership, in_size * sizeof(float), cudaMemcpyDeviceToDevice);
//         cudaMemcpy(device_in_num, d_membership, in_size * sizeof(float), cudaMemcpyHostToDevice);
//         cudaMemcpy(device_in_den, d_membership, in_size * sizeof(float), cudaMemcpyHostToDevice);

//         for (int j = 0; j < i_num_clutsers; ++j) {
//             blks_c = 1 + (rows * cols - 1) / threads_per_block;
//             while (true) {
//                 update_centers_numerator_kernel<<<blks_c, threads_per_block, shared_size_c>>>(d_image, device_in_num, d_cluster_centers, rows, cols, i_num_clutsers, i_m, device_out_num, j);
//                 update_centers_denominator_kernel<<<blks_c, threads_per_block, shared_size_c>>>(d_image, device_in_den, d_cluster_centers, rows, cols, i_num_clutsers, i_m, device_out_den, j);
                
//                 // don't re-initialize if we already have the final reduction result
//                 if (blks_c == 1) {
//                     break;
//                 }

//                 in_size = blks_c;

//                 // device_out now holds the reduce result, copy to device in and reduce again (next time)
//                 cudaMemcpy(device_in_num, device_out_num, in_size * sizeof(float), cudaMemcpyDeviceToDevice);
//                 cudaMemcpy(device_in_den, device_out_den, in_size * sizeof(float), cudaMemcpyDeviceToDevice);

//                 blks_c = 1 + ((blks_c - 1) / threads_per_block);

//             }
//             cudaMemcpy(numerator, device_out_num, sizeof(float), cudaMemcpyDeviceToHost);
//             cudaMemcpy(denominator, device_out_den, sizeof(float), cudaMemcpyDeviceToHost);

//             // update center values
//             i_cluster_centers[i] = numerator[0] / denominator[0];
//         }

//         // update_centers_kernel<<<blks_c, threads_per_block, shared_size_c>>>(d_image, d_membership, d_cluster_centers, rows, cols, i_num_clutsers, i_m, threads_per_block);
//         // cudaDeviceSynchronize();
//         // cout << "Bye" << endl;
//     }
//     // fcm_step_kernel<<<dimGrid, dimBlock, shared_size>>>(i_image, i_membership, i_cluster_centers, rows, cols, i_num_clutsers, i_m);

//     cudaMemcpy(out_membership, d_membership, rows * cols * i_num_clutsers * sizeof(float), cudaMemcpyDeviceToHost);
//     cudaMemcpy(i_cluster_centers, d_cluster_centers, i_num_clutsers * sizeof(float), cudaMemcpyDeviceToHost);

//     cudaFree(d_image);
//     cudaFree(d_membership);
//     cudaFree(d_cluster_centers);
// }

// __global__ void fcm_step_kernel(float *i_image, float *i_membership, float *i_cluster_centers, int rows, int cols, int i_num_clutsers, int i_m) {
//     // update_membership_kernel(i_image, i_cluster_centers, i_membership, rows, cols, i_num_clutsers, i_m);
//     // update_centers_kernel(i_image, i_membership, i_cluster_centers, rows, cols, i_num_clutsers, i_m);
// }


// __host__ void calculate_final_cluster(float *i_membership, int *i_final_cluster, int i_num_clutsers, int i_rows, int i_cols) {
//     // cout << "Membership: " << endl;
//     // for (int i = 0; i < i_rows; ++i) {
//     //     for (int j = 0; j < i_cols; ++j) {
//     //         float tmp_max = -999;
//     //         for (int k = 0; k < i_num_clutsers; ++k) {
//     //             // FIX!!
//     //             // if (i_membership[i][j][k] >= tmp_max) {
//     //             //     // cout << "hi" << endl;
//     //             //     tmp_max = i_membership[i][j][k];
//     //             //     // i_final_cluster[i][j] = 255 / (float)(k + 1);
//     //             //     i_final_cluster[i][j] = k;
//     //             // }
//     //             int k = 0;
//     //             // cout << i_membership[i][j][k] << " ";
//     //         }
//     //         // cout << endl;
//     //     }
//     // }

//     for (int i = 0; i < i_rows; ++i) {
//         for (int j = 0; j < i_cols; ++j) {
//             float tmp_max = -9999;
//             // std::printf("[");
//             for (int k = 0; k < i_num_clutsers; ++k) {
//                 // std::printf("%f ", i_membership[(k * i_rows * i_cols) + j * i_rows + i]);
//                 if (i_membership[(k * i_rows * i_cols) + j * i_rows + i] >= tmp_max) {
//                     tmp_max = i_membership[(k * i_rows * i_cols) + j * i_rows + i];
//                     i_final_cluster[j * i_rows + i] = k;
//                 }
//             }
//             // std::printf("]");
//         }
//         // std::printf("\n");
//     }

// }




#include <stdio.h>
#include <iostream>
#include <fstream>
#include <time.h>
#include <random>
#include "reduction_fcm.cuh"

using namespace std;

__host__ void init_membership(float *i_membership, int i_rows, int i_cols, int i_num_clutsers) {
    // cout << i_cols << endl;
    // cout << i_rows << endl;
    // cout << "Init m start"  << endl;

    // 1d-configuration
    int len = i_rows * i_cols * i_num_clutsers;
    i_membership = new float[len];
    for (int i = 0; i < len; ++i) {
        i_membership[i] = 1 / (float)i_num_clutsers;
    }

    // cout << "Init m done"  << endl;

    // 3d-configuration
    // i_membership = new float** [i_rows];

    // for (int i = 0; i < i_rows; ++i) {
    //     i_membership[i] = new float* [i_cols];
    //     // i_new_membership[i] = new float* [i_cols];
    //     for (int j = 0; j < i_cols; ++j) {
    //         i_membership[i][j] = new float[i_num_clutsers];
    //         // i_new_membership[i][j] = new float[i_num_clutsers];
    //     }
        
    // }

    // for (int i = 0; i < i_rows; ++i) {
    //     for (int j = 0; j < i_cols; ++j) {
    //         for (int k = 0; k < i_num_clutsers; ++k) {
    //             i_membership[i][j][k] = 1 / (float)i_num_clutsers;
    //             // i_new_membership[i][j][k] = 99999;
    //         }
    //     }
    // }

}

__host__ void init_centers(float *i_cluster_centers, int i_num_clutsers) {
    // cout << "Init c start"  << endl;
    i_cluster_centers = new float[i_num_clutsers];

    for (int i = 0; i < i_num_clutsers; ++i) {
        // randomly select i_num_clutsers points as cluster centers

        // random generator
        random_device rd;
        mt19937 eng(rd());
        uniform_real_distribution<> dist(0, 1);

        i_cluster_centers[i] = dist(eng);
    }

    // cout << "Init c done"  << endl;

    // cout << "Centers: " << endl;
    // for (int i = 0; i < i_num_clutsers; ++i) {
    //     cout << i_cluster_centers[i] << endl;
    // }
}

__host__ void init_final_cluster(int* i_final_cluster, int rows, int cols) {
    // cout << "Init f start"  << endl;
    // i_final_cluster = new int[rows * cols];
    for (int i  = 0; i < rows * cols; ++i) {
        i_final_cluster[i] = -1;
    }
    // cout << "Init f done"  << endl;
}

__device__ float eucl_distance(float center, float val) {
    // val: data point value
    // i: cluster center point value
    return sqrt(pow(val - center, 2));
}

__global__ void update_centers_numerator_kernel(float *i_image, float *i_membership, float *i_cluster_centers, int i_rows, int i_cols, int i_num_clutsers, int i_m, float* numerator, int c) {
    extern __shared__ float shared_d[];
    int global_idx = blockIdx.x * blockDim.x + threadIdx.x;
    int i = global_idx % i_rows;
    int j = (global_idx - i) / i_rows;
    int k = c;

    // printf("1\n");

    // each thread loads one element into shared memory
    if (global_idx < i_rows * i_cols) {
        shared_d[threadIdx.x] = i_image[i + i_rows * j] * pow(i_membership[k * i_rows * i_cols + j * i_rows + i], i_m); 
    }
    else {
        shared_d[threadIdx.x] = 0;
    }
    __syncthreads();

    // do reduction in shared memory
    for (unsigned int s = blockDim.x / 2; s > 0; s >>= 1) {
        if (threadIdx.x < s) {
            shared_d[threadIdx.x] += shared_d[threadIdx.x + s];
        }
        __syncthreads();
    }
    
    // write result back to global memory
    if (threadIdx.x == 0) {
        numerator[blockIdx.x] = shared_d[0];
    }

}

__global__ void update_centers_denominator_kernel(float *i_image, float *i_membership, float *i_cluster_centers, int i_rows, int i_cols, int i_num_clutsers, int i_m, float* denominator, int c) {
    // printf("222\n");
    extern __shared__ float shared_d[];
    int global_idx = blockIdx.x * blockDim.x + threadIdx.x;
    int i = global_idx % i_rows;
    int j = (global_idx - i) / i_rows;
    int k = c;

    // printf("2\n");

    // each thread loads one element into shared memory
    if (global_idx < i_rows * i_cols) {
        shared_d[threadIdx.x] = pow(i_membership[k * i_rows * i_cols + j * i_rows + i], i_m);
    }
    else {
        shared_d[threadIdx.x] = 0;
    }
    __syncthreads();

    // do reduction in shared memory
    for (unsigned int s = blockDim.x / 2; s > 0; s >>= 1) {
        if (threadIdx.x < s) {
            shared_d[threadIdx.x] += shared_d[threadIdx.x + s];
        }
        __syncthreads();
    }
    
    // write result back to global memory
    if (threadIdx.x == 0) {
        denominator[blockIdx.x] = shared_d[0];
    }
}

// __global__ void update_centers_kernel(float *i_image, float *i_membership, float *i_cluster_centers, int i_rows, int i_cols, int i_num_clutsers, int i_m, int threads_per_block) {
//     int global_idx = blockIdx.x * blockDim.x + threadIdx.x;
//     unsigned int blks = 1 + (i_rows * i_cols - 1) / threads_per_block;
//     unsigned int in_size = i_rows * i_cols;
//     unsigned int shared_size = threads_per_block * sizeof(float);
//     float *res_num = new float[blks];
//     float *res_den = new float[blks];
//     float *device_in_num, *device_in_den, *device_out_num, *device_out_den;
//     float numerator, denominator;

//     // cudaMalloc((void **)&device_in_num, in_size * sizeof(float));
//     // cudaMalloc((void **)&device_in_den, in_size * sizeof(float));
//     // cudaMalloc((void **)&device_out_num, blks * sizeof(float));
//     // cudaMalloc((void **)&device_out_den, blks * sizeof(float));
//     // cudaMemcpyAsync(device_in_num, i_membership, in_size * sizeof(float), cudaMemcpyDeviceToDevice);
//     // cudaMemcpyAsync(device_in_den, i_membership, in_size * sizeof(float), cudaMemcpyDeviceToDevice);

//     // while (true) {
//     //     update_centers_numerator_kernel<<<blks, threads_per_block, shared_size>>>(i_image, device_in_num, i_cluster_centers, i_rows, i_cols, i_num_clutsers, i_m, device_out_num, global_idx);
//     //     printf("g\n");
//     //     cudaDeviceSynchronize();
//     //     update_centers_denominator_kernel<<<blks, threads_per_block, shared_size>>>(i_image, device_in_den, i_cluster_centers, i_rows, i_cols, i_num_clutsers, i_m, device_out_den, global_idx);
//     //     cudaDeviceSynchronize();
//     //     printf("gg\n");
//     //     if (blks == 1) {
//     //         break;
//     //     }

//     //     in_size = blks;
//     //     // device_out now holds the reduce result, copy to device in and reduce again (next time)
//     //     cudaMemcpyAsync(device_in_num, device_out_num, in_size * sizeof(float), cudaMemcpyDeviceToDevice);
//     //     cudaMemcpyAsync(device_in_den, device_out_den, in_size * sizeof(float), cudaMemcpyDeviceToDevice);

//     //     blks = 1 + ((blks - 1) / threads_per_block);
//     // }

//     // cudaMemcpyAsync(res_num, device_out_num, sizeof(float), cudaMemcpyDeviceToDevice);
//     // cudaMemcpyAsync(res_den, device_out_den, sizeof(float), cudaMemcpyDeviceToDevice);

//     // numerator = res_num[0];
//     // denominator = res_den[0];

//     // update the cluster center (finally!)
//     // i_cluster_centers[global_idx] = numerator / denominator;
//     __syncthreads();

//     delete [] res_num;
//     delete [] res_den;
//     cudaFree(device_in_num);
//     cudaFree(device_in_den);
//     cudaFree(device_out_num);
//     cudaFree(device_out_den);
// }

__global__ void update_membership_kernel(float *i_image, float *i_cluster_centers, float *i_membership, int i_rows, int i_cols, int i_num_clutsers, int i_m) {

    // calculate degree of membership of each data point (image) regarding each cluster
    // for (int i = 0; i < i_rows; ++i) {
    //     for (int j = 0; j < i_cols; ++j) {
    //         for (int k = 0; k < i_num_clutsers; ++k) {
    //             // cout << "Hi" << endl;
    //             // i_new_membership[i][j][k] = calculate_membership_point(i, j, k);
    //             // FIX!!
    //             // i_membership[i][j][k] = calculate_membership_point_kernel(i_image, i_cluster_centers, i, j, k, i_num_clutsers, i_m);
    //         }
    //     }
    // }

    // std::printf("Dafuq?\n");

    // shared memory that stores: memberships for that pixel, 
    extern __shared__ float shared_d[];
    // std::printf("%f???\n", i_image[0]);

    // global index
    int global_idx = blockIdx.x * blockDim.x + threadIdx.x;
    // std::printf("2?\n");
    // chunk of shared memory each thread gets to use
    int per_thread_len = 2 + i_num_clutsers;
    // x, y, z indices in original membership matrix
    int x = global_idx % i_rows ;
    int y = ((global_idx - x) / i_rows) % i_cols;
    int z = ((global_idx - x - y * i_rows) / (i_rows * i_cols));
    // std::printf("3?\n");


    // load data into shared memory (each thread loads info for a **single** pixel membership)
    if (global_idx < i_rows * i_cols * i_num_clutsers) {
        // load pixel (1)
        // std::printf("fxxk this sxit %f\n", i_image[global_idx]);
        shared_d[threadIdx.x * per_thread_len] = i_image[x + y * i_rows];
        // std::printf("fxxk this sxit %f\n", i_image[global_idx]);
        // load membership (1)
        shared_d[threadIdx.x * per_thread_len + 1] = i_membership[(z * i_rows * i_cols) + y * i_rows + x];
        // load centers (i_num_clutsers)
        for (int i = 0; i < i_num_clutsers; ++i) {
            // shared_d[threadIdx.x * per_thread_len + (i + 1)] = i_membership[(x + y * i_rows) * i_num_clutsers + i];
            shared_d[threadIdx.x * per_thread_len + 1 + (i + 1)] = i_cluster_centers[i];
        }
    }
    else {
        // std::printf("else???? %f\n", i_image[global_idx]);
        for (int i = 0; i < per_thread_len; ++i) {
            shared_d[threadIdx.x] = 0;
        }
    }

    
    // printf("image membership: %f %f \n", shared_d[threadIdx.x * per_thread_len], shared_d[threadIdx.x * per_thread_len + 1]);
    // printf("   centers: ");
    // for (int j = 0; j < i_num_clutsers; ++j) {
    //     printf("center %f", shared_d[threadIdx.x * per_thread_len + 1 + (j + 1)]);
    // }
    // printf("\n");
    

    __syncthreads();

    // std::printf("Dafuq?\n");

    // calculate membership for the loaded pixel
    float d_center = 0, d_all = 0, aggr = 0.0;
    d_center = eucl_distance(shared_d[threadIdx.x * per_thread_len + 1 + (z + 1)], shared_d[threadIdx.x * per_thread_len]);
    // std::printf("a, b: %f, %f\n", shared_d[threadIdx.x * per_thread_len + 1 + (z + 1)], shared_d[threadIdx.x * per_thread_len]);
    for (int c = 0; c < i_num_clutsers; ++c) {
        d_all = eucl_distance(shared_d[threadIdx.x * per_thread_len + 1 + (c + 1)], shared_d[threadIdx.x * per_thread_len]);
        aggr += pow((d_center / d_all), 2 / (i_m - 1));
        // printf("z c d_center d_all: %d %d %f %f \n", z, c, d_center, d_all);
    }

    // printf("d_center: %f\n", d_center);
    // printf("d_all: %f\n", d_all);

    // std::printf("Dafuq2?\n");

    // write aggregation results to membership value on shared memory
    // std::printf("Aggr: %f\n", aggr);
    // printf("z d_center d_all Aggr: %d %f %f %f\n", z, d_center, d_all, aggr);
    shared_d[threadIdx.x * per_thread_len + 1] = 1.0 / (float)aggr;
    // std::printf("PLZ %f\n", shared_d[threadIdx.x * per_thread_len + 1]);

    // write back membership results to global memory
    // std::printf("PLZ %f\n", shared_d[threadIdx.x * per_thread_len + 1]);
    i_membership[(z * i_rows * i_cols) + y * i_rows + x] = 1.0 / (float)aggr;
    // printf("Member: %f\n", i_membership[(z * i_rows * i_cols) + y * i_rows + x]);
    // std::printf("WHY %d %d %d %f\n", x, y, z, i_membership[(z * i_rows * i_cols) + y * i_rows + x]);
    __syncthreads();


    // print_mebership();

}


__device__ float calculate_membership_point_kernel(float *i_image, float *i_cluster_centers, int i, int j, int k, int i_num_clutsers, int i_m) {
    float d_center = 0, d_all = 0, aggr = 0.0;

    // FIX!!
    // d_center = eucl_distance(i_cluster_centers[k], i_image[i][j]);
    // cout << "d_center: " << d_center << endl;
    for (int c = 0; c < i_num_clutsers; ++c) {
        // FIX!!
        // d_all = eucl_distance(i_cluster_centers[c], i_image[i][j]);
        // cout << "d_all " << c << ": " << d_all << endl;
        // cout << "center " << c << ": " << i_cluster_centers[c] << endl;
        aggr += pow((d_center / d_all), 2 / (i_m - 1));
    }

    // cout << "Aggr: " << aggr << endl;

    return 1.0 /aggr;
}

__host__ void fcm_step(float *i_image, float *i_membership, float *i_cluster_centers, int rows, int cols, int T, int i_num_clutsers, int i_m, int threads_per_block, float *out_membership) {
    // set block size and number of blocks to allocate
    // dim3 dimBlock(threads_per_block, threads_per_block);
    // dim3 dimGrid(((rows - 1) / dimBlock.x) + 1, ((cols - 1) / dimBlock.y) + 1);

    unsigned int blks_m = 1 + (rows * cols * i_num_clutsers - 1) / threads_per_block;
    // unsigned int blks_c = 1 + (i_num_clutsers - 1) / threads_per_block;
    unsigned int shared_size_m = ((1 + 2 * i_num_clutsers) * threads_per_block) * sizeof(float);
    // unsigned int shared_size_c = (i_num_clutsers * threads_per_block) * sizeof(float);

    // cout << "blkm: " << blks_m << endl;
    // cout << "blkc: " << blks_c << endl;

    // // copy output memebership matrix
    // for (int i = 0; i < rows; ++i) {
    //     for (int j = 0; j < cols; ++j) {
    //         for (int k = 0; k < i_num_clutsers; ++k) {
    //             std::printf("%f\n", i_membership[(k * rows * cols) + j * rows + i]);
    //         }
    //     }
    // }

    // cudaMemcpy everything!
    float *d_image, *d_membership, *d_cluster_centers;
    cudaMalloc((void**)&d_image, rows * cols * sizeof(float));
    cudaMalloc((void**)&d_membership, rows * cols * i_num_clutsers * sizeof(float));
    cudaMalloc((void**)&d_cluster_centers, i_num_clutsers * sizeof(float));
    // cudaMalloc((void**)&out_membership, rows * cols * i_num_clutsers * sizeof(float));

    cudaMemcpy(d_image, i_image, rows * cols * sizeof(float), cudaMemcpyHostToDevice);
    cudaMemcpy(d_membership, i_membership, rows * cols * i_num_clutsers * sizeof(float), cudaMemcpyHostToDevice);
    cudaMemcpy(d_cluster_centers, i_cluster_centers, i_num_clutsers * sizeof(float), cudaMemcpyHostToDevice);

    // kernel config parameters for reduction
    unsigned int blks_c = 1 + (rows * cols - 1) / threads_per_block;
    unsigned int in_size = rows * cols;
    unsigned int shared_size_c = threads_per_block * sizeof(float);

    // memory allocations for reduction
    float *numerator = new float[1];
    float *denominator = new float[1];
    float *device_in_num, *device_in_den, *device_out_num, *device_out_den;
    cudaMalloc((void **)&device_in_num, in_size * sizeof(float));
    cudaMalloc((void **)&device_in_den, in_size * sizeof(float));
    cudaMalloc((void **)&device_out_num, blks_c * sizeof(float));
    cudaMalloc((void **)&device_out_den, blks_c * sizeof(float));


    // iteratively update membership and centers for T epochs
    for (int i = 0; i < T; ++i) {
        // cout << "Hi" << endl;
        // fcm_step_kernel<<<dimGrid, dimBlock, shared_size>>>(i_image, i_membership, i_cluster_centers, rows, cols, i_num_clutsers, i_m);
        // 1D grid of 2D blocks
        update_membership_kernel<<<blks_m, threads_per_block, shared_size_m>>>(d_image, d_cluster_centers, d_membership, rows, cols, i_num_clutsers, i_m);
        // cudaDeviceSynchronize();
        // reduce each center with numerator and denominator reduction
        
        cudaMemcpy(device_in_num, i_membership, in_size * sizeof(float), cudaMemcpyDeviceToDevice);
        cudaMemcpy(device_in_den, i_membership, in_size * sizeof(float), cudaMemcpyDeviceToDevice);
        for (int j = 0; j < i_num_clutsers; ++j) {
            blks_c = 1 + (rows * cols - 1) / threads_per_block;
            while (true) {
                update_centers_numerator_kernel<<<blks_c, threads_per_block, shared_size_c>>>(d_image, d_membership, d_cluster_centers, rows, cols, i_num_clutsers, i_m, device_out_num, j);
                update_centers_denominator_kernel<<<blks_c, threads_per_block, shared_size_c>>>(d_image, d_membership, d_cluster_centers, rows, cols, i_num_clutsers, i_m, device_out_den, j);
                
                // don't re-initialize if we already have the final reduction result
                if (blks_c == 1) {
                    break;
                }

                in_size = blks_c;

                // device_out now holds the reduce result, copy to device in and reduce again (next time)
                cudaMemcpy(device_in_num, device_out_num, in_size * sizeof(float), cudaMemcpyDeviceToDevice);
                cudaMemcpy(device_in_den, device_out_den, in_size * sizeof(float), cudaMemcpyDeviceToDevice);

                blks_c = 1 + ((blks_c - 1) / threads_per_block);

            }
            cudaMemcpy(numerator, device_out_num, sizeof(float), cudaMemcpyDeviceToHost);
            cudaMemcpy(denominator, device_out_den, sizeof(float), cudaMemcpyDeviceToHost);

            // update center values
            i_cluster_centers[i] = numerator[0] / denominator[0];
        }

        // update_centers_kernel<<<blks_c, threads_per_block, shared_size_c>>>(d_image, d_membership, d_cluster_centers, rows, cols, i_num_clutsers, i_m, threads_per_block);
        // cudaDeviceSynchronize();
        // cout << "Bye" << endl;
    }
    // fcm_step_kernel<<<dimGrid, dimBlock, shared_size>>>(i_image, i_membership, i_cluster_centers, rows, cols, i_num_clutsers, i_m);

    cudaMemcpy(out_membership, d_membership, rows * cols * i_num_clutsers * sizeof(float), cudaMemcpyDeviceToHost);
    cudaMemcpy(i_cluster_centers, d_cluster_centers, i_num_clutsers * sizeof(float), cudaMemcpyDeviceToHost);

    cudaFree(d_image);
    cudaFree(d_membership);
    cudaFree(d_cluster_centers);
}

__global__ void fcm_step_kernel(float *i_image, float *i_membership, float *i_cluster_centers, int rows, int cols, int i_num_clutsers, int i_m) {
    // update_membership_kernel(i_image, i_cluster_centers, i_membership, rows, cols, i_num_clutsers, i_m);
    // update_centers_kernel(i_image, i_membership, i_cluster_centers, rows, cols, i_num_clutsers, i_m);
}


__host__ void calculate_final_cluster(float *i_membership, int *i_final_cluster, int i_num_clutsers, int i_rows, int i_cols) {
    // cout << "Membership: " << endl;
    // for (int i = 0; i < i_rows; ++i) {
    //     for (int j = 0; j < i_cols; ++j) {
    //         float tmp_max = -999;
    //         for (int k = 0; k < i_num_clutsers; ++k) {
    //             // FIX!!
    //             // if (i_membership[i][j][k] >= tmp_max) {
    //             //     // cout << "hi" << endl;
    //             //     tmp_max = i_membership[i][j][k];
    //             //     // i_final_cluster[i][j] = 255 / (float)(k + 1);
    //             //     i_final_cluster[i][j] = k;
    //             // }
    //             int k = 0;
    //             // cout << i_membership[i][j][k] << " ";
    //         }
    //         // cout << endl;
    //     }
    // }

    for (int i = 0; i < i_rows; ++i) {
        for (int j = 0; j < i_cols; ++j) {
            float tmp_max = -9999;
            // std::printf("[");
            for (int k = 0; k < i_num_clutsers; ++k) {
                // std::printf("%f ", i_membership[(k * i_rows * i_cols) + j * i_rows + i]);
                if (i_membership[(k * i_rows * i_cols) + j * i_rows + i] >= tmp_max) {
                    tmp_max = i_membership[(k * i_rows * i_cols) + j * i_rows + i];
                    i_final_cluster[j * i_rows + i] = k;
                }
            }
            // std::printf("]");
        }
        // std::printf("\n");
    }

}


	.file	"tmpxft_00218ab5_00000000-6_reduction_fcm_iter.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4859:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE4859:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z15init_membershipPfiii
	.type	_Z15init_membershipPfiii, @function
_Z15init_membershipPfiii:
.LFB4850:
	.cfi_startproc
	endbr64
	movabsq	$2305843009213693950, %rax
	imull	%edx, %esi
	imull	%ecx, %esi
	movslq	%esi, %rsi
	cmpq	%rsi, %rax
	jnb	.L2
	pushq	%rax
	.cfi_def_cfa_offset 16
	call	__cxa_throw_bad_array_new_length@PLT
.L2:
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4850:
	.size	_Z15init_membershipPfiii, .-_Z15init_membershipPfiii
	.globl	_Z18init_final_clusterPiii
	.type	_Z18init_final_clusterPiii, @function
_Z18init_final_clusterPiii:
.LFB4852:
	.cfi_startproc
	endbr64
	imull	%edx, %esi
	xorl	%eax, %eax
.L9:
	cmpl	%eax, %esi
	jle	.L11
	movl	$-1, (%rdi,%rax,4)
	incq	%rax
	jmp	.L9
.L11:
	ret
	.cfi_endproc
.LFE4852:
	.size	_Z18init_final_clusterPiii, .-_Z18init_final_clusterPiii
	.globl	_Z13eucl_distanceff
	.type	_Z13eucl_distanceff, @function
_Z13eucl_distanceff:
.LFB4853:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE4853:
	.size	_Z13eucl_distanceff, .-_Z13eucl_distanceff
	.globl	_Z33calculate_membership_point_kernelPfS_iiiii
	.type	_Z33calculate_membership_point_kernelPfS_iiiii, @function
_Z33calculate_membership_point_kernelPfS_iiiii:
.LFB4854:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE4854:
	.size	_Z33calculate_membership_point_kernelPfS_iiiii, .-_Z33calculate_membership_point_kernelPfS_iiiii
	.globl	_Z23calculate_final_clusterPfPiiii
	.type	_Z23calculate_final_clusterPfPiiii, @function
_Z23calculate_final_clusterPfPiiii:
.LFB4856:
	.cfi_startproc
	endbr64
	movl	%edx, %r11d
	movl	%ecx, %edx
	movl	%r8d, %ecx
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	imull	%edx, %ecx
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%rdi, %r9
	movq	%rsi, %r10
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	xorl	%eax, %eax
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movslq	%ecx, %rcx
	salq	$2, %rcx
.L17:
	movl	%eax, %r12d
	cmpl	%eax, %edx
	jle	.L27
	xorl	%edi, %edi
	xorl	%ebp, %ebp
.L23:
	cmpl	%r8d, %ebp
	jge	.L21
	leal	(%rdi,%r12), %esi
	movss	.LC0(%rip), %xmm0
	movslq	%esi, %rsi
	leaq	(%r10,%rsi,4), %r13
	movslq	%edi, %rsi
	addq	%rax, %rsi
	leaq	(%r9,%rsi,4), %rbx
	xorl	%esi, %esi
.L22:
	cmpl	%r11d, %esi
	jge	.L28
	movss	(%rbx), %xmm1
	comiss	%xmm0, %xmm1
	jb	.L18
	movl	%esi, 0(%r13)
	movaps	%xmm1, %xmm0
.L18:
	incl	%esi
	addq	%rcx, %rbx
	jmp	.L22
.L28:
	incl	%ebp
	addl	%edx, %edi
	jmp	.L23
.L21:
	incq	%rax
	jmp	.L17
.L27:
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4856:
	.size	_Z23calculate_final_clusterPfPiiii, .-_Z23calculate_final_clusterPfPiiii
	.globl	_Z62__device_stub__Z31update_centers_numerator_kernelPfS_S_iiiiS_iPfS_S_iiiiS_i
	.type	_Z62__device_stub__Z31update_centers_numerator_kernelPfS_S_iiiiS_iPfS_S_iiiiS_i, @function
_Z62__device_stub__Z31update_centers_numerator_kernelPfS_S_iiiiS_iPfS_S_iiiiS_i:
.LFB4881:
	.cfi_startproc
	endbr64
	subq	$200, %rsp
	.cfi_def_cfa_offset 208
	movq	216(%rsp), %rax
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	56(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movl	%r9d, 12(%rsp)
	movq	%rax, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 184(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	208(%rsp), %rax
	movq	%rax, 160(%rsp)
	movq	%rsp, %rax
	movq	%rax, 168(%rsp)
	leaq	224(%rsp), %rax
	movq	%rax, 176(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L29
	pushq	56(%rsp)
	.cfi_def_cfa_offset 216
	leaq	_Z31update_centers_numerator_kernelPfS_S_iiiiS_i(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 224
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 216
	popq	%rdx
	.cfi_def_cfa_offset 208
.L29:
	movq	184(%rsp), %rax
	subq	%fs:40, %rax
	je	.L31
	call	__stack_chk_fail@PLT
.L31:
	addq	$200, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4881:
	.size	_Z62__device_stub__Z31update_centers_numerator_kernelPfS_S_iiiiS_iPfS_S_iiiiS_i, .-_Z62__device_stub__Z31update_centers_numerator_kernelPfS_S_iiiiS_iPfS_S_iiiiS_i
	.globl	_Z31update_centers_numerator_kernelPfS_S_iiiiS_i
	.type	_Z31update_centers_numerator_kernelPfS_S_iiiiS_i, @function
_Z31update_centers_numerator_kernelPfS_S_iiiiS_i:
.LFB4882:
	.cfi_startproc
	endbr64
	jmp	_Z62__device_stub__Z31update_centers_numerator_kernelPfS_S_iiiiS_iPfS_S_iiiiS_i
	.cfi_endproc
.LFE4882:
	.size	_Z31update_centers_numerator_kernelPfS_S_iiiiS_i, .-_Z31update_centers_numerator_kernelPfS_S_iiiiS_i
	.globl	_Z64__device_stub__Z33update_centers_denominator_kernelPfS_S_iiiiS_iPfS_S_iiiiS_i
	.type	_Z64__device_stub__Z33update_centers_denominator_kernelPfS_S_iiiiS_iPfS_S_iiiiS_i, @function
_Z64__device_stub__Z33update_centers_denominator_kernelPfS_S_iiiiS_iPfS_S_iiiiS_i:
.LFB4883:
	.cfi_startproc
	endbr64
	subq	$200, %rsp
	.cfi_def_cfa_offset 208
	movq	216(%rsp), %rax
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	56(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movl	%r9d, 12(%rsp)
	movq	%rax, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 184(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	208(%rsp), %rax
	movq	%rax, 160(%rsp)
	movq	%rsp, %rax
	movq	%rax, 168(%rsp)
	leaq	224(%rsp), %rax
	movq	%rax, 176(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L34
	pushq	56(%rsp)
	.cfi_def_cfa_offset 216
	leaq	_Z33update_centers_denominator_kernelPfS_S_iiiiS_i(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 224
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 216
	popq	%rdx
	.cfi_def_cfa_offset 208
.L34:
	movq	184(%rsp), %rax
	subq	%fs:40, %rax
	je	.L36
	call	__stack_chk_fail@PLT
.L36:
	addq	$200, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4883:
	.size	_Z64__device_stub__Z33update_centers_denominator_kernelPfS_S_iiiiS_iPfS_S_iiiiS_i, .-_Z64__device_stub__Z33update_centers_denominator_kernelPfS_S_iiiiS_iPfS_S_iiiiS_i
	.globl	_Z33update_centers_denominator_kernelPfS_S_iiiiS_i
	.type	_Z33update_centers_denominator_kernelPfS_S_iiiiS_i, @function
_Z33update_centers_denominator_kernelPfS_S_iiiiS_i:
.LFB4884:
	.cfi_startproc
	endbr64
	jmp	_Z64__device_stub__Z33update_centers_denominator_kernelPfS_S_iiiiS_iPfS_S_iiiiS_i
	.cfi_endproc
.LFE4884:
	.size	_Z33update_centers_denominator_kernelPfS_S_iiiiS_i, .-_Z33update_centers_denominator_kernelPfS_S_iiiiS_i
	.globl	_Z52__device_stub__Z24update_membership_kernelPfS_S_iiiiPfS_S_iiii
	.type	_Z52__device_stub__Z24update_membership_kernelPfS_S_iiiiPfS_S_iiii, @function
_Z52__device_stub__Z24update_membership_kernelPfS_S_iiiiPfS_S_iiii:
.LFB4885:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	56(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movl	%r9d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	192(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L39
	pushq	56(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z24update_membership_kernelPfS_S_iiii(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 208
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L39:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L41
	call	__stack_chk_fail@PLT
.L41:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4885:
	.size	_Z52__device_stub__Z24update_membership_kernelPfS_S_iiiiPfS_S_iiii, .-_Z52__device_stub__Z24update_membership_kernelPfS_S_iiiiPfS_S_iiii
	.globl	_Z24update_membership_kernelPfS_S_iiii
	.type	_Z24update_membership_kernelPfS_S_iiii, @function
_Z24update_membership_kernelPfS_S_iiii:
.LFB4886:
	.cfi_startproc
	endbr64
	jmp	_Z52__device_stub__Z24update_membership_kernelPfS_S_iiiiPfS_S_iiii
	.cfi_endproc
.LFE4886:
	.size	_Z24update_membership_kernelPfS_S_iiii, .-_Z24update_membership_kernelPfS_S_iiii
	.globl	_Z8fcm_stepPfS_S_iiiiiiS_
	.type	_Z8fcm_stepPfS_S_iiiiiiS_, @function
_Z8fcm_stepPfS_S_iiiiiiS_:
.LFB4855:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	%ecx, %r15d
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	imull	%r8d, %r15d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movabsq	$4294967297, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movslq	%r15d, %r13
	movq	%rdi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	salq	$2, %r13
	subq	$200, %rsp
	.cfi_def_cfa_offset 256
	movq	280(%rsp), %rax
	movl	%r8d, 48(%rsp)
	leaq	104(%rsp), %rdi
	movl	256(%rsp), %r14d
	movl	%r9d, 84(%rsp)
	movl	%ecx, 4(%rsp)
	movl	272(%rsp), %ebx
	movq	%rsi, 24(%rsp)
	imull	%r15d, %r14d
	movq	%r13, %rsi
	movq	%rdx, 32(%rsp)
	movq	%rax, 88(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 184(%rsp)
	xorl	%eax, %eax
	leal	-1(%r14), %eax
	movslq	%r14d, %r14
	cltd
	idivl	%ebx
	incl	%eax
	movl	%eax, 72(%rsp)
	movl	256(%rsp), %eax
	leal	1(%rax,%rax), %eax
	imull	%ebx, %eax
	sall	$2, %eax
	movl	%eax, 76(%rsp)
	call	cudaMalloc@PLT
	leaq	0(,%r14,4), %rax
	leaq	112(%rsp), %rdi
	xorl	%r14d, %r14d
	movq	%rax, %rsi
	movq	%rax, 8(%rsp)
	call	cudaMalloc@PLT
	movslq	256(%rsp), %rax
	leaq	120(%rsp), %rdi
	salq	$2, %rax
	movq	%rax, %rsi
	movq	%rax, 16(%rsp)
	call	cudaMalloc@PLT
	movq	104(%rsp), %rdi
	movq	%rbp, %rsi
	movq	%r13, %rdx
	movl	$1, %ecx
	movl	%r15d, %ebp
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rdx
	movq	24(%rsp), %rsi
	movl	$1, %ecx
	movq	112(%rsp), %rdi
	salq	$2, %rbp
	call	cudaMemcpy@PLT
	movq	32(%rsp), %rsi
	movq	16(%rsp), %rdx
	movl	$1, %ecx
	movq	120(%rsp), %rdi
	call	cudaMemcpy@PLT
	leal	-1(%r15), %eax
	movl	$4, %edi
	cltd
	idivl	%ebx
	incl	%eax
	movl	%eax, 52(%rsp)
	leal	0(,%rbx,4), %eax
	movl	%eax, 80(%rsp)
	call	_Znam@PLT
	movl	$4, %edi
	movq	%rax, 56(%rsp)
	call	_Znam@PLT
	movq	%rbp, %rsi
	leaq	128(%rsp), %rdi
	movq	%rax, 64(%rsp)
	call	cudaMalloc@PLT
	movq	%rbp, %rsi
	leaq	136(%rsp), %rdi
	call	cudaMalloc@PLT
	movl	52(%rsp), %ebp
	leaq	144(%rsp), %rdi
	salq	$2, %rbp
	movq	%rbp, %rsi
	call	cudaMalloc@PLT
	leaq	152(%rsp), %rdi
	movq	%rbp, %rsi
	call	cudaMalloc@PLT
.L45:
	cmpl	%r14d, 84(%rsp)
	jle	.L56
	movl	72(%rsp), %eax
	movl	76(%rsp), %r8d
	xorl	%r9d, %r9d
	movq	%r12, 176(%rsp)
	movq	%r12, 164(%rsp)
	movl	180(%rsp), %ecx
	movl	%ebx, 172(%rsp)
	movl	168(%rsp), %esi
	movl	%eax, 160(%rsp)
	movq	172(%rsp), %rdx
	movq	160(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L46
	pushq	%rcx
	.cfi_def_cfa_offset 264
	movl	272(%rsp), %eax
	pushq	%rax
	.cfi_def_cfa_offset 272
	movl	272(%rsp), %r9d
	movl	64(%rsp), %r8d
	movl	20(%rsp), %ecx
	movq	128(%rsp), %rdx
	movq	136(%rsp), %rsi
	movq	120(%rsp), %rdi
	call	_Z52__device_stub__Z24update_membership_kernelPfS_S_iiiiPfS_S_iiii
	popq	%rsi
	.cfi_def_cfa_offset 264
	popq	%rdi
	.cfi_def_cfa_offset 256
.L46:
	movl	%r15d, %ebp
	movq	24(%rsp), %rsi
	movl	$3, %ecx
	xorl	%r13d, %r13d
	movq	128(%rsp), %rdi
	salq	$2, %rbp
	movq	%rbp, %rdx
	call	cudaMemcpy@PLT
	movq	24(%rsp), %rsi
	movl	$3, %ecx
	movq	%rbp, %rdx
	movq	136(%rsp), %rdi
	call	cudaMemcpy@PLT
.L47:
	cmpl	256(%rsp), %r13d
	jge	.L57
	movl	52(%rsp), %ebp
.L51:
	movl	80(%rsp), %eax
	movq	%r12, 176(%rsp)
	xorl	%r9d, %r9d
	movq	%r12, 164(%rsp)
	movl	180(%rsp), %ecx
	movl	168(%rsp), %esi
	movl	%ebx, 172(%rsp)
	movq	%rax, %r8
	movl	%ebp, 160(%rsp)
	movq	172(%rsp), %rdx
	movq	160(%rsp), %rdi
	movq	%rax, 40(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L48
	pushq	%rdx
	.cfi_def_cfa_offset 264
	pushq	%r13
	.cfi_def_cfa_offset 272
	pushq	160(%rsp)
	.cfi_def_cfa_offset 280
	movl	288(%rsp), %eax
	pushq	%rax
	.cfi_def_cfa_offset 288
	movl	288(%rsp), %r9d
	movl	80(%rsp), %r8d
	movl	36(%rsp), %ecx
	movq	152(%rsp), %rdx
	movq	144(%rsp), %rsi
	movq	136(%rsp), %rdi
	call	_Z62__device_stub__Z31update_centers_numerator_kernelPfS_S_iiiiS_iPfS_S_iiiiS_i
	addq	$32, %rsp
	.cfi_def_cfa_offset 256
.L48:
	movq	%r12, 176(%rsp)
	movq	40(%rsp), %r8
	xorl	%r9d, %r9d
	movq	%r12, 164(%rsp)
	movl	180(%rsp), %ecx
	movl	%ebx, 172(%rsp)
	movl	168(%rsp), %esi
	movl	%ebp, 160(%rsp)
	movq	172(%rsp), %rdx
	movq	160(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L49
	pushq	%rax
	.cfi_def_cfa_offset 264
	pushq	%r13
	.cfi_def_cfa_offset 272
	pushq	168(%rsp)
	.cfi_def_cfa_offset 280
	movl	288(%rsp), %eax
	pushq	%rax
	.cfi_def_cfa_offset 288
	movl	288(%rsp), %r9d
	movl	80(%rsp), %r8d
	movl	36(%rsp), %ecx
	movq	152(%rsp), %rdx
	movq	144(%rsp), %rsi
	movq	136(%rsp), %rdi
	call	_Z64__device_stub__Z33update_centers_denominator_kernelPfS_S_iiiiS_iPfS_S_iiiiS_i
	addq	$32, %rsp
	.cfi_def_cfa_offset 256
.L49:
	movq	144(%rsp), %rsi
	cmpl	$1, %ebp
	je	.L50
	movl	%ebp, %r15d
	movq	128(%rsp), %rdi
	movl	$3, %ecx
	salq	$2, %r15
	movq	%r15, %rdx
	call	cudaMemcpy@PLT
	movq	152(%rsp), %rsi
	movq	%r15, %rdx
	movq	136(%rsp), %rdi
	movl	$3, %ecx
	movl	%ebp, %r15d
	call	cudaMemcpy@PLT
	leal	-1(%rbp), %eax
	xorl	%edx, %edx
	divl	%ebx
	leal	1(%rax), %ebp
	jmp	.L51
.L50:
	movq	56(%rsp), %rdi
	movl	$2, %ecx
	movl	$4, %edx
	incl	%r13d
	call	cudaMemcpy@PLT
	movq	64(%rsp), %rdi
	movl	$2, %ecx
	movq	152(%rsp), %rsi
	movl	$4, %edx
	call	cudaMemcpy@PLT
	movq	56(%rsp), %rax
	movss	(%rax), %xmm0
	movq	64(%rsp), %rax
	divss	(%rax), %xmm0
	movq	32(%rsp), %rax
	movss	%xmm0, (%rax,%r14,4)
	jmp	.L47
.L57:
	incq	%r14
	jmp	.L45
.L56:
	movq	8(%rsp), %rdx
	movq	112(%rsp), %rsi
	movl	$2, %ecx
	movq	88(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rdx
	movq	120(%rsp), %rsi
	movl	$2, %ecx
	movq	32(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	104(%rsp), %rdi
	call	cudaFree@PLT
	movq	112(%rsp), %rdi
	call	cudaFree@PLT
	movq	120(%rsp), %rdi
	call	cudaFree@PLT
	movq	184(%rsp), %rax
	subq	%fs:40, %rax
	je	.L53
	call	__stack_chk_fail@PLT
.L53:
	addq	$200, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4855:
	.size	_Z8fcm_stepPfS_S_iiiiiiS_, .-_Z8fcm_stepPfS_S_iiiiiiS_
	.globl	_Z43__device_stub__Z15fcm_step_kernelPfS_S_iiiiPfS_S_iiii
	.type	_Z43__device_stub__Z15fcm_step_kernelPfS_S_iiiiPfS_S_iiii, @function
_Z43__device_stub__Z15fcm_step_kernelPfS_S_iiiiPfS_S_iiii:
.LFB4887:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	56(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movl	%r9d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	192(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L58
	pushq	56(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z15fcm_step_kernelPfS_S_iiii(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 208
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L58:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L60
	call	__stack_chk_fail@PLT
.L60:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4887:
	.size	_Z43__device_stub__Z15fcm_step_kernelPfS_S_iiiiPfS_S_iiii, .-_Z43__device_stub__Z15fcm_step_kernelPfS_S_iiiiPfS_S_iiii
	.globl	_Z15fcm_step_kernelPfS_S_iiii
	.type	_Z15fcm_step_kernelPfS_S_iiii, @function
_Z15fcm_step_kernelPfS_S_iiii:
.LFB4888:
	.cfi_startproc
	endbr64
	jmp	_Z43__device_stub__Z15fcm_step_kernelPfS_S_iiiiPfS_S_iiii
	.cfi_endproc
.LFE4888:
	.size	_Z15fcm_step_kernelPfS_S_iiii, .-_Z15fcm_step_kernelPfS_S_iiii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"_Z15fcm_step_kernelPfS_S_iiii"
.LC2:
	.string	"_Z24update_membership_kernelPfS_S_iiii"
.LC3:
	.string	"_Z33update_centers_denominator_kernelPfS_S_iiiiS_i"
.LC4:
	.string	"_Z31update_centers_numerator_kernelPfS_S_iiiiS_i"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB4890:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC1(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z15fcm_step_kernelPfS_S_iiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC2(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z24update_membership_kernelPfS_S_iiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC3(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z33update_centers_denominator_kernelPfS_S_iiiiS_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC4(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z31update_centers_numerator_kernelPfS_S_iiiiS_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE4890:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.text._ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EE11_M_gen_randEv,"axG",@progbits,_ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EE11_M_gen_randEv,comdat
	.align 2
	.weak	_ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EE11_M_gen_randEv
	.type	_ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EE11_M_gen_randEv, @function
_ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EE11_M_gen_randEv:
.LFB5586:
	.cfi_startproc
	endbr64
	movq	%rdi, %rax
	xorl	%edx, %edx
	movl	$2567483615, %edi
.L67:
	movq	(%rax,%rdx,8), %rsi
	incq	%rdx
	movq	(%rax,%rdx,8), %rcx
	andq	$-2147483648, %rsi
	andl	$2147483647, %ecx
	orq	%rsi, %rcx
	movq	%rcx, %rsi
	shrq	%rsi
	xorq	3168(%rax,%rdx,8), %rsi
	andl	$1, %ecx
	je	.L66
	movq	%rdi, %rcx
.L66:
	xorq	%rsi, %rcx
	movq	%rcx, -8(%rax,%rdx,8)
	cmpq	$227, %rdx
	jne	.L67
	movl	$2567483615, %edi
.L69:
	movq	(%rax,%rdx,8), %rsi
	incq	%rdx
	movq	(%rax,%rdx,8), %rcx
	andq	$-2147483648, %rsi
	andl	$2147483647, %ecx
	orq	%rsi, %rcx
	movq	%rcx, %rsi
	shrq	%rsi
	xorq	-1824(%rax,%rdx,8), %rsi
	andl	$1, %ecx
	je	.L68
	movq	%rdi, %rcx
.L68:
	xorq	%rsi, %rcx
	movq	%rcx, -8(%rax,%rdx,8)
	cmpq	$623, %rdx
	jne	.L69
	movq	4984(%rax), %rdx
	movq	(%rax), %rcx
	andq	$-2147483648, %rdx
	andl	$2147483647, %ecx
	orq	%rcx, %rdx
	movq	%rdx, %rcx
	shrq	%rcx
	xorq	3168(%rax), %rcx
	andl	$1, %edx
	je	.L70
	movl	$2567483615, %edx
.L70:
	xorq	%rcx, %rdx
	movq	%rdx, 4984(%rax)
	xorl	%edx, %edx
	movq	%rdx, 4992(%rax)
	ret
	.cfi_endproc
.LFE5586:
	.size	_ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EE11_M_gen_randEv, .-_ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EE11_M_gen_randEv
	.section	.rodata.str1.1
.LC8:
	.string	"default"
	.text
	.globl	_Z12init_centersPfi
	.type	_Z12init_centersPfi, @function
_Z12init_centersPfi:
.LFB4851:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA4851
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$4096, %rsp
	.cfi_def_cfa_offset 4152
	orq	$0, (%rsp)
	subq	$4096, %rsp
	.cfi_def_cfa_offset 8248
	orq	$0, (%rsp)
	subq	$1864, %rsp
	.cfi_def_cfa_offset 10112
	movq	%fs:40, %rax
	movq	%rax, 10040(%rsp)
	movabsq	$2305843009213693950, %rax
	movslq	%esi, %rdi
	cmpq	%rdi, %rax
	jb	.L83
	movq	%rdi, %r13
	salq	$2, %rdi
	xorl	%r12d, %r12d
	leaq	7+.LC8(%rip), %r15
.LEHB0:
	call	_Znam@PLT
	movq	%rax, %r14
	jmp	.L84
.L83:
	movq	10040(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L107
	call	__cxa_throw_bad_array_new_length@PLT
.LEHE0:
.L110:
	divsd	8(%rsp), %xmm0
	comisd	.LC6(%rip), %xmm0
	jb	.L94
	movsd	.LC7(%rip), %xmm0
.L94:
	xorps	%xmm1, %xmm1
	movq	16(%rsp), %rdi
	addsd	%xmm1, %xmm0
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, (%r14,%r12,4)
	incq	%r12
	call	_ZNSt13random_device7_M_finiEv@PLT
.L84:
	cmpl	%r12d, %r13d
	jle	.L109
	leaq	5056(%rsp), %rdi
	leaq	-7(%r15), %rsi
	movq	%r15, %rdx
	movq	%rdi, 5040(%rsp)
	leaq	5040(%rsp), %rbx
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE13_S_copy_charsEPcPKcS7_@PLT
	movq	5040(%rsp), %rax
	movq	%rbx, %rsi
	movq	$7, 5048(%rsp)
	movb	$0, 7(%rax)
	leaq	40(%rsp), %rax
	movq	%rax, %rdi
	movq	%rax, 16(%rsp)
.LEHB1:
	call	_ZNSt13random_device7_M_initERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE@PLT
.LEHE1:
	movq	%rbx, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	movq	16(%rsp), %rdi
.LEHB2:
	call	_ZNSt13random_device9_M_getvalEv@PLT
.LEHE2:
	movl	%eax, %eax
	movl	$1, %edx
	movq	%rax, 5040(%rsp)
	jmp	.L89
.L102:
	endbr64
	movq	%rax, %rbp
.L87:
	movq	%rbx, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	movq	%rbp, %rdi
	movq	10040(%rsp), %rax
	subq	%fs:40, %rax
	je	.L108
	jmp	.L107
.L89:
	movq	-8(%rbx,%rdx,8), %rax
	movq	%rax, %rcx
	shrq	$30, %rcx
	xorq	%rcx, %rax
	imulq	$1812433253, %rax, %rax
	addl	%edx, %eax
	movq	%rax, (%rbx,%rdx,8)
	incq	%rdx
	cmpq	$624, %rdx
	jne	.L89
	movsd	.LC6(%rip), %xmm2
	movl	$2, %ebp
	xorps	%xmm0, %xmm0
	movq	$624, 10032(%rsp)
	movsd	%xmm2, 8(%rsp)
.L93:
	cmpq	$623, 10032(%rsp)
	jbe	.L90
	movq	%rbx, %rdi
	movsd	%xmm0, 24(%rsp)
	call	_ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EE11_M_gen_randEv
	movsd	24(%rsp), %xmm0
.L90:
	movq	10032(%rsp), %rax
	leaq	1(%rax), %rcx
	movq	5040(%rsp,%rax,8), %rax
	movq	%rcx, 10032(%rsp)
	movq	%rax, %rcx
	shrq	$11, %rcx
	movl	%ecx, %ecx
	xorq	%rcx, %rax
	movq	%rax, %rcx
	salq	$7, %rcx
	andl	$2636928640, %ecx
	xorq	%rcx, %rax
	movq	%rax, %rcx
	salq	$15, %rcx
	andl	$4022730752, %ecx
	xorq	%rcx, %rax
	movq	%rax, %rcx
	shrq	$18, %rcx
	xorq	%rcx, %rax
	js	.L91
	cvtsi2sdq	%rax, %xmm1
	jmp	.L92
.L91:
	movq	%rax, %rcx
	andl	$1, %eax
	shrq	%rcx
	orq	%rax, %rcx
	cvtsi2sdq	%rcx, %xmm1
	addsd	%xmm1, %xmm1
.L92:
	mulsd	8(%rsp), %xmm1
	flds	.LC9(%rip)
	decl	%ebp
	fmull	8(%rsp)
	addsd	%xmm1, %xmm0
	fstpl	8(%rsp)
	je	.L110
	movl	$1, %ebp
	jmp	.L93
.L101:
	endbr64
	movq	%rax, %rbx
.L96:
	movq	16(%rsp), %rdi
	call	_ZNSt13random_device7_M_finiEv@PLT
	movq	%rbx, %rdi
	movq	10040(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L107
.L108:
.LEHB3:
	call	_Unwind_Resume@PLT
.LEHE3:
.L109:
	movq	10040(%rsp), %rax
	subq	%fs:40, %rax
	je	.L98
.L107:
	call	__stack_chk_fail@PLT
.L98:
	addq	$10056, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4851:
	.globl	__gxx_personality_v0
	.section	.gcc_except_table,"a",@progbits
.LLSDA4851:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE4851-.LLSDACSB4851
.LLSDACSB4851:
	.uleb128 .LEHB0-.LFB4851
	.uleb128 .LEHE0-.LEHB0
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB1-.LFB4851
	.uleb128 .LEHE1-.LEHB1
	.uleb128 .L102-.LFB4851
	.uleb128 0
	.uleb128 .LEHB2-.LFB4851
	.uleb128 .LEHE2-.LEHB2
	.uleb128 .L101-.LFB4851
	.uleb128 0
	.uleb128 .LEHB3-.LFB4851
	.uleb128 .LEHE3-.LEHB3
	.uleb128 0
	.uleb128 0
.LLSDACSE4851:
	.text
	.size	_Z12init_centersPfi, .-_Z12init_centersPfi
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC0:
	.long	-971228160
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC6:
	.long	0
	.long	1072693248
	.align 8
.LC7:
	.long	-1
	.long	1072693247
	.section	.rodata.cst4
	.align 4
.LC9:
	.long	1333788672
	.hidden	DW.ref.__gxx_personality_v0
	.weak	DW.ref.__gxx_personality_v0
	.section	.data.rel.local.DW.ref.__gxx_personality_v0,"awG",@progbits,DW.ref.__gxx_personality_v0,comdat
	.align 8
	.type	DW.ref.__gxx_personality_v0, @object
	.size	DW.ref.__gxx_personality_v0, 8
DW.ref.__gxx_personality_v0:
	.quad	__gxx_personality_v0
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

// #include <stdio.h>
// #include <iostream>
// #include <fstream>
// #include <time.h>
// #include <random>
// #include "reduction_fcm.cuh"

// using namespace std;

// __host__ void init_membership(float *i_membership, int i_rows, int i_cols, int i_num_clutsers) {
//     // cout << i_cols << endl;
//     // cout << i_rows << endl;
//     // cout << "Init m start"  << endl;

//     // 1d-configuration
//     int len = i_rows * i_cols * i_num_clutsers;
//     i_membership = new float[len];
//     for (int i = 0; i < len; ++i) {
//         i_membership[i] = 1 / (float)i_num_clutsers;
//     }

//     // cout << "Init m done"  << endl;

//     // 3d-configuration
//     // i_membership = new float** [i_rows];

//     // for (int i = 0; i < i_rows; ++i) {
//     //     i_membership[i] = new float* [i_cols];
//     //     // i_new_membership[i] = new float* [i_cols];
//     //     for (int j = 0; j < i_cols; ++j) {
//     //         i_membership[i][j] = new float[i_num_clutsers];
//     //         // i_new_membership[i][j] = new float[i_num_clutsers];
//     //     }
        
//     // }

//     // for (int i = 0; i < i_rows; ++i) {
//     //     for (int j = 0; j < i_cols; ++j) {
//     //         for (int k = 0; k < i_num_clutsers; ++k) {
//     //             i_membership[i][j][k] = 1 / (float)i_num_clutsers;
//     //             // i_new_membership[i][j][k] = 99999;
//     //         }
//     //     }
//     // }

// }

// __host__ void init_centers(float *i_cluster_centers, int i_num_clutsers) {
//     // cout << "Init c start"  << endl;
//     i_cluster_centers = new float[i_num_clutsers];

//     for (int i = 0; i < i_num_clutsers; ++i) {
//         // randomly select i_num_clutsers points as cluster centers

//         // random generator
//         random_device rd;
//         mt19937 eng(rd());
//         uniform_real_distribution<> dist(0, 1);

//         i_cluster_centers[i] = dist(eng);
//     }

//     // cout << "Init c done"  << endl;

//     // cout << "Centers: " << endl;
//     // for (int i = 0; i < i_num_clutsers; ++i) {
//     //     cout << i_cluster_centers[i] << endl;
//     // }
// }

// __host__ void init_final_cluster(int* i_final_cluster, int rows, int cols) {
//     // cout << "Init f start"  << endl;
//     // i_final_cluster = new int[rows * cols];
//     for (int i  = 0; i < rows * cols; ++i) {
//         i_final_cluster[i] = -1;
//     }
//     // cout << "Init f done"  << endl;
// }

// __device__ float eucl_distance(float center, float val) {
//     // val: data point value
//     // i: cluster center point value
//     return sqrt(pow(val - center, 2));
// }

// __global__ void update_centers_numerator_kernel(float *i_image, float *i_membership, float *i_cluster_centers, int i_rows, int i_cols, int i_num_clutsers, int i_m, float* numerator, int c) {
//     extern __shared__ float shared_d[];
//     int global_idx = blockIdx.x * blockDim.x + threadIdx.x;
//     int i = global_idx % i_rows;
//     int j = (global_idx - i) / i_rows;
//     int k = c;

//     // printf("1\n");

//     // each thread loads one element into shared memory
//     if (global_idx < i_rows * i_cols) {
//         shared_d[threadIdx.x] = i_image[i + i_rows * j] * pow(i_membership[k * i_rows * i_cols + j * i_rows + i], i_m); 
//     }
//     else {
//         shared_d[threadIdx.x] = 0;
//     }
//     __syncthreads();

//     // do reduction in shared memory
//     for (unsigned int s = blockDim.x / 2; s > 0; s >>= 1) {
//         if (threadIdx.x < s) {
//             shared_d[threadIdx.x] += shared_d[threadIdx.x + s];
//         }
//         __syncthreads();
//     }
    
//     // write result back to global memory
//     if (threadIdx.x == 0) {
//         numerator[blockIdx.x] = shared_d[0];
//     }

// }

// __global__ void update_centers_denominator_kernel(float *i_image, float *i_membership, float *i_cluster_centers, int i_rows, int i_cols, int i_num_clutsers, int i_m, float* denominator, int c) {
//     // printf("222\n");
//     extern __shared__ float shared_d[];
//     int global_idx = blockIdx.x * blockDim.x + threadIdx.x;
//     int i = global_idx % i_rows;
//     int j = (global_idx - i) / i_rows;
//     int k = c;

//     // printf("2\n");

//     // each thread loads one element into shared memory
//     if (global_idx < i_rows * i_cols) {
//         shared_d[threadIdx.x] = pow(i_membership[k * i_rows * i_cols + j * i_rows + i], i_m);
//     }
//     else {
//         shared_d[threadIdx.x] = 0;
//     }
//     __syncthreads();

//     // do reduction in shared memory
//     for (unsigned int s = blockDim.x / 2; s > 0; s >>= 1) {
//         if (threadIdx.x < s) {
//             shared_d[threadIdx.x] += shared_d[threadIdx.x + s];
//         }
//         __syncthreads();
//     }
    
//     // write result back to global memory
//     if (threadIdx.x == 0) {
//         denominator[blockIdx.x] = shared_d[0];
//     }
// }

// // __global__ void update_centers_kernel(float *i_image, float *i_membership, float *i_cluster_centers, int i_rows, int i_cols, int i_num_clutsers, int i_m, int threads_per_block) {
// //     int global_idx = blockIdx.x * blockDim.x + threadIdx.x;
// //     unsigned int blks = 1 + (i_rows * i_cols - 1) / threads_per_block;
// //     unsigned int in_size = i_rows * i_cols;
// //     unsigned int shared_size = threads_per_block * sizeof(float);
// //     float *res_num = new float[blks];
// //     float *res_den = new float[blks];
// //     float *device_in_num, *device_in_den, *device_out_num, *device_out_den;
// //     float numerator, denominator;

// //     // cudaMalloc((void **)&device_in_num, in_size * sizeof(float));
// //     // cudaMalloc((void **)&device_in_den, in_size * sizeof(float));
// //     // cudaMalloc((void **)&device_out_num, blks * sizeof(float));
// //     // cudaMalloc((void **)&device_out_den, blks * sizeof(float));
// //     // cudaMemcpyAsync(device_in_num, i_membership, in_size * sizeof(float), cudaMemcpyDeviceToDevice);
// //     // cudaMemcpyAsync(device_in_den, i_membership, in_size * sizeof(float), cudaMemcpyDeviceToDevice);

// //     // while (true) {
// //     //     update_centers_numerator_kernel<<<blks, threads_per_block, shared_size>>>(i_image, device_in_num, i_cluster_centers, i_rows, i_cols, i_num_clutsers, i_m, device_out_num, global_idx);
// //     //     printf("g\n");
// //     //     cudaDeviceSynchronize();
// //     //     update_centers_denominator_kernel<<<blks, threads_per_block, shared_size>>>(i_image, device_in_den, i_cluster_centers, i_rows, i_cols, i_num_clutsers, i_m, device_out_den, global_idx);
// //     //     cudaDeviceSynchronize();
// //     //     printf("gg\n");
// //     //     if (blks == 1) {
// //     //         break;
// //     //     }

// //     //     in_size = blks;
// //     //     // device_out now holds the reduce result, copy to device in and reduce again (next time)
// //     //     cudaMemcpyAsync(device_in_num, device_out_num, in_size * sizeof(float), cudaMemcpyDeviceToDevice);
// //     //     cudaMemcpyAsync(device_in_den, device_out_den, in_size * sizeof(float), cudaMemcpyDeviceToDevice);

// //     //     blks = 1 + ((blks - 1) / threads_per_block);
// //     // }

// //     // cudaMemcpyAsync(res_num, device_out_num, sizeof(float), cudaMemcpyDeviceToDevice);
// //     // cudaMemcpyAsync(res_den, device_out_den, sizeof(float), cudaMemcpyDeviceToDevice);

// //     // numerator = res_num[0];
// //     // denominator = res_den[0];

// //     // update the cluster center (finally!)
// //     // i_cluster_centers[global_idx] = numerator / denominator;
// //     __syncthreads();

// //     delete [] res_num;
// //     delete [] res_den;
// //     cudaFree(device_in_num);
// //     cudaFree(device_in_den);
// //     cudaFree(device_out_num);
// //     cudaFree(device_out_den);
// // }

// __global__ void update_membership_kernel(float *i_image, float *i_cluster_centers, float *i_membership, int i_rows, int i_cols, int i_num_clutsers, int i_m) {

//     // calculate degree of membership of each data point (image) regarding each cluster
//     // for (int i = 0; i < i_rows; ++i) {
//     //     for (int j = 0; j < i_cols; ++j) {
//     //         for (int k = 0; k < i_num_clutsers; ++k) {
//     //             // cout << "Hi" << endl;
//     //             // i_new_membership[i][j][k] = calculate_membership_point(i, j, k);
//     //             // FIX!!
//     //             // i_membership[i][j][k] = calculate_membership_point_kernel(i_image, i_cluster_centers, i, j, k, i_num_clutsers, i_m);
//     //         }
//     //     }
//     // }

//     // std::printf("Dafuq?\n");

//     // shared memory that stores: memberships for that pixel, 
//     extern __shared__ float shared_d[];
//     // std::printf("%f???\n", i_image[0]);

//     // global index
//     int global_idx = blockIdx.x * blockDim.x + threadIdx.x;
//     // std::printf("2?\n");
//     // chunk of shared memory each thread gets to use
//     int per_thread_len = 2 + i_num_clutsers;
//     // x, y, z indices in original membership matrix
//     int x = global_idx % i_rows ;
//     int y = ((global_idx - x) / i_rows) % i_cols;
//     int z = ((global_idx - x - y * i_rows) / (i_rows * i_cols));
//     // std::printf("3?\n");


//     // load data into shared memory (each thread loads info for a **single** pixel membership)
//     if (global_idx < i_rows * i_cols * i_num_clutsers) {
//         // load pixel (1)
//         // std::printf("fxxk this sxit %f\n", i_image[global_idx]);
//         shared_d[threadIdx.x * per_thread_len] = i_image[x + y * i_rows];
//         // std::printf("fxxk this sxit %f\n", i_image[global_idx]);
//         // load membership (1)
//         shared_d[threadIdx.x * per_thread_len + 1] = i_membership[(z * i_rows * i_cols) + y * i_rows + x];
//         // load centers (i_num_clutsers)
//         for (int i = 0; i < i_num_clutsers; ++i) {
//             // shared_d[threadIdx.x * per_thread_len + (i + 1)] = i_membership[(x + y * i_rows) * i_num_clutsers + i];
//             shared_d[threadIdx.x * per_thread_len + 1 + (i + 1)] = i_cluster_centers[i];
//         }
//     }
//     else {
//         // std::printf("else???? %f\n", i_image[global_idx]);
//         for (int i = 0; i < per_thread_len; ++i) {
//             shared_d[threadIdx.x] = 0;
//         }
//     }

    
//     // printf("image membership: %f %f \n", shared_d[threadIdx.x * per_thread_len], shared_d[threadIdx.x * per_thread_len + 1]);
//     // printf("   centers: ");
//     // for (int j = 0; j < i_num_clutsers; ++j) {
//     //     printf("center %f", shared_d[threadIdx.x * per_thread_len + 1 + (j + 1)]);
//     // }
//     // printf("\n");
    

//     __syncthreads();

//     // std::printf("Dafuq?\n");

//     // calculate membership for the loaded pixel
//     float d_center = 0, d_all = 0, aggr = 0.0;
//     d_center = eucl_distance(shared_d[threadIdx.x * per_thread_len + 1 + (z + 1)], shared_d[threadIdx.x * per_thread_len]);
//     // std::printf("a, b: %f, %f\n", shared_d[threadIdx.x * per_thread_len + 1 + (z + 1)], shared_d[threadIdx.x * per_thread_len]);
//     for (int c = 0; c < i_num_clutsers; ++c) {
//         d_all = eucl_distance(shared_d[threadIdx.x * per_thread_len + 1 + (c + 1)], shared_d[threadIdx.x * per_thread_len]);
//         aggr += pow((d_center / d_all), 2 / (i_m - 1));
//         // printf("z c d_center d_all: %d %d %f %f \n", z, c, d_center, d_all);
//     }

//     // printf("d_center: %f\n", d_center);
//     // printf("d_all: %f\n", d_all);

//     // std::printf("Dafuq2?\n");

//     // write aggregation results to membership value on shared memory
//     // std::printf("Aggr: %f\n", aggr);
//     // printf("z d_center d_all Aggr: %d %f %f %f\n", z, d_center, d_all, aggr);
//     shared_d[threadIdx.x * per_thread_len + 1] = 1.0 / (float)aggr;
//     // std::printf("PLZ %f\n", shared_d[threadIdx.x * per_thread_len + 1]);

//     // write back membership results to global memory
//     // std::printf("PLZ %f\n", shared_d[threadIdx.x * per_thread_len + 1]);
//     i_membership[(z * i_rows * i_cols) + y * i_rows + x] = 1.0 / (float)aggr;
//     // printf("Member: %f\n", i_membership[(z * i_rows * i_cols) + y * i_rows + x]);
//     // std::printf("WHY %d %d %d %f\n", x, y, z, i_membership[(z * i_rows * i_cols) + y * i_rows + x]);
//     __syncthreads();


//     // print_mebership();

// }


// __device__ float calculate_membership_point_kernel(float *i_image, float *i_cluster_centers, int i, int j, int k, int i_num_clutsers, int i_m) {
//     float d_center = 0, d_all = 0, aggr = 0.0;

//     // FIX!!
//     // d_center = eucl_distance(i_cluster_centers[k], i_image[i][j]);
//     // cout << "d_center: " << d_center << endl;
//     for (int c = 0; c < i_num_clutsers; ++c) {
//         // FIX!!
//         // d_all = eucl_distance(i_cluster_centers[c], i_image[i][j]);
//         // cout << "d_all " << c << ": " << d_all << endl;
//         // cout << "center " << c << ": " << i_cluster_centers[c] << endl;
//         aggr += pow((d_center / d_all), 2 / (i_m - 1));
//     }

//     // cout << "Aggr: " << aggr << endl;

//     return 1.0 /aggr;
// }

// __host__ void fcm_step(float *i_image, float *i_membership, float *i_cluster_centers, int rows, int cols, int T, int i_num_clutsers, int i_m, int threads_per_block, float *out_membership) {
//     // set block size and number of blocks to allocate
//     // dim3 dimBlock(threads_per_block, threads_per_block);
//     // dim3 dimGrid(((rows - 1) / dimBlock.x) + 1, ((cols - 1) / dimBlock.y) + 1);

//     unsigned int blks_m = 1 + (rows * cols * i_num_clutsers - 1) / threads_per_block;
//     // unsigned int blks_c = 1 + (i_num_clutsers - 1) / threads_per_block;
//     unsigned int shared_size_m = ((1 + 2 * i_num_clutsers) * threads_per_block) * sizeof(float);
//     // unsigned int shared_size_c = (i_num_clutsers * threads_per_block) * sizeof(float);

//     // cout << "blkm: " << blks_m << endl;
//     // cout << "blkc: " << blks_c << endl;

//     // // copy output memebership matrix
//     // for (int i = 0; i < rows; ++i) {
//     //     for (int j = 0; j < cols; ++j) {
//     //         for (int k = 0; k < i_num_clutsers; ++k) {
//     //             std::printf("%f\n", i_membership[(k * rows * cols) + j * rows + i]);
//     //         }
//     //     }
//     // }

//     // cudaMemcpy everything!
//     float *d_image, *d_membership, *d_cluster_centers;
//     cudaMalloc((void**)&d_image, rows * cols * sizeof(float));
//     cudaMalloc((void**)&d_membership, rows * cols * i_num_clutsers * sizeof(float));
//     cudaMalloc((void**)&d_cluster_centers, i_num_clutsers * sizeof(float));
//     // cudaMalloc((void**)&out_membership, rows * cols * i_num_clutsers * sizeof(float));

//     cudaMemcpy(d_image, i_image, rows * cols * sizeof(float), cudaMemcpyHostToDevice);
//     cudaMemcpy(d_membership, i_membership, rows * cols * i_num_clutsers * sizeof(float), cudaMemcpyHostToDevice);
//     cudaMemcpy(d_cluster_centers, i_cluster_centers, i_num_clutsers * sizeof(float), cudaMemcpyHostToDevice);

//     // kernel config parameters for reduction
//     unsigned int blks_c = 1 + (rows * cols - 1) / threads_per_block;
//     unsigned int in_size = rows * cols;
//     unsigned int shared_size_c = threads_per_block * sizeof(float);

//     // memory allocations for reduction
//     float *numerator = new float[1];
//     float *denominator = new float[1];
//     float *device_in_num, *device_in_den, *device_out_num, *device_out_den;
//     cudaMalloc((void **)&device_in_num, in_size * sizeof(float));
//     cudaMalloc((void **)&device_in_den, in_size * sizeof(float));
//     cudaMalloc((void **)&device_out_num, blks_c * sizeof(float));
//     cudaMalloc((void **)&device_out_den, blks_c * sizeof(float));


//     // iteratively update membership and centers for T epochs
//     for (int i = 0; i < T; ++i) {
//         // cout << "Hi" << endl;
//         // fcm_step_kernel<<<dimGrid, dimBlock, shared_size>>>(i_image, i_membership, i_cluster_centers, rows, cols, i_num_clutsers, i_m);
//         // 1D grid of 2D blocks
//         update_membership_kernel<<<blks_m, threads_per_block, shared_size_m>>>(d_image, d_cluster_centers, d_membership, rows, cols, i_num_clutsers, i_m);
//         // cudaDeviceSynchronize();
//         // reduce each center with numerator and denominator reduction
        
//         // cudaMemcpy(device_in_num, d_membership, in_size * sizeof(float), cudaMemcpyDeviceToDevice);
//         // cudaMemcpy(device_in_den, d_membership, in_size * sizeof(float), cudaMemcpyDeviceToDevice);
//         cudaMemcpy(device_in_num, d_membership, in_size * sizeof(float), cudaMemcpyHostToDevice);
//         cudaMemcpy(device_in_den, d_membership, in_size * sizeof(float), cudaMemcpyHostToDevice);

//         for (int j = 0; j < i_num_clutsers; ++j) {
//             blks_c = 1 + (rows * cols - 1) / threads_per_block;
//             while (true) {
//                 update_centers_numerator_kernel<<<blks_c, threads_per_block, shared_size_c>>>(d_image, device_in_num, d_cluster_centers, rows, cols, i_num_clutsers, i_m, device_out_num, j);
//                 update_centers_denominator_kernel<<<blks_c, threads_per_block, shared_size_c>>>(d_image, device_in_den, d_cluster_centers, rows, cols, i_num_clutsers, i_m, device_out_den, j);
                
//                 // don't re-initialize if we already have the final reduction result
//                 if (blks_c == 1) {
//                     break;
//                 }

//                 in_size = blks_c;

//                 // device_out now holds the reduce result, copy to device in and reduce again (next time)
//                 cudaMemcpy(device_in_num, device_out_num, in_size * sizeof(float), cudaMemcpyDeviceToDevice);
//                 cudaMemcpy(device_in_den, device_out_den, in_size * sizeof(float), cudaMemcpyDeviceToDevice);

//                 blks_c = 1 + ((blks_c - 1) / threads_per_block);

//             }
//             cudaMemcpy(numerator, device_out_num, sizeof(float), cudaMemcpyDeviceToHost);
//             cudaMemcpy(denominator, device_out_den, sizeof(float), cudaMemcpyDeviceToHost);

//             // update center values
//             i_cluster_centers[i] = numerator[0] / denominator[0];
//         }

//         // update_centers_kernel<<<blks_c, threads_per_block, shared_size_c>>>(d_image, d_membership, d_cluster_centers, rows, cols, i_num_clutsers, i_m, threads_per_block);
//         // cudaDeviceSynchronize();
//         // cout << "Bye" << endl;
//     }
//     // fcm_step_kernel<<<dimGrid, dimBlock, shared_size>>>(i_image, i_membership, i_cluster_centers, rows, cols, i_num_clutsers, i_m);

//     cudaMemcpy(out_membership, d_membership, rows * cols * i_num_clutsers * sizeof(float), cudaMemcpyDeviceToHost);
//     cudaMemcpy(i_cluster_centers, d_cluster_centers, i_num_clutsers * sizeof(float), cudaMemcpyDeviceToHost);

//     cudaFree(d_image);
//     cudaFree(d_membership);
//     cudaFree(d_cluster_centers);
// }

// __global__ void fcm_step_kernel(float *i_image, float *i_membership, float *i_cluster_centers, int rows, int cols, int i_num_clutsers, int i_m) {
//     // update_membership_kernel(i_image, i_cluster_centers, i_membership, rows, cols, i_num_clutsers, i_m);
//     // update_centers_kernel(i_image, i_membership, i_cluster_centers, rows, cols, i_num_clutsers, i_m);
// }


// __host__ void calculate_final_cluster(float *i_membership, int *i_final_cluster, int i_num_clutsers, int i_rows, int i_cols) {
//     // cout << "Membership: " << endl;
//     // for (int i = 0; i < i_rows; ++i) {
//     //     for (int j = 0; j < i_cols; ++j) {
//     //         float tmp_max = -999;
//     //         for (int k = 0; k < i_num_clutsers; ++k) {
//     //             // FIX!!
//     //             // if (i_membership[i][j][k] >= tmp_max) {
//     //             //     // cout << "hi" << endl;
//     //             //     tmp_max = i_membership[i][j][k];
//     //             //     // i_final_cluster[i][j] = 255 / (float)(k + 1);
//     //             //     i_final_cluster[i][j] = k;
//     //             // }
//     //             int k = 0;
//     //             // cout << i_membership[i][j][k] << " ";
//     //         }
//     //         // cout << endl;
//     //     }
//     // }

//     for (int i = 0; i < i_rows; ++i) {
//         for (int j = 0; j < i_cols; ++j) {
//             float tmp_max = -9999;
//             // std::printf("[");
//             for (int k = 0; k < i_num_clutsers; ++k) {
//                 // std::printf("%f ", i_membership[(k * i_rows * i_cols) + j * i_rows + i]);
//                 if (i_membership[(k * i_rows * i_cols) + j * i_rows + i] >= tmp_max) {
//                     tmp_max = i_membership[(k * i_rows * i_cols) + j * i_rows + i];
//                     i_final_cluster[j * i_rows + i] = k;
//                 }
//             }
//             // std::printf("]");
//         }
//         // std::printf("\n");
//     }

// }





#include <hip/hip_runtime.h>
#include <stdio.h>
#include <iostream>
#include <fstream>
#include <time.h>
#include <random>
#include "reduction_fcm.cuh"

using namespace std;

__host__ void init_membership(float *i_membership, int i_rows, int i_cols, int i_num_clutsers) {
    // cout << i_cols << endl;
    // cout << i_rows << endl;
    // cout << "Init m start"  << endl;

    // 1d-configuration
    int len = i_rows * i_cols * i_num_clutsers;
    i_membership = new float[len];
    for (int i = 0; i < len; ++i) {
        i_membership[i] = 1 / (float)i_num_clutsers;
    }

    // cout << "Init m done"  << endl;

    // 3d-configuration
    // i_membership = new float** [i_rows];

    // for (int i = 0; i < i_rows; ++i) {
    //     i_membership[i] = new float* [i_cols];
    //     // i_new_membership[i] = new float* [i_cols];
    //     for (int j = 0; j < i_cols; ++j) {
    //         i_membership[i][j] = new float[i_num_clutsers];
    //         // i_new_membership[i][j] = new float[i_num_clutsers];
    //     }
        
    // }

    // for (int i = 0; i < i_rows; ++i) {
    //     for (int j = 0; j < i_cols; ++j) {
    //         for (int k = 0; k < i_num_clutsers; ++k) {
    //             i_membership[i][j][k] = 1 / (float)i_num_clutsers;
    //             // i_new_membership[i][j][k] = 99999;
    //         }
    //     }
    // }

}

__host__ void init_centers(float *i_cluster_centers, int i_num_clutsers) {
    // cout << "Init c start"  << endl;
    i_cluster_centers = new float[i_num_clutsers];

    for (int i = 0; i < i_num_clutsers; ++i) {
        // randomly select i_num_clutsers points as cluster centers

        // random generator
        random_device rd;
        mt19937 eng(rd());
        uniform_real_distribution<> dist(0, 1);

        i_cluster_centers[i] = dist(eng);
    }

    // cout << "Init c done"  << endl;

    // cout << "Centers: " << endl;
    // for (int i = 0; i < i_num_clutsers; ++i) {
    //     cout << i_cluster_centers[i] << endl;
    // }
}

__host__ void init_final_cluster(int* i_final_cluster, int rows, int cols) {
    // cout << "Init f start"  << endl;
    // i_final_cluster = new int[rows * cols];
    for (int i  = 0; i < rows * cols; ++i) {
        i_final_cluster[i] = -1;
    }
    // cout << "Init f done"  << endl;
}

__device__ float eucl_distance(float center, float val) {
    // val: data point value
    // i: cluster center point value
    return sqrt(pow(val - center, 2));
}

__global__ void update_centers_numerator_kernel(float *i_image, float *i_membership, float *i_cluster_centers, int i_rows, int i_cols, int i_num_clutsers, int i_m, float* numerator, int c) {
    extern __shared__ float shared_d[];
    int global_idx = blockIdx.x * blockDim.x + threadIdx.x;
    int i = global_idx % i_rows;
    int j = (global_idx - i) / i_rows;
    int k = c;

    // printf("1\n");

    // each thread loads one element into shared memory
    if (global_idx < i_rows * i_cols) {
        shared_d[threadIdx.x] = i_image[i + i_rows * j] * pow(i_membership[k * i_rows * i_cols + j * i_rows + i], i_m); 
    }
    else {
        shared_d[threadIdx.x] = 0;
    }
    __syncthreads();

    // do reduction in shared memory
    for (unsigned int s = blockDim.x / 2; s > 0; s >>= 1) {
        if (threadIdx.x < s) {
            shared_d[threadIdx.x] += shared_d[threadIdx.x + s];
        }
        __syncthreads();
    }
    
    // write result back to global memory
    if (threadIdx.x == 0) {
        numerator[blockIdx.x] = shared_d[0];
    }

}

__global__ void update_centers_denominator_kernel(float *i_image, float *i_membership, float *i_cluster_centers, int i_rows, int i_cols, int i_num_clutsers, int i_m, float* denominator, int c) {
    // printf("222\n");
    extern __shared__ float shared_d[];
    int global_idx = blockIdx.x * blockDim.x + threadIdx.x;
    int i = global_idx % i_rows;
    int j = (global_idx - i) / i_rows;
    int k = c;

    // printf("2\n");

    // each thread loads one element into shared memory
    if (global_idx < i_rows * i_cols) {
        shared_d[threadIdx.x] = pow(i_membership[k * i_rows * i_cols + j * i_rows + i], i_m);
    }
    else {
        shared_d[threadIdx.x] = 0;
    }
    __syncthreads();

    // do reduction in shared memory
    for (unsigned int s = blockDim.x / 2; s > 0; s >>= 1) {
        if (threadIdx.x < s) {
            shared_d[threadIdx.x] += shared_d[threadIdx.x + s];
        }
        __syncthreads();
    }
    
    // write result back to global memory
    if (threadIdx.x == 0) {
        denominator[blockIdx.x] = shared_d[0];
    }
}

// __global__ void update_centers_kernel(float *i_image, float *i_membership, float *i_cluster_centers, int i_rows, int i_cols, int i_num_clutsers, int i_m, int threads_per_block) {
//     int global_idx = blockIdx.x * blockDim.x + threadIdx.x;
//     unsigned int blks = 1 + (i_rows * i_cols - 1) / threads_per_block;
//     unsigned int in_size = i_rows * i_cols;
//     unsigned int shared_size = threads_per_block * sizeof(float);
//     float *res_num = new float[blks];
//     float *res_den = new float[blks];
//     float *device_in_num, *device_in_den, *device_out_num, *device_out_den;
//     float numerator, denominator;

//     // cudaMalloc((void **)&device_in_num, in_size * sizeof(float));
//     // cudaMalloc((void **)&device_in_den, in_size * sizeof(float));
//     // cudaMalloc((void **)&device_out_num, blks * sizeof(float));
//     // cudaMalloc((void **)&device_out_den, blks * sizeof(float));
//     // cudaMemcpyAsync(device_in_num, i_membership, in_size * sizeof(float), cudaMemcpyDeviceToDevice);
//     // cudaMemcpyAsync(device_in_den, i_membership, in_size * sizeof(float), cudaMemcpyDeviceToDevice);

//     // while (true) {
//     //     update_centers_numerator_kernel<<<blks, threads_per_block, shared_size>>>(i_image, device_in_num, i_cluster_centers, i_rows, i_cols, i_num_clutsers, i_m, device_out_num, global_idx);
//     //     printf("g\n");
//     //     cudaDeviceSynchronize();
//     //     update_centers_denominator_kernel<<<blks, threads_per_block, shared_size>>>(i_image, device_in_den, i_cluster_centers, i_rows, i_cols, i_num_clutsers, i_m, device_out_den, global_idx);
//     //     cudaDeviceSynchronize();
//     //     printf("gg\n");
//     //     if (blks == 1) {
//     //         break;
//     //     }

//     //     in_size = blks;
//     //     // device_out now holds the reduce result, copy to device in and reduce again (next time)
//     //     cudaMemcpyAsync(device_in_num, device_out_num, in_size * sizeof(float), cudaMemcpyDeviceToDevice);
//     //     cudaMemcpyAsync(device_in_den, device_out_den, in_size * sizeof(float), cudaMemcpyDeviceToDevice);

//     //     blks = 1 + ((blks - 1) / threads_per_block);
//     // }

//     // cudaMemcpyAsync(res_num, device_out_num, sizeof(float), cudaMemcpyDeviceToDevice);
//     // cudaMemcpyAsync(res_den, device_out_den, sizeof(float), cudaMemcpyDeviceToDevice);

//     // numerator = res_num[0];
//     // denominator = res_den[0];

//     // update the cluster center (finally!)
//     // i_cluster_centers[global_idx] = numerator / denominator;
//     __syncthreads();

//     delete [] res_num;
//     delete [] res_den;
//     cudaFree(device_in_num);
//     cudaFree(device_in_den);
//     cudaFree(device_out_num);
//     cudaFree(device_out_den);
// }

__global__ void update_membership_kernel(float *i_image, float *i_cluster_centers, float *i_membership, int i_rows, int i_cols, int i_num_clutsers, int i_m) {

    // calculate degree of membership of each data point (image) regarding each cluster
    // for (int i = 0; i < i_rows; ++i) {
    //     for (int j = 0; j < i_cols; ++j) {
    //         for (int k = 0; k < i_num_clutsers; ++k) {
    //             // cout << "Hi" << endl;
    //             // i_new_membership[i][j][k] = calculate_membership_point(i, j, k);
    //             // FIX!!
    //             // i_membership[i][j][k] = calculate_membership_point_kernel(i_image, i_cluster_centers, i, j, k, i_num_clutsers, i_m);
    //         }
    //     }
    // }

    // std::printf("Dafuq?\n");

    // shared memory that stores: memberships for that pixel, 
    extern __shared__ float shared_d[];
    // std::printf("%f???\n", i_image[0]);

    // global index
    int global_idx = blockIdx.x * blockDim.x + threadIdx.x;
    // std::printf("2?\n");
    // chunk of shared memory each thread gets to use
    int per_thread_len = 2 + i_num_clutsers;
    // x, y, z indices in original membership matrix
    int x = global_idx % i_rows ;
    int y = ((global_idx - x) / i_rows) % i_cols;
    int z = ((global_idx - x - y * i_rows) / (i_rows * i_cols));
    // std::printf("3?\n");


    // load data into shared memory (each thread loads info for a **single** pixel membership)
    if (global_idx < i_rows * i_cols * i_num_clutsers) {
        // load pixel (1)
        // std::printf("fxxk this sxit %f\n", i_image[global_idx]);
        shared_d[threadIdx.x * per_thread_len] = i_image[x + y * i_rows];
        // std::printf("fxxk this sxit %f\n", i_image[global_idx]);
        // load membership (1)
        shared_d[threadIdx.x * per_thread_len + 1] = i_membership[(z * i_rows * i_cols) + y * i_rows + x];
        // load centers (i_num_clutsers)
        for (int i = 0; i < i_num_clutsers; ++i) {
            // shared_d[threadIdx.x * per_thread_len + (i + 1)] = i_membership[(x + y * i_rows) * i_num_clutsers + i];
            shared_d[threadIdx.x * per_thread_len + 1 + (i + 1)] = i_cluster_centers[i];
        }
    }
    else {
        // std::printf("else???? %f\n", i_image[global_idx]);
        for (int i = 0; i < per_thread_len; ++i) {
            shared_d[threadIdx.x] = 0;
        }
    }

    
    // printf("image membership: %f %f \n", shared_d[threadIdx.x * per_thread_len], shared_d[threadIdx.x * per_thread_len + 1]);
    // printf("   centers: ");
    // for (int j = 0; j < i_num_clutsers; ++j) {
    //     printf("center %f", shared_d[threadIdx.x * per_thread_len + 1 + (j + 1)]);
    // }
    // printf("\n");
    

    __syncthreads();

    // std::printf("Dafuq?\n");

    // calculate membership for the loaded pixel
    float d_center = 0, d_all = 0, aggr = 0.0;
    d_center = eucl_distance(shared_d[threadIdx.x * per_thread_len + 1 + (z + 1)], shared_d[threadIdx.x * per_thread_len]);
    // std::printf("a, b: %f, %f\n", shared_d[threadIdx.x * per_thread_len + 1 + (z + 1)], shared_d[threadIdx.x * per_thread_len]);
    for (int c = 0; c < i_num_clutsers; ++c) {
        d_all = eucl_distance(shared_d[threadIdx.x * per_thread_len + 1 + (c + 1)], shared_d[threadIdx.x * per_thread_len]);
        aggr += pow((d_center / d_all), 2 / (i_m - 1));
        // printf("z c d_center d_all: %d %d %f %f \n", z, c, d_center, d_all);
    }

    // printf("d_center: %f\n", d_center);
    // printf("d_all: %f\n", d_all);

    // std::printf("Dafuq2?\n");

    // write aggregation results to membership value on shared memory
    // std::printf("Aggr: %f\n", aggr);
    // printf("z d_center d_all Aggr: %d %f %f %f\n", z, d_center, d_all, aggr);
    shared_d[threadIdx.x * per_thread_len + 1] = 1.0 / (float)aggr;
    // std::printf("PLZ %f\n", shared_d[threadIdx.x * per_thread_len + 1]);

    // write back membership results to global memory
    // std::printf("PLZ %f\n", shared_d[threadIdx.x * per_thread_len + 1]);
    i_membership[(z * i_rows * i_cols) + y * i_rows + x] = 1.0 / (float)aggr;
    // printf("Member: %f\n", i_membership[(z * i_rows * i_cols) + y * i_rows + x]);
    // std::printf("WHY %d %d %d %f\n", x, y, z, i_membership[(z * i_rows * i_cols) + y * i_rows + x]);
    __syncthreads();


    // print_mebership();

}


__device__ float calculate_membership_point_kernel(float *i_image, float *i_cluster_centers, int i, int j, int k, int i_num_clutsers, int i_m) {
    float d_center = 0, d_all = 0, aggr = 0.0;

    // FIX!!
    // d_center = eucl_distance(i_cluster_centers[k], i_image[i][j]);
    // cout << "d_center: " << d_center << endl;
    for (int c = 0; c < i_num_clutsers; ++c) {
        // FIX!!
        // d_all = eucl_distance(i_cluster_centers[c], i_image[i][j]);
        // cout << "d_all " << c << ": " << d_all << endl;
        // cout << "center " << c << ": " << i_cluster_centers[c] << endl;
        aggr += pow((d_center / d_all), 2 / (i_m - 1));
    }

    // cout << "Aggr: " << aggr << endl;

    return 1.0 /aggr;
}

__host__ void fcm_step(float *i_image, float *i_membership, float *i_cluster_centers, int rows, int cols, int T, int i_num_clutsers, int i_m, int threads_per_block, float *out_membership) {
    // set block size and number of blocks to allocate
    // dim3 dimBlock(threads_per_block, threads_per_block);
    // dim3 dimGrid(((rows - 1) / dimBlock.x) + 1, ((cols - 1) / dimBlock.y) + 1);

    unsigned int blks_m = 1 + (rows * cols * i_num_clutsers - 1) / threads_per_block;
    // unsigned int blks_c = 1 + (i_num_clutsers - 1) / threads_per_block;
    unsigned int shared_size_m = ((1 + 2 * i_num_clutsers) * threads_per_block) * sizeof(float);
    // unsigned int shared_size_c = (i_num_clutsers * threads_per_block) * sizeof(float);

    // cout << "blkm: " << blks_m << endl;
    // cout << "blkc: " << blks_c << endl;

    // // copy output memebership matrix
    // for (int i = 0; i < rows; ++i) {
    //     for (int j = 0; j < cols; ++j) {
    //         for (int k = 0; k < i_num_clutsers; ++k) {
    //             std::printf("%f\n", i_membership[(k * rows * cols) + j * rows + i]);
    //         }
    //     }
    // }

    // cudaMemcpy everything!
    float *d_image, *d_membership, *d_cluster_centers;
    hipMalloc((void**)&d_image, rows * cols * sizeof(float));
    hipMalloc((void**)&d_membership, rows * cols * i_num_clutsers * sizeof(float));
    hipMalloc((void**)&d_cluster_centers, i_num_clutsers * sizeof(float));
    // cudaMalloc((void**)&out_membership, rows * cols * i_num_clutsers * sizeof(float));

    hipMemcpy(d_image, i_image, rows * cols * sizeof(float), hipMemcpyHostToDevice);
    hipMemcpy(d_membership, i_membership, rows * cols * i_num_clutsers * sizeof(float), hipMemcpyHostToDevice);
    hipMemcpy(d_cluster_centers, i_cluster_centers, i_num_clutsers * sizeof(float), hipMemcpyHostToDevice);

    // kernel config parameters for reduction
    unsigned int blks_c = 1 + (rows * cols - 1) / threads_per_block;
    unsigned int in_size = rows * cols;
    unsigned int shared_size_c = threads_per_block * sizeof(float);

    // memory allocations for reduction
    float *numerator = new float[1];
    float *denominator = new float[1];
    float *device_in_num, *device_in_den, *device_out_num, *device_out_den;
    hipMalloc((void **)&device_in_num, in_size * sizeof(float));
    hipMalloc((void **)&device_in_den, in_size * sizeof(float));
    hipMalloc((void **)&device_out_num, blks_c * sizeof(float));
    hipMalloc((void **)&device_out_den, blks_c * sizeof(float));


    // iteratively update membership and centers for T epochs
    for (int i = 0; i < T; ++i) {
        // cout << "Hi" << endl;
        // fcm_step_kernel<<<dimGrid, dimBlock, shared_size>>>(i_image, i_membership, i_cluster_centers, rows, cols, i_num_clutsers, i_m);
        // 1D grid of 2D blocks
        update_membership_kernel<<<blks_m, threads_per_block, shared_size_m>>>(d_image, d_cluster_centers, d_membership, rows, cols, i_num_clutsers, i_m);
        // cudaDeviceSynchronize();
        // reduce each center with numerator and denominator reduction
        
        hipMemcpy(device_in_num, i_membership, in_size * sizeof(float), hipMemcpyDeviceToDevice);
        hipMemcpy(device_in_den, i_membership, in_size * sizeof(float), hipMemcpyDeviceToDevice);
        for (int j = 0; j < i_num_clutsers; ++j) {
            blks_c = 1 + (rows * cols - 1) / threads_per_block;
            while (true) {
                update_centers_numerator_kernel<<<blks_c, threads_per_block, shared_size_c>>>(d_image, d_membership, d_cluster_centers, rows, cols, i_num_clutsers, i_m, device_out_num, j);
                update_centers_denominator_kernel<<<blks_c, threads_per_block, shared_size_c>>>(d_image, d_membership, d_cluster_centers, rows, cols, i_num_clutsers, i_m, device_out_den, j);
                
                // don't re-initialize if we already have the final reduction result
                if (blks_c == 1) {
                    break;
                }

                in_size = blks_c;

                // device_out now holds the reduce result, copy to device in and reduce again (next time)
                hipMemcpy(device_in_num, device_out_num, in_size * sizeof(float), hipMemcpyDeviceToDevice);
                hipMemcpy(device_in_den, device_out_den, in_size * sizeof(float), hipMemcpyDeviceToDevice);

                blks_c = 1 + ((blks_c - 1) / threads_per_block);

            }
            hipMemcpy(numerator, device_out_num, sizeof(float), hipMemcpyDeviceToHost);
            hipMemcpy(denominator, device_out_den, sizeof(float), hipMemcpyDeviceToHost);

            // update center values
            i_cluster_centers[i] = numerator[0] / denominator[0];
        }

        // update_centers_kernel<<<blks_c, threads_per_block, shared_size_c>>>(d_image, d_membership, d_cluster_centers, rows, cols, i_num_clutsers, i_m, threads_per_block);
        // cudaDeviceSynchronize();
        // cout << "Bye" << endl;
    }
    // fcm_step_kernel<<<dimGrid, dimBlock, shared_size>>>(i_image, i_membership, i_cluster_centers, rows, cols, i_num_clutsers, i_m);

    hipMemcpy(out_membership, d_membership, rows * cols * i_num_clutsers * sizeof(float), hipMemcpyDeviceToHost);
    hipMemcpy(i_cluster_centers, d_cluster_centers, i_num_clutsers * sizeof(float), hipMemcpyDeviceToHost);

    hipFree(d_image);
    hipFree(d_membership);
    hipFree(d_cluster_centers);
}

__global__ void fcm_step_kernel(float *i_image, float *i_membership, float *i_cluster_centers, int rows, int cols, int i_num_clutsers, int i_m) {
    // update_membership_kernel(i_image, i_cluster_centers, i_membership, rows, cols, i_num_clutsers, i_m);
    // update_centers_kernel(i_image, i_membership, i_cluster_centers, rows, cols, i_num_clutsers, i_m);
}


__host__ void calculate_final_cluster(float *i_membership, int *i_final_cluster, int i_num_clutsers, int i_rows, int i_cols) {
    // cout << "Membership: " << endl;
    // for (int i = 0; i < i_rows; ++i) {
    //     for (int j = 0; j < i_cols; ++j) {
    //         float tmp_max = -999;
    //         for (int k = 0; k < i_num_clutsers; ++k) {
    //             // FIX!!
    //             // if (i_membership[i][j][k] >= tmp_max) {
    //             //     // cout << "hi" << endl;
    //             //     tmp_max = i_membership[i][j][k];
    //             //     // i_final_cluster[i][j] = 255 / (float)(k + 1);
    //             //     i_final_cluster[i][j] = k;
    //             // }
    //             int k = 0;
    //             // cout << i_membership[i][j][k] << " ";
    //         }
    //         // cout << endl;
    //     }
    // }

    for (int i = 0; i < i_rows; ++i) {
        for (int j = 0; j < i_cols; ++j) {
            float tmp_max = -9999;
            // std::printf("[");
            for (int k = 0; k < i_num_clutsers; ++k) {
                // std::printf("%f ", i_membership[(k * i_rows * i_cols) + j * i_rows + i]);
                if (i_membership[(k * i_rows * i_cols) + j * i_rows + i] >= tmp_max) {
                    tmp_max = i_membership[(k * i_rows * i_cols) + j * i_rows + i];
                    i_final_cluster[j * i_rows + i] = k;
                }
            }
            // std::printf("]");
        }
        // std::printf("\n");
    }

}


	.text
	.file	"reduction_fcm_iter.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z15init_membershipPfiii        # -- Begin function _Z15init_membershipPfiii
	.type	_Z15init_membershipPfiii,@function
_Z15init_membershipPfiii:               # @_Z15init_membershipPfiii
	.cfi_startproc
# %bb.0:
	retq
.Lfunc_end0:
	.size	_Z15init_membershipPfiii, .Lfunc_end0-_Z15init_membershipPfiii
	.cfi_endproc
                                        # -- End function
	.globl	_Z12init_centersPfi             # -- Begin function _Z12init_centersPfi
	.type	_Z12init_centersPfi,@function
_Z12init_centersPfi:                    # @_Z12init_centersPfi
.Lfunc_begin0:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception0
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$10008, %rsp                    # imm = 0x2718
	.cfi_def_cfa_offset 10048
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	testl	%esi, %esi
	jle	.LBB1_8
# %bb.1:                                # %.lr.ph
	movl	%esi, %ebx
	xorl	%ebp, %ebp
	leaq	5008(%rsp), %r14
	leaq	8(%rsp), %r15
.LBB1_2:                                # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_4 Depth 2
	movq	%r14, %rdi
	callq	_ZNSt13random_deviceC2Ev
.Ltmp0:
	movq	%r14, %rdi
	callq	_ZNSt13random_device9_M_getvalEv
.Ltmp1:
# %bb.3:                                # %_ZNSt13random_deviceclEv.exit
                                        #   in Loop: Header=BB1_2 Depth=1
	movl	%eax, %eax
	movq	%rax, 8(%rsp)
	movl	$1, %ecx
.LBB1_4:                                #   Parent Loop BB1_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movq	%rax, %rdx
	shrq	$30, %rdx
	xorl	%eax, %edx
	imull	$1812433253, %edx, %eax         # imm = 0x6C078965
	addl	%ecx, %eax
	movq	%rax, 8(%rsp,%rcx,8)
	incq	%rcx
	cmpq	$624, %rcx                      # imm = 0x270
	jne	.LBB1_4
# %bb.5:                                #   in Loop: Header=BB1_2 Depth=1
	movq	$624, 5000(%rsp)                # imm = 0x270
.Ltmp3:
	movq	%r15, %rdi
	callq	_ZSt18generate_canonicalIdLm53ESt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEET_RT1_
.Ltmp4:
# %bb.6:                                # %_ZNSt25uniform_real_distributionIdEclISt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEEEdRT_.exit
                                        #   in Loop: Header=BB1_2 Depth=1
.Ltmp9:
	movq	%r14, %rdi
	callq	_ZNSt13random_device7_M_finiEv
.Ltmp10:
# %bb.7:                                # %_ZNSt13random_deviceD2Ev.exit
                                        #   in Loop: Header=BB1_2 Depth=1
	incl	%ebp
	cmpl	%ebx, %ebp
	jne	.LBB1_2
.LBB1_8:                                # %._crit_edge
	addq	$10008, %rsp                    # imm = 0x2718
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB1_9:
	.cfi_def_cfa_offset 10048
.Ltmp2:
	jmp	.LBB1_11
.LBB1_10:
.Ltmp5:
.LBB1_11:
	movq	%rax, %rbx
.Ltmp6:
	leaq	5008(%rsp), %rdi
	callq	_ZNSt13random_device7_M_finiEv
.Ltmp7:
# %bb.12:                               # %_ZNSt13random_deviceD2Ev.exit10
	movq	%rbx, %rdi
	callq	_Unwind_Resume@PLT
.LBB1_13:
.Ltmp8:
	jmp	.LBB1_15
.LBB1_14:
.Ltmp11:
.LBB1_15:
	movq	%rax, %rdi
	callq	__clang_call_terminate
.Lfunc_end1:
	.size	_Z12init_centersPfi, .Lfunc_end1-_Z12init_centersPfi
	.cfi_endproc
	.section	.gcc_except_table,"a",@progbits
	.p2align	2, 0x0
GCC_except_table1:
.Lexception0:
	.byte	255                             # @LPStart Encoding = omit
	.byte	3                               # @TType Encoding = udata4
	.uleb128 .Lttbase0-.Lttbaseref0
.Lttbaseref0:
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end0-.Lcst_begin0
.Lcst_begin0:
	.uleb128 .Lfunc_begin0-.Lfunc_begin0    # >> Call Site 1 <<
	.uleb128 .Ltmp0-.Lfunc_begin0           #   Call between .Lfunc_begin0 and .Ltmp0
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp0-.Lfunc_begin0           # >> Call Site 2 <<
	.uleb128 .Ltmp1-.Ltmp0                  #   Call between .Ltmp0 and .Ltmp1
	.uleb128 .Ltmp2-.Lfunc_begin0           #     jumps to .Ltmp2
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp3-.Lfunc_begin0           # >> Call Site 3 <<
	.uleb128 .Ltmp4-.Ltmp3                  #   Call between .Ltmp3 and .Ltmp4
	.uleb128 .Ltmp5-.Lfunc_begin0           #     jumps to .Ltmp5
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp9-.Lfunc_begin0           # >> Call Site 4 <<
	.uleb128 .Ltmp10-.Ltmp9                 #   Call between .Ltmp9 and .Ltmp10
	.uleb128 .Ltmp11-.Lfunc_begin0          #     jumps to .Ltmp11
	.byte	1                               #   On action: 1
	.uleb128 .Ltmp6-.Lfunc_begin0           # >> Call Site 5 <<
	.uleb128 .Ltmp7-.Ltmp6                  #   Call between .Ltmp6 and .Ltmp7
	.uleb128 .Ltmp8-.Lfunc_begin0           #     jumps to .Ltmp8
	.byte	1                               #   On action: 1
	.uleb128 .Ltmp7-.Lfunc_begin0           # >> Call Site 6 <<
	.uleb128 .Lfunc_end1-.Ltmp7             #   Call between .Ltmp7 and .Lfunc_end1
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end0:
	.byte	1                               # >> Action Record 1 <<
                                        #   Catch TypeInfo 1
	.byte	0                               #   No further actions
	.p2align	2, 0x0
                                        # >> Catch TypeInfos <<
	.long	0                               # TypeInfo 1
.Lttbase0:
	.p2align	2, 0x0
                                        # -- End function
	.section	.text._ZNSt13random_deviceC2Ev,"axG",@progbits,_ZNSt13random_deviceC2Ev,comdat
	.weak	_ZNSt13random_deviceC2Ev        # -- Begin function _ZNSt13random_deviceC2Ev
	.p2align	1, 0x90
	.type	_ZNSt13random_deviceC2Ev,@function
_ZNSt13random_deviceC2Ev:               # @_ZNSt13random_deviceC2Ev
.Lfunc_begin1:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception1
# %bb.0:                                # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_.exit
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$32, %rsp
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdi, %rbx
	leaq	16(%rsp), %r15
	movq	%r15, -16(%r15)
	movq	%rsp, %r14
	movl	$.L.str, %esi
	movl	$.L.str+7, %edx
	movq	%r14, %rdi
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag
.Ltmp12:
	movq	%rbx, %rdi
	movq	%r14, %rsi
	callq	_ZNSt13random_device7_M_initERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE
.Ltmp13:
# %bb.1:
	movq	(%rsp), %rdi
	cmpq	%r15, %rdi
	je	.LBB2_3
# %bb.2:                                # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i
	callq	_ZdlPv
.LBB2_3:                                # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit
	addq	$32, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.LBB2_4:
	.cfi_def_cfa_offset 64
.Ltmp14:
	movq	%rax, %rbx
	movq	(%rsp), %rdi
	cmpq	%r15, %rdi
	je	.LBB2_6
# %bb.5:                                # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i4
	callq	_ZdlPv
.LBB2_6:                                # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit6
	movq	%rbx, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end2:
	.size	_ZNSt13random_deviceC2Ev, .Lfunc_end2-_ZNSt13random_deviceC2Ev
	.cfi_endproc
	.section	.gcc_except_table._ZNSt13random_deviceC2Ev,"aG",@progbits,_ZNSt13random_deviceC2Ev,comdat
	.p2align	2, 0x0
GCC_except_table2:
.Lexception1:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end1-.Lcst_begin1
.Lcst_begin1:
	.uleb128 .Lfunc_begin1-.Lfunc_begin1    # >> Call Site 1 <<
	.uleb128 .Ltmp12-.Lfunc_begin1          #   Call between .Lfunc_begin1 and .Ltmp12
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp12-.Lfunc_begin1          # >> Call Site 2 <<
	.uleb128 .Ltmp13-.Ltmp12                #   Call between .Ltmp12 and .Ltmp13
	.uleb128 .Ltmp14-.Lfunc_begin1          #     jumps to .Ltmp14
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp13-.Lfunc_begin1          # >> Call Site 3 <<
	.uleb128 .Lfunc_end2-.Ltmp13            #   Call between .Ltmp13 and .Lfunc_end2
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end1:
	.p2align	2, 0x0
                                        # -- End function
	.text
	.globl	_Z18init_final_clusterPiii      # -- Begin function _Z18init_final_clusterPiii
	.type	_Z18init_final_clusterPiii,@function
_Z18init_final_clusterPiii:             # @_Z18init_final_clusterPiii
	.cfi_startproc
# %bb.0:
	imull	%edx, %esi
	testl	%esi, %esi
	jle	.LBB3_1
# %bb.2:                                # %.lr.ph.preheader
	movl	%esi, %edx
	shlq	$2, %rdx
	movl	$255, %esi
	jmp	memset@PLT                      # TAILCALL
.LBB3_1:                                # %._crit_edge
	retq
.Lfunc_end3:
	.size	_Z18init_final_clusterPiii, .Lfunc_end3-_Z18init_final_clusterPiii
	.cfi_endproc
                                        # -- End function
	.globl	_Z46__device_stub__update_centers_numerator_kernelPfS_S_iiiiS_i # -- Begin function _Z46__device_stub__update_centers_numerator_kernelPfS_S_iiiiS_i
	.type	_Z46__device_stub__update_centers_numerator_kernelPfS_S_iiiiS_i,@function
_Z46__device_stub__update_centers_numerator_kernelPfS_S_iiiiS_i: # @_Z46__device_stub__update_centers_numerator_kernelPfS_S_iiiiS_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$176, %rsp
	.cfi_def_cfa_offset 224
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	20(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	16(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	224(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	232(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	240(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z31update_centers_numerator_kernelPfS_S_iiiiS_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$192, %rsp
	.cfi_adjust_cfa_offset -192
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z46__device_stub__update_centers_numerator_kernelPfS_S_iiiiS_i, .Lfunc_end4-_Z46__device_stub__update_centers_numerator_kernelPfS_S_iiiiS_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z48__device_stub__update_centers_denominator_kernelPfS_S_iiiiS_i # -- Begin function _Z48__device_stub__update_centers_denominator_kernelPfS_S_iiiiS_i
	.type	_Z48__device_stub__update_centers_denominator_kernelPfS_S_iiiiS_i,@function
_Z48__device_stub__update_centers_denominator_kernelPfS_S_iiiiS_i: # @_Z48__device_stub__update_centers_denominator_kernelPfS_S_iiiiS_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$176, %rsp
	.cfi_def_cfa_offset 224
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	20(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	16(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	224(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	232(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	240(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z33update_centers_denominator_kernelPfS_S_iiiiS_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$192, %rsp
	.cfi_adjust_cfa_offset -192
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	_Z48__device_stub__update_centers_denominator_kernelPfS_S_iiiiS_i, .Lfunc_end5-_Z48__device_stub__update_centers_denominator_kernelPfS_S_iiiiS_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z39__device_stub__update_membership_kernelPfS_S_iiii # -- Begin function _Z39__device_stub__update_membership_kernelPfS_S_iiii
	.type	_Z39__device_stub__update_membership_kernelPfS_S_iiii,@function
_Z39__device_stub__update_membership_kernelPfS_S_iiii: # @_Z39__device_stub__update_membership_kernelPfS_S_iiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	20(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	16(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z24update_membership_kernelPfS_S_iiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	_Z39__device_stub__update_membership_kernelPfS_S_iiii, .Lfunc_end6-_Z39__device_stub__update_membership_kernelPfS_S_iiii
	.cfi_endproc
                                        # -- End function
	.globl	_Z8fcm_stepPfS_S_iiiiiiS_       # -- Begin function _Z8fcm_stepPfS_S_iiiiiiS_
	.type	_Z8fcm_stepPfS_S_iiiiiiS_,@function
_Z8fcm_stepPfS_S_iiiiiiS_:              # @_Z8fcm_stepPfS_S_iiiiiiS_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$168, %rsp
	.cfi_def_cfa_offset 224
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r9d, 32(%rsp)                  # 4-byte Spill
	movq	%rdx, 64(%rsp)                  # 8-byte Spill
	movq	%rsi, %r13
	movq	%rdi, 48(%rsp)                  # 8-byte Spill
	movslq	224(%rsp), %rbp
	movl	%r8d, 4(%rsp)                   # 4-byte Spill
	movl	%r8d, %r12d
	movl	%ecx, (%rsp)                    # 4-byte Spill
	imull	%ecx, %r12d
	movl	%r12d, %r14d
	imull	%ebp, %r14d
	movslq	%r12d, %rbx
	leaq	(,%rbx,4), %r15
	leaq	40(%rsp), %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	movl	%r14d, 56(%rsp)                 # 4-byte Spill
	movslq	%r14d, %r14
	shlq	$2, %r14
	leaq	24(%rsp), %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movq	%rbp, 8(%rsp)                   # 8-byte Spill
	shlq	$2, %rbp
	leaq	16(%rsp), %rdi
	movq	%rbp, %rsi
	callq	hipMalloc
	leaq	40(%rsp), %rax
	movq	(%rax), %rdi
	movq	48(%rsp), %rsi                  # 8-byte Reload
	movq	%r15, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	24(%rsp), %rax
	movq	(%rax), %rdi
	movq	%r13, 136(%rsp)                 # 8-byte Spill
	movq	%r13, %rsi
	movq	%r14, 112(%rsp)                 # 8-byte Spill
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	16(%rsp), %rax
	movq	(%rax), %rdi
	movq	64(%rsp), %rsi                  # 8-byte Reload
	movq	%rbp, 104(%rsp)                 # 8-byte Spill
	movq	%rbp, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	decl	%ebx
	movl	%ebx, %eax
	cltd
	movl	240(%rsp), %ecx
	idivl	%ecx
	movl	%eax, %r14d
	incl	%r14d
	movl	$4, %edi
	callq	_Znam
	movq	%rax, 152(%rsp)                 # 8-byte Spill
	movl	$4, %edi
	callq	_Znam
	movq	%rax, 144(%rsp)                 # 8-byte Spill
	movq	%r12, 48(%rsp)                  # 8-byte Spill
	leaq	(,%r12,4), %rbx
	leaq	96(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	leaq	88(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	%r14, 160(%rsp)                 # 8-byte Spill
	leaq	(,%r14,4), %rbx
	leaq	80(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	leaq	72(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movl	32(%rsp), %esi                  # 4-byte Reload
	testl	%esi, %esi
	jle	.LBB7_15
# %bb.1:                                # %.lr.ph
	movl	240(%rsp), %eax
	movq	%rax, %rcx
	leal	(,%rax,4), %r15d
	movq	8(%rsp), %rax                   # 8-byte Reload
	leal	1(,%rax,2), %eax
	imull	%r15d, %eax
	movq	%rax, 128(%rsp)                 # 8-byte Spill
	movl	56(%rsp), %eax                  # 4-byte Reload
	decl	%eax
	cltd
	idivl	%ecx
                                        # kill: def $eax killed $eax def $rax
	incl	%eax
	btsq	$32, %rax
	movq	%rax, 56(%rsp)                  # 8-byte Spill
	movl	%ecx, %r12d
	btsq	$32, %r12
	movl	%esi, %eax
	movq	%rax, 120(%rsp)                 # 8-byte Spill
	xorl	%eax, %eax
	movq	%rax, 32(%rsp)                  # 8-byte Spill
.LBB7_2:                                # =>This Loop Header: Depth=1
                                        #     Child Loop BB7_6 Depth 2
                                        #       Child Loop BB7_7 Depth 3
	movq	56(%rsp), %rdi                  # 8-byte Reload
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	movq	128(%rsp), %r8                  # 8-byte Reload
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB7_4
# %bb.3:                                #   in Loop: Header=BB7_2 Depth=1
	movq	40(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	24(%rsp), %rdx
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movl	8(%rsp), %ecx                   # 4-byte Reload
	movl	12(%rsp), %r8d                  # 4-byte Reload
	movq	16(%rsp), %r9                   # 8-byte Reload
                                        # kill: def $r9d killed $r9d killed $r9
	movl	240(%rsp), %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	callq	_Z39__device_stub__update_membership_kernelPfS_S_iiii
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
.LBB7_4:                                #   in Loop: Header=BB7_2 Depth=1
	movq	96(%rsp), %rdi
	movl	48(%rsp), %ebx                  # 4-byte Reload
	shlq	$2, %rbx
	movq	136(%rsp), %r14                 # 8-byte Reload
	movq	%r14, %rsi
	movq	%rbx, %rdx
	movl	$3, %ecx
	callq	hipMemcpy
	movq	88(%rsp), %rdi
	movq	%r14, %rsi
	movq	%rbx, %rdx
	movl	$3, %ecx
	callq	hipMemcpy
	cmpl	$0, 8(%rsp)                     # 4-byte Folded Reload
	jle	.LBB7_14
# %bb.5:                                # %.preheader.lr.ph
                                        #   in Loop: Header=BB7_2 Depth=1
	xorl	%r14d, %r14d
.LBB7_6:                                # %.preheader
                                        #   Parent Loop BB7_2 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB7_7 Depth 3
	movq	160(%rsp), %rax                 # 8-byte Reload
	movl	%eax, %r13d
.LBB7_7:                                #   Parent Loop BB7_2 Depth=1
                                        #     Parent Loop BB7_6 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movl	%r13d, %ebp
	movq	%rbp, %rbx
	movabsq	$4294967296, %rax               # imm = 0x100000000
	orq	%rax, %rbx
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	movq	%r15, %r8
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB7_9
# %bb.8:                                #   in Loop: Header=BB7_7 Depth=3
	movq	40(%rsp), %rdi
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdx
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movl	8(%rsp), %ecx                   # 4-byte Reload
	movl	12(%rsp), %r8d                  # 4-byte Reload
	movq	16(%rsp), %r9                   # 8-byte Reload
                                        # kill: def $r9d killed $r9d killed $r9
	pushq	%r14
	.cfi_adjust_cfa_offset 8
	pushq	96(%rsp)
	.cfi_adjust_cfa_offset 8
	movl	256(%rsp), %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	callq	_Z46__device_stub__update_centers_numerator_kernelPfS_S_iiiiS_i
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
.LBB7_9:                                #   in Loop: Header=BB7_7 Depth=3
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	movq	%r15, %r8
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB7_11
# %bb.10:                               #   in Loop: Header=BB7_7 Depth=3
	movq	40(%rsp), %rdi
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdx
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movl	8(%rsp), %ecx                   # 4-byte Reload
	movl	12(%rsp), %r8d                  # 4-byte Reload
	movq	16(%rsp), %r9                   # 8-byte Reload
                                        # kill: def $r9d killed $r9d killed $r9
	pushq	%r14
	.cfi_adjust_cfa_offset 8
	pushq	88(%rsp)
	.cfi_adjust_cfa_offset 8
	movl	256(%rsp), %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	callq	_Z48__device_stub__update_centers_denominator_kernelPfS_S_iiiiS_i
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
.LBB7_11:                               #   in Loop: Header=BB7_7 Depth=3
	cmpl	$1, %ebp
	je	.LBB7_13
# %bb.12:                               #   in Loop: Header=BB7_7 Depth=3
	movq	96(%rsp), %rdi
	movq	80(%rsp), %rsi
	movq	%rbp, %rbx
	shlq	$2, %rbx
	movq	%rbx, %rdx
	movl	$3, %ecx
	callq	hipMemcpy
	movq	88(%rsp), %rdi
	movq	72(%rsp), %rsi
	movq	%rbx, %rdx
	movl	$3, %ecx
	callq	hipMemcpy
	leal	-1(%rbp), %eax
	xorl	%edx, %edx
	movl	240(%rsp), %ecx
	divl	%ecx
	movl	%r13d, %ecx
	movq	%rcx, 48(%rsp)                  # 8-byte Spill
	movl	%eax, %r13d
	incl	%r13d
	jmp	.LBB7_7
.LBB7_13:                               #   in Loop: Header=BB7_6 Depth=2
	movq	80(%rsp), %rsi
	movl	$4, %edx
	movq	152(%rsp), %rbx                 # 8-byte Reload
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	72(%rsp), %rsi
	movl	$4, %edx
	movq	144(%rsp), %r13                 # 8-byte Reload
	movq	%r13, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movss	(%rbx), %xmm0                   # xmm0 = mem[0],zero,zero,zero
	divss	(%r13), %xmm0
	movq	64(%rsp), %rax                  # 8-byte Reload
	movq	32(%rsp), %rcx                  # 8-byte Reload
	movss	%xmm0, (%rax,%rcx,4)
	incl	%r14d
	cmpl	8(%rsp), %r14d                  # 4-byte Folded Reload
	jne	.LBB7_6
.LBB7_14:                               # %._crit_edge
                                        #   in Loop: Header=BB7_2 Depth=1
	movq	32(%rsp), %rcx                  # 8-byte Reload
	incq	%rcx
	movq	%rcx, %rax
	movq	%rcx, 32(%rsp)                  # 8-byte Spill
	cmpq	120(%rsp), %rcx                 # 8-byte Folded Reload
	jne	.LBB7_2
.LBB7_15:                               # %._crit_edge120
	movq	24(%rsp), %rsi
	movq	248(%rsp), %rdi
	movq	112(%rsp), %rdx                 # 8-byte Reload
	movl	$2, %ecx
	callq	hipMemcpy
	movq	16(%rsp), %rsi
	movq	64(%rsp), %rdi                  # 8-byte Reload
	movq	104(%rsp), %rdx                 # 8-byte Reload
	movl	$2, %ecx
	callq	hipMemcpy
	movq	40(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	addq	$168, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end7:
	.size	_Z8fcm_stepPfS_S_iiiiiiS_, .Lfunc_end7-_Z8fcm_stepPfS_S_iiiiiiS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z30__device_stub__fcm_step_kernelPfS_S_iiii # -- Begin function _Z30__device_stub__fcm_step_kernelPfS_S_iiii
	.type	_Z30__device_stub__fcm_step_kernelPfS_S_iiii,@function
_Z30__device_stub__fcm_step_kernelPfS_S_iiii: # @_Z30__device_stub__fcm_step_kernelPfS_S_iiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	20(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	16(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z15fcm_step_kernelPfS_S_iiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end8:
	.size	_Z30__device_stub__fcm_step_kernelPfS_S_iiii, .Lfunc_end8-_Z30__device_stub__fcm_step_kernelPfS_S_iiii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z23calculate_final_clusterPfPiiii
.LCPI9_0:
	.long	0xc61c3c00                      # float -9999
	.text
	.globl	_Z23calculate_final_clusterPfPiiii
	.type	_Z23calculate_final_clusterPfPiiii,@function
_Z23calculate_final_clusterPfPiiii:     # @_Z23calculate_final_clusterPfPiiii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r8d, -12(%rsp)                 # 4-byte Spill
	movq	%rsi, -8(%rsp)                  # 8-byte Spill
	testl	%ecx, %ecx
	jle	.LBB9_11
# %bb.1:                                # %.preheader34.lr.ph
	movl	-12(%rsp), %esi                 # 4-byte Reload
	movl	%esi, %eax
	imull	%ecx, %eax
	movl	%ecx, %r9d
	movl	%esi, %r10d
	movl	%edx, %r11d
	xorl	%r8d, %r8d
	movss	.LCPI9_0(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
.LBB9_2:                                # %.preheader34
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB9_4 Depth 2
                                        #       Child Loop BB9_6 Depth 3
	cmpl	$0, -12(%rsp)                   # 4-byte Folded Reload
	jle	.LBB9_10
# %bb.3:                                # %.preheader.preheader
                                        #   in Loop: Header=BB9_2 Depth=1
	movq	-8(%rsp), %rsi                  # 8-byte Reload
	leaq	(%rsi,%r8,4), %r14
	movl	%r8d, %ebp
	xorl	%r15d, %r15d
.LBB9_4:                                # %.preheader
                                        #   Parent Loop BB9_2 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB9_6 Depth 3
	testl	%edx, %edx
	jle	.LBB9_9
# %bb.5:                                # %.lr.ph
                                        #   in Loop: Header=BB9_4 Depth=2
	movq	%r15, %r12
	imulq	%r9, %r12
	movl	%ebp, %r13d
	xorl	%ebx, %ebx
	movaps	%xmm0, %xmm1
.LBB9_6:                                #   Parent Loop BB9_2 Depth=1
                                        #     Parent Loop BB9_4 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movslq	%r13d, %rsi
	movss	(%rdi,%rsi,4), %xmm2            # xmm2 = mem[0],zero,zero,zero
	ucomiss	%xmm1, %xmm2
	jb	.LBB9_8
# %bb.7:                                #   in Loop: Header=BB9_6 Depth=3
	movl	%ebx, (%r14,%r12,4)
	movaps	%xmm2, %xmm1
.LBB9_8:                                #   in Loop: Header=BB9_6 Depth=3
	incq	%rbx
	addl	%eax, %r13d
	cmpq	%rbx, %r11
	jne	.LBB9_6
.LBB9_9:                                # %._crit_edge
                                        #   in Loop: Header=BB9_4 Depth=2
	incq	%r15
	addl	%ecx, %ebp
	cmpq	%r10, %r15
	jne	.LBB9_4
.LBB9_10:                               # %._crit_edge38
                                        #   in Loop: Header=BB9_2 Depth=1
	incq	%r8
	cmpq	%r9, %r8
	jne	.LBB9_2
.LBB9_11:                               # %._crit_edge40
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end9:
	.size	_Z23calculate_final_clusterPfPiiii, .Lfunc_end9-_Z23calculate_final_clusterPfPiiii
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag,"axG",@progbits,_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag,comdat
	.weak	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag # -- Begin function _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag
	.p2align	1, 0x90
	.type	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag,@function
_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag: # @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdx, %r14
	movq	%rsi, %r15
	movq	%rdi, %rbx
	subq	%rsi, %r14
	movq	%r14, (%rsp)
	cmpq	$15, %r14
	jbe	.LBB10_1
# %bb.2:
	movq	%rsp, %r12
	movq	%rbx, %rdi
	movq	%r12, %rsi
	xorl	%edx, %edx
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE9_M_createERmm
	movq	%rax, (%rbx)
	movq	(%r12), %rcx
	movq	%rcx, 16(%rbx)
	jmp	.LBB10_3
.LBB10_1:                               # %._crit_edge
	movq	(%rbx), %rax
.LBB10_3:
	testq	%r14, %r14
	je	.LBB10_7
# %bb.4:
	cmpq	$1, %r14
	jne	.LBB10_6
# %bb.5:
	movb	(%r15), %cl
	movb	%cl, (%rax)
	jmp	.LBB10_7
.LBB10_6:
	movq	%rax, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	callq	memcpy@PLT
.LBB10_7:                               # %_ZZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tagEN6_GuardD2Ev.exit
	movq	(%rsp), %rax
	movq	%rax, 8(%rbx)
	movq	(%rbx), %rcx
	movb	$0, (%rcx,%rax)
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end10:
	.size	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag, .Lfunc_end10-_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag
	.cfi_endproc
                                        # -- End function
	.section	.text.__clang_call_terminate,"axG",@progbits,__clang_call_terminate,comdat
	.hidden	__clang_call_terminate          # -- Begin function __clang_call_terminate
	.weak	__clang_call_terminate
	.type	__clang_call_terminate,@function
__clang_call_terminate:                 # @__clang_call_terminate
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__cxa_begin_catch
	callq	_ZSt9terminatev
.Lfunc_end11:
	.size	__clang_call_terminate, .Lfunc_end11-__clang_call_terminate
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _ZSt18generate_canonicalIdLm53ESt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEET_RT1_
.LCPI12_0:
	.long	0x4f800000                      # float 4.2949673E+9
.LCPI12_1:
	.long	0x40000000                      # float 2
.LCPI12_2:
	.long	0x5f000000                      # float 9.22337203E+18
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0
.LCPI12_3:
	.quad	0x3ff0000000000000              # double 1
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0
.LCPI12_4:
	.long	1127219200                      # 0x43300000
	.long	1160773632                      # 0x45300000
	.long	0                               # 0x0
	.long	0                               # 0x0
.LCPI12_5:
	.quad	0x4330000000000000              # double 4503599627370496
	.quad	0x4530000000000000              # double 1.9342813113834067E+25
	.section	.text._ZSt18generate_canonicalIdLm53ESt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEET_RT1_,"axG",@progbits,_ZSt18generate_canonicalIdLm53ESt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEET_RT1_,comdat
	.weak	_ZSt18generate_canonicalIdLm53ESt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEET_RT1_
	.type	_ZSt18generate_canonicalIdLm53ESt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEET_RT1_,@function
_ZSt18generate_canonicalIdLm53ESt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEET_RT1_: # @_ZSt18generate_canonicalIdLm53ESt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEET_RT1_
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	subq	$72, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	movq	%rdi, %rbx
	flds	.LCPI12_0(%rip)
	fstpt	(%rsp)
	callq	logl
	fstpt	24(%rsp)                        # 10-byte Folded Spill
	flds	.LCPI12_1(%rip)
	fstpt	(%rsp)
	callq	logl
	fldt	24(%rsp)                        # 10-byte Folded Reload
	fdivp	%st, %st(1)
	flds	.LCPI12_2(%rip)
	xorl	%ecx, %ecx
	fxch	%st(1)
	fucomi	%st(1), %st
	fldz
	fcmovnb	%st(2), %st
	fstp	%st(2)
	fsubp	%st, %st(1)
	setae	%cl
	fnstcw	20(%rsp)
	movzwl	20(%rsp), %eax
	orl	$3072, %eax                     # imm = 0xC00
	movw	%ax, 22(%rsp)
	fldcw	22(%rsp)
	fistpll	64(%rsp)
	fldcw	20(%rsp)
	shlq	$63, %rcx
	xorq	64(%rsp), %rcx
	leaq	52(%rcx), %rax
	xorl	%edx, %edx
	divq	%rcx
	movq	%rax, %r14
	cmpq	$1, %rax
	adcq	$0, %r14
	xorpd	%xmm0, %xmm0
	movsd	.LCPI12_3(%rip), %xmm1          # xmm1 = mem[0],zero
.LBB12_1:                               # %select.unfold
                                        # =>This Inner Loop Header: Depth=1
	movsd	%xmm1, 40(%rsp)                 # 8-byte Spill
	movsd	%xmm0, 24(%rsp)                 # 8-byte Spill
	movq	%rbx, %rdi
	callq	_ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEclEv
	movq	%rax, %xmm0
	punpckldq	.LCPI12_4(%rip), %xmm0  # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]
	subpd	.LCPI12_5(%rip), %xmm0
	movapd	%xmm0, %xmm1
	unpckhpd	%xmm0, %xmm1                    # xmm1 = xmm1[1],xmm0[1]
	addsd	%xmm0, %xmm1
	movsd	24(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	movsd	40(%rsp), %xmm2                 # 8-byte Reload
                                        # xmm2 = mem[0],zero
	mulsd	%xmm2, %xmm1
	movsd	%xmm2, 56(%rsp)
	fldl	56(%rsp)
	fmuls	.LCPI12_0(%rip)
	addsd	%xmm1, %xmm0
	fstpl	48(%rsp)
	movsd	48(%rsp), %xmm1                 # xmm1 = mem[0],zero
	decq	%r14
	jne	.LBB12_1
# %bb.2:
	divsd	%xmm1, %xmm0
	ucomisd	.LCPI12_3(%rip), %xmm0
	jae	.LBB12_4
# %bb.3:
	addq	$72, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	retq
.LBB12_4:
	.cfi_def_cfa_offset 96
	movsd	.LCPI12_3(%rip), %xmm0          # xmm0 = mem[0],zero
	xorpd	%xmm1, %xmm1
	addq	$72, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	jmp	nextafter                       # TAILCALL
.Lfunc_end12:
	.size	_ZSt18generate_canonicalIdLm53ESt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEET_RT1_, .Lfunc_end12-_ZSt18generate_canonicalIdLm53ESt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEET_RT1_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEclEv,"axG",@progbits,_ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEclEv,comdat
	.weak	_ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEclEv # -- Begin function _ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEclEv
	.p2align	1, 0x90
	.type	_ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEclEv,@function
_ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEclEv: # @_ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEclEv
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movq	%rdi, %rbx
	movq	4992(%rdi), %rax
	cmpq	$624, %rax                      # imm = 0x270
	jb	.LBB13_2
# %bb.1:
	movq	%rbx, %rdi
	callq	_ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EE11_M_gen_randEv
	movq	4992(%rbx), %rax
.LBB13_2:
	leaq	1(%rax), %rcx
	movq	%rcx, 4992(%rbx)
	movq	(%rbx,%rax,8), %rax
	movq	%rax, %rcx
	shrq	$11, %rcx
	movl	%ecx, %ecx
	xorq	%rax, %rcx
	movl	%ecx, %eax
	shll	$7, %eax
	andl	$-1658038656, %eax              # imm = 0x9D2C5680
	xorq	%rcx, %rax
	movl	%eax, %ecx
	shll	$15, %ecx
	andl	$-272236544, %ecx               # imm = 0xEFC60000
	xorq	%rax, %rcx
	movq	%rcx, %rax
	shrq	$18, %rax
	xorq	%rcx, %rax
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end13:
	.size	_ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEclEv, .Lfunc_end13-_ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEclEv
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EE11_M_gen_randEv,"axG",@progbits,_ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EE11_M_gen_randEv,comdat
	.weak	_ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EE11_M_gen_randEv # -- Begin function _ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EE11_M_gen_randEv
	.p2align	1, 0x90
	.type	_ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EE11_M_gen_randEv,@function
_ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EE11_M_gen_randEv: # @_ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EE11_M_gen_randEv
	.cfi_startproc
# %bb.0:
	movl	$2567483615, %eax               # imm = 0x9908B0DF
	movq	(%rdi), %rdx
	xorl	%ecx, %ecx
.LBB14_1:                               # =>This Inner Loop Header: Depth=1
	andq	$-2147483648, %rdx              # imm = 0x80000000
	movq	8(%rdi,%rcx,8), %rsi
	movl	%esi, %r8d
	andl	$2147483646, %r8d               # imm = 0x7FFFFFFE
	orq	%rdx, %r8
	shrq	%r8
	xorq	3176(%rdi,%rcx,8), %r8
	movq	%rsi, %rdx
                                        # kill: def $esi killed $esi killed $rsi def $rsi
	andl	$1, %esi
	negl	%esi
	andl	%eax, %esi
	xorq	%r8, %rsi
	movq	%rsi, (%rdi,%rcx,8)
	leaq	1(%rcx), %rsi
	movq	%rsi, %rcx
	cmpq	$227, %rsi
	jne	.LBB14_1
# %bb.2:                                # %.preheader.preheader
	movq	1816(%rdi), %rdx
	movl	$228, %ecx
.LBB14_3:                               # %.preheader
                                        # =>This Inner Loop Header: Depth=1
	andq	$-2147483648, %rdx              # imm = 0x80000000
	movq	(%rdi,%rcx,8), %rsi
	movl	%esi, %r8d
	andl	$2147483646, %r8d               # imm = 0x7FFFFFFE
	orq	%rdx, %r8
	shrq	%r8
	xorq	-1824(%rdi,%rcx,8), %r8
	movq	%rsi, %rdx
                                        # kill: def $esi killed $esi killed $rsi def $rsi
	andl	$1, %esi
	negl	%esi
	andl	%eax, %esi
	xorq	%r8, %rsi
	movq	%rsi, -8(%rdi,%rcx,8)
	incq	%rcx
	cmpq	$624, %rcx                      # imm = 0x270
	jne	.LBB14_3
# %bb.4:
	movq	$-2147483648, %rcx              # imm = 0x80000000
	andq	4984(%rdi), %rcx
	movq	(%rdi), %rdx
	movl	%edx, %esi
	andl	$2147483646, %esi               # imm = 0x7FFFFFFE
	orq	%rcx, %rsi
	shrq	%rsi
	xorq	3168(%rdi), %rsi
	andl	$1, %edx
	negl	%edx
	andl	%eax, %edx
	xorq	%rsi, %rdx
	movq	%rdx, 4984(%rdi)
	movq	$0, 4992(%rdi)
	retq
.Lfunc_end14:
	.size	_ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EE11_M_gen_randEv, .Lfunc_end14-_ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EE11_M_gen_randEv
	.cfi_endproc
                                        # -- End function
	.text
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB15_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB15_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z31update_centers_numerator_kernelPfS_S_iiiiS_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z33update_centers_denominator_kernelPfS_S_iiiiS_i, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z24update_membership_kernelPfS_S_iiii, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z15fcm_step_kernelPfS_S_iiii, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end15:
	.size	__hip_module_ctor, .Lfunc_end15-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB16_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB16_2:
	retq
.Lfunc_end16:
	.size	__hip_module_dtor, .Lfunc_end16-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z31update_centers_numerator_kernelPfS_S_iiiiS_i,@object # @_Z31update_centers_numerator_kernelPfS_S_iiiiS_i
	.section	.rodata,"a",@progbits
	.globl	_Z31update_centers_numerator_kernelPfS_S_iiiiS_i
	.p2align	3, 0x0
_Z31update_centers_numerator_kernelPfS_S_iiiiS_i:
	.quad	_Z46__device_stub__update_centers_numerator_kernelPfS_S_iiiiS_i
	.size	_Z31update_centers_numerator_kernelPfS_S_iiiiS_i, 8

	.type	_Z33update_centers_denominator_kernelPfS_S_iiiiS_i,@object # @_Z33update_centers_denominator_kernelPfS_S_iiiiS_i
	.globl	_Z33update_centers_denominator_kernelPfS_S_iiiiS_i
	.p2align	3, 0x0
_Z33update_centers_denominator_kernelPfS_S_iiiiS_i:
	.quad	_Z48__device_stub__update_centers_denominator_kernelPfS_S_iiiiS_i
	.size	_Z33update_centers_denominator_kernelPfS_S_iiiiS_i, 8

	.type	_Z24update_membership_kernelPfS_S_iiii,@object # @_Z24update_membership_kernelPfS_S_iiii
	.globl	_Z24update_membership_kernelPfS_S_iiii
	.p2align	3, 0x0
_Z24update_membership_kernelPfS_S_iiii:
	.quad	_Z39__device_stub__update_membership_kernelPfS_S_iiii
	.size	_Z24update_membership_kernelPfS_S_iiii, 8

	.type	_Z15fcm_step_kernelPfS_S_iiii,@object # @_Z15fcm_step_kernelPfS_S_iiii
	.globl	_Z15fcm_step_kernelPfS_S_iiii
	.p2align	3, 0x0
_Z15fcm_step_kernelPfS_S_iiii:
	.quad	_Z30__device_stub__fcm_step_kernelPfS_S_iiii
	.size	_Z15fcm_step_kernelPfS_S_iiii, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"default"
	.size	.L.str, 8

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z31update_centers_numerator_kernelPfS_S_iiiiS_i"
	.size	.L__unnamed_1, 49

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z33update_centers_denominator_kernelPfS_S_iiiiS_i"
	.size	.L__unnamed_2, 51

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z24update_membership_kernelPfS_S_iiii"
	.size	.L__unnamed_3, 39

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"_Z15fcm_step_kernelPfS_S_iiii"
	.size	.L__unnamed_4, 30

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __gxx_personality_v0
	.addrsig_sym _Z46__device_stub__update_centers_numerator_kernelPfS_S_iiiiS_i
	.addrsig_sym _Z48__device_stub__update_centers_denominator_kernelPfS_S_iiiiS_i
	.addrsig_sym _Z39__device_stub__update_membership_kernelPfS_S_iiii
	.addrsig_sym _Z30__device_stub__fcm_step_kernelPfS_S_iiii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Unwind_Resume
	.addrsig_sym _Z31update_centers_numerator_kernelPfS_S_iiiiS_i
	.addrsig_sym _Z33update_centers_denominator_kernelPfS_S_iiiiS_i
	.addrsig_sym _Z24update_membership_kernelPfS_S_iiii
	.addrsig_sym _Z15fcm_step_kernelPfS_S_iiii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z31update_centers_numerator_kernelPfS_S_iiiiS_i ; -- Begin function _Z31update_centers_numerator_kernelPfS_S_iiiiS_i
	.globl	_Z31update_centers_numerator_kernelPfS_S_iiiiS_i
	.p2align	8
	.type	_Z31update_centers_numerator_kernelPfS_S_iiiiS_i,@function
_Z31update_centers_numerator_kernelPfS_S_iiiiS_i: ; @_Z31update_centers_numerator_kernelPfS_S_iiiiS_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x44
	s_load_b64 s[4:5], s[0:1], 0x18
	s_mov_b32 s8, s15
	s_mov_b32 s9, exec_lo
	s_waitcnt lgkmcnt(0)
	s_and_b32 s3, s2, 0xffff
	s_mul_i32 s2, s5, s4
	v_mad_u64_u32 v[1:2], null, s8, s3, v[0:1]
	v_mov_b32_e32 v2, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_cmpx_gt_i32_e64 s2, v1
	s_cbranch_execz .LBB0_2
; %bb.1:
	s_load_b32 s10, s[0:1], 0x30
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[3:4], null, s2, s10, v[1:2]
	s_load_b32 s10, s[0:1], 0x24
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v1, s2, s4, v1
	v_add_co_ci_u32_e64 v2, s2, s5, v2, s2
	s_delay_alu instid0(VALU_DEP_3)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	s_mov_b32 s2, 0x3e76c4e1
	global_load_b32 v1, v[1:2], off
	v_add_co_u32 v3, vcc_lo, s6, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s7, v4, vcc_lo
	s_waitcnt lgkmcnt(0)
	s_cmp_lg_u32 s10, 0
	s_cselect_b32 vcc_lo, -1, 0
	global_load_b32 v3, v[3:4], off
	s_and_b32 s4, s10, 0xffff
	s_waitcnt vmcnt(0)
	v_cndmask_b32_e32 v3, 1.0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_frexp_mant_f32_e64 v4, |v3|
	v_cmp_gt_f32_e32 vcc_lo, 0x3f2aaaab, v4
	v_cndmask_b32_e64 v5, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f32 v4, v4, v5
	v_add_f32_e32 v5, 1.0, v4
	v_add_f32_e32 v7, -1.0, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v9, -1.0, v5
	v_sub_f32_e32 v4, v4, v9
	v_rcp_f32_e32 v6, v5
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v8, v7, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v10, v5, v8
	v_fma_f32 v5, v8, v5, -v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v5, v8, v4
	v_add_f32_e32 v4, v10, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v9, v7, v4 :: v_dual_sub_f32 v10, v4, v10
	v_sub_f32_e32 v5, v10, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v7, v7, v9
	v_sub_f32_e32 v4, v7, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v4, v5, v4
	v_add_f32_e32 v4, v9, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v2, v6, v4
	v_add_f32_e32 v4, v8, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v6, v4, v4
	v_sub_f32_e32 v5, v4, v8
	v_sub_f32_e32 v2, v2, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v5, v4, v4, -v6
	v_add_f32_e32 v7, v2, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v5, v4, v7
	v_add_f32_e32 v7, v6, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_fmaak_f32 v8, s2, v7, 0x3e91f4c4
	v_sub_f32_e32 v6, v7, v6
	s_and_b32 s2, s10, 0xffff0000
	s_bitcmp0_b32 s10, 0
	v_dual_mul_f32 v11, v4, v7 :: v_dual_fmaak_f32 v8, v7, v8, 0x3ecccdef
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v5, v5, v6
	v_fma_f32 v12, v7, v4, -v11
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v9, v7, v8
	v_fmac_f32_e32 v12, v7, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f32 v6, v7, v8, -v9
	v_ldexp_f32 v2, v2, 1
	v_fmac_f32_e32 v12, v5, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v6, v5, v8
	v_ldexp_f32 v4, v4, 1
	v_dual_add_f32 v7, v11, v12 :: v_dual_add_f32 v8, v9, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v9, v8, v9 :: v_dual_add_f32 v10, 0x3f2aaaaa, v8
	v_dual_sub_f32 v6, v6, v9 :: v_dual_add_f32 v9, 0xbf2aaaaa, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f32_e32 v6, 0x31739010, v6
	v_sub_f32_e32 v8, v8, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v6, v6, v8
	v_add_f32_e32 v5, v10, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v9, v7, v5
	v_sub_f32_e32 v8, v10, v5
	v_sub_f32_e32 v10, v7, v11
	v_add_f32_e32 v6, v6, v8
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f32 v8, v7, v5, -v9
	v_sub_f32_e32 v10, v12, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v8, v7, v6
	v_frexp_exp_i32_f32_e32 v6, v3
	v_fmac_f32_e32 v8, v10, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_subrev_co_ci_u32_e32 v5, vcc_lo, 0, v6, vcc_lo
	v_add_f32_e32 v6, v9, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f32_i32_e32 v5, v5
	v_add_f32_e32 v7, v4, v6
	v_sub_f32_e32 v9, v6, v9
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f32_e32 v10, 0x3f317218, v5
	v_sub_f32_e32 v4, v7, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_f32_e32 v8, v8, v9
	v_fma_f32 v9, 0x3f317218, v5, -v10
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v4, v6, v4
	v_dual_add_f32 v2, v2, v8 :: v_dual_fmamk_f32 v5, v5, 0xb102e308, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f32_e32 v2, v2, v4
	v_add_f32_e32 v4, v10, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f32_e32 v6, v7, v2
	v_sub_f32_e32 v10, v4, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_add_f32 v8, v4, v6 :: v_dual_sub_f32 v7, v6, v7
	v_sub_f32_e32 v5, v5, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v9, v8, v4 :: v_dual_sub_f32 v2, v2, v7
	v_sub_f32_e32 v11, v8, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_sub_f32 v6, v6, v9 :: v_dual_add_f32 v7, v5, v2
	v_sub_f32_e32 v4, v4, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f32_e32 v4, v6, v4
	v_sub_f32_e32 v6, v7, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f32_e32 v4, v7, v4
	v_sub_f32_e32 v7, v7, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_sub_f32 v2, v2, v6 :: v_dual_add_f32 v9, v8, v4
	v_sub_f32_e32 v5, v5, v7
	v_cvt_f32_i32_e32 v7, s2
	v_cmp_class_f32_e64 s2, v3, 0x204
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v6, v9, v8
	v_cvt_f32_i32_e32 v8, s4
	v_add_f32_e32 v2, v2, v5
	s_cselect_b32 s4, -1, 0
	v_dual_sub_f32 v4, v4, v6 :: v_dual_add_f32 v5, v7, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f32_e32 v2, v2, v4
	v_sub_f32_e32 v4, v7, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v6, v9, v2
	v_dual_add_f32 v4, v4, v8 :: v_dual_sub_f32 v7, v6, v9
	v_mul_f32_e32 v8, v5, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f32_e32 v4, v4, v6
	v_sub_f32_e32 v2, v2, v7
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f32 v6, v5, v6, -v8
	v_cmp_class_f32_e64 vcc_lo, v8, 0x204
	v_fmac_f32_e32 v4, v5, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v2, v6, v4
	v_add_f32_e32 v4, v8, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v5, v4, v8, vcc_lo
	v_sub_f32_e32 v4, v4, v8
	v_cmp_eq_f32_e32 vcc_lo, 0x42b17218, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v2, v2, v4
	v_cndmask_b32_e64 v6, 0, 0x37000000, vcc_lo
	v_cmp_neq_f32_e64 vcc_lo, 0x7f800000, |v5|
	v_sub_f32_e32 v7, v5, v6
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v2, 0, v2, vcc_lo
	v_cndmask_b32_e64 v5, v3, 1.0, s4
	v_mul_f32_e32 v9, 0x3fb8aa3b, v7
	v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v7
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f32_e32 v2, v6, v2
	v_fma_f32 v10, 0x3fb8aa3b, v7, -v9
	v_rndne_f32_e32 v11, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_fmamk_f32 v10, v7, 0x32a5705f, v10 :: v_dual_sub_f32 v9, v9, v11
	v_cvt_i32_f32_e32 v8, v11
	v_add_f32_e32 v9, v9, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_exp_f32_e32 v9, v9
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v4, v9, v8
	v_cndmask_b32_e32 v4, 0, v4, vcc_lo
	v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v4, 0x7f800000, v4, vcc_lo
	v_fma_f32 v2, v4, v2, v4
	v_cmp_eq_f32_e32 vcc_lo, 0x7f800000, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v2, v2, v4, vcc_lo
	v_cmp_eq_f32_e32 vcc_lo, 0, v3
	v_cndmask_b32_e64 v3, v3, 0, s4
	v_bfi_b32 v2, 0x7fffffff, v2, v5
	s_or_b32 s2, vcc_lo, s2
	s_cmp_gt_i32 s10, -1
	s_cselect_b32 s5, -1, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_xor_b32 s5, s5, vcc_lo
	v_cndmask_b32_e64 v4, 0, 0x7f800000, s5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_bfi_b32 v3, 0x7fffffff, v4, v3
	v_cndmask_b32_e64 v2, v2, v3, s2
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f32_e32 v2, v1, v2
.LBB0_2:
	s_or_b32 exec_lo, exec_lo, s9
	v_lshl_add_u32 v1, v0, 2, 0
	s_cmp_lt_u32 s3, 2
	ds_store_b32 v1, v2
	s_waitcnt lgkmcnt(0)
	s_barrier
.LBB0_3:                                ; =>This Inner Loop Header: Depth=1
	buffer_gl0_inv
	s_cbranch_scc1 .LBB0_7
; %bb.4:                                ; %.lr.ph
                                        ;   in Loop: Header=BB0_3 Depth=1
	s_lshr_b32 s2, s3, 1
	s_mov_b32 s4, exec_lo
	v_cmpx_gt_u32_e64 s2, v0
	s_cbranch_execz .LBB0_6
; %bb.5:                                ;   in Loop: Header=BB0_3 Depth=1
	v_lshl_add_u32 v2, s2, 2, v1
	ds_load_b32 v2, v2
	ds_load_b32 v3, v1
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v2, v2, v3
	ds_store_b32 v1, v2
.LBB0_6:                                ;   in Loop: Header=BB0_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	s_waitcnt lgkmcnt(0)
	s_barrier
	s_cmp_lt_u32 s3, 4
	s_mov_b32 s3, s2
	s_branch .LBB0_3
.LBB0_7:                                ; %._crit_edge
	s_mov_b32 s2, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB0_9
; %bb.8:
	v_mov_b32_e32 v0, 0
	s_load_b64 s[0:1], s[0:1], 0x28
	s_mov_b32 s9, 0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b64 s[2:3], s[8:9], 2
	ds_load_b32 v1, v0
	s_waitcnt lgkmcnt(0)
	s_add_u32 s0, s0, s2
	s_addc_u32 s1, s1, s3
	global_store_b32 v0, v1, s[0:1]
.LBB0_9:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z31update_centers_numerator_kernelPfS_S_iiiiS_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 312
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 13
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z31update_centers_numerator_kernelPfS_S_iiiiS_i, .Lfunc_end0-_Z31update_centers_numerator_kernelPfS_S_iiiiS_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1464
; NumSgprs: 18
; NumVgprs: 13
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 13
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z33update_centers_denominator_kernelPfS_S_iiiiS_i ; -- Begin function _Z33update_centers_denominator_kernelPfS_S_iiiiS_i
	.globl	_Z33update_centers_denominator_kernelPfS_S_iiiiS_i
	.p2align	8
	.type	_Z33update_centers_denominator_kernelPfS_S_iiiiS_i,@function
_Z33update_centers_denominator_kernelPfS_S_iiiiS_i: ; @_Z33update_centers_denominator_kernelPfS_S_iiiiS_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x44
	s_load_b64 s[6:7], s[0:1], 0x18
	s_mov_b32 s4, s15
	s_mov_b32 s5, exec_lo
	s_waitcnt lgkmcnt(0)
	s_and_b32 s3, s2, 0xffff
	s_mul_i32 s2, s7, s6
	v_mad_u64_u32 v[1:2], null, s4, s3, v[0:1]
	v_mov_b32_e32 v2, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_cmpx_gt_i32_e64 s2, v1
	s_cbranch_execz .LBB1_2
; %bb.1:
	s_clause 0x1
	s_load_b32 s6, s[0:1], 0x30
	s_load_b64 s[8:9], s[0:1], 0x8
	s_waitcnt lgkmcnt(0)
	v_mad_u64_u32 v[2:3], null, s2, s6, v[1:2]
	s_load_b32 s6, s[0:1], 0x24
	s_mov_b32 s2, 0x3e76c4e1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[1:2], 2, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v1, vcc_lo, s8, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s9, v2, vcc_lo
	s_waitcnt lgkmcnt(0)
	s_cmp_lg_u32 s6, 0
	s_cselect_b32 vcc_lo, -1, 0
	global_load_b32 v1, v[1:2], off
	s_and_b32 s7, s6, 0xffff
	s_waitcnt vmcnt(0)
	v_cndmask_b32_e32 v1, 1.0, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_frexp_mant_f32_e64 v2, |v1|
	v_cmp_gt_f32_e32 vcc_lo, 0x3f2aaaab, v2
	v_cndmask_b32_e64 v3, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f32 v2, v2, v3
	v_add_f32_e32 v3, 1.0, v2
	v_add_f32_e32 v5, -1.0, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v7, -1.0, v3
	v_sub_f32_e32 v2, v2, v7
	v_rcp_f32_e32 v4, v3
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v6, v5, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v8, v3, v6
	v_fma_f32 v3, v6, v3, -v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v3, v6, v2
	v_add_f32_e32 v2, v8, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v7, v5, v2 :: v_dual_sub_f32 v8, v2, v8
	v_sub_f32_e32 v3, v8, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v5, v5, v7
	v_sub_f32_e32 v2, v5, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v2, v3, v2
	v_add_f32_e32 v2, v7, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v2, v4, v2
	v_add_f32_e32 v3, v6, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v5, v3, v3
	v_sub_f32_e32 v4, v3, v6
	v_sub_f32_e32 v2, v2, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v4, v3, v3, -v5
	v_add_f32_e32 v6, v2, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v4, v3, v6
	v_add_f32_e32 v6, v5, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_fmaak_f32 v7, s2, v6, 0x3e91f4c4
	v_sub_f32_e32 v5, v6, v5
	s_and_b32 s2, s6, 0xffff0000
	s_bitcmp0_b32 s6, 0
	v_dual_fmaak_f32 v7, v6, v7, 0x3ecccdef :: v_dual_sub_f32 v4, v4, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v8, v6, v7
	v_fma_f32 v5, v6, v7, -v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v5, v4, v7
	v_add_f32_e32 v7, v8, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v8, v7, v8 :: v_dual_add_f32 v9, 0x3f2aaaaa, v7
	v_dual_mul_f32 v10, v3, v6 :: v_dual_sub_f32 v5, v5, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f32 v11, v6, v3, -v10
	v_add_f32_e32 v8, 0xbf2aaaaa, v9
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f32_e32 v5, 0x31739010, v5
	v_fmac_f32_e32 v11, v6, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_sub_f32_e32 v7, v7, v8
	v_ldexp_f32 v2, v2, 1
	v_fmac_f32_e32 v11, v4, v3
	v_ldexp_f32 v3, v3, 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f32_e32 v6, v10, v11
	v_add_f32_e32 v5, v5, v7
	v_add_f32_e32 v4, v9, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_sub_f32_e32 v7, v9, v4
	v_mul_f32_e32 v8, v6, v4
	v_sub_f32_e32 v9, v6, v10
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f32_e32 v5, v5, v7
	v_fma_f32 v7, v6, v4, -v8
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v9, v11, v9
	v_fmac_f32_e32 v7, v6, v5
	v_frexp_exp_i32_f32_e32 v5, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v7, v9, v4
	v_subrev_co_ci_u32_e32 v4, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f32_e32 v5, v8, v7
	v_cvt_f32_i32_e32 v4, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v8, v5, v8
	v_dual_mul_f32 v9, 0x3f317218, v4 :: v_dual_add_f32 v6, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v7, v7, v8
	v_fma_f32 v8, 0x3f317218, v4, -v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f32_e32 v2, v2, v7
	v_dual_fmamk_f32 v4, v4, 0xb102e308, v8 :: v_dual_sub_f32 v3, v6, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v3, v5, v3
	v_dual_add_f32 v2, v2, v3 :: v_dual_add_f32 v3, v9, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v5, v6, v2
	v_dual_add_f32 v7, v3, v5 :: v_dual_sub_f32 v6, v5, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v8, v7, v3
	v_dual_sub_f32 v9, v3, v9 :: v_dual_sub_f32 v2, v2, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v10, v7, v8
	v_dual_sub_f32 v4, v4, v9 :: v_dual_sub_f32 v5, v5, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v3, v3, v10
	v_dual_add_f32 v6, v4, v2 :: v_dual_add_f32 v3, v5, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v5, v6, v4
	v_add_f32_e32 v3, v6, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v6, v6, v5
	v_sub_f32_e32 v2, v2, v5
	v_sub_f32_e32 v4, v4, v6
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_f32_e32 v8, v7, v3
	v_cvt_f32_i32_e32 v6, s2
	v_cmp_class_f32_e64 s2, v1, 0x204
	v_dual_add_f32 v2, v2, v4 :: v_dual_sub_f32 v5, v8, v7
	v_cvt_f32_i32_e32 v7, s7
	s_cselect_b32 s7, -1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v3, v3, v5 :: v_dual_add_f32 v4, v6, v7
	v_add_f32_e32 v2, v2, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v3, v6, v4
	v_add_f32_e32 v5, v8, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_add_f32 v3, v3, v7 :: v_dual_sub_f32 v6, v5, v8
	v_mul_f32_e32 v7, v4, v5
	v_dual_mul_f32 v3, v3, v5 :: v_dual_sub_f32 v2, v2, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f32 v5, v4, v5, -v7
	v_cmp_class_f32_e64 vcc_lo, v7, 0x204
	v_fmac_f32_e32 v3, v4, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v2, v5, v3
	v_add_f32_e32 v3, v7, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v4, v3, v7, vcc_lo
	v_cmp_eq_f32_e32 vcc_lo, 0x42b17218, v4
	v_cndmask_b32_e64 v5, 0, 0x37000000, vcc_lo
	v_sub_f32_e32 v3, v3, v7
	v_cmp_neq_f32_e64 vcc_lo, 0x7f800000, |v4|
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v6, v4, v5
	v_cndmask_b32_e64 v4, v1, 1.0, s7
	v_mul_f32_e32 v8, 0x3fb8aa3b, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f32 v9, 0x3fb8aa3b, v6, -v8
	v_rndne_f32_e32 v10, v8
	v_dual_fmamk_f32 v9, v6, 0x32a5705f, v9 :: v_dual_sub_f32 v8, v8, v10
	v_cvt_i32_f32_e32 v7, v10
	v_sub_f32_e32 v2, v2, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f32_e32 v8, v8, v9
	v_cndmask_b32_e32 v2, 0, v2, vcc_lo
	v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_exp_f32_e32 v8, v8
	v_add_f32_e32 v2, v5, v2
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v3, v8, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v3, 0, v3, vcc_lo
	v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v6
	v_cndmask_b32_e32 v3, 0x7f800000, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f32 v2, v3, v2, v3
	v_cmp_eq_f32_e32 vcc_lo, 0x7f800000, v3
	v_cndmask_b32_e32 v2, v2, v3, vcc_lo
	v_cmp_eq_f32_e32 vcc_lo, 0, v1
	v_cndmask_b32_e64 v1, v1, 0, s7
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	v_bfi_b32 v2, 0x7fffffff, v2, v4
	s_or_b32 s2, vcc_lo, s2
	s_cmp_gt_i32 s6, -1
	s_cselect_b32 s6, -1, 0
	s_xor_b32 s6, s6, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v3, 0, 0x7f800000, s6
	v_bfi_b32 v1, 0x7fffffff, v3, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e64 v2, v2, v1, s2
.LBB1_2:
	s_or_b32 exec_lo, exec_lo, s5
	v_lshl_add_u32 v1, v0, 2, 0
	s_cmp_lt_u32 s3, 2
	ds_store_b32 v1, v2
	s_waitcnt lgkmcnt(0)
	s_barrier
.LBB1_3:                                ; =>This Inner Loop Header: Depth=1
	buffer_gl0_inv
	s_cbranch_scc1 .LBB1_7
; %bb.4:                                ; %.lr.ph
                                        ;   in Loop: Header=BB1_3 Depth=1
	s_lshr_b32 s2, s3, 1
	s_mov_b32 s5, exec_lo
	v_cmpx_gt_u32_e64 s2, v0
	s_cbranch_execz .LBB1_6
; %bb.5:                                ;   in Loop: Header=BB1_3 Depth=1
	v_lshl_add_u32 v2, s2, 2, v1
	ds_load_b32 v2, v2
	ds_load_b32 v3, v1
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v2, v2, v3
	ds_store_b32 v1, v2
.LBB1_6:                                ;   in Loop: Header=BB1_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt lgkmcnt(0)
	s_barrier
	s_cmp_lt_u32 s3, 4
	s_mov_b32 s3, s2
	s_branch .LBB1_3
.LBB1_7:                                ; %._crit_edge
	s_mov_b32 s2, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB1_9
; %bb.8:
	v_mov_b32_e32 v0, 0
	s_load_b64 s[0:1], s[0:1], 0x28
	s_mov_b32 s5, 0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b64 s[2:3], s[4:5], 2
	ds_load_b32 v1, v0
	s_waitcnt lgkmcnt(0)
	s_add_u32 s0, s0, s2
	s_addc_u32 s1, s1, s3
	global_store_b32 v0, v1, s[0:1]
.LBB1_9:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z33update_centers_denominator_kernelPfS_S_iiiiS_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 312
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 12
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z33update_centers_denominator_kernelPfS_S_iiiiS_i, .Lfunc_end1-_Z33update_centers_denominator_kernelPfS_S_iiiiS_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1416
; NumSgprs: 18
; NumVgprs: 12
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 12
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z24update_membership_kernelPfS_S_iiii ; -- Begin function _Z24update_membership_kernelPfS_S_iiii
	.globl	_Z24update_membership_kernelPfS_S_iiii
	.p2align	8
	.type	_Z24update_membership_kernelPfS_S_iiii,@function
_Z24update_membership_kernelPfS_S_iiii: ; @_Z24update_membership_kernelPfS_S_iiii
; %bb.0:
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x18
	s_load_b32 s8, s[0:1], 0x34
	s_waitcnt lgkmcnt(0)
	s_ashr_i32 s2, s4, 31
	s_and_b32 s8, s8, 0xffff
	s_add_i32 s3, s4, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_xor_b32 s3, s3, s2
	v_cvt_f32_u32_e32 v1, s3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v1, v1
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v1, 0x4f7ffffe, v1
	v_cvt_u32_f32_e32 v1, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[4:5], null, s15, s8, v[0:1]
	s_sub_i32 s8, 0, s3
	v_mul_lo_u32 v2, s8, v1
	s_ashr_i32 s8, s5, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	s_add_i32 s9, s5, s8
	v_ashrrev_i32_e32 v3, 31, v4
	s_xor_b32 s9, s9, s8
	s_mul_i32 s8, s5, s4
	v_cvt_f32_u32_e32 v6, s9
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v2, v1, v2
	v_rcp_iflag_f32_e32 v6, v6
	v_add_nc_u32_e32 v5, v4, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_nc_u32_e32 v1, v1, v2
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v6, 0x4f7ffffe, v6
	v_xor_b32_e32 v5, v5, v3
	v_xor_b32_e32 v3, s2, v3
	s_sub_i32 s2, 0, s9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v1, v5, v1
	v_mul_lo_u32 v2, v1, s3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v2, v5, v2
	v_add_nc_u32_e32 v5, 1, v1
	v_subrev_nc_u32_e32 v7, s3, v2
	v_cmp_le_u32_e32 vcc_lo, s3, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v1, v1, v5 :: v_dual_cndmask_b32 v2, v2, v7
	v_add_nc_u32_e32 v5, 1, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cmp_le_u32_e32 vcc_lo, s3, v2
	v_cvt_u32_f32_e32 v2, v6
	v_cndmask_b32_e32 v1, v1, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_mul_lo_u32 v5, s2, v2
	s_ashr_i32 s2, s8, 31
	s_add_i32 s3, s8, s2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v1, v1, v3
	s_xor_b32 s3, s3, s2
	v_sub_nc_u32_e32 v1, v1, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v3, v2, v5
	v_ashrrev_i32_e32 v6, 31, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v2, v3
	v_add_nc_u32_e32 v5, v1, v6
	v_mul_lo_u32 v1, v1, s4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v3, v5, v6
	v_mul_hi_u32 v2, v3, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v2, v2, s9
	v_sub_nc_u32_e32 v2, v3, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_subrev_nc_u32_e32 v3, s9, v2
	v_cmp_le_u32_e32 vcc_lo, s9, v2
	v_cndmask_b32_e32 v2, v2, v3, vcc_lo
	v_cvt_f32_u32_e32 v3, s3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_subrev_nc_u32_e32 v5, s9, v2
	v_cmp_le_u32_e32 vcc_lo, s9, v2
	v_rcp_iflag_f32_e32 v7, v3
	v_sub_nc_u32_e32 v3, v4, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v2, v2, v5, vcc_lo
	v_xor_b32_e32 v2, v2, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v5, v2, v6
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v6, 0x4f7ffffe, v7
	v_mad_u64_u32 v[1:2], null, v5, s4, v[3:4]
	v_cvt_u32_f32_e32 v2, v6
	s_sub_i32 s4, 0, s3
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mul_lo_u32 v3, s4, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v5, v4, v1
	s_load_b64 s[4:5], s[0:1], 0x10
	v_ashrrev_i32_e32 v6, 31, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v3, v2, v3
	v_add_nc_u32_e32 v5, v5, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v2, v3
	v_xor_b32_e32 v3, v5, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v2, v3, v2
	v_mul_lo_u32 v5, v2, s3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v3, v3, v5
	v_add_nc_u32_e32 v5, 1, v2
	v_subrev_nc_u32_e32 v7, s3, v3
	v_cmp_le_u32_e32 vcc_lo, s3, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v5, v2, v5, vcc_lo
	v_cndmask_b32_e32 v3, v3, v7, vcc_lo
	v_xor_b32_e32 v2, s2, v6
	s_mul_i32 s2, s8, s6
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v7, 1, v5
	v_cmp_le_u32_e32 vcc_lo, s3, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v3, v5, v7, vcc_lo
	v_cmp_le_i32_e32 vcc_lo, s2, v4
	s_add_i32 s2, s6, 2
	v_xor_b32_e32 v3, v3, v2
	s_and_saveexec_b32 s3, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s3, exec_lo, s3
	s_cbranch_execz .LBB2_3
; %bb.1:                                ; %.preheader
	s_cmp_lt_i32 s6, -1
	s_cbranch_scc1 .LBB2_3
; %bb.2:                                ; %.lr.ph
	v_lshl_add_u32 v4, v0, 2, 0
	v_mov_b32_e32 v5, 0
	ds_store_b32 v4, v5
.LBB2_3:                                ; %Flow111
	s_or_saveexec_b32 s9, s3
	v_mul_lo_u32 v4, s2, v0
	v_sub_nc_u32_e32 v3, v3, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_lshl_add_u32 v0, v4, 2, 0
	s_xor_b32 exec_lo, exec_lo, s9
	s_cbranch_execz .LBB2_7
; %bb.4:
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b128 s[0:3], s[0:1], 0x0
	s_cmp_lt_i32 s6, 1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[5:6], null, s8, v3, v[1:2]
	v_lshlrev_b64 v[7:8], 2, v[1:2]
	v_ashrrev_i32_e32 v6, 31, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[5:6], 2, v[5:6]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v7, vcc_lo, s0, v7
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v8, vcc_lo, s1, v8, vcc_lo
	v_add_co_u32 v5, vcc_lo, s4, v5
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v6, vcc_lo, s5, v6, vcc_lo
	global_load_b32 v2, v[7:8], off
	global_load_b32 v5, v[5:6], off
	s_waitcnt vmcnt(0)
	ds_store_2addr_b32 v0, v2, v5 offset1:1
	s_cbranch_scc1 .LBB2_7
; %bb.5:                                ; %.lr.ph71.preheader
	v_add_nc_u32_e32 v2, 8, v0
	s_mov_b32 s0, s6
.LBB2_6:                                ; %.lr.ph71
                                        ; =>This Inner Loop Header: Depth=1
	s_load_b32 s1, s[2:3], 0x0
	s_add_i32 s0, s0, -1
	s_add_u32 s2, s2, 4
	s_addc_u32 s3, s3, 0
	s_cmp_eq_u32 s0, 0
	s_waitcnt lgkmcnt(0)
	v_mov_b32_e32 v5, s1
	ds_store_b32 v2, v5
	v_add_nc_u32_e32 v2, 4, v2
	s_cbranch_scc0 .LBB2_6
.LBB2_7:                                ; %.loopexit
	s_or_b32 exec_lo, exec_lo, s9
	s_cmp_lt_i32 s6, 1
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB2_10
; %bb.8:                                ; %.lr.ph74
	v_add_nc_u32_e32 v2, v4, v3
	s_mov_b32 s1, 0x3e76c4e1
	s_add_i32 s0, s7, -1
	v_lshlrev_b32_e32 v4, 2, v4
	s_ashr_i32 s2, s0, 31
	v_lshl_add_u32 v2, v2, 2, 0
	s_add_i32 s0, s0, s2
	ds_load_b32 v5, v2 offset:8
	ds_load_b32 v2, v0
	s_xor_b32 s0, s0, s2
	s_waitcnt lgkmcnt(0)
	v_sub_f32_e32 v5, v2, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_frexp_mant_f32_e64 v6, |v5|
	v_cmp_gt_f32_e32 vcc_lo, 0x3f2aaaab, v6
	v_cndmask_b32_e64 v7, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f32 v6, v6, v7
	v_add_f32_e32 v7, 1.0, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v8, v7
	v_add_f32_e32 v11, -1.0, v7
	v_dual_add_f32 v9, -1.0, v6 :: v_dual_sub_f32 v6, v6, v11
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v10, v9, v8
	v_cmp_neq_f32_e64 s7, 0x7f800000, |v5|
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v12, v7, v10
	v_fma_f32 v7, v10, v7, -v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v7, v10, v6
	v_add_f32_e32 v6, v12, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v11, v9, v6 :: v_dual_sub_f32 v12, v6, v12
	v_sub_f32_e32 v7, v12, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v9, v9, v11
	v_sub_f32_e32 v6, v9, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v6, v7, v6
	v_add_f32_e32 v6, v11, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v6, v8, v6
	v_add_f32_e32 v7, v10, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v9, v7, v7
	v_sub_f32_e32 v8, v7, v10
	v_sub_f32_e32 v6, v6, v8
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v8, v7, v7, -v9
	v_add_f32_e32 v10, v6, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v8, v7, v10
	v_add_f32_e32 v10, v9, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmaak_f32 v11, s1, v10, 0x3e91f4c4
	v_sub_f32_e32 v9, v10, v9
	v_dual_fmaak_f32 v11, v10, v11, 0x3ecccdef :: v_dual_sub_f32 v8, v8, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v12, v10, v11
	v_fma_f32 v9, v10, v11, -v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v9, v8, v11 :: v_dual_mul_f32 v14, v7, v10
	v_add_f32_e32 v11, v12, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v15, v10, v7, -v14
	v_dual_sub_f32 v12, v11, v12 :: v_dual_fmac_f32 v15, v10, v6
	v_add_f32_e32 v13, 0x3f2aaaaa, v11
	v_ldexp_f32 v6, v6, 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_sub_f32_e32 v9, v9, v12
	v_fmac_f32_e32 v15, v8, v7
	v_ldexp_f32 v7, v7, 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f32_e32 v9, 0x31739010, v9
	v_add_f32_e32 v12, 0xbf2aaaaa, v13
	v_sub_f32_e32 v11, v11, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v9, v9, v11
	v_add_f32_e32 v8, v13, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_add_f32 v10, v14, v15 :: v_dual_sub_f32 v11, v13, v8
	v_mul_f32_e32 v12, v10, v8
	v_sub_f32_e32 v13, v10, v14
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f32_e32 v9, v9, v11
	v_fma_f32 v11, v10, v8, -v12
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v13, v15, v13
	v_fmac_f32_e32 v11, v10, v9
	v_frexp_exp_i32_f32_e32 v9, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v11, v13, v8
	v_subrev_co_ci_u32_e32 v8, vcc_lo, 0, v9, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f32_e32 v9, v12, v11
	v_cvt_f32_i32_e32 v8, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v12, v9, v12
	v_add_f32_e32 v10, v7, v9
	v_sub_f32_e32 v11, v11, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mul_f32 v13, 0x3f317218, v8 :: v_dual_add_f32 v6, v6, v11
	v_fma_f32 v12, 0x3f317218, v8, -v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v12, 0xb102e308, v8 :: v_dual_sub_f32 v7, v10, v7
	v_sub_f32_e32 v7, v9, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v6, v6, v7
	v_dual_add_f32 v8, v10, v6 :: v_dual_add_f32 v7, v13, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v10, v8, v10 :: v_dual_add_f32 v9, v7, v8
	v_dual_sub_f32 v6, v6, v10 :: v_dual_sub_f32 v11, v9, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_sub_f32 v8, v8, v11 :: v_dual_sub_f32 v13, v7, v13
	v_sub_f32_e32 v14, v9, v11
	v_sub_f32_e32 v12, v12, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f32_e32 v10, v12, v6
	v_sub_f32_e32 v7, v7, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_add_f32 v7, v8, v7 :: v_dual_sub_f32 v8, v10, v12
	v_sub_f32_e32 v6, v6, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f32_e32 v7, v10, v7
	v_sub_f32_e32 v10, v10, v8
	v_dual_sub_f32 v8, v12, v10 :: v_dual_add_f32 v11, v9, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_add_f32 v6, v6, v8 :: v_dual_sub_f32 v9, v11, v9
	v_sub_f32_e32 v7, v7, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v6, v6, v7
	v_add_f32_e32 v7, v11, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_f32_e32 v9, v7, v7
	v_sub_f32_e32 v8, v7, v11
	v_mul_f32_e32 v10, 0, v7
	v_fma_f32 v7, v7, 2.0, -v9
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v6, v6, v8
	v_cmp_class_f32_e64 vcc_lo, v9, 0x204
	v_fmac_f32_e32 v10, 2.0, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v6, v7, v10
	v_add_f32_e32 v7, v9, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v8, v7, v9, vcc_lo
	v_cmp_eq_f32_e32 vcc_lo, 0x42b17218, v8
	v_cndmask_b32_e64 v10, 0, 0x37000000, vcc_lo
	v_cmp_neq_f32_e64 vcc_lo, 0x7f800000, |v8|
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v11, v8, v10
	v_mul_f32_e32 v12, 0x3fb8aa3b, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f32 v13, 0x3fb8aa3b, v11, -v12
	v_rndne_f32_e32 v14, v12
	v_dual_fmac_f32 v13, 0x32a5705f, v11 :: v_dual_sub_f32 v12, v12, v14
	v_sub_f32_e32 v7, v7, v9
	v_cvt_i32_f32_e32 v9, v14
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f32_e32 v12, v12, v13
	v_sub_f32_e32 v6, v6, v7
	v_cvt_f32_u32_e32 v13, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_exp_f32_e32 v12, v12
	v_cndmask_b32_e32 v6, 0, v6, vcc_lo
	v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_f32_e32 v6, v10, v6
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v7, v12, v9
	v_rcp_iflag_f32_e32 v9, v13
	v_cndmask_b32_e32 v7, 0, v7, vcc_lo
	v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v7, 0x7f800000, v7, vcc_lo
	v_fma_f32 v6, v7, v6, v7
	v_cmp_eq_f32_e32 vcc_lo, 0x7f800000, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v6, v6, v7, vcc_lo
	v_cmp_neq_f32_e32 vcc_lo, 0, v5
	v_cndmask_b32_e64 v6, 0x7f800000, |v6|, s7
	s_delay_alu instid0(TRANS32_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v8, 0x4f7ffffe, v9
	s_sub_i32 s7, 0, s0
	v_cndmask_b32_e32 v5, 0, v6, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_u32_f32_e32 v8, v8
	v_mul_f32_e32 v6, 0x4f800000, v5
	v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_readfirstlane_b32 s3, v8
	v_cndmask_b32_e32 v8, v5, v6, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s7, s7, s3
	s_mul_hi_u32 s7, s3, s7
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_add_i32 s3, s3, s7
	v_sqrt_f32_e32 v5, v8
	s_lshr_b32 s3, s3, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_mul_i32 s7, s3, s0
	s_add_i32 s9, s3, 1
	s_sub_i32 s7, 2, s7
	s_sub_i32 s10, s7, s0
	s_cmp_ge_u32 s7, s0
	s_waitcnt_depctr 0xfff
	v_add_nc_u32_e32 v6, -1, v5
	s_cselect_b32 s3, s9, s3
	s_cselect_b32 s7, s10, s7
	s_add_i32 s9, s3, 1
	s_cmp_ge_u32 s7, s0
	v_fma_f32 v9, -v6, v5, v8
	s_cselect_b32 s0, s9, s3
	v_add_nc_u32_e32 v7, 1, v5
	s_xor_b32 s0, s0, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	s_sub_i32 s7, s0, s2
	v_cmp_ge_f32_e64 s0, 0, v9
	v_fma_f32 v10, -v7, v5, v8
	s_cmp_eq_u32 s7, 0
	s_cselect_b32 s2, -1, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e64 v5, v5, v6, s0
	s_and_b32 s0, s7, 0xffff
	s_and_b32 s3, s7, 0xffff0000
	v_cvt_f32_i32_e32 v9, s0
	v_cmp_lt_f32_e64 s0, 0, v10
	v_cvt_f32_i32_e32 v6, s3
	s_bitcmp0_b32 s7, 0
	s_cselect_b32 s3, -1, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v7, v5, v7, s0
	v_add_f32_e32 v5, v6, v9
	s_cmp_gt_i32 s7, -1
	s_cselect_b32 s7, -1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_dual_mul_f32 v10, 0x37800000, v7 :: v_dual_sub_f32 v11, v6, v5
	v_add3_u32 v6, v4, 0, 8
	v_mov_b32_e32 v4, 0
	v_cndmask_b32_e32 v10, v7, v10, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v8, 0x260
	s_delay_alu instid0(VALU_DEP_2)
	v_dual_add_f32 v7, v11, v9 :: v_dual_cndmask_b32 v8, v10, v8
.LBB2_9:                                ; =>This Inner Loop Header: Depth=1
	ds_load_b32 v9, v6
	s_add_i32 s6, s6, -1
	s_waitcnt lgkmcnt(0)
	v_dual_sub_f32 v9, v2, v9 :: v_dual_add_nc_u32 v6, 4, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_frexp_mant_f32_e64 v10, |v9|
	v_cmp_gt_f32_e32 vcc_lo, 0x3f2aaaab, v10
	v_cndmask_b32_e64 v12, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f32 v10, v10, v12
	v_add_f32_e32 v12, 1.0, v10
	v_frexp_exp_i32_f32_e32 v11, v9
	v_cmp_neq_f32_e64 s0, 0x7f800000, |v9|
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_rcp_f32_e32 v14, v12
	v_subrev_co_ci_u32_e32 v11, vcc_lo, 0, v11, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f32_i32_e32 v11, v11
	v_dual_add_f32 v13, -1.0, v10 :: v_dual_mul_f32 v16, 0x3f317218, v11
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v17, v13, v14
	v_add_f32_e32 v15, -1.0, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v10, v10, v15
	v_fma_f32 v15, 0x3f317218, v11, -v16
	v_fmac_f32_e32 v15, 0xb102e308, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v18, v16, v15
	v_dual_mul_f32 v11, v12, v17 :: v_dual_sub_f32 v16, v18, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v12, v17, v12, -v11
	v_fmac_f32_e32 v12, v17, v10
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v10, v15, v16
	v_add_f32_e32 v15, v11, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v11, v15, v11
	v_dual_sub_f32 v16, v13, v15 :: v_dual_sub_f32 v11, v11, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v13, v13, v16
	v_sub_f32_e32 v12, v13, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v11, v11, v12
	v_add_f32_e32 v11, v16, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v11, v14, v11
	v_add_f32_e32 v12, v17, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_sub_f32_e32 v13, v12, v17
	v_mul_f32_e32 v14, v12, v12
	v_ldexp_f32 v15, v12, 1
	v_sub_f32_e32 v11, v11, v13
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v13, v12, v12, -v14
	v_add_f32_e32 v16, v11, v11
	v_ldexp_f32 v17, v11, 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v13, v12, v16
	v_add_f32_e32 v16, v14, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v14, v16, v14
	v_dual_mul_f32 v20, v12, v16 :: v_dual_sub_f32 v13, v13, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v14, v16, v12, -v20
	v_dual_fmaak_f32 v19, s1, v16, 0x3e91f4c4 :: v_dual_fmac_f32 v14, v16, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmaak_f32 v19, v16, v19, 0x3ecccdef :: v_dual_fmac_f32 v14, v13, v12
	v_mul_f32_e32 v21, v16, v19
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f32_e32 v12, v20, v14
	v_fma_f32 v11, v16, v19, -v21
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v16, v12, v20 :: v_dual_fmac_f32 v11, v13, v19
	v_dual_sub_f32 v14, v14, v16 :: v_dual_add_f32 v13, v21, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v20, 0x3f2aaaaa, v13
	v_dual_sub_f32 v19, v13, v21 :: v_dual_add_f32 v16, 0xbf2aaaaa, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v11, v11, v19
	v_sub_f32_e32 v13, v13, v16
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v11, 0x31739010, v11
	v_add_f32_e32 v11, v11, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v13, v20, v11
	v_sub_f32_e32 v16, v20, v13
	v_mul_f32_e32 v19, v12, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f32_e32 v11, v11, v16
	v_fma_f32 v16, v12, v13, -v19
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v16, v12, v11
	v_fmac_f32_e32 v16, v14, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v11, v19, v16
	v_add_f32_e32 v12, v15, v11
	v_sub_f32_e32 v13, v11, v19
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v14, v12, v15
	v_sub_f32_e32 v13, v16, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v11, v11, v14
	v_add_f32_e32 v13, v17, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v11, v13, v11
	v_add_f32_e32 v13, v12, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v14, v18, v13
	v_dual_sub_f32 v12, v13, v12 :: v_dual_sub_f32 v15, v14, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v11, v11, v12 :: v_dual_sub_f32 v12, v14, v15
	v_add_f32_e32 v16, v10, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v13, v13, v15 :: v_dual_sub_f32 v12, v18, v12
	v_dual_sub_f32 v15, v16, v10 :: v_dual_add_f32 v12, v13, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v13, v16, v15
	v_dual_sub_f32 v11, v11, v15 :: v_dual_add_f32 v12, v16, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v10, v10, v13
	v_dual_add_f32 v13, v14, v12 :: v_dual_add_f32 v10, v11, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v11, v13, v14
	v_sub_f32_e32 v11, v12, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v10, v10, v11
	v_add_f32_e32 v11, v13, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v14, 0, v11
	v_sub_f32_e32 v12, v11, v13
	v_dual_add_f32 v13, v11, v11 :: v_dual_sub_f32 v10, v10, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f32 v11, v11, 2.0, -v13
	v_cmp_class_f32_e64 vcc_lo, v13, 0x204
	v_fmac_f32_e32 v14, 2.0, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v10, v11, v14
	v_add_f32_e32 v11, v13, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v12, v11, v13, vcc_lo
	v_sub_f32_e32 v11, v11, v13
	v_cmp_eq_f32_e32 vcc_lo, 0x42b17218, v12
	v_cndmask_b32_e64 v13, 0, 0x37000000, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v10, v10, v11
	v_cmp_neq_f32_e64 vcc_lo, 0x7f800000, |v12|
	v_dual_sub_f32 v11, v12, v13 :: v_dual_cndmask_b32 v10, 0, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mul_f32_e32 v12, 0x3fb8aa3b, v11
	v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v11
	v_add_f32_e32 v10, v13, v10
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f32 v13, 0x3fb8aa3b, v11, -v12
	v_rndne_f32_e32 v14, v12
	v_dual_fmac_f32 v13, 0x32a5705f, v11 :: v_dual_sub_f32 v12, v12, v14
	v_cvt_i32_f32_e32 v14, v14
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v12, v12, v13
	v_exp_f32_e32 v12, v12
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v12, v12, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v12, 0, v12, vcc_lo
	v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v11
	v_cndmask_b32_e32 v11, 0x7f800000, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f32 v10, v11, v10, v11
	v_cmp_eq_f32_e32 vcc_lo, 0x7f800000, v11
	v_cndmask_b32_e32 v10, v10, v11, vcc_lo
	v_cmp_neq_f32_e32 vcc_lo, 0, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v10, 0x7f800000, |v10|, s0
	v_cndmask_b32_e32 v9, 0, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v10, 0x4f800000, v9
	v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v9
	v_cndmask_b32_e32 v9, v9, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_sqrt_f32_e32 v10, v9
	s_waitcnt_depctr 0xfff
	v_add_nc_u32_e32 v11, -1, v10
	v_add_nc_u32_e32 v12, 1, v10
	v_fma_f32 v13, -v11, v10, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v14, -v12, v10, v9
	v_cmp_ge_f32_e64 s0, 0, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v10, v10, v11, s0
	v_cmp_lt_f32_e64 s0, 0, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v10, v10, v12, s0
	v_mul_f32_e32 v11, 0x37800000, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v10, v10, v11, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v9, 0x260
	v_cndmask_b32_e32 v9, v10, v9, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_scale_f32 v10, null, v9, v9, v8
	v_div_scale_f32 v12, vcc_lo, v8, v9, v8
	v_rcp_f32_e32 v11, v10
	s_waitcnt_depctr 0xfff
	v_fma_f32 v13, -v10, v11, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, v13, v11
	v_mul_f32_e32 v13, v12, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v14, -v10, v13, v12
	v_fmac_f32_e32 v13, v14, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v10, -v10, v13, v12
	v_div_fmas_f32 v10, v10, v11, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f32 v9, v10, v9, v8
	v_cndmask_b32_e64 v9, v9, 1.0, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_frexp_mant_f32_e64 v10, |v9|
	v_frexp_exp_i32_f32_e32 v11, v9
	v_cmp_gt_f32_e32 vcc_lo, 0x3f2aaaab, v10
	v_cndmask_b32_e64 v12, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_subrev_co_ci_u32_e32 v11, vcc_lo, 0, v11, vcc_lo
	v_ldexp_f32 v10, v10, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f32_i32_e32 v11, v11
	v_add_f32_e32 v12, 1.0, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_add_f32 v13, -1.0, v10 :: v_dual_mul_f32 v16, 0x3f317218, v11
	v_rcp_f32_e32 v14, v12
	v_add_f32_e32 v15, -1.0, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_f32_e32 v10, v10, v15
	v_fma_f32 v15, 0x3f317218, v11, -v16
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v17, v13, v14
	v_fmac_f32_e32 v15, 0xb102e308, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v11, v12, v17
	v_fma_f32 v12, v17, v12, -v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v12, v17, v10
	v_add_f32_e32 v10, v11, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v19, v13, v10
	v_sub_f32_e32 v11, v10, v11
	v_sub_f32_e32 v11, v11, v12
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v13, v13, v19
	v_sub_f32_e32 v10, v13, v10
	v_add_f32_e32 v18, v16, v15
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v10, v11, v10
	v_add_f32_e32 v10, v19, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v10, v14, v10
	v_add_f32_e32 v11, v17, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v12, v11, v17
	v_dual_mul_f32 v13, v11, v11 :: v_dual_sub_f32 v10, v10, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v12, v11, v11, -v13
	v_add_f32_e32 v17, v10, v10
	v_ldexp_f32 v19, v10, 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v12, v11, v17
	v_add_f32_e32 v17, v13, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmaak_f32 v20, s1, v17, 0x3e91f4c4
	v_fmaak_f32 v20, v17, v20, 0x3ecccdef
	v_sub_f32_e32 v13, v17, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_mul_f32 v21, v11, v17 :: v_dual_mul_f32 v22, v17, v20
	v_sub_f32_e32 v12, v12, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v13, v17, v11, -v21
	v_fmac_f32_e32 v13, v17, v10
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v10, v17, v20, -v22
	v_fmac_f32_e32 v10, v12, v20
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v13, v12, v11
	v_ldexp_f32 v14, v11, 1
	v_add_f32_e32 v12, v22, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v20, v12, v22
	v_sub_f32_e32 v10, v10, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_add_f32 v10, 0x31739010, v10 :: v_dual_add_f32 v11, v21, v13
	v_sub_f32_e32 v17, v11, v21
	v_add_f32_e32 v21, 0x3f2aaaaa, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v13, v13, v17
	v_add_f32_e32 v17, 0xbf2aaaaa, v21
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v12, v12, v17
	v_add_f32_e32 v10, v10, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v12, v21, v10
	v_sub_f32_e32 v17, v21, v12
	v_mul_f32_e32 v20, v11, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f32_e32 v10, v10, v17
	v_fma_f32 v17, v11, v12, -v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v17, v11, v10
	v_fmac_f32_e32 v17, v13, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v10, v20, v17
	v_add_f32_e32 v11, v14, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_sub_f32 v13, v11, v14 :: v_dual_sub_f32 v12, v10, v20
	v_sub_f32_e32 v14, v18, v16
	v_sub_f32_e32 v10, v10, v13
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_f32_e32 v12, v17, v12
	v_sub_f32_e32 v14, v15, v14
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v12, v19, v12
	v_add_f32_e32 v10, v12, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v12, v11, v10
	v_add_f32_e32 v13, v18, v12
	v_sub_f32_e32 v11, v12, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v15, v13, v18 :: v_dual_sub_f32 v10, v10, v11
	v_sub_f32_e32 v16, v13, v15
	v_sub_f32_e32 v11, v12, v15
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f32_e32 v15, v14, v10
	v_sub_f32_e32 v12, v18, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f32_e32 v11, v11, v12
	v_sub_f32_e32 v12, v15, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_add_f32 v11, v15, v11 :: v_dual_sub_f32 v10, v10, v12
	v_dual_sub_f32 v15, v15, v12 :: v_dual_add_f32 v16, v13, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v12, v14, v15 :: v_dual_sub_f32 v13, v16, v13
	v_dual_add_f32 v10, v10, v12 :: v_dual_sub_f32 v11, v11, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v10, v10, v11
	v_add_f32_e32 v11, v16, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v12, v11, v16
	v_dual_sub_f32 v10, v10, v12 :: v_dual_mul_f32 v13, v5, v11
	v_mul_f32_e32 v14, v7, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v11, v5, v11, -v13
	v_fmac_f32_e32 v14, v5, v10
	v_cmp_class_f32_e64 vcc_lo, v13, 0x204
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v10, v11, v14
	v_add_f32_e32 v11, v13, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v12, v11, v13, vcc_lo
	v_sub_f32_e32 v11, v11, v13
	v_cmp_eq_f32_e32 vcc_lo, 0x42b17218, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v10, v10, v11
	v_cndmask_b32_e64 v14, 0, 0x37000000, vcc_lo
	v_cmp_neq_f32_e64 vcc_lo, 0x7f800000, |v12|
	v_sub_f32_e32 v15, v12, v14
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v10, 0, v10, vcc_lo
	v_cndmask_b32_e64 v12, v9, 1.0, s3
	v_mul_f32_e32 v16, 0x3fb8aa3b, v15
	v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v15
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f32_e32 v10, v14, v10
	v_fma_f32 v17, 0x3fb8aa3b, v15, -v16
	v_rndne_f32_e32 v18, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_fmac_f32 v17, 0x32a5705f, v15 :: v_dual_sub_f32 v16, v16, v18
	v_cvt_i32_f32_e32 v13, v18
	v_add_f32_e32 v16, v16, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_exp_f32_e32 v16, v16
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v11, v16, v13
	v_cndmask_b32_e64 v13, v9, 0, s3
	v_cndmask_b32_e32 v11, 0, v11, vcc_lo
	v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v15
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v11, 0x7f800000, v11, vcc_lo
	v_cmp_eq_f32_e32 vcc_lo, 0, v9
	v_fma_f32 v10, v11, v10, v11
	s_xor_b32 s0, s7, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v14, 0, 0x7f800000, s0
	v_cmp_eq_f32_e64 s0, 0x7f800000, v11
	v_cndmask_b32_e64 v10, v10, v11, s0
	v_cmp_class_f32_e64 s0, v9, 0x204
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_bfi_b32 v9, 0x7fffffff, v14, v13
	v_bfi_b32 v10, 0x7fffffff, v10, v12
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	s_or_b32 vcc_lo, vcc_lo, s0
	s_cmp_eq_u32 s6, 0
	v_cndmask_b32_e32 v9, v10, v9, vcc_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f32_e32 v4, v4, v9
	s_cbranch_scc0 .LBB2_9
	s_branch .LBB2_11
.LBB2_10:
	v_mov_b32_e32 v4, 0
.LBB2_11:                               ; %Flow107
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_scale_f32 v2, null, v4, v4, 1.0
	v_div_scale_f32 v8, vcc_lo, 1.0, v4, 1.0
	v_rcp_f32_e32 v7, v2
	s_waitcnt_depctr 0xfff
	v_fma_f32 v5, -v2, v7, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v7, v5, v7
	v_mad_u64_u32 v[5:6], null, s8, v3, v[1:2]
	v_mul_f32_e32 v9, v8, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v6, 31, v5
	v_fma_f32 v10, -v2, v9, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v9, v10, v7
	v_fma_f32 v1, -v2, v9, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_fmas_f32 v3, v1, v7, v9
	v_lshlrev_b64 v[1:2], 2, v[5:6]
	v_div_fixup_f32 v3, v3, v4, 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v1, vcc_lo, s4, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s5, v2, vcc_lo
	ds_store_b32 v0, v3 offset:4
	global_store_b32 v[1:2], v3, off
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z24update_membership_kernelPfS_S_iiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 23
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z24update_membership_kernelPfS_S_iiii, .Lfunc_end2-_Z24update_membership_kernelPfS_S_iiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 4528
; NumSgprs: 18
; NumVgprs: 23
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 23
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z15fcm_step_kernelPfS_S_iiii ; -- Begin function _Z15fcm_step_kernelPfS_S_iiii
	.globl	_Z15fcm_step_kernelPfS_S_iiii
	.p2align	8
	.type	_Z15fcm_step_kernelPfS_S_iiii,@function
_Z15fcm_step_kernelPfS_S_iiii:          ; @_Z15fcm_step_kernelPfS_S_iiii
; %bb.0:
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z15fcm_step_kernelPfS_S_iiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 40
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 1
		.amdhsa_next_free_sgpr 1
		.amdhsa_reserve_vcc 0
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end3:
	.size	_Z15fcm_step_kernelPfS_S_iiii, .Lfunc_end3-_Z15fcm_step_kernelPfS_S_iiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 4
; NumSgprs: 0
; NumVgprs: 0
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 0
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 1
; NumVGPRsForWavesPerEU: 1
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         36
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .offset:         48
        .size:           4
        .value_kind:     by_value
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         60
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         64
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         68
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         70
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         72
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         74
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         76
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         78
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         112
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         120
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         176
        .size:           4
        .value_kind:     hidden_dynamic_lds_size
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 312
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z31update_centers_numerator_kernelPfS_S_iiiiS_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z31update_centers_numerator_kernelPfS_S_iiiiS_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     13
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         36
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .offset:         48
        .size:           4
        .value_kind:     by_value
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         60
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         64
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         68
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         70
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         72
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         74
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         76
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         78
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         112
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         120
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         176
        .size:           4
        .value_kind:     hidden_dynamic_lds_size
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 312
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z33update_centers_denominator_kernelPfS_S_iiiiS_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z33update_centers_denominator_kernelPfS_S_iiiiS_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     12
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         36
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         44
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         52
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         54
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         56
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         58
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         60
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         62
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         104
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         160
        .size:           4
        .value_kind:     hidden_dynamic_lds_size
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 296
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z24update_membership_kernelPfS_S_iiii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z24update_membership_kernelPfS_S_iiii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     23
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         36
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 40
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z15fcm_step_kernelPfS_S_iiii
    .private_segment_fixed_size: 0
    .sgpr_count:     0
    .sgpr_spill_count: 0
    .symbol:         _Z15fcm_step_kernelPfS_S_iiii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     0
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
