// Vector addition: C = 1/A + 1/B, for arbitrarily long vectors
// compile with the following command:
//
// (for GTX970)
// nvcc -arch=compute_52 -code=sm_52,sm_52 -O3 -m64 -o vecAdd vecAdd.cu
//
// (for GTX1060)
// nvcc -arch=compute_61 -code=sm_61,sm_61 -O3 -m64 -o vecAdd vecAdd.cu


// Includes
#include <stdio.h>
#include <stdlib.h>

// For the CUDA runtime routines (prefixed with "cuda_")
#include <cuda_runtime.h>


// Variables
float* h_A;   // host vectors
float* h_B;
float* h_C;
float* h_D;
float* d_A;   // device vectors
float* d_B;
float* d_C;

// Functions
void RandomInit(float*, long);

// Device code
__global__ void VecAdd(const float* A, const float* B, float* C, long N)
{

    long i = blockDim.x * blockIdx.x + threadIdx.x;

//    if (i < N)                     // only for N < blockDim.x*gridDim.x 
//      C[i] = 1.0/A[i] + 1.0/B[i];

    while (i < N) {
        C[i] = 1.0/A[i] + 1.0/B[i];
        i += blockDim.x * gridDim.x;  // go to the next grid
    }
    
    __syncthreads();

}

// Host code

int main(void)
{

    int gid;

    // Error code to check return values for CUDA calls
    cudaError_t err = cudaSuccess;

    printf("Enter the GPU ID: ");
    scanf("%d",&gid);
    printf("%d\n", gid);
    err = cudaSetDevice(gid);
    if (err != cudaSuccess) {
        printf("!!! Cannot select GPU with device ID = %d\n", gid);
        exit(1);
    }
    printf("Set GPU with device ID = %d\n", gid);

    cudaSetDevice(gid);

    printf("Vector Addition: C = 1/A + 1/B\n");
    int N;

    printf("Enter the size of the vectors: ");
    scanf("%ld",&N);        
    printf("%ld\n",N);        
    long size = N * sizeof(float);

    // Allocate input vectors h_A and h_B in host memory

    h_A = (float*)malloc(size);
    h_B = (float*)malloc(size);
    h_C = (float*)malloc(size);
    
    // Check memory allocations  
    if (h_A == NULL || h_B == NULL || h_C == NULL)
    {
        fprintf(stderr, "Failed to allocate host vectors!\n");
        exit(EXIT_FAILURE);
    }

    // Initialize input vectors

    RandomInit(h_A, N);
    RandomInit(h_B, N);

    // Set the sizes of threads and blocks

    int threadsPerBlock;
    printf("Enter the number of threads per block: ");
    scanf("%d",&threadsPerBlock);
    printf("%d\n",threadsPerBlock);
    if( threadsPerBlock > 1024 ) {
      printf("The number of threads per block must be less than 1024 ! \n");
      exit(0);
    }

//    int blocksPerGrid = (N + threadsPerBlock - 1)/threadsPerBlock;

    int blocksPerGrid;
    printf("Enter the number of blocks per grid: ");
    scanf("%d",&blocksPerGrid);
    printf("%d\n",blocksPerGrid);
    if( blocksPerGrid > 2147483647 ) {
      printf("The number of blocks must be less than 2147483647 ! \n");
      exit(0); 
    }
    printf("The number of blocks is %d\n", blocksPerGrid);

    // create the timer
    cudaEvent_t start, stop;
    cudaEventCreate(&start);
    cudaEventCreate(&stop);

    // start the timer
    cudaEventRecord(start,0);

    // Allocate vectors in device memory

    cudaMalloc((void**)&d_A, size);
    cudaMalloc((void**)&d_B, size);
    cudaMalloc((void**)&d_C, size);

    // Copy vectors from host memory to device memory

    cudaMemcpy(d_A, h_A, size, cudaMemcpyHostToDevice);
    cudaMemcpy(d_B, h_B, size, cudaMemcpyHostToDevice);
    
    // stop the timer
    cudaEventRecord(stop,0);
    cudaEventSynchronize(stop);

    float Intime;
    cudaEventElapsedTime( &Intime, start, stop);
    printf("Input time for GPU: %f (ms) \n",Intime);

    // start the timer
    cudaEventRecord(start,0);

    VecAdd <<< blocksPerGrid, threadsPerBlock >>> (d_A, d_B, d_C, N);
    
    // stop the timer
    cudaEventRecord(stop,0);
    cudaEventSynchronize(stop);

    float gputime;
    cudaEventElapsedTime( &gputime, start, stop);
    printf("Processing time for GPU: %f (ms) \n",gputime);
    printf("GPU Gflops: %f\n",3*N/(1000000.0*gputime));
    
    // Copy result from device memory to host memory
    // h_C contains the result in host memory

    // start the timer
    cudaEventRecord(start,0);

    cudaMemcpy(h_C, d_C, size, cudaMemcpyDeviceToHost);
    cudaFree(d_A);
    cudaFree(d_B);
    cudaFree(d_C);

    // stop the timer
    cudaEventRecord(stop,0);
    cudaEventSynchronize(stop);

    float Outime;
    cudaEventElapsedTime( &Outime, start, stop);
    printf("Output time for GPU: %f (ms) \n",Outime);

    float gputime_tot;
    gputime_tot = Intime + gputime + Outime;
    printf("Total time for GPU: %f (ms) \n",gputime_tot);

    // start the timer
    cudaEventRecord(start,0);

    h_D = (float*)malloc(size);       // to compute the reference solution
    for (long i = 0; i < N; ++i) 
        h_D[i] = 1.0/h_A[i] + 1.0/h_B[i];
    
    // stop the timer
    cudaEventRecord(stop,0);
    cudaEventSynchronize(stop);

    float cputime;
    cudaEventElapsedTime( &cputime, start, stop);
    printf("Processing time for CPU: %f (ms) \n",cputime);
    printf("CPU Gflops: %f\n",3*N/(1000000.0*cputime));
    printf("Speed up of GPU = %f\n", cputime/(gputime_tot));

    // destroy the timer
    cudaEventDestroy(start);
    cudaEventDestroy(stop);

    // check result

    printf("Check result:\n");
    double sum=0; 
    double diff;
    for (long i = 0; i < N; ++i) {
      diff = abs(h_D[i] - h_C[i]);
      sum += diff*diff; 
      if(diff > 1.0e-15) { 
//        printf("i=%d, h_D=%15.10e, h_C=%15.10e \n", i, h_D[i], h_C[i]);
      }
    }
    sum = sqrt(sum);
    printf("norm(h_C - h_D)=%20.15e\n\n",sum);

    cudaDeviceReset();
}


// Allocates an array with random float entries.
void RandomInit(float* data, long n)
{
    for (long i = 0; i < n; ++i)
        data[i] = rand() / (float)RAND_MAX;
}




	.file	"tmpxft_002b61b4_00000000-6_vecAdd_anyN.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2031:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2031:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z10RandomInitPfl
	.type	_Z10RandomInitPfl, @function
_Z10RandomInitPfl:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movq	%rdi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rsi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	xorl	%ebx, %ebx
.L3:
	cmpq	%rbp, %rbx
	jge	.L7
	call	rand@PLT
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC0(%rip), %xmm0
	movss	%xmm0, (%r12,%rbx,4)
	incq	%rbx
	jmp	.L3
.L7:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	_Z10RandomInitPfl, .-_Z10RandomInitPfl
	.globl	_Z32__device_stub__Z6VecAddPKfS0_PflPKfS0_Pfl
	.type	_Z32__device_stub__Z6VecAddPKfS0_PflPKfS0_Pfl, @function
_Z32__device_stub__Z6VecAddPKfS0_PflPKfS0_Pfl:
.LFB2053:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z6VecAddPKfS0_Pfl(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L8:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2053:
	.size	_Z32__device_stub__Z6VecAddPKfS0_PflPKfS0_Pfl, .-_Z32__device_stub__Z6VecAddPKfS0_PflPKfS0_Pfl
	.globl	_Z6VecAddPKfS0_Pfl
	.type	_Z6VecAddPKfS0_Pfl, @function
_Z6VecAddPKfS0_Pfl:
.LFB2054:
	.cfi_startproc
	endbr64
	jmp	_Z32__device_stub__Z6VecAddPKfS0_PflPKfS0_Pfl
	.cfi_endproc
.LFE2054:
	.size	_Z6VecAddPKfS0_Pfl, .-_Z6VecAddPKfS0_Pfl
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC2:
	.string	"Enter the GPU ID: "
.LC3:
	.string	"%d"
.LC4:
	.string	"%d\n"
.LC5:
	.string	"!!! Cannot select GPU with device ID = %d\n"
.LC6:
	.string	"Set GPU with device ID = %d\n"
.LC7:
	.string	"Vector Addition: C = 1/A + 1/B\n"
.LC8:
	.string	"Enter the size of the vectors: "
.LC9:
	.string	"%ld"
.LC10:
	.string	"%ld\n"
.LC11:
	.string	"Failed to allocate host vectors!\n"
.LC12:
	.string	"Enter the number of threads per block: "
.LC13:
	.string	"The number of threads per block must be less than 1024 ! \n"
.LC14:
	.string	"Enter the number of blocks per grid: "
.LC15:
	.string	"The number of blocks is %d\n"
.LC16:
	.string	"Input time for GPU: %f (ms) \n"
.LC17:
	.string	"Processing time for GPU: %f (ms) \n"
.LC19:
	.string	"GPU Gflops: %f\n"
.LC20:
	.string	"Output time for GPU: %f (ms) \n"
.LC21:
	.string	"Total time for GPU: %f (ms) \n"
.LC23:
	.string	"Processing time for CPU: %f (ms) \n"
.LC24:
	.string	"CPU Gflops: %f\n"
.LC25:
	.string	"Speed up of GPU = %f\n"
.LC26:
	.string	"Check result:\n"
.LC28:
	.string	"norm(h_C - h_D)=%20.15e\n\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	leaq	.LC3(%rip), %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	leaq	.LC4(%rip), %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$104, %rsp
	.cfi_def_cfa_offset 160
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	24(%rsp), %rsi
	movq	%r13, %rdi
	xorl	%eax, %eax
	call	__isoc23_scanf@PLT
	movl	24(%rsp), %edx
	movq	%r12, %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	24(%rsp), %edi
	call	cudaSetDevice@PLT
	movl	24(%rsp), %edx
	testl	%eax, %eax
	je	.L14
	leaq	.LC5(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	jmp	.L26
.L14:
	leaq	.LC6(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	24(%rsp), %edi
	call	cudaSetDevice@PLT
	leaq	.LC7(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC8(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	28(%rsp), %rsi
	leaq	.LC9(%rip), %rdi
	xorl	%eax, %eax
	call	__isoc23_scanf@PLT
	movl	28(%rsp), %edx
	movl	$2, %edi
	xorl	%eax, %eax
	leaq	.LC10(%rip), %rsi
	call	__printf_chk@PLT
	movslq	28(%rsp), %r15
	leaq	0(,%r15,4), %rbx
	movq	%rbx, %rdi
	call	malloc@PLT
	movq	%rbx, %rdi
	movq	%rax, %rbp
	movq	%rax, h_A(%rip)
	call	malloc@PLT
	movq	%rbx, %rdi
	movq	%rax, %r14
	movq	%rax, h_B(%rip)
	call	malloc@PLT
	testq	%rbp, %rbp
	sete	%dl
	testq	%r14, %r14
	movq	%rax, h_C(%rip)
	sete	%cl
	orb	%cl, %dl
	jne	.L24
	testq	%rax, %rax
	jne	.L15
.L24:
	movq	stderr(%rip), %rdi
	leaq	.LC11(%rip), %rdx
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
.L26:
	movl	$1, %edi
.L27:
	call	exit@PLT
.L15:
	movq	%r15, %rsi
	movq	%rbp, %rdi
	call	_Z10RandomInitPfl
	movslq	28(%rsp), %rsi
	movq	h_B(%rip), %rdi
	call	_Z10RandomInitPfl
	leaq	.LC12(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	32(%rsp), %rsi
	movq	%r13, %rdi
	xorl	%eax, %eax
	call	__isoc23_scanf@PLT
	movl	32(%rsp), %edx
	xorl	%eax, %eax
	movq	%r12, %rsi
	movl	$2, %edi
	call	__printf_chk@PLT
	cmpl	$1024, 32(%rsp)
	jle	.L17
	movl	$2, %edi
	leaq	.LC13(%rip), %rsi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	xorl	%edi, %edi
	jmp	.L27
.L17:
	leaq	.LC14(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	36(%rsp), %rsi
	movq	%r13, %rdi
	xorl	%eax, %eax
	call	__isoc23_scanf@PLT
	movl	36(%rsp), %edx
	movq	%r12, %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	36(%rsp), %edx
	movl	$2, %edi
	xorl	%eax, %eax
	leaq	.LC15(%rip), %rsi
	call	__printf_chk@PLT
	leaq	48(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	56(%rsp), %rdi
	call	cudaEventCreate@PLT
	movq	48(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	%rbx, %rsi
	leaq	d_A(%rip), %rdi
	call	cudaMalloc@PLT
	movq	%rbx, %rsi
	leaq	d_B(%rip), %rdi
	call	cudaMalloc@PLT
	movq	%rbx, %rsi
	leaq	d_C(%rip), %rdi
	call	cudaMalloc@PLT
	movq	h_A(%rip), %rsi
	movl	$1, %ecx
	movq	%rbx, %rdx
	movq	d_A(%rip), %rdi
	call	cudaMemcpy@PLT
	movq	h_B(%rip), %rsi
	movl	$1, %ecx
	movq	%rbx, %rdx
	movq	d_B(%rip), %rdi
	call	cudaMemcpy@PLT
	movq	56(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	56(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	56(%rsp), %rdx
	movq	48(%rsp), %rsi
	leaq	40(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	leaq	.LC16(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	40(%rsp), %xmm0
	call	__printf_chk@PLT
	movq	48(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movl	32(%rsp), %eax
	movl	36(%rsp), %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	%eax, 76(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 80(%rsp)
	movl	84(%rsp), %ecx
	movl	%edx, 64(%rsp)
	movq	76(%rsp), %rdx
	movq	%rax, 68(%rsp)
	movq	64(%rsp), %rdi
	movl	72(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L18
	movslq	28(%rsp), %rcx
	movq	d_C(%rip), %rdx
	movq	d_B(%rip), %rsi
	movq	d_A(%rip), %rdi
	call	_Z32__device_stub__Z6VecAddPKfS0_PflPKfS0_Pfl
.L18:
	movq	56(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	56(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	56(%rsp), %rdx
	movq	48(%rsp), %rsi
	leaq	44(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	leaq	.LC17(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	44(%rsp), %xmm0
	call	__printf_chk@PLT
	imull	$3, 28(%rsp), %eax
	cvtss2sd	44(%rsp), %xmm1
	mulsd	.LC18(%rip), %xmm1
	leaq	.LC19(%rip), %rsi
	movl	$2, %edi
	cvtsi2sdl	%eax, %xmm0
	movb	$1, %al
	divsd	%xmm1, %xmm0
	call	__printf_chk@PLT
	movq	48(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	d_C(%rip), %rsi
	movl	$2, %ecx
	movq	%rbx, %rdx
	movq	h_C(%rip), %rdi
	call	cudaMemcpy@PLT
	movq	d_A(%rip), %rdi
	call	cudaFree@PLT
	movq	d_B(%rip), %rdi
	call	cudaFree@PLT
	movq	d_C(%rip), %rdi
	call	cudaFree@PLT
	movq	56(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	56(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	56(%rsp), %rdx
	movq	48(%rsp), %rsi
	leaq	64(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	leaq	.LC20(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	64(%rsp), %xmm0
	call	__printf_chk@PLT
	movl	$2, %edi
	movb	$1, %al
	movss	40(%rsp), %xmm0
	addss	44(%rsp), %xmm0
	leaq	.LC21(%rip), %rsi
	addss	64(%rsp), %xmm0
	movss	%xmm0, 12(%rsp)
	cvtss2sd	%xmm0, %xmm0
	call	__printf_chk@PLT
	movq	48(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	%rbx, %rdi
	call	malloc@PLT
	movslq	28(%rsp), %rcx
	xorl	%edx, %edx
	movq	h_A(%rip), %rsi
	movq	%rax, h_D(%rip)
	movq	h_B(%rip), %rdi
	movsd	.LC22(%rip), %xmm1
.L19:
	cmpq	%rdx, %rcx
	jle	.L28
	movaps	%xmm1, %xmm0
	cvtss2sd	(%rsi,%rdx,4), %xmm2
	cvtss2sd	(%rdi,%rdx,4), %xmm3
	divsd	%xmm2, %xmm0
	movaps	%xmm1, %xmm2
	divsd	%xmm3, %xmm2
	addsd	%xmm2, %xmm0
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, (%rax,%rdx,4)
	incq	%rdx
	jmp	.L19
.L28:
	movq	56(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	56(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	56(%rsp), %rdx
	movq	48(%rsp), %rsi
	leaq	76(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	leaq	.LC23(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	76(%rsp), %xmm0
	call	__printf_chk@PLT
	imull	$3, 28(%rsp), %eax
	cvtss2sd	76(%rsp), %xmm1
	mulsd	.LC18(%rip), %xmm1
	leaq	.LC24(%rip), %rsi
	movl	$2, %edi
	cvtsi2sdl	%eax, %xmm0
	movb	$1, %al
	divsd	%xmm1, %xmm0
	call	__printf_chk@PLT
	leaq	.LC25(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	movss	76(%rsp), %xmm0
	divss	12(%rsp), %xmm0
	cvtss2sd	%xmm0, %xmm0
	call	__printf_chk@PLT
	movq	48(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	56(%rsp), %rdi
	call	cudaEventDestroy@PLT
	leaq	.LC26(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movslq	28(%rsp), %rdx
	xorl	%eax, %eax
	xorps	%xmm1, %xmm1
	movq	h_D(%rip), %rcx
	movq	h_C(%rip), %rsi
	movss	.LC27(%rip), %xmm2
.L21:
	cmpq	%rax, %rdx
	jle	.L29
	movss	(%rcx,%rax,4), %xmm0
	subss	(%rsi,%rax,4), %xmm0
	incq	%rax
	andps	%xmm2, %xmm0
	cvtss2sd	%xmm0, %xmm0
	mulsd	%xmm0, %xmm0
	addsd	%xmm0, %xmm1
	jmp	.L21
.L29:
	movaps	%xmm1, %xmm0
	call	sqrt@PLT
	leaq	.LC28(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	call	__printf_chk@PLT
	call	cudaDeviceReset@PLT
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L23
	call	__stack_chk_fail@PLT
.L23:
	addq	$104, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	main, .-main
	.section	.rodata.str1.1
.LC29:
	.string	"_Z6VecAddPKfS0_Pfl"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2056:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC29(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z6VecAddPKfS0_Pfl(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2056:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.globl	d_C
	.bss
	.align 8
	.type	d_C, @object
	.size	d_C, 8
d_C:
	.zero	8
	.globl	d_B
	.align 8
	.type	d_B, @object
	.size	d_B, 8
d_B:
	.zero	8
	.globl	d_A
	.align 8
	.type	d_A, @object
	.size	d_A, 8
d_A:
	.zero	8
	.globl	h_D
	.align 8
	.type	h_D, @object
	.size	h_D, 8
h_D:
	.zero	8
	.globl	h_C
	.align 8
	.type	h_C, @object
	.size	h_C, 8
h_C:
	.zero	8
	.globl	h_B
	.align 8
	.type	h_B, @object
	.size	h_B, 8
h_B:
	.zero	8
	.globl	h_A
	.align 8
	.type	h_A, @object
	.size	h_A, 8
h_A:
	.zero	8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC0:
	.long	805306368
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC18:
	.long	0
	.long	1093567616
	.align 8
.LC22:
	.long	0
	.long	1072693248
	.section	.rodata.cst16,"aM",@progbits,16
	.align 16
.LC27:
	.long	2147483647
	.long	0
	.long	0
	.long	0
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

// Vector addition: C = 1/A + 1/B, for arbitrarily long vectors
// compile with the following command:
//
// (for GTX970)
// nvcc -arch=compute_52 -code=sm_52,sm_52 -O3 -m64 -o vecAdd vecAdd.cu
//
// (for GTX1060)
// nvcc -arch=compute_61 -code=sm_61,sm_61 -O3 -m64 -o vecAdd vecAdd.cu


// Includes
#include <stdio.h>
#include <stdlib.h>

// For the CUDA runtime routines (prefixed with "cuda_")
#include <hip/hip_runtime.h>


// Variables
float* h_A;   // host vectors
float* h_B;
float* h_C;
float* h_D;
float* d_A;   // device vectors
float* d_B;
float* d_C;

// Functions
void RandomInit(float*, long);

// Device code
__global__ void VecAdd(const float* A, const float* B, float* C, long N)
{

    long i = blockDim.x * blockIdx.x + threadIdx.x;

//    if (i < N)                     // only for N < blockDim.x*gridDim.x 
//      C[i] = 1.0/A[i] + 1.0/B[i];

    while (i < N) {
        C[i] = 1.0/A[i] + 1.0/B[i];
        i += blockDim.x * gridDim.x;  // go to the next grid
    }
    
    __syncthreads();

}

// Host code

int main(void)
{

    int gid;

    // Error code to check return values for CUDA calls
    hipError_t err = hipSuccess;

    printf("Enter the GPU ID: ");
    scanf("%d",&gid);
    printf("%d\n", gid);
    err = hipSetDevice(gid);
    if (err != hipSuccess) {
        printf("!!! Cannot select GPU with device ID = %d\n", gid);
        exit(1);
    }
    printf("Set GPU with device ID = %d\n", gid);

    hipSetDevice(gid);

    printf("Vector Addition: C = 1/A + 1/B\n");
    int N;

    printf("Enter the size of the vectors: ");
    scanf("%ld",&N);        
    printf("%ld\n",N);        
    long size = N * sizeof(float);

    // Allocate input vectors h_A and h_B in host memory

    h_A = (float*)malloc(size);
    h_B = (float*)malloc(size);
    h_C = (float*)malloc(size);
    
    // Check memory allocations  
    if (h_A == NULL || h_B == NULL || h_C == NULL)
    {
        fprintf(stderr, "Failed to allocate host vectors!\n");
        exit(EXIT_FAILURE);
    }

    // Initialize input vectors

    RandomInit(h_A, N);
    RandomInit(h_B, N);

    // Set the sizes of threads and blocks

    int threadsPerBlock;
    printf("Enter the number of threads per block: ");
    scanf("%d",&threadsPerBlock);
    printf("%d\n",threadsPerBlock);
    if( threadsPerBlock > 1024 ) {
      printf("The number of threads per block must be less than 1024 ! \n");
      exit(0);
    }

//    int blocksPerGrid = (N + threadsPerBlock - 1)/threadsPerBlock;

    int blocksPerGrid;
    printf("Enter the number of blocks per grid: ");
    scanf("%d",&blocksPerGrid);
    printf("%d\n",blocksPerGrid);
    if( blocksPerGrid > 2147483647 ) {
      printf("The number of blocks must be less than 2147483647 ! \n");
      exit(0); 
    }
    printf("The number of blocks is %d\n", blocksPerGrid);

    // create the timer
    hipEvent_t start, stop;
    hipEventCreate(&start);
    hipEventCreate(&stop);

    // start the timer
    hipEventRecord(start,0);

    // Allocate vectors in device memory

    hipMalloc((void**)&d_A, size);
    hipMalloc((void**)&d_B, size);
    hipMalloc((void**)&d_C, size);

    // Copy vectors from host memory to device memory

    hipMemcpy(d_A, h_A, size, hipMemcpyHostToDevice);
    hipMemcpy(d_B, h_B, size, hipMemcpyHostToDevice);
    
    // stop the timer
    hipEventRecord(stop,0);
    hipEventSynchronize(stop);

    float Intime;
    hipEventElapsedTime( &Intime, start, stop);
    printf("Input time for GPU: %f (ms) \n",Intime);

    // start the timer
    hipEventRecord(start,0);

    VecAdd <<< blocksPerGrid, threadsPerBlock >>> (d_A, d_B, d_C, N);
    
    // stop the timer
    hipEventRecord(stop,0);
    hipEventSynchronize(stop);

    float gputime;
    hipEventElapsedTime( &gputime, start, stop);
    printf("Processing time for GPU: %f (ms) \n",gputime);
    printf("GPU Gflops: %f\n",3*N/(1000000.0*gputime));
    
    // Copy result from device memory to host memory
    // h_C contains the result in host memory

    // start the timer
    hipEventRecord(start,0);

    hipMemcpy(h_C, d_C, size, hipMemcpyDeviceToHost);
    hipFree(d_A);
    hipFree(d_B);
    hipFree(d_C);

    // stop the timer
    hipEventRecord(stop,0);
    hipEventSynchronize(stop);

    float Outime;
    hipEventElapsedTime( &Outime, start, stop);
    printf("Output time for GPU: %f (ms) \n",Outime);

    float gputime_tot;
    gputime_tot = Intime + gputime + Outime;
    printf("Total time for GPU: %f (ms) \n",gputime_tot);

    // start the timer
    hipEventRecord(start,0);

    h_D = (float*)malloc(size);       // to compute the reference solution
    for (long i = 0; i < N; ++i) 
        h_D[i] = 1.0/h_A[i] + 1.0/h_B[i];
    
    // stop the timer
    hipEventRecord(stop,0);
    hipEventSynchronize(stop);

    float cputime;
    hipEventElapsedTime( &cputime, start, stop);
    printf("Processing time for CPU: %f (ms) \n",cputime);
    printf("CPU Gflops: %f\n",3*N/(1000000.0*cputime));
    printf("Speed up of GPU = %f\n", cputime/(gputime_tot));

    // destroy the timer
    hipEventDestroy(start);
    hipEventDestroy(stop);

    // check result

    printf("Check result:\n");
    double sum=0; 
    double diff;
    for (long i = 0; i < N; ++i) {
      diff = abs(h_D[i] - h_C[i]);
      sum += diff*diff; 
      if(diff > 1.0e-15) { 
//        printf("i=%d, h_D=%15.10e, h_C=%15.10e \n", i, h_D[i], h_C[i]);
      }
    }
    sum = sqrt(sum);
    printf("norm(h_C - h_D)=%20.15e\n\n",sum);

    hipDeviceReset();
}


// Allocates an array with random float entries.
void RandomInit(float* data, long n)
{
    for (long i = 0; i < n; ++i)
        data[i] = rand() / (float)RAND_MAX;
}




	.text
	.file	"vecAdd_anyN.hip"
	.globl	_Z21__device_stub__VecAddPKfS0_Pfl # -- Begin function _Z21__device_stub__VecAddPKfS0_Pfl
	.type	_Z21__device_stub__VecAddPKfS0_Pfl,@function
_Z21__device_stub__VecAddPKfS0_Pfl:     # @_Z21__device_stub__VecAddPKfS0_Pfl
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	16(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z6VecAddPKfS0_Pfl, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z21__device_stub__VecAddPKfS0_Pfl, .Lfunc_end0-_Z21__device_stub__VecAddPKfS0_Pfl
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI1_0:
	.long	0x30000000                      # float 4.65661287E-10
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0
.LCPI1_1:
	.quad	0x412e848000000000              # double 1.0E+6
.LCPI1_2:
	.quad	0x3ff0000000000000              # double 1
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0
.LCPI1_3:
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$56, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	$.L.str, %edi
	xorl	%eax, %eax
	callq	printf
	leaq	36(%rsp), %rbx
	movl	$.L.str.1, %edi
	movq	%rbx, %rsi
	xorl	%eax, %eax
	callq	__isoc23_scanf
	movl	(%rbx), %esi
	movl	$.L.str.2, %edi
	xorl	%eax, %eax
	callq	printf
	movl	(%rbx), %edi
	callq	hipSetDevice
	movl	(%rbx), %esi
	testl	%eax, %eax
	jne	.LBB1_23
# %bb.1:
	movl	$.L.str.4, %edi
	xorl	%eax, %eax
	callq	printf
	movl	36(%rsp), %edi
	callq	hipSetDevice
	movl	$.Lstr, %edi
	callq	puts@PLT
	movl	$.L.str.6, %edi
	xorl	%eax, %eax
	callq	printf
	leaq	4(%rsp), %rbx
	movl	$.L.str.7, %edi
	movq	%rbx, %rsi
	xorl	%eax, %eax
	callq	__isoc23_scanf
	movl	(%rbx), %esi
	movl	$.L.str.8, %edi
	xorl	%eax, %eax
	callq	printf
	movslq	(%rbx), %r12
	leaq	(,%r12,4), %rbx
	movq	%rbx, %rdi
	callq	malloc
	movq	%rax, %r14
	movq	%rax, h_A(%rip)
	movq	%rbx, %rdi
	callq	malloc
	movq	%rax, %r15
	movq	%rax, h_B(%rip)
	movq	%rbx, %rdi
	callq	malloc
	movq	%rax, h_C(%rip)
	testq	%r14, %r14
	je	.LBB1_25
# %bb.2:
	testq	%r15, %r15
	je	.LBB1_25
# %bb.3:
	testq	%rax, %rax
	je	.LBB1_25
# %bb.4:
	testl	%r12d, %r12d
	jle	.LBB1_10
# %bb.5:                                # %.lr.ph.i.preheader
	xorl	%r15d, %r15d
.LBB1_6:                                # %.lr.ph.i
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	movss	.LCPI1_0(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	%xmm1, %xmm0
	movss	%xmm0, (%r14,%r15,4)
	incq	%r15
	cmpq	%r15, %r12
	jne	.LBB1_6
# %bb.7:                                # %_Z10RandomInitPfl.exit
	movslq	4(%rsp), %r14
	testq	%r14, %r14
	jle	.LBB1_10
# %bb.8:                                # %.lr.ph.i39.preheader
	movq	h_B(%rip), %r15
	xorl	%r12d, %r12d
.LBB1_9:                                # %.lr.ph.i39
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	.LCPI1_0(%rip), %xmm0
	movss	%xmm0, (%r15,%r12,4)
	incq	%r12
	cmpq	%r12, %r14
	jne	.LBB1_9
.LBB1_10:                               # %_Z10RandomInitPfl.exit42
	movl	$.L.str.10, %edi
	xorl	%eax, %eax
	callq	printf
	leaq	32(%rsp), %r14
	movl	$.L.str.1, %edi
	movq	%r14, %rsi
	xorl	%eax, %eax
	callq	__isoc23_scanf
	movl	(%r14), %esi
	movl	$.L.str.2, %edi
	xorl	%eax, %eax
	callq	printf
	cmpl	$1025, (%r14)                   # imm = 0x401
	jge	.LBB1_26
# %bb.11:
	movl	$.L.str.12, %edi
	xorl	%eax, %eax
	callq	printf
	leaq	52(%rsp), %r14
	movl	$.L.str.1, %edi
	movq	%r14, %rsi
	xorl	%eax, %eax
	callq	__isoc23_scanf
	movl	(%r14), %esi
	movl	$.L.str.2, %edi
	xorl	%eax, %eax
	callq	printf
	movl	(%r14), %esi
	movl	$.L.str.14, %edi
	xorl	%eax, %eax
	callq	printf
	leaq	16(%rsp), %r15
	movq	%r15, %rdi
	callq	hipEventCreate
	leaq	8(%rsp), %r12
	movq	%r12, %rdi
	callq	hipEventCreate
	movq	(%r15), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movl	$d_A, %edi
	movq	%rbx, %rsi
	callq	hipMalloc
	movl	$d_B, %edi
	movq	%rbx, %rsi
	callq	hipMalloc
	movl	$d_C, %edi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	d_A(%rip), %rdi
	movq	h_A(%rip), %rsi
	movq	%rbx, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	d_B(%rip), %rdi
	movq	h_B(%rip), %rsi
	movq	%rbx, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r12), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	(%r12), %rdi
	callq	hipEventSynchronize
	movq	(%r15), %rsi
	movq	(%r12), %rdx
	leaq	28(%rsp), %r12
	movq	%r12, %rdi
	callq	hipEventElapsedTime
	cvtss2sd	(%r12), %xmm0
	movl	$.L.str.15, %edi
	movb	$1, %al
	callq	printf
	movq	(%r15), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movl	(%r14), %edi
	movl	32(%rsp), %edx
	btsq	$32, %rdi
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_13
# %bb.12:
	movq	d_A(%rip), %rdi
	movq	d_B(%rip), %rsi
	movq	d_C(%rip), %rdx
	movslq	4(%rsp), %rcx
	callq	_Z21__device_stub__VecAddPKfS0_Pfl
.LBB1_13:
	movq	8(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	8(%rsp), %rdi
	callq	hipEventSynchronize
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
	leaq	48(%rsp), %r14
	movq	%r14, %rdi
	callq	hipEventElapsedTime
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r14), %xmm0
	movl	$.L.str.16, %edi
	movb	$1, %al
	callq	printf
	movl	4(%rsp), %eax
	leal	(%rax,%rax,2), %eax
	xorps	%xmm0, %xmm0
	cvtsi2sd	%eax, %xmm0
	cvtss2sd	(%r14), %xmm1
	mulsd	.LCPI1_1(%rip), %xmm1
	divsd	%xmm1, %xmm0
	movl	$.L.str.17, %edi
	movb	$1, %al
	callq	printf
	movq	16(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	h_C(%rip), %rdi
	movq	d_C(%rip), %rsi
	movq	%rbx, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	d_A(%rip), %rdi
	callq	hipFree
	movq	d_B(%rip), %rdi
	callq	hipFree
	movq	d_C(%rip), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	8(%rsp), %rdi
	callq	hipEventSynchronize
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
	leaq	44(%rsp), %r15
	movq	%r15, %rdi
	callq	hipEventElapsedTime
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r15), %xmm0
	movl	$.L.str.18, %edi
	movb	$1, %al
	callq	printf
	movss	28(%rsp), %xmm0                 # xmm0 = mem[0],zero,zero,zero
	addss	(%r14), %xmm0
	addss	(%r15), %xmm0
	movss	%xmm0, 24(%rsp)                 # 4-byte Spill
	cvtss2sd	%xmm0, %xmm0
	movl	$.L.str.19, %edi
	movb	$1, %al
	callq	printf
	movq	16(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	%rbx, %rdi
	callq	malloc
	movq	%rax, h_D(%rip)
	movslq	4(%rsp), %rcx
	testq	%rcx, %rcx
	jle	.LBB1_16
# %bb.14:                               # %.lr.ph
	movq	h_A(%rip), %rdx
	movq	h_B(%rip), %rsi
	xorl	%edi, %edi
	movsd	.LCPI1_2(%rip), %xmm0           # xmm0 = mem[0],zero
.LBB1_15:                               # =>This Inner Loop Header: Depth=1
	xorps	%xmm1, %xmm1
	cvtss2sd	(%rdx,%rdi,4), %xmm1
	movapd	%xmm0, %xmm2
	divsd	%xmm1, %xmm2
	xorps	%xmm1, %xmm1
	cvtss2sd	(%rsi,%rdi,4), %xmm1
	movapd	%xmm0, %xmm3
	divsd	%xmm1, %xmm3
	addsd	%xmm2, %xmm3
	xorps	%xmm1, %xmm1
	cvtsd2ss	%xmm3, %xmm1
	movss	%xmm1, (%rax,%rdi,4)
	incq	%rdi
	cmpq	%rdi, %rcx
	jne	.LBB1_15
.LBB1_16:                               # %._crit_edge
	movq	8(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	8(%rsp), %rdi
	callq	hipEventSynchronize
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
	leaq	40(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipEventElapsedTime
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rbx), %xmm0
	movl	$.L.str.20, %edi
	movb	$1, %al
	callq	printf
	movl	4(%rsp), %eax
	leal	(%rax,%rax,2), %eax
	xorps	%xmm0, %xmm0
	cvtsi2sd	%eax, %xmm0
	xorps	%xmm1, %xmm1
	cvtss2sd	(%rbx), %xmm1
	mulsd	.LCPI1_1(%rip), %xmm1
	divsd	%xmm1, %xmm0
	movl	$.L.str.21, %edi
	movb	$1, %al
	callq	printf
	movss	(%rbx), %xmm0                   # xmm0 = mem[0],zero,zero,zero
	divss	24(%rsp), %xmm0                 # 4-byte Folded Reload
	cvtss2sd	%xmm0, %xmm0
	movl	$.L.str.22, %edi
	movb	$1, %al
	callq	printf
	movq	16(%rsp), %rdi
	callq	hipEventDestroy
	movq	8(%rsp), %rdi
	callq	hipEventDestroy
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	movslq	4(%rsp), %rax
	xorpd	%xmm1, %xmm1
	xorps	%xmm0, %xmm0
	testq	%rax, %rax
	jle	.LBB1_19
# %bb.17:                               # %.lr.ph50
	movq	h_D(%rip), %rcx
	movq	h_C(%rip), %rdx
	xorl	%esi, %esi
	movaps	.LCPI1_3(%rip), %xmm2           # xmm2 = [NaN,NaN,NaN,NaN]
.LBB1_18:                               # =>This Inner Loop Header: Depth=1
	movss	(%rcx,%rsi,4), %xmm3            # xmm3 = mem[0],zero,zero,zero
	subss	(%rdx,%rsi,4), %xmm3
	andps	%xmm2, %xmm3
	cvtss2sd	%xmm3, %xmm3
	mulsd	%xmm3, %xmm3
	addsd	%xmm3, %xmm0
	incq	%rsi
	cmpq	%rsi, %rax
	jne	.LBB1_18
.LBB1_19:                               # %._crit_edge51
	ucomisd	%xmm1, %xmm0
	jb	.LBB1_21
# %bb.20:
	sqrtsd	%xmm0, %xmm0
	jmp	.LBB1_22
.LBB1_21:                               # %call.sqrt
	callq	sqrt
.LBB1_22:                               # %._crit_edge51.split
	movl	$.L.str.24, %edi
	movb	$1, %al
	callq	printf
	callq	hipDeviceReset
	xorl	%eax, %eax
	addq	$56, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.LBB1_23:
	.cfi_def_cfa_offset 96
	movl	$.L.str.3, %edi
	xorl	%eax, %eax
	callq	printf
	jmp	.LBB1_24
.LBB1_25:
	movq	stderr(%rip), %rcx
	movl	$.L.str.9, %edi
	movl	$33, %esi
	movl	$1, %edx
	callq	fwrite@PLT
.LBB1_24:
	movl	$1, %edi
	callq	exit
.LBB1_26:
	movl	$.Lstr.2, %edi
	callq	puts@PLT
	xorl	%edi, %edi
	callq	exit
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z10RandomInitPfl
.LCPI2_0:
	.long	0x30000000                      # float 4.65661287E-10
	.text
	.globl	_Z10RandomInitPfl
	.type	_Z10RandomInitPfl,@function
_Z10RandomInitPfl:                      # @_Z10RandomInitPfl
	.cfi_startproc
# %bb.0:
	testq	%rsi, %rsi
	jle	.LBB2_4
# %bb.1:                                # %.lr.ph.preheader
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rsi, %rbx
	movq	%rdi, %r14
	xorl	%r15d, %r15d
.LBB2_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	.LCPI2_0(%rip), %xmm0
	movss	%xmm0, (%r14,%r15,4)
	incq	%r15
	cmpq	%r15, %rbx
	jne	.LBB2_2
# %bb.3:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r14
	.cfi_restore %r15
.LBB2_4:                                # %._crit_edge
	retq
.Lfunc_end2:
	.size	_Z10RandomInitPfl, .Lfunc_end2-_Z10RandomInitPfl
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z6VecAddPKfS0_Pfl, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	h_A,@object                     # @h_A
	.bss
	.globl	h_A
	.p2align	3, 0x0
h_A:
	.quad	0
	.size	h_A, 8

	.type	h_B,@object                     # @h_B
	.globl	h_B
	.p2align	3, 0x0
h_B:
	.quad	0
	.size	h_B, 8

	.type	h_C,@object                     # @h_C
	.globl	h_C
	.p2align	3, 0x0
h_C:
	.quad	0
	.size	h_C, 8

	.type	h_D,@object                     # @h_D
	.globl	h_D
	.p2align	3, 0x0
h_D:
	.quad	0
	.size	h_D, 8

	.type	d_A,@object                     # @d_A
	.globl	d_A
	.p2align	3, 0x0
d_A:
	.quad	0
	.size	d_A, 8

	.type	d_B,@object                     # @d_B
	.globl	d_B
	.p2align	3, 0x0
d_B:
	.quad	0
	.size	d_B, 8

	.type	d_C,@object                     # @d_C
	.globl	d_C
	.p2align	3, 0x0
d_C:
	.quad	0
	.size	d_C, 8

	.type	_Z6VecAddPKfS0_Pfl,@object      # @_Z6VecAddPKfS0_Pfl
	.section	.rodata,"a",@progbits
	.globl	_Z6VecAddPKfS0_Pfl
	.p2align	3, 0x0
_Z6VecAddPKfS0_Pfl:
	.quad	_Z21__device_stub__VecAddPKfS0_Pfl
	.size	_Z6VecAddPKfS0_Pfl, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Enter the GPU ID: "
	.size	.L.str, 19

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"%d"
	.size	.L.str.1, 3

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"%d\n"
	.size	.L.str.2, 4

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"!!! Cannot select GPU with device ID = %d\n"
	.size	.L.str.3, 43

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"Set GPU with device ID = %d\n"
	.size	.L.str.4, 29

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"Enter the size of the vectors: "
	.size	.L.str.6, 32

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"%ld"
	.size	.L.str.7, 4

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"%ld\n"
	.size	.L.str.8, 5

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"Failed to allocate host vectors!\n"
	.size	.L.str.9, 34

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"Enter the number of threads per block: "
	.size	.L.str.10, 40

	.type	.L.str.12,@object               # @.str.12
.L.str.12:
	.asciz	"Enter the number of blocks per grid: "
	.size	.L.str.12, 38

	.type	.L.str.14,@object               # @.str.14
.L.str.14:
	.asciz	"The number of blocks is %d\n"
	.size	.L.str.14, 28

	.type	.L.str.15,@object               # @.str.15
.L.str.15:
	.asciz	"Input time for GPU: %f (ms) \n"
	.size	.L.str.15, 30

	.type	.L.str.16,@object               # @.str.16
.L.str.16:
	.asciz	"Processing time for GPU: %f (ms) \n"
	.size	.L.str.16, 35

	.type	.L.str.17,@object               # @.str.17
.L.str.17:
	.asciz	"GPU Gflops: %f\n"
	.size	.L.str.17, 16

	.type	.L.str.18,@object               # @.str.18
.L.str.18:
	.asciz	"Output time for GPU: %f (ms) \n"
	.size	.L.str.18, 31

	.type	.L.str.19,@object               # @.str.19
.L.str.19:
	.asciz	"Total time for GPU: %f (ms) \n"
	.size	.L.str.19, 30

	.type	.L.str.20,@object               # @.str.20
.L.str.20:
	.asciz	"Processing time for CPU: %f (ms) \n"
	.size	.L.str.20, 35

	.type	.L.str.21,@object               # @.str.21
.L.str.21:
	.asciz	"CPU Gflops: %f\n"
	.size	.L.str.21, 16

	.type	.L.str.22,@object               # @.str.22
.L.str.22:
	.asciz	"Speed up of GPU = %f\n"
	.size	.L.str.22, 22

	.type	.L.str.24,@object               # @.str.24
.L.str.24:
	.asciz	"norm(h_C - h_D)=%20.15e\n\n"
	.size	.L.str.24, 26

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z6VecAddPKfS0_Pfl"
	.size	.L__unnamed_1, 19

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"Vector Addition: C = 1/A + 1/B"
	.size	.Lstr, 31

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"Check result:"
	.size	.Lstr.1, 14

	.type	.Lstr.2,@object                 # @str.2
.Lstr.2:
	.asciz	"The number of threads per block must be less than 1024 ! "
	.size	.Lstr.2, 58

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z21__device_stub__VecAddPKfS0_Pfl
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym d_A
	.addrsig_sym d_B
	.addrsig_sym d_C
	.addrsig_sym _Z6VecAddPKfS0_Pfl
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z6VecAddPKfS0_Pfl      ; -- Begin function _Z6VecAddPKfS0_Pfl
	.globl	_Z6VecAddPKfS0_Pfl
	.p2align	8
	.type	_Z6VecAddPKfS0_Pfl,@function
_Z6VecAddPKfS0_Pfl:                     ; @_Z6VecAddPKfS0_Pfl
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b256 s[4:11], s[0:1], 0x0
	s_add_u32 s0, s0, 32
	s_addc_u32 s1, s1, 0
	s_mov_b32 s14, exec_lo
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	v_mov_b32_e32 v2, 0
	v_cmpx_gt_i64_e64 s[10:11], v[1:2]
	s_cbranch_execz .LBB0_3
; %bb.1:                                ; %.lr.ph
	s_load_b32 s0, s[0:1], 0x0
	v_lshlrev_b64 v[3:4], 2, v[1:2]
	s_mov_b32 s3, 0
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s2, s0, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b64 s[12:13], s[2:3], 2
.LBB0_2:                                ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_u32 v5, vcc_lo, s4, v3
	v_add_co_ci_u32_e32 v6, vcc_lo, s5, v4, vcc_lo
	v_add_co_u32 v7, vcc_lo, s6, v3
	v_add_co_ci_u32_e32 v8, vcc_lo, s7, v4, vcc_lo
	global_load_b32 v0, v[5:6], off
	global_load_b32 v7, v[7:8], off
	s_waitcnt vmcnt(1)
	v_cvt_f64_f32_e32 v[5:6], v0
	s_waitcnt vmcnt(0)
	v_cvt_f64_f32_e32 v[7:8], v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_scale_f64 v[9:10], null, v[5:6], v[5:6], 1.0
	v_div_scale_f64 v[11:12], null, v[7:8], v[7:8], 1.0
	v_div_scale_f64 v[21:22], vcc_lo, 1.0, v[5:6], 1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_rcp_f64_e32 v[13:14], v[9:10]
	v_rcp_f64_e32 v[15:16], v[11:12]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[17:18], -v[9:10], v[13:14], 1.0
	v_fma_f64 v[19:20], -v[11:12], v[15:16], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[13:14], v[13:14], v[17:18], v[13:14]
	v_fma_f64 v[15:16], v[15:16], v[19:20], v[15:16]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[17:18], -v[9:10], v[13:14], 1.0
	v_fma_f64 v[19:20], -v[11:12], v[15:16], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[13:14], v[13:14], v[17:18], v[13:14]
	v_div_scale_f64 v[17:18], s0, 1.0, v[7:8], 1.0
	v_fma_f64 v[15:16], v[15:16], v[19:20], v[15:16]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[19:20], v[21:22], v[13:14]
	v_mul_f64 v[23:24], v[17:18], v[15:16]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[9:10], -v[9:10], v[19:20], v[21:22]
	v_fma_f64 v[11:12], -v[11:12], v[23:24], v[17:18]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_fmas_f64 v[9:10], v[9:10], v[13:14], v[19:20]
	s_mov_b32 vcc_lo, s0
	v_div_fmas_f64 v[11:12], v[11:12], v[15:16], v[23:24]
	v_add_co_u32 v1, vcc_lo, v1, s2
	v_add_co_ci_u32_e32 v2, vcc_lo, 0, v2, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_div_fixup_f64 v[5:6], v[9:10], v[5:6], 1.0
	v_div_fixup_f64 v[7:8], v[11:12], v[7:8], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[5:6], v[5:6], v[7:8]
	v_cvt_f32_f64_e32 v0, v[5:6]
	v_add_co_u32 v5, vcc_lo, s8, v3
	v_add_co_ci_u32_e32 v6, vcc_lo, s9, v4, vcc_lo
	v_cmp_le_i64_e32 vcc_lo, s[10:11], v[1:2]
	v_add_co_u32 v3, s0, v3, s12
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s0, s13, v4, s0
	s_or_b32 s3, vcc_lo, s3
	global_store_b32 v[5:6], v0, off
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB0_2
.LBB0_3:                                ; %Flow25
	s_or_b32 exec_lo, exec_lo, s14
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z6VecAddPKfS0_Pfl
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 25
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z6VecAddPKfS0_Pfl, .Lfunc_end0-_Z6VecAddPKfS0_Pfl
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 488
; NumSgprs: 18
; NumVgprs: 25
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 3
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 25
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           8
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z6VecAddPKfS0_Pfl
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z6VecAddPKfS0_Pfl.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     25
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
