#include<cuda.h>
#include<stdio.h>
#include<stdlib.h>
#include<iostream>

#define CHECK 0

const unsigned int SINGLE_PRECISION = 1;
const unsigned int DOUBLE_PRECISION = 0;
float *SMd, *SNd, *SPd;
double *DMd, *DNd, *DPd;
const unsigned int WIDTH = 1024;


//generate matrix
template<typename T>
T *GenMatrix(const unsigned int width, const unsigned int height)
{
	T *matrix;
	const unsigned int M_SIZE = width*height;
	unsigned int i = 0, j = 0;
	matrix  = (T*) malloc(M_SIZE * sizeof(double));
	for(i = 0 ;i < height; i++){
		for(j = 0 ;j < width; j++){
			matrix[i * width + j] = (rand()*1.0)/ RAND_MAX;
		}
	}
	return matrix;
}

//display matrix
template<typename T>
int PrintMatrix(T *P, const unsigned int width, const unsigned int height)
{
	unsigned int i = 0, j = 0;
	printf("\n");
	for(i = 0 ;i < height; i++){
		for(j = 0 ;j < width; j++){
			printf("%.3f\t", P[i * width + j]);
		}
		printf("\n");
	}
	return 1;
}
//Init data
template<typename T>
void Init_Cuda(T *M, T *N, const unsigned int width, const unsigned int height, bool sp)
{
	const unsigned int size = width*height*sizeof(T);
	//allocate matrix
	if(sp==SINGLE_PRECISION){
		cudaMalloc((void**)&SMd, size);
		cudaMemcpy(SMd, M, size, cudaMemcpyHostToDevice);
		cudaMalloc((void**)&SNd, size);
		cudaMemcpy(SNd, N, size,cudaMemcpyHostToDevice);
		cudaMalloc((void**)&SPd, size);
		cudaMemset(SPd, 0, size);
	}
	else
	{
		cudaMalloc((void**)&DMd, size);
		cudaMemcpy(DMd, M, size, cudaMemcpyHostToDevice);
		cudaMalloc((void**)&DNd, size);
		cudaMemcpy(DNd, N, size,cudaMemcpyHostToDevice);
		cudaMalloc((void**)&DPd, size);
		cudaMemset(DPd, 0, size);
	}
}
//Free memory
void Free_Cuda(bool sp)
{
	if(sp==SINGLE_PRECISION){
		cudaFree(SMd);
		cudaFree(SNd);
		cudaFree(SPd);
	}
	else
	{
		cudaFree(DMd);
		cudaFree(DNd);
		cudaFree(DPd);
	}
}
//kernel function
template<typename T>
__global__ void MatrixAddKernel(T *P, const T *M, const T *N, const unsigned int width)
{

	unsigned int i = blockIdx.x*blockDim.x + threadIdx.x;
	const unsigned int length = width * width;
	while (i < length) {
		P[i] = M[i] + N[i];
		i += gridDim.x * blockDim.x;
	}
}

template<typename T>
int MatrixAdd(T *P, const T *M, const T *N, const unsigned int n)
{
	int i, j ;
	for(i = 0 ;i < n; i++)
		for(j = 0 ;j < n; j++)
		{	P [ i* n + j] = M[ i* n + j] + N[ i* n + j];
		}
	return 0;
}
template<typename T>
int Check(const T *KP, const T *CP, const unsigned int n)
{
	int i, j;
	T e = 0.001;
	int correct = 1;
	for(i = 0; i < n ; i++)
		for(j = 0; j < n; j++)
		{	if(abs(KP[i * n + j] - CP[i * n + j]) > e)
			{	printf("%.10f %.10f\n", KP[i * n + j], CP[i * n + j]);
				return 0;
			}

		}
	return correct;
}
int main(int argc, char * argv[])
{
	bool sp = 1;
	float *SM, *SN, *SKP, *SCP;
	double *DM, *DN, *DKP, *DCP;
	cudaEvent_t start, stop;
	float elapsedTime;
	unsigned int width;

	width = WIDTH;

	//create number of blocks and number of threads
	int Thr = 128;
	dim3 block(Thr, 1, 1);
	dim3 grid(((width*width)+ Thr - 1) / Thr, 1, 1);
	if (argc != 5)
	{
		/* We print argv[0] assuming it is the program name */
		printf("Wrong parameters. Please use the following format for running.\n");
		printf(" Usage: %s %s %s %s %s", argv[0], "[matrix_size]", "[single|double]", "[divide_val]", "[num_threads]\n");
		exit(EXIT_FAILURE);
	} else {
		width =  atoi(argv[1]);
		sp = atoi(argv[2]);
		block.x = atoi(argv[4]);
		grid.x = ((width*width)/atoi(argv[3]) + block.x - 1) / block.x;
		if(atoi(argv[2])!=0)
			sp = SINGLE_PRECISION;
		else
			sp = DOUBLE_PRECISION;

	}
	//for using MatrixMul_Kernel_Tiled_SM kernel
	//block.x = TILE_WIDTH; block.y=TILE_WIDTH;
	//grid.x = WIDTH/TILE_WIDTH; grid.y = WIDTH/TILE_WIDTH;

	//initialize host memory
	if(sp==SINGLE_PRECISION)
	{

		SM = GenMatrix<float>(width, width);
		//PrintMatrix(M, width, width);
		SN = GenMatrix<float>(width, width);
		//PrintMatrix(N, width, width);
		SKP = GenMatrix<float>(width, width);

		SCP = GenMatrix<float>(width, width);

		//initialize device memory
		Init_Cuda<float>(SM, SN, width, width, SINGLE_PRECISION);
	}
	else
	{

		DM = GenMatrix<double>(width, width);
		//PrintMatrix(M, width, width);
		DN = GenMatrix<double>(width, width);
		//PrintMatrix(N, width, width);
		DKP = GenMatrix<double>(width, width);

		DCP = GenMatrix<double>(width, width);

		//initialize device memory
		Init_Cuda<double>(DM, DN, width, width, DOUBLE_PRECISION);
	}


    //create cudaEvent start and stop to record elapsed time
	cudaEventCreate(&start);
	cudaEventCreate(&stop);

	//record start time to start event
	cudaEventRecord(start, 0);

	//launch kernel
	if(sp==SINGLE_PRECISION)
	{
		MatrixAddKernel<float><<<grid, block>>>(SPd, SMd, SNd, width);
	}
	else
	{
		MatrixAddKernel<double><<<grid, block>>>(DPd, DMd, DNd, width);
	}

	//record start time to stop event
	cudaEventRecord(stop, 0);
	//synchronize the stop event
	cudaEventSynchronize(stop);
	//calculate the elapsed time
	cudaEventElapsedTime(&elapsedTime, start, stop);

	//destroy the start and stop event
	cudaEventDestroy(start);
	cudaEventDestroy(stop);

	//copy data from device memory to host memory
	if(sp==SINGLE_PRECISION)
		cudaMemcpy(SKP, SPd, width*width*sizeof(float), cudaMemcpyDeviceToHost);
	else
		cudaMemcpy(DKP, DPd, width*width*sizeof(double), cudaMemcpyDeviceToHost);
	//PrintMatrix(P, width, width);

	//print runtime
	printf("[ %s ][ %4dx%4d ][ %10d blocks ][ %5d threads ]\t>\t[ %7.3f (ms) ]\n", ((sp==SINGLE_PRECISION)?"Single Precision":"Double Precision"), width, width, grid.x, block.x, elapsedTime);

#if (CHECK==1)
	if(sp==SINGLE_PRECISION)
	{
		/*printf("M >>>>>>>>>>>>>>>>>>>>>>>>>>\n");
		PrintMatrix<float>(SM, width, width);
		printf("N >>>>>>>>>>>>>>>>>>>>>>>>>>\n");
		PrintMatrix<float>(SN, width, width);
		printf("KP >>>>>>>>>>>>>>>>>>>>>>>>>>\n");
		PrintMatrix<float>(SKP, width, width);
		*/
		MatrixAdd<float>(SCP, SM, SN, width);
		//printf("CP >>>>>>>>>>>>>>>>>>>>>>>>>>\n");
		//PrintMatrix<float>(CP, width, width);

		if(Check<float>(SKP, SCP, width))
			printf("We do it.\n");
		else
			printf("Something is wrong.\n");

	}
	else
	{
		/*printf("M >>>>>>>>>>>>>>>>>>>>>>>>>>\n");
		PrintMatrix<double>(DM, width, width);
		printf("N >>>>>>>>>>>>>>>>>>>>>>>>>>\n");
		PrintMatrix<double>(DN, width, width);
		printf("KP >>>>>>>>>>>>>>>>>>>>>>>>>>\n");
		PrintMatrix<double>(DKP, width, width);
		*/
		MatrixAdd<double>(DCP, DM, DN, width);
		//printf("CP >>>>>>>>>>>>>>>>>>>>>>>>>>\n");
		//PrintMatrix<double>(DCP, width, width);

		if(Check<double>(DKP, DCP, width))
			printf("We do it.\n");
		else
			printf("Something is wrong.\n");

	}
#endif
	//free host memory
	if(sp==SINGLE_PRECISION)
	{
		free(SM);
		free(SN);
		free(SKP);
		free(SCP);
	//free device memory
		Free_Cuda(sp);
	}
	else
	{
		free(DM);
		free(DN);
		free(DKP);
		free(DCP);
		//free device memory
		Free_Cuda(sp);
	}
	return 0;
}

	.file	"tmpxft_0030bab3_00000000-6_addm_s_d.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3646:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3646:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.type	_ZL49__device_stub__Z15MatrixAddKernelIfEvPT_PKS0_S3_jPfPKfS1_j, @function
_ZL49__device_stub__Z15MatrixAddKernelIfEvPT_PKS0_S3_jPfPKfS1_j:
.LFB3668:
	.cfi_startproc
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z15MatrixAddKernelIfEvPT_PKS0_S3_j(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L2:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3668:
	.size	_ZL49__device_stub__Z15MatrixAddKernelIfEvPT_PKS0_S3_jPfPKfS1_j, .-_ZL49__device_stub__Z15MatrixAddKernelIfEvPT_PKS0_S3_jPfPKfS1_j
	.type	_ZL49__device_stub__Z15MatrixAddKernelIdEvPT_PKS0_S3_jPdPKdS1_j, @function
_ZL49__device_stub__Z15MatrixAddKernelIdEvPT_PKS0_S3_jPdPKdS1_j:
.LFB3670:
	.cfi_startproc
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L7
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z15MatrixAddKernelIdEvPT_PKS0_S3_j(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L7:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L9
	call	__stack_chk_fail@PLT
.L9:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3670:
	.size	_ZL49__device_stub__Z15MatrixAddKernelIdEvPT_PKS0_S3_jPdPKdS1_j, .-_ZL49__device_stub__Z15MatrixAddKernelIdEvPT_PKS0_S3_jPdPKdS1_j
	.section	.text._Z15MatrixAddKernelIfEvPT_PKS0_S3_j,"axG",@progbits,_Z15MatrixAddKernelIfEvPT_PKS0_S3_j,comdat
	.weak	_Z15MatrixAddKernelIfEvPT_PKS0_S3_j
	.type	_Z15MatrixAddKernelIfEvPT_PKS0_S3_j, @function
_Z15MatrixAddKernelIfEvPT_PKS0_S3_j:
.LFB3977:
	.cfi_startproc
	endbr64
	jmp	_ZL49__device_stub__Z15MatrixAddKernelIfEvPT_PKS0_S3_jPfPKfS1_j
	.cfi_endproc
.LFE3977:
	.size	_Z15MatrixAddKernelIfEvPT_PKS0_S3_j, .-_Z15MatrixAddKernelIfEvPT_PKS0_S3_j
	.section	.text._Z15MatrixAddKernelIdEvPT_PKS0_S3_j,"axG",@progbits,_Z15MatrixAddKernelIdEvPT_PKS0_S3_j,comdat
	.weak	_Z15MatrixAddKernelIdEvPT_PKS0_S3_j
	.type	_Z15MatrixAddKernelIdEvPT_PKS0_S3_j, @function
_Z15MatrixAddKernelIdEvPT_PKS0_S3_j:
.LFB3978:
	.cfi_startproc
	endbr64
	jmp	_ZL49__device_stub__Z15MatrixAddKernelIdEvPT_PKS0_S3_jPdPKdS1_j
	.cfi_endproc
.LFE3978:
	.size	_Z15MatrixAddKernelIdEvPT_PKS0_S3_j, .-_Z15MatrixAddKernelIdEvPT_PKS0_S3_j
	.text
	.globl	_Z9Free_Cudab
	.type	_Z9Free_Cudab, @function
_Z9Free_Cudab:
.LFB3638:
	.cfi_startproc
	endbr64
	pushq	%rdx
	.cfi_def_cfa_offset 16
	testb	%dil, %dil
	je	.L14
	movq	SMd(%rip), %rdi
	call	cudaFree@PLT
	movq	SNd(%rip), %rdi
	call	cudaFree@PLT
	movq	SPd(%rip), %rdi
	jmp	.L16
.L14:
	movq	DMd(%rip), %rdi
	call	cudaFree@PLT
	movq	DNd(%rip), %rdi
	call	cudaFree@PLT
	movq	DPd(%rip), %rdi
.L16:
	popq	%rax
	.cfi_def_cfa_offset 8
	jmp	cudaFree@PLT
	.cfi_endproc
.LFE3638:
	.size	_Z9Free_Cudab, .-_Z9Free_Cudab
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z15MatrixAddKernelIdEvPT_PKS0_S3_j"
.LC1:
	.string	"_Z15MatrixAddKernelIfEvPT_PKS0_S3_j"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3673:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z15MatrixAddKernelIdEvPT_PKS0_S3_j(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC1(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z15MatrixAddKernelIfEvPT_PKS0_S3_j(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3673:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.text._Z9GenMatrixIfEPT_jj,"axG",@progbits,_Z9GenMatrixIfEPT_jj,comdat
	.weak	_Z9GenMatrixIfEPT_jj
	.type	_Z9GenMatrixIfEPT_jj, @function
_Z9GenMatrixIfEPT_jj:
.LFB3973:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	xorl	%r15d, %r15d
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	xorl	%r14d, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%edi, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%esi, %ebx
	imull	%ebx, %edi
	pushq	%rcx
	.cfi_def_cfa_offset 64
	salq	$3, %rdi
	call	malloc@PLT
	movq	%rax, %r13
.L20:
	cmpq	%rbx, %r14
	je	.L25
	movl	%r15d, %ebp
.L22:
	leal	(%r12,%r15), %eax
	cmpl	%eax, %ebp
	je	.L26
	call	rand@PLT
	movl	%eax, %edx
	movl	%ebp, %eax
	incl	%ebp
	cvtsi2sdl	%edx, %xmm0
	divsd	.LC2(%rip), %xmm0
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, 0(%r13,%rax,4)
	jmp	.L22
.L26:
	incq	%r14
	movl	%ebp, %r15d
	jmp	.L20
.L25:
	popq	%rdx
	.cfi_def_cfa_offset 56
	movq	%r13, %rax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3973:
	.size	_Z9GenMatrixIfEPT_jj, .-_Z9GenMatrixIfEPT_jj
	.section	.text._Z9Init_CudaIfEvPT_S1_jjb,"axG",@progbits,_Z9Init_CudaIfEvPT_S1_jjb,comdat
	.weak	_Z9Init_CudaIfEvPT_S1_jjb
	.type	_Z9Init_CudaIfEvPT_S1_jjb, @function
_Z9Init_CudaIfEvPT_S1_jjb:
.LFB3974:
	.cfi_startproc
	endbr64
	imull	%ecx, %edx
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movq	%rdi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rsi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	leal	0(,%rdx,4), %ebx
	movq	%rbx, %rsi
	testb	%r8b, %r8b
	je	.L28
	leaq	SMd(%rip), %rdi
	call	cudaMalloc@PLT
	movl	$1, %ecx
	movq	%rbx, %rdx
	movq	%r12, %rsi
	movq	SMd(%rip), %rdi
	call	cudaMemcpy@PLT
	movq	%rbx, %rsi
	leaq	SNd(%rip), %rdi
	call	cudaMalloc@PLT
	movq	%rbx, %rdx
	movl	$1, %ecx
	movq	%rbp, %rsi
	movq	SNd(%rip), %rdi
	call	cudaMemcpy@PLT
	movq	%rbx, %rsi
	leaq	SPd(%rip), %rdi
	call	cudaMalloc@PLT
	movq	SPd(%rip), %rdi
	movq	%rbx, %rdx
	xorl	%esi, %esi
	jmp	.L30
.L28:
	leaq	DMd(%rip), %rdi
	call	cudaMalloc@PLT
	movl	$1, %ecx
	movq	%rbx, %rdx
	movq	%r12, %rsi
	movq	DMd(%rip), %rdi
	call	cudaMemcpy@PLT
	movq	%rbx, %rsi
	leaq	DNd(%rip), %rdi
	call	cudaMalloc@PLT
	movq	%rbx, %rdx
	movl	$1, %ecx
	movq	%rbp, %rsi
	movq	DNd(%rip), %rdi
	call	cudaMemcpy@PLT
	movq	%rbx, %rsi
	leaq	DPd(%rip), %rdi
	call	cudaMalloc@PLT
	movq	DPd(%rip), %rdi
	movq	%rbx, %rdx
	xorl	%esi, %esi
.L30:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	jmp	cudaMemset@PLT
	.cfi_endproc
.LFE3974:
	.size	_Z9Init_CudaIfEvPT_S1_jjb, .-_Z9Init_CudaIfEvPT_S1_jjb
	.section	.text._Z9GenMatrixIdEPT_jj,"axG",@progbits,_Z9GenMatrixIdEPT_jj,comdat
	.weak	_Z9GenMatrixIdEPT_jj
	.type	_Z9GenMatrixIdEPT_jj, @function
_Z9GenMatrixIdEPT_jj:
.LFB3975:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	xorl	%r15d, %r15d
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	xorl	%r14d, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movl	%edi, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%esi, %ebx
	imull	%ebx, %edi
	pushq	%rcx
	.cfi_def_cfa_offset 64
	salq	$3, %rdi
	call	malloc@PLT
	movq	%rax, %r12
.L32:
	cmpq	%rbx, %r14
	je	.L37
	movl	%r15d, %ebp
.L34:
	leal	0(%r13,%r15), %eax
	cmpl	%eax, %ebp
	je	.L38
	call	rand@PLT
	movl	%eax, %edx
	movl	%ebp, %eax
	incl	%ebp
	cvtsi2sdl	%edx, %xmm0
	divsd	.LC2(%rip), %xmm0
	movsd	%xmm0, (%r12,%rax,8)
	jmp	.L34
.L38:
	incq	%r14
	movl	%ebp, %r15d
	jmp	.L32
.L37:
	popq	%rdx
	.cfi_def_cfa_offset 56
	movq	%r12, %rax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3975:
	.size	_Z9GenMatrixIdEPT_jj, .-_Z9GenMatrixIdEPT_jj
	.section	.text._Z9Init_CudaIdEvPT_S1_jjb,"axG",@progbits,_Z9Init_CudaIdEvPT_S1_jjb,comdat
	.weak	_Z9Init_CudaIdEvPT_S1_jjb
	.type	_Z9Init_CudaIdEvPT_S1_jjb, @function
_Z9Init_CudaIdEvPT_S1_jjb:
.LFB3976:
	.cfi_startproc
	endbr64
	imull	%ecx, %edx
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movq	%rdi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rsi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	leal	0(,%rdx,8), %ebx
	movq	%rbx, %rsi
	testb	%r8b, %r8b
	je	.L40
	leaq	SMd(%rip), %rdi
	call	cudaMalloc@PLT
	movl	$1, %ecx
	movq	%rbx, %rdx
	movq	%r12, %rsi
	movq	SMd(%rip), %rdi
	call	cudaMemcpy@PLT
	movq	%rbx, %rsi
	leaq	SNd(%rip), %rdi
	call	cudaMalloc@PLT
	movq	%rbx, %rdx
	movl	$1, %ecx
	movq	%rbp, %rsi
	movq	SNd(%rip), %rdi
	call	cudaMemcpy@PLT
	movq	%rbx, %rsi
	leaq	SPd(%rip), %rdi
	call	cudaMalloc@PLT
	movq	SPd(%rip), %rdi
	movq	%rbx, %rdx
	xorl	%esi, %esi
	jmp	.L42
.L40:
	leaq	DMd(%rip), %rdi
	call	cudaMalloc@PLT
	movl	$1, %ecx
	movq	%rbx, %rdx
	movq	%r12, %rsi
	movq	DMd(%rip), %rdi
	call	cudaMemcpy@PLT
	movq	%rbx, %rsi
	leaq	DNd(%rip), %rdi
	call	cudaMalloc@PLT
	movq	%rbx, %rdx
	movl	$1, %ecx
	movq	%rbp, %rsi
	movq	DNd(%rip), %rdi
	call	cudaMemcpy@PLT
	movq	%rbx, %rsi
	leaq	DPd(%rip), %rdi
	call	cudaMalloc@PLT
	movq	DPd(%rip), %rdi
	movq	%rbx, %rdx
	xorl	%esi, %esi
.L42:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	jmp	cudaMemset@PLT
	.cfi_endproc
.LFE3976:
	.size	_Z9Init_CudaIdEvPT_S1_jjb, .-_Z9Init_CudaIdEvPT_S1_jjb
	.section	.rodata.str1.1
.LC3:
	.string	"Single Precision"
.LC4:
	.string	"Double Precision"
.LC5:
	.string	"Wrong parameters. Please use the following format for running.\n"
.LC6:
	.string	"[divide_val]"
.LC7:
	.string	"[single|double]"
.LC8:
	.string	"[matrix_size]"
.LC9:
	.string	" Usage: %s %s %s %s %s"
.LC10:
	.string	"[num_threads]\n"
.LC11:
	.string	"[ %s ][ %4dx%4d ][ %10d blocks ][ %5d threads ]\t>\t[ %7.3f (ms) ]\n"
	.section	.text.startup
	.globl	main
	.type	main, @function
main:
.LFB3643:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rsi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$136, %rsp
	.cfi_def_cfa_offset 192
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	movl	$1, 100(%rsp)
	movl	$1, 104(%rsp)
	movl	$1, 112(%rsp)
	movl	$1, 116(%rsp)
	cmpl	$5, %edi
	je	.L44
	leaq	.LC5(%rip), %rsi
	movl	$2, %edi
	call	__printf_chk@PLT
	leaq	.LC10(%rip), %rax
	movl	$2, %edi
	leaq	.LC6(%rip), %r9
	pushq	%rsi
	.cfi_remember_state
	.cfi_def_cfa_offset 200
	leaq	.LC7(%rip), %r8
	leaq	.LC8(%rip), %rcx
	pushq	%rax
	.cfi_def_cfa_offset 208
	movq	0(%r13), %rdx
	leaq	.LC9(%rip), %rsi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$1, %edi
	call	exit@PLT
.L44:
	.cfi_restore_state
	movq	8(%rsi), %rdi
	call	atoi@PLT
	movq	16(%r13), %rdi
	movl	%eax, %ebx
	call	atoi@PLT
	movq	32(%r13), %rdi
	movl	%ebx, %ebp
	imull	%ebx, %ebp
	movl	%eax, %r15d
	call	atoi@PLT
	movq	24(%r13), %rdi
	movl	%eax, %r12d
	call	atoi@PLT
	xorl	%edx, %edx
	movl	%ebx, %esi
	movl	%ebx, %edi
	movl	%eax, %ecx
	movl	%ebp, %eax
	divl	%ecx
	xorl	%edx, %edx
	leal	-1(%r12,%rax), %eax
	divl	%r12d
	movl	%eax, %r13d
	testl	%r15d, %r15d
	je	.L45
	call	_Z9GenMatrixIfEPT_jj
	movl	%ebx, %esi
	movl	%ebx, %edi
	movb	$1, %r15b
	movq	%rax, %r14
	call	_Z9GenMatrixIfEPT_jj
	movl	%ebx, %esi
	movl	%ebx, %edi
	movq	%rax, 8(%rsp)
	call	_Z9GenMatrixIfEPT_jj
	movl	%ebx, %esi
	movl	%ebx, %edi
	movq	%rax, 16(%rsp)
	call	_Z9GenMatrixIfEPT_jj
	movq	8(%rsp), %rsi
	movl	%ebx, %ecx
	movl	%ebx, %edx
	movl	$1, %r8d
	movq	%r14, %rdi
	movq	%rax, 48(%rsp)
	call	_Z9Init_CudaIfEvPT_S1_jjb
	jmp	.L46
.L45:
	call	_Z9GenMatrixIdEPT_jj
	movl	%ebx, %esi
	movl	%ebx, %edi
	xorl	%r15d, %r15d
	movq	%rax, 24(%rsp)
	call	_Z9GenMatrixIdEPT_jj
	movl	%ebx, %esi
	movl	%ebx, %edi
	movq	%rax, 32(%rsp)
	call	_Z9GenMatrixIdEPT_jj
	movl	%ebx, %esi
	movl	%ebx, %edi
	movq	%rax, 40(%rsp)
	call	_Z9GenMatrixIdEPT_jj
	movq	32(%rsp), %rsi
	xorl	%r8d, %r8d
	movl	%ebx, %ecx
	movq	24(%rsp), %rdi
	movl	%ebx, %edx
	movq	%rax, 56(%rsp)
	call	_Z9Init_CudaIdEvPT_S1_jjb
.L46:
	leaq	80(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	88(%rsp), %rdi
	call	cudaEventCreate@PLT
	movq	80(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	testb	%r15b, %r15b
	movl	104(%rsp), %ecx
	movl	116(%rsp), %esi
	movl	%r13d, 108(%rsp)
	movl	$0, %r9d
	movq	108(%rsp), %rdi
	movl	$0, %r8d
	movl	%r12d, 96(%rsp)
	movq	96(%rsp), %rdx
	je	.L47
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L49
	movq	SNd(%rip), %rdx
	movq	SMd(%rip), %rsi
	movl	%ebx, %ecx
	movq	SPd(%rip), %rdi
	call	_ZL49__device_stub__Z15MatrixAddKernelIfEvPT_PKS0_S3_jPfPKfS1_j
	jmp	.L49
.L47:
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L49
	movq	DNd(%rip), %rdx
	movq	DMd(%rip), %rsi
	movl	%ebx, %ecx
	movq	DPd(%rip), %rdi
	call	_ZL49__device_stub__Z15MatrixAddKernelIdEvPT_PKS0_S3_jPdPKdS1_j
.L49:
	movq	88(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	88(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	88(%rsp), %rdx
	movq	80(%rsp), %rsi
	leaq	76(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	movq	80(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	88(%rsp), %rdi
	call	cudaEventDestroy@PLT
	testb	%r15b, %r15b
	je	.L51
	movq	SPd(%rip), %rsi
	movq	16(%rsp), %rdi
	movl	$2, %ecx
	leaq	0(,%rbp,4), %rdx
	call	cudaMemcpy@PLT
	leaq	.LC3(%rip), %rdx
	cvtss2sd	76(%rsp), %xmm0
	jmp	.L52
.L51:
	movq	DPd(%rip), %rsi
	movq	40(%rsp), %rdi
	movl	$2, %ecx
	leaq	0(,%rbp,8), %rdx
	call	cudaMemcpy@PLT
	leaq	.LC4(%rip), %rdx
	cvtss2sd	76(%rsp), %xmm0
.L52:
	pushq	%rax
	.cfi_def_cfa_offset 200
	movl	%ebx, %ecx
	movl	%r13d, %r9d
	movl	%ebx, %r8d
	pushq	%r12
	.cfi_def_cfa_offset 208
	leaq	.LC11(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	call	__printf_chk@PLT
	popq	%rdx
	.cfi_def_cfa_offset 200
	popq	%rcx
	.cfi_def_cfa_offset 192
	testb	%r15b, %r15b
	je	.L53
	movq	%r14, %rdi
	call	free@PLT
	movq	8(%rsp), %rdi
	call	free@PLT
	movq	16(%rsp), %rdi
	call	free@PLT
	movq	48(%rsp), %rdi
	call	free@PLT
	movl	$1, %edi
	jmp	.L57
.L53:
	movq	24(%rsp), %rdi
	call	free@PLT
	movq	32(%rsp), %rdi
	call	free@PLT
	movq	40(%rsp), %rdi
	call	free@PLT
	movq	56(%rsp), %rdi
	call	free@PLT
	xorl	%edi, %edi
.L57:
	call	_Z9Free_Cudab
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L55
	call	__stack_chk_fail@PLT
.L55:
	addq	$136, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3643:
	.size	main, .-main
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.globl	DPd
	.bss
	.align 8
	.type	DPd, @object
	.size	DPd, 8
DPd:
	.zero	8
	.globl	DNd
	.align 8
	.type	DNd, @object
	.size	DNd, 8
DNd:
	.zero	8
	.globl	DMd
	.align 8
	.type	DMd, @object
	.size	DMd, 8
DMd:
	.zero	8
	.globl	SPd
	.align 8
	.type	SPd, @object
	.size	SPd, 8
SPd:
	.zero	8
	.globl	SNd
	.align 8
	.type	SNd, @object
	.size	SNd, 8
SNd:
	.zero	8
	.globl	SMd
	.align 8
	.type	SMd, @object
	.size	SMd, 8
SMd:
	.zero	8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC2:
	.long	-4194304
	.long	1105199103
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include<hip/hip_runtime.h>
#include<stdio.h>
#include<stdlib.h>
#include<iostream>

#define CHECK 0

const unsigned int SINGLE_PRECISION = 1;
const unsigned int DOUBLE_PRECISION = 0;
float *SMd, *SNd, *SPd;
double *DMd, *DNd, *DPd;
const unsigned int WIDTH = 1024;


//generate matrix
template<typename T>
T *GenMatrix(const unsigned int width, const unsigned int height)
{
	T *matrix;
	const unsigned int M_SIZE = width*height;
	unsigned int i = 0, j = 0;
	matrix  = (T*) malloc(M_SIZE * sizeof(double));
	for(i = 0 ;i < height; i++){
		for(j = 0 ;j < width; j++){
			matrix[i * width + j] = (rand()*1.0)/ RAND_MAX;
		}
	}
	return matrix;
}

//display matrix
template<typename T>
int PrintMatrix(T *P, const unsigned int width, const unsigned int height)
{
	unsigned int i = 0, j = 0;
	printf("\n");
	for(i = 0 ;i < height; i++){
		for(j = 0 ;j < width; j++){
			printf("%.3f\t", P[i * width + j]);
		}
		printf("\n");
	}
	return 1;
}
//Init data
template<typename T>
void Init_Cuda(T *M, T *N, const unsigned int width, const unsigned int height, bool sp)
{
	const unsigned int size = width*height*sizeof(T);
	//allocate matrix
	if(sp==SINGLE_PRECISION){
		hipMalloc((void**)&SMd, size);
		hipMemcpy(SMd, M, size, hipMemcpyHostToDevice);
		hipMalloc((void**)&SNd, size);
		hipMemcpy(SNd, N, size,hipMemcpyHostToDevice);
		hipMalloc((void**)&SPd, size);
		hipMemset(SPd, 0, size);
	}
	else
	{
		hipMalloc((void**)&DMd, size);
		hipMemcpy(DMd, M, size, hipMemcpyHostToDevice);
		hipMalloc((void**)&DNd, size);
		hipMemcpy(DNd, N, size,hipMemcpyHostToDevice);
		hipMalloc((void**)&DPd, size);
		hipMemset(DPd, 0, size);
	}
}
//Free memory
void Free_Cuda(bool sp)
{
	if(sp==SINGLE_PRECISION){
		hipFree(SMd);
		hipFree(SNd);
		hipFree(SPd);
	}
	else
	{
		hipFree(DMd);
		hipFree(DNd);
		hipFree(DPd);
	}
}
//kernel function
template<typename T>
__global__ void MatrixAddKernel(T *P, const T *M, const T *N, const unsigned int width)
{

	unsigned int i = blockIdx.x*blockDim.x + threadIdx.x;
	const unsigned int length = width * width;
	while (i < length) {
		P[i] = M[i] + N[i];
		i += gridDim.x * blockDim.x;
	}
}

template<typename T>
int MatrixAdd(T *P, const T *M, const T *N, const unsigned int n)
{
	int i, j ;
	for(i = 0 ;i < n; i++)
		for(j = 0 ;j < n; j++)
		{	P [ i* n + j] = M[ i* n + j] + N[ i* n + j];
		}
	return 0;
}
template<typename T>
int Check(const T *KP, const T *CP, const unsigned int n)
{
	int i, j;
	T e = 0.001;
	int correct = 1;
	for(i = 0; i < n ; i++)
		for(j = 0; j < n; j++)
		{	if(abs(KP[i * n + j] - CP[i * n + j]) > e)
			{	printf("%.10f %.10f\n", KP[i * n + j], CP[i * n + j]);
				return 0;
			}

		}
	return correct;
}
int main(int argc, char * argv[])
{
	bool sp = 1;
	float *SM, *SN, *SKP, *SCP;
	double *DM, *DN, *DKP, *DCP;
	hipEvent_t start, stop;
	float elapsedTime;
	unsigned int width;

	width = WIDTH;

	//create number of blocks and number of threads
	int Thr = 128;
	dim3 block(Thr, 1, 1);
	dim3 grid(((width*width)+ Thr - 1) / Thr, 1, 1);
	if (argc != 5)
	{
		/* We print argv[0] assuming it is the program name */
		printf("Wrong parameters. Please use the following format for running.\n");
		printf(" Usage: %s %s %s %s %s", argv[0], "[matrix_size]", "[single|double]", "[divide_val]", "[num_threads]\n");
		exit(EXIT_FAILURE);
	} else {
		width =  atoi(argv[1]);
		sp = atoi(argv[2]);
		block.x = atoi(argv[4]);
		grid.x = ((width*width)/atoi(argv[3]) + block.x - 1) / block.x;
		if(atoi(argv[2])!=0)
			sp = SINGLE_PRECISION;
		else
			sp = DOUBLE_PRECISION;

	}
	//for using MatrixMul_Kernel_Tiled_SM kernel
	//block.x = TILE_WIDTH; block.y=TILE_WIDTH;
	//grid.x = WIDTH/TILE_WIDTH; grid.y = WIDTH/TILE_WIDTH;

	//initialize host memory
	if(sp==SINGLE_PRECISION)
	{

		SM = GenMatrix<float>(width, width);
		//PrintMatrix(M, width, width);
		SN = GenMatrix<float>(width, width);
		//PrintMatrix(N, width, width);
		SKP = GenMatrix<float>(width, width);

		SCP = GenMatrix<float>(width, width);

		//initialize device memory
		Init_Cuda<float>(SM, SN, width, width, SINGLE_PRECISION);
	}
	else
	{

		DM = GenMatrix<double>(width, width);
		//PrintMatrix(M, width, width);
		DN = GenMatrix<double>(width, width);
		//PrintMatrix(N, width, width);
		DKP = GenMatrix<double>(width, width);

		DCP = GenMatrix<double>(width, width);

		//initialize device memory
		Init_Cuda<double>(DM, DN, width, width, DOUBLE_PRECISION);
	}


    //create cudaEvent start and stop to record elapsed time
	hipEventCreate(&start);
	hipEventCreate(&stop);

	//record start time to start event
	hipEventRecord(start, 0);

	//launch kernel
	if(sp==SINGLE_PRECISION)
	{
		MatrixAddKernel<float><<<grid, block>>>(SPd, SMd, SNd, width);
	}
	else
	{
		MatrixAddKernel<double><<<grid, block>>>(DPd, DMd, DNd, width);
	}

	//record start time to stop event
	hipEventRecord(stop, 0);
	//synchronize the stop event
	hipEventSynchronize(stop);
	//calculate the elapsed time
	hipEventElapsedTime(&elapsedTime, start, stop);

	//destroy the start and stop event
	hipEventDestroy(start);
	hipEventDestroy(stop);

	//copy data from device memory to host memory
	if(sp==SINGLE_PRECISION)
		hipMemcpy(SKP, SPd, width*width*sizeof(float), hipMemcpyDeviceToHost);
	else
		hipMemcpy(DKP, DPd, width*width*sizeof(double), hipMemcpyDeviceToHost);
	//PrintMatrix(P, width, width);

	//print runtime
	printf("[ %s ][ %4dx%4d ][ %10d blocks ][ %5d threads ]\t>\t[ %7.3f (ms) ]\n", ((sp==SINGLE_PRECISION)?"Single Precision":"Double Precision"), width, width, grid.x, block.x, elapsedTime);

#if (CHECK==1)
	if(sp==SINGLE_PRECISION)
	{
		/*printf("M >>>>>>>>>>>>>>>>>>>>>>>>>>\n");
		PrintMatrix<float>(SM, width, width);
		printf("N >>>>>>>>>>>>>>>>>>>>>>>>>>\n");
		PrintMatrix<float>(SN, width, width);
		printf("KP >>>>>>>>>>>>>>>>>>>>>>>>>>\n");
		PrintMatrix<float>(SKP, width, width);
		*/
		MatrixAdd<float>(SCP, SM, SN, width);
		//printf("CP >>>>>>>>>>>>>>>>>>>>>>>>>>\n");
		//PrintMatrix<float>(CP, width, width);

		if(Check<float>(SKP, SCP, width))
			printf("We do it.\n");
		else
			printf("Something is wrong.\n");

	}
	else
	{
		/*printf("M >>>>>>>>>>>>>>>>>>>>>>>>>>\n");
		PrintMatrix<double>(DM, width, width);
		printf("N >>>>>>>>>>>>>>>>>>>>>>>>>>\n");
		PrintMatrix<double>(DN, width, width);
		printf("KP >>>>>>>>>>>>>>>>>>>>>>>>>>\n");
		PrintMatrix<double>(DKP, width, width);
		*/
		MatrixAdd<double>(DCP, DM, DN, width);
		//printf("CP >>>>>>>>>>>>>>>>>>>>>>>>>>\n");
		//PrintMatrix<double>(DCP, width, width);

		if(Check<double>(DKP, DCP, width))
			printf("We do it.\n");
		else
			printf("Something is wrong.\n");

	}
#endif
	//free host memory
	if(sp==SINGLE_PRECISION)
	{
		free(SM);
		free(SN);
		free(SKP);
		free(SCP);
	//free device memory
		Free_Cuda(sp);
	}
	else
	{
		free(DM);
		free(DN);
		free(DKP);
		free(DCP);
		//free device memory
		Free_Cuda(sp);
	}
	return 0;
}

	.text
	.file	"addm_s_d.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z9Free_Cudab                   # -- Begin function _Z9Free_Cudab
	.type	_Z9Free_Cudab,@function
_Z9Free_Cudab:                          # @_Z9Free_Cudab
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	pushq	%rax
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	movl	$SMd, %eax
	movl	$DMd, %ecx
	testl	%edi, %edi
	cmovneq	%rax, %rcx
	movq	(%rcx), %rdi
	movl	$SNd, %eax
	movl	$DNd, %ebx
	cmovneq	%rax, %rbx
	movl	$SPd, %eax
	movl	$DPd, %r14d
	cmovneq	%rax, %r14
	callq	hipFree
	movq	(%rbx), %rdi
	callq	hipFree
	movq	(%r14), %rdi
	addq	$8, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	jmp	hipFree                         # TAILCALL
.Lfunc_end0:
	.size	_Z9Free_Cudab, .Lfunc_end0-_Z9Free_Cudab
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %r12
	cmpl	$5, %edi
	jne	.LBB1_10
# %bb.1:
	movq	8(%r12), %rdi
	callq	atoi
	movl	%eax, %ebx
	movq	32(%r12), %rdi
	callq	atoi
	movl	%eax, %r14d
	movl	%eax, %r13d
	btsq	$32, %r13
	movl	%ebx, %ebp
	imull	%ebx, %ebp
	movq	24(%r12), %rdi
	callq	atoi
	movl	%eax, %ecx
	movl	%ebp, 12(%rsp)                  # 4-byte Spill
	movl	%ebp, %eax
	xorl	%edx, %edx
	divl	%ecx
                                        # kill: def $eax killed $eax def $rax
	addl	%r14d, %eax
	decl	%eax
	xorl	%edx, %edx
	movq	%r14, 72(%rsp)                  # 8-byte Spill
	divl	%r14d
	movl	%eax, %r15d
	movq	%r15, 64(%rsp)                  # 8-byte Spill
	btsq	$32, %r15
	movq	16(%r12), %rdi
	callq	atoi
	movl	%eax, %r12d
	movl	%ebx, %edi
	movl	%ebx, %esi
	testl	%eax, %eax
	je	.LBB1_3
# %bb.2:
	callq	_Z9GenMatrixIfEPT_jj
	movq	%rax, %r14
	movl	%ebx, %edi
	movl	%ebx, %esi
	callq	_Z9GenMatrixIfEPT_jj
	movq	%rax, %rbp
	movl	%ebx, %edi
	movl	%ebx, %esi
	callq	_Z9GenMatrixIfEPT_jj
	movq	%rax, 32(%rsp)                  # 8-byte Spill
	movl	%ebx, %edi
	movl	%ebx, %esi
	callq	_Z9GenMatrixIfEPT_jj
	movq	%rax, 24(%rsp)                  # 8-byte Spill
	movq	%r14, 48(%rsp)                  # 8-byte Spill
	movq	%r14, %rdi
	movq	%rbp, 40(%rsp)                  # 8-byte Spill
	movq	%rbp, %rsi
	movl	%ebx, %edx
	movl	%ebx, %ecx
	movl	$1, %r8d
	callq	_Z9Init_CudaIfEvPT_S1_jjb
	jmp	.LBB1_4
.LBB1_3:
	callq	_Z9GenMatrixIdEPT_jj
	movq	%rax, %r14
	movl	%ebx, %edi
	movl	%ebx, %esi
	callq	_Z9GenMatrixIdEPT_jj
	movq	%rax, %rbp
	movl	%ebx, %edi
	movl	%ebx, %esi
	callq	_Z9GenMatrixIdEPT_jj
	movq	%rax, 32(%rsp)                  # 8-byte Spill
	movl	%ebx, %edi
	movl	%ebx, %esi
	callq	_Z9GenMatrixIdEPT_jj
	movq	%rax, 24(%rsp)                  # 8-byte Spill
	movq	%r14, 48(%rsp)                  # 8-byte Spill
	movq	%r14, %rdi
	movq	%rbp, 40(%rsp)                  # 8-byte Spill
	movq	%rbp, %rsi
	movl	%ebx, %edx
	movl	%ebx, %ecx
	xorl	%r8d, %r8d
	callq	_Z9Init_CudaIdEvPT_S1_jjb
.LBB1_4:
	leaq	56(%rsp), %r14
	movq	%r14, %rdi
	callq	hipEventCreate
	movq	%rsp, %rdi
	callq	hipEventCreate
	movq	(%r14), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	%r15, %rdi
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%r12d, %r12d
	je	.LBB1_7
# %bb.5:
	movl	$SPd, %ecx
	movq	%rcx, 16(%rsp)                  # 8-byte Spill
	movl	$2, %r13d
	movl	$.L.str.7, %ebp
	testl	%eax, %eax
	jne	.LBB1_9
# %bb.6:
	movq	SPd(%rip), %rdi
	movq	SMd(%rip), %rsi
	movq	SNd(%rip), %rdx
	movl	%ebx, %ecx
	callq	_Z30__device_stub__MatrixAddKernelIfEvPT_PKS0_S3_j
	jmp	.LBB1_9
.LBB1_7:
	movl	$DPd, %ecx
	movq	%rcx, 16(%rsp)                  # 8-byte Spill
	movl	$3, %r13d
	movl	$.L.str.8, %ebp
	testl	%eax, %eax
	jne	.LBB1_9
# %bb.8:
	movq	DPd(%rip), %rdi
	movq	DMd(%rip), %rsi
	movq	DNd(%rip), %rdx
	movl	%ebx, %ecx
	callq	_Z30__device_stub__MatrixAddKernelIdEvPT_PKS0_S3_j
.LBB1_9:
	xorl	%r15d, %r15d
	testl	%r12d, %r12d
	setne	%r15b
	movq	(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	(%rsp), %rdi
	callq	hipEventSynchronize
	movq	56(%rsp), %rsi
	movq	(%rsp), %rdx
	leaq	84(%rsp), %r14
	movq	%r14, %rdi
	callq	hipEventElapsedTime
	movq	56(%rsp), %rdi
	callq	hipEventDestroy
	movq	(%rsp), %rdi
	callq	hipEventDestroy
	movl	12(%rsp), %edx                  # 4-byte Reload
	movq	16(%rsp), %rax                  # 8-byte Reload
	movq	(%rax), %rsi
	movl	%r13d, %ecx
	shlq	%cl, %rdx
	movq	32(%rsp), %r12                  # 8-byte Reload
	movq	%r12, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	cvtss2sd	(%r14), %xmm0
	movl	$.L.str.6, %edi
	movq	%rbp, %rsi
	movl	%ebx, %edx
	movl	%ebx, %ecx
	movq	64(%rsp), %r8                   # 8-byte Reload
                                        # kill: def $r8d killed $r8d killed $r8
	movq	72(%rsp), %r9                   # 8-byte Reload
                                        # kill: def $r9d killed $r9d killed $r9
	movb	$1, %al
	callq	printf
	movq	48(%rsp), %rdi                  # 8-byte Reload
	callq	free
	movq	40(%rsp), %rdi                  # 8-byte Reload
	callq	free
	movq	%r12, %rdi
	callq	free
	movq	24(%rsp), %rdi                  # 8-byte Reload
	callq	free
	movl	%r15d, %edi
	callq	_Z9Free_Cudab
	xorl	%eax, %eax
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB1_10:
	.cfi_def_cfa_offset 144
	movl	$.Lstr, %edi
	callq	puts@PLT
	movq	(%r12), %rsi
	movl	$.L.str.1, %edi
	movl	$.L.str.2, %edx
	movl	$.L.str.3, %ecx
	movl	$.L.str.4, %r8d
	movl	$.L.str.5, %r9d
	xorl	%eax, %eax
	callq	printf
	movl	$1, %edi
	callq	exit
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z9GenMatrixIfEPT_jj
.LCPI2_0:
	.quad	0x41dfffffffc00000              # double 2147483647
	.section	.text._Z9GenMatrixIfEPT_jj,"axG",@progbits,_Z9GenMatrixIfEPT_jj,comdat
	.weak	_Z9GenMatrixIfEPT_jj
	.type	_Z9GenMatrixIfEPT_jj,@function
_Z9GenMatrixIfEPT_jj:                   # @_Z9GenMatrixIfEPT_jj
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%esi, %ebx
	movl	%edi, %ebp
	movl	%esi, %edi
	imull	%ebp, %edi
	shlq	$3, %rdi
	callq	malloc
	movq	%rax, %r14
	movl	%ebx, 12(%rsp)                  # 4-byte Spill
	testl	%ebx, %ebx
	je	.LBB2_6
# %bb.1:                                # %.preheader.lr.ph
	movl	%ebp, %eax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	xorl	%ebx, %ebx
	xorl	%r13d, %r13d
.LBB2_2:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_4 Depth 2
	testl	%ebp, %ebp
	je	.LBB2_5
# %bb.3:                                # %.lr.ph
                                        #   in Loop: Header=BB2_2 Depth=1
	movq	16(%rsp), %r15                  # 8-byte Reload
	movl	%ebx, %r12d
.LBB2_4:                                #   Parent Loop BB2_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	callq	rand
	movsd	.LCPI2_0(%rip), %xmm1           # xmm1 = mem[0],zero
	xorps	%xmm0, %xmm0
	cvtsi2sd	%eax, %xmm0
	divsd	%xmm1, %xmm0
	cvtsd2ss	%xmm0, %xmm0
	movl	%r12d, %eax
	movss	%xmm0, (%r14,%rax,4)
	incl	%r12d
	decq	%r15
	jne	.LBB2_4
.LBB2_5:                                # %._crit_edge
                                        #   in Loop: Header=BB2_2 Depth=1
	incl	%r13d
	addl	%ebp, %ebx
	cmpl	12(%rsp), %r13d                 # 4-byte Folded Reload
	jne	.LBB2_2
.LBB2_6:                                # %._crit_edge17
	movq	%r14, %rax
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z9GenMatrixIfEPT_jj, .Lfunc_end2-_Z9GenMatrixIfEPT_jj
	.cfi_endproc
                                        # -- End function
	.section	.text._Z9Init_CudaIfEvPT_S1_jjb,"axG",@progbits,_Z9Init_CudaIfEvPT_S1_jjb,comdat
	.weak	_Z9Init_CudaIfEvPT_S1_jjb       # -- Begin function _Z9Init_CudaIfEvPT_S1_jjb
	.type	_Z9Init_CudaIfEvPT_S1_jjb,@function
_Z9Init_CudaIfEvPT_S1_jjb:              # @_Z9Init_CudaIfEvPT_S1_jjb
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%edx, %ebx
	movq	%rsi, %r14
	movq	%rdi, %r12
	imull	%ecx, %ebx
	shll	$2, %ebx
	movl	$SMd, %eax
	movl	$DMd, %r13d
	testl	%r8d, %r8d
	cmovneq	%rax, %r13
	movl	$SNd, %eax
	movl	$DNd, %ebp
	cmovneq	%rax, %rbp
	movl	$SPd, %eax
	movl	$DPd, %r15d
	cmovneq	%rax, %r15
	movq	%r13, %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	(%r13), %rdi
	movq	%r12, %rsi
	movq	%rbx, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	%rbp, %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	(%rbp), %rdi
	movq	%r14, %rsi
	movq	%rbx, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	%r15, %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	(%r15), %rdi
	xorl	%esi, %esi
	movq	%rbx, %rdx
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	hipMemset                       # TAILCALL
.Lfunc_end3:
	.size	_Z9Init_CudaIfEvPT_S1_jjb, .Lfunc_end3-_Z9Init_CudaIfEvPT_S1_jjb
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z9GenMatrixIdEPT_jj
.LCPI4_0:
	.quad	0x41dfffffffc00000              # double 2147483647
	.section	.text._Z9GenMatrixIdEPT_jj,"axG",@progbits,_Z9GenMatrixIdEPT_jj,comdat
	.weak	_Z9GenMatrixIdEPT_jj
	.type	_Z9GenMatrixIdEPT_jj,@function
_Z9GenMatrixIdEPT_jj:                   # @_Z9GenMatrixIdEPT_jj
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%esi, %ebx
	movl	%edi, %ebp
	movl	%esi, %edi
	imull	%ebp, %edi
	shlq	$3, %rdi
	callq	malloc
	movq	%rax, %r14
	movl	%ebx, 12(%rsp)                  # 4-byte Spill
	testl	%ebx, %ebx
	je	.LBB4_6
# %bb.1:                                # %.preheader.lr.ph
	movl	%ebp, %eax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	xorl	%ebx, %ebx
	xorl	%r13d, %r13d
.LBB4_2:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB4_4 Depth 2
	testl	%ebp, %ebp
	je	.LBB4_5
# %bb.3:                                # %.lr.ph
                                        #   in Loop: Header=BB4_2 Depth=1
	movq	16(%rsp), %r15                  # 8-byte Reload
	movl	%ebx, %r12d
.LBB4_4:                                #   Parent Loop BB4_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	callq	rand
	movsd	.LCPI4_0(%rip), %xmm1           # xmm1 = mem[0],zero
	xorps	%xmm0, %xmm0
	cvtsi2sd	%eax, %xmm0
	divsd	%xmm1, %xmm0
	movl	%r12d, %eax
	movsd	%xmm0, (%r14,%rax,8)
	incl	%r12d
	decq	%r15
	jne	.LBB4_4
.LBB4_5:                                # %._crit_edge
                                        #   in Loop: Header=BB4_2 Depth=1
	incl	%r13d
	addl	%ebp, %ebx
	cmpl	12(%rsp), %r13d                 # 4-byte Folded Reload
	jne	.LBB4_2
.LBB4_6:                                # %._crit_edge17
	movq	%r14, %rax
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z9GenMatrixIdEPT_jj, .Lfunc_end4-_Z9GenMatrixIdEPT_jj
	.cfi_endproc
                                        # -- End function
	.section	.text._Z9Init_CudaIdEvPT_S1_jjb,"axG",@progbits,_Z9Init_CudaIdEvPT_S1_jjb,comdat
	.weak	_Z9Init_CudaIdEvPT_S1_jjb       # -- Begin function _Z9Init_CudaIdEvPT_S1_jjb
	.type	_Z9Init_CudaIdEvPT_S1_jjb,@function
_Z9Init_CudaIdEvPT_S1_jjb:              # @_Z9Init_CudaIdEvPT_S1_jjb
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%edx, %ebx
	movq	%rsi, %r14
	movq	%rdi, %r12
	imull	%ecx, %ebx
	shll	$3, %ebx
	movl	$SMd, %eax
	movl	$DMd, %r13d
	testl	%r8d, %r8d
	cmovneq	%rax, %r13
	movl	$SNd, %eax
	movl	$DNd, %ebp
	cmovneq	%rax, %rbp
	movl	$SPd, %eax
	movl	$DPd, %r15d
	cmovneq	%rax, %r15
	movq	%r13, %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	(%r13), %rdi
	movq	%r12, %rsi
	movq	%rbx, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	%rbp, %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	(%rbp), %rdi
	movq	%r14, %rsi
	movq	%rbx, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	%r15, %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	(%r15), %rdi
	xorl	%esi, %esi
	movq	%rbx, %rdx
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	hipMemset                       # TAILCALL
.Lfunc_end5:
	.size	_Z9Init_CudaIdEvPT_S1_jjb, .Lfunc_end5-_Z9Init_CudaIdEvPT_S1_jjb
	.cfi_endproc
                                        # -- End function
	.section	.text._Z30__device_stub__MatrixAddKernelIfEvPT_PKS0_S3_j,"axG",@progbits,_Z30__device_stub__MatrixAddKernelIfEvPT_PKS0_S3_j,comdat
	.weak	_Z30__device_stub__MatrixAddKernelIfEvPT_PKS0_S3_j # -- Begin function _Z30__device_stub__MatrixAddKernelIfEvPT_PKS0_S3_j
	.type	_Z30__device_stub__MatrixAddKernelIfEvPT_PKS0_S3_j,@function
_Z30__device_stub__MatrixAddKernelIfEvPT_PKS0_S3_j: # @_Z30__device_stub__MatrixAddKernelIfEvPT_PKS0_S3_j
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z15MatrixAddKernelIfEvPT_PKS0_S3_j, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	_Z30__device_stub__MatrixAddKernelIfEvPT_PKS0_S3_j, .Lfunc_end6-_Z30__device_stub__MatrixAddKernelIfEvPT_PKS0_S3_j
	.cfi_endproc
                                        # -- End function
	.section	.text._Z30__device_stub__MatrixAddKernelIdEvPT_PKS0_S3_j,"axG",@progbits,_Z30__device_stub__MatrixAddKernelIdEvPT_PKS0_S3_j,comdat
	.weak	_Z30__device_stub__MatrixAddKernelIdEvPT_PKS0_S3_j # -- Begin function _Z30__device_stub__MatrixAddKernelIdEvPT_PKS0_S3_j
	.type	_Z30__device_stub__MatrixAddKernelIdEvPT_PKS0_S3_j,@function
_Z30__device_stub__MatrixAddKernelIdEvPT_PKS0_S3_j: # @_Z30__device_stub__MatrixAddKernelIdEvPT_PKS0_S3_j
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z15MatrixAddKernelIdEvPT_PKS0_S3_j, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end7:
	.size	_Z30__device_stub__MatrixAddKernelIdEvPT_PKS0_S3_j, .Lfunc_end7-_Z30__device_stub__MatrixAddKernelIdEvPT_PKS0_S3_j
	.cfi_endproc
                                        # -- End function
	.text
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB8_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB8_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z15MatrixAddKernelIfEvPT_PKS0_S3_j, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z15MatrixAddKernelIdEvPT_PKS0_S3_j, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end8:
	.size	__hip_module_ctor, .Lfunc_end8-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB9_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB9_2:
	retq
.Lfunc_end9:
	.size	__hip_module_dtor, .Lfunc_end9-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	SMd,@object                     # @SMd
	.bss
	.globl	SMd
	.p2align	3, 0x0
SMd:
	.quad	0
	.size	SMd, 8

	.type	SNd,@object                     # @SNd
	.globl	SNd
	.p2align	3, 0x0
SNd:
	.quad	0
	.size	SNd, 8

	.type	SPd,@object                     # @SPd
	.globl	SPd
	.p2align	3, 0x0
SPd:
	.quad	0
	.size	SPd, 8

	.type	DMd,@object                     # @DMd
	.globl	DMd
	.p2align	3, 0x0
DMd:
	.quad	0
	.size	DMd, 8

	.type	DNd,@object                     # @DNd
	.globl	DNd
	.p2align	3, 0x0
DNd:
	.quad	0
	.size	DNd, 8

	.type	DPd,@object                     # @DPd
	.globl	DPd
	.p2align	3, 0x0
DPd:
	.quad	0
	.size	DPd, 8

	.type	.L.str.1,@object                # @.str.1
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.1:
	.asciz	" Usage: %s %s %s %s %s"
	.size	.L.str.1, 23

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"[matrix_size]"
	.size	.L.str.2, 14

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"[single|double]"
	.size	.L.str.3, 16

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"[divide_val]"
	.size	.L.str.4, 13

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"[num_threads]\n"
	.size	.L.str.5, 15

	.type	_Z15MatrixAddKernelIfEvPT_PKS0_S3_j,@object # @_Z15MatrixAddKernelIfEvPT_PKS0_S3_j
	.section	.rodata._Z15MatrixAddKernelIfEvPT_PKS0_S3_j,"aG",@progbits,_Z15MatrixAddKernelIfEvPT_PKS0_S3_j,comdat
	.weak	_Z15MatrixAddKernelIfEvPT_PKS0_S3_j
	.p2align	3, 0x0
_Z15MatrixAddKernelIfEvPT_PKS0_S3_j:
	.quad	_Z30__device_stub__MatrixAddKernelIfEvPT_PKS0_S3_j
	.size	_Z15MatrixAddKernelIfEvPT_PKS0_S3_j, 8

	.type	_Z15MatrixAddKernelIdEvPT_PKS0_S3_j,@object # @_Z15MatrixAddKernelIdEvPT_PKS0_S3_j
	.section	.rodata._Z15MatrixAddKernelIdEvPT_PKS0_S3_j,"aG",@progbits,_Z15MatrixAddKernelIdEvPT_PKS0_S3_j,comdat
	.weak	_Z15MatrixAddKernelIdEvPT_PKS0_S3_j
	.p2align	3, 0x0
_Z15MatrixAddKernelIdEvPT_PKS0_S3_j:
	.quad	_Z30__device_stub__MatrixAddKernelIdEvPT_PKS0_S3_j
	.size	_Z15MatrixAddKernelIdEvPT_PKS0_S3_j, 8

	.type	.L.str.6,@object                # @.str.6
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.6:
	.asciz	"[ %s ][ %4dx%4d ][ %10d blocks ][ %5d threads ]\t>\t[ %7.3f (ms) ]\n"
	.size	.L.str.6, 66

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"Single Precision"
	.size	.L.str.7, 17

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"Double Precision"
	.size	.L.str.8, 17

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z15MatrixAddKernelIfEvPT_PKS0_S3_j"
	.size	.L__unnamed_1, 36

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z15MatrixAddKernelIdEvPT_PKS0_S3_j"
	.size	.L__unnamed_2, 36

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"Wrong parameters. Please use the following format for running."
	.size	.Lstr, 63

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z30__device_stub__MatrixAddKernelIfEvPT_PKS0_S3_j
	.addrsig_sym _Z30__device_stub__MatrixAddKernelIdEvPT_PKS0_S3_j
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym SMd
	.addrsig_sym SNd
	.addrsig_sym SPd
	.addrsig_sym DMd
	.addrsig_sym DNd
	.addrsig_sym DPd
	.addrsig_sym _Z15MatrixAddKernelIfEvPT_PKS0_S3_j
	.addrsig_sym _Z15MatrixAddKernelIdEvPT_PKS0_S3_j
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.section	.text._Z15MatrixAddKernelIfEvPT_PKS0_S3_j,"axG",@progbits,_Z15MatrixAddKernelIfEvPT_PKS0_S3_j,comdat
	.protected	_Z15MatrixAddKernelIfEvPT_PKS0_S3_j ; -- Begin function _Z15MatrixAddKernelIfEvPT_PKS0_S3_j
	.globl	_Z15MatrixAddKernelIfEvPT_PKS0_S3_j
	.p2align	8
	.type	_Z15MatrixAddKernelIfEvPT_PKS0_S3_j,@function
_Z15MatrixAddKernelIfEvPT_PKS0_S3_j:    ; @_Z15MatrixAddKernelIfEvPT_PKS0_S3_j
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x2c
	s_load_b32 s8, s[0:1], 0x18
	s_add_u32 s2, s0, 32
	s_addc_u32 s3, s1, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s9, s4, 0xffff
	s_mul_i32 s8, s8, s8
	v_mad_u64_u32 v[1:2], null, s15, s9, v[0:1]
	s_mov_b32 s4, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s8, v1
	s_cbranch_execz .LBB0_3
; %bb.1:                                ; %.lr.ph
	s_load_b32 s10, s[2:3], 0x0
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[2:3], s[0:1], 0x10
	v_mov_b32_e32 v2, 0
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s1, s10, s9
	s_mov_b32 s9, 0
.LBB0_2:                                ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[3:4], 2, v[1:2]
	v_add_nc_u32_e32 v1, s1, v1
	v_add_co_u32 v5, vcc_lo, s6, v3
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v6, vcc_lo, s7, v4, vcc_lo
	v_add_co_u32 v7, vcc_lo, s2, v3
	v_add_co_ci_u32_e32 v8, vcc_lo, s3, v4, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s8, v1
	global_load_b32 v0, v[5:6], off
	global_load_b32 v5, v[7:8], off
	v_add_co_u32 v3, s0, s4, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s0, s5, v4, s0
	s_or_b32 s9, vcc_lo, s9
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v0, v0, v5
	global_store_b32 v[3:4], v0, off
	s_and_not1_b32 exec_lo, exec_lo, s9
	s_cbranch_execnz .LBB0_2
.LBB0_3:                                ; %._crit_edge
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z15MatrixAddKernelIfEvPT_PKS0_S3_j
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z15MatrixAddKernelIfEvPT_PKS0_S3_j,"axG",@progbits,_Z15MatrixAddKernelIfEvPT_PKS0_S3_j,comdat
.Lfunc_end0:
	.size	_Z15MatrixAddKernelIfEvPT_PKS0_S3_j, .Lfunc_end0-_Z15MatrixAddKernelIfEvPT_PKS0_S3_j
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 240
; NumSgprs: 18
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z15MatrixAddKernelIdEvPT_PKS0_S3_j,"axG",@progbits,_Z15MatrixAddKernelIdEvPT_PKS0_S3_j,comdat
	.protected	_Z15MatrixAddKernelIdEvPT_PKS0_S3_j ; -- Begin function _Z15MatrixAddKernelIdEvPT_PKS0_S3_j
	.globl	_Z15MatrixAddKernelIdEvPT_PKS0_S3_j
	.p2align	8
	.type	_Z15MatrixAddKernelIdEvPT_PKS0_S3_j,@function
_Z15MatrixAddKernelIdEvPT_PKS0_S3_j:    ; @_Z15MatrixAddKernelIdEvPT_PKS0_S3_j
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x2c
	s_load_b32 s8, s[0:1], 0x18
	s_add_u32 s2, s0, 32
	s_addc_u32 s3, s1, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s9, s4, 0xffff
	s_mul_i32 s8, s8, s8
	v_mad_u64_u32 v[1:2], null, s15, s9, v[0:1]
	s_mov_b32 s4, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s8, v1
	s_cbranch_execz .LBB1_3
; %bb.1:                                ; %.lr.ph
	s_load_b32 s10, s[2:3], 0x0
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[2:3], s[0:1], 0x10
	v_mov_b32_e32 v2, 0
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s1, s10, s9
	s_mov_b32 s9, 0
.LBB1_2:                                ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[3:4], 3, v[1:2]
	v_add_nc_u32_e32 v1, s1, v1
	v_add_co_u32 v5, vcc_lo, s6, v3
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v6, vcc_lo, s7, v4, vcc_lo
	v_add_co_u32 v7, vcc_lo, s2, v3
	v_add_co_ci_u32_e32 v8, vcc_lo, s3, v4, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s8, v1
	global_load_b64 v[5:6], v[5:6], off
	global_load_b64 v[7:8], v[7:8], off
	v_add_co_u32 v3, s0, s4, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s0, s5, v4, s0
	s_or_b32 s9, vcc_lo, s9
	s_waitcnt vmcnt(0)
	v_add_f64 v[5:6], v[5:6], v[7:8]
	global_store_b64 v[3:4], v[5:6], off
	s_and_not1_b32 exec_lo, exec_lo, s9
	s_cbranch_execnz .LBB1_2
.LBB1_3:                                ; %._crit_edge
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z15MatrixAddKernelIdEvPT_PKS0_S3_j
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z15MatrixAddKernelIdEvPT_PKS0_S3_j,"axG",@progbits,_Z15MatrixAddKernelIdEvPT_PKS0_S3_j,comdat
.Lfunc_end1:
	.size	_Z15MatrixAddKernelIdEvPT_PKS0_S3_j, .Lfunc_end1-_Z15MatrixAddKernelIdEvPT_PKS0_S3_j
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 244
; NumSgprs: 18
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z15MatrixAddKernelIfEvPT_PKS0_S3_j
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z15MatrixAddKernelIfEvPT_PKS0_S3_j.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     9
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z15MatrixAddKernelIdEvPT_PKS0_S3_j
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z15MatrixAddKernelIdEvPT_PKS0_S3_j.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     9
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
