/*
Below code is based on
https://github.com/NVIDIA-developer-blog/code-samples/tree/master/series/cuda-cpp/transpose.
nvcc transpose_any.cu  -o transpose_any
*/
#include <assert.h>
#include <math.h>
#include <stdio.h>
#define DEBUG
// Convenience function for checking CUDA runtime API results
// can be wrapped around any runtime API call. No-op in release builds.
inline cudaError_t checkCuda(cudaError_t result) {
#if defined(DEBUG) || defined(_DEBUG)
  if (result != cudaSuccess) {
    fprintf(stderr, "CUDA Runtime Error: %s\n", cudaGetErrorString(result));
    assert(result == cudaSuccess);
  }
#endif

  return result;
}

const int nx = 2;
const int ny = 2;
const int TILE_DIM = 16;
const int BLOCK_ROWS = TILE_DIM;  // 8;
const int NUM_REPS = 100;

// Check errors and print GB/s
void postprocess(const float* ref, const float* res, int n, float ms) {
  bool passed = true;
  printf("\nref   res\n");
#if 1
  for (int i = 0; i < n; i++) {
    if (res[i] != ref[i]) {
      printf(" Failed: %d %f %f\n", i, ref[i], res[i]);
      // printf("%25s\n", "*** FAILED ***");
      passed = false;
      // break;
    } else {
      printf(" Passed: %d %f %f\n", i, ref[i], res[i]);
    }
  }
#endif
#if 0
  for (int i = 0; i < n; i++) {
    if (res[i] != ref[i]) {
      passed = false;
      printf("%25s\n", "*** FAILED ***");
      break;
    }
  }
#endif

  if (passed)
    printf("%20.2f\n", 2 * n * sizeof(float) * 1e-6 * NUM_REPS / ms);
}

// Naive transpose
// Simplest transpose; doesn't use shared memory.
// Global memory reads are coalesced but writes are not.
__global__ void transposeNaiveRectangle(float* odata, const float* idata) {
  int x = blockIdx.x * TILE_DIM + threadIdx.x;
  int y = blockIdx.y * TILE_DIM + threadIdx.y;
  int width = nx;   // gridDim.x * TILE_DIM;
  int height = ny;  // gridDim.y * TILE_DIM;
  if ((x < nx) && (y < ny)) {
    odata[y + (x)*height] = idata[(x) + width * y];
  }
}

int sizeX = nx / TILE_DIM;
int sizeY = ny / TILE_DIM;
int remainderX = nx % TILE_DIM;
int remainderY = ny % TILE_DIM;

// Shared
__global__ void transposeCoalescedRectangle(float* odata, const float* idata) {
  __shared__ float tile[TILE_DIM][TILE_DIM];

  int x = blockIdx.x * TILE_DIM + threadIdx.x;
  int y = blockIdx.y * TILE_DIM + threadIdx.y;
  int width = nx;   // gridDim.x * TILE_DIM;
  int height = ny;  // gridDim.y * TILE_DIM;

  for (int j = 0; j < TILE_DIM; j += BLOCK_ROWS) {
    if ((x < nx) && ((y + j) < ny)) {
      tile[threadIdx.y + j][threadIdx.x] = idata[(y + j) * width + x];
    }
  }
  __syncthreads();

  x = blockIdx.y * TILE_DIM + threadIdx.x;  // transpose block offset
  y = blockIdx.x * TILE_DIM + threadIdx.y;

  for (int j = 0; j < TILE_DIM; j += BLOCK_ROWS) {
    if ((x < ny) && ((y + j) < nx)) {
      odata[(y + j) * height + x] = tile[threadIdx.x][threadIdx.y + j];
    }
  }
}

__global__ void transposeNoBankConflictsRectangle(float* odata,
                                                  const float* idata) {
  __shared__ float tile[TILE_DIM][TILE_DIM + 1];

  int x = blockIdx.x * TILE_DIM + threadIdx.x;
  int y = blockIdx.y * TILE_DIM + threadIdx.y;
  int width = nx;   // gridDim.x * TILE_DIM;
  int height = ny;  // gridDim.y * TILE_DIM;

  for (int j = 0; j < TILE_DIM; j += BLOCK_ROWS) {
    if ((x < nx) && ((y + j) < ny)) {
      tile[threadIdx.y + j][threadIdx.x] = idata[(y + j) * width + x];
    }
  }
  __syncthreads();

  x = blockIdx.y * TILE_DIM + threadIdx.x;  // transpose block offset
  y = blockIdx.x * TILE_DIM + threadIdx.y;

  for (int j = 0; j < TILE_DIM; j += BLOCK_ROWS) {
    if ((x < ny) && ((y + j) < nx)) {
      odata[(y + j) * height + x] = tile[threadIdx.x][threadIdx.y + j];
    }
  }
}

int main(int argc, char** argv) {
  const int mem_size = nx * ny * sizeof(float);

  dim3 dimGrid((int)ceil((float)nx / (float)TILE_DIM),
               (int)ceil((float)ny / (float)TILE_DIM), 1);
  dim3 dimBlock(TILE_DIM, TILE_DIM, 1);

  int devId = 0;
  if (argc > 1)
    devId = atoi(argv[1]);

  cudaDeviceProp prop;
  checkCuda(cudaGetDeviceProperties(&prop, devId));
  printf("\nDevice : %s\n", prop.name);
  printf("%d.%d\n", prop.major, prop.minor);
  printf("maxGridSize= %d, %d\n", prop.maxGridSize[0], prop.maxGridSize[1]);
  printf("Matrix size: %d %d, Block size: %d %d, Tile size: %d %d\n", nx, ny,
         TILE_DIM, BLOCK_ROWS, TILE_DIM, TILE_DIM);
  printf("dimGrid: %d %d %d. dimBlock: %d %d %d\n", dimGrid.x, dimGrid.y,
         dimGrid.z, dimBlock.x, dimBlock.y, dimBlock.z);

  printf("warp size: %d\n", prop.warpSize);
  printf("max threads per block: %d\n", prop.maxThreadsPerBlock);
  printf("max thread dim z:%d y:%d x:%d\n", prop.maxThreadsDim[0],
         prop.maxThreadsDim[1], prop.maxThreadsDim[2]);
  printf("max grid size z:%d y:%d x:%d\n", prop.maxGridSize[0],
         prop.maxGridSize[1], prop.maxGridSize[2]);
  printf("clock rate(KHz):\n", prop.clockRate);
  if (dimBlock.x * dimBlock.y * dimBlock.z > prop.maxThreadsPerBlock) {
    printf("Error! Block size is greater than maxThreadsPerBlock!\n");
  }

  checkCuda(cudaSetDevice(devId));

  float* h_idata = (float*)malloc(mem_size);
  float* h_cdata = (float*)malloc(mem_size);
  float* h_tdata = (float*)malloc(mem_size);
  float* gold = (float*)malloc(mem_size);

  float *d_idata, *d_cdata, *d_tdata;
  checkCuda(cudaMalloc(&d_idata, mem_size));
  checkCuda(cudaMalloc(&d_cdata, mem_size));
  checkCuda(cudaMalloc(&d_tdata, mem_size));

// check parameters and calculate execution configuration
#if 0
  if (nx % TILE_DIM || ny % TILE_DIM) {
    printf("nx and ny must be a multiple of TILE_DIM\n");
    goto error_exit;
  }

  if (TILE_DIM % BLOCK_ROWS) {
    printf("TILE_DIM must be a multiple of BLOCK_ROWS\n");
    goto error_exit;
  }
#endif

  // host
  for (int j = 0; j < ny; j++) {
    for (int i = 0; i < nx; i++) {
      h_idata[j * nx + i] = j * nx + i;
    }
  }
  printf("\n");
  for (int j = 0; j < 100; j++) {
    printf("%d ", (int)h_idata[j]);
  }
  // correct result for error checking
  for (int j = 0; j < ny; j++) {
    for (int i = 0; i < nx; i++) {
      gold[i * ny + j] = h_idata[j * nx + i];
    }
  }

  printf("\n");
  for (int j = 0; j < 100; j++) {
    printf("%d ", (int)gold[j]);
  }
  printf("\nmem_size=%d\n\n", mem_size);
  // device
  checkCuda(cudaMemcpy(d_idata, h_idata, mem_size, cudaMemcpyHostToDevice));

  // events for timing
  cudaEvent_t startEvent, stopEvent;
  checkCuda(cudaEventCreate(&startEvent));
  checkCuda(cudaEventCreate(&stopEvent));
  float ms;

  // ------------
  // time kernels
  // ------------

  printf("%35s%20s\n", "Routine", "Bandwidth (GB/s)");
#if 1
  {
    printf("%35s", "transposeNaiveRectangle ");
    printf("Matrix size: %d %d, Block size: %d %d, Tile size: %d %d\n", nx, ny,
           TILE_DIM, TILE_DIM, TILE_DIM, TILE_DIM);
    printf("dimGrid: %d %d %d. dimBlock: %d %d %d\n", dimGrid.x, dimGrid.y,
           dimGrid.z, dimBlock.x, dimBlock.y, dimBlock.z);
    // --------------
    // transposeNaiveRectangle
    // --------------
    checkCuda(cudaMemset(d_tdata, 0, mem_size));
    // warmup
    transposeNaiveRectangle<<<dimGrid, dimBlock>>>(d_tdata, d_idata);
    checkCuda(cudaEventRecord(startEvent, 0));
    for (int i = 0; i < NUM_REPS; i++)
      transposeNaiveRectangle<<<dimGrid, dimBlock>>>(d_tdata, d_idata);
    checkCuda(cudaEventRecord(stopEvent, 0));
    checkCuda(cudaEventSynchronize(stopEvent));
    checkCuda(cudaEventElapsedTime(&ms, startEvent, stopEvent));
    checkCuda(cudaMemcpy(h_tdata, d_tdata, mem_size, cudaMemcpyDeviceToHost));
    postprocess(gold, h_tdata, nx * ny, ms);
  }
#endif
#if 1
  {
    printf("%35s", "transposeCoalescedRectangle");
    // dim3 dimGrid(ceil(nx / TILE_DIM), ceil(ny / TILE_DIM), 1);
    dim3 dimGrid((int)ceil((float)nx / (float)TILE_DIM),
                 (int)ceil((float)ny / (float)TILE_DIM), 1);
    dim3 dimBlock(TILE_DIM, BLOCK_ROWS, 1);

    printf("Matrix size: %d %d, Block size: %d %d, Tile size: %d %d\n", nx, ny,
           TILE_DIM, BLOCK_ROWS, TILE_DIM, TILE_DIM);
    printf("dimGrid: %d %d %d. dimBlock: %d %d %d\n", dimGrid.x, dimGrid.y,
           dimGrid.z, dimBlock.x, dimBlock.y, dimBlock.z);

    // ------------------
    // transposeCoalescedRectangle
    // ------------------
    checkCuda(cudaMemset(d_tdata, 0, mem_size));
    // warmup
    transposeCoalescedRectangle<<<dimGrid, dimBlock>>>(d_tdata, d_idata);
    checkCuda(cudaEventRecord(startEvent, 0));
    for (int i = 0; i < NUM_REPS; i++)
      transposeCoalescedRectangle<<<dimGrid, dimBlock>>>(d_tdata, d_idata);
    checkCuda(cudaEventRecord(stopEvent, 0));
    checkCuda(cudaEventSynchronize(stopEvent));
    checkCuda(cudaEventElapsedTime(&ms, startEvent, stopEvent));
    checkCuda(cudaMemcpy(h_tdata, d_tdata, mem_size, cudaMemcpyDeviceToHost));
    postprocess(gold, h_tdata, nx * ny, ms);
  }
#endif
#if 1
  {
    printf("%35s", "transposeNobankConflictsRectangle");
    dim3 dimGrid((int)ceil((float)nx / (float)TILE_DIM),
                 (int)ceil((float)ny / (float)TILE_DIM), 1);
    dim3 dimBlock(TILE_DIM, BLOCK_ROWS, 1);

    printf("Matrix size: %d %d, Block size: %d %d, Tile size: %d %d\n", nx, ny,
           TILE_DIM, BLOCK_ROWS, TILE_DIM, TILE_DIM);
    printf("dimGrid: %d %d %d. dimBlock: %d %d %d\n", dimGrid.x, dimGrid.y,
           dimGrid.z, dimBlock.x, dimBlock.y, dimBlock.z);

    // ------------------
    // transposeNoBankConflictsRectangle
    // ------------------

    checkCuda(cudaMemset(d_tdata, 0, mem_size));
    // warmup
    transposeNoBankConflictsRectangle<<<dimGrid, dimBlock>>>(d_tdata, d_idata);
    checkCuda(cudaEventRecord(startEvent, 0));
    for (int i = 0; i < NUM_REPS; i++)
      transposeNoBankConflictsRectangle<<<dimGrid, dimBlock>>>(d_tdata,
                                                               d_idata);
    checkCuda(cudaEventRecord(stopEvent, 0));
    checkCuda(cudaEventSynchronize(stopEvent));
    checkCuda(cudaEventElapsedTime(&ms, startEvent, stopEvent));
    checkCuda(cudaMemcpy(h_tdata, d_tdata, mem_size, cudaMemcpyDeviceToHost));
    postprocess(gold, h_tdata, nx * ny, ms);
  }
#endif
error_exit:
  // cleanup
  checkCuda(cudaEventDestroy(startEvent));
  checkCuda(cudaEventDestroy(stopEvent));
  checkCuda(cudaFree(d_tdata));
  checkCuda(cudaFree(d_cdata));
  checkCuda(cudaFree(d_idata));
  free(h_idata);
  free(h_tdata);
  free(h_cdata);
  free(gold);
}

	.file	"tmpxft_001ff3d0_00000000-6_transpose_any.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2032:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2032:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"CUDA Runtime Error: %s\n"
	.text
	.type	_Z9checkCuda9cudaError.isra.0, @function
_Z9checkCuda9cudaError.isra.0:
.LFB2179:
	.cfi_startproc
	testl	%edi, %edi
	je	.L2
	pushq	%rax
	.cfi_def_cfa_offset 16
	call	cudaGetErrorString@PLT
	movq	stderr(%rip), %rdi
	movl	$2, %esi
	popq	%r8
	.cfi_def_cfa_offset 8
	movq	%rax, %rcx
	leaq	.LC0(%rip), %rdx
	xorl	%eax, %eax
	jmp	__fprintf_chk@PLT
.L2:
	ret
	.cfi_endproc
.LFE2179:
	.size	_Z9checkCuda9cudaError.isra.0, .-_Z9checkCuda9cudaError.isra.0
	.section	.rodata.str1.1
.LC1:
	.string	"\nref   res\n"
.LC2:
	.string	" Failed: %d %f %f\n"
.LC3:
	.string	" Passed: %d %f %f\n"
.LC6:
	.string	"%20.2f\n"
	.text
	.globl	_Z11postprocessPKfS0_if
	.type	_Z11postprocessPKfS0_if, @function
_Z11postprocessPKfS0_if:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	xorl	%eax, %eax
	movb	$1, %r15b
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	leaq	.LC2(%rip), %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rsi, %r13
	leaq	.LC1(%rip), %rsi
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rdi, %r12
	movl	$2, %edi
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	xorl	%ebp, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%edx, %ebx
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	movss	%xmm0, 12(%rsp)
	call	__printf_chk@PLT
.L9:
	movl	%ebp, %edx
	cmpl	%ebp, %ebx
	jle	.L19
	movss	0(%r13,%rbp,4), %xmm3
	movss	(%r12,%rbp,4), %xmm2
	ucomiss	%xmm2, %xmm3
	cvtss2sd	%xmm3, %xmm1
	cvtss2sd	%xmm2, %xmm0
	jp	.L17
	je	.L10
.L17:
	movq	%r14, %rsi
	movl	$2, %edi
	movb	$2, %al
	xorl	%r15d, %r15d
	call	__printf_chk@PLT
	jmp	.L12
.L10:
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	movb	$2, %al
	call	__printf_chk@PLT
.L12:
	incq	%rbp
	jmp	.L9
.L19:
	testb	%r15b, %r15b
	je	.L8
	addl	%ebx, %ebx
	movslq	%ebx, %rbx
	salq	$2, %rbx
	js	.L15
	cvtsi2sdq	%rbx, %xmm0
	jmp	.L16
.L15:
	shrq	%rbx
	cvtsi2sdq	%rbx, %xmm0
	addsd	%xmm0, %xmm0
.L16:
	mulsd	.LC4(%rip), %xmm0
	cvtss2sd	12(%rsp), %xmm1
	leaq	.LC6(%rip), %rsi
	movl	$2, %edi
	mulsd	.LC5(%rip), %xmm0
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	movb	$1, %al
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	divsd	%xmm1, %xmm0
	jmp	__printf_chk@PLT
.L8:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	_Z11postprocessPKfS0_if, .-_Z11postprocessPKfS0_if
	.globl	_Z46__device_stub__Z23transposeNaiveRectanglePfPKfPfPKf
	.type	_Z46__device_stub__Z23transposeNaiveRectanglePfPKfPfPKf, @function
_Z46__device_stub__Z23transposeNaiveRectanglePfPKfPfPKf:
.LFB2054:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L20
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z23transposeNaiveRectanglePfPKf(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L20:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L22
	call	__stack_chk_fail@PLT
.L22:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2054:
	.size	_Z46__device_stub__Z23transposeNaiveRectanglePfPKfPfPKf, .-_Z46__device_stub__Z23transposeNaiveRectanglePfPKfPfPKf
	.globl	_Z23transposeNaiveRectanglePfPKf
	.type	_Z23transposeNaiveRectanglePfPKf, @function
_Z23transposeNaiveRectanglePfPKf:
.LFB2055:
	.cfi_startproc
	endbr64
	jmp	_Z46__device_stub__Z23transposeNaiveRectanglePfPKfPfPKf
	.cfi_endproc
.LFE2055:
	.size	_Z23transposeNaiveRectanglePfPKf, .-_Z23transposeNaiveRectanglePfPKf
	.globl	_Z50__device_stub__Z27transposeCoalescedRectanglePfPKfPfPKf
	.type	_Z50__device_stub__Z27transposeCoalescedRectanglePfPKfPfPKf, @function
_Z50__device_stub__Z27transposeCoalescedRectanglePfPKfPfPKf:
.LFB2056:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L25
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z27transposeCoalescedRectanglePfPKf(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L25:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L27
	call	__stack_chk_fail@PLT
.L27:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2056:
	.size	_Z50__device_stub__Z27transposeCoalescedRectanglePfPKfPfPKf, .-_Z50__device_stub__Z27transposeCoalescedRectanglePfPKfPfPKf
	.globl	_Z27transposeCoalescedRectanglePfPKf
	.type	_Z27transposeCoalescedRectanglePfPKf, @function
_Z27transposeCoalescedRectanglePfPKf:
.LFB2057:
	.cfi_startproc
	endbr64
	jmp	_Z50__device_stub__Z27transposeCoalescedRectanglePfPKfPfPKf
	.cfi_endproc
.LFE2057:
	.size	_Z27transposeCoalescedRectanglePfPKf, .-_Z27transposeCoalescedRectanglePfPKf
	.globl	_Z56__device_stub__Z33transposeNoBankConflictsRectanglePfPKfPfPKf
	.type	_Z56__device_stub__Z33transposeNoBankConflictsRectanglePfPKfPfPKf, @function
_Z56__device_stub__Z33transposeNoBankConflictsRectanglePfPKfPfPKf:
.LFB2058:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L30
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z33transposeNoBankConflictsRectanglePfPKf(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L30:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L32
	call	__stack_chk_fail@PLT
.L32:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2058:
	.size	_Z56__device_stub__Z33transposeNoBankConflictsRectanglePfPKfPfPKf, .-_Z56__device_stub__Z33transposeNoBankConflictsRectanglePfPKfPfPKf
	.globl	_Z33transposeNoBankConflictsRectanglePfPKf
	.type	_Z33transposeNoBankConflictsRectanglePfPKf, @function
_Z33transposeNoBankConflictsRectanglePfPKf:
.LFB2059:
	.cfi_startproc
	endbr64
	jmp	_Z56__device_stub__Z33transposeNoBankConflictsRectanglePfPKfPfPKf
	.cfi_endproc
.LFE2059:
	.size	_Z33transposeNoBankConflictsRectanglePfPKf, .-_Z33transposeNoBankConflictsRectanglePfPKf
	.section	.rodata.str1.1
.LC7:
	.string	"\nDevice : %s\n"
.LC8:
	.string	"%d.%d\n"
.LC9:
	.string	"maxGridSize= %d, %d\n"
.LC10:
	.string	"Matrix size: %d %d, Block size: %d %d, Tile size: %d %d\n"
.LC11:
	.string	"dimGrid: %d %d %d. dimBlock: %d %d %d\n"
.LC12:
	.string	"warp size: %d\n"
.LC13:
	.string	"max threads per block: %d\n"
.LC14:
	.string	"max thread dim z:%d y:%d x:%d\n"
.LC15:
	.string	"max grid size z:%d y:%d x:%d\n"
.LC16:
	.string	"clock rate(KHz):\n"
.LC17:
	.string	"Error! Block size is greater than maxThreadsPerBlock!\n"
.LC18:
	.string	"\n"
.LC19:
	.string	"%d "
.LC20:
	.string	"\nmem_size=%d\n\n"
.LC21:
	.string	"Bandwidth (GB/s)"
.LC22:
	.string	"Routine"
.LC23:
	.string	"%35s%20s\n"
.LC24:
	.string	"transposeNaiveRectangle "
.LC25:
	.string	"%35s"
.LC26:
	.string	"transposeCoalescedRectangle"
.LC27:
	.string	"transposeNobankConflictsRectangle"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$1192, %rsp
	.cfi_def_cfa_offset 1248
	movq	%fs:40, %rax
	movq	%rax, 1176(%rsp)
	xorl	%eax, %eax
	decl	%edi
	jle	.L56
	movq	8(%rsi), %rdi
	call	atoi@PLT
	movl	%eax, %ebx
	jmp	.L36
.L56:
	xorl	%ebx, %ebx
.L36:
	leaq	144(%rsp), %rbp
	movl	%ebx, %esi
	leaq	.LC10(%rip), %r13
	movq	%rbp, %rdi
	call	cudaGetDeviceProperties_v2@PLT
	movl	%eax, %edi
	call	_Z9checkCuda9cudaError.isra.0
	movq	%rbp, %rdx
	movl	$2, %edi
	xorl	%eax, %eax
	leaq	.LC7(%rip), %rsi
	call	__printf_chk@PLT
	movl	508(%rsp), %ecx
	movl	$2, %edi
	xorl	%eax, %eax
	movl	504(%rsp), %edx
	leaq	.LC8(%rip), %rsi
	call	__printf_chk@PLT
	movl	484(%rsp), %ecx
	movl	$2, %edi
	xorl	%eax, %eax
	movl	480(%rsp), %edx
	leaq	.LC9(%rip), %rsi
	call	__printf_chk@PLT
	pushq	$16
	.cfi_def_cfa_offset 1256
	movl	$16, %r9d
	movq	%r13, %rsi
	pushq	$16
	.cfi_def_cfa_offset 1264
	movl	$16, %r8d
	movl	$2, %ecx
	xorl	%eax, %eax
	movl	$2, %edx
	movl	$2, %edi
	call	__printf_chk@PLT
	popq	%rax
	.cfi_def_cfa_offset 1256
	popq	%rdx
	.cfi_def_cfa_offset 1248
	pushq	$1
	.cfi_def_cfa_offset 1256
	pushq	$16
	.cfi_def_cfa_offset 1264
	movl	$16, %r9d
	movl	$1, %r8d
	xorl	%eax, %eax
	movl	$1, %ecx
	movl	$1, %edx
	movl	$2, %edi
	leaq	.LC11(%rip), %rsi
	call	__printf_chk@PLT
	popq	%rcx
	.cfi_def_cfa_offset 1256
	popq	%rsi
	.cfi_def_cfa_offset 1248
	movl	$2, %edi
	movl	452(%rsp), %edx
	leaq	.LC12(%rip), %rsi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	464(%rsp), %edx
	leaq	.LC13(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	476(%rsp), %r8d
	xorl	%eax, %eax
	movl	472(%rsp), %ecx
	movl	468(%rsp), %edx
	leaq	.LC14(%rip), %rsi
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	488(%rsp), %r8d
	xorl	%eax, %eax
	movl	484(%rsp), %ecx
	movl	480(%rsp), %edx
	leaq	.LC15(%rip), %rsi
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	492(%rsp), %edx
	xorl	%eax, %eax
	leaq	.LC16(%rip), %rsi
	movl	$2, %edi
	call	__printf_chk@PLT
	cmpl	$255, 464(%rsp)
	ja	.L37
	leaq	.LC17(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L37:
	movl	%ebx, %edi
	leaq	.LC18(%rip), %r15
	xorl	%r12d, %r12d
	call	cudaSetDevice@PLT
	leaq	.LC19(%rip), %r14
	movl	%eax, %edi
	call	_Z9checkCuda9cudaError.isra.0
	movl	$16, %edi
	call	malloc@PLT
	movl	$16, %edi
	movq	%rax, %rbp
	call	malloc@PLT
	movl	$16, %edi
	movq	%rax, (%rsp)
	call	malloc@PLT
	movl	$16, %esi
	leaq	32(%rsp), %rdi
	movq	%rax, %rbx
	call	cudaMalloc@PLT
	movl	%eax, %edi
	call	_Z9checkCuda9cudaError.isra.0
	movl	$16, %esi
	leaq	40(%rsp), %rdi
	call	cudaMalloc@PLT
	movl	%eax, %edi
	call	_Z9checkCuda9cudaError.isra.0
	movl	$16, %esi
	leaq	48(%rsp), %rdi
	call	cudaMalloc@PLT
	movl	%eax, %edi
	call	_Z9checkCuda9cudaError.isra.0
	movl	$127, %eax
	movq	%r15, %rsi
	movl	$2, %edi
	salq	$55, %rax
	movq	%rax, 0(%rbp)
	movabsq	$4629700418010611712, %rax
	movq	%rax, 8(%rbp)
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L38:
	cvttss2sil	0(%rbp,%r12,4), %edx
	movq	%r14, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	incq	%r12
	call	__printf_chk@PLT
	cmpq	$100, %r12
	jne	.L38
	movss	0(%rbp), %xmm0
	movq	%r15, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	xorl	%r15d, %r15d
	movss	%xmm0, (%rbx)
	movss	4(%rbp), %xmm0
	movss	%xmm0, 8(%rbx)
	movss	8(%rbp), %xmm0
	movss	%xmm0, 4(%rbx)
	movss	12(%rbp), %xmm0
	movss	%xmm0, 12(%rbx)
	call	__printf_chk@PLT
.L39:
	cvttss2sil	(%rbx,%r15,4), %edx
	movq	%r14, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	incq	%r15
	call	__printf_chk@PLT
	cmpq	$100, %r15
	jne	.L39
	movl	$16, %edx
	leaq	.LC20(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	32(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	movl	$16, %edx
	leaq	.LC25(%rip), %r14
	call	cudaMemcpy@PLT
	movl	%eax, %edi
	call	_Z9checkCuda9cudaError.isra.0
	leaq	56(%rsp), %rdi
	call	cudaEventCreate@PLT
	movl	%eax, %edi
	call	_Z9checkCuda9cudaError.isra.0
	leaq	64(%rsp), %rdi
	call	cudaEventCreate@PLT
	movl	%eax, %edi
	call	_Z9checkCuda9cudaError.isra.0
	leaq	.LC21(%rip), %rcx
	movl	$2, %edi
	xorl	%eax, %eax
	leaq	.LC22(%rip), %rdx
	leaq	.LC23(%rip), %rsi
	call	__printf_chk@PLT
	movq	%r14, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	leaq	.LC24(%rip), %rdx
	call	__printf_chk@PLT
	pushq	$16
	.cfi_def_cfa_offset 1256
	movl	$16, %r9d
	movq	%r13, %rsi
	pushq	$16
	.cfi_def_cfa_offset 1264
	movl	$16, %r8d
	movl	$2, %ecx
	xorl	%eax, %eax
	movl	$2, %edx
	movl	$2, %edi
	call	__printf_chk@PLT
	popq	%r11
	.cfi_def_cfa_offset 1256
	popq	%r12
	.cfi_def_cfa_offset 1248
	pushq	$1
	.cfi_def_cfa_offset 1256
	pushq	$16
	.cfi_def_cfa_offset 1264
	movl	$16, %r9d
	movl	$1, %r8d
	xorl	%eax, %eax
	movl	$1, %ecx
	movl	$1, %edx
	movl	$2, %edi
	leaq	.LC11(%rip), %rsi
	call	__printf_chk@PLT
	popq	%r15
	.cfi_def_cfa_offset 1256
	popq	%rax
	.cfi_def_cfa_offset 1248
	xorl	%esi, %esi
	movq	48(%rsp), %rdi
	movl	$16, %edx
	call	cudaMemset@PLT
	movl	%eax, %edi
	call	_Z9checkCuda9cudaError.isra.0
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	movabsq	$4294967297, %rdi
	movl	$1, %esi
	movabsq	$68719476752, %rdx
	movl	$1, 80(%rsp)
	movq	%rdi, 72(%rsp)
	movq	%rdx, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L40
	movq	32(%rsp), %rsi
	movq	48(%rsp), %rdi
	call	_Z46__device_stub__Z23transposeNaiveRectanglePfPKfPfPKf
.L40:
	movq	56(%rsp), %rdi
	xorl	%esi, %esi
	movl	$100, %r15d
	call	cudaEventRecord@PLT
	movl	%eax, %edi
	call	_Z9checkCuda9cudaError.isra.0
.L42:
	movl	92(%rsp), %ecx
	movq	84(%rsp), %rdx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	72(%rsp), %rdi
	movl	80(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L41
	movq	32(%rsp), %rsi
	movq	48(%rsp), %rdi
	call	_Z46__device_stub__Z23transposeNaiveRectanglePfPKfPfPKf
.L41:
	decl	%r15d
	jne	.L42
	movq	64(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movl	%eax, %edi
	call	_Z9checkCuda9cudaError.isra.0
	movq	64(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movl	%eax, %edi
	call	_Z9checkCuda9cudaError.isra.0
	movq	64(%rsp), %rdx
	movq	56(%rsp), %rsi
	leaq	28(%rsp), %rax
	movq	%rax, %rdi
	movq	%rax, 8(%rsp)
	call	cudaEventElapsedTime@PLT
	movl	%eax, %edi
	call	_Z9checkCuda9cudaError.isra.0
	movq	48(%rsp), %rsi
	movq	(%rsp), %rdi
	movl	$2, %ecx
	movl	$16, %edx
	call	cudaMemcpy@PLT
	movl	%eax, %edi
	call	_Z9checkCuda9cudaError.isra.0
	movss	28(%rsp), %xmm0
	movq	(%rsp), %rsi
	movq	%rbx, %rdi
	movl	$4, %edx
	call	_Z11postprocessPKfS0_if
	movq	%r14, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	leaq	.LC26(%rip), %rdx
	call	__printf_chk@PLT
	pushq	$16
	.cfi_def_cfa_offset 1256
	movl	$16, %r9d
	movq	%r13, %rsi
	pushq	$16
	.cfi_def_cfa_offset 1264
	movl	$16, %r8d
	movl	$2, %ecx
	xorl	%eax, %eax
	movl	$2, %edx
	movl	$2, %edi
	call	__printf_chk@PLT
	popq	%rdi
	.cfi_def_cfa_offset 1256
	popq	%r8
	.cfi_def_cfa_offset 1248
	pushq	$1
	.cfi_def_cfa_offset 1256
	pushq	$16
	.cfi_def_cfa_offset 1264
	movl	$1, %r8d
	movl	$1, %ecx
	xorl	%eax, %eax
	movl	$16, %r9d
	movl	$1, %edx
	movl	$2, %edi
	leaq	.LC11(%rip), %rsi
	call	__printf_chk@PLT
	popq	%r9
	.cfi_def_cfa_offset 1256
	popq	%r10
	.cfi_def_cfa_offset 1248
	xorl	%esi, %esi
	movq	48(%rsp), %rdi
	movl	$16, %edx
	call	cudaMemset@PLT
	movl	%eax, %edi
	call	_Z9checkCuda9cudaError.isra.0
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	movabsq	$4294967297, %rdi
	movl	$1, %esi
	movabsq	$68719476752, %rdx
	movl	$1, 104(%rsp)
	movq	%rdi, 96(%rsp)
	movq	%rdx, 108(%rsp)
	movl	$1, 116(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L43
	movq	32(%rsp), %rsi
	movq	48(%rsp), %rdi
	call	_Z50__device_stub__Z27transposeCoalescedRectanglePfPKfPfPKf
.L43:
	movq	56(%rsp), %rdi
	xorl	%esi, %esi
	movl	$100, %r15d
	call	cudaEventRecord@PLT
	movl	%eax, %edi
	call	_Z9checkCuda9cudaError.isra.0
.L45:
	movl	116(%rsp), %ecx
	movq	108(%rsp), %rdx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	96(%rsp), %rdi
	movl	104(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L44
	movq	32(%rsp), %rsi
	movq	48(%rsp), %rdi
	call	_Z50__device_stub__Z27transposeCoalescedRectanglePfPKfPfPKf
.L44:
	decl	%r15d
	jne	.L45
	movq	64(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movl	%eax, %edi
	call	_Z9checkCuda9cudaError.isra.0
	movq	64(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movl	%eax, %edi
	call	_Z9checkCuda9cudaError.isra.0
	movq	64(%rsp), %rdx
	movq	56(%rsp), %rsi
	movq	8(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	movl	%eax, %edi
	call	_Z9checkCuda9cudaError.isra.0
	movq	48(%rsp), %rsi
	movq	(%rsp), %rdi
	movl	$2, %ecx
	movl	$16, %edx
	call	cudaMemcpy@PLT
	movl	%eax, %edi
	call	_Z9checkCuda9cudaError.isra.0
	movss	28(%rsp), %xmm0
	movq	(%rsp), %rsi
	movq	%rbx, %rdi
	movl	$4, %edx
	call	_Z11postprocessPKfS0_if
	movq	%r14, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	leaq	.LC27(%rip), %rdx
	call	__printf_chk@PLT
	pushq	$16
	.cfi_def_cfa_offset 1256
	movl	$16, %r9d
	movq	%r13, %rsi
	pushq	$16
	.cfi_def_cfa_offset 1264
	movl	$16, %r8d
	movl	$2, %ecx
	xorl	%eax, %eax
	movl	$2, %edx
	movl	$2, %edi
	call	__printf_chk@PLT
	popq	%rax
	.cfi_def_cfa_offset 1256
	popq	%rdx
	.cfi_def_cfa_offset 1248
	pushq	$1
	.cfi_def_cfa_offset 1256
	pushq	$16
	.cfi_def_cfa_offset 1264
	movl	$16, %r9d
	movl	$1, %r8d
	xorl	%eax, %eax
	movl	$1, %ecx
	movl	$1, %edx
	movl	$2, %edi
	leaq	.LC11(%rip), %rsi
	call	__printf_chk@PLT
	popq	%rcx
	.cfi_def_cfa_offset 1256
	popq	%rsi
	.cfi_def_cfa_offset 1248
	movl	$16, %edx
	movq	48(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaMemset@PLT
	movl	%eax, %edi
	call	_Z9checkCuda9cudaError.isra.0
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	movabsq	$4294967297, %rdi
	movl	$1, %esi
	movabsq	$68719476752, %rdx
	movl	$1, 128(%rsp)
	movq	%rdi, 120(%rsp)
	movq	%rdx, 132(%rsp)
	movl	$1, 140(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L46
	movq	32(%rsp), %rsi
	movq	48(%rsp), %rdi
	call	_Z56__device_stub__Z33transposeNoBankConflictsRectanglePfPKfPfPKf
.L46:
	movq	56(%rsp), %rdi
	xorl	%esi, %esi
	movl	$100, %r12d
	call	cudaEventRecord@PLT
	movl	%eax, %edi
	call	_Z9checkCuda9cudaError.isra.0
.L48:
	movl	140(%rsp), %ecx
	movq	120(%rsp), %rdi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	132(%rsp), %rdx
	movl	128(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L47
	movq	32(%rsp), %rsi
	movq	48(%rsp), %rdi
	call	_Z56__device_stub__Z33transposeNoBankConflictsRectanglePfPKfPfPKf
.L47:
	decl	%r12d
	jne	.L48
	movq	64(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movl	%eax, %edi
	call	_Z9checkCuda9cudaError.isra.0
	movq	64(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movl	%eax, %edi
	call	_Z9checkCuda9cudaError.isra.0
	movq	64(%rsp), %rdx
	movq	56(%rsp), %rsi
	movq	8(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	movl	%eax, %edi
	call	_Z9checkCuda9cudaError.isra.0
	movq	48(%rsp), %rsi
	movq	(%rsp), %rdi
	movl	$2, %ecx
	movl	$16, %edx
	call	cudaMemcpy@PLT
	movl	%eax, %edi
	call	_Z9checkCuda9cudaError.isra.0
	movss	28(%rsp), %xmm0
	movq	(%rsp), %rsi
	movq	%rbx, %rdi
	movl	$4, %edx
	call	_Z11postprocessPKfS0_if
	movq	56(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movl	%eax, %edi
	call	_Z9checkCuda9cudaError.isra.0
	movq	64(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movl	%eax, %edi
	call	_Z9checkCuda9cudaError.isra.0
	movq	48(%rsp), %rdi
	call	cudaFree@PLT
	movl	%eax, %edi
	call	_Z9checkCuda9cudaError.isra.0
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movl	%eax, %edi
	call	_Z9checkCuda9cudaError.isra.0
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movl	%eax, %edi
	call	_Z9checkCuda9cudaError.isra.0
	movq	%rbp, %rdi
	call	free@PLT
	movq	(%rsp), %rdi
	call	free@PLT
	movq	%rbx, %rdi
	call	free@PLT
	movq	1176(%rsp), %rax
	subq	%fs:40, %rax
	je	.L49
	call	__stack_chk_fail@PLT
.L49:
	addq	$1192, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2029:
	.size	main, .-main
	.section	.rodata.str1.1
.LC28:
	.string	"_Z33transposeNoBankConflictsRectanglePfPKf"
.LC29:
	.string	"_Z27transposeCoalescedRectanglePfPKf"
.LC30:
	.string	"_Z23transposeNaiveRectanglePfPKf"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2061:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC28(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z33transposeNoBankConflictsRectanglePfPKf(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC29(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z27transposeCoalescedRectanglePfPKf(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC30(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z23transposeNaiveRectanglePfPKf(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2061:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.globl	remainderY
	.data
	.align 4
	.type	remainderY, @object
	.size	remainderY, 4
remainderY:
	.long	2
	.globl	remainderX
	.align 4
	.type	remainderX, @object
	.size	remainderX, 4
remainderX:
	.long	2
	.globl	sizeY
	.bss
	.align 4
	.type	sizeY, @object
	.size	sizeY, 4
sizeY:
	.zero	4
	.globl	sizeX
	.align 4
	.type	sizeX, @object
	.size	sizeX, 4
sizeX:
	.zero	4
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC4:
	.long	-1598689907
	.long	1051772663
	.align 8
.LC5:
	.long	0
	.long	1079574528
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

/*
Below code is based on
https://github.com/NVIDIA-developer-blog/code-samples/tree/master/series/cuda-cpp/transpose.
nvcc transpose_any.cu  -o transpose_any
*/

#include <hip/hip_runtime.h>
#include <assert.h>
#include <math.h>
#include <stdio.h>
#define DEBUG
// Convenience function for checking CUDA runtime API results
// can be wrapped around any runtime API call. No-op in release builds.
inline hipError_t checkCuda(hipError_t result) {
#if defined(DEBUG) || defined(_DEBUG)
  if (result != hipSuccess) {
    fprintf(stderr, "CUDA Runtime Error: %s\n", hipGetErrorString(result));
    assert(result == hipSuccess);
  }
#endif

  return result;
}

const int nx = 2;
const int ny = 2;
const int TILE_DIM = 16;
const int BLOCK_ROWS = TILE_DIM;  // 8;
const int NUM_REPS = 100;

// Check errors and print GB/s
void postprocess(const float* ref, const float* res, int n, float ms) {
  bool passed = true;
  printf("\nref   res\n");
#if 1
  for (int i = 0; i < n; i++) {
    if (res[i] != ref[i]) {
      printf(" Failed: %d %f %f\n", i, ref[i], res[i]);
      // printf("%25s\n", "*** FAILED ***");
      passed = false;
      // break;
    } else {
      printf(" Passed: %d %f %f\n", i, ref[i], res[i]);
    }
  }
#endif
#if 0
  for (int i = 0; i < n; i++) {
    if (res[i] != ref[i]) {
      passed = false;
      printf("%25s\n", "*** FAILED ***");
      break;
    }
  }
#endif

  if (passed)
    printf("%20.2f\n", 2 * n * sizeof(float) * 1e-6 * NUM_REPS / ms);
}

// Naive transpose
// Simplest transpose; doesn't use shared memory.
// Global memory reads are coalesced but writes are not.
__global__ void transposeNaiveRectangle(float* odata, const float* idata) {
  int x = blockIdx.x * TILE_DIM + threadIdx.x;
  int y = blockIdx.y * TILE_DIM + threadIdx.y;
  int width = nx;   // gridDim.x * TILE_DIM;
  int height = ny;  // gridDim.y * TILE_DIM;
  if ((x < nx) && (y < ny)) {
    odata[y + (x)*height] = idata[(x) + width * y];
  }
}

int sizeX = nx / TILE_DIM;
int sizeY = ny / TILE_DIM;
int remainderX = nx % TILE_DIM;
int remainderY = ny % TILE_DIM;

// Shared
__global__ void transposeCoalescedRectangle(float* odata, const float* idata) {
  __shared__ float tile[TILE_DIM][TILE_DIM];

  int x = blockIdx.x * TILE_DIM + threadIdx.x;
  int y = blockIdx.y * TILE_DIM + threadIdx.y;
  int width = nx;   // gridDim.x * TILE_DIM;
  int height = ny;  // gridDim.y * TILE_DIM;

  for (int j = 0; j < TILE_DIM; j += BLOCK_ROWS) {
    if ((x < nx) && ((y + j) < ny)) {
      tile[threadIdx.y + j][threadIdx.x] = idata[(y + j) * width + x];
    }
  }
  __syncthreads();

  x = blockIdx.y * TILE_DIM + threadIdx.x;  // transpose block offset
  y = blockIdx.x * TILE_DIM + threadIdx.y;

  for (int j = 0; j < TILE_DIM; j += BLOCK_ROWS) {
    if ((x < ny) && ((y + j) < nx)) {
      odata[(y + j) * height + x] = tile[threadIdx.x][threadIdx.y + j];
    }
  }
}

__global__ void transposeNoBankConflictsRectangle(float* odata,
                                                  const float* idata) {
  __shared__ float tile[TILE_DIM][TILE_DIM + 1];

  int x = blockIdx.x * TILE_DIM + threadIdx.x;
  int y = blockIdx.y * TILE_DIM + threadIdx.y;
  int width = nx;   // gridDim.x * TILE_DIM;
  int height = ny;  // gridDim.y * TILE_DIM;

  for (int j = 0; j < TILE_DIM; j += BLOCK_ROWS) {
    if ((x < nx) && ((y + j) < ny)) {
      tile[threadIdx.y + j][threadIdx.x] = idata[(y + j) * width + x];
    }
  }
  __syncthreads();

  x = blockIdx.y * TILE_DIM + threadIdx.x;  // transpose block offset
  y = blockIdx.x * TILE_DIM + threadIdx.y;

  for (int j = 0; j < TILE_DIM; j += BLOCK_ROWS) {
    if ((x < ny) && ((y + j) < nx)) {
      odata[(y + j) * height + x] = tile[threadIdx.x][threadIdx.y + j];
    }
  }
}

int main(int argc, char** argv) {
  const int mem_size = nx * ny * sizeof(float);

  dim3 dimGrid((int)ceil((float)nx / (float)TILE_DIM),
               (int)ceil((float)ny / (float)TILE_DIM), 1);
  dim3 dimBlock(TILE_DIM, TILE_DIM, 1);

  int devId = 0;
  if (argc > 1)
    devId = atoi(argv[1]);

  hipDeviceProp_t prop;
  checkCuda(hipGetDeviceProperties(&prop, devId));
  printf("\nDevice : %s\n", prop.name);
  printf("%d.%d\n", prop.major, prop.minor);
  printf("maxGridSize= %d, %d\n", prop.maxGridSize[0], prop.maxGridSize[1]);
  printf("Matrix size: %d %d, Block size: %d %d, Tile size: %d %d\n", nx, ny,
         TILE_DIM, BLOCK_ROWS, TILE_DIM, TILE_DIM);
  printf("dimGrid: %d %d %d. dimBlock: %d %d %d\n", dimGrid.x, dimGrid.y,
         dimGrid.z, dimBlock.x, dimBlock.y, dimBlock.z);

  printf("warp size: %d\n", prop.warpSize);
  printf("max threads per block: %d\n", prop.maxThreadsPerBlock);
  printf("max thread dim z:%d y:%d x:%d\n", prop.maxThreadsDim[0],
         prop.maxThreadsDim[1], prop.maxThreadsDim[2]);
  printf("max grid size z:%d y:%d x:%d\n", prop.maxGridSize[0],
         prop.maxGridSize[1], prop.maxGridSize[2]);
  printf("clock rate(KHz):\n", prop.clockRate);
  if (dimBlock.x * dimBlock.y * dimBlock.z > prop.maxThreadsPerBlock) {
    printf("Error! Block size is greater than maxThreadsPerBlock!\n");
  }

  checkCuda(hipSetDevice(devId));

  float* h_idata = (float*)malloc(mem_size);
  float* h_cdata = (float*)malloc(mem_size);
  float* h_tdata = (float*)malloc(mem_size);
  float* gold = (float*)malloc(mem_size);

  float *d_idata, *d_cdata, *d_tdata;
  checkCuda(hipMalloc(&d_idata, mem_size));
  checkCuda(hipMalloc(&d_cdata, mem_size));
  checkCuda(hipMalloc(&d_tdata, mem_size));

// check parameters and calculate execution configuration
#if 0
  if (nx % TILE_DIM || ny % TILE_DIM) {
    printf("nx and ny must be a multiple of TILE_DIM\n");
    goto error_exit;
  }

  if (TILE_DIM % BLOCK_ROWS) {
    printf("TILE_DIM must be a multiple of BLOCK_ROWS\n");
    goto error_exit;
  }
#endif

  // host
  for (int j = 0; j < ny; j++) {
    for (int i = 0; i < nx; i++) {
      h_idata[j * nx + i] = j * nx + i;
    }
  }
  printf("\n");
  for (int j = 0; j < 100; j++) {
    printf("%d ", (int)h_idata[j]);
  }
  // correct result for error checking
  for (int j = 0; j < ny; j++) {
    for (int i = 0; i < nx; i++) {
      gold[i * ny + j] = h_idata[j * nx + i];
    }
  }

  printf("\n");
  for (int j = 0; j < 100; j++) {
    printf("%d ", (int)gold[j]);
  }
  printf("\nmem_size=%d\n\n", mem_size);
  // device
  checkCuda(hipMemcpy(d_idata, h_idata, mem_size, hipMemcpyHostToDevice));

  // events for timing
  hipEvent_t startEvent, stopEvent;
  checkCuda(hipEventCreate(&startEvent));
  checkCuda(hipEventCreate(&stopEvent));
  float ms;

  // ------------
  // time kernels
  // ------------

  printf("%35s%20s\n", "Routine", "Bandwidth (GB/s)");
#if 1
  {
    printf("%35s", "transposeNaiveRectangle ");
    printf("Matrix size: %d %d, Block size: %d %d, Tile size: %d %d\n", nx, ny,
           TILE_DIM, TILE_DIM, TILE_DIM, TILE_DIM);
    printf("dimGrid: %d %d %d. dimBlock: %d %d %d\n", dimGrid.x, dimGrid.y,
           dimGrid.z, dimBlock.x, dimBlock.y, dimBlock.z);
    // --------------
    // transposeNaiveRectangle
    // --------------
    checkCuda(hipMemset(d_tdata, 0, mem_size));
    // warmup
    transposeNaiveRectangle<<<dimGrid, dimBlock>>>(d_tdata, d_idata);
    checkCuda(hipEventRecord(startEvent, 0));
    for (int i = 0; i < NUM_REPS; i++)
      transposeNaiveRectangle<<<dimGrid, dimBlock>>>(d_tdata, d_idata);
    checkCuda(hipEventRecord(stopEvent, 0));
    checkCuda(hipEventSynchronize(stopEvent));
    checkCuda(hipEventElapsedTime(&ms, startEvent, stopEvent));
    checkCuda(hipMemcpy(h_tdata, d_tdata, mem_size, hipMemcpyDeviceToHost));
    postprocess(gold, h_tdata, nx * ny, ms);
  }
#endif
#if 1
  {
    printf("%35s", "transposeCoalescedRectangle");
    // dim3 dimGrid(ceil(nx / TILE_DIM), ceil(ny / TILE_DIM), 1);
    dim3 dimGrid((int)ceil((float)nx / (float)TILE_DIM),
                 (int)ceil((float)ny / (float)TILE_DIM), 1);
    dim3 dimBlock(TILE_DIM, BLOCK_ROWS, 1);

    printf("Matrix size: %d %d, Block size: %d %d, Tile size: %d %d\n", nx, ny,
           TILE_DIM, BLOCK_ROWS, TILE_DIM, TILE_DIM);
    printf("dimGrid: %d %d %d. dimBlock: %d %d %d\n", dimGrid.x, dimGrid.y,
           dimGrid.z, dimBlock.x, dimBlock.y, dimBlock.z);

    // ------------------
    // transposeCoalescedRectangle
    // ------------------
    checkCuda(hipMemset(d_tdata, 0, mem_size));
    // warmup
    transposeCoalescedRectangle<<<dimGrid, dimBlock>>>(d_tdata, d_idata);
    checkCuda(hipEventRecord(startEvent, 0));
    for (int i = 0; i < NUM_REPS; i++)
      transposeCoalescedRectangle<<<dimGrid, dimBlock>>>(d_tdata, d_idata);
    checkCuda(hipEventRecord(stopEvent, 0));
    checkCuda(hipEventSynchronize(stopEvent));
    checkCuda(hipEventElapsedTime(&ms, startEvent, stopEvent));
    checkCuda(hipMemcpy(h_tdata, d_tdata, mem_size, hipMemcpyDeviceToHost));
    postprocess(gold, h_tdata, nx * ny, ms);
  }
#endif
#if 1
  {
    printf("%35s", "transposeNobankConflictsRectangle");
    dim3 dimGrid((int)ceil((float)nx / (float)TILE_DIM),
                 (int)ceil((float)ny / (float)TILE_DIM), 1);
    dim3 dimBlock(TILE_DIM, BLOCK_ROWS, 1);

    printf("Matrix size: %d %d, Block size: %d %d, Tile size: %d %d\n", nx, ny,
           TILE_DIM, BLOCK_ROWS, TILE_DIM, TILE_DIM);
    printf("dimGrid: %d %d %d. dimBlock: %d %d %d\n", dimGrid.x, dimGrid.y,
           dimGrid.z, dimBlock.x, dimBlock.y, dimBlock.z);

    // ------------------
    // transposeNoBankConflictsRectangle
    // ------------------

    checkCuda(hipMemset(d_tdata, 0, mem_size));
    // warmup
    transposeNoBankConflictsRectangle<<<dimGrid, dimBlock>>>(d_tdata, d_idata);
    checkCuda(hipEventRecord(startEvent, 0));
    for (int i = 0; i < NUM_REPS; i++)
      transposeNoBankConflictsRectangle<<<dimGrid, dimBlock>>>(d_tdata,
                                                               d_idata);
    checkCuda(hipEventRecord(stopEvent, 0));
    checkCuda(hipEventSynchronize(stopEvent));
    checkCuda(hipEventElapsedTime(&ms, startEvent, stopEvent));
    checkCuda(hipMemcpy(h_tdata, d_tdata, mem_size, hipMemcpyDeviceToHost));
    postprocess(gold, h_tdata, nx * ny, ms);
  }
#endif
error_exit:
  // cleanup
  checkCuda(hipEventDestroy(startEvent));
  checkCuda(hipEventDestroy(stopEvent));
  checkCuda(hipFree(d_tdata));
  checkCuda(hipFree(d_cdata));
  checkCuda(hipFree(d_idata));
  free(h_idata);
  free(h_tdata);
  free(h_cdata);
  free(gold);
}

	.text
	.file	"transpose_any.hip"
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0                          # -- Begin function _Z11postprocessPKfS0_if
.LCPI0_0:
	.long	1127219200                      # 0x43300000
	.long	1160773632                      # 0x45300000
	.long	0                               # 0x0
	.long	0                               # 0x0
.LCPI0_1:
	.quad	0x4330000000000000              # double 4503599627370496
	.quad	0x4530000000000000              # double 1.9342813113834067E+25
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0
.LCPI0_2:
	.quad	0x3eb0c6f7a0b5ed8d              # double 9.9999999999999995E-7
.LCPI0_3:
	.quad	0x4059000000000000              # double 100
	.text
	.globl	_Z11postprocessPKfS0_if
	.type	_Z11postprocessPKfS0_if,@function
_Z11postprocessPKfS0_if:                # @_Z11postprocessPKfS0_if
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movss	%xmm0, 12(%rsp)                 # 4-byte Spill
	movl	%edx, %ebx
	movq	%rsi, %r14
	movq	%rdi, %r15
	movl	$.Lstr, %edi
	callq	puts@PLT
	testl	%ebx, %ebx
	jle	.LBB0_5
# %bb.1:                                # %.lr.ph.preheader
	movl	%ebx, 8(%rsp)                   # 4-byte Spill
	movl	%ebx, %eax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movb	$1, %bpl
	xorl	%ebx, %ebx
	movl	$.L.str.1, %r13d
	xorl	%r12d, %r12d
.LBB0_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movss	(%r14,%r12,4), %xmm1            # xmm1 = mem[0],zero,zero,zero
	movss	(%r15,%r12,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	ucomiss	%xmm0, %xmm1
	cvtss2sd	%xmm0, %xmm0
	movl	$.L.str.2, %edi
	cmovneq	%r13, %rdi
	cvtss2sd	%xmm1, %xmm1
	cmovpq	%r13, %rdi
	movzbl	%bpl, %ebp
	cmovnel	%ebx, %ebp
	cmovpl	%ebx, %ebp
	movl	%r12d, %esi
	movb	$2, %al
	callq	printf
	incq	%r12
	cmpq	%r12, 16(%rsp)                  # 8-byte Folded Reload
	jne	.LBB0_2
# %bb.3:                                # %._crit_edge
	testb	$1, %bpl
	movl	8(%rsp), %ebx                   # 4-byte Reload
	jne	.LBB0_5
# %bb.4:
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB0_5:                                # %._crit_edge.thread
	.cfi_def_cfa_offset 80
	addl	%ebx, %ebx
	movslq	%ebx, %rax
	shlq	$2, %rax
	movq	%rax, %xmm1
	punpckldq	.LCPI0_0(%rip), %xmm1   # xmm1 = xmm1[0],mem[0],xmm1[1],mem[1]
	subpd	.LCPI0_1(%rip), %xmm1
	movapd	%xmm1, %xmm0
	unpckhpd	%xmm1, %xmm0                    # xmm0 = xmm0[1],xmm1[1]
	addsd	%xmm1, %xmm0
	mulsd	.LCPI0_2(%rip), %xmm0
	mulsd	.LCPI0_3(%rip), %xmm0
	xorps	%xmm1, %xmm1
	cvtss2sd	12(%rsp), %xmm1                 # 4-byte Folded Reload
	divsd	%xmm1, %xmm0
	movl	$.L.str.3, %edi
	movb	$1, %al
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	printf                          # TAILCALL
.Lfunc_end0:
	.size	_Z11postprocessPKfS0_if, .Lfunc_end0-_Z11postprocessPKfS0_if
	.cfi_endproc
                                        # -- End function
	.globl	_Z38__device_stub__transposeNaiveRectanglePfPKf # -- Begin function _Z38__device_stub__transposeNaiveRectanglePfPKf
	.type	_Z38__device_stub__transposeNaiveRectanglePfPKf,@function
_Z38__device_stub__transposeNaiveRectanglePfPKf: # @_Z38__device_stub__transposeNaiveRectanglePfPKf
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z23transposeNaiveRectanglePfPKf, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z38__device_stub__transposeNaiveRectanglePfPKf, .Lfunc_end1-_Z38__device_stub__transposeNaiveRectanglePfPKf
	.cfi_endproc
                                        # -- End function
	.globl	_Z42__device_stub__transposeCoalescedRectanglePfPKf # -- Begin function _Z42__device_stub__transposeCoalescedRectanglePfPKf
	.type	_Z42__device_stub__transposeCoalescedRectanglePfPKf,@function
_Z42__device_stub__transposeCoalescedRectanglePfPKf: # @_Z42__device_stub__transposeCoalescedRectanglePfPKf
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z27transposeCoalescedRectanglePfPKf, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z42__device_stub__transposeCoalescedRectanglePfPKf, .Lfunc_end2-_Z42__device_stub__transposeCoalescedRectanglePfPKf
	.cfi_endproc
                                        # -- End function
	.globl	_Z48__device_stub__transposeNoBankConflictsRectanglePfPKf # -- Begin function _Z48__device_stub__transposeNoBankConflictsRectanglePfPKf
	.type	_Z48__device_stub__transposeNoBankConflictsRectanglePfPKf,@function
_Z48__device_stub__transposeNoBankConflictsRectanglePfPKf: # @_Z48__device_stub__transposeNoBankConflictsRectanglePfPKf
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z33transposeNoBankConflictsRectanglePfPKf, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z48__device_stub__transposeNoBankConflictsRectanglePfPKf, .Lfunc_end3-_Z48__device_stub__transposeNoBankConflictsRectanglePfPKf
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0                          # -- Begin function main
.LCPI4_0:
	.long	0x00000000                      # float 0
	.long	0x3f800000                      # float 1
	.long	0x40000000                      # float 2
	.long	0x40400000                      # float 3
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$1528, %rsp                     # imm = 0x5F8
	.cfi_def_cfa_offset 1584
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	xorl	%ebx, %ebx
	cmpl	$2, %edi
	jl	.LBB4_2
# %bb.1:
	movq	8(%rsi), %rdi
	callq	atoi
	movl	%eax, %ebx
.LBB4_2:
	leaq	56(%rsp), %rdi
	movl	%ebx, %esi
	callq	hipGetDevicePropertiesR0600
	testl	%eax, %eax
	jne	.LBB4_3
.LBB4_4:                                # %_Z9checkCuda10hipError_t.exit
	leaq	56(%rsp), %r14
	movl	$.L.str.4, %edi
	movq	%r14, %rsi
	xorl	%eax, %eax
	callq	printf
	movl	360(%r14), %esi
	movl	364(%r14), %edx
	movl	$.L.str.5, %edi
	xorl	%eax, %eax
	callq	printf
	movl	336(%r14), %esi
	movl	340(%r14), %edx
	movl	$.L.str.6, %edi
	xorl	%eax, %eax
	callq	printf
	movl	$16, (%rsp)
	movl	$.L.str.7, %edi
	movl	$2, %esi
	movl	$2, %edx
	movl	$16, %ecx
	movl	$16, %r8d
	movl	$16, %r9d
	xorl	%eax, %eax
	callq	printf
	movl	$1, (%rsp)
	movl	$.L.str.8, %edi
	movl	$1, %esi
	movl	$1, %edx
	movl	$1, %ecx
	movl	$16, %r8d
	movl	$16, %r9d
	xorl	%eax, %eax
	callq	printf
	movl	308(%r14), %esi
	movl	$.L.str.9, %edi
	xorl	%eax, %eax
	callq	printf
	movl	320(%r14), %esi
	movl	$.L.str.10, %edi
	xorl	%eax, %eax
	callq	printf
	movl	324(%r14), %esi
	movl	328(%r14), %edx
	movl	332(%r14), %ecx
	movl	$.L.str.11, %edi
	xorl	%eax, %eax
	callq	printf
	movl	336(%r14), %esi
	movl	340(%r14), %edx
	movl	344(%r14), %ecx
	movl	$.L.str.12, %edi
	xorl	%eax, %eax
	callq	printf
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	cmpl	$255, 320(%r14)
	ja	.LBB4_6
# %bb.5:
	movl	$.Lstr.2, %edi
	callq	puts@PLT
.LBB4_6:
	movl	%ebx, %edi
	callq	hipSetDevice
	testl	%eax, %eax
	jne	.LBB4_7
.LBB4_8:                                # %_Z9checkCuda10hipError_t.exit114
	movl	$16, %edi
	callq	malloc
	movq	%rax, %rbx
	movl	$16, %edi
	callq	malloc
	movq	%rax, %r14
	movl	$16, %edi
	callq	malloc
	movq	%rax, %r15
	leaq	32(%rsp), %rdi
	movl	$16, %esi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB4_9
.LBB4_10:                               # %_Z9checkCuda10hipError_t.exit116
	leaq	48(%rsp), %rdi
	movl	$16, %esi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB4_11
.LBB4_12:                               # %_Z9checkCuda10hipError_t.exit118
	leaq	8(%rsp), %rdi
	movl	$16, %esi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB4_13
.LBB4_14:                               # %_Z9checkCuda10hipError_t.exit120
	movaps	.LCPI4_0(%rip), %xmm0           # xmm0 = [0.0E+0,1.0E+0,2.0E+0,3.0E+0]
	movups	%xmm0, (%rbx)
	movl	$10, %edi
	callq	putchar@PLT
	xorl	%r12d, %r12d
.LBB4_15:                               # =>This Inner Loop Header: Depth=1
	cvttss2si	(%rbx,%r12,4), %esi
	movl	$.L.str.16, %edi
	xorl	%eax, %eax
	callq	printf
	incq	%r12
	cmpq	$100, %r12
	jne	.LBB4_15
# %bb.16:                               # %.preheader.preheader
	movss	(%rbx), %xmm0                   # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, (%r15)
	movss	4(%rbx), %xmm0                  # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, 8(%r15)
	movss	8(%rbx), %xmm0                  # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, 4(%r15)
	movss	12(%rbx), %xmm0                 # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, 12(%r15)
	movl	$10, %edi
	callq	putchar@PLT
	xorl	%r12d, %r12d
.LBB4_17:                               # =>This Inner Loop Header: Depth=1
	cvttss2si	(%r15,%r12,4), %esi
	movl	$.L.str.16, %edi
	xorl	%eax, %eax
	callq	printf
	incq	%r12
	cmpq	$100, %r12
	jne	.LBB4_17
# %bb.18:
	movl	$.L.str.17, %edi
	movl	$16, %esi
	xorl	%eax, %eax
	callq	printf
	movq	32(%rsp), %rdi
	movl	$16, %edx
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB4_19
.LBB4_20:                               # %_Z9checkCuda10hipError_t.exit122
	leaq	40(%rsp), %rdi
	callq	hipEventCreate
	testl	%eax, %eax
	jne	.LBB4_21
.LBB4_22:                               # %_Z9checkCuda10hipError_t.exit124
	leaq	24(%rsp), %rdi
	callq	hipEventCreate
	testl	%eax, %eax
	jne	.LBB4_23
.LBB4_24:                               # %_Z9checkCuda10hipError_t.exit126
	movl	$.L.str.18, %edi
	movl	$.L.str.19, %esi
	movl	$.L.str.20, %edx
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.21, %edi
	movl	$.L.str.22, %esi
	xorl	%eax, %eax
	callq	printf
	movl	$16, (%rsp)
	movl	$.L.str.7, %edi
	movl	$2, %esi
	movl	$2, %edx
	movl	$16, %ecx
	movl	$16, %r8d
	movl	$16, %r9d
	xorl	%eax, %eax
	callq	printf
	movl	$1, (%rsp)
	movl	$.L.str.8, %edi
	movl	$1, %esi
	movl	$1, %edx
	movl	$1, %ecx
	movl	$16, %r8d
	movl	$16, %r9d
	xorl	%eax, %eax
	callq	printf
	movq	8(%rsp), %rdi
	movl	$16, %edx
	xorl	%esi, %esi
	callq	hipMemset
	testl	%eax, %eax
	jne	.LBB4_25
.LBB4_26:                               # %_Z9checkCuda10hipError_t.exit128
	movabsq	$68719476752, %r12              # imm = 0x1000000010
	movabsq	$4294967297, %r13               # imm = 0x100000001
	movq	%r13, %rdi
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB4_28
# %bb.27:
	movq	8(%rsp), %rdi
	movq	32(%rsp), %rsi
	callq	_Z38__device_stub__transposeNaiveRectanglePfPKf
.LBB4_28:
	movq	40(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	testl	%eax, %eax
	jne	.LBB4_29
.LBB4_30:                               # %_Z9checkCuda10hipError_t.exit130.preheader
	movl	$100, %ebp
.LBB4_31:                               # %_Z9checkCuda10hipError_t.exit130
                                        # =>This Inner Loop Header: Depth=1
	movq	%r13, %rdi
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB4_33
# %bb.32:                               #   in Loop: Header=BB4_31 Depth=1
	movq	8(%rsp), %rdi
	movq	32(%rsp), %rsi
	callq	_Z38__device_stub__transposeNaiveRectanglePfPKf
.LBB4_33:                               #   in Loop: Header=BB4_31 Depth=1
	decl	%ebp
	jne	.LBB4_31
# %bb.34:
	movq	24(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	testl	%eax, %eax
	jne	.LBB4_35
.LBB4_36:                               # %_Z9checkCuda10hipError_t.exit132
	movq	24(%rsp), %rdi
	callq	hipEventSynchronize
	testl	%eax, %eax
	jne	.LBB4_37
.LBB4_38:                               # %_Z9checkCuda10hipError_t.exit134
	movq	40(%rsp), %rsi
	movq	24(%rsp), %rdx
	leaq	20(%rsp), %rdi
	callq	hipEventElapsedTime
	testl	%eax, %eax
	jne	.LBB4_39
.LBB4_40:                               # %_Z9checkCuda10hipError_t.exit136
	movq	8(%rsp), %rsi
	movl	$16, %edx
	movq	%r14, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB4_41
.LBB4_42:                               # %_Z9checkCuda10hipError_t.exit138
	movss	20(%rsp), %xmm0                 # xmm0 = mem[0],zero,zero,zero
	movq	%r15, %rdi
	movq	%r14, %rsi
	movl	$4, %edx
	callq	_Z11postprocessPKfS0_if
	movl	$.L.str.21, %edi
	movl	$.L.str.23, %esi
	xorl	%eax, %eax
	callq	printf
	movl	$16, (%rsp)
	movl	$.L.str.7, %edi
	movl	$2, %esi
	movl	$2, %edx
	movl	$16, %ecx
	movl	$16, %r8d
	movl	$16, %r9d
	xorl	%eax, %eax
	callq	printf
	movl	$1, (%rsp)
	movl	$.L.str.8, %edi
	movl	$1, %esi
	movl	$1, %edx
	movl	$1, %ecx
	movl	$16, %r8d
	movl	$16, %r9d
	xorl	%eax, %eax
	callq	printf
	movq	8(%rsp), %rdi
	movl	$16, %edx
	xorl	%esi, %esi
	callq	hipMemset
	testl	%eax, %eax
	jne	.LBB4_43
.LBB4_44:                               # %_Z9checkCuda10hipError_t.exit140
	movq	%r13, %rdi
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB4_46
# %bb.45:
	movq	8(%rsp), %rdi
	movq	32(%rsp), %rsi
	callq	_Z42__device_stub__transposeCoalescedRectanglePfPKf
.LBB4_46:
	movq	40(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	testl	%eax, %eax
	jne	.LBB4_47
.LBB4_48:                               # %_Z9checkCuda10hipError_t.exit142.preheader
	movl	$100, %ebp
.LBB4_49:                               # %_Z9checkCuda10hipError_t.exit142
                                        # =>This Inner Loop Header: Depth=1
	movq	%r13, %rdi
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB4_51
# %bb.50:                               #   in Loop: Header=BB4_49 Depth=1
	movq	8(%rsp), %rdi
	movq	32(%rsp), %rsi
	callq	_Z42__device_stub__transposeCoalescedRectanglePfPKf
.LBB4_51:                               #   in Loop: Header=BB4_49 Depth=1
	decl	%ebp
	jne	.LBB4_49
# %bb.52:
	movq	24(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	testl	%eax, %eax
	jne	.LBB4_53
.LBB4_54:                               # %_Z9checkCuda10hipError_t.exit144
	movq	24(%rsp), %rdi
	callq	hipEventSynchronize
	testl	%eax, %eax
	jne	.LBB4_55
.LBB4_56:                               # %_Z9checkCuda10hipError_t.exit146
	movq	40(%rsp), %rsi
	movq	24(%rsp), %rdx
	leaq	20(%rsp), %rdi
	callq	hipEventElapsedTime
	testl	%eax, %eax
	jne	.LBB4_57
.LBB4_58:                               # %_Z9checkCuda10hipError_t.exit148
	movq	8(%rsp), %rsi
	movl	$16, %edx
	movq	%r14, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB4_59
.LBB4_60:                               # %_Z9checkCuda10hipError_t.exit150
	movss	20(%rsp), %xmm0                 # xmm0 = mem[0],zero,zero,zero
	movq	%r15, %rdi
	movq	%r14, %rsi
	movl	$4, %edx
	callq	_Z11postprocessPKfS0_if
	movl	$.L.str.21, %edi
	movl	$.L.str.24, %esi
	xorl	%eax, %eax
	callq	printf
	movl	$16, (%rsp)
	movl	$.L.str.7, %edi
	movl	$2, %esi
	movl	$2, %edx
	movl	$16, %ecx
	movl	$16, %r8d
	movl	$16, %r9d
	xorl	%eax, %eax
	callq	printf
	movl	$1, (%rsp)
	movl	$.L.str.8, %edi
	movl	$1, %esi
	movl	$1, %edx
	movl	$1, %ecx
	movl	$16, %r8d
	movl	$16, %r9d
	xorl	%eax, %eax
	callq	printf
	movq	8(%rsp), %rdi
	movl	$16, %edx
	xorl	%esi, %esi
	callq	hipMemset
	testl	%eax, %eax
	jne	.LBB4_61
.LBB4_62:                               # %_Z9checkCuda10hipError_t.exit152
	movq	%r13, %rdi
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB4_64
# %bb.63:
	movq	8(%rsp), %rdi
	movq	32(%rsp), %rsi
	callq	_Z48__device_stub__transposeNoBankConflictsRectanglePfPKf
.LBB4_64:
	movq	40(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	testl	%eax, %eax
	jne	.LBB4_65
.LBB4_66:                               # %_Z9checkCuda10hipError_t.exit154.preheader
	movl	$100, %ebp
.LBB4_67:                               # %_Z9checkCuda10hipError_t.exit154
                                        # =>This Inner Loop Header: Depth=1
	movq	%r13, %rdi
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB4_69
# %bb.68:                               #   in Loop: Header=BB4_67 Depth=1
	movq	8(%rsp), %rdi
	movq	32(%rsp), %rsi
	callq	_Z48__device_stub__transposeNoBankConflictsRectanglePfPKf
.LBB4_69:                               #   in Loop: Header=BB4_67 Depth=1
	decl	%ebp
	jne	.LBB4_67
# %bb.70:
	movq	24(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	testl	%eax, %eax
	jne	.LBB4_71
.LBB4_72:                               # %_Z9checkCuda10hipError_t.exit156
	movq	24(%rsp), %rdi
	callq	hipEventSynchronize
	testl	%eax, %eax
	jne	.LBB4_73
.LBB4_74:                               # %_Z9checkCuda10hipError_t.exit158
	movq	40(%rsp), %rsi
	movq	24(%rsp), %rdx
	leaq	20(%rsp), %rdi
	callq	hipEventElapsedTime
	testl	%eax, %eax
	jne	.LBB4_75
.LBB4_76:                               # %_Z9checkCuda10hipError_t.exit160
	movq	8(%rsp), %rsi
	movl	$16, %edx
	movq	%r14, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB4_77
.LBB4_78:                               # %_Z9checkCuda10hipError_t.exit162
	movss	20(%rsp), %xmm0                 # xmm0 = mem[0],zero,zero,zero
	movq	%r15, %rdi
	movq	%r14, %rsi
	movl	$4, %edx
	callq	_Z11postprocessPKfS0_if
	movq	40(%rsp), %rdi
	callq	hipEventDestroy
	testl	%eax, %eax
	jne	.LBB4_79
.LBB4_80:                               # %_Z9checkCuda10hipError_t.exit164
	movq	24(%rsp), %rdi
	callq	hipEventDestroy
	testl	%eax, %eax
	jne	.LBB4_81
.LBB4_82:                               # %_Z9checkCuda10hipError_t.exit166
	movq	8(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB4_83
.LBB4_84:                               # %_Z9checkCuda10hipError_t.exit168
	movq	48(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB4_85
.LBB4_86:                               # %_Z9checkCuda10hipError_t.exit170
	movq	32(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB4_87
.LBB4_88:                               # %_Z9checkCuda10hipError_t.exit172
	movq	%rbx, %rdi
	callq	free
	movq	%r14, %rdi
	callq	free
	movq	%r15, %rdi
	callq	free
	xorl	%eax, %eax
	addq	$1528, %rsp                     # imm = 0x5F8
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB4_3:
	.cfi_def_cfa_offset 1584
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.25, %esi
	movq	%r14, %rdi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	fprintf
	jmp	.LBB4_4
.LBB4_7:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.25, %esi
	movq	%rbx, %rdi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	fprintf
	jmp	.LBB4_8
.LBB4_9:
	movq	stderr(%rip), %r12
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.25, %esi
	movq	%r12, %rdi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	fprintf
	jmp	.LBB4_10
.LBB4_11:
	movq	stderr(%rip), %r12
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.25, %esi
	movq	%r12, %rdi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	fprintf
	jmp	.LBB4_12
.LBB4_13:
	movq	stderr(%rip), %r12
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.25, %esi
	movq	%r12, %rdi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	fprintf
	jmp	.LBB4_14
.LBB4_19:
	movq	stderr(%rip), %r12
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.25, %esi
	movq	%r12, %rdi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	fprintf
	jmp	.LBB4_20
.LBB4_21:
	movq	stderr(%rip), %r12
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.25, %esi
	movq	%r12, %rdi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	fprintf
	jmp	.LBB4_22
.LBB4_23:
	movq	stderr(%rip), %r12
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.25, %esi
	movq	%r12, %rdi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	fprintf
	jmp	.LBB4_24
.LBB4_25:
	movq	stderr(%rip), %r12
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.25, %esi
	movq	%r12, %rdi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	fprintf
	jmp	.LBB4_26
.LBB4_29:
	movq	stderr(%rip), %rbp
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.25, %esi
	movq	%rbp, %rdi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	fprintf
	jmp	.LBB4_30
.LBB4_35:
	movq	stderr(%rip), %rbp
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.25, %esi
	movq	%rbp, %rdi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	fprintf
	jmp	.LBB4_36
.LBB4_37:
	movq	stderr(%rip), %rbp
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.25, %esi
	movq	%rbp, %rdi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	fprintf
	jmp	.LBB4_38
.LBB4_39:
	movq	stderr(%rip), %rbp
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.25, %esi
	movq	%rbp, %rdi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	fprintf
	jmp	.LBB4_40
.LBB4_41:
	movq	stderr(%rip), %rbp
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.25, %esi
	movq	%rbp, %rdi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	fprintf
	jmp	.LBB4_42
.LBB4_43:
	movq	stderr(%rip), %rbp
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.25, %esi
	movq	%rbp, %rdi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	fprintf
	jmp	.LBB4_44
.LBB4_47:
	movq	stderr(%rip), %rbp
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.25, %esi
	movq	%rbp, %rdi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	fprintf
	jmp	.LBB4_48
.LBB4_53:
	movq	stderr(%rip), %rbp
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.25, %esi
	movq	%rbp, %rdi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	fprintf
	jmp	.LBB4_54
.LBB4_55:
	movq	stderr(%rip), %rbp
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.25, %esi
	movq	%rbp, %rdi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	fprintf
	jmp	.LBB4_56
.LBB4_57:
	movq	stderr(%rip), %rbp
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.25, %esi
	movq	%rbp, %rdi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	fprintf
	jmp	.LBB4_58
.LBB4_59:
	movq	stderr(%rip), %rbp
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.25, %esi
	movq	%rbp, %rdi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	fprintf
	jmp	.LBB4_60
.LBB4_61:
	movq	stderr(%rip), %rbp
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.25, %esi
	movq	%rbp, %rdi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	fprintf
	jmp	.LBB4_62
.LBB4_65:
	movq	stderr(%rip), %rbp
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.25, %esi
	movq	%rbp, %rdi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	fprintf
	jmp	.LBB4_66
.LBB4_71:
	movq	stderr(%rip), %r12
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.25, %esi
	movq	%r12, %rdi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	fprintf
	jmp	.LBB4_72
.LBB4_73:
	movq	stderr(%rip), %r12
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.25, %esi
	movq	%r12, %rdi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	fprintf
	jmp	.LBB4_74
.LBB4_75:
	movq	stderr(%rip), %r12
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.25, %esi
	movq	%r12, %rdi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	fprintf
	jmp	.LBB4_76
.LBB4_77:
	movq	stderr(%rip), %r12
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.25, %esi
	movq	%r12, %rdi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	fprintf
	jmp	.LBB4_78
.LBB4_79:
	movq	stderr(%rip), %r12
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.25, %esi
	movq	%r12, %rdi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	fprintf
	jmp	.LBB4_80
.LBB4_81:
	movq	stderr(%rip), %r12
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.25, %esi
	movq	%r12, %rdi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	fprintf
	jmp	.LBB4_82
.LBB4_83:
	movq	stderr(%rip), %r12
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.25, %esi
	movq	%r12, %rdi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	fprintf
	jmp	.LBB4_84
.LBB4_85:
	movq	stderr(%rip), %r12
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.25, %esi
	movq	%r12, %rdi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	fprintf
	jmp	.LBB4_86
.LBB4_87:
	movq	stderr(%rip), %r12
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.25, %esi
	movq	%r12, %rdi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	fprintf
	jmp	.LBB4_88
.Lfunc_end4:
	.size	main, .Lfunc_end4-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB5_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB5_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z23transposeNaiveRectanglePfPKf, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z27transposeCoalescedRectanglePfPKf, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z33transposeNoBankConflictsRectanglePfPKf, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end5:
	.size	__hip_module_ctor, .Lfunc_end5-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB6_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB6_2:
	retq
.Lfunc_end6:
	.size	__hip_module_dtor, .Lfunc_end6-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	.L.str.1,@object                # @.str.1
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.1:
	.asciz	" Failed: %d %f %f\n"
	.size	.L.str.1, 19

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	" Passed: %d %f %f\n"
	.size	.L.str.2, 19

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"%20.2f\n"
	.size	.L.str.3, 8

	.type	_Z23transposeNaiveRectanglePfPKf,@object # @_Z23transposeNaiveRectanglePfPKf
	.section	.rodata,"a",@progbits
	.globl	_Z23transposeNaiveRectanglePfPKf
	.p2align	3, 0x0
_Z23transposeNaiveRectanglePfPKf:
	.quad	_Z38__device_stub__transposeNaiveRectanglePfPKf
	.size	_Z23transposeNaiveRectanglePfPKf, 8

	.type	sizeX,@object                   # @sizeX
	.bss
	.globl	sizeX
	.p2align	2, 0x0
sizeX:
	.long	0                               # 0x0
	.size	sizeX, 4

	.type	sizeY,@object                   # @sizeY
	.globl	sizeY
	.p2align	2, 0x0
sizeY:
	.long	0                               # 0x0
	.size	sizeY, 4

	.type	remainderX,@object              # @remainderX
	.data
	.globl	remainderX
	.p2align	2, 0x0
remainderX:
	.long	2                               # 0x2
	.size	remainderX, 4

	.type	remainderY,@object              # @remainderY
	.globl	remainderY
	.p2align	2, 0x0
remainderY:
	.long	2                               # 0x2
	.size	remainderY, 4

	.type	_Z27transposeCoalescedRectanglePfPKf,@object # @_Z27transposeCoalescedRectanglePfPKf
	.section	.rodata,"a",@progbits
	.globl	_Z27transposeCoalescedRectanglePfPKf
	.p2align	3, 0x0
_Z27transposeCoalescedRectanglePfPKf:
	.quad	_Z42__device_stub__transposeCoalescedRectanglePfPKf
	.size	_Z27transposeCoalescedRectanglePfPKf, 8

	.type	_Z33transposeNoBankConflictsRectanglePfPKf,@object # @_Z33transposeNoBankConflictsRectanglePfPKf
	.globl	_Z33transposeNoBankConflictsRectanglePfPKf
	.p2align	3, 0x0
_Z33transposeNoBankConflictsRectanglePfPKf:
	.quad	_Z48__device_stub__transposeNoBankConflictsRectanglePfPKf
	.size	_Z33transposeNoBankConflictsRectanglePfPKf, 8

	.type	.L.str.4,@object                # @.str.4
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.4:
	.asciz	"\nDevice : %s\n"
	.size	.L.str.4, 14

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"%d.%d\n"
	.size	.L.str.5, 7

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"maxGridSize= %d, %d\n"
	.size	.L.str.6, 21

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"Matrix size: %d %d, Block size: %d %d, Tile size: %d %d\n"
	.size	.L.str.7, 57

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"dimGrid: %d %d %d. dimBlock: %d %d %d\n"
	.size	.L.str.8, 39

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"warp size: %d\n"
	.size	.L.str.9, 15

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"max threads per block: %d\n"
	.size	.L.str.10, 27

	.type	.L.str.11,@object               # @.str.11
.L.str.11:
	.asciz	"max thread dim z:%d y:%d x:%d\n"
	.size	.L.str.11, 31

	.type	.L.str.12,@object               # @.str.12
.L.str.12:
	.asciz	"max grid size z:%d y:%d x:%d\n"
	.size	.L.str.12, 30

	.type	.L.str.16,@object               # @.str.16
.L.str.16:
	.asciz	"%d "
	.size	.L.str.16, 4

	.type	.L.str.17,@object               # @.str.17
.L.str.17:
	.asciz	"\nmem_size=%d\n\n"
	.size	.L.str.17, 15

	.type	.L.str.18,@object               # @.str.18
.L.str.18:
	.asciz	"%35s%20s\n"
	.size	.L.str.18, 10

	.type	.L.str.19,@object               # @.str.19
.L.str.19:
	.asciz	"Routine"
	.size	.L.str.19, 8

	.type	.L.str.20,@object               # @.str.20
.L.str.20:
	.asciz	"Bandwidth (GB/s)"
	.size	.L.str.20, 17

	.type	.L.str.21,@object               # @.str.21
.L.str.21:
	.asciz	"%35s"
	.size	.L.str.21, 5

	.type	.L.str.22,@object               # @.str.22
.L.str.22:
	.asciz	"transposeNaiveRectangle "
	.size	.L.str.22, 25

	.type	.L.str.23,@object               # @.str.23
.L.str.23:
	.asciz	"transposeCoalescedRectangle"
	.size	.L.str.23, 28

	.type	.L.str.24,@object               # @.str.24
.L.str.24:
	.asciz	"transposeNobankConflictsRectangle"
	.size	.L.str.24, 34

	.type	.L.str.25,@object               # @.str.25
.L.str.25:
	.asciz	"CUDA Runtime Error: %s\n"
	.size	.L.str.25, 24

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z23transposeNaiveRectanglePfPKf"
	.size	.L__unnamed_1, 33

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z27transposeCoalescedRectanglePfPKf"
	.size	.L__unnamed_2, 37

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z33transposeNoBankConflictsRectanglePfPKf"
	.size	.L__unnamed_3, 43

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"\nref   res"
	.size	.Lstr, 11

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"clock rate(KHz):"
	.size	.Lstr.1, 17

	.type	.Lstr.2,@object                 # @str.2
.Lstr.2:
	.asciz	"Error! Block size is greater than maxThreadsPerBlock!"
	.size	.Lstr.2, 54

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z38__device_stub__transposeNaiveRectanglePfPKf
	.addrsig_sym _Z42__device_stub__transposeCoalescedRectanglePfPKf
	.addrsig_sym _Z48__device_stub__transposeNoBankConflictsRectanglePfPKf
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z23transposeNaiveRectanglePfPKf
	.addrsig_sym _Z27transposeCoalescedRectanglePfPKf
	.addrsig_sym _Z33transposeNoBankConflictsRectanglePfPKf
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z23transposeNaiveRectanglePfPKf ; -- Begin function _Z23transposeNaiveRectanglePfPKf
	.globl	_Z23transposeNaiveRectanglePfPKf
	.p2align	8
	.type	_Z23transposeNaiveRectanglePfPKf,@function
_Z23transposeNaiveRectanglePfPKf:       ; @_Z23transposeNaiveRectanglePfPKf
; %bb.0:
	v_and_b32_e32 v1, 0x3ff, v0
	v_bfe_u32 v2, v0, 10, 10
	s_mov_b32 s2, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshl_add_u32 v0, s14, 4, v1
	v_lshl_add_u32 v1, s15, 4, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_max_i32_e32 v2, v0, v1
	v_cmpx_gt_i32_e32 2, v2
	s_cbranch_execz .LBB0_2
; %bb.1:
	s_load_b128 s[0:3], s[0:1], 0x0
	v_lshl_add_u32 v2, v1, 1, v0
	v_lshl_add_u32 v0, v0, 1, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v3, 31, v2
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v2, vcc_lo, s2, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[0:1], v2, off
.LBB0_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z23transposeNaiveRectanglePfPKf
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 16
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z23transposeNaiveRectanglePfPKf, .Lfunc_end0-_Z23transposeNaiveRectanglePfPKf
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 180
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z27transposeCoalescedRectanglePfPKf ; -- Begin function _Z27transposeCoalescedRectanglePfPKf
	.globl	_Z27transposeCoalescedRectanglePfPKf
	.p2align	8
	.type	_Z27transposeCoalescedRectanglePfPKf,@function
_Z27transposeCoalescedRectanglePfPKf:   ; @_Z27transposeCoalescedRectanglePfPKf
; %bb.0:                                ; %.critedge
	s_load_b128 s[0:3], s[0:1], 0x0
	v_and_b32_e32 v1, 0x3ff, v0
	v_bfe_u32 v0, v0, 10, 10
	s_lshl_b32 s4, s14, 4
	s_lshl_b32 s5, s15, 4
	s_mov_b32 s6, exec_lo
	v_add_nc_u32_e32 v2, s4, v1
	v_add_nc_u32_e32 v3, s5, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_max_i32_e32 v4, v2, v3
	v_cmpx_gt_i32_e32 2, v4
	s_cbranch_execz .LBB1_2
; %bb.1:
	v_lshl_add_u32 v2, v3, 1, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s2, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
	global_load_b32 v2, v[2:3], off
	v_lshlrev_b32_e32 v3, 2, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_lshl_add_u32 v3, v0, 6, v3
	s_waitcnt vmcnt(0)
	ds_store_b32 v3, v2
.LBB1_2:                                ; %.critedge29
	s_or_b32 exec_lo, exec_lo, s6
	v_add_nc_u32_e32 v2, s5, v1
	v_add_nc_u32_e32 v3, s4, v0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_mov_b32 s2, exec_lo
	v_max_i32_e32 v4, v2, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e32 2, v4
	s_cbranch_execz .LBB1_4
; %bb.3:
	v_lshlrev_b32_e32 v0, 2, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v1, v1, 6, v0
	v_lshl_add_u32 v0, v3, 1, v2
	ds_load_b32 v2, v1
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[0:1], v2, off
.LBB1_4:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z27transposeCoalescedRectanglePfPKf
		.amdhsa_group_segment_fixed_size 1024
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 16
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z27transposeCoalescedRectanglePfPKf, .Lfunc_end1-_Z27transposeCoalescedRectanglePfPKf
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 272
; NumSgprs: 18
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 1024 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z33transposeNoBankConflictsRectanglePfPKf ; -- Begin function _Z33transposeNoBankConflictsRectanglePfPKf
	.globl	_Z33transposeNoBankConflictsRectanglePfPKf
	.p2align	8
	.type	_Z33transposeNoBankConflictsRectanglePfPKf,@function
_Z33transposeNoBankConflictsRectanglePfPKf: ; @_Z33transposeNoBankConflictsRectanglePfPKf
; %bb.0:                                ; %.critedge
	s_load_b128 s[0:3], s[0:1], 0x0
	v_and_b32_e32 v1, 0x3ff, v0
	v_bfe_u32 v0, v0, 10, 10
	s_lshl_b32 s4, s14, 4
	s_lshl_b32 s5, s15, 4
	s_mov_b32 s6, exec_lo
	v_add_nc_u32_e32 v2, s4, v1
	v_add_nc_u32_e32 v3, s5, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_max_i32_e32 v4, v2, v3
	v_cmpx_gt_i32_e32 2, v4
	s_cbranch_execz .LBB2_2
; %bb.1:
	v_lshl_add_u32 v2, v3, 1, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s2, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
	global_load_b32 v2, v[2:3], off
	v_lshlrev_b32_e32 v3, 2, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u32_u24 v3, 0x44, v0, v3
	s_waitcnt vmcnt(0)
	ds_store_b32 v3, v2
.LBB2_2:                                ; %.critedge29
	s_or_b32 exec_lo, exec_lo, s6
	v_add_nc_u32_e32 v2, s5, v1
	v_add_nc_u32_e32 v3, s4, v0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_mov_b32 s2, exec_lo
	v_max_i32_e32 v4, v2, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e32 2, v4
	s_cbranch_execz .LBB2_4
; %bb.3:
	v_lshlrev_b32_e32 v0, 2, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_mad_u32_u24 v1, 0x44, v1, v0
	v_lshl_add_u32 v0, v3, 1, v2
	ds_load_b32 v2, v1
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[0:1], v2, off
.LBB2_4:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z33transposeNoBankConflictsRectanglePfPKf
		.amdhsa_group_segment_fixed_size 1088
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 16
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z33transposeNoBankConflictsRectanglePfPKf, .Lfunc_end2-_Z33transposeNoBankConflictsRectanglePfPKf
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 280
; NumSgprs: 18
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 1088 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 16
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z23transposeNaiveRectanglePfPKf
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z23transposeNaiveRectanglePfPKf.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     4
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 1024
    .kernarg_segment_align: 8
    .kernarg_segment_size: 16
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z27transposeCoalescedRectanglePfPKf
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z27transposeCoalescedRectanglePfPKf.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     5
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 1088
    .kernarg_segment_align: 8
    .kernarg_segment_size: 16
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z33transposeNoBankConflictsRectanglePfPKf
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z33transposeNoBankConflictsRectanglePfPKf.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     5
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
