#include <stdio.h>
#include <stdlib.h>
#include <time.h>

__device__ float logsumexp(float a, float b)
{

	if(a <= -1e20f)
	{
		return b;
	}
	else
	if(b <= -1e20f)
	{
		return a;
	}

	/*float diff = a-b;
	if (diff < -20.0f)
	{
		return b;
	}
	else
	if (diff > 20.0f)
	{
		return a;
	}*/
	

	if(a > b)
	{
		return a + log(1.0f+exp(b-a));
	}
	else
	{
		return b + log(1.0f+exp(a-b));
	}
}

__device__ float safeadd(float a, float b)
{
	if(a <= -1e20f)
	{
		return b;
	}
	else
	if(b <= -1e20f)
	{
		return a;
	}
	return a+b;
}

/*
push!(rules, Rule('S', "LS",0.868534, 3))
    push!(rules, Rule('S', "s",0.117609877998, 1))
    push!(rules, Rule('S', "dFd",0.013856122002, 2))
    push!(rules, Rule('F', "dFd",0.787640, 2))
    push!(rules, Rule('F', "LS",0.21236, 3))
    push!(rules, Rule('L', "s",0.894603, 1))
    push!(rules, Rule('L', "dFd",0.105397, 2))
    type1rules = Rule[rules[2],rules[6]]
    type2rules = Rule[rules[3],rules[4],rules[7]]
    type3rules = Rule[rules[1],rules[5]]
    ruleindex = Dict('S' => 1, 'F' => 2, 'L' => 3)
*/

__constant__ int S = 0;
__constant__ int F = 1;
__constant__ int L = 2;
	
__constant__ float r1logprob = -0.14094854611f;
__constant__ float r2logprob = -2.14038225046f;
__constant__ float r3logprob = -4.27902812221f;
__constant__ float r4logprob = -0.2387141463f;
__constant__ float r5logprob = -1.549472331f;
__constant__ float r6logprob = -0.11137523453f;
__constant__ float r7logprob = -2.25002110628f;

/*
__global__ void initialiseinside(float *inside, const float* unpairedlogprobs, int len)
{
	int i = blockIdx.x*blockDim.x + threadIdx.x;
	if(i < len)
	{
		for(int j=0 ; j < len ; j++)
		{
			if(i == j)
			{
				inside[S*len*len + i*len + j] = unpairedlogprobs[j] + r2logprob;
				inside[L*len*len + i*len + j] = unpairedlogprobs[j] + r6logprob;
				inside[F*len*len + i*len + j] = -1e20f;
			}
			else
			{
				inside[S*len*len + i*len + j] = -1e20f;
				inside[L*len*len + i*len + j] = -1e20f;
				inside[F*len*len + i*len + j] = -1e20f;
			}
		}
	}
}

__global__ void insidealgorithm(float* inside, const float* pairedlogprobs, const float* unpairedlogprobs, const int b, const int len, const float BT)
{	
	int j = blockIdx.x*blockDim.x + threadIdx.x;
	if (j < len-b)
	{		
		int index = 0;
		// type 3 rules

		// rule 1
		float tmp = -1e20f;
		for(int h=j ; h < j+b ; h++)
		{			
			tmp = logsumexp(tmp, inside[L*len*len + j*len + h] + inside[S*len*len + (h+1)*len + (j+b)]);
		}
		index = S*len*len + j*len + j+b;
		inside[index] = logsumexp(inside[index], r1logprob + tmp);

		// rule 5
		index = F*len*len + j*len + j+b;
		inside[index] = logsumexp(inside[index], r5logprob + tmp);

		// type 2 rules

		float v = pairedlogprobs[j*len+j+b]*BT + inside[F*len*len+(j+1)*len+ (j+b-1)];

		// rule 3
		index = S*len*len + j*len + j+b;
		inside[index] = logsumexp(inside[index], r3logprob + v);

		// rule 4
		index = F*len*len + j*len + j+b;
		inside[index] = logsumexp(inside[index], r4logprob + v);

		// rule 7
		index = L*len*len + j*len + j+b;
		inside[index] = logsumexp(inside[index], r7logprob + v);  
 	}
	
}

__global__ void insidez(const float* inside, float* Z, const int len)
{
	int j = blockIdx.x*blockDim.x + threadIdx.x;
	if(j == 0)
	{
		Z[j] = inside[len-1];
	}
}*/


/*
__global__ void initialiseinside(float *inside, const float* unpairedlogprobs, int len)
{
	int i = blockIdx.x*blockDim.x + threadIdx.x;
	if(i < len)
	{
		for(int j=0 ; j < len ; j++)
		{
			if(i == j)
			{
				inside[i*len*3 + j*3 + S] = unpairedlogprobs[j] + r2logprob;
				inside[i*len*3 + j*3 + L] = unpairedlogprobs[j] + r6logprob;
				inside[i*len*3 + j*3 + F] = -1e20f;
			}
			else
			{
				inside[i*len*3 + j*3 + S] = -1e20f;
				inside[i*len*3 + j*3 + L] = -1e20f;
				inside[i*len*3 + j*3 + F] = -1e20f;
			}
		}
	}
}

__global__ void insidealgorithm(float* inside, const float* pairedlogprobs, const float* unpairedlogprobs, const int b, const int len, const float BT)
{	
	int j = blockIdx.x*blockDim.x + threadIdx.x;
	if (j < len-b)
	{		
		int index = 0;
		// type 3 rules

		// rule 1
		float tmp = -1e20f;
		for(int h=j ; h < j+b ; h++)
		{			
			tmp = logsumexp(tmp, inside[j*len*3 + h*3 + L] + inside[(h+1)*len*3 + (j+b)*3 + S]);
		}
		index = j*len*3 + (j+b)*3 + S;
		inside[index] = logsumexp(inside[index], r1logprob + tmp);

		// rule 5
		index = j*len*3 + (j+b)*3 + F;
		inside[index] = logsumexp(inside[index], r5logprob + tmp);

		// type 2 rules

		float v = pairedlogprobs[j*len+j+b] + inside[(j+1)*len*3 + (j+b-1)*3 + F];

		// rule 3
		index = j*len*3 + (j+b)*3 + S;
		inside[index] = logsumexp(inside[index], r3logprob + v);

		// rule 4
		index = j*len*3 + (j+b)*3 + F;
		inside[index] = logsumexp(inside[index], r4logprob + v);

		// rule 7
		index = j*len*3 + (j+b)*3 + L;
		inside[index] = logsumexp(inside[index], r7logprob + v);  
 	}
	
}

__global__ void insidez(const float* inside, float* Z, const int len)
{
	int j = blockIdx.x*blockDim.x + threadIdx.x;
	if(j == 0)
	{
		Z[j] = inside[(len-1)*3];
	}
}*/


__global__ void initialiseinside(float* insideS, float* insideL, float* insideF, const float* unpairedlogprobs, int len)
{
	int i = blockIdx.x*blockDim.x + threadIdx.x;
	if(i < len)
	{
		for(int j=0 ; j < len ; j++)
		{
			if(i == j)
			{
				insideS[i*len + j] = unpairedlogprobs[j] + r2logprob;
				insideL[i*len + j] = unpairedlogprobs[j] + r6logprob;
				insideF[i*len + j] = -1e20f;
			}
			else
			{
				insideS[i*len + j] = -1e20f;
				insideL[i*len + j] = -1e20f;
				insideF[i*len + j] = -1e20f;
			}
		}
	}
}

__global__ void insidealgorithm(float* insideS, float* insideL, float* insideF, const float* pairedlogprobs, const float* unpairedlogprobs, const int b, const int len, const float BT)
{	
	int j = blockIdx.x*blockDim.x + threadIdx.x;
	if (j < len-b)
	{		
		int index = j*len + j+b;
		// type 3 rules

		// rule 1
		float tmp = -1e20f;
		for(int h=j ; h < j+b ; h++)
		{			
			tmp = logsumexp(tmp, insideL[j*len + h] + insideS[(h+1)*len + (j+b)]);
		}
		insideS[index] = logsumexp(insideS[index], r1logprob + tmp);

		// rule 5
		insideF[index] = logsumexp(insideF[index], r5logprob + tmp);

		// type 2 rules

		float v = pairedlogprobs[index]*BT + insideF[(j+1)*len+ (j+b-1)];

		// rule 3
		insideS[index] = logsumexp(insideS[index], r3logprob + v);

		// rule 4
		insideF[index] = logsumexp(insideF[index], r4logprob + v);

		// rule 7
		insideL[index] = logsumexp(insideL[index], r7logprob + v);  
 	}
	
}

__global__ void posteriordecoding(float* ematrix, int* smatrix,  const float* pairprobs, const float* singleprobs, const int datalen, const int diag, const float alpha)
{	
	int i = blockIdx.x*blockDim.x + threadIdx.x;
	if (i < datalen-diag)
	{		
		int j = i + diag;
		float e1 = singleprobs[i] + ematrix[(i+1)*datalen + j];
		float e2 = alpha*pairprobs[i*datalen+j] + ematrix[(i+1)*datalen + j-1];
		float maxe3 = -1e10;
		int maxk = 0;
		for(int k=i+1 ; k <= j-1 ; k++)
		{
			float v = alpha*pairprobs[i*datalen + k] + ematrix[(i+1)*datalen + k-1] + ematrix[(k+1)*datalen + j];
			if(v > maxe3)
			{
				maxe3 = v;
				maxk = k;
			}
		}
		
		float maxval = e1;
		smatrix[i*datalen + j] = -1;
		if(e2 > maxval)
		{
			maxval = e2;
			smatrix[i*datalen + j] = -2;
		}
		if(maxe3 > maxval)
		{
			maxval = maxe3;
			smatrix[i*datalen + j]  = maxk+1;
		}		
		ematrix[i*datalen + j] = maxval;
 	}
	
}

__global__ void insidez(const float* insideS, float* Z, const int len)
{
	int j = blockIdx.x*blockDim.x + threadIdx.x;
	if(j == 0)
	{
		Z[j] = insideS[len-1];
	}
}

/*
__global__ void initialiseinside(float* insideS, float* insideL, float* insideF, const float* unpairedlogprobs, int len, const int stride)
{
	int i = blockIdx.x*blockDim.x + threadIdx.x;
	if(i < len)
	{
		for(int j=0 ; j < len ; j++)
		{
			if(i == j)
			{
				insideS[i*stride + j] = unpairedlogprobs[j] + r2logprob;
				insideL[i*stride + j] = unpairedlogprobs[j] + r6logprob;
				insideF[i*stride + j] = -1e20f;
			}
			else
			{
				insideS[i*stride + j] = -1e20f;
				insideL[i*stride + j] = -1e20f;
				insideF[i*stride + j] = -1e20f;
			}
		}
	}
}

__global__ void insidealgorithm(float* insideS, float* insideL, float* insideF, const float* pairedlogprobs, const float* unpairedlogprobs, const int b, const int len, const int stride, const float BT)
{	
	int j = blockIdx.x*blockDim.x + threadIdx.x;
	if (j < len-b)
	{		
		int index = j*stride + j+b;
		// type 3 rules

		// rule 1
		float tmp = -1e20f;
		for(int h=j ; h < j+b ; h++)
		{			
			tmp = logsumexp(tmp, insideL[j*stride + h] + insideS[(h+1)*stride + (j+b)]);
		}
		insideS[index] = logsumexp(insideS[index], r1logprob + tmp);

		// rule 5
		insideF[index] = logsumexp(insideF[index], r5logprob + tmp);

		// type 2 rules

		float v = pairedlogprobs[j*len + j+b]*BT + insideF[(j+1)*stride + (j+b-1)];

		// rule 3
		insideS[index] = logsumexp(insideS[index], r3logprob + v);

		// rule 4
		insideF[index] = logsumexp(insideF[index], r4logprob + v);

		// rule 7
		insideL[index] = logsumexp(insideL[index], r7logprob + v);  
 	}
	
}

__global__ void insidez(const float* insideS, float* Z, const int len)
{
	int j = blockIdx.x*blockDim.x + threadIdx.x;
	if(j == 0)
	{
		Z[j] = insideS[len-1];
	}
}*/


/*
push!(rules, Rule('S', "LS",0.868534, 3))
    push!(rules, Rule('S', "s",0.117609877998, 1))
    push!(rules, Rule('S', "dFd",0.013856122002, 2))
    push!(rules, Rule('F', "dFd",0.787640, 2))
    push!(rules, Rule('F', "LS",0.21236, 3))
    push!(rules, Rule('L', "s",0.894603, 1))
    push!(rules, Rule('L', "dFd",0.105397, 2))
    type1rules = Rule[rules[2],rules[6]]
    type2rules = Rule[rules[3],rules[4],rules[7]]
    type3rules = Rule[rules[1],rules[5]]
    ruleindex = Dict('S' => 1, 'F' => 2, 'L' => 3)
*/
__global__ void outsidealgorithm(float* outside, const float* inside, const float* pairedlogprobs, const float* unpairedlogprobs, const int b, const int len, const float BT)
{	
	int j = blockIdx.x*blockDim.x + threadIdx.x;
	if (j < len - b)
	{
		int index = 0;
		// type 3 rules

		// rule 1 Rule('S', "LS",0.868534, 3))
		float tmp = -1e20f;
		for (int k = j + b + 1; k < len; k++)
		{
			tmp = logsumexp(tmp, outside[S*len*len + j*len + k] + inside[S*len*len + (j+b+1)*len + k]);
		}
		index = L*len*len + j*len + j+b;
		outside[index] = logsumexp(outside[index], r1logprob*BT + tmp);

		tmp = -1e20f;
		for (int k = 0 ; k < j ; k++)
		{
			tmp = logsumexp(tmp, outside[S*len*len + k*len + j+b] + inside[L*len*len + k*len + j-1]);
		}
		index = S*len*len + j*len + j+b;
		outside[index] = logsumexp(outside[index], r1logprob*BT + tmp);

		// rule 5 Rule('F', "LS",0.21236, 3)
		tmp = -1e20f;
		for (int k = j + b + 1; k < len; k++)
		{
			tmp = logsumexp(tmp, outside[F*len*len + j*len + k] + inside[S*len*len + (j+b+1)*len + k]);
		}
		index = L*len*len + j*len + j+b;
		outside[index] = logsumexp(outside[index], r5logprob*BT + tmp);

		tmp = -1e20f;
		for (int k = 0 ; k < j ; k++)
		{
			tmp = logsumexp(tmp, outside[F*len*len + k*len + j+b] + inside[L*len*len + k*len + j-1]);
		}
		index = S*len*len + j*len + j+b;
		outside[index] = logsumexp(outside[index], r5logprob*BT + tmp);
			
		// type 2 rules
		if ((j>=1) && (j+b+1<len))
		{
			float v = pairedlogprobs[(j-1)*len+(j+b+1)]*BT;
			index = F*len*len + j*len + j+b;
			// rule 3 Rule('S', "dFd",0.013856122002, 2)
			outside[index] = logsumexp(outside[index], r3logprob*BT + outside[S*len*len + (j-1)*len + j+b+1] + v);

			// rule 4 Rule('F', "dFd",0.787640, 2)
			outside[index] = logsumexp(outside[index], r4logprob*BT + outside[F*len*len + (j-1)*len + j+b+1] + v);

			// rule 7 Rule('L', "dFd",0.105397, 2)
			outside[index] = logsumexp(outside[index], r7logprob*BT + outside[L*len*len + (j-1)*len + j+b+1] + v);
		}
 	}
	
}
/*
int main()
{
  int len = 8000;
  int N = len;
  float* inside = (float*)malloc(3*len*len*sizeof(float));
  float* pairedlogprobs = (float*)malloc(len*len*sizeof(float));
  float* unpairedlogprobs = (float*)malloc(len*sizeof(float));

  float* d_inside;
  float* d_pairedlogprobs;
  float* d_unpairedlogprobs;
  cudaMalloc(&d_inside, 3*len*len*sizeof(float)); 
  cudaMalloc(&d_pairedlogprobs, len*len*sizeof(float)); 
  cudaMalloc(&d_unpairedlogprobs, len*len*sizeof(float));


  cudaMemcpy(d_inside, inside, 3*len*len*sizeof(float), cudaMemcpyHostToDevice);
  cudaMemcpy(d_pairedlogprobs, pairedlogprobs, len*len*sizeof(float), cudaMemcpyHostToDevice);
  cudaMemcpy(d_unpairedlogprobs, unpairedlogprobs, len*sizeof(float), cudaMemcpyHostToDevice);

  for(int b=1 ; b < len ; b++)
  {	
  	insidealgorithm<<<(N+511)/512, 512>>>(d_inside, d_pairedlogprobs, d_unpairedlogprobs, b, len, 1.0);
  }

  int code = cudaMemcpy(inside, d_inside, 3*len*len*sizeof(float), cudaMemcpyDeviceToHost);
  printf("exitcode %d\n", code);
  printf("Z %f\n", inside[len-1]);
}*/


	.file	"tmpxft_003b3062_00000000-6_inside.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2031:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2031:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z9logsumexpff
	.type	_Z9logsumexpff, @function
_Z9logsumexpff:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2027:
	.size	_Z9logsumexpff, .-_Z9logsumexpff
	.globl	_Z7safeaddff
	.type	_Z7safeaddff, @function
_Z7safeaddff:
.LFB2181:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	pushq	%rax
	.cfi_def_cfa_offset 16
	call	_Z9logsumexpff
	.cfi_endproc
.LFE2181:
	.size	_Z7safeaddff, .-_Z7safeaddff
	.globl	_Z44__device_stub__Z16initialiseinsidePfS_S_PKfiPfS_S_PKfi
	.type	_Z44__device_stub__Z16initialiseinsidePfS_S_PKfiPfS_S_PKfi, @function
_Z44__device_stub__Z16initialiseinsidePfS_S_PKfiPfS_S_PKfi:
.LFB2053:
	.cfi_startproc
	endbr64
	subq	$168, %rsp
	.cfi_def_cfa_offset 176
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	56(%rsp), %rcx
	movl	%r8d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 144(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L6
	pushq	56(%rsp)
	.cfi_def_cfa_offset 184
	leaq	_Z16initialiseinsidePfS_S_PKfi(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 192
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L6:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L8
	call	__stack_chk_fail@PLT
.L8:
	addq	$168, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2053:
	.size	_Z44__device_stub__Z16initialiseinsidePfS_S_PKfiPfS_S_PKfi, .-_Z44__device_stub__Z16initialiseinsidePfS_S_PKfiPfS_S_PKfi
	.globl	_Z16initialiseinsidePfS_S_PKfi
	.type	_Z16initialiseinsidePfS_S_PKfi, @function
_Z16initialiseinsidePfS_S_PKfi:
.LFB2054:
	.cfi_startproc
	endbr64
	jmp	_Z44__device_stub__Z16initialiseinsidePfS_S_PKfiPfS_S_PKfi
	.cfi_endproc
.LFE2054:
	.size	_Z16initialiseinsidePfS_S_PKfi, .-_Z16initialiseinsidePfS_S_PKfi
	.globl	_Z48__device_stub__Z15insidealgorithmPfS_S_PKfS1_iifPfS_S_PKfS1_iif
	.type	_Z48__device_stub__Z15insidealgorithmPfS_S_PKfS1_iifPfS_S_PKfS1_iif, @function
_Z48__device_stub__Z15insidealgorithmPfS_S_PKfS1_iifPfS_S_PKfS1_iif:
.LFB2055:
	.cfi_startproc
	endbr64
	subq	$200, %rsp
	.cfi_def_cfa_offset 208
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	64(%rsp), %rcx
	movq	%r8, 8(%rsp)
	movl	%r9d, 4(%rsp)
	movss	%xmm0, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 184(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	208(%rsp), %rax
	movq	%rax, 168(%rsp)
	movq	%rsp, %rax
	movq	%rax, 176(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L12
	pushq	64(%rsp)
	.cfi_def_cfa_offset 216
	leaq	_Z15insidealgorithmPfS_S_PKfS1_iif(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 224
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 216
	popq	%rdx
	.cfi_def_cfa_offset 208
.L12:
	movq	184(%rsp), %rax
	subq	%fs:40, %rax
	je	.L14
	call	__stack_chk_fail@PLT
.L14:
	addq	$200, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2055:
	.size	_Z48__device_stub__Z15insidealgorithmPfS_S_PKfS1_iifPfS_S_PKfS1_iif, .-_Z48__device_stub__Z15insidealgorithmPfS_S_PKfS1_iifPfS_S_PKfS1_iif
	.globl	_Z15insidealgorithmPfS_S_PKfS1_iif
	.type	_Z15insidealgorithmPfS_S_PKfS1_iif, @function
_Z15insidealgorithmPfS_S_PKfS1_iif:
.LFB2056:
	.cfi_startproc
	endbr64
	jmp	_Z48__device_stub__Z15insidealgorithmPfS_S_PKfS1_iifPfS_S_PKfS1_iif
	.cfi_endproc
.LFE2056:
	.size	_Z15insidealgorithmPfS_S_PKfS1_iif, .-_Z15insidealgorithmPfS_S_PKfS1_iif
	.globl	_Z48__device_stub__Z17posteriordecodingPfPiPKfS2_iifPfPiPKfS2_iif
	.type	_Z48__device_stub__Z17posteriordecodingPfPiPKfS2_iifPfPiPKfS2_iif, @function
_Z48__device_stub__Z17posteriordecodingPfPiPKfS2_iifPfPiPKfS2_iif:
.LFB2057:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	56(%rsp), %rcx
	movl	%r8d, 12(%rsp)
	movl	%r9d, 8(%rsp)
	movss	%xmm0, 4(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L17
	pushq	56(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z17posteriordecodingPfPiPKfS2_iif(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 208
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L17:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L19
	call	__stack_chk_fail@PLT
.L19:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2057:
	.size	_Z48__device_stub__Z17posteriordecodingPfPiPKfS2_iifPfPiPKfS2_iif, .-_Z48__device_stub__Z17posteriordecodingPfPiPKfS2_iifPfPiPKfS2_iif
	.globl	_Z17posteriordecodingPfPiPKfS2_iif
	.type	_Z17posteriordecodingPfPiPKfS2_iif, @function
_Z17posteriordecodingPfPiPKfS2_iif:
.LFB2058:
	.cfi_startproc
	endbr64
	jmp	_Z48__device_stub__Z17posteriordecodingPfPiPKfS2_iifPfPiPKfS2_iif
	.cfi_endproc
.LFE2058:
	.size	_Z17posteriordecodingPfPiPKfS2_iif, .-_Z17posteriordecodingPfPiPKfS2_iif
	.globl	_Z30__device_stub__Z7insidezPKfPfiPKfPfi
	.type	_Z30__device_stub__Z7insidezPKfPfiPKfPfi, @function
_Z30__device_stub__Z7insidezPKfPfiPKfPfi:
.LFB2059:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L22
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z7insidezPKfPfi(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L22:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L24
	call	__stack_chk_fail@PLT
.L24:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2059:
	.size	_Z30__device_stub__Z7insidezPKfPfiPKfPfi, .-_Z30__device_stub__Z7insidezPKfPfiPKfPfi
	.globl	_Z7insidezPKfPfi
	.type	_Z7insidezPKfPfi, @function
_Z7insidezPKfPfi:
.LFB2060:
	.cfi_startproc
	endbr64
	jmp	_Z30__device_stub__Z7insidezPKfPfiPKfPfi
	.cfi_endproc
.LFE2060:
	.size	_Z7insidezPKfPfi, .-_Z7insidezPKfPfi
	.globl	_Z48__device_stub__Z16outsidealgorithmPfPKfS1_S1_iifPfPKfS1_S1_iif
	.type	_Z48__device_stub__Z16outsidealgorithmPfPKfS1_S1_iifPfPKfS1_S1_iif, @function
_Z48__device_stub__Z16outsidealgorithmPfPKfS1_S1_iifPfPKfS1_S1_iif:
.LFB2061:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	56(%rsp), %rcx
	movl	%r8d, 12(%rsp)
	movl	%r9d, 8(%rsp)
	movss	%xmm0, 4(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L27
	pushq	56(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z16outsidealgorithmPfPKfS1_S1_iif(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 208
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L27:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L29
	call	__stack_chk_fail@PLT
.L29:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2061:
	.size	_Z48__device_stub__Z16outsidealgorithmPfPKfS1_S1_iifPfPKfS1_S1_iif, .-_Z48__device_stub__Z16outsidealgorithmPfPKfS1_S1_iifPfPKfS1_S1_iif
	.globl	_Z16outsidealgorithmPfPKfS1_S1_iif
	.type	_Z16outsidealgorithmPfPKfS1_S1_iif, @function
_Z16outsidealgorithmPfPKfS1_S1_iif:
.LFB2062:
	.cfi_startproc
	endbr64
	jmp	_Z48__device_stub__Z16outsidealgorithmPfPKfS1_S1_iifPfPKfS1_S1_iif
	.cfi_endproc
.LFE2062:
	.size	_Z16outsidealgorithmPfPKfS1_S1_iif, .-_Z16outsidealgorithmPfPKfS1_S1_iif
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z16outsidealgorithmPfPKfS1_S1_iif"
.LC1:
	.string	"_Z7insidezPKfPfi"
.LC2:
	.string	"_Z17posteriordecodingPfPiPKfS2_iif"
.LC3:
	.string	"_Z15insidealgorithmPfS_S_PKfS1_iif"
.LC4:
	.string	"_Z16initialiseinsidePfS_S_PKfi"
.LC5:
	.string	"S"
.LC6:
	.string	"F"
.LC7:
	.string	"L"
.LC8:
	.string	"r1logprob"
.LC9:
	.string	"r2logprob"
.LC10:
	.string	"r3logprob"
.LC11:
	.string	"r4logprob"
.LC12:
	.string	"r5logprob"
.LC13:
	.string	"r6logprob"
.LC14:
	.string	"r7logprob"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2064:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z16outsidealgorithmPfPKfS1_S1_iif(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC1(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z7insidezPKfPfi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC2(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z17posteriordecodingPfPiPKfS2_iif(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC3(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z15insidealgorithmPfS_S_PKfS1_iif(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC4(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z16initialiseinsidePfS_S_PKfi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC5(%rip), %rdx
	movl	$4, %r9d
	leaq	_ZL1S(%rip), %rsi
	pushq	$1
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$1
	.cfi_def_cfa_offset 32
	leaq	.LC6(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$4, %r9d
	leaq	_ZL1F(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$1
	.cfi_def_cfa_offset 32
	leaq	.LC7(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$4, %r9d
	leaq	_ZL1L(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$1
	.cfi_def_cfa_offset 32
	leaq	.LC8(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$4, %r9d
	leaq	_ZL9r1logprob(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$1
	.cfi_def_cfa_offset 32
	leaq	.LC9(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$4, %r9d
	leaq	_ZL9r2logprob(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r11
	.cfi_def_cfa_offset 24
	popq	%rax
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$1
	.cfi_def_cfa_offset 32
	leaq	.LC10(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$4, %r9d
	leaq	_ZL9r3logprob(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$1
	.cfi_def_cfa_offset 32
	leaq	.LC11(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$4, %r9d
	leaq	_ZL9r4logprob(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$1
	.cfi_def_cfa_offset 32
	leaq	.LC12(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$4, %r9d
	leaq	_ZL9r5logprob(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$1
	.cfi_def_cfa_offset 32
	leaq	.LC13(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$4, %r9d
	leaq	_ZL9r6logprob(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$1
	.cfi_def_cfa_offset 32
	leaq	.LC14(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movl	$4, %r9d
	movq	%rdx, %rcx
	leaq	_ZL9r7logprob(%rip), %rsi
	call	__cudaRegisterVar@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	popq	%r11
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2064:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.local	_ZL9r7logprob
	.comm	_ZL9r7logprob,4,4
	.local	_ZL9r6logprob
	.comm	_ZL9r6logprob,4,4
	.local	_ZL9r5logprob
	.comm	_ZL9r5logprob,4,4
	.local	_ZL9r4logprob
	.comm	_ZL9r4logprob,4,4
	.local	_ZL9r3logprob
	.comm	_ZL9r3logprob,4,4
	.local	_ZL9r2logprob
	.comm	_ZL9r2logprob,4,4
	.local	_ZL9r1logprob
	.comm	_ZL9r1logprob,4,4
	.local	_ZL1L
	.comm	_ZL1L,4,4
	.local	_ZL1F
	.comm	_ZL1F,4,4
	.local	_ZL1S
	.comm	_ZL1S,4,4
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <time.h>

__device__ float logsumexp(float a, float b)
{

	if(a <= -1e20f)
	{
		return b;
	}
	else
	if(b <= -1e20f)
	{
		return a;
	}

	/*float diff = a-b;
	if (diff < -20.0f)
	{
		return b;
	}
	else
	if (diff > 20.0f)
	{
		return a;
	}*/
	

	if(a > b)
	{
		return a + log(1.0f+exp(b-a));
	}
	else
	{
		return b + log(1.0f+exp(a-b));
	}
}

__device__ float safeadd(float a, float b)
{
	if(a <= -1e20f)
	{
		return b;
	}
	else
	if(b <= -1e20f)
	{
		return a;
	}
	return a+b;
}

/*
push!(rules, Rule('S', "LS",0.868534, 3))
    push!(rules, Rule('S', "s",0.117609877998, 1))
    push!(rules, Rule('S', "dFd",0.013856122002, 2))
    push!(rules, Rule('F', "dFd",0.787640, 2))
    push!(rules, Rule('F', "LS",0.21236, 3))
    push!(rules, Rule('L', "s",0.894603, 1))
    push!(rules, Rule('L', "dFd",0.105397, 2))
    type1rules = Rule[rules[2],rules[6]]
    type2rules = Rule[rules[3],rules[4],rules[7]]
    type3rules = Rule[rules[1],rules[5]]
    ruleindex = Dict('S' => 1, 'F' => 2, 'L' => 3)
*/

__constant__ int S = 0;
__constant__ int F = 1;
__constant__ int L = 2;
	
__constant__ float r1logprob = -0.14094854611f;
__constant__ float r2logprob = -2.14038225046f;
__constant__ float r3logprob = -4.27902812221f;
__constant__ float r4logprob = -0.2387141463f;
__constant__ float r5logprob = -1.549472331f;
__constant__ float r6logprob = -0.11137523453f;
__constant__ float r7logprob = -2.25002110628f;

/*
__global__ void initialiseinside(float *inside, const float* unpairedlogprobs, int len)
{
	int i = blockIdx.x*blockDim.x + threadIdx.x;
	if(i < len)
	{
		for(int j=0 ; j < len ; j++)
		{
			if(i == j)
			{
				inside[S*len*len + i*len + j] = unpairedlogprobs[j] + r2logprob;
				inside[L*len*len + i*len + j] = unpairedlogprobs[j] + r6logprob;
				inside[F*len*len + i*len + j] = -1e20f;
			}
			else
			{
				inside[S*len*len + i*len + j] = -1e20f;
				inside[L*len*len + i*len + j] = -1e20f;
				inside[F*len*len + i*len + j] = -1e20f;
			}
		}
	}
}

__global__ void insidealgorithm(float* inside, const float* pairedlogprobs, const float* unpairedlogprobs, const int b, const int len, const float BT)
{	
	int j = blockIdx.x*blockDim.x + threadIdx.x;
	if (j < len-b)
	{		
		int index = 0;
		// type 3 rules

		// rule 1
		float tmp = -1e20f;
		for(int h=j ; h < j+b ; h++)
		{			
			tmp = logsumexp(tmp, inside[L*len*len + j*len + h] + inside[S*len*len + (h+1)*len + (j+b)]);
		}
		index = S*len*len + j*len + j+b;
		inside[index] = logsumexp(inside[index], r1logprob + tmp);

		// rule 5
		index = F*len*len + j*len + j+b;
		inside[index] = logsumexp(inside[index], r5logprob + tmp);

		// type 2 rules

		float v = pairedlogprobs[j*len+j+b]*BT + inside[F*len*len+(j+1)*len+ (j+b-1)];

		// rule 3
		index = S*len*len + j*len + j+b;
		inside[index] = logsumexp(inside[index], r3logprob + v);

		// rule 4
		index = F*len*len + j*len + j+b;
		inside[index] = logsumexp(inside[index], r4logprob + v);

		// rule 7
		index = L*len*len + j*len + j+b;
		inside[index] = logsumexp(inside[index], r7logprob + v);  
 	}
	
}

__global__ void insidez(const float* inside, float* Z, const int len)
{
	int j = blockIdx.x*blockDim.x + threadIdx.x;
	if(j == 0)
	{
		Z[j] = inside[len-1];
	}
}*/


/*
__global__ void initialiseinside(float *inside, const float* unpairedlogprobs, int len)
{
	int i = blockIdx.x*blockDim.x + threadIdx.x;
	if(i < len)
	{
		for(int j=0 ; j < len ; j++)
		{
			if(i == j)
			{
				inside[i*len*3 + j*3 + S] = unpairedlogprobs[j] + r2logprob;
				inside[i*len*3 + j*3 + L] = unpairedlogprobs[j] + r6logprob;
				inside[i*len*3 + j*3 + F] = -1e20f;
			}
			else
			{
				inside[i*len*3 + j*3 + S] = -1e20f;
				inside[i*len*3 + j*3 + L] = -1e20f;
				inside[i*len*3 + j*3 + F] = -1e20f;
			}
		}
	}
}

__global__ void insidealgorithm(float* inside, const float* pairedlogprobs, const float* unpairedlogprobs, const int b, const int len, const float BT)
{	
	int j = blockIdx.x*blockDim.x + threadIdx.x;
	if (j < len-b)
	{		
		int index = 0;
		// type 3 rules

		// rule 1
		float tmp = -1e20f;
		for(int h=j ; h < j+b ; h++)
		{			
			tmp = logsumexp(tmp, inside[j*len*3 + h*3 + L] + inside[(h+1)*len*3 + (j+b)*3 + S]);
		}
		index = j*len*3 + (j+b)*3 + S;
		inside[index] = logsumexp(inside[index], r1logprob + tmp);

		// rule 5
		index = j*len*3 + (j+b)*3 + F;
		inside[index] = logsumexp(inside[index], r5logprob + tmp);

		// type 2 rules

		float v = pairedlogprobs[j*len+j+b] + inside[(j+1)*len*3 + (j+b-1)*3 + F];

		// rule 3
		index = j*len*3 + (j+b)*3 + S;
		inside[index] = logsumexp(inside[index], r3logprob + v);

		// rule 4
		index = j*len*3 + (j+b)*3 + F;
		inside[index] = logsumexp(inside[index], r4logprob + v);

		// rule 7
		index = j*len*3 + (j+b)*3 + L;
		inside[index] = logsumexp(inside[index], r7logprob + v);  
 	}
	
}

__global__ void insidez(const float* inside, float* Z, const int len)
{
	int j = blockIdx.x*blockDim.x + threadIdx.x;
	if(j == 0)
	{
		Z[j] = inside[(len-1)*3];
	}
}*/


__global__ void initialiseinside(float* insideS, float* insideL, float* insideF, const float* unpairedlogprobs, int len)
{
	int i = blockIdx.x*blockDim.x + threadIdx.x;
	if(i < len)
	{
		for(int j=0 ; j < len ; j++)
		{
			if(i == j)
			{
				insideS[i*len + j] = unpairedlogprobs[j] + r2logprob;
				insideL[i*len + j] = unpairedlogprobs[j] + r6logprob;
				insideF[i*len + j] = -1e20f;
			}
			else
			{
				insideS[i*len + j] = -1e20f;
				insideL[i*len + j] = -1e20f;
				insideF[i*len + j] = -1e20f;
			}
		}
	}
}

__global__ void insidealgorithm(float* insideS, float* insideL, float* insideF, const float* pairedlogprobs, const float* unpairedlogprobs, const int b, const int len, const float BT)
{	
	int j = blockIdx.x*blockDim.x + threadIdx.x;
	if (j < len-b)
	{		
		int index = j*len + j+b;
		// type 3 rules

		// rule 1
		float tmp = -1e20f;
		for(int h=j ; h < j+b ; h++)
		{			
			tmp = logsumexp(tmp, insideL[j*len + h] + insideS[(h+1)*len + (j+b)]);
		}
		insideS[index] = logsumexp(insideS[index], r1logprob + tmp);

		// rule 5
		insideF[index] = logsumexp(insideF[index], r5logprob + tmp);

		// type 2 rules

		float v = pairedlogprobs[index]*BT + insideF[(j+1)*len+ (j+b-1)];

		// rule 3
		insideS[index] = logsumexp(insideS[index], r3logprob + v);

		// rule 4
		insideF[index] = logsumexp(insideF[index], r4logprob + v);

		// rule 7
		insideL[index] = logsumexp(insideL[index], r7logprob + v);  
 	}
	
}

__global__ void posteriordecoding(float* ematrix, int* smatrix,  const float* pairprobs, const float* singleprobs, const int datalen, const int diag, const float alpha)
{	
	int i = blockIdx.x*blockDim.x + threadIdx.x;
	if (i < datalen-diag)
	{		
		int j = i + diag;
		float e1 = singleprobs[i] + ematrix[(i+1)*datalen + j];
		float e2 = alpha*pairprobs[i*datalen+j] + ematrix[(i+1)*datalen + j-1];
		float maxe3 = -1e10;
		int maxk = 0;
		for(int k=i+1 ; k <= j-1 ; k++)
		{
			float v = alpha*pairprobs[i*datalen + k] + ematrix[(i+1)*datalen + k-1] + ematrix[(k+1)*datalen + j];
			if(v > maxe3)
			{
				maxe3 = v;
				maxk = k;
			}
		}
		
		float maxval = e1;
		smatrix[i*datalen + j] = -1;
		if(e2 > maxval)
		{
			maxval = e2;
			smatrix[i*datalen + j] = -2;
		}
		if(maxe3 > maxval)
		{
			maxval = maxe3;
			smatrix[i*datalen + j]  = maxk+1;
		}		
		ematrix[i*datalen + j] = maxval;
 	}
	
}

__global__ void insidez(const float* insideS, float* Z, const int len)
{
	int j = blockIdx.x*blockDim.x + threadIdx.x;
	if(j == 0)
	{
		Z[j] = insideS[len-1];
	}
}

/*
__global__ void initialiseinside(float* insideS, float* insideL, float* insideF, const float* unpairedlogprobs, int len, const int stride)
{
	int i = blockIdx.x*blockDim.x + threadIdx.x;
	if(i < len)
	{
		for(int j=0 ; j < len ; j++)
		{
			if(i == j)
			{
				insideS[i*stride + j] = unpairedlogprobs[j] + r2logprob;
				insideL[i*stride + j] = unpairedlogprobs[j] + r6logprob;
				insideF[i*stride + j] = -1e20f;
			}
			else
			{
				insideS[i*stride + j] = -1e20f;
				insideL[i*stride + j] = -1e20f;
				insideF[i*stride + j] = -1e20f;
			}
		}
	}
}

__global__ void insidealgorithm(float* insideS, float* insideL, float* insideF, const float* pairedlogprobs, const float* unpairedlogprobs, const int b, const int len, const int stride, const float BT)
{	
	int j = blockIdx.x*blockDim.x + threadIdx.x;
	if (j < len-b)
	{		
		int index = j*stride + j+b;
		// type 3 rules

		// rule 1
		float tmp = -1e20f;
		for(int h=j ; h < j+b ; h++)
		{			
			tmp = logsumexp(tmp, insideL[j*stride + h] + insideS[(h+1)*stride + (j+b)]);
		}
		insideS[index] = logsumexp(insideS[index], r1logprob + tmp);

		// rule 5
		insideF[index] = logsumexp(insideF[index], r5logprob + tmp);

		// type 2 rules

		float v = pairedlogprobs[j*len + j+b]*BT + insideF[(j+1)*stride + (j+b-1)];

		// rule 3
		insideS[index] = logsumexp(insideS[index], r3logprob + v);

		// rule 4
		insideF[index] = logsumexp(insideF[index], r4logprob + v);

		// rule 7
		insideL[index] = logsumexp(insideL[index], r7logprob + v);  
 	}
	
}

__global__ void insidez(const float* insideS, float* Z, const int len)
{
	int j = blockIdx.x*blockDim.x + threadIdx.x;
	if(j == 0)
	{
		Z[j] = insideS[len-1];
	}
}*/


/*
push!(rules, Rule('S', "LS",0.868534, 3))
    push!(rules, Rule('S', "s",0.117609877998, 1))
    push!(rules, Rule('S', "dFd",0.013856122002, 2))
    push!(rules, Rule('F', "dFd",0.787640, 2))
    push!(rules, Rule('F', "LS",0.21236, 3))
    push!(rules, Rule('L', "s",0.894603, 1))
    push!(rules, Rule('L', "dFd",0.105397, 2))
    type1rules = Rule[rules[2],rules[6]]
    type2rules = Rule[rules[3],rules[4],rules[7]]
    type3rules = Rule[rules[1],rules[5]]
    ruleindex = Dict('S' => 1, 'F' => 2, 'L' => 3)
*/
__global__ void outsidealgorithm(float* outside, const float* inside, const float* pairedlogprobs, const float* unpairedlogprobs, const int b, const int len, const float BT)
{	
	int j = blockIdx.x*blockDim.x + threadIdx.x;
	if (j < len - b)
	{
		int index = 0;
		// type 3 rules

		// rule 1 Rule('S', "LS",0.868534, 3))
		float tmp = -1e20f;
		for (int k = j + b + 1; k < len; k++)
		{
			tmp = logsumexp(tmp, outside[S*len*len + j*len + k] + inside[S*len*len + (j+b+1)*len + k]);
		}
		index = L*len*len + j*len + j+b;
		outside[index] = logsumexp(outside[index], r1logprob*BT + tmp);

		tmp = -1e20f;
		for (int k = 0 ; k < j ; k++)
		{
			tmp = logsumexp(tmp, outside[S*len*len + k*len + j+b] + inside[L*len*len + k*len + j-1]);
		}
		index = S*len*len + j*len + j+b;
		outside[index] = logsumexp(outside[index], r1logprob*BT + tmp);

		// rule 5 Rule('F', "LS",0.21236, 3)
		tmp = -1e20f;
		for (int k = j + b + 1; k < len; k++)
		{
			tmp = logsumexp(tmp, outside[F*len*len + j*len + k] + inside[S*len*len + (j+b+1)*len + k]);
		}
		index = L*len*len + j*len + j+b;
		outside[index] = logsumexp(outside[index], r5logprob*BT + tmp);

		tmp = -1e20f;
		for (int k = 0 ; k < j ; k++)
		{
			tmp = logsumexp(tmp, outside[F*len*len + k*len + j+b] + inside[L*len*len + k*len + j-1]);
		}
		index = S*len*len + j*len + j+b;
		outside[index] = logsumexp(outside[index], r5logprob*BT + tmp);
			
		// type 2 rules
		if ((j>=1) && (j+b+1<len))
		{
			float v = pairedlogprobs[(j-1)*len+(j+b+1)]*BT;
			index = F*len*len + j*len + j+b;
			// rule 3 Rule('S', "dFd",0.013856122002, 2)
			outside[index] = logsumexp(outside[index], r3logprob*BT + outside[S*len*len + (j-1)*len + j+b+1] + v);

			// rule 4 Rule('F', "dFd",0.787640, 2)
			outside[index] = logsumexp(outside[index], r4logprob*BT + outside[F*len*len + (j-1)*len + j+b+1] + v);

			// rule 7 Rule('L', "dFd",0.105397, 2)
			outside[index] = logsumexp(outside[index], r7logprob*BT + outside[L*len*len + (j-1)*len + j+b+1] + v);
		}
 	}
	
}
/*
int main()
{
  int len = 8000;
  int N = len;
  float* inside = (float*)malloc(3*len*len*sizeof(float));
  float* pairedlogprobs = (float*)malloc(len*len*sizeof(float));
  float* unpairedlogprobs = (float*)malloc(len*sizeof(float));

  float* d_inside;
  float* d_pairedlogprobs;
  float* d_unpairedlogprobs;
  cudaMalloc(&d_inside, 3*len*len*sizeof(float)); 
  cudaMalloc(&d_pairedlogprobs, len*len*sizeof(float)); 
  cudaMalloc(&d_unpairedlogprobs, len*len*sizeof(float));


  cudaMemcpy(d_inside, inside, 3*len*len*sizeof(float), cudaMemcpyHostToDevice);
  cudaMemcpy(d_pairedlogprobs, pairedlogprobs, len*len*sizeof(float), cudaMemcpyHostToDevice);
  cudaMemcpy(d_unpairedlogprobs, unpairedlogprobs, len*sizeof(float), cudaMemcpyHostToDevice);

  for(int b=1 ; b < len ; b++)
  {	
  	insidealgorithm<<<(N+511)/512, 512>>>(d_inside, d_pairedlogprobs, d_unpairedlogprobs, b, len, 1.0);
  }

  int code = cudaMemcpy(inside, d_inside, 3*len*len*sizeof(float), cudaMemcpyDeviceToHost);
  printf("exitcode %d\n", code);
  printf("Z %f\n", inside[len-1]);
}*/


	.text
	.file	"inside.hip"
	.globl	_Z31__device_stub__initialiseinsidePfS_S_PKfi # -- Begin function _Z31__device_stub__initialiseinsidePfS_S_PKfi
	.type	_Z31__device_stub__initialiseinsidePfS_S_PKfi,@function
_Z31__device_stub__initialiseinsidePfS_S_PKfi: # @_Z31__device_stub__initialiseinsidePfS_S_PKfi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	12(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16initialiseinsidePfS_S_PKfi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z31__device_stub__initialiseinsidePfS_S_PKfi, .Lfunc_end0-_Z31__device_stub__initialiseinsidePfS_S_PKfi
	.cfi_endproc
                                        # -- End function
	.globl	_Z30__device_stub__insidealgorithmPfS_S_PKfS1_iif # -- Begin function _Z30__device_stub__insidealgorithmPfS_S_PKfS1_iif
	.type	_Z30__device_stub__insidealgorithmPfS_S_PKfS1_iif,@function
_Z30__device_stub__insidealgorithmPfS_S_PKfS1_iif: # @_Z30__device_stub__insidealgorithmPfS_S_PKfS1_iif
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	4(%rsp), %r8
	movl	%r9d, (%r8)
	movq	%rsp, %r9
	movss	%xmm0, (%r9)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	movq	%r9, 56(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z15insidealgorithmPfS_S_PKfS1_iif, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z30__device_stub__insidealgorithmPfS_S_PKfS1_iif, .Lfunc_end1-_Z30__device_stub__insidealgorithmPfS_S_PKfS1_iif
	.cfi_endproc
                                        # -- End function
	.globl	_Z32__device_stub__posteriordecodingPfPiPKfS2_iif # -- Begin function _Z32__device_stub__posteriordecodingPfPiPKfS2_iif
	.type	_Z32__device_stub__posteriordecodingPfPiPKfS2_iif,@function
_Z32__device_stub__posteriordecodingPfPiPKfS2_iif: # @_Z32__device_stub__posteriordecodingPfPiPKfS2_iif
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	12(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	8(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	4(%rsp), %r9
	movss	%xmm0, (%r9)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	movq	%r9, 48(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z17posteriordecodingPfPiPKfS2_iif, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z32__device_stub__posteriordecodingPfPiPKfS2_iif, .Lfunc_end2-_Z32__device_stub__posteriordecodingPfPiPKfS2_iif
	.cfi_endproc
                                        # -- End function
	.globl	_Z22__device_stub__insidezPKfPfi # -- Begin function _Z22__device_stub__insidezPKfPfi
	.type	_Z22__device_stub__insidezPKfPfi,@function
_Z22__device_stub__insidezPKfPfi:       # @_Z22__device_stub__insidezPKfPfi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z7insidezPKfPfi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z22__device_stub__insidezPKfPfi, .Lfunc_end3-_Z22__device_stub__insidezPKfPfi
	.cfi_endproc
                                        # -- End function
	.globl	_Z31__device_stub__outsidealgorithmPfPKfS1_S1_iif # -- Begin function _Z31__device_stub__outsidealgorithmPfPKfS1_S1_iif
	.type	_Z31__device_stub__outsidealgorithmPfPKfS1_S1_iif,@function
_Z31__device_stub__outsidealgorithmPfPKfS1_S1_iif: # @_Z31__device_stub__outsidealgorithmPfPKfS1_S1_iif
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	12(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	8(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	4(%rsp), %r9
	movss	%xmm0, (%r9)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	movq	%r9, 48(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16outsidealgorithmPfPKfS1_S1_iif, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z31__device_stub__outsidealgorithmPfPKfS1_S1_iif, .Lfunc_end4-_Z31__device_stub__outsidealgorithmPfPKfS1_S1_iif
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB5_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB5_2:
	subq	$32, %rsp
	.cfi_adjust_cfa_offset 32
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z16initialiseinsidePfS_S_PKfi, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z15insidealgorithmPfS_S_PKfS1_iif, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z17posteriordecodingPfPiPKfS2_iif, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z7insidezPKfPfi, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z16outsidealgorithmPfPKfS1_S1_iif, %esi
	movl	$.L__unnamed_5, %edx
	movl	$.L__unnamed_5, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$S, %esi
	movl	$.L__unnamed_6, %edx
	movl	$.L__unnamed_6, %ecx
	movl	$4, %r9d
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$1
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterVar
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
	movl	$F, %esi
	movl	$.L__unnamed_7, %edx
	movl	$.L__unnamed_7, %ecx
	movl	$4, %r9d
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$1
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterVar
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
	movl	$L, %esi
	movl	$.L__unnamed_8, %edx
	movl	$.L__unnamed_8, %ecx
	movl	$4, %r9d
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$1
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterVar
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
	movl	$r1logprob, %esi
	movl	$.L__unnamed_9, %edx
	movl	$.L__unnamed_9, %ecx
	movl	$4, %r9d
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$1
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterVar
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
	movl	$r2logprob, %esi
	movl	$.L__unnamed_10, %edx
	movl	$.L__unnamed_10, %ecx
	movl	$4, %r9d
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$1
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterVar
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
	movl	$r3logprob, %esi
	movl	$.L__unnamed_11, %edx
	movl	$.L__unnamed_11, %ecx
	movl	$4, %r9d
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$1
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterVar
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
	movl	$r4logprob, %esi
	movl	$.L__unnamed_12, %edx
	movl	$.L__unnamed_12, %ecx
	movl	$4, %r9d
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$1
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterVar
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
	movl	$r5logprob, %esi
	movl	$.L__unnamed_13, %edx
	movl	$.L__unnamed_13, %ecx
	movl	$4, %r9d
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$1
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterVar
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
	movl	$r6logprob, %esi
	movl	$.L__unnamed_14, %edx
	movl	$.L__unnamed_14, %ecx
	movl	$4, %r9d
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$1
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterVar
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
	movl	$r7logprob, %esi
	movl	$.L__unnamed_15, %edx
	movl	$.L__unnamed_15, %ecx
	movl	$4, %r9d
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$1
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterVar
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
	movl	$__hip_module_dtor, %edi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end5:
	.size	__hip_module_ctor, .Lfunc_end5-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB6_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB6_2:
	retq
.Lfunc_end6:
	.size	__hip_module_dtor, .Lfunc_end6-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	S,@object                       # @S
	.local	S
	.comm	S,4,4
	.type	F,@object                       # @F
	.local	F
	.comm	F,4,4
	.type	L,@object                       # @L
	.local	L
	.comm	L,4,4
	.type	r1logprob,@object               # @r1logprob
	.local	r1logprob
	.comm	r1logprob,4,4
	.type	r2logprob,@object               # @r2logprob
	.local	r2logprob
	.comm	r2logprob,4,4
	.type	r3logprob,@object               # @r3logprob
	.local	r3logprob
	.comm	r3logprob,4,4
	.type	r4logprob,@object               # @r4logprob
	.local	r4logprob
	.comm	r4logprob,4,4
	.type	r5logprob,@object               # @r5logprob
	.local	r5logprob
	.comm	r5logprob,4,4
	.type	r6logprob,@object               # @r6logprob
	.local	r6logprob
	.comm	r6logprob,4,4
	.type	r7logprob,@object               # @r7logprob
	.local	r7logprob
	.comm	r7logprob,4,4
	.type	_Z16initialiseinsidePfS_S_PKfi,@object # @_Z16initialiseinsidePfS_S_PKfi
	.section	.rodata,"a",@progbits
	.globl	_Z16initialiseinsidePfS_S_PKfi
	.p2align	3, 0x0
_Z16initialiseinsidePfS_S_PKfi:
	.quad	_Z31__device_stub__initialiseinsidePfS_S_PKfi
	.size	_Z16initialiseinsidePfS_S_PKfi, 8

	.type	_Z15insidealgorithmPfS_S_PKfS1_iif,@object # @_Z15insidealgorithmPfS_S_PKfS1_iif
	.globl	_Z15insidealgorithmPfS_S_PKfS1_iif
	.p2align	3, 0x0
_Z15insidealgorithmPfS_S_PKfS1_iif:
	.quad	_Z30__device_stub__insidealgorithmPfS_S_PKfS1_iif
	.size	_Z15insidealgorithmPfS_S_PKfS1_iif, 8

	.type	_Z17posteriordecodingPfPiPKfS2_iif,@object # @_Z17posteriordecodingPfPiPKfS2_iif
	.globl	_Z17posteriordecodingPfPiPKfS2_iif
	.p2align	3, 0x0
_Z17posteriordecodingPfPiPKfS2_iif:
	.quad	_Z32__device_stub__posteriordecodingPfPiPKfS2_iif
	.size	_Z17posteriordecodingPfPiPKfS2_iif, 8

	.type	_Z7insidezPKfPfi,@object        # @_Z7insidezPKfPfi
	.globl	_Z7insidezPKfPfi
	.p2align	3, 0x0
_Z7insidezPKfPfi:
	.quad	_Z22__device_stub__insidezPKfPfi
	.size	_Z7insidezPKfPfi, 8

	.type	_Z16outsidealgorithmPfPKfS1_S1_iif,@object # @_Z16outsidealgorithmPfPKfS1_S1_iif
	.globl	_Z16outsidealgorithmPfPKfS1_S1_iif
	.p2align	3, 0x0
_Z16outsidealgorithmPfPKfS1_S1_iif:
	.quad	_Z31__device_stub__outsidealgorithmPfPKfS1_S1_iif
	.size	_Z16outsidealgorithmPfPKfS1_S1_iif, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z16initialiseinsidePfS_S_PKfi"
	.size	.L__unnamed_1, 31

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z15insidealgorithmPfS_S_PKfS1_iif"
	.size	.L__unnamed_2, 35

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z17posteriordecodingPfPiPKfS2_iif"
	.size	.L__unnamed_3, 35

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"_Z7insidezPKfPfi"
	.size	.L__unnamed_4, 17

	.type	.L__unnamed_5,@object           # @4
.L__unnamed_5:
	.asciz	"_Z16outsidealgorithmPfPKfS1_S1_iif"
	.size	.L__unnamed_5, 35

	.type	.L__unnamed_6,@object           # @5
.L__unnamed_6:
	.asciz	"S"
	.size	.L__unnamed_6, 2

	.type	.L__unnamed_7,@object           # @6
.L__unnamed_7:
	.asciz	"F"
	.size	.L__unnamed_7, 2

	.type	.L__unnamed_8,@object           # @7
.L__unnamed_8:
	.asciz	"L"
	.size	.L__unnamed_8, 2

	.type	.L__unnamed_9,@object           # @8
.L__unnamed_9:
	.asciz	"r1logprob"
	.size	.L__unnamed_9, 10

	.type	.L__unnamed_10,@object          # @9
.L__unnamed_10:
	.asciz	"r2logprob"
	.size	.L__unnamed_10, 10

	.type	.L__unnamed_11,@object          # @10
.L__unnamed_11:
	.asciz	"r3logprob"
	.size	.L__unnamed_11, 10

	.type	.L__unnamed_12,@object          # @11
.L__unnamed_12:
	.asciz	"r4logprob"
	.size	.L__unnamed_12, 10

	.type	.L__unnamed_13,@object          # @12
.L__unnamed_13:
	.asciz	"r5logprob"
	.size	.L__unnamed_13, 10

	.type	.L__unnamed_14,@object          # @13
.L__unnamed_14:
	.asciz	"r6logprob"
	.size	.L__unnamed_14, 10

	.type	.L__unnamed_15,@object          # @14
.L__unnamed_15:
	.asciz	"r7logprob"
	.size	.L__unnamed_15, 10

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z31__device_stub__initialiseinsidePfS_S_PKfi
	.addrsig_sym _Z30__device_stub__insidealgorithmPfS_S_PKfS1_iif
	.addrsig_sym _Z32__device_stub__posteriordecodingPfPiPKfS2_iif
	.addrsig_sym _Z22__device_stub__insidezPKfPfi
	.addrsig_sym _Z31__device_stub__outsidealgorithmPfPKfS1_S1_iif
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym S
	.addrsig_sym F
	.addrsig_sym L
	.addrsig_sym r1logprob
	.addrsig_sym r2logprob
	.addrsig_sym r3logprob
	.addrsig_sym r4logprob
	.addrsig_sym r5logprob
	.addrsig_sym r6logprob
	.addrsig_sym r7logprob
	.addrsig_sym _Z16initialiseinsidePfS_S_PKfi
	.addrsig_sym _Z15insidealgorithmPfS_S_PKfS1_iif
	.addrsig_sym _Z17posteriordecodingPfPiPKfS2_iif
	.addrsig_sym _Z7insidezPKfPfi
	.addrsig_sym _Z16outsidealgorithmPfPKfS1_S1_iif
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z16initialiseinsidePfS_S_PKfi ; -- Begin function _Z16initialiseinsidePfS_S_PKfi
	.globl	_Z16initialiseinsidePfS_S_PKfi
	.p2align	8
	.type	_Z16initialiseinsidePfS_S_PKfi,@function
_Z16initialiseinsidePfS_S_PKfi:         ; @_Z16initialiseinsidePfS_S_PKfi
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x34
	s_load_b32 s8, s[0:1], 0x20
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_max_i32_e32 v0, 0, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s8, v0
	s_cbranch_execz .LBB0_7
; %bb.1:                                ; %.lr.ph
	v_mul_lo_u32 v3, v1, s8
	s_load_b256 s[0:7], s[0:1], 0x0
	s_getpc_b64 s[10:11]
	s_add_u32 s10, s10, r2logprob@rel32@lo+4
	s_addc_u32 s11, s11, r2logprob@rel32@hi+12
	s_getpc_b64 s[12:13]
	s_add_u32 s12, s12, r6logprob@rel32@lo+4
	s_addc_u32 s13, s13, r6logprob@rel32@hi+12
	s_load_b32 s9, s[10:11], 0x0
	s_load_b32 s10, s[12:13], 0x0
	v_mov_b32_e32 v0, 0xe0ad78ec
	v_dual_mov_b32 v2, 0 :: v_dual_add_nc_u32 v5, v1, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[7:8], 2, v[1:2]
	v_ashrrev_i32_e32 v6, 31, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[11:12], 2, v[5:6]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v7, vcc_lo, s6, v7
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v8, vcc_lo, s7, v8, vcc_lo
	v_add_co_u32 v9, vcc_lo, s0, v11
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v10, vcc_lo, s1, v12, vcc_lo
	v_add_co_u32 v11, vcc_lo, s2, v11
	v_add_co_ci_u32_e32 v12, vcc_lo, s3, v12, vcc_lo
.LBB0_2:                                ; =>This Inner Loop Header: Depth=1
	s_mov_b32 s6, exec_lo
                                        ; implicit-def: $vgpr13_vgpr14
	v_cmpx_ne_u32_e32 0, v1
	s_xor_b32 s6, exec_lo, s6
	s_cbranch_execz .LBB0_4
; %bb.3:                                ;   in Loop: Header=BB0_2 Depth=1
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[13:14], 2, v[3:4]
	v_add_co_u32 v15, vcc_lo, s0, v13
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v16, vcc_lo, s1, v14, vcc_lo
	v_add_co_u32 v17, vcc_lo, s2, v13
	v_add_co_ci_u32_e32 v18, vcc_lo, s3, v14, vcc_lo
	v_dual_mov_b32 v14, v4 :: v_dual_mov_b32 v13, v3
	global_store_b32 v[15:16], v0, off
	global_store_b32 v[17:18], v0, off
.LBB0_4:                                ; %Flow
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_and_not1_saveexec_b32 s6, s6
	s_cbranch_execz .LBB0_6
; %bb.5:                                ;   in Loop: Header=BB0_2 Depth=1
	global_load_b32 v2, v[7:8], off
	v_dual_mov_b32 v14, v6 :: v_dual_mov_b32 v13, v5
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v2, s9, v2
	global_store_b32 v[9:10], v2, off
	global_load_b32 v2, v[7:8], off
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v2, s10, v2
	global_store_b32 v[11:12], v2, off
.LBB0_6:                                ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	v_lshlrev_b64 v[13:14], 2, v[13:14]
	v_add_nc_u32_e32 v1, -1, v1
	v_add_nc_u32_e32 v3, 1, v3
	s_add_i32 s8, s8, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	s_cmp_lg_u32 s8, 0
	v_add_co_u32 v13, vcc_lo, s4, v13
	v_add_co_ci_u32_e32 v14, vcc_lo, s5, v14, vcc_lo
	global_store_b32 v[13:14], v0, off
	s_cbranch_scc1 .LBB0_2
.LBB0_7:                                ; %.loopexit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16initialiseinsidePfS_S_PKfi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 19
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z16initialiseinsidePfS_S_PKfi, .Lfunc_end0-_Z16initialiseinsidePfS_S_PKfi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 448
; NumSgprs: 18
; NumVgprs: 19
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 19
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z15insidealgorithmPfS_S_PKfS1_iif ; -- Begin function _Z15insidealgorithmPfS_S_PKfS1_iif
	.globl	_Z15insidealgorithmPfS_S_PKfS1_iif
	.p2align	8
	.type	_Z15insidealgorithmPfS_S_PKfS1_iif,@function
_Z15insidealgorithmPfS_S_PKfS1_iif:     ; @_Z15insidealgorithmPfS_S_PKfS1_iif
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x44
	s_load_b128 s[16:19], s[0:1], 0x28
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_mul_i32 s15, s15, s2
	s_sub_i32 s2, s17, s16
	v_add_nc_u32_e32 v4, s15, v0
	v_cmp_gt_i32_e32 vcc_lo, s2, v4
	s_and_saveexec_b32 s2, vcc_lo
	s_cbranch_execz .LBB1_55
; %bb.1:
	s_load_b256 s[4:11], s[0:1], 0x0
	v_mul_lo_u32 v7, v4, s17
	v_add_nc_u32_e32 v6, s16, v4
	s_cmp_lt_i32 s16, 1
	s_cbranch_scc1 .LBB1_13
; %bb.2:                                ; %.lr.ph.preheader
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_add3_u32 v1, v0, v7, s15
	s_mov_b32 s0, s17
	v_dual_mov_b32 v5, 0xe0ad78ec :: v_dual_add_nc_u32 v0, s16, v0
	v_mad_u64_u32 v[8:9], null, s17, v4, s[0:1]
	v_ashrrev_i32_e32 v2, 31, v1
	s_mov_b32 s1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	v_add3_u32 v0, v0, v8, s15
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v2, vcc_lo, s6, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v3, vcc_lo
.LBB1_3:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 31, v0
	s_mov_b32 s2, exec_lo
	v_lshlrev_b64 v[8:9], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, s4, v8
	v_add_co_ci_u32_e32 v9, vcc_lo, s5, v9, vcc_lo
	global_load_b32 v1, v[2:3], off
	global_load_b32 v8, v[8:9], off
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v8, v1, v8
	v_cmpx_nge_f32_e32 0xe0ad78ec, v5
	s_cbranch_execz .LBB1_11
; %bb.4:                                ;   in Loop: Header=BB1_3 Depth=1
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_2)
	v_cmpx_nge_f32_e32 0xe0ad78ec, v8
	s_cbranch_execz .LBB1_10
; %bb.5:                                ;   in Loop: Header=BB1_3 Depth=1
	s_mov_b32 s0, exec_lo
	v_cmpx_ngt_f32_e32 v5, v8
	s_xor_b32 s12, exec_lo, s0
	s_cbranch_execz .LBB1_7
; %bb.6:                                ;   in Loop: Header=BB1_3 Depth=1
	v_sub_f32_e32 v1, v5, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v5, 0x3fb8aa3b, v1
	v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v1
	v_fma_f32 v9, 0x3fb8aa3b, v1, -v5
	v_rndne_f32_e32 v10, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v9, 0x32a5705f, v1
	v_sub_f32_e32 v5, v5, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f32_e32 v5, v5, v9
	v_cvt_i32_f32_e32 v9, v10
	v_exp_f32_e32 v5, v5
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v5, v5, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v5, 0, v5, vcc_lo
	v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v1
	v_cndmask_b32_e32 v1, 0x7f800000, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v1, 1.0, v1
	v_cmp_gt_f32_e32 vcc_lo, 0x800000, v1
	v_cndmask_b32_e64 v5, 1.0, 0x4f800000, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v1, v1, v5
	v_log_f32_e32 v1, v1
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v5, 0x3f317217, v1
	v_cmp_gt_f32_e64 s0, 0x7f800000, |v1|
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v9, 0x3f317217, v1, -v5
	v_fmac_f32_e32 v9, 0x3377d1cf, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v5, v5, v9
	v_cndmask_b32_e64 v1, v1, v5, s0
	v_cndmask_b32_e64 v5, 0, 0x41b17218, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v1, v1, v5
	v_add_f32_e32 v5, v8, v1
                                        ; implicit-def: $vgpr8
.LBB1_7:                                ; %Flow111
                                        ;   in Loop: Header=BB1_3 Depth=1
	s_and_not1_saveexec_b32 s12, s12
	s_cbranch_execz .LBB1_9
; %bb.8:                                ;   in Loop: Header=BB1_3 Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v1, v8, v5
	v_mul_f32_e32 v8, 0x3fb8aa3b, v1
	v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f32 v9, 0x3fb8aa3b, v1, -v8
	v_rndne_f32_e32 v10, v8
	v_dual_fmac_f32 v9, 0x32a5705f, v1 :: v_dual_sub_f32 v8, v8, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f32_e32 v8, v8, v9
	v_cvt_i32_f32_e32 v9, v10
	v_exp_f32_e32 v8, v8
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v8, v8, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v8, 0, v8, vcc_lo
	v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v1
	v_cndmask_b32_e32 v1, 0x7f800000, v8, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v1, 1.0, v1
	v_cmp_gt_f32_e32 vcc_lo, 0x800000, v1
	v_cndmask_b32_e64 v8, 1.0, 0x4f800000, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v1, v1, v8
	v_log_f32_e32 v1, v1
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v8, 0x3f317217, v1
	v_cmp_gt_f32_e64 s0, 0x7f800000, |v1|
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v9, 0x3f317217, v1, -v8
	v_fmac_f32_e32 v9, 0x3377d1cf, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v8, v8, v9
	v_cndmask_b32_e64 v1, v1, v8, s0
	v_cndmask_b32_e64 v8, 0, 0x41b17218, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v1, v1, v8
	v_add_f32_e32 v5, v5, v1
.LBB1_9:                                ; %Flow112
                                        ;   in Loop: Header=BB1_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s12
.LBB1_10:                               ; %Flow113
                                        ;   in Loop: Header=BB1_3 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s3
	v_mov_b32_e32 v8, v5
.LBB1_11:                               ; %_Z9logsumexpff.exit71
                                        ;   in Loop: Header=BB1_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_dual_mov_b32 v5, v8 :: v_dual_add_nc_u32 v4, 1, v4
	v_add_co_u32 v2, s0, v2, 4
	v_add_nc_u32_e32 v0, s17, v0
	v_cmp_ge_i32_e32 vcc_lo, v4, v6
	v_add_co_ci_u32_e64 v3, s0, 0, v3, s0
	s_or_b32 s1, vcc_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB1_3
; %bb.12:                               ; %Flow114
	s_or_b32 exec_lo, exec_lo, s1
	s_branch .LBB1_14
.LBB1_13:
	v_mov_b32_e32 v8, 0xe0ad78ec
.LBB1_14:                               ; %._crit_edge
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, r1logprob@rel32@lo+4
	s_addc_u32 s1, s1, r1logprob@rel32@hi+12
	s_load_b32 s0, s[0:1], 0x0
	v_add_nc_u32_e32 v0, v6, v7
	s_mov_b32 s1, exec_lo
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v9, s0, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	global_load_b32 v4, v[2:3], off
	s_waitcnt vmcnt(0)
	v_cmpx_nge_f32_e32 0xe0ad78ec, v4
	s_cbranch_execz .LBB1_22
; %bb.15:
	s_mov_b32 s2, exec_lo
	v_cmpx_nge_f32_e32 0xe0ad78ec, v9
	s_cbranch_execz .LBB1_21
; %bb.16:
	s_mov_b32 s0, exec_lo
	v_cmpx_ngt_f32_e32 v4, v9
	s_xor_b32 s3, exec_lo, s0
	s_cbranch_execz .LBB1_18
; %bb.17:
	v_sub_f32_e32 v4, v4, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v5, 0x3fb8aa3b, v4
	v_fma_f32 v10, 0x3fb8aa3b, v4, -v5
	v_rndne_f32_e32 v11, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_sub_f32_e32 v5, v5, v11
	v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v4
	v_fmamk_f32 v10, v4, 0x32a5705f, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f32_e32 v5, v5, v10
	v_cvt_i32_f32_e32 v10, v11
	v_exp_f32_e32 v5, v5
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v5, v5, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v5, 0, v5, vcc_lo
	v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v4
	v_cndmask_b32_e32 v4, 0x7f800000, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v4, 1.0, v4
	v_cmp_gt_f32_e32 vcc_lo, 0x800000, v4
	v_cndmask_b32_e64 v5, 1.0, 0x4f800000, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v4, v4, v5
	v_log_f32_e32 v4, v4
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v5, 0x3f317217, v4
	v_cmp_gt_f32_e64 s0, 0x7f800000, |v4|
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v10, 0x3f317217, v4, -v5
	v_fmamk_f32 v10, v4, 0x3377d1cf, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v5, v5, v10
	v_cndmask_b32_e64 v4, v4, v5, s0
	v_cndmask_b32_e64 v5, 0, 0x41b17218, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v4, v4, v5
	v_add_f32_e32 v4, v9, v4
                                        ; implicit-def: $vgpr9
.LBB1_18:                               ; %Flow108
	s_and_not1_saveexec_b32 s3, s3
	s_cbranch_execz .LBB1_20
; %bb.19:
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v5, v9, v4
	v_mul_f32_e32 v9, 0x3fb8aa3b, v5
	v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f32 v10, 0x3fb8aa3b, v5, -v9
	v_rndne_f32_e32 v11, v9
	v_fmamk_f32 v10, v5, 0x32a5705f, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v9, v9, v11
	v_add_f32_e32 v9, v9, v10
	v_cvt_i32_f32_e32 v10, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_exp_f32_e32 v9, v9
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v9, v9, v10
	v_cndmask_b32_e32 v9, 0, v9, vcc_lo
	v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v5, 0x7f800000, v9, vcc_lo
	v_add_f32_e32 v5, 1.0, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f32_e32 vcc_lo, 0x800000, v5
	v_cndmask_b32_e64 v9, 1.0, 0x4f800000, vcc_lo
	v_mul_f32_e32 v5, v5, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_log_f32_e32 v5, v5
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v9, 0x3f317217, v5
	v_cmp_gt_f32_e64 s0, 0x7f800000, |v5|
	v_fma_f32 v10, 0x3f317217, v5, -v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmamk_f32 v10, v5, 0x3377d1cf, v10
	v_add_f32_e32 v9, v9, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v5, v5, v9, s0
	v_cndmask_b32_e64 v9, 0, 0x41b17218, vcc_lo
	v_sub_f32_e32 v5, v5, v9
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f32_e32 v4, v4, v5
.LBB1_20:                               ; %Flow109
	s_or_b32 exec_lo, exec_lo, s3
.LBB1_21:                               ; %Flow110
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s2
	v_mov_b32_e32 v9, v4
.LBB1_22:                               ; %_Z9logsumexpff.exit
	s_or_b32 exec_lo, exec_lo, s1
	v_add_co_u32 v4, vcc_lo, s8, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s9, v1, vcc_lo
	global_store_b32 v[2:3], v9, off
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, r5logprob@rel32@lo+4
	s_addc_u32 s1, s1, r5logprob@rel32@hi+12
	s_load_b32 s0, s[0:1], 0x0
	global_load_b32 v9, v[4:5], off
	s_mov_b32 s1, exec_lo
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v8, s0, v8
	s_waitcnt vmcnt(0)
	v_cmpx_nge_f32_e32 0xe0ad78ec, v9
	s_cbranch_execz .LBB1_30
; %bb.23:
	s_mov_b32 s2, exec_lo
	v_cmpx_nge_f32_e32 0xe0ad78ec, v8
	s_cbranch_execz .LBB1_29
; %bb.24:
	s_mov_b32 s0, exec_lo
	v_cmpx_ngt_f32_e32 v9, v8
	s_xor_b32 s3, exec_lo, s0
	s_cbranch_execz .LBB1_26
; %bb.25:
	v_sub_f32_e32 v9, v9, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v10, 0x3fb8aa3b, v9
	v_fma_f32 v11, 0x3fb8aa3b, v9, -v10
	v_rndne_f32_e32 v12, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmamk_f32 v11, v9, 0x32a5705f, v11 :: v_dual_sub_f32 v10, v10, v12
	v_add_f32_e32 v10, v10, v11
	v_cvt_i32_f32_e32 v11, v12
	v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v9
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_exp_f32_e32 v10, v10
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v10, v10, v11
	v_cndmask_b32_e32 v10, 0, v10, vcc_lo
	v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v9, 0x7f800000, v10, vcc_lo
	v_add_f32_e32 v9, 1.0, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f32_e32 vcc_lo, 0x800000, v9
	v_cndmask_b32_e64 v10, 1.0, 0x4f800000, vcc_lo
	v_mul_f32_e32 v9, v9, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_log_f32_e32 v9, v9
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v10, 0x3f317217, v9
	v_cmp_gt_f32_e64 s0, 0x7f800000, |v9|
	v_fma_f32 v11, 0x3f317217, v9, -v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmamk_f32 v11, v9, 0x3377d1cf, v11
	v_add_f32_e32 v10, v10, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v9, v9, v10, s0
	v_cndmask_b32_e64 v10, 0, 0x41b17218, vcc_lo
	v_sub_f32_e32 v9, v9, v10
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f32_e32 v9, v8, v9
                                        ; implicit-def: $vgpr8
.LBB1_26:                               ; %Flow105
	s_and_not1_saveexec_b32 s3, s3
	s_cbranch_execz .LBB1_28
; %bb.27:
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v8, v8, v9
	v_mul_f32_e32 v10, 0x3fb8aa3b, v8
	v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f32 v11, 0x3fb8aa3b, v8, -v10
	v_rndne_f32_e32 v12, v10
	v_dual_fmamk_f32 v11, v8, 0x32a5705f, v11 :: v_dual_sub_f32 v10, v10, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f32_e32 v10, v10, v11
	v_cvt_i32_f32_e32 v11, v12
	v_exp_f32_e32 v10, v10
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v10, v10, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v10, 0, v10, vcc_lo
	v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v8
	v_cndmask_b32_e32 v8, 0x7f800000, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v8, 1.0, v8
	v_cmp_gt_f32_e32 vcc_lo, 0x800000, v8
	v_cndmask_b32_e64 v10, 1.0, 0x4f800000, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v8, v8, v10
	v_log_f32_e32 v8, v8
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v10, 0x3f317217, v8
	v_cmp_gt_f32_e64 s0, 0x7f800000, |v8|
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v11, 0x3f317217, v8, -v10
	v_fmamk_f32 v11, v8, 0x3377d1cf, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v10, v10, v11
	v_cndmask_b32_e64 v8, v8, v10, s0
	v_cndmask_b32_e64 v10, 0, 0x41b17218, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v8, v8, v10
	v_add_f32_e32 v9, v9, v8
.LBB1_28:                               ; %Flow106
	s_or_b32 exec_lo, exec_lo, s3
.LBB1_29:                               ; %Flow107
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s2
	v_mov_b32_e32 v8, v9
.LBB1_30:                               ; %_Z9logsumexpff.exit63
	s_or_b32 exec_lo, exec_lo, s1
	v_add_nc_u32_e32 v7, s17, v7
	v_ashrrev_i32_e32 v9, 31, v6
	global_store_b32 v[4:5], v8, off
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, r3logprob@rel32@lo+4
	s_addc_u32 s1, s1, r3logprob@rel32@hi+12
	s_load_b32 s0, s[0:1], 0x0
	v_ashrrev_i32_e32 v10, 31, v7
	v_add_co_u32 v6, vcc_lo, v6, v7
	s_mov_b32 s1, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v7, vcc_lo, v9, v10, vcc_lo
	v_add_co_u32 v9, vcc_lo, s10, v0
	v_add_co_ci_u32_e32 v10, vcc_lo, s11, v1, vcc_lo
	v_lshlrev_b64 v[6:7], 2, v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, s8, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, s9, v7, vcc_lo
	global_load_b32 v8, v[9:10], off
	global_load_b32 v6, v[6:7], off offset:-4
	global_load_b32 v7, v[2:3], off
	s_waitcnt vmcnt(1)
	v_fmac_f32_e32 v6, s18, v8
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f32_e32 v8, s0, v6
	s_waitcnt vmcnt(0)
	v_cmpx_nge_f32_e32 0xe0ad78ec, v7
	s_cbranch_execz .LBB1_38
; %bb.31:
	s_mov_b32 s2, exec_lo
	v_cmpx_nge_f32_e32 0xe0ad78ec, v8
	s_cbranch_execz .LBB1_37
; %bb.32:
	s_mov_b32 s0, exec_lo
	v_cmpx_ngt_f32_e32 v7, v8
	s_xor_b32 s3, exec_lo, s0
	s_cbranch_execz .LBB1_34
; %bb.33:
	v_sub_f32_e32 v7, v7, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v9, 0x3fb8aa3b, v7
	v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v7
	v_fma_f32 v10, 0x3fb8aa3b, v7, -v9
	v_rndne_f32_e32 v11, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmamk_f32 v10, v7, 0x32a5705f, v10 :: v_dual_sub_f32 v9, v9, v11
	v_add_f32_e32 v9, v9, v10
	v_cvt_i32_f32_e32 v10, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_exp_f32_e32 v9, v9
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v9, v9, v10
	v_cndmask_b32_e32 v9, 0, v9, vcc_lo
	v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v7, 0x7f800000, v9, vcc_lo
	v_add_f32_e32 v7, 1.0, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f32_e32 vcc_lo, 0x800000, v7
	v_cndmask_b32_e64 v9, 1.0, 0x4f800000, vcc_lo
	v_mul_f32_e32 v7, v7, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_log_f32_e32 v7, v7
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v9, 0x3f317217, v7
	v_cmp_gt_f32_e64 s0, 0x7f800000, |v7|
	v_fma_f32 v10, 0x3f317217, v7, -v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmamk_f32 v10, v7, 0x3377d1cf, v10
	v_add_f32_e32 v9, v9, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v7, v7, v9, s0
	v_cndmask_b32_e64 v9, 0, 0x41b17218, vcc_lo
	v_sub_f32_e32 v7, v7, v9
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f32_e32 v7, v8, v7
                                        ; implicit-def: $vgpr8
.LBB1_34:                               ; %Flow102
	s_and_not1_saveexec_b32 s3, s3
	s_cbranch_execz .LBB1_36
; %bb.35:
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v8, v8, v7
	v_mul_f32_e32 v9, 0x3fb8aa3b, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f32 v10, 0x3fb8aa3b, v8, -v9
	v_rndne_f32_e32 v11, v9
	v_dual_fmamk_f32 v10, v8, 0x32a5705f, v10 :: v_dual_sub_f32 v9, v9, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_f32_e32 v9, v9, v10
	v_cvt_i32_f32_e32 v10, v11
	v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v8
	v_exp_f32_e32 v9, v9
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v9, v9, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v9, 0, v9, vcc_lo
	v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v8
	v_cndmask_b32_e32 v8, 0x7f800000, v9, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v8, 1.0, v8
	v_cmp_gt_f32_e32 vcc_lo, 0x800000, v8
	v_cndmask_b32_e64 v9, 1.0, 0x4f800000, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v8, v8, v9
	v_log_f32_e32 v8, v8
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v9, 0x3f317217, v8
	v_cmp_gt_f32_e64 s0, 0x7f800000, |v8|
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v10, 0x3f317217, v8, -v9
	v_fmamk_f32 v10, v8, 0x3377d1cf, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v9, v9, v10
	v_cndmask_b32_e64 v8, v8, v9, s0
	v_cndmask_b32_e64 v9, 0, 0x41b17218, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v8, v8, v9
	v_add_f32_e32 v7, v7, v8
.LBB1_36:                               ; %Flow103
	s_or_b32 exec_lo, exec_lo, s3
.LBB1_37:                               ; %Flow104
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s2
	v_mov_b32_e32 v8, v7
.LBB1_38:                               ; %_Z9logsumexpff.exit65
	s_or_b32 exec_lo, exec_lo, s1
	global_store_b32 v[2:3], v8, off
	global_load_b32 v2, v[4:5], off
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, r4logprob@rel32@lo+4
	s_addc_u32 s1, s1, r4logprob@rel32@hi+12
	s_load_b32 s0, s[0:1], 0x0
	s_mov_b32 s1, exec_lo
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v3, s0, v6
	s_waitcnt vmcnt(0)
	v_cmpx_nge_f32_e32 0xe0ad78ec, v2
	s_cbranch_execz .LBB1_46
; %bb.39:
	s_mov_b32 s2, exec_lo
	v_cmpx_nge_f32_e32 0xe0ad78ec, v3
	s_cbranch_execz .LBB1_45
; %bb.40:
	s_mov_b32 s0, exec_lo
	v_cmpx_ngt_f32_e32 v2, v3
	s_xor_b32 s3, exec_lo, s0
	s_cbranch_execz .LBB1_42
; %bb.41:
	v_sub_f32_e32 v2, v2, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v7, 0x3fb8aa3b, v2
	v_fma_f32 v8, 0x3fb8aa3b, v2, -v7
	v_rndne_f32_e32 v9, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_sub_f32_e32 v7, v7, v9
	v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v2
	v_fmamk_f32 v8, v2, 0x32a5705f, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f32_e32 v7, v7, v8
	v_cvt_i32_f32_e32 v8, v9
	v_exp_f32_e32 v7, v7
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v7, v7, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v7, 0, v7, vcc_lo
	v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v2
	v_cndmask_b32_e32 v2, 0x7f800000, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v2, 1.0, v2
	v_cmp_gt_f32_e32 vcc_lo, 0x800000, v2
	v_cndmask_b32_e64 v7, 1.0, 0x4f800000, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v2, v2, v7
	v_log_f32_e32 v2, v2
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v7, 0x3f317217, v2
	v_cmp_gt_f32_e64 s0, 0x7f800000, |v2|
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v8, 0x3f317217, v2, -v7
	v_fmamk_f32 v8, v2, 0x3377d1cf, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v7, v7, v8
	v_cndmask_b32_e64 v2, v2, v7, s0
	v_cndmask_b32_e64 v7, 0, 0x41b17218, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v2, v2, v7
	v_add_f32_e32 v2, v3, v2
                                        ; implicit-def: $vgpr3
.LBB1_42:                               ; %Flow99
	s_and_not1_saveexec_b32 s3, s3
	s_cbranch_execz .LBB1_44
; %bb.43:
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v3, v3, v2
	v_mul_f32_e32 v7, 0x3fb8aa3b, v3
	v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f32 v8, 0x3fb8aa3b, v3, -v7
	v_rndne_f32_e32 v9, v7
	v_fmamk_f32 v8, v3, 0x32a5705f, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v7, v7, v9
	v_add_f32_e32 v7, v7, v8
	v_cvt_i32_f32_e32 v8, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_exp_f32_e32 v7, v7
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v7, v7, v8
	v_cndmask_b32_e32 v7, 0, v7, vcc_lo
	v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v3, 0x7f800000, v7, vcc_lo
	v_add_f32_e32 v3, 1.0, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f32_e32 vcc_lo, 0x800000, v3
	v_cndmask_b32_e64 v7, 1.0, 0x4f800000, vcc_lo
	v_mul_f32_e32 v3, v3, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_log_f32_e32 v3, v3
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v7, 0x3f317217, v3
	v_cmp_gt_f32_e64 s0, 0x7f800000, |v3|
	v_fma_f32 v8, 0x3f317217, v3, -v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmamk_f32 v8, v3, 0x3377d1cf, v8
	v_add_f32_e32 v7, v7, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v3, v3, v7, s0
	v_cndmask_b32_e64 v7, 0, 0x41b17218, vcc_lo
	v_sub_f32_e32 v3, v3, v7
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f32_e32 v2, v2, v3
.LBB1_44:                               ; %Flow100
	s_or_b32 exec_lo, exec_lo, s3
.LBB1_45:                               ; %Flow101
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s2
	v_mov_b32_e32 v3, v2
.LBB1_46:                               ; %_Z9logsumexpff.exit67
	s_or_b32 exec_lo, exec_lo, s1
	v_add_co_u32 v0, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	global_store_b32 v[4:5], v3, off
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, r7logprob@rel32@lo+4
	s_addc_u32 s1, s1, r7logprob@rel32@hi+12
	s_load_b32 s0, s[0:1], 0x0
	global_load_b32 v2, v[0:1], off
	s_mov_b32 s1, exec_lo
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v3, s0, v6
	s_waitcnt vmcnt(0)
	v_cmpx_nge_f32_e32 0xe0ad78ec, v2
	s_cbranch_execz .LBB1_54
; %bb.47:
	s_mov_b32 s2, exec_lo
	v_cmpx_nge_f32_e32 0xe0ad78ec, v3
	s_cbranch_execz .LBB1_53
; %bb.48:
	s_mov_b32 s0, exec_lo
	v_cmpx_ngt_f32_e32 v2, v3
	s_xor_b32 s3, exec_lo, s0
	s_cbranch_execz .LBB1_50
; %bb.49:
	v_sub_f32_e32 v2, v2, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v4, 0x3fb8aa3b, v2
	v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v2
	v_fma_f32 v5, 0x3fb8aa3b, v2, -v4
	v_rndne_f32_e32 v6, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmamk_f32 v5, v2, 0x32a5705f, v5 :: v_dual_sub_f32 v4, v4, v6
	v_add_f32_e32 v4, v4, v5
	v_cvt_i32_f32_e32 v5, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_exp_f32_e32 v4, v4
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v4, v4, v5
	v_cndmask_b32_e32 v4, 0, v4, vcc_lo
	v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v2, 0x7f800000, v4, vcc_lo
	v_add_f32_e32 v2, 1.0, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f32_e32 vcc_lo, 0x800000, v2
	v_cndmask_b32_e64 v4, 1.0, 0x4f800000, vcc_lo
	v_mul_f32_e32 v2, v2, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_log_f32_e32 v2, v2
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v4, 0x3f317217, v2
	v_cmp_gt_f32_e64 s0, 0x7f800000, |v2|
	v_fma_f32 v5, 0x3f317217, v2, -v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmamk_f32 v5, v2, 0x3377d1cf, v5
	v_add_f32_e32 v4, v4, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v2, v2, v4, s0
	v_cndmask_b32_e64 v4, 0, 0x41b17218, vcc_lo
	v_sub_f32_e32 v2, v2, v4
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f32_e32 v2, v3, v2
                                        ; implicit-def: $vgpr3
.LBB1_50:                               ; %Flow
	s_and_not1_saveexec_b32 s3, s3
	s_cbranch_execz .LBB1_52
; %bb.51:
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v3, v3, v2
	v_mul_f32_e32 v4, 0x3fb8aa3b, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f32 v5, 0x3fb8aa3b, v3, -v4
	v_rndne_f32_e32 v6, v4
	v_dual_fmamk_f32 v5, v3, 0x32a5705f, v5 :: v_dual_sub_f32 v4, v4, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_f32_e32 v4, v4, v5
	v_cvt_i32_f32_e32 v5, v6
	v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v3
	v_exp_f32_e32 v4, v4
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v4, v4, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v4, 0, v4, vcc_lo
	v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v3
	v_cndmask_b32_e32 v3, 0x7f800000, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v3, 1.0, v3
	v_cmp_gt_f32_e32 vcc_lo, 0x800000, v3
	v_cndmask_b32_e64 v4, 1.0, 0x4f800000, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v3, v3, v4
	v_log_f32_e32 v3, v3
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v4, 0x3f317217, v3
	v_cmp_gt_f32_e64 s0, 0x7f800000, |v3|
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v5, 0x3f317217, v3, -v4
	v_fmamk_f32 v5, v3, 0x3377d1cf, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v4, v4, v5
	v_cndmask_b32_e64 v3, v3, v4, s0
	v_cndmask_b32_e64 v4, 0, 0x41b17218, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v3, v3, v4
	v_add_f32_e32 v2, v2, v3
.LBB1_52:                               ; %Flow97
	s_or_b32 exec_lo, exec_lo, s3
.LBB1_53:                               ; %Flow98
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s2
	v_mov_b32_e32 v3, v2
.LBB1_54:                               ; %_Z9logsumexpff.exit69
	s_or_b32 exec_lo, exec_lo, s1
	global_store_b32 v[0:1], v3, off
.LBB1_55:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z15insidealgorithmPfS_S_PKfS1_iif
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 312
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 13
		.amdhsa_next_free_sgpr 20
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z15insidealgorithmPfS_S_PKfS1_iif, .Lfunc_end1-_Z15insidealgorithmPfS_S_PKfS1_iif
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 4040
; NumSgprs: 22
; NumVgprs: 13
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 22
; NumVGPRsForWavesPerEU: 13
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z17posteriordecodingPfPiPKfS2_iif ; -- Begin function _Z17posteriordecodingPfPiPKfS2_iif
	.globl	_Z17posteriordecodingPfPiPKfS2_iif
	.p2align	8
	.type	_Z17posteriordecodingPfPiPKfS2_iif,@function
_Z17posteriordecodingPfPiPKfS2_iif:     ; @_Z17posteriordecodingPfPiPKfS2_iif
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x3c
	s_load_b128 s[16:19], s[0:1], 0x20
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_mul_i32 s15, s15, s2
	s_sub_i32 s2, s16, s17
	v_add_nc_u32_e32 v5, s15, v0
	v_cmp_gt_i32_e32 vcc_lo, s2, v5
	s_and_saveexec_b32 s2, vcc_lo
	s_cbranch_execz .LBB2_6
; %bb.1:
	v_add_nc_u32_e32 v11, 1, v5
	v_ashrrev_i32_e32 v6, 31, v5
	s_load_b256 s[4:11], s[0:1], 0x0
	v_mul_lo_u32 v7, v5, s16
	v_add_nc_u32_e32 v12, s17, v5
	s_cmp_lt_i32 s17, 2
	v_lshlrev_b64 v[9:10], 2, v[5:6]
	v_mov_b32_e32 v6, 1
	v_mul_lo_u32 v8, v11, s16
	v_add_nc_u32_e32 v1, v7, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v8, v12
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v4, 31, v3
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v9, vcc_lo, s10, v9
	v_add_co_ci_u32_e32 v10, vcc_lo, s11, v10, vcc_lo
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, s4, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
	v_add_co_u32 v14, vcc_lo, s8, v1
	v_add_co_ci_u32_e32 v15, vcc_lo, s9, v2, vcc_lo
	global_load_b32 v13, v[9:10], off
	global_load_b64 v[3:4], v[3:4], off offset:-4
	global_load_b32 v14, v[14:15], off
	v_mov_b32_e32 v15, 0xd01502f9
	s_cbranch_scc1 .LBB2_5
; %bb.2:                                ; %.lr.ph.preheader
	v_dual_mov_b32 v15, 0xd01502f9 :: v_dual_add_nc_u32 v6, v0, v8
	v_add_nc_u32_e32 v7, v0, v7
	v_add_nc_u32_e32 v8, 2, v5
	v_add_nc_u32_e32 v0, s17, v0
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_add3_u32 v5, v6, s15, 1
	s_mov_b32 s1, 0
	v_add3_u32 v7, v7, s15, 1
	v_mul_lo_u32 v16, s16, v8
	v_ashrrev_i32_e32 v6, 31, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v8, 31, v7
	v_lshlrev_b64 v[9:10], 2, v[5:6]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add3_u32 v5, v0, v16, s15
	v_lshlrev_b64 v[7:8], 2, v[7:8]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v0, vcc_lo, v9, s4
	v_add_co_ci_u32_e32 v6, vcc_lo, s5, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v7, vcc_lo, s8, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s9, v8, vcc_lo
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_u32 v9, vcc_lo, v0, -4
	v_mov_b32_e32 v0, 0
	v_add_co_ci_u32_e32 v10, vcc_lo, -1, v6, vcc_lo
.LBB2_3:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	v_ashrrev_i32_e32 v6, 31, v5
	s_delay_alu instid0(VALU_DEP_1)
	v_lshlrev_b64 v[16:17], 2, v[5:6]
	global_load_b32 v6, v[7:8], off
	global_load_b32 v18, v[9:10], off
	v_add_nc_u32_e32 v5, s16, v5
	v_add_co_u32 v16, vcc_lo, s4, v16
	v_add_co_ci_u32_e32 v17, vcc_lo, s5, v17, vcc_lo
	v_add_co_u32 v9, vcc_lo, v9, 4
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v10, vcc_lo
	global_load_b32 v16, v[16:17], off
	v_add_nc_u32_e32 v17, 1, v11
	v_add_co_u32 v7, vcc_lo, v7, 4
	v_add_co_ci_u32_e32 v8, vcc_lo, 0, v8, vcc_lo
	s_waitcnt vmcnt(1)
	v_fmac_f32_e32 v18, s18, v6
	v_cmp_ge_i32_e64 s0, v17, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	s_or_b32 s1, s0, s1
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v6, v18, v16
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_f32_e32 vcc_lo, v6, v15
	v_dual_cndmask_b32 v0, v0, v11 :: v_dual_mov_b32 v11, v17
	v_cndmask_b32_e32 v15, v15, v6, vcc_lo
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB2_3
; %bb.4:                                ; %._crit_edge.loopexit
	s_or_b32 exec_lo, exec_lo, s1
	v_add_nc_u32_e32 v6, 1, v0
.LBB2_5:                                ; %Flow
	s_waitcnt vmcnt(0)
	v_dual_add_f32 v0, v13, v4 :: v_dual_fmac_f32 v3, s18, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_cmp_gt_f32_e32 vcc_lo, v3, v0
	v_cndmask_b32_e64 v5, -1, -2, vcc_lo
	v_cndmask_b32_e32 v0, v0, v3, vcc_lo
	v_add_co_u32 v3, s0, s6, v1
	v_add_co_ci_u32_e64 v4, s0, s7, v2, s0
	s_delay_alu instid0(VALU_DEP_3)
	v_cmp_gt_f32_e32 vcc_lo, v15, v0
	v_dual_cndmask_b32 v5, v5, v6 :: v_dual_cndmask_b32 v6, v0, v15
	v_add_co_u32 v0, vcc_lo, s4, v1
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v2, vcc_lo
	global_store_b32 v[3:4], v5, off
	global_store_b32 v[0:1], v6, off
.LBB2_6:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z17posteriordecodingPfPiPKfS2_iif
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 19
		.amdhsa_next_free_sgpr 20
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z17posteriordecodingPfPiPKfS2_iif, .Lfunc_end2-_Z17posteriordecodingPfPiPKfS2_iif
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 636
; NumSgprs: 22
; NumVgprs: 19
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 22
; NumVGPRsForWavesPerEU: 19
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z7insidezPKfPfi        ; -- Begin function _Z7insidezPKfPfi
	.globl	_Z7insidezPKfPfi
	.p2align	8
	.type	_Z7insidezPKfPfi,@function
_Z7insidezPKfPfi:                       ; @_Z7insidezPKfPfi
; %bb.0:
	s_load_b32 s2, s[0:1], 0x24
	v_sub_nc_u32_e32 v0, 0, v0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mul_i32 s15, s15, s2
	s_mov_b32 s2, exec_lo
	v_cmpx_eq_u32_e64 s15, v0
	s_cbranch_execz .LBB3_2
; %bb.1:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x10
	s_load_b128 s[0:3], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_ashr_i32 s5, s4, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[4:5], s[4:5], 2
	s_add_u32 s0, s0, s4
	s_addc_u32 s1, s1, s5
	s_add_u32 s0, s0, -4
	s_addc_u32 s1, s1, -1
	s_load_b32 s0, s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s0
	global_store_b32 v0, v1, s[2:3]
.LBB3_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z7insidezPKfPfi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 2
		.amdhsa_next_free_sgpr 16
		.amdhsa_reserve_vcc 0
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end3:
	.size	_Z7insidezPKfPfi, .Lfunc_end3-_Z7insidezPKfPfi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 140
; NumSgprs: 16
; NumVgprs: 2
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 1
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 16
; NumVGPRsForWavesPerEU: 2
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z16outsidealgorithmPfPKfS1_S1_iif ; -- Begin function _Z16outsidealgorithmPfPKfS1_S1_iif
	.globl	_Z16outsidealgorithmPfPKfS1_S1_iif
	.p2align	8
	.type	_Z16outsidealgorithmPfPKfS1_S1_iif,@function
_Z16outsidealgorithmPfPKfS1_S1_iif:     ; @_Z16outsidealgorithmPfPKfS1_S1_iif
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x3c
	s_load_b128 s[4:7], s[0:1], 0x20
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_mul_i32 s15, s15, s2
	s_sub_i32 s2, s5, s4
	v_add_nc_u32_e32 v2, s15, v0
	v_cmp_gt_i32_e32 vcc_lo, s2, v2
	s_and_saveexec_b32 s2, vcc_lo
	s_cbranch_execz .LBB4_107
; %bb.1:
	s_clause 0x1
	s_load_b128 s[8:11], s[0:1], 0x0
	s_load_b64 s[12:13], s[0:1], 0x10
	v_add_nc_u32_e32 v1, s4, v2
	v_dual_mov_b32 v7, 0xe0ad78ec :: v_dual_add_nc_u32 v0, s4, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v11, 1, v1
	v_cmp_gt_i32_e32 vcc_lo, s5, v11
	s_and_saveexec_b32 s2, vcc_lo
	s_cbranch_execz .LBB4_13
; %bb.2:                                ; %.lr.ph
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, S@rel32@lo+4
	s_addc_u32 s1, s1, S@rel32@hi+12
	s_mov_b32 s3, 0
	s_load_b32 s0, s[0:1], 0x0
	v_dual_mov_b32 v8, v11 :: v_dual_mov_b32 v9, 0xe0ad78ec
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s0, s0, s5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v5, s0, v11
	v_add_nc_u32_e32 v6, s0, v2
	v_mad_u64_u32 v[3:4], null, v5, s5, v[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[4:5], null, v6, s5, v[0:1]
	v_add3_u32 v3, v3, s15, 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add3_u32 v5, v4, s15, 1
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v6, 31, v5
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[5:6], 2, v[5:6]
	v_add_co_u32 v3, s0, s10, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v4, s0, s11, v4, s0
	v_add_co_u32 v5, s0, s8, v5
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v6, s0, s9, v6, s0
.LBB4_3:                                ; =>This Inner Loop Header: Depth=1
	global_load_b32 v7, v[5:6], off
	global_load_b32 v10, v[3:4], off
	s_mov_b32 s7, exec_lo
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v7, v7, v10
	v_cmpx_nge_f32_e32 0xe0ad78ec, v9
	s_cbranch_execz .LBB4_11
; %bb.4:                                ;   in Loop: Header=BB4_3 Depth=1
	s_mov_b32 s14, exec_lo
	s_delay_alu instid0(VALU_DEP_2)
	v_cmpx_nge_f32_e32 0xe0ad78ec, v7
	s_cbranch_execz .LBB4_10
; %bb.5:                                ;   in Loop: Header=BB4_3 Depth=1
	s_mov_b32 s1, exec_lo
	v_cmpx_ngt_f32_e32 v9, v7
	s_xor_b32 s16, exec_lo, s1
	s_cbranch_execz .LBB4_7
; %bb.6:                                ;   in Loop: Header=BB4_3 Depth=1
	v_sub_f32_e32 v9, v9, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v10, 0x3fb8aa3b, v9
	v_fma_f32 v12, 0x3fb8aa3b, v9, -v10
	v_rndne_f32_e32 v13, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_f32_e32 v10, v10, v13
	v_fmac_f32_e32 v12, 0x32a5705f, v9
	v_cmp_ngt_f32_e64 s0, 0xc2ce8ed0, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f32_e32 v10, v10, v12
	v_cvt_i32_f32_e32 v12, v13
	v_exp_f32_e32 v10, v10
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v10, v10, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v10, 0, v10, s0
	v_cmp_nlt_f32_e64 s0, 0x42b17218, v9
	v_cndmask_b32_e64 v9, 0x7f800000, v10, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v9, 1.0, v9
	v_cmp_gt_f32_e64 s0, 0x800000, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v10, 1.0, 0x4f800000, s0
	v_mul_f32_e32 v9, v9, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_log_f32_e32 v9, v9
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v10, 0x3f317217, v9
	v_cmp_gt_f32_e64 s1, 0x7f800000, |v9|
	v_fma_f32 v12, 0x3f317217, v9, -v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v12, 0x3377d1cf, v9
	v_add_f32_e32 v10, v10, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v9, v9, v10, s1
	v_cndmask_b32_e64 v10, 0, 0x41b17218, s0
	v_sub_f32_e32 v9, v9, v10
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f32_e32 v9, v7, v9
                                        ; implicit-def: $vgpr7
.LBB4_7:                                ; %Flow302
                                        ;   in Loop: Header=BB4_3 Depth=1
	s_and_not1_saveexec_b32 s16, s16
	s_cbranch_execz .LBB4_9
; %bb.8:                                ;   in Loop: Header=BB4_3 Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v7, v7, v9
	v_mul_f32_e32 v10, 0x3fb8aa3b, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f32 v12, 0x3fb8aa3b, v7, -v10
	v_rndne_f32_e32 v13, v10
	v_fmac_f32_e32 v12, 0x32a5705f, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v10, v10, v13
	v_add_f32_e32 v10, v10, v12
	v_cvt_i32_f32_e32 v12, v13
	v_cmp_ngt_f32_e64 s0, 0xc2ce8ed0, v7
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_exp_f32_e32 v10, v10
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v10, v10, v12
	v_cndmask_b32_e64 v10, 0, v10, s0
	v_cmp_nlt_f32_e64 s0, 0x42b17218, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v7, 0x7f800000, v10, s0
	v_add_f32_e32 v7, 1.0, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_f32_e64 s0, 0x800000, v7
	v_cndmask_b32_e64 v10, 1.0, 0x4f800000, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v7, v7, v10
	v_log_f32_e32 v7, v7
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v10, 0x3f317217, v7
	v_cmp_gt_f32_e64 s1, 0x7f800000, |v7|
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v12, 0x3f317217, v7, -v10
	v_fmac_f32_e32 v12, 0x3377d1cf, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v10, v10, v12
	v_cndmask_b32_e64 v7, v7, v10, s1
	v_cndmask_b32_e64 v10, 0, 0x41b17218, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v7, v7, v10
	v_add_f32_e32 v9, v9, v7
.LBB4_9:                                ; %Flow303
                                        ;   in Loop: Header=BB4_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s16
.LBB4_10:                               ; %Flow304
                                        ;   in Loop: Header=BB4_3 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s14
	v_mov_b32_e32 v7, v9
.LBB4_11:                               ; %_Z9logsumexpff.exit190
                                        ;   in Loop: Header=BB4_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v9, v7 :: v_dual_add_nc_u32 v8, 1, v8
	v_add_co_u32 v3, s0, v3, 4
	v_add_co_ci_u32_e64 v4, s0, 0, v4, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_le_i32_e64 s0, s5, v8
	v_add_co_u32 v5, s1, v5, 4
	v_add_co_ci_u32_e64 v6, s1, 0, v6, s1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s3, s0, s3
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB4_3
; %bb.12:                               ; %Flow305
	s_or_b32 exec_lo, exec_lo, s3
.LBB4_13:                               ; %Flow306
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, L@rel32@lo+4
	s_addc_u32 s1, s1, L@rel32@hi+12
	s_mov_b32 s2, exec_lo
	s_load_b32 s7, s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s3, s7, s5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v5, s3, v2
	v_mad_u64_u32 v[3:4], null, v5, s5, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v4, 31, v3
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v3, s0, s8, v3
	v_add_co_ci_u32_e64 v4, s0, s9, v4, s0
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, r1logprob@rel32@lo+4
	s_addc_u32 s1, s1, r1logprob@rel32@hi+12
	s_load_b32 s14, s[0:1], 0x0
	global_load_b32 v5, v[3:4], off
	s_waitcnt lgkmcnt(0)
	v_fmac_f32_e64 v7, s14, s6
	s_waitcnt vmcnt(0)
	v_cmpx_nge_f32_e32 0xe0ad78ec, v5
	s_cbranch_execz .LBB4_21
; %bb.14:
	s_mov_b32 s16, exec_lo
	v_cmpx_nge_f32_e32 0xe0ad78ec, v7
	s_cbranch_execz .LBB4_20
; %bb.15:
	s_mov_b32 s1, exec_lo
	v_cmpx_ngt_f32_e32 v5, v7
	s_xor_b32 s17, exec_lo, s1
	s_cbranch_execz .LBB4_17
; %bb.16:
	v_sub_f32_e32 v5, v5, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v6, 0x3fb8aa3b, v5
	v_fma_f32 v8, 0x3fb8aa3b, v5, -v6
	v_rndne_f32_e32 v9, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_f32_e32 v6, v6, v9
	v_fmamk_f32 v8, v5, 0x32a5705f, v8
	v_cmp_ngt_f32_e64 s0, 0xc2ce8ed0, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f32_e32 v6, v6, v8
	v_cvt_i32_f32_e32 v8, v9
	v_exp_f32_e32 v6, v6
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v6, v6, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v6, 0, v6, s0
	v_cmp_nlt_f32_e64 s0, 0x42b17218, v5
	v_cndmask_b32_e64 v5, 0x7f800000, v6, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v5, 1.0, v5
	v_cmp_gt_f32_e64 s0, 0x800000, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v6, 1.0, 0x4f800000, s0
	v_mul_f32_e32 v5, v5, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_log_f32_e32 v5, v5
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v6, 0x3f317217, v5
	v_cmp_gt_f32_e64 s1, 0x7f800000, |v5|
	v_fma_f32 v8, 0x3f317217, v5, -v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmamk_f32 v8, v5, 0x3377d1cf, v8
	v_add_f32_e32 v6, v6, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v5, v5, v6, s1
	v_cndmask_b32_e64 v6, 0, 0x41b17218, s0
	v_sub_f32_e32 v5, v5, v6
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f32_e32 v5, v7, v5
                                        ; implicit-def: $vgpr7
.LBB4_17:                               ; %Flow299
	s_and_not1_saveexec_b32 s17, s17
	s_cbranch_execz .LBB4_19
; %bb.18:
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v6, v7, v5
	v_mul_f32_e32 v7, 0x3fb8aa3b, v6
	v_cmp_ngt_f32_e64 s0, 0xc2ce8ed0, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f32 v8, 0x3fb8aa3b, v6, -v7
	v_rndne_f32_e32 v9, v7
	v_dual_fmamk_f32 v8, v6, 0x32a5705f, v8 :: v_dual_sub_f32 v7, v7, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f32_e32 v7, v7, v8
	v_cvt_i32_f32_e32 v8, v9
	v_exp_f32_e32 v7, v7
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v7, v7, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v7, 0, v7, s0
	v_cmp_nlt_f32_e64 s0, 0x42b17218, v6
	v_cndmask_b32_e64 v6, 0x7f800000, v7, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v6, 1.0, v6
	v_cmp_gt_f32_e64 s0, 0x800000, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v7, 1.0, 0x4f800000, s0
	v_mul_f32_e32 v6, v6, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_log_f32_e32 v6, v6
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v7, 0x3f317217, v6
	v_cmp_gt_f32_e64 s1, 0x7f800000, |v6|
	v_fma_f32 v8, 0x3f317217, v6, -v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmamk_f32 v8, v6, 0x3377d1cf, v8
	v_add_f32_e32 v7, v7, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v6, v6, v7, s1
	v_cndmask_b32_e64 v7, 0, 0x41b17218, s0
	v_sub_f32_e32 v6, v6, v7
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f32_e32 v5, v5, v6
.LBB4_19:                               ; %Flow300
	s_or_b32 exec_lo, exec_lo, s17
.LBB4_20:                               ; %Flow301
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s16
	v_mov_b32_e32 v7, v5
.LBB4_21:                               ; %_Z9logsumexpff.exit
	s_or_b32 exec_lo, exec_lo, s2
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, S@rel32@lo+4
	s_addc_u32 s1, s1, S@rel32@hi+12
	v_mov_b32_e32 v8, 0xe0ad78ec
	s_load_b32 s17, s[0:1], 0x0
	v_cmp_lt_i32_e64 s0, 0, v2
	s_mul_i32 s16, s5, s5
	s_mov_b32 s19, 0
	s_mul_i32 s7, s7, s16
	global_store_b32 v[3:4], v7, off
	s_and_saveexec_b32 s18, s0
	s_cbranch_execz .LBB4_33
; %bb.22:                               ; %.lr.ph213.preheader
	v_dual_mov_b32 v7, 0xe0ad78ec :: v_dual_mov_b32 v6, v2
	v_mov_b32_e32 v5, v2
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s1, s17, s16
	s_add_u32 s20, s10, -4
	s_addc_u32 s21, s11, -1
	s_add_i32 s22, s4, s1
.LBB4_23:                               ; %.lr.ph213
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v8, s22, v5
	v_add_nc_u32_e32 v12, s7, v5
	s_mov_b32 s23, exec_lo
	v_ashrrev_i32_e32 v9, 31, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v13, 31, v12
	v_lshlrev_b64 v[8:9], 2, v[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[12:13], 2, v[12:13]
	v_add_co_u32 v8, s1, s8, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v9, s1, s9, v9, s1
	v_add_co_u32 v12, s1, s20, v12
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v13, s1, s21, v13, s1
	global_load_b32 v8, v[8:9], off
	global_load_b32 v9, v[12:13], off
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v8, v8, v9
	v_cmpx_nge_f32_e32 0xe0ad78ec, v7
	s_cbranch_execz .LBB4_31
; %bb.24:                               ;   in Loop: Header=BB4_23 Depth=1
	s_mov_b32 s24, exec_lo
	s_delay_alu instid0(VALU_DEP_2)
	v_cmpx_nge_f32_e32 0xe0ad78ec, v8
	s_cbranch_execz .LBB4_30
; %bb.25:                               ;   in Loop: Header=BB4_23 Depth=1
	s_mov_b32 s2, exec_lo
	v_cmpx_ngt_f32_e32 v7, v8
	s_xor_b32 s25, exec_lo, s2
	s_cbranch_execz .LBB4_27
; %bb.26:                               ;   in Loop: Header=BB4_23 Depth=1
	v_sub_f32_e32 v7, v7, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v9, 0x3fb8aa3b, v7
	v_cmp_ngt_f32_e64 s1, 0xc2ce8ed0, v7
	v_fma_f32 v10, 0x3fb8aa3b, v7, -v9
	v_rndne_f32_e32 v12, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v10, 0x32a5705f, v7 :: v_dual_sub_f32 v9, v9, v12
	v_add_f32_e32 v9, v9, v10
	v_cvt_i32_f32_e32 v10, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_exp_f32_e32 v9, v9
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v9, v9, v10
	v_cndmask_b32_e64 v9, 0, v9, s1
	v_cmp_nlt_f32_e64 s1, 0x42b17218, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v7, 0x7f800000, v9, s1
	v_add_f32_e32 v7, 1.0, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_f32_e64 s1, 0x800000, v7
	v_cndmask_b32_e64 v9, 1.0, 0x4f800000, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v7, v7, v9
	v_log_f32_e32 v7, v7
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v9, 0x3f317217, v7
	v_cmp_gt_f32_e64 s2, 0x7f800000, |v7|
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v10, 0x3f317217, v7, -v9
	v_fmac_f32_e32 v10, 0x3377d1cf, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v9, v9, v10
	v_cndmask_b32_e64 v7, v7, v9, s2
	v_cndmask_b32_e64 v9, 0, 0x41b17218, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v7, v7, v9
	v_add_f32_e32 v7, v8, v7
                                        ; implicit-def: $vgpr8
.LBB4_27:                               ; %Flow294
                                        ;   in Loop: Header=BB4_23 Depth=1
	s_and_not1_saveexec_b32 s25, s25
	s_cbranch_execz .LBB4_29
; %bb.28:                               ;   in Loop: Header=BB4_23 Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v8, v8, v7
	v_mul_f32_e32 v9, 0x3fb8aa3b, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f32 v10, 0x3fb8aa3b, v8, -v9
	v_rndne_f32_e32 v12, v9
	v_sub_f32_e32 v9, v9, v12
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v10, 0x32a5705f, v8
	v_cmp_ngt_f32_e64 s1, 0xc2ce8ed0, v8
	v_add_f32_e32 v9, v9, v10
	v_cvt_i32_f32_e32 v10, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_exp_f32_e32 v9, v9
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v9, v9, v10
	v_cndmask_b32_e64 v9, 0, v9, s1
	v_cmp_nlt_f32_e64 s1, 0x42b17218, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v8, 0x7f800000, v9, s1
	v_add_f32_e32 v8, 1.0, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_f32_e64 s1, 0x800000, v8
	v_cndmask_b32_e64 v9, 1.0, 0x4f800000, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v8, v8, v9
	v_log_f32_e32 v8, v8
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v9, 0x3f317217, v8
	v_cmp_gt_f32_e64 s2, 0x7f800000, |v8|
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v10, 0x3f317217, v8, -v9
	v_fmac_f32_e32 v10, 0x3377d1cf, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v9, v9, v10
	v_cndmask_b32_e64 v8, v8, v9, s2
	v_cndmask_b32_e64 v9, 0, 0x41b17218, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v8, v8, v9
	v_add_f32_e32 v7, v7, v8
.LBB4_29:                               ; %Flow295
                                        ;   in Loop: Header=BB4_23 Depth=1
	s_or_b32 exec_lo, exec_lo, s25
.LBB4_30:                               ; %Flow296
                                        ;   in Loop: Header=BB4_23 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s24
	v_mov_b32_e32 v8, v7
.LBB4_31:                               ; %_Z9logsumexpff.exit194
                                        ;   in Loop: Header=BB4_23 Depth=1
	s_or_b32 exec_lo, exec_lo, s23
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_mov_b32 v7, v8 :: v_dual_add_nc_u32 v6, -1, v6
	v_add_nc_u32_e32 v5, s5, v5
	v_cmp_eq_u32_e64 s1, 0, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s19, s1, s19
	s_and_not1_b32 exec_lo, exec_lo, s19
	s_cbranch_execnz .LBB4_23
; %bb.32:                               ; %Flow297
	s_or_b32 exec_lo, exec_lo, s19
.LBB4_33:                               ; %Flow298
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s18
	v_mul_f32_e64 v9, s14, s6
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s14, s17, s5
	s_mov_b32 s17, exec_lo
	v_dual_add_f32 v8, v9, v8 :: v_dual_add_nc_u32 v7, s14, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v7, s5, v[1:2]
	v_ashrrev_i32_e32 v6, 31, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], 2, v[5:6]
	v_add_co_u32 v5, s1, s8, v5
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v6, s1, s9, v6, s1
	global_load_b32 v7, v[5:6], off
	s_waitcnt vmcnt(0)
	v_cmpx_nge_f32_e32 0xe0ad78ec, v7
	s_cbranch_execz .LBB4_41
; %bb.34:
	s_mov_b32 s18, exec_lo
	v_cmpx_nge_f32_e32 0xe0ad78ec, v8
	s_cbranch_execz .LBB4_40
; %bb.35:
	s_mov_b32 s2, exec_lo
	v_cmpx_ngt_f32_e32 v7, v8
	s_xor_b32 s19, exec_lo, s2
	s_cbranch_execz .LBB4_37
; %bb.36:
	v_sub_f32_e32 v7, v7, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v9, 0x3fb8aa3b, v7
	v_cmp_ngt_f32_e64 s1, 0xc2ce8ed0, v7
	v_fma_f32 v10, 0x3fb8aa3b, v7, -v9
	v_rndne_f32_e32 v12, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmamk_f32 v10, v7, 0x32a5705f, v10 :: v_dual_sub_f32 v9, v9, v12
	v_add_f32_e32 v9, v9, v10
	v_cvt_i32_f32_e32 v10, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_exp_f32_e32 v9, v9
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v9, v9, v10
	v_cndmask_b32_e64 v9, 0, v9, s1
	v_cmp_nlt_f32_e64 s1, 0x42b17218, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v7, 0x7f800000, v9, s1
	v_add_f32_e32 v7, 1.0, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_f32_e64 s1, 0x800000, v7
	v_cndmask_b32_e64 v9, 1.0, 0x4f800000, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v7, v7, v9
	v_log_f32_e32 v7, v7
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v9, 0x3f317217, v7
	v_cmp_gt_f32_e64 s2, 0x7f800000, |v7|
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v10, 0x3f317217, v7, -v9
	v_fmamk_f32 v10, v7, 0x3377d1cf, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v9, v9, v10
	v_cndmask_b32_e64 v7, v7, v9, s2
	v_cndmask_b32_e64 v9, 0, 0x41b17218, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v7, v7, v9
	v_add_f32_e32 v7, v8, v7
                                        ; implicit-def: $vgpr8
.LBB4_37:                               ; %Flow291
	s_and_not1_saveexec_b32 s19, s19
	s_cbranch_execz .LBB4_39
; %bb.38:
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v8, v8, v7
	v_mul_f32_e32 v9, 0x3fb8aa3b, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f32 v10, 0x3fb8aa3b, v8, -v9
	v_rndne_f32_e32 v12, v9
	v_dual_sub_f32 v9, v9, v12 :: v_dual_fmamk_f32 v10, v8, 0x32a5705f, v10
	v_cmp_ngt_f32_e64 s1, 0xc2ce8ed0, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f32_e32 v9, v9, v10
	v_cvt_i32_f32_e32 v10, v12
	v_exp_f32_e32 v9, v9
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v9, v9, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v9, 0, v9, s1
	v_cmp_nlt_f32_e64 s1, 0x42b17218, v8
	v_cndmask_b32_e64 v8, 0x7f800000, v9, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v8, 1.0, v8
	v_cmp_gt_f32_e64 s1, 0x800000, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v9, 1.0, 0x4f800000, s1
	v_mul_f32_e32 v8, v8, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_log_f32_e32 v8, v8
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v9, 0x3f317217, v8
	v_cmp_gt_f32_e64 s2, 0x7f800000, |v8|
	v_fma_f32 v10, 0x3f317217, v8, -v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmamk_f32 v10, v8, 0x3377d1cf, v10
	v_add_f32_e32 v9, v9, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v8, v8, v9, s2
	v_cndmask_b32_e64 v9, 0, 0x41b17218, s1
	v_sub_f32_e32 v8, v8, v9
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f32_e32 v7, v7, v8
.LBB4_39:                               ; %Flow292
	s_or_b32 exec_lo, exec_lo, s19
.LBB4_40:                               ; %Flow293
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s18
	v_mov_b32_e32 v8, v7
.LBB4_41:                               ; %_Z9logsumexpff.exit192
	s_or_b32 exec_lo, exec_lo, s17
	v_mov_b32_e32 v12, 0xe0ad78ec
	global_store_b32 v[5:6], v8, off
	s_and_saveexec_b32 s17, vcc_lo
	s_cbranch_execz .LBB4_53
; %bb.42:                               ; %.lr.ph218
	s_getpc_b64 s[18:19]
	s_add_u32 s18, s18, F@rel32@lo+4
	s_addc_u32 s19, s19, F@rel32@hi+12
	v_add_nc_u32_e32 v10, s14, v11
	s_load_b32 s1, s[18:19], 0x0
	s_waitcnt lgkmcnt(0)
	v_mad_u64_u32 v[7:8], null, s1, s5, v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[8:9], null, v10, s5, v[0:1]
	v_mad_u64_u32 v[9:10], null, v7, s5, v[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add3_u32 v7, v8, s15, 1
	v_mov_b32_e32 v0, 0xe0ad78ec
	v_ashrrev_i32_e32 v8, 31, v7
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add3_u32 v9, v9, s15, 1
	s_mov_b32 s15, 0
	v_lshlrev_b64 v[7:8], 2, v[7:8]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v10, 31, v9
	v_add_co_u32 v7, s1, s10, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	v_add_co_ci_u32_e64 v8, s1, s11, v8, s1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v9, s1, s8, v9
	v_add_co_ci_u32_e64 v10, s1, s9, v10, s1
.LBB4_43:                               ; =>This Inner Loop Header: Depth=1
	global_load_b32 v12, v[9:10], off
	global_load_b32 v13, v[7:8], off
	s_mov_b32 s18, exec_lo
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v12, v12, v13
	v_cmpx_nge_f32_e32 0xe0ad78ec, v0
	s_cbranch_execz .LBB4_51
; %bb.44:                               ;   in Loop: Header=BB4_43 Depth=1
	s_mov_b32 s19, exec_lo
	s_delay_alu instid0(VALU_DEP_2)
	v_cmpx_nge_f32_e32 0xe0ad78ec, v12
	s_cbranch_execz .LBB4_50
; %bb.45:                               ;   in Loop: Header=BB4_43 Depth=1
	s_mov_b32 s2, exec_lo
	v_cmpx_ngt_f32_e32 v0, v12
	s_xor_b32 s20, exec_lo, s2
	s_cbranch_execz .LBB4_47
; %bb.46:                               ;   in Loop: Header=BB4_43 Depth=1
	v_sub_f32_e32 v0, v0, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v13, 0x3fb8aa3b, v0
	v_fma_f32 v14, 0x3fb8aa3b, v0, -v13
	v_rndne_f32_e32 v15, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_sub_f32 v13, v13, v15 :: v_dual_fmac_f32 v14, 0x32a5705f, v0
	v_cmp_ngt_f32_e64 s1, 0xc2ce8ed0, v0
	v_add_f32_e32 v13, v13, v14
	v_cvt_i32_f32_e32 v14, v15
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_exp_f32_e32 v13, v13
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v13, v13, v14
	v_cndmask_b32_e64 v13, 0, v13, s1
	v_cmp_nlt_f32_e64 s1, 0x42b17218, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v0, 0x7f800000, v13, s1
	v_add_f32_e32 v0, 1.0, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_f32_e64 s1, 0x800000, v0
	v_cndmask_b32_e64 v13, 1.0, 0x4f800000, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v0, v0, v13
	v_log_f32_e32 v0, v0
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v13, 0x3f317217, v0
	v_cmp_gt_f32_e64 s2, 0x7f800000, |v0|
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v14, 0x3f317217, v0, -v13
	v_fmac_f32_e32 v14, 0x3377d1cf, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v13, v13, v14
	v_cndmask_b32_e64 v0, v0, v13, s2
	v_cndmask_b32_e64 v13, 0, 0x41b17218, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v0, v0, v13
	v_add_f32_e32 v0, v12, v0
                                        ; implicit-def: $vgpr12
.LBB4_47:                               ; %Flow286
                                        ;   in Loop: Header=BB4_43 Depth=1
	s_and_not1_saveexec_b32 s20, s20
	s_cbranch_execz .LBB4_49
; %bb.48:                               ;   in Loop: Header=BB4_43 Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v12, v12, v0
	v_mul_f32_e32 v13, 0x3fb8aa3b, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f32 v14, 0x3fb8aa3b, v12, -v13
	v_rndne_f32_e32 v15, v13
	v_dual_sub_f32 v13, v13, v15 :: v_dual_fmac_f32 v14, 0x32a5705f, v12
	v_cmp_ngt_f32_e64 s1, 0xc2ce8ed0, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f32_e32 v13, v13, v14
	v_cvt_i32_f32_e32 v14, v15
	v_exp_f32_e32 v13, v13
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v13, v13, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v13, 0, v13, s1
	v_cmp_nlt_f32_e64 s1, 0x42b17218, v12
	v_cndmask_b32_e64 v12, 0x7f800000, v13, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v12, 1.0, v12
	v_cmp_gt_f32_e64 s1, 0x800000, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v13, 1.0, 0x4f800000, s1
	v_mul_f32_e32 v12, v12, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_log_f32_e32 v12, v12
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v13, 0x3f317217, v12
	v_cmp_gt_f32_e64 s2, 0x7f800000, |v12|
	v_fma_f32 v14, 0x3f317217, v12, -v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v14, 0x3377d1cf, v12
	v_add_f32_e32 v13, v13, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v12, v12, v13, s2
	v_cndmask_b32_e64 v13, 0, 0x41b17218, s1
	v_sub_f32_e32 v12, v12, v13
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f32_e32 v0, v0, v12
.LBB4_49:                               ; %Flow287
                                        ;   in Loop: Header=BB4_43 Depth=1
	s_or_b32 exec_lo, exec_lo, s20
.LBB4_50:                               ; %Flow288
                                        ;   in Loop: Header=BB4_43 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s19
	v_mov_b32_e32 v12, v0
.LBB4_51:                               ; %_Z9logsumexpff.exit198
                                        ;   in Loop: Header=BB4_43 Depth=1
	s_or_b32 exec_lo, exec_lo, s18
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v0, v12 :: v_dual_add_nc_u32 v11, 1, v11
	v_add_co_u32 v7, s1, v7, 4
	v_add_co_ci_u32_e64 v8, s1, 0, v8, s1
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_le_i32_e64 s1, s5, v11
	v_add_co_u32 v9, s2, v9, 4
	v_add_co_ci_u32_e64 v10, s2, 0, v10, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s15, s1, s15
	s_and_not1_b32 exec_lo, exec_lo, s15
	s_cbranch_execnz .LBB4_43
; %bb.52:                               ; %Flow289
	s_or_b32 exec_lo, exec_lo, s15
.LBB4_53:                               ; %Flow290
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s17
	global_load_b32 v0, v[3:4], off
	s_getpc_b64 s[18:19]
	s_add_u32 s18, s18, r5logprob@rel32@lo+4
	s_addc_u32 s19, s19, r5logprob@rel32@hi+12
	s_mov_b32 s17, exec_lo
	s_load_b32 s15, s[18:19], 0x0
	s_waitcnt lgkmcnt(0)
	v_fmac_f32_e64 v12, s15, s6
	s_waitcnt vmcnt(0)
	v_cmpx_nge_f32_e32 0xe0ad78ec, v0
	s_cbranch_execz .LBB4_61
; %bb.54:
	s_mov_b32 s18, exec_lo
	v_cmpx_nge_f32_e32 0xe0ad78ec, v12
	s_cbranch_execz .LBB4_60
; %bb.55:
	s_mov_b32 s2, exec_lo
	v_cmpx_ngt_f32_e32 v0, v12
	s_xor_b32 s19, exec_lo, s2
	s_cbranch_execz .LBB4_57
; %bb.56:
	v_sub_f32_e32 v0, v0, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v7, 0x3fb8aa3b, v0
	v_fma_f32 v8, 0x3fb8aa3b, v0, -v7
	v_rndne_f32_e32 v9, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_sub_f32 v7, v7, v9 :: v_dual_fmamk_f32 v8, v0, 0x32a5705f, v8
	v_cmp_ngt_f32_e64 s1, 0xc2ce8ed0, v0
	v_add_f32_e32 v7, v7, v8
	v_cvt_i32_f32_e32 v8, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_exp_f32_e32 v7, v7
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v7, v7, v8
	v_cndmask_b32_e64 v7, 0, v7, s1
	v_cmp_nlt_f32_e64 s1, 0x42b17218, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v0, 0x7f800000, v7, s1
	v_add_f32_e32 v0, 1.0, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_f32_e64 s1, 0x800000, v0
	v_cndmask_b32_e64 v7, 1.0, 0x4f800000, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v0, v0, v7
	v_log_f32_e32 v0, v0
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v7, 0x3f317217, v0
	v_cmp_gt_f32_e64 s2, 0x7f800000, |v0|
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v8, 0x3f317217, v0, -v7
	v_fmamk_f32 v8, v0, 0x3377d1cf, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v7, v7, v8
	v_cndmask_b32_e64 v0, v0, v7, s2
	v_cndmask_b32_e64 v7, 0, 0x41b17218, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v0, v0, v7
	v_add_f32_e32 v0, v12, v0
                                        ; implicit-def: $vgpr12
.LBB4_57:                               ; %Flow283
	s_and_not1_saveexec_b32 s19, s19
	s_cbranch_execz .LBB4_59
; %bb.58:
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v7, v12, v0
	v_mul_f32_e32 v8, 0x3fb8aa3b, v7
	v_cmp_ngt_f32_e64 s1, 0xc2ce8ed0, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f32 v9, 0x3fb8aa3b, v7, -v8
	v_rndne_f32_e32 v10, v8
	v_dual_fmamk_f32 v9, v7, 0x32a5705f, v9 :: v_dual_sub_f32 v8, v8, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f32_e32 v8, v8, v9
	v_cvt_i32_f32_e32 v9, v10
	v_exp_f32_e32 v8, v8
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v8, v8, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v8, 0, v8, s1
	v_cmp_nlt_f32_e64 s1, 0x42b17218, v7
	v_cndmask_b32_e64 v7, 0x7f800000, v8, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v7, 1.0, v7
	v_cmp_gt_f32_e64 s1, 0x800000, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v8, 1.0, 0x4f800000, s1
	v_mul_f32_e32 v7, v7, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_log_f32_e32 v7, v7
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v8, 0x3f317217, v7
	v_cmp_gt_f32_e64 s2, 0x7f800000, |v7|
	v_fma_f32 v9, 0x3f317217, v7, -v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmamk_f32 v9, v7, 0x3377d1cf, v9
	v_add_f32_e32 v8, v8, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v7, v7, v8, s2
	v_cndmask_b32_e64 v8, 0, 0x41b17218, s1
	v_sub_f32_e32 v7, v7, v8
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f32_e32 v0, v0, v7
.LBB4_59:                               ; %Flow284
	s_or_b32 exec_lo, exec_lo, s19
.LBB4_60:                               ; %Flow285
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s18
	v_mov_b32_e32 v12, v0
.LBB4_61:                               ; %_Z9logsumexpff.exit196
	s_or_b32 exec_lo, exec_lo, s17
	v_mov_b32_e32 v7, 0xe0ad78ec
	global_store_b32 v[3:4], v12, off
	s_and_saveexec_b32 s17, s0
	s_cbranch_execz .LBB4_73
; %bb.62:                               ; %.lr.ph225
	s_getpc_b64 s[18:19]
	s_add_u32 s18, s18, F@rel32@lo+4
	s_addc_u32 s19, s19, F@rel32@hi+12
	v_dual_mov_b32 v4, 0xe0ad78ec :: v_dual_mov_b32 v3, v2
	s_load_b32 s1, s[18:19], 0x0
	v_mov_b32_e32 v0, v2
	s_add_u32 s10, s10, -4
	s_addc_u32 s11, s11, -1
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s1, s1, s16
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_i32 s16, s4, s1
	s_mov_b32 s4, 0
.LBB4_63:                               ; =>This Inner Loop Header: Depth=1
	v_add_nc_u32_e32 v7, s16, v0
	v_add_nc_u32_e32 v9, s7, v0
	s_mov_b32 s18, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v8, 31, v7
	v_ashrrev_i32_e32 v10, 31, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[7:8], 2, v[7:8]
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v7, s1, s8, v7
	v_add_co_ci_u32_e64 v8, s1, s9, v8, s1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v9, s1, s10, v9
	v_add_co_ci_u32_e64 v10, s1, s11, v10, s1
	global_load_b32 v7, v[7:8], off
	global_load_b32 v8, v[9:10], off
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v7, v7, v8
	v_cmpx_nge_f32_e32 0xe0ad78ec, v4
	s_cbranch_execz .LBB4_71
; %bb.64:                               ;   in Loop: Header=BB4_63 Depth=1
	s_mov_b32 s19, exec_lo
	s_delay_alu instid0(VALU_DEP_2)
	v_cmpx_nge_f32_e32 0xe0ad78ec, v7
	s_cbranch_execz .LBB4_70
; %bb.65:                               ;   in Loop: Header=BB4_63 Depth=1
	s_mov_b32 s2, exec_lo
	v_cmpx_ngt_f32_e32 v4, v7
	s_xor_b32 s20, exec_lo, s2
	s_cbranch_execz .LBB4_67
; %bb.66:                               ;   in Loop: Header=BB4_63 Depth=1
	v_sub_f32_e32 v4, v4, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v8, 0x3fb8aa3b, v4
	v_cmp_ngt_f32_e64 s1, 0xc2ce8ed0, v4
	v_fma_f32 v9, 0x3fb8aa3b, v4, -v8
	v_rndne_f32_e32 v10, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v9, 0x32a5705f, v4 :: v_dual_sub_f32 v8, v8, v10
	v_add_f32_e32 v8, v8, v9
	v_cvt_i32_f32_e32 v9, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_exp_f32_e32 v8, v8
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v8, v8, v9
	v_cndmask_b32_e64 v8, 0, v8, s1
	v_cmp_nlt_f32_e64 s1, 0x42b17218, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v4, 0x7f800000, v8, s1
	v_add_f32_e32 v4, 1.0, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_f32_e64 s1, 0x800000, v4
	v_cndmask_b32_e64 v8, 1.0, 0x4f800000, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v4, v4, v8
	v_log_f32_e32 v4, v4
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v8, 0x3f317217, v4
	v_cmp_gt_f32_e64 s2, 0x7f800000, |v4|
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v9, 0x3f317217, v4, -v8
	v_fmac_f32_e32 v9, 0x3377d1cf, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v8, v8, v9
	v_cndmask_b32_e64 v4, v4, v8, s2
	v_cndmask_b32_e64 v8, 0, 0x41b17218, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v4, v4, v8
	v_add_f32_e32 v4, v7, v4
                                        ; implicit-def: $vgpr7
.LBB4_67:                               ; %Flow278
                                        ;   in Loop: Header=BB4_63 Depth=1
	s_and_not1_saveexec_b32 s20, s20
	s_cbranch_execz .LBB4_69
; %bb.68:                               ;   in Loop: Header=BB4_63 Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v7, v7, v4
	v_mul_f32_e32 v8, 0x3fb8aa3b, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f32 v9, 0x3fb8aa3b, v7, -v8
	v_rndne_f32_e32 v10, v8
	v_dual_sub_f32 v8, v8, v10 :: v_dual_fmac_f32 v9, 0x32a5705f, v7
	v_cmp_ngt_f32_e64 s1, 0xc2ce8ed0, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f32_e32 v8, v8, v9
	v_cvt_i32_f32_e32 v9, v10
	v_exp_f32_e32 v8, v8
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v8, v8, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v8, 0, v8, s1
	v_cmp_nlt_f32_e64 s1, 0x42b17218, v7
	v_cndmask_b32_e64 v7, 0x7f800000, v8, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v7, 1.0, v7
	v_cmp_gt_f32_e64 s1, 0x800000, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v8, 1.0, 0x4f800000, s1
	v_mul_f32_e32 v7, v7, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_log_f32_e32 v7, v7
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v8, 0x3f317217, v7
	v_cmp_gt_f32_e64 s2, 0x7f800000, |v7|
	v_fma_f32 v9, 0x3f317217, v7, -v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v9, 0x3377d1cf, v7
	v_add_f32_e32 v8, v8, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v7, v7, v8, s2
	v_cndmask_b32_e64 v8, 0, 0x41b17218, s1
	v_sub_f32_e32 v7, v7, v8
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f32_e32 v4, v4, v7
.LBB4_69:                               ; %Flow279
                                        ;   in Loop: Header=BB4_63 Depth=1
	s_or_b32 exec_lo, exec_lo, s20
.LBB4_70:                               ; %Flow280
                                        ;   in Loop: Header=BB4_63 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s19
	v_mov_b32_e32 v7, v4
.LBB4_71:                               ; %_Z9logsumexpff.exit202
                                        ;   in Loop: Header=BB4_63 Depth=1
	s_or_b32 exec_lo, exec_lo, s18
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_mov_b32 v4, v7 :: v_dual_add_nc_u32 v3, -1, v3
	v_add_nc_u32_e32 v0, s5, v0
	v_cmp_eq_u32_e64 s1, 0, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s4, s1, s4
	s_and_not1_b32 exec_lo, exec_lo, s4
	s_cbranch_execnz .LBB4_63
; %bb.72:                               ; %Flow281
	s_or_b32 exec_lo, exec_lo, s4
.LBB4_73:                               ; %Flow282
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s17
	global_load_b32 v0, v[5:6], off
	v_mul_f32_e64 v3, s15, s6
	s_mov_b32 s4, exec_lo
	v_add_f32_e32 v3, v3, v7
	s_waitcnt vmcnt(0)
	v_cmpx_nge_f32_e32 0xe0ad78ec, v0
	s_cbranch_execz .LBB4_81
; %bb.74:
	s_mov_b32 s7, exec_lo
	v_cmpx_nge_f32_e32 0xe0ad78ec, v3
	s_cbranch_execz .LBB4_80
; %bb.75:
	s_mov_b32 s2, exec_lo
	v_cmpx_ngt_f32_e32 v0, v3
	s_xor_b32 s10, exec_lo, s2
	s_cbranch_execz .LBB4_77
; %bb.76:
	v_sub_f32_e32 v0, v0, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v4, 0x3fb8aa3b, v0
	v_cmp_ngt_f32_e64 s1, 0xc2ce8ed0, v0
	v_fma_f32 v7, 0x3fb8aa3b, v0, -v4
	v_rndne_f32_e32 v8, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmamk_f32 v7, v0, 0x32a5705f, v7
	v_sub_f32_e32 v4, v4, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f32_e32 v4, v4, v7
	v_cvt_i32_f32_e32 v7, v8
	v_exp_f32_e32 v4, v4
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v4, v4, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v4, 0, v4, s1
	v_cmp_nlt_f32_e64 s1, 0x42b17218, v0
	v_cndmask_b32_e64 v0, 0x7f800000, v4, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v0, 1.0, v0
	v_cmp_gt_f32_e64 s1, 0x800000, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v4, 1.0, 0x4f800000, s1
	v_mul_f32_e32 v0, v0, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_log_f32_e32 v0, v0
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v4, 0x3f317217, v0
	v_cmp_gt_f32_e64 s2, 0x7f800000, |v0|
	v_fma_f32 v7, 0x3f317217, v0, -v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmamk_f32 v7, v0, 0x3377d1cf, v7
	v_add_f32_e32 v4, v4, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v0, v0, v4, s2
	v_cndmask_b32_e64 v4, 0, 0x41b17218, s1
	v_sub_f32_e32 v0, v0, v4
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f32_e32 v0, v3, v0
                                        ; implicit-def: $vgpr3
.LBB4_77:                               ; %Flow275
	s_and_not1_saveexec_b32 s10, s10
	s_cbranch_execz .LBB4_79
; %bb.78:
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v3, v3, v0
	v_mul_f32_e32 v4, 0x3fb8aa3b, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f32 v7, 0x3fb8aa3b, v3, -v4
	v_rndne_f32_e32 v8, v4
	v_dual_fmamk_f32 v7, v3, 0x32a5705f, v7 :: v_dual_sub_f32 v4, v4, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_f32_e32 v4, v4, v7
	v_cvt_i32_f32_e32 v7, v8
	v_cmp_ngt_f32_e64 s1, 0xc2ce8ed0, v3
	v_exp_f32_e32 v4, v4
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v4, v4, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v4, 0, v4, s1
	v_cmp_nlt_f32_e64 s1, 0x42b17218, v3
	v_cndmask_b32_e64 v3, 0x7f800000, v4, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v3, 1.0, v3
	v_cmp_gt_f32_e64 s1, 0x800000, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v4, 1.0, 0x4f800000, s1
	v_mul_f32_e32 v3, v3, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_log_f32_e32 v3, v3
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v4, 0x3f317217, v3
	v_cmp_gt_f32_e64 s2, 0x7f800000, |v3|
	v_fma_f32 v7, 0x3f317217, v3, -v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmamk_f32 v7, v3, 0x3377d1cf, v7
	v_add_f32_e32 v4, v4, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v3, v3, v4, s2
	v_cndmask_b32_e64 v4, 0, 0x41b17218, s1
	v_sub_f32_e32 v3, v3, v4
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f32_e32 v0, v0, v3
.LBB4_79:                               ; %Flow276
	s_or_b32 exec_lo, exec_lo, s10
.LBB4_80:                               ; %Flow277
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s7
	v_mov_b32_e32 v3, v0
.LBB4_81:                               ; %_Z9logsumexpff.exit200
	s_or_b32 exec_lo, exec_lo, s4
	s_and_b32 s0, s0, vcc_lo
	global_store_b32 v[5:6], v3, off
	s_and_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB4_107
; %bb.82:
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, F@rel32@lo+4
	s_addc_u32 s1, s1, F@rel32@hi+12
	v_add_nc_u32_e32 v0, -1, v2
	s_load_b32 s1, s[0:1], 0x0
	v_ashrrev_i32_e32 v8, 31, v1
	s_getpc_b64 s[10:11]
	s_add_u32 s10, s10, r3logprob@rel32@lo+4
	s_addc_u32 s11, s11, r3logprob@rel32@hi+12
	s_mov_b32 s2, exec_lo
	v_add_nc_u32_e32 v5, s14, v0
	v_mul_lo_u32 v7, v0, s5
	s_load_b32 s0, s[10:11], 0x0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[3:4], null, v5, s5, v[1:2]
	v_ashrrev_i32_e32 v9, 31, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_ashrrev_i32_e32 v4, 31, v3
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s1, s1, s5
	v_add_nc_u32_e32 v2, s1, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[5:6], null, v2, s5, v[1:2]
	v_add_co_u32 v6, vcc_lo, v7, v1
	v_add_co_ci_u32_e32 v7, vcc_lo, v9, v8, vcc_lo
	v_lshlrev_b64 v[2:3], 2, v[3:4]
	v_lshlrev_b64 v[7:8], 2, v[6:7]
	v_ashrrev_i32_e32 v6, 31, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v2, vcc_lo, s8, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s9, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_lshlrev_b64 v[9:10], 2, v[5:6]
	v_add_co_u32 v6, vcc_lo, s12, v7
	v_add_co_ci_u32_e32 v7, vcc_lo, s13, v8, vcc_lo
	global_load_b32 v5, v[2:3], off offset:4
	v_add_co_u32 v2, vcc_lo, s8, v9
	v_add_co_ci_u32_e32 v3, vcc_lo, s9, v10, vcc_lo
	global_load_b32 v7, v[6:7], off offset:4
	global_load_b32 v6, v[2:3], off
	s_waitcnt vmcnt(2)
	v_fmac_f32_e64 v5, s0, s6
	s_waitcnt vmcnt(1)
	v_mul_f32_e32 v4, s6, v7
	s_delay_alu instid0(VALU_DEP_2)
	v_fmac_f32_e32 v5, s6, v7
	s_waitcnt vmcnt(0)
	v_cmpx_nge_f32_e32 0xe0ad78ec, v6
	s_cbranch_execz .LBB4_90
; %bb.83:
	s_mov_b32 s4, exec_lo
	v_cmpx_nge_f32_e32 0xe0ad78ec, v5
	s_cbranch_execz .LBB4_89
; %bb.84:
	s_mov_b32 s0, exec_lo
	v_cmpx_ngt_f32_e32 v6, v5
	s_xor_b32 s7, exec_lo, s0
	s_cbranch_execz .LBB4_86
; %bb.85:
	v_sub_f32_e32 v6, v6, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v7, 0x3fb8aa3b, v6
	v_fma_f32 v8, 0x3fb8aa3b, v6, -v7
	v_rndne_f32_e32 v9, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmamk_f32 v8, v6, 0x32a5705f, v8 :: v_dual_sub_f32 v7, v7, v9
	v_add_f32_e32 v7, v7, v8
	v_cvt_i32_f32_e32 v8, v9
	v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_exp_f32_e32 v7, v7
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v7, v7, v8
	v_cndmask_b32_e32 v7, 0, v7, vcc_lo
	v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v6, 0x7f800000, v7, vcc_lo
	v_add_f32_e32 v6, 1.0, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f32_e32 vcc_lo, 0x800000, v6
	v_cndmask_b32_e64 v7, 1.0, 0x4f800000, vcc_lo
	v_mul_f32_e32 v6, v6, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_log_f32_e32 v6, v6
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v7, 0x3f317217, v6
	v_cmp_gt_f32_e64 s0, 0x7f800000, |v6|
	v_fma_f32 v8, 0x3f317217, v6, -v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmamk_f32 v8, v6, 0x3377d1cf, v8
	v_add_f32_e32 v7, v7, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v6, v6, v7, s0
	v_cndmask_b32_e64 v7, 0, 0x41b17218, vcc_lo
	v_sub_f32_e32 v6, v6, v7
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f32_e32 v6, v5, v6
                                        ; implicit-def: $vgpr5
.LBB4_86:                               ; %Flow271
	s_and_not1_saveexec_b32 s7, s7
	s_cbranch_execz .LBB4_88
; %bb.87:
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v5, v5, v6
	v_mul_f32_e32 v7, 0x3fb8aa3b, v5
	v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f32 v8, 0x3fb8aa3b, v5, -v7
	v_rndne_f32_e32 v9, v7
	v_dual_fmamk_f32 v8, v5, 0x32a5705f, v8 :: v_dual_sub_f32 v7, v7, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f32_e32 v7, v7, v8
	v_cvt_i32_f32_e32 v8, v9
	v_exp_f32_e32 v7, v7
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v7, v7, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v7, 0, v7, vcc_lo
	v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v5
	v_cndmask_b32_e32 v5, 0x7f800000, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v5, 1.0, v5
	v_cmp_gt_f32_e32 vcc_lo, 0x800000, v5
	v_cndmask_b32_e64 v7, 1.0, 0x4f800000, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v5, v5, v7
	v_log_f32_e32 v5, v5
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v7, 0x3f317217, v5
	v_cmp_gt_f32_e64 s0, 0x7f800000, |v5|
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v8, 0x3f317217, v5, -v7
	v_fmamk_f32 v8, v5, 0x3377d1cf, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v7, v7, v8
	v_cndmask_b32_e64 v5, v5, v7, s0
	v_cndmask_b32_e64 v7, 0, 0x41b17218, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v5, v5, v7
	v_add_f32_e32 v6, v6, v5
.LBB4_88:                               ; %Flow272
	s_or_b32 exec_lo, exec_lo, s7
.LBB4_89:                               ; %Flow273
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s4
	v_mov_b32_e32 v5, v6
.LBB4_90:                               ; %_Z9logsumexpff.exit204
	s_or_b32 exec_lo, exec_lo, s2
	v_add_nc_u32_e32 v8, s1, v0
	global_store_b32 v[2:3], v5, off
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, r4logprob@rel32@lo+4
	s_addc_u32 s1, s1, r4logprob@rel32@hi+12
	s_load_b32 s0, s[0:1], 0x0
	v_mad_u64_u32 v[6:7], null, v8, s5, v[1:2]
	s_mov_b32 s1, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v7, 31, v6
	v_lshlrev_b64 v[6:7], 2, v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, s8, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, s9, v7, vcc_lo
	global_load_b32 v6, v[6:7], off offset:4
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_fmac_f32_e64 v6, s0, s6
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f32_e32 v6, v4, v6
	v_cmpx_nge_f32_e32 0xe0ad78ec, v5
	s_cbranch_execz .LBB4_98
; %bb.91:
	s_mov_b32 s2, exec_lo
	s_delay_alu instid0(VALU_DEP_2)
	v_cmpx_nge_f32_e32 0xe0ad78ec, v6
	s_cbranch_execz .LBB4_97
; %bb.92:
	s_mov_b32 s0, exec_lo
	v_cmpx_ngt_f32_e32 v5, v6
	s_xor_b32 s4, exec_lo, s0
	s_cbranch_execz .LBB4_94
; %bb.93:
	v_sub_f32_e32 v5, v5, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v7, 0x3fb8aa3b, v5
	v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v5
	v_fma_f32 v8, 0x3fb8aa3b, v5, -v7
	v_rndne_f32_e32 v9, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmamk_f32 v8, v5, 0x32a5705f, v8 :: v_dual_sub_f32 v7, v7, v9
	v_add_f32_e32 v7, v7, v8
	v_cvt_i32_f32_e32 v8, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_exp_f32_e32 v7, v7
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v7, v7, v8
	v_cndmask_b32_e32 v7, 0, v7, vcc_lo
	v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v5, 0x7f800000, v7, vcc_lo
	v_add_f32_e32 v5, 1.0, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f32_e32 vcc_lo, 0x800000, v5
	v_cndmask_b32_e64 v7, 1.0, 0x4f800000, vcc_lo
	v_mul_f32_e32 v5, v5, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_log_f32_e32 v5, v5
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v7, 0x3f317217, v5
	v_cmp_gt_f32_e64 s0, 0x7f800000, |v5|
	v_fma_f32 v8, 0x3f317217, v5, -v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmamk_f32 v8, v5, 0x3377d1cf, v8
	v_add_f32_e32 v7, v7, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v5, v5, v7, s0
	v_cndmask_b32_e64 v7, 0, 0x41b17218, vcc_lo
	v_sub_f32_e32 v5, v5, v7
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f32_e32 v5, v6, v5
                                        ; implicit-def: $vgpr6
.LBB4_94:                               ; %Flow268
	s_and_not1_saveexec_b32 s4, s4
	s_cbranch_execz .LBB4_96
; %bb.95:
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v6, v6, v5
	v_mul_f32_e32 v7, 0x3fb8aa3b, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f32 v8, 0x3fb8aa3b, v6, -v7
	v_rndne_f32_e32 v9, v7
	v_dual_fmamk_f32 v8, v6, 0x32a5705f, v8 :: v_dual_sub_f32 v7, v7, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_f32_e32 v7, v7, v8
	v_cvt_i32_f32_e32 v8, v9
	v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v6
	v_exp_f32_e32 v7, v7
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v7, v7, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v7, 0, v7, vcc_lo
	v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v6
	v_cndmask_b32_e32 v6, 0x7f800000, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v6, 1.0, v6
	v_cmp_gt_f32_e32 vcc_lo, 0x800000, v6
	v_cndmask_b32_e64 v7, 1.0, 0x4f800000, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v6, v6, v7
	v_log_f32_e32 v6, v6
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v7, 0x3f317217, v6
	v_cmp_gt_f32_e64 s0, 0x7f800000, |v6|
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v8, 0x3f317217, v6, -v7
	v_fmamk_f32 v8, v6, 0x3377d1cf, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v7, v7, v8
	v_cndmask_b32_e64 v6, v6, v7, s0
	v_cndmask_b32_e64 v7, 0, 0x41b17218, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v6, v6, v7
	v_add_f32_e32 v5, v5, v6
.LBB4_96:                               ; %Flow269
	s_or_b32 exec_lo, exec_lo, s4
.LBB4_97:                               ; %Flow270
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s2
	v_mov_b32_e32 v6, v5
.LBB4_98:                               ; %_Z9logsumexpff.exit206
	s_or_b32 exec_lo, exec_lo, s1
	v_add_nc_u32_e32 v0, s3, v0
	global_store_b32 v[2:3], v6, off
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, r7logprob@rel32@lo+4
	s_addc_u32 s1, s1, r7logprob@rel32@hi+12
	s_load_b32 s0, s[0:1], 0x0
	v_mad_u64_u32 v[7:8], null, v0, s5, v[1:2]
	s_mov_b32 s1, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v8, 31, v7
	v_lshlrev_b64 v[0:1], 2, v[7:8]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s8, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s9, v1, vcc_lo
	global_load_b32 v0, v[0:1], off offset:4
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_fmac_f32_e64 v0, s0, s6
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f32_e32 v0, v4, v0
	v_cmpx_nge_f32_e32 0xe0ad78ec, v6
	s_cbranch_execz .LBB4_106
; %bb.99:
	s_mov_b32 s2, exec_lo
	s_delay_alu instid0(VALU_DEP_2)
	v_cmpx_nge_f32_e32 0xe0ad78ec, v0
	s_cbranch_execz .LBB4_105
; %bb.100:
	s_mov_b32 s0, exec_lo
	v_cmpx_ngt_f32_e32 v6, v0
	s_xor_b32 s3, exec_lo, s0
	s_cbranch_execz .LBB4_102
; %bb.101:
	v_sub_f32_e32 v1, v6, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v4, 0x3fb8aa3b, v1
	v_fma_f32 v5, 0x3fb8aa3b, v1, -v4
	v_rndne_f32_e32 v6, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_sub_f32_e32 v4, v4, v6
	v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v1
	v_fmamk_f32 v5, v1, 0x32a5705f, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f32_e32 v4, v4, v5
	v_cvt_i32_f32_e32 v5, v6
	v_exp_f32_e32 v4, v4
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v4, v4, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v4, 0, v4, vcc_lo
	v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v1
	v_cndmask_b32_e32 v1, 0x7f800000, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v1, 1.0, v1
	v_cmp_gt_f32_e32 vcc_lo, 0x800000, v1
	v_cndmask_b32_e64 v4, 1.0, 0x4f800000, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v1, v1, v4
	v_log_f32_e32 v1, v1
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v4, 0x3f317217, v1
	v_cmp_gt_f32_e64 s0, 0x7f800000, |v1|
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v5, 0x3f317217, v1, -v4
	v_fmamk_f32 v5, v1, 0x3377d1cf, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v4, v4, v5
	v_cndmask_b32_e64 v1, v1, v4, s0
	v_cndmask_b32_e64 v4, 0, 0x41b17218, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v1, v1, v4
	v_add_f32_e32 v6, v0, v1
                                        ; implicit-def: $vgpr0
.LBB4_102:                              ; %Flow
	s_and_not1_saveexec_b32 s3, s3
	s_cbranch_execz .LBB4_104
; %bb.103:
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v0, v0, v6
	v_mul_f32_e32 v1, 0x3fb8aa3b, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f32 v4, 0x3fb8aa3b, v0, -v1
	v_rndne_f32_e32 v5, v1
	v_sub_f32_e32 v1, v1, v5
	v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmamk_f32 v4, v0, 0x32a5705f, v4
	v_add_f32_e32 v1, v1, v4
	v_cvt_i32_f32_e32 v4, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_exp_f32_e32 v1, v1
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v1, v1, v4
	v_cndmask_b32_e32 v1, 0, v1, vcc_lo
	v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v0, 0x7f800000, v1, vcc_lo
	v_add_f32_e32 v0, 1.0, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f32_e32 vcc_lo, 0x800000, v0
	v_cndmask_b32_e64 v1, 1.0, 0x4f800000, vcc_lo
	v_mul_f32_e32 v0, v0, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_log_f32_e32 v0, v0
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v1, 0x3f317217, v0
	v_cmp_gt_f32_e64 s0, 0x7f800000, |v0|
	v_fma_f32 v4, 0x3f317217, v0, -v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmamk_f32 v4, v0, 0x3377d1cf, v4
	v_add_f32_e32 v1, v1, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v0, v0, v1, s0
	v_cndmask_b32_e64 v1, 0, 0x41b17218, vcc_lo
	v_sub_f32_e32 v0, v0, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f32_e32 v6, v6, v0
.LBB4_104:                              ; %Flow266
	s_or_b32 exec_lo, exec_lo, s3
.LBB4_105:                              ; %Flow267
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s2
	v_mov_b32_e32 v0, v6
.LBB4_106:                              ; %_Z9logsumexpff.exit208
	s_or_b32 exec_lo, exec_lo, s1
	global_store_b32 v[2:3], v0, off
.LBB4_107:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16outsidealgorithmPfPKfS1_S1_iif
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 16
		.amdhsa_next_free_sgpr 26
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end4:
	.size	_Z16outsidealgorithmPfPKfS1_S1_iif, .Lfunc_end4-_Z16outsidealgorithmPfPKfS1_S1_iif
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 8460
; NumSgprs: 28
; NumVgprs: 16
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 3
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 28
; NumVGPRsForWavesPerEU: 16
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.protected	S                       ; @S
	.type	S,@object
	.section	.bss,"aw",@nobits
	.globl	S
	.p2align	2, 0x0
S:
	.long	0                               ; 0x0
	.size	S, 4

	.protected	F                       ; @F
	.type	F,@object
	.data
	.globl	F
	.p2align	2, 0x0
F:
	.long	1                               ; 0x1
	.size	F, 4

	.protected	L                       ; @L
	.type	L,@object
	.globl	L
	.p2align	2, 0x0
L:
	.long	2                               ; 0x2
	.size	L, 4

	.protected	r1logprob               ; @r1logprob
	.type	r1logprob,@object
	.globl	r1logprob
	.p2align	2, 0x0
r1logprob:
	.long	0xbe1054d1                      ; float -0.140948549
	.size	r1logprob, 4

	.protected	r2logprob               ; @r2logprob
	.type	r2logprob,@object
	.globl	r2logprob
	.p2align	2, 0x0
r2logprob:
	.long	0xc008fc06                      ; float -2.14038229
	.size	r2logprob, 4

	.protected	r3logprob               ; @r3logprob
	.type	r3logprob,@object
	.globl	r3logprob
	.p2align	2, 0x0
r3logprob:
	.long	0xc088edcc                      ; float -4.27902794
	.size	r3logprob, 4

	.protected	r4logprob               ; @r4logprob
	.type	r4logprob,@object
	.globl	r4logprob
	.p2align	2, 0x0
r4logprob:
	.long	0xbe74717b                      ; float -0.238714144
	.size	r4logprob, 4

	.protected	r5logprob               ; @r5logprob
	.type	r5logprob,@object
	.globl	r5logprob
	.p2align	2, 0x0
r5logprob:
	.long	0xbfc6551c                      ; float -1.54947233
	.size	r5logprob, 4

	.protected	r6logprob               ; @r6logprob
	.type	r6logprob,@object
	.globl	r6logprob
	.p2align	2, 0x0
r6logprob:
	.long	0xbde418b3                      ; float -0.111375235
	.size	r6logprob, 4

	.protected	r7logprob               ; @r7logprob
	.type	r7logprob,@object
	.globl	r7logprob
	.p2align	2, 0x0
r7logprob:
	.long	0xc0100059                      ; float -2.25002122
	.size	r7logprob, 4

	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym S
	.addrsig_sym F
	.addrsig_sym L
	.addrsig_sym r1logprob
	.addrsig_sym r2logprob
	.addrsig_sym r3logprob
	.addrsig_sym r4logprob
	.addrsig_sym r5logprob
	.addrsig_sym r6logprob
	.addrsig_sym r7logprob
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         44
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         52
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         54
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         56
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         58
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         60
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         62
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         104
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 296
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z16initialiseinsidePfS_S_PKfi
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z16initialiseinsidePfS_S_PKfi.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     19
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .offset:         40
        .size:           4
        .value_kind:     by_value
      - .offset:         44
        .size:           4
        .value_kind:     by_value
      - .offset:         48
        .size:           4
        .value_kind:     by_value
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         60
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         64
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         68
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         70
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         72
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         74
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         76
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         78
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         112
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         120
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 312
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z15insidealgorithmPfS_S_PKfS1_iif
    .private_segment_fixed_size: 0
    .sgpr_count:     22
    .sgpr_spill_count: 0
    .symbol:         _Z15insidealgorithmPfS_S_PKfS1_iif.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     13
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         36
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     by_value
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         52
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         60
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         62
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         64
        .size:           2
        .value_kind:     hidden_group_size_z
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amdhsa.version:
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...

	.end_amdgpu_metadata
