/*
* This sample implements a separable convolution 
* of a 2D image with an arbitrary filter.
*/

#include <stdio.h>
#include <stdlib.h>
#include <time.h>

#define MAX_XY 32
#define ABS(val)  	((val)<0.0 ? (-(val)) : (val))
#define accuracy  	0.00005 
#define TILE_H 32
#define TILE_W 32
#define FILTER_RADIUS 32
#define FILTER_LENGTH 	(2 * FILTER_RADIUS  + 1)


__device__ __constant__ double d_Filter[FILTER_LENGTH];

#define cudaCheckError() {                                                                       \
        cudaError_t error=cudaGetLastError();                                                        \
        if(error!=cudaSuccess) {                                                                     \
            printf("ERROR IN CUDA %s:%d: '%s'\n",__FILE__,__LINE__,cudaGetErrorString(error));        \
            cudaDeviceReset(); \
            exit(EXIT_FAILURE);                                                                  \
        }                                                                                        \
    }


__global__ void convolutionRowGPU(double *d_Dst, double *d_Src,int imageW, int imageH) {
    
    int x,y,k,d,P_x,x0,number_of_writes = 1;
   
    __shared__ double image[TILE_H * (TILE_W+FILTER_RADIUS*2)];  
    
    x =  blockIdx.x*blockDim.x + threadIdx.x;
    y =  blockIdx.y*blockDim.y + threadIdx.y;
   
    if(FILTER_RADIUS > TILE_W){
        number_of_writes = FILTER_RADIUS/TILE_W + 1;
    }
    
    P_x = x - FILTER_RADIUS;
    

    
    if(P_x < 0) {
        image[threadIdx.x + threadIdx.y*(TILE_W+FILTER_RADIUS*2)] = 0;
        image[threadIdx.x + blockDim.x + threadIdx.y*(TILE_W+FILTER_RADIUS*2)] = d_Src[y*imageW + x + blockDim.x - FILTER_RADIUS];
        image[threadIdx.x + blockDim.x + FILTER_RADIUS + threadIdx.y*(TILE_W+FILTER_RADIUS*2)] = d_Src[y*imageW + x + blockDim.x];
    }
    else{
        if(threadIdx.x < FILTER_RADIUS) {
            image[threadIdx.x + threadIdx.y*(TILE_W+FILTER_RADIUS*2)] = d_Src[y*imageW + x - FILTER_RADIUS];
            image[threadIdx.x + blockDim.x + threadIdx.y*(TILE_W+FILTER_RADIUS*2)] = d_Src[y*imageW + x + blockDim.x - FILTER_RADIUS];
            image[threadIdx.x + blockDim.x + FILTER_RADIUS + threadIdx.y*(TILE_W+FILTER_RADIUS*2)] = d_Src[y*imageW + x + blockDim.x];
        }
        else{
            image[threadIdx.x + threadIdx.y*(TILE_W+FILTER_RADIUS*2)] = d_Src[y*imageW + x - FILTER_RADIUS];
        }
            
    }

    P_x = x + FILTER_RADIUS;
    
    if(P_x > imageW - 1) {
        image[threadIdx.x + 2*FILTER_RADIUS +  threadIdx.y*(TILE_W+FILTER_RADIUS*2)] = 0;
        
        image[threadIdx.x + FILTER_RADIUS +  threadIdx.y*(TILE_W+FILTER_RADIUS*2)] = d_Src[y*imageW + x];
    }
    
    __syncthreads();
    
    double sum = 0;
    
    x0 = threadIdx.x + FILTER_RADIUS ;
    for(k = -FILTER_RADIUS; k <= FILTER_RADIUS; k++) {
        d = x0 + k;
        
        sum += image[threadIdx.y*(TILE_W+FILTER_RADIUS*2) + d] * d_Filter[FILTER_RADIUS - k];
        
	}
    d_Dst[y*imageW + x] = sum;
}


__global__ void convolutionColumnGPU(double *d_Dst, double *d_Src,int imageW, int imageH) {
    
      
    int x,y,k,d,P_y,y0;
   
    __shared__ double image[TILE_W * (TILE_H+FILTER_RADIUS*2)];  
    
    x =  blockIdx.x*blockDim.x + threadIdx.x;
    y =  blockIdx.y*blockDim.y + threadIdx.y;
    
    
    P_y = y - FILTER_RADIUS;
    
    if(P_y < 0) {
        image[threadIdx.y*(TILE_W) + threadIdx.x] = 0;
        image[(threadIdx.y + blockDim.y)*TILE_W + threadIdx.x] = d_Src[(y + blockDim.y - FILTER_RADIUS)*imageW + x ];
        image[(threadIdx.y + blockDim.y + FILTER_RADIUS)*TILE_W + threadIdx.x] = d_Src[(y + blockDim.y)*imageW + x ];
    }
    else{
        if(threadIdx.y < FILTER_RADIUS){
            
            if(y + blockDim.y > imageH - 1) {
                image[threadIdx.y*(TILE_W) + threadIdx.x] = d_Src[(y- FILTER_RADIUS)*imageW + x];
            }
            else {
                image[threadIdx.y*TILE_W + threadIdx.x] = d_Src[(y- FILTER_RADIUS)*imageW + x];
                image[(threadIdx.y + blockDim.y)*TILE_W + threadIdx.x] = d_Src[(y + blockDim.y - FILTER_RADIUS)*imageW + x ];
                image[(threadIdx.y + blockDim.y + FILTER_RADIUS)*TILE_W + threadIdx.x] = d_Src[(y + blockDim.y)*imageW + x ];
            }
                
        }
        else{
            image[threadIdx.y*(TILE_W) + threadIdx.x] = d_Src[(y- FILTER_RADIUS)*imageW + x];
        }
    }

    P_y = y + FILTER_RADIUS;
    
    if(P_y > imageH - 1) {
        
        image[(threadIdx.y+2*FILTER_RADIUS)*TILE_W + threadIdx.x] = 0;
        
        image[(threadIdx.y + FILTER_RADIUS)*TILE_W + threadIdx.x] = d_Src[y*imageW + x];
    }
        
    __syncthreads();
    
    
    double sum = 0;
    
    y0 = threadIdx.y + FILTER_RADIUS ;
    for(k = -FILTER_RADIUS; k <= FILTER_RADIUS; k++) {
        d = y0 + k;
        
        sum += image[d*TILE_W + threadIdx.x] * d_Filter[FILTER_RADIUS - k];
        
    }
    d_Dst[y*imageW + x] = sum;
    
}


 

////////////////////////////////////////////////////////////////////////////////
// Reference row convolution filter
////////////////////////////////////////////////////////////////////////////////


void convolutionRowCPU(double *h_Dst, double *h_Src, double *h_Filter, 
                       int imageW, int imageH) {

  int x, y, k;
                      
  for (y = 0; y < imageH; y++) {
    for (x = 0; x < imageW; x++) {
      double sum = 0;

      for (k = -FILTER_RADIUS; k <= FILTER_RADIUS; k++) {
        int d = x + k;

        if (d >= 0 && d < imageW) {
          sum += h_Src[y * imageW + d] * h_Filter[FILTER_RADIUS - k];
        }     
      }
      //printf("ROW X:%d Y:%d SUM:%f\n\n",x,y,sum);
      h_Dst[y * imageW + x] = sum;
    }
  }
        
}



////////////////////////////////////////////////////////////////////////////////
// Reference column convolution filter
////////////////////////////////////////////////////////////////////////////////
void convolutionColumnCPU(double *h_Dst, double *h_Src, double *h_Filter,
    			   int imageW, int imageH) {

  int x, y, k;
  
  for (y = 0; y < imageH; y++) {
    for (x = 0; x < imageW; x++) {
      double sum = 0;

      for (k = -FILTER_RADIUS; k <= FILTER_RADIUS; k++) {
        int d = y + k;

        if (d >= 0 && d < imageH) {
          sum += h_Src[d * imageW + x] * h_Filter[FILTER_RADIUS - k];
        }   
      }
      //printf("COL X:%d Y:%d SUM:%f\n\n",x,y,sum);
      h_Dst[y * imageW + x] = sum;
    }
  }
    
}


//


////////////////////////////////////////////////////////////////////////////////
// Main program
////////////////////////////////////////////////////////////////////////////////
int main(int argc, char **argv) {
    
    double
    *h_Filter,
    *h_Input,
    *h_Buffer,
    *h_OutputCPU,
    *d_Input,
    *d_Buffer,
    *d_OutputGPU,
    *h_OutputGPU;


    int imageW;
    int imageH;
    //int i=MAX_XY;
    //int count=0;
    unsigned int i;
    
    double timing;
    clock_t start;
    clock_t end;
    

    
    
// Ta imageW, imageH ta dinei o xrhsths kai thewroume oti einai isa,
    // dhladh imageW = imageH = N, opou to N to dinei o xrhsths.
    // Gia aplothta thewroume tetragwnikes eikones.  

    printf("Enter image size. Should be a power of two and greater than %d : ", FILTER_LENGTH);
    scanf("%d", &imageW);
    imageH = imageW;
    
 //   while(1){
 //       if(imageW % i == 0) {
 //           dim3 threads(i,i);
 //           dim3 blocks(imageW/i,imageW/i);
 //           break;
 //       }
 //       i--;
 //   }
    
    dim3 threads(MAX_XY,MAX_XY);
    dim3 blocks (imageH/MAX_XY,imageW/MAX_XY); /* this is wrong, fix later */
    
    if(imageH < MAX_XY && imageW < MAX_XY){
        threads.x = imageH;
	threads.y = imageH;
	blocks.x = 1;
	blocks.y = 1;
    }
    
    printf("Image Width x Height = %i x %i\n\n", imageW, imageH);
    printf("Allocating and initializing host arrays and device array...\n");
    
    
        
    
    // Tha htan kalh idea na elegxete kai to apotelesma twn malloc...
    h_Filter    = (double *)malloc(FILTER_LENGTH * sizeof(double));
    h_Input     = (double *)malloc(imageW * imageH * sizeof(double));
    h_Buffer    = (double *)malloc(imageW * imageH * sizeof(double));
    h_OutputCPU = (double *)malloc(imageW * imageH * sizeof(double));
    h_OutputGPU = (double *)malloc(imageW * imageH * sizeof(double));
    
    if (h_Filter==NULL || h_Input == NULL || h_Buffer == NULL || h_OutputCPU == NULL){
        printf("Something went wrong wille malloc in CPU\n");
    }
    
    printf("Memmory allocation for host arrays: COMPLETED \n");
    
    
    cudaMallocManaged((void**)&d_Input,imageH * imageW * sizeof(double));
    cudaMallocManaged((void**)&d_Buffer,imageH * imageW * sizeof(double));
    cudaMallocManaged((void**)&d_OutputGPU,imageH * imageW * sizeof(double));
    
    cudaCheckError();
    
    printf("Memmory allocation for device arrays: COMPLETED \n");
    
    
    
    // to 'h_Filter' apotelei to filtro me to opoio ginetai to convolution kai
    // arxikopoieitai tuxaia. To 'h_Input' einai h eikona panw sthn opoia ginetai
    // to convolution kai arxikopoieitai kai auth tuxaia.
    
    srand(200);

    for (i = 0; i < FILTER_LENGTH; i++) {
        h_Filter[i] = (double)(rand() % 16);
    }

    for (i = 0; i < imageW * imageH; i++) {
        h_Input[i] = (double)rand() / ((double)RAND_MAX / 255) + (double)rand() / (double)RAND_MAX;
    }
    
    printf("initialization of host arrays: COMPLETED \n");

    /* START OF HOST2DEVICE TRANSFER */    
    start=clock();
    cudaMemcpyToSymbol(d_Filter,h_Filter,FILTER_LENGTH * sizeof(double),0,cudaMemcpyHostToDevice);
    cudaMemcpy(d_Input, h_Input,imageH * imageW * sizeof(double),cudaMemcpyHostToDevice);
    
    cudaCheckError();
    end=clock();
    printf("memcpy host2device execution time: %g s\n", (double(end-start))/CLOCKS_PER_SEC);
    printf("initialization of device arrays: COMPLETED \n\n");
    
    printf("GPU computation...\n");
    
    /* START OF ROW KERNEL */
    start=clock();
    convolutionRowGPU<<<blocks,threads>>>(d_Buffer,d_Input,imageW,imageH);
    cudaCheckError();
    
    cudaDeviceSynchronize();
    end=clock();
    printf("row kernel execution time: %g s\n", (double(end-start))/CLOCKS_PER_SEC);
    /* END OF ROW KERNEL */

    /* START OF COL KERNEL */
    start=clock();
    convolutionColumnGPU<<<blocks,threads>>>(d_OutputGPU,d_Buffer,imageW,imageH);
    
    cudaCheckError();
    cudaDeviceSynchronize();
    end=clock();
    printf("col kernel execution time: %g s\n", (double(end-start))/CLOCKS_PER_SEC);
    /* END OF COL KERNEL */
    printf("GPU computation : COMPLETED\n\n");
    
    /* START OF DEVICE2HOST TRANSFER */
    start=clock();
    cudaMemcpy(h_OutputGPU,d_OutputGPU,imageH * imageW * sizeof(double),cudaMemcpyDeviceToHost);
    end=clock();
    printf("memcpy device2host execution time: %g s\n", (double(end-start))/CLOCKS_PER_SEC);
    /* END OF DEVICE2HOST TRANSFER */   
    // To parakatw einai to kommati pou ekteleitai sthn CPU kai me vash auto prepei na ginei h sugrish me thn GPU.
    printf("CPU computation...\n");
    
    start = clock();
    
    convolutionRowCPU(h_Buffer, h_Input, h_Filter, imageW, imageH); // convolution kata grammes
    convolutionColumnCPU(h_OutputCPU, h_Buffer, h_Filter, imageW, imageH); // convolution kata sthles
    
    end = clock();
    
    timing = ((double) (end - start)) / CLOCKS_PER_SEC;
    
    printf("CPU computation : COMPLETED in time:%10.5f\n",timing);

    // Kanete h sugrish anamesa se GPU kai CPU kai an estw kai kapoio apotelesma xeperna thn akriveia
    // pou exoume orisei, tote exoume sfalma kai mporoume endexomenws na termatisoume to programma mas 
    
    
    printf("\nCPU computations == GPU computation?\n");
    for (i = 0; i < imageW * imageH; i++) {
        if(h_OutputGPU[i] > h_OutputCPU[i] + accuracy || h_OutputGPU[i] < h_OutputCPU[i] - accuracy){
            printf("CPU computations == GPU computation : FALSE line:%d difrence:%f \nExitting program...\n GPU: %lf \n",i,h_OutputGPU[i]-h_OutputCPU[i],h_OutputGPU[i]);
           
            
            free(h_OutputCPU);
            free(h_OutputGPU);
            free(h_Buffer);
            free(h_Input);
            free(h_Filter);
            
            
            // free all the allocated memory GPU
            cudaFree(d_OutputGPU);
            cudaFree(d_Buffer);
            cudaFree(d_Input);
            
            cudaCheckError();
            
            cudaDeviceReset();
            
           return(1);
        }
            
    }
    printf("CPU computations == GPU computation : TRUE \nExitting program after Memmory Free...\n");



    // free all the allocated memory CPU
    free(h_OutputCPU);
    free(h_OutputGPU);
    free(h_Buffer);
    free(h_Input);
    free(h_Filter);
    
    // free all the allocated memory GPU
    cudaFree(d_OutputGPU);
    cudaFree(d_Buffer);
    cudaFree(d_Input);
      
    cudaDeviceReset();


    return 0;
}

	.file	"tmpxft_00220519_00000000-6_Convolution2D_OPT.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2032:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2032:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z17convolutionRowCPUPdS_S_ii
	.type	_Z17convolutionRowCPUPdS_S_ii, @function
_Z17convolutionRowCPUPdS_S_ii:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movq	%rsi, %r11
	movq	%rdi, %r9
	xorl	%esi, %esi
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	xorl	%r10d, %r10d
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	%rdx, %rbx
	movl	%ecx, %edx
.L3:
	cmpl	%r8d, %r10d
	jge	.L2
	movslq	%esi, %rax
	leaq	(%r9,%rax,8), %r12
	xorl	%eax, %eax
.L8:
	cmpl	%eax, %edx
	jle	.L15
	leal	-32(%rax), %ecx
	xorl	%edi, %edi
	xorps	%xmm0, %xmm0
.L5:
	testl	%ecx, %ecx
	js	.L4
	cmpl	%ecx, %edx
	jle	.L4
	leal	(%rcx,%rsi), %ebp
	movslq	%ebp, %rbp
	movsd	(%r11,%rbp,8), %xmm1
	mulsd	512(%rbx,%rdi), %xmm1
	addsd	%xmm1, %xmm0
.L4:
	subq	$8, %rdi
	incl	%ecx
	cmpq	$-520, %rdi
	jne	.L5
	movsd	%xmm0, (%r12,%rax,8)
	incq	%rax
	jmp	.L8
.L15:
	incl	%r10d
	addl	%edx, %esi
	jmp	.L3
.L2:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z17convolutionRowCPUPdS_S_ii, .-_Z17convolutionRowCPUPdS_S_ii
	.globl	_Z20convolutionColumnCPUPdS_S_ii
	.type	_Z20convolutionColumnCPUPdS_S_ii, @function
_Z20convolutionColumnCPUPdS_S_ii:
.LFB2028:
	.cfi_startproc
	endbr64
	movl	%ecx, %eax
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rdx, %r11
	movq	%rdi, %r9
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rsi, %r10
	xorl	%edx, %edx
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	imull	$-33, %eax, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	imull	$-32, %ecx, %r12d
	xorl	%ecx, %ecx
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
.L17:
	cmpl	%r8d, %ecx
	jge	.L16
	leal	(%rdx,%r12), %ebp
	movslq	%edx, %rdx
	leaq	(%r9,%rdx,8), %r14
	xorl	%edx, %edx
.L22:
	cmpl	%edx, %eax
	jle	.L28
	leal	-32(%rcx), %edi
	leal	0(%rbp,%rdx), %ebx
	xorps	%xmm0, %xmm0
	xorl	%esi, %esi
.L19:
	testl	%edi, %edi
	js	.L18
	cmpl	%edi, %r8d
	jle	.L18
	movslq	%ebx, %r15
	movsd	(%r10,%r15,8), %xmm1
	mulsd	512(%r11,%rsi), %xmm1
	addsd	%xmm1, %xmm0
.L18:
	subq	$8, %rsi
	incl	%edi
	addl	%eax, %ebx
	cmpq	$-520, %rsi
	jne	.L19
	movsd	%xmm0, (%r14,%rdx,8)
	incq	%rdx
	jmp	.L22
.L28:
	movl	%ebp, %edx
	incl	%ecx
	subl	%r13d, %edx
	jmp	.L17
.L16:
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	_Z20convolutionColumnCPUPdS_S_ii, .-_Z20convolutionColumnCPUPdS_S_ii
	.globl	_Z41__device_stub__Z17convolutionRowGPUPdS_iiPdS_ii
	.type	_Z41__device_stub__Z17convolutionRowGPUPdS_iiPdS_ii, @function
_Z41__device_stub__Z17convolutionRowGPUPdS_iiPdS_ii:
.LFB2054:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L29
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z17convolutionRowGPUPdS_ii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L29:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L31
	call	__stack_chk_fail@PLT
.L31:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2054:
	.size	_Z41__device_stub__Z17convolutionRowGPUPdS_iiPdS_ii, .-_Z41__device_stub__Z17convolutionRowGPUPdS_iiPdS_ii
	.globl	_Z17convolutionRowGPUPdS_ii
	.type	_Z17convolutionRowGPUPdS_ii, @function
_Z17convolutionRowGPUPdS_ii:
.LFB2055:
	.cfi_startproc
	endbr64
	jmp	_Z41__device_stub__Z17convolutionRowGPUPdS_iiPdS_ii
	.cfi_endproc
.LFE2055:
	.size	_Z17convolutionRowGPUPdS_ii, .-_Z17convolutionRowGPUPdS_ii
	.globl	_Z44__device_stub__Z20convolutionColumnGPUPdS_iiPdS_ii
	.type	_Z44__device_stub__Z20convolutionColumnGPUPdS_iiPdS_ii, @function
_Z44__device_stub__Z20convolutionColumnGPUPdS_iiPdS_ii:
.LFB2056:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L34
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z20convolutionColumnGPUPdS_ii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L34:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L36
	call	__stack_chk_fail@PLT
.L36:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2056:
	.size	_Z44__device_stub__Z20convolutionColumnGPUPdS_iiPdS_ii, .-_Z44__device_stub__Z20convolutionColumnGPUPdS_iiPdS_ii
	.globl	_Z20convolutionColumnGPUPdS_ii
	.type	_Z20convolutionColumnGPUPdS_ii, @function
_Z20convolutionColumnGPUPdS_ii:
.LFB2057:
	.cfi_startproc
	endbr64
	jmp	_Z44__device_stub__Z20convolutionColumnGPUPdS_iiPdS_ii
	.cfi_endproc
.LFE2057:
	.size	_Z20convolutionColumnGPUPdS_ii, .-_Z20convolutionColumnGPUPdS_ii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"Enter image size. Should be a power of two and greater than %d : "
.LC2:
	.string	"%d"
.LC3:
	.string	"Image Width x Height = %i x %i\n\n"
.LC4:
	.string	"Allocating and initializing host arrays and device array...\n"
.LC5:
	.string	"Something went wrong wille malloc in CPU\n"
.LC6:
	.string	"Memmory allocation for host arrays: COMPLETED \n"
.LC7:
	.string	"/home/ubuntu/Datasets/stackv2/train-structured/kostastsiv/HPC/main/HPC-Labs-master/Lab4/Convolution2D_OPT.cu"
.LC8:
	.string	"ERROR IN CUDA %s:%d: '%s'\n"
.LC9:
	.string	"Memmory allocation for device arrays: COMPLETED \n"
.LC12:
	.string	"initialization of host arrays: COMPLETED \n"
.LC14:
	.string	"memcpy host2device execution time: %g s\n"
.LC15:
	.string	"initialization of device arrays: COMPLETED \n\n"
.LC16:
	.string	"GPU computation...\n"
.LC17:
	.string	"row kernel execution time: %g s\n"
.LC18:
	.string	"col kernel execution time: %g s\n"
.LC19:
	.string	"GPU computation : COMPLETED\n\n"
.LC20:
	.string	"memcpy device2host execution time: %g s\n"
.LC21:
	.string	"CPU computation...\n"
.LC22:
	.string	"CPU computation : COMPLETED in time:%10.5f\n"
.LC23:
	.string	"\nCPU computations == GPU computation?\n"
.LC25:
	.string	"CPU computations == GPU computation : FALSE line:%d difrence:%f \nExitting program...\n GPU: %lf \n"
.LC26:
	.string	"CPU computations == GPU computation : TRUE \nExitting program after Memmory Free...\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	$65, %edx
	movl	$2, %edi
	leaq	.LC1(%rip), %rsi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	20(%rsp), %rsi
	leaq	.LC2(%rip), %rdi
	xorl	%eax, %eax
	call	__isoc23_scanf@PLT
	movl	20(%rsp), %ebx
	movabsq	$137438953504, %rax
	movl	$32, %ecx
	movq	%rax, 48(%rsp)
	movl	%ebx, %eax
	movl	$1, 56(%rsp)
	cltd
	movl	$1, 68(%rsp)
	idivl	%ecx
	movl	%eax, 60(%rsp)
	movl	%eax, 64(%rsp)
	cmpl	$31, %ebx
	jg	.L40
	movabsq	$4294967297, %rax
	movl	%ebx, 48(%rsp)
	movl	%ebx, 52(%rsp)
	movq	%rax, 60(%rsp)
.L40:
	movl	%ebx, %ecx
	movl	%ebx, %edx
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC4(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$520, %edi
	call	malloc@PLT
	movl	20(%rsp), %r13d
	movq	%rax, %rbp
	imull	%ebx, %r13d
	movslq	%r13d, %r13
	salq	$3, %r13
	movq	%r13, %rdi
	call	malloc@PLT
	movq	%r13, %rdi
	movq	%rax, %r12
	call	malloc@PLT
	movq	%r13, %rdi
	movq	%rax, (%rsp)
	call	malloc@PLT
	movq	%r13, %rdi
	movq	%rax, %r14
	call	malloc@PLT
	movq	%rax, %r15
	testq	%rbp, %rbp
	je	.L41
	testq	%r12, %r12
	je	.L41
	cmpq	$0, (%rsp)
	je	.L41
	testq	%r14, %r14
	jne	.L42
.L41:
	leaq	.LC5(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L42:
	leaq	.LC6(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	20(%rsp), %esi
	leaq	24(%rsp), %rdi
	movl	$1, %edx
	imull	%ebx, %esi
	movslq	%esi, %rsi
	salq	$3, %rsi
	call	cudaMallocManaged@PLT
	movl	20(%rsp), %esi
	leaq	32(%rsp), %rdi
	movl	$1, %edx
	imull	%ebx, %esi
	movslq	%esi, %rsi
	salq	$3, %rsi
	call	cudaMallocManaged@PLT
	movl	20(%rsp), %esi
	leaq	40(%rsp), %rdi
	movl	$1, %edx
	imull	%ebx, %esi
	movslq	%esi, %rsi
	salq	$3, %rsi
	call	cudaMallocManaged@PLT
	call	cudaGetLastError@PLT
	movl	%eax, %r13d
	testl	%eax, %eax
	je	.L44
	movl	%eax, %edi
	call	cudaGetErrorString@PLT
	movl	$292, %ecx
	movq	%rax, %r8
	jmp	.L69
.L44:
	leaq	.LC9(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$200, %edi
	call	srand@PLT
	xorl	%ecx, %ecx
.L45:
	movq	%rcx, 8(%rsp)
	call	rand@PLT
	movl	$16, %ecx
	cltd
	idivl	%ecx
	movq	8(%rsp), %rcx
	cvtsi2sdl	%edx, %xmm0
	movsd	%xmm0, 0(%rbp,%rcx,8)
	incq	%rcx
	cmpq	$65, %rcx
	jne	.L45
.L46:
	movl	20(%rsp), %eax
	imull	%ebx, %eax
	cmpl	%eax, %r13d
	jnb	.L70
	call	rand@PLT
	cvtsi2sdl	%eax, %xmm0
	divsd	.LC10(%rip), %xmm0
	movsd	%xmm0, 8(%rsp)
	call	rand@PLT
	movl	%eax, %edx
	movl	%r13d, %eax
	incl	%r13d
	cvtsi2sdl	%edx, %xmm0
	divsd	.LC11(%rip), %xmm0
	addsd	8(%rsp), %xmm0
	movsd	%xmm0, (%r12,%rax,8)
	jmp	.L46
.L70:
	leaq	.LC12(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	call	clock@PLT
	movl	$1, %r8d
	xorl	%ecx, %ecx
	movq	%rbp, %rsi
	movl	$520, %edx
	leaq	_ZL8d_Filter(%rip), %rdi
	movq	%rax, %r13
	call	cudaMemcpyToSymbol@PLT
	movl	20(%rsp), %edx
	movq	24(%rsp), %rdi
	movq	%r12, %rsi
	movl	$1, %ecx
	imull	%ebx, %edx
	movslq	%edx, %rdx
	salq	$3, %rdx
	call	cudaMemcpy@PLT
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L48
	call	cudaGetErrorString@PLT
	movl	$319, %ecx
	movq	%rax, %r8
.L69:
	movl	$2, %edi
	leaq	.LC7(%rip), %rdx
	leaq	.LC8(%rip), %rsi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	call	cudaDeviceReset@PLT
	movl	$1, %edi
	call	exit@PLT
.L48:
	call	clock@PLT
	leaq	.LC14(%rip), %rsi
	movl	$2, %edi
	subq	%r13, %rax
	cvtsi2sdq	%rax, %xmm0
	movb	$1, %al
	divsd	.LC13(%rip), %xmm0
	call	__printf_chk@PLT
	leaq	.LC15(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC16(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	call	clock@PLT
	movl	56(%rsp), %ecx
	movl	68(%rsp), %esi
	xorl	%r9d, %r9d
	movq	48(%rsp), %rdx
	movq	60(%rsp), %rdi
	xorl	%r8d, %r8d
	movq	%rax, %r13
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L49
	movl	20(%rsp), %edx
	movq	24(%rsp), %rsi
	movl	%ebx, %ecx
	movq	32(%rsp), %rdi
	call	_Z41__device_stub__Z17convolutionRowGPUPdS_iiPdS_ii
.L49:
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L50
	call	cudaGetErrorString@PLT
	movl	$329, %ecx
	movq	%rax, %r8
	jmp	.L69
.L50:
	call	cudaDeviceSynchronize@PLT
	call	clock@PLT
	leaq	.LC17(%rip), %rsi
	movl	$2, %edi
	subq	%r13, %rax
	cvtsi2sdq	%rax, %xmm0
	movb	$1, %al
	divsd	.LC13(%rip), %xmm0
	call	__printf_chk@PLT
	call	clock@PLT
	movl	56(%rsp), %ecx
	movl	68(%rsp), %esi
	xorl	%r9d, %r9d
	movq	48(%rsp), %rdx
	movq	60(%rsp), %rdi
	xorl	%r8d, %r8d
	movq	%rax, %r13
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L51
	movl	20(%rsp), %edx
	movq	32(%rsp), %rsi
	movl	%ebx, %ecx
	movq	40(%rsp), %rdi
	call	_Z44__device_stub__Z20convolutionColumnGPUPdS_iiPdS_ii
.L51:
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L52
	call	cudaGetErrorString@PLT
	movl	$340, %ecx
	movq	%rax, %r8
	jmp	.L69
.L52:
	call	cudaDeviceSynchronize@PLT
	call	clock@PLT
	leaq	.LC18(%rip), %rsi
	movl	$2, %edi
	subq	%r13, %rax
	cvtsi2sdq	%rax, %xmm0
	movb	$1, %al
	divsd	.LC13(%rip), %xmm0
	call	__printf_chk@PLT
	leaq	.LC19(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	call	clock@PLT
	movl	20(%rsp), %edx
	movq	40(%rsp), %rsi
	movq	%r15, %rdi
	movl	$2, %ecx
	movq	%rax, %r13
	imull	%ebx, %edx
	movslq	%edx, %rdx
	salq	$3, %rdx
	call	cudaMemcpy@PLT
	call	clock@PLT
	leaq	.LC20(%rip), %rsi
	movl	$2, %edi
	subq	%r13, %rax
	cvtsi2sdq	%rax, %xmm0
	movb	$1, %al
	divsd	.LC13(%rip), %xmm0
	call	__printf_chk@PLT
	leaq	.LC21(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	call	clock@PLT
	movl	20(%rsp), %ecx
	movq	(%rsp), %rdi
	movl	%ebx, %r8d
	movq	%rbp, %rdx
	movq	%r12, %rsi
	movq	%rax, %r13
	movl	%ecx, 8(%rsp)
	call	_Z17convolutionRowCPUPdS_S_ii
	movl	8(%rsp), %ecx
	movq	(%rsp), %rsi
	movq	%rbp, %rdx
	movq	%r14, %rdi
	call	_Z20convolutionColumnCPUPdS_S_ii
	call	clock@PLT
	leaq	.LC22(%rip), %rsi
	movl	$2, %edi
	subq	%r13, %rax
	cvtsi2sdq	%rax, %xmm0
	movb	$1, %al
	divsd	.LC13(%rip), %xmm0
	call	__printf_chk@PLT
	leaq	.LC23(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	imull	20(%rsp), %ebx
	movsd	.LC24(%rip), %xmm2
	xorl	%eax, %eax
.L53:
	movl	%eax, %edx
	cmpl	%ebx, %eax
	jnb	.L71
	movsd	(%r14,%rax,8), %xmm0
	movsd	(%r15,%rax,8), %xmm1
	movaps	%xmm0, %xmm3
	addsd	%xmm2, %xmm3
	comisd	%xmm3, %xmm1
	jbe	.L66
.L58:
	movaps	%xmm1, %xmm2
	leaq	.LC25(%rip), %rsi
	movl	$2, %edi
	movb	$2, %al
	subsd	%xmm0, %xmm2
	movaps	%xmm2, %xmm0
	call	__printf_chk@PLT
	movq	%r14, %rdi
	call	free@PLT
	movq	%r15, %rdi
	call	free@PLT
	movq	(%rsp), %rdi
	call	free@PLT
	movq	%r12, %rdi
	call	free@PLT
	movq	%rbp, %rdi
	call	free@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L67
	call	cudaGetErrorString@PLT
	movl	$389, %ecx
	movq	%rax, %r8
	jmp	.L69
.L66:
	movaps	%xmm0, %xmm3
	incq	%rax
	subsd	%xmm2, %xmm3
	comisd	%xmm1, %xmm3
	jbe	.L53
	jmp	.L58
.L67:
	call	cudaDeviceReset@PLT
	movl	$1, %eax
	jmp	.L39
.L71:
	leaq	.LC26(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	%r14, %rdi
	call	free@PLT
	movq	%r15, %rdi
	call	free@PLT
	movq	(%rsp), %rdi
	call	free@PLT
	movq	%r12, %rdi
	call	free@PLT
	movq	%rbp, %rdi
	call	free@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	call	cudaDeviceReset@PLT
	xorl	%eax, %eax
.L39:
	movq	72(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L61
	call	__stack_chk_fail@PLT
.L61:
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2029:
	.size	main, .-main
	.section	.rodata.str1.1
.LC27:
	.string	"_Z20convolutionColumnGPUPdS_ii"
.LC28:
	.string	"_Z17convolutionRowGPUPdS_ii"
.LC29:
	.string	"d_Filter"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2059:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC27(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z20convolutionColumnGPUPdS_ii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC28(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z17convolutionRowGPUPdS_ii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC29(%rip), %rdx
	movl	$520, %r9d
	leaq	_ZL8d_Filter(%rip), %rsi
	pushq	$1
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	call	__cudaRegisterVar@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2059:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.local	_ZL8d_Filter
	.comm	_ZL8d_Filter,520,32
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC10:
	.long	267382768
	.long	1096814608
	.align 8
.LC11:
	.long	-4194304
	.long	1105199103
	.align 8
.LC13:
	.long	0
	.long	1093567616
	.align 8
.LC24:
	.long	-350469331
	.long	1057634018
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

/*
* This sample implements a separable convolution 
* of a 2D image with an arbitrary filter.
*/


#include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <time.h>

#define MAX_XY 32
#define ABS(val)  	((val)<0.0 ? (-(val)) : (val))
#define accuracy  	0.00005 
#define TILE_H 32
#define TILE_W 32
#define FILTER_RADIUS 32
#define FILTER_LENGTH 	(2 * FILTER_RADIUS  + 1)


__device__ __constant__ double d_Filter[FILTER_LENGTH];

#define cudaCheckError() {                                                                       \
        hipError_t error=hipGetLastError();                                                        \
        if(error!=hipSuccess) {                                                                     \
            printf("ERROR IN CUDA %s:%d: '%s'\n",__FILE__,__LINE__,hipGetErrorString(error));        \
            hipDeviceReset(); \
            exit(EXIT_FAILURE);                                                                  \
        }                                                                                        \
    }


__global__ void convolutionRowGPU(double *d_Dst, double *d_Src,int imageW, int imageH) {
    
    int x,y,k,d,P_x,x0,number_of_writes = 1;
   
    __shared__ double image[TILE_H * (TILE_W+FILTER_RADIUS*2)];  
    
    x =  blockIdx.x*blockDim.x + threadIdx.x;
    y =  blockIdx.y*blockDim.y + threadIdx.y;
   
    if(FILTER_RADIUS > TILE_W){
        number_of_writes = FILTER_RADIUS/TILE_W + 1;
    }
    
    P_x = x - FILTER_RADIUS;
    

    
    if(P_x < 0) {
        image[threadIdx.x + threadIdx.y*(TILE_W+FILTER_RADIUS*2)] = 0;
        image[threadIdx.x + blockDim.x + threadIdx.y*(TILE_W+FILTER_RADIUS*2)] = d_Src[y*imageW + x + blockDim.x - FILTER_RADIUS];
        image[threadIdx.x + blockDim.x + FILTER_RADIUS + threadIdx.y*(TILE_W+FILTER_RADIUS*2)] = d_Src[y*imageW + x + blockDim.x];
    }
    else{
        if(threadIdx.x < FILTER_RADIUS) {
            image[threadIdx.x + threadIdx.y*(TILE_W+FILTER_RADIUS*2)] = d_Src[y*imageW + x - FILTER_RADIUS];
            image[threadIdx.x + blockDim.x + threadIdx.y*(TILE_W+FILTER_RADIUS*2)] = d_Src[y*imageW + x + blockDim.x - FILTER_RADIUS];
            image[threadIdx.x + blockDim.x + FILTER_RADIUS + threadIdx.y*(TILE_W+FILTER_RADIUS*2)] = d_Src[y*imageW + x + blockDim.x];
        }
        else{
            image[threadIdx.x + threadIdx.y*(TILE_W+FILTER_RADIUS*2)] = d_Src[y*imageW + x - FILTER_RADIUS];
        }
            
    }

    P_x = x + FILTER_RADIUS;
    
    if(P_x > imageW - 1) {
        image[threadIdx.x + 2*FILTER_RADIUS +  threadIdx.y*(TILE_W+FILTER_RADIUS*2)] = 0;
        
        image[threadIdx.x + FILTER_RADIUS +  threadIdx.y*(TILE_W+FILTER_RADIUS*2)] = d_Src[y*imageW + x];
    }
    
    __syncthreads();
    
    double sum = 0;
    
    x0 = threadIdx.x + FILTER_RADIUS ;
    for(k = -FILTER_RADIUS; k <= FILTER_RADIUS; k++) {
        d = x0 + k;
        
        sum += image[threadIdx.y*(TILE_W+FILTER_RADIUS*2) + d] * d_Filter[FILTER_RADIUS - k];
        
	}
    d_Dst[y*imageW + x] = sum;
}


__global__ void convolutionColumnGPU(double *d_Dst, double *d_Src,int imageW, int imageH) {
    
      
    int x,y,k,d,P_y,y0;
   
    __shared__ double image[TILE_W * (TILE_H+FILTER_RADIUS*2)];  
    
    x =  blockIdx.x*blockDim.x + threadIdx.x;
    y =  blockIdx.y*blockDim.y + threadIdx.y;
    
    
    P_y = y - FILTER_RADIUS;
    
    if(P_y < 0) {
        image[threadIdx.y*(TILE_W) + threadIdx.x] = 0;
        image[(threadIdx.y + blockDim.y)*TILE_W + threadIdx.x] = d_Src[(y + blockDim.y - FILTER_RADIUS)*imageW + x ];
        image[(threadIdx.y + blockDim.y + FILTER_RADIUS)*TILE_W + threadIdx.x] = d_Src[(y + blockDim.y)*imageW + x ];
    }
    else{
        if(threadIdx.y < FILTER_RADIUS){
            
            if(y + blockDim.y > imageH - 1) {
                image[threadIdx.y*(TILE_W) + threadIdx.x] = d_Src[(y- FILTER_RADIUS)*imageW + x];
            }
            else {
                image[threadIdx.y*TILE_W + threadIdx.x] = d_Src[(y- FILTER_RADIUS)*imageW + x];
                image[(threadIdx.y + blockDim.y)*TILE_W + threadIdx.x] = d_Src[(y + blockDim.y - FILTER_RADIUS)*imageW + x ];
                image[(threadIdx.y + blockDim.y + FILTER_RADIUS)*TILE_W + threadIdx.x] = d_Src[(y + blockDim.y)*imageW + x ];
            }
                
        }
        else{
            image[threadIdx.y*(TILE_W) + threadIdx.x] = d_Src[(y- FILTER_RADIUS)*imageW + x];
        }
    }

    P_y = y + FILTER_RADIUS;
    
    if(P_y > imageH - 1) {
        
        image[(threadIdx.y+2*FILTER_RADIUS)*TILE_W + threadIdx.x] = 0;
        
        image[(threadIdx.y + FILTER_RADIUS)*TILE_W + threadIdx.x] = d_Src[y*imageW + x];
    }
        
    __syncthreads();
    
    
    double sum = 0;
    
    y0 = threadIdx.y + FILTER_RADIUS ;
    for(k = -FILTER_RADIUS; k <= FILTER_RADIUS; k++) {
        d = y0 + k;
        
        sum += image[d*TILE_W + threadIdx.x] * d_Filter[FILTER_RADIUS - k];
        
    }
    d_Dst[y*imageW + x] = sum;
    
}


 

////////////////////////////////////////////////////////////////////////////////
// Reference row convolution filter
////////////////////////////////////////////////////////////////////////////////


void convolutionRowCPU(double *h_Dst, double *h_Src, double *h_Filter, 
                       int imageW, int imageH) {

  int x, y, k;
                      
  for (y = 0; y < imageH; y++) {
    for (x = 0; x < imageW; x++) {
      double sum = 0;

      for (k = -FILTER_RADIUS; k <= FILTER_RADIUS; k++) {
        int d = x + k;

        if (d >= 0 && d < imageW) {
          sum += h_Src[y * imageW + d] * h_Filter[FILTER_RADIUS - k];
        }     
      }
      //printf("ROW X:%d Y:%d SUM:%f\n\n",x,y,sum);
      h_Dst[y * imageW + x] = sum;
    }
  }
        
}



////////////////////////////////////////////////////////////////////////////////
// Reference column convolution filter
////////////////////////////////////////////////////////////////////////////////
void convolutionColumnCPU(double *h_Dst, double *h_Src, double *h_Filter,
    			   int imageW, int imageH) {

  int x, y, k;
  
  for (y = 0; y < imageH; y++) {
    for (x = 0; x < imageW; x++) {
      double sum = 0;

      for (k = -FILTER_RADIUS; k <= FILTER_RADIUS; k++) {
        int d = y + k;

        if (d >= 0 && d < imageH) {
          sum += h_Src[d * imageW + x] * h_Filter[FILTER_RADIUS - k];
        }   
      }
      //printf("COL X:%d Y:%d SUM:%f\n\n",x,y,sum);
      h_Dst[y * imageW + x] = sum;
    }
  }
    
}


//


////////////////////////////////////////////////////////////////////////////////
// Main program
////////////////////////////////////////////////////////////////////////////////
int main(int argc, char **argv) {
    
    double
    *h_Filter,
    *h_Input,
    *h_Buffer,
    *h_OutputCPU,
    *d_Input,
    *d_Buffer,
    *d_OutputGPU,
    *h_OutputGPU;


    int imageW;
    int imageH;
    //int i=MAX_XY;
    //int count=0;
    unsigned int i;
    
    double timing;
    clock_t start;
    clock_t end;
    

    
    
// Ta imageW, imageH ta dinei o xrhsths kai thewroume oti einai isa,
    // dhladh imageW = imageH = N, opou to N to dinei o xrhsths.
    // Gia aplothta thewroume tetragwnikes eikones.  

    printf("Enter image size. Should be a power of two and greater than %d : ", FILTER_LENGTH);
    scanf("%d", &imageW);
    imageH = imageW;
    
 //   while(1){
 //       if(imageW % i == 0) {
 //           dim3 threads(i,i);
 //           dim3 blocks(imageW/i,imageW/i);
 //           break;
 //       }
 //       i--;
 //   }
    
    dim3 threads(MAX_XY,MAX_XY);
    dim3 blocks (imageH/MAX_XY,imageW/MAX_XY); /* this is wrong, fix later */
    
    if(imageH < MAX_XY && imageW < MAX_XY){
        threads.x = imageH;
	threads.y = imageH;
	blocks.x = 1;
	blocks.y = 1;
    }
    
    printf("Image Width x Height = %i x %i\n\n", imageW, imageH);
    printf("Allocating and initializing host arrays and device array...\n");
    
    
        
    
    // Tha htan kalh idea na elegxete kai to apotelesma twn malloc...
    h_Filter    = (double *)malloc(FILTER_LENGTH * sizeof(double));
    h_Input     = (double *)malloc(imageW * imageH * sizeof(double));
    h_Buffer    = (double *)malloc(imageW * imageH * sizeof(double));
    h_OutputCPU = (double *)malloc(imageW * imageH * sizeof(double));
    h_OutputGPU = (double *)malloc(imageW * imageH * sizeof(double));
    
    if (h_Filter==NULL || h_Input == NULL || h_Buffer == NULL || h_OutputCPU == NULL){
        printf("Something went wrong wille malloc in CPU\n");
    }
    
    printf("Memmory allocation for host arrays: COMPLETED \n");
    
    
    hipMallocManaged((void**)&d_Input,imageH * imageW * sizeof(double));
    hipMallocManaged((void**)&d_Buffer,imageH * imageW * sizeof(double));
    hipMallocManaged((void**)&d_OutputGPU,imageH * imageW * sizeof(double));
    
    cudaCheckError();
    
    printf("Memmory allocation for device arrays: COMPLETED \n");
    
    
    
    // to 'h_Filter' apotelei to filtro me to opoio ginetai to convolution kai
    // arxikopoieitai tuxaia. To 'h_Input' einai h eikona panw sthn opoia ginetai
    // to convolution kai arxikopoieitai kai auth tuxaia.
    
    srand(200);

    for (i = 0; i < FILTER_LENGTH; i++) {
        h_Filter[i] = (double)(rand() % 16);
    }

    for (i = 0; i < imageW * imageH; i++) {
        h_Input[i] = (double)rand() / ((double)RAND_MAX / 255) + (double)rand() / (double)RAND_MAX;
    }
    
    printf("initialization of host arrays: COMPLETED \n");

    /* START OF HOST2DEVICE TRANSFER */    
    start=clock();
    hipMemcpyToSymbol(HIP_SYMBOL(d_Filter),h_Filter,FILTER_LENGTH * sizeof(double),0,hipMemcpyHostToDevice);
    hipMemcpy(d_Input, h_Input,imageH * imageW * sizeof(double),hipMemcpyHostToDevice);
    
    cudaCheckError();
    end=clock();
    printf("memcpy host2device execution time: %g s\n", (double(end-start))/CLOCKS_PER_SEC);
    printf("initialization of device arrays: COMPLETED \n\n");
    
    printf("GPU computation...\n");
    
    /* START OF ROW KERNEL */
    start=clock();
    convolutionRowGPU<<<blocks,threads>>>(d_Buffer,d_Input,imageW,imageH);
    cudaCheckError();
    
    hipDeviceSynchronize();
    end=clock();
    printf("row kernel execution time: %g s\n", (double(end-start))/CLOCKS_PER_SEC);
    /* END OF ROW KERNEL */

    /* START OF COL KERNEL */
    start=clock();
    convolutionColumnGPU<<<blocks,threads>>>(d_OutputGPU,d_Buffer,imageW,imageH);
    
    cudaCheckError();
    hipDeviceSynchronize();
    end=clock();
    printf("col kernel execution time: %g s\n", (double(end-start))/CLOCKS_PER_SEC);
    /* END OF COL KERNEL */
    printf("GPU computation : COMPLETED\n\n");
    
    /* START OF DEVICE2HOST TRANSFER */
    start=clock();
    hipMemcpy(h_OutputGPU,d_OutputGPU,imageH * imageW * sizeof(double),hipMemcpyDeviceToHost);
    end=clock();
    printf("memcpy device2host execution time: %g s\n", (double(end-start))/CLOCKS_PER_SEC);
    /* END OF DEVICE2HOST TRANSFER */   
    // To parakatw einai to kommati pou ekteleitai sthn CPU kai me vash auto prepei na ginei h sugrish me thn GPU.
    printf("CPU computation...\n");
    
    start = clock();
    
    convolutionRowCPU(h_Buffer, h_Input, h_Filter, imageW, imageH); // convolution kata grammes
    convolutionColumnCPU(h_OutputCPU, h_Buffer, h_Filter, imageW, imageH); // convolution kata sthles
    
    end = clock();
    
    timing = ((double) (end - start)) / CLOCKS_PER_SEC;
    
    printf("CPU computation : COMPLETED in time:%10.5f\n",timing);

    // Kanete h sugrish anamesa se GPU kai CPU kai an estw kai kapoio apotelesma xeperna thn akriveia
    // pou exoume orisei, tote exoume sfalma kai mporoume endexomenws na termatisoume to programma mas 
    
    
    printf("\nCPU computations == GPU computation?\n");
    for (i = 0; i < imageW * imageH; i++) {
        if(h_OutputGPU[i] > h_OutputCPU[i] + accuracy || h_OutputGPU[i] < h_OutputCPU[i] - accuracy){
            printf("CPU computations == GPU computation : FALSE line:%d difrence:%f \nExitting program...\n GPU: %lf \n",i,h_OutputGPU[i]-h_OutputCPU[i],h_OutputGPU[i]);
           
            
            free(h_OutputCPU);
            free(h_OutputGPU);
            free(h_Buffer);
            free(h_Input);
            free(h_Filter);
            
            
            // free all the allocated memory GPU
            hipFree(d_OutputGPU);
            hipFree(d_Buffer);
            hipFree(d_Input);
            
            cudaCheckError();
            
            hipDeviceReset();
            
           return(1);
        }
            
    }
    printf("CPU computations == GPU computation : TRUE \nExitting program after Memmory Free...\n");



    // free all the allocated memory CPU
    free(h_OutputCPU);
    free(h_OutputGPU);
    free(h_Buffer);
    free(h_Input);
    free(h_Filter);
    
    // free all the allocated memory GPU
    hipFree(d_OutputGPU);
    hipFree(d_Buffer);
    hipFree(d_Input);
      
    hipDeviceReset();


    return 0;
}

	.text
	.file	"Convolution2D_OPT.hip"
	.globl	_Z32__device_stub__convolutionRowGPUPdS_ii # -- Begin function _Z32__device_stub__convolutionRowGPUPdS_ii
	.type	_Z32__device_stub__convolutionRowGPUPdS_ii,@function
_Z32__device_stub__convolutionRowGPUPdS_ii: # @_Z32__device_stub__convolutionRowGPUPdS_ii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z17convolutionRowGPUPdS_ii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z32__device_stub__convolutionRowGPUPdS_ii, .Lfunc_end0-_Z32__device_stub__convolutionRowGPUPdS_ii
	.cfi_endproc
                                        # -- End function
	.globl	_Z35__device_stub__convolutionColumnGPUPdS_ii # -- Begin function _Z35__device_stub__convolutionColumnGPUPdS_ii
	.type	_Z35__device_stub__convolutionColumnGPUPdS_ii,@function
_Z35__device_stub__convolutionColumnGPUPdS_ii: # @_Z35__device_stub__convolutionColumnGPUPdS_ii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z20convolutionColumnGPUPdS_ii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z35__device_stub__convolutionColumnGPUPdS_ii, .Lfunc_end1-_Z35__device_stub__convolutionColumnGPUPdS_ii
	.cfi_endproc
                                        # -- End function
	.globl	_Z17convolutionRowCPUPdS_S_ii   # -- Begin function _Z17convolutionRowCPUPdS_S_ii
	.type	_Z17convolutionRowCPUPdS_S_ii,@function
_Z17convolutionRowCPUPdS_S_ii:          # @_Z17convolutionRowCPUPdS_S_ii
	.cfi_startproc
# %bb.0:
	testl	%r8d, %r8d
	jle	.LBB2_11
# %bb.1:                                # %.preheader29.lr.ph
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movslq	%ecx, %rax
	movl	%r8d, %r8d
	movl	%eax, %r9d
	addq	$512, %rdx                      # imm = 0x200
	leaq	(,%rax,8), %r10
	xorl	%r11d, %r11d
.LBB2_2:                                # %.preheader29
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_4 Depth 2
                                        #       Child Loop BB2_5 Depth 3
	testl	%ecx, %ecx
	jle	.LBB2_9
# %bb.3:                                # %.preheader.lr.ph
                                        #   in Loop: Header=BB2_2 Depth=1
	movq	%r11, %rbx
	imulq	%rax, %rbx
	leaq	(%rdi,%rbx,8), %rbx
	movq	%rsi, %r14
	xorl	%r15d, %r15d
.LBB2_4:                                # %.preheader
                                        #   Parent Loop BB2_2 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB2_5 Depth 3
	xorpd	%xmm0, %xmm0
	movq	$-32, %r12
	movq	%rdx, %r13
.LBB2_5:                                #   Parent Loop BB2_2 Depth=1
                                        #     Parent Loop BB2_4 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	leal	(%r15,%r12), %ebp
	cmpl	%ecx, %ebp
	jae	.LBB2_7
# %bb.6:                                #   in Loop: Header=BB2_5 Depth=3
	movsd	(%r14,%r12,8), %xmm1            # xmm1 = mem[0],zero
	mulsd	(%r13), %xmm1
	addsd	%xmm1, %xmm0
.LBB2_7:                                #   in Loop: Header=BB2_5 Depth=3
	incq	%r12
	addq	$-8, %r13
	cmpq	$33, %r12
	jne	.LBB2_5
# %bb.8:                                #   in Loop: Header=BB2_4 Depth=2
	movsd	%xmm0, (%rbx,%r15,8)
	incq	%r15
	addq	$8, %r14
	cmpq	%r9, %r15
	jne	.LBB2_4
.LBB2_9:                                # %._crit_edge
                                        #   in Loop: Header=BB2_2 Depth=1
	incq	%r11
	addq	%r10, %rsi
	cmpq	%r8, %r11
	jne	.LBB2_2
# %bb.10:
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r12
	.cfi_restore %r13
	.cfi_restore %r14
	.cfi_restore %r15
	.cfi_restore %rbp
.LBB2_11:                               # %._crit_edge34
	retq
.Lfunc_end2:
	.size	_Z17convolutionRowCPUPdS_S_ii, .Lfunc_end2-_Z17convolutionRowCPUPdS_S_ii
	.cfi_endproc
                                        # -- End function
	.globl	_Z20convolutionColumnCPUPdS_S_ii # -- Begin function _Z20convolutionColumnCPUPdS_S_ii
	.type	_Z20convolutionColumnCPUPdS_S_ii,@function
_Z20convolutionColumnCPUPdS_S_ii:       # @_Z20convolutionColumnCPUPdS_S_ii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdi, -8(%rsp)                  # 8-byte Spill
	testl	%r8d, %r8d
	jle	.LBB3_10
# %bb.1:                                # %.preheader30.lr.ph
	movq	%rsi, %rax
	movslq	%ecx, %rdi
	movl	%r8d, %r9d
	movl	%edi, %r10d
	movq	%rdi, %rsi
	shlq	$8, %rsi
	subq	%rsi, %rax
	movq	%rdi, -16(%rsp)                 # 8-byte Spill
	leaq	(,%rdi,8), %r11
	movl	$-32, %edi
	xorl	%r14d, %r14d
.LBB3_2:                                # %.preheader30
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_4 Depth 2
                                        #       Child Loop BB3_5 Depth 3
	testl	%ecx, %ecx
	jle	.LBB3_9
# %bb.3:                                # %.preheader.lr.ph
                                        #   in Loop: Header=BB3_2 Depth=1
	movq	%r14, %rsi
	imulq	-16(%rsp), %rsi                 # 8-byte Folded Reload
	movq	-8(%rsp), %rbx                  # 8-byte Reload
	leaq	(%rbx,%rsi,8), %r15
	movq	%rax, %rsi
	xorl	%r13d, %r13d
.LBB3_4:                                # %.preheader
                                        #   Parent Loop BB3_2 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB3_5 Depth 3
	xorpd	%xmm0, %xmm0
	movl	$64, %ebp
	movq	%rsi, %r12
	movl	%edi, %ebx
.LBB3_5:                                #   Parent Loop BB3_2 Depth=1
                                        #     Parent Loop BB3_4 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	cmpl	%r8d, %ebx
	jae	.LBB3_7
# %bb.6:                                #   in Loop: Header=BB3_5 Depth=3
	movsd	(%r12), %xmm1                   # xmm1 = mem[0],zero
	mulsd	(%rdx,%rbp,8), %xmm1
	addsd	%xmm1, %xmm0
.LBB3_7:                                #   in Loop: Header=BB3_5 Depth=3
	incl	%ebx
	addq	%r11, %r12
	addq	$-1, %rbp
	jb	.LBB3_5
# %bb.8:                                #   in Loop: Header=BB3_4 Depth=2
	movsd	%xmm0, (%r15,%r13,8)
	incq	%r13
	addq	$8, %rsi
	cmpq	%r10, %r13
	jne	.LBB3_4
.LBB3_9:                                # %._crit_edge
                                        #   in Loop: Header=BB3_2 Depth=1
	incq	%r14
	incl	%edi
	addq	%r11, %rax
	cmpq	%r9, %r14
	jne	.LBB3_2
.LBB3_10:                               # %._crit_edge35
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z20convolutionColumnCPUPdS_S_ii, .Lfunc_end3-_Z20convolutionColumnCPUPdS_S_ii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI4_0:
	.quad	0x416010100fefeff0              # double 8421504.4980392158
.LCPI4_1:
	.quad	0x41dfffffffc00000              # double 2147483647
.LCPI4_2:
	.quad	0x412e848000000000              # double 1.0E+6
.LCPI4_3:
	.quad	0x3f0a36e2eb1c432d              # double 5.0000000000000002E-5
.LCPI4_4:
	.quad	0xbf0a36e2eb1c432d              # double -5.0000000000000002E-5
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$.L.str, %edi
	movl	$65, %esi
	xorl	%eax, %eax
	callq	printf
	leaq	12(%rsp), %r14
	movl	$.L.str.1, %edi
	movq	%r14, %rsi
	xorl	%eax, %eax
	callq	__isoc23_scanf
	movslq	(%r14), %r12
	leal	31(%r12), %eax
	testq	%r12, %r12
	cmovnsl	%r12d, %eax
	sarl	$5, %eax
	movq	%rax, %rcx
	shlq	$32, %rcx
	orq	%rax, %rcx
	movl	%r12d, %eax
	movq	%r12, %rdx
	shlq	$32, %rdx
	orq	%rax, %rdx
	cmpq	$32, %r12
	movabsq	$137438953504, %r13             # imm = 0x2000000020
	cmovlq	%rdx, %r13
	movabsq	$4294967297, %rbp               # imm = 0x100000001
	cmovgeq	%rcx, %rbp
	movl	$.L.str.2, %edi
	movl	%r12d, %esi
	movl	%r12d, %edx
	xorl	%eax, %eax
	callq	printf
	movl	$.Lstr, %edi
	callq	puts@PLT
	movl	$520, %edi                      # imm = 0x208
	callq	malloc
	movq	%rax, %rbx
	movslq	(%r14), %r15
	imulq	%r12, %r15
	shlq	$3, %r15
	movq	%r15, %rdi
	callq	malloc
	movq	%rax, %r14
	movq	%r15, %rdi
	callq	malloc
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movq	%r15, %rdi
	callq	malloc
	movq	%rax, 56(%rsp)                  # 8-byte Spill
	movq	%r15, %rdi
	callq	malloc
	movq	%rax, 64(%rsp)                  # 8-byte Spill
	testq	%rbx, %rbx
	je	.LBB4_4
# %bb.1:
	testq	%r14, %r14
	je	.LBB4_4
# %bb.2:
	cmpq	$0, 16(%rsp)                    # 8-byte Folded Reload
	je	.LBB4_4
# %bb.3:
	cmpq	$0, 56(%rsp)                    # 8-byte Folded Reload
	jne	.LBB4_5
.LBB4_4:
	movl	$.Lstr.1, %edi
	callq	puts@PLT
.LBB4_5:
	movl	$.Lstr.2, %edi
	callq	puts@PLT
	movslq	12(%rsp), %rsi
	imulq	%r12, %rsi
	shlq	$3, %rsi
	leaq	40(%rsp), %rdi
	movl	$1, %edx
	callq	hipMallocManaged
	movslq	12(%rsp), %rsi
	imulq	%r12, %rsi
	shlq	$3, %rsi
	leaq	32(%rsp), %rdi
	movl	$1, %edx
	callq	hipMallocManaged
	movslq	12(%rsp), %rsi
	imulq	%r12, %rsi
	shlq	$3, %rsi
	leaq	24(%rsp), %rdi
	movl	$1, %edx
	callq	hipMallocManaged
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB4_6
# %bb.13:
	movl	$.Lstr.3, %edi
	callq	puts@PLT
	movl	$200, %edi
	callq	srand
	xorl	%r15d, %r15d
.LBB4_14:                               # =>This Inner Loop Header: Depth=1
	callq	rand
                                        # kill: def $eax killed $eax def $rax
	leal	15(%rax), %ecx
	testl	%eax, %eax
	cmovnsl	%eax, %ecx
	andl	$-16, %ecx
	subl	%ecx, %eax
	xorps	%xmm0, %xmm0
	cvtsi2sd	%eax, %xmm0
	movsd	%xmm0, (%rbx,%r15,8)
	incq	%r15
	cmpq	$65, %r15
	jne	.LBB4_14
# %bb.8:                                # %.preheader
	cmpl	$0, 12(%rsp)
	sete	%al
	testl	%r12d, %r12d
	sete	%cl
	orb	%al, %cl
	jne	.LBB4_11
# %bb.9:                                # %.lr.ph.preheader
	xorl	%r15d, %r15d
.LBB4_10:                               # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2sd	%eax, %xmm0
	divsd	.LCPI4_0(%rip), %xmm0
	movsd	%xmm0, 48(%rsp)                 # 8-byte Spill
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2sd	%eax, %xmm0
	divsd	.LCPI4_1(%rip), %xmm0
	addsd	48(%rsp), %xmm0                 # 8-byte Folded Reload
	movsd	%xmm0, (%r14,%r15,8)
	incq	%r15
	movl	12(%rsp), %eax
	imull	%r12d, %eax
	cmpq	%rax, %r15
	jb	.LBB4_10
.LBB4_11:                               # %._crit_edge
	movl	$.Lstr.4, %edi
	callq	puts@PLT
	callq	clock
	movq	%rax, %r15
	movl	$d_Filter, %edi
	movl	$520, %edx                      # imm = 0x208
	movq	%rbx, %rsi
	xorl	%ecx, %ecx
	movl	$1, %r8d
	callq	hipMemcpyToSymbol
	movq	40(%rsp), %rdi
	movslq	12(%rsp), %rdx
	imulq	%r12, %rdx
	shlq	$3, %rdx
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB4_12
# %bb.15:
	callq	clock
	subq	%r15, %rax
	xorps	%xmm0, %xmm0
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI4_2(%rip), %xmm0
	movl	$.L.str.10, %edi
	movb	$1, %al
	callq	printf
	movl	$.Lstr.5, %edi
	callq	puts@PLT
	movl	$.Lstr.6, %edi
	callq	puts@PLT
	callq	clock
	movq	%rax, %r15
	movq	%rbp, %rdi
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB4_17
# %bb.16:
	movq	32(%rsp), %rdi
	movq	40(%rsp), %rsi
	movl	12(%rsp), %edx
	movl	%r12d, %ecx
	callq	_Z32__device_stub__convolutionRowGPUPdS_ii
.LBB4_17:
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB4_18
# %bb.19:
	callq	hipDeviceSynchronize
	callq	clock
	subq	%r15, %rax
	xorps	%xmm0, %xmm0
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI4_2(%rip), %xmm0
	movl	$.L.str.13, %edi
	movb	$1, %al
	callq	printf
	callq	clock
	movq	%rax, %r15
	movq	%rbp, %rdi
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB4_21
# %bb.20:
	movq	24(%rsp), %rdi
	movq	32(%rsp), %rsi
	movl	12(%rsp), %edx
	movl	%r12d, %ecx
	callq	_Z35__device_stub__convolutionColumnGPUPdS_ii
.LBB4_21:
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB4_22
# %bb.23:
	callq	hipDeviceSynchronize
	callq	clock
	subq	%r15, %rax
	xorps	%xmm0, %xmm0
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI4_2(%rip), %xmm0
	movl	$.L.str.14, %edi
	movb	$1, %al
	callq	printf
	movl	$.Lstr.7, %edi
	callq	puts@PLT
	callq	clock
	movq	%rax, %r15
	movq	24(%rsp), %rsi
	movslq	12(%rsp), %rdx
	imulq	%r12, %rdx
	shlq	$3, %rdx
	movq	64(%rsp), %r13                  # 8-byte Reload
	movq	%r13, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	callq	clock
	subq	%r15, %rax
	xorps	%xmm0, %xmm0
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI4_2(%rip), %xmm0
	movl	$.L.str.16, %edi
	movb	$1, %al
	callq	printf
	movl	$.Lstr.8, %edi
	callq	puts@PLT
	callq	clock
	movq	%rax, 48(%rsp)                  # 8-byte Spill
	movq	%r13, %r15
	movl	12(%rsp), %r13d
	movq	16(%rsp), %rbp                  # 8-byte Reload
	movq	%rbp, %rdi
	movq	%r14, %rsi
	movq	%rbx, %rdx
	movl	%r13d, %ecx
	movl	%r12d, %r8d
	callq	_Z17convolutionRowCPUPdS_S_ii
	movq	56(%rsp), %rdi                  # 8-byte Reload
	movq	%rbp, %rsi
	movq	%rdi, %rbp
	movq	%rbx, %rdx
	movl	%r13d, %ecx
	movl	%r12d, %r8d
	callq	_Z20convolutionColumnCPUPdS_S_ii
	callq	clock
	subq	48(%rsp), %rax                  # 8-byte Folded Reload
	xorps	%xmm0, %xmm0
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI4_2(%rip), %xmm0
	movl	$.L.str.18, %edi
	movb	$1, %al
	callq	printf
	movl	$.Lstr.9, %edi
	callq	puts@PLT
	movl	12(%rsp), %eax
	imull	%r12d, %eax
	testl	%eax, %eax
	je	.LBB4_30
# %bb.24:                               # %.lr.ph160.preheader
	movl	%eax, %eax
	xorl	%esi, %esi
	movsd	.LCPI4_3(%rip), %xmm0           # xmm0 = mem[0],zero
	movsd	.LCPI4_4(%rip), %xmm2           # xmm2 = mem[0],zero
.LBB4_25:                               # %.lr.ph160
                                        # =>This Inner Loop Header: Depth=1
	movsd	(%r15,%rsi,8), %xmm1            # xmm1 = mem[0],zero
	movsd	(%rbp,%rsi,8), %xmm3            # xmm3 = mem[0],zero
	movapd	%xmm3, %xmm4
	addsd	%xmm0, %xmm4
	ucomisd	%xmm4, %xmm1
	movapd	%xmm3, %xmm4
	addsd	%xmm2, %xmm4
	ja	.LBB4_27
# %bb.26:                               # %.lr.ph160
                                        #   in Loop: Header=BB4_25 Depth=1
	ucomisd	%xmm1, %xmm4
	ja	.LBB4_27
# %bb.29:                               #   in Loop: Header=BB4_25 Depth=1
	incq	%rsi
	cmpq	%rsi, %rax
	jne	.LBB4_25
.LBB4_30:                               # %._crit_edge161
	movl	$.Lstr.10, %edi
	callq	puts@PLT
	movq	%rbp, %rdi
	callq	free
	movq	%r15, %rdi
	callq	free
	movq	16(%rsp), %rdi                  # 8-byte Reload
	callq	free
	movq	%r14, %rdi
	callq	free
	movq	%rbx, %rdi
	callq	free
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	40(%rsp), %rdi
	callq	hipFree
	xorl	%ebx, %ebx
	jmp	.LBB4_31
.LBB4_27:
	movapd	%xmm1, %xmm0
	subsd	%xmm3, %xmm0
	movl	$.L.str.20, %edi
                                        # kill: def $esi killed $esi killed $rsi
	movb	$2, %al
	callq	printf
	movq	%rbp, %rdi
	callq	free
	movq	%r15, %rdi
	callq	free
	movq	16(%rsp), %rdi                  # 8-byte Reload
	callq	free
	movq	%r14, %rdi
	callq	free
	movq	%rbx, %rdi
	callq	free
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	40(%rsp), %rdi
	callq	hipFree
	callq	hipGetLastError
	movl	$1, %ebx
	testl	%eax, %eax
	jne	.LBB4_28
.LBB4_31:
	callq	hipDeviceReset
	movl	%ebx, %eax
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB4_6:
	.cfi_def_cfa_offset 128
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.6, %edi
	movl	$.L.str.7, %esi
	movl	$294, %edx                      # imm = 0x126
	jmp	.LBB4_7
.LBB4_12:
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.6, %edi
	movl	$.L.str.7, %esi
	movl	$321, %edx                      # imm = 0x141
	jmp	.LBB4_7
.LBB4_18:
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.6, %edi
	movl	$.L.str.7, %esi
	movl	$331, %edx                      # imm = 0x14B
	jmp	.LBB4_7
.LBB4_22:
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.6, %edi
	movl	$.L.str.7, %esi
	movl	$342, %edx                      # imm = 0x156
	jmp	.LBB4_7
.LBB4_28:
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.6, %edi
	movl	$.L.str.7, %esi
	movl	$391, %edx                      # imm = 0x187
.LBB4_7:
	movq	%rax, %rcx
	xorl	%eax, %eax
	callq	printf
	callq	hipDeviceReset
	movl	$1, %edi
	callq	exit
.Lfunc_end4:
	.size	main, .Lfunc_end4-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB5_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB5_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z17convolutionRowGPUPdS_ii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z20convolutionColumnGPUPdS_ii, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$0, 8(%rsp)
	movl	$1, (%rsp)
	movl	$d_Filter, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movl	$520, %r9d                      # imm = 0x208
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	callq	__hipRegisterVar
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end5:
	.size	__hip_module_ctor, .Lfunc_end5-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB6_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB6_2:
	retq
.Lfunc_end6:
	.size	__hip_module_dtor, .Lfunc_end6-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	d_Filter,@object                # @d_Filter
	.local	d_Filter
	.comm	d_Filter,520,16
	.type	_Z17convolutionRowGPUPdS_ii,@object # @_Z17convolutionRowGPUPdS_ii
	.section	.rodata,"a",@progbits
	.globl	_Z17convolutionRowGPUPdS_ii
	.p2align	3, 0x0
_Z17convolutionRowGPUPdS_ii:
	.quad	_Z32__device_stub__convolutionRowGPUPdS_ii
	.size	_Z17convolutionRowGPUPdS_ii, 8

	.type	_Z20convolutionColumnGPUPdS_ii,@object # @_Z20convolutionColumnGPUPdS_ii
	.globl	_Z20convolutionColumnGPUPdS_ii
	.p2align	3, 0x0
_Z20convolutionColumnGPUPdS_ii:
	.quad	_Z35__device_stub__convolutionColumnGPUPdS_ii
	.size	_Z20convolutionColumnGPUPdS_ii, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Enter image size. Should be a power of two and greater than %d : "
	.size	.L.str, 66

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"%d"
	.size	.L.str.1, 3

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Image Width x Height = %i x %i\n\n"
	.size	.L.str.2, 33

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"ERROR IN CUDA %s:%d: '%s'\n"
	.size	.L.str.6, 27

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"/home/ubuntu/Datasets/stackv2/train-structured-repos-hip-sm89/kostastsiv/HPC/main/HPC-Labs-master/Lab4/Convolution2D_OPT.hip"
	.size	.L.str.7, 125

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"memcpy host2device execution time: %g s\n"
	.size	.L.str.10, 41

	.type	.L.str.13,@object               # @.str.13
.L.str.13:
	.asciz	"row kernel execution time: %g s\n"
	.size	.L.str.13, 33

	.type	.L.str.14,@object               # @.str.14
.L.str.14:
	.asciz	"col kernel execution time: %g s\n"
	.size	.L.str.14, 33

	.type	.L.str.16,@object               # @.str.16
.L.str.16:
	.asciz	"memcpy device2host execution time: %g s\n"
	.size	.L.str.16, 41

	.type	.L.str.18,@object               # @.str.18
.L.str.18:
	.asciz	"CPU computation : COMPLETED in time:%10.5f\n"
	.size	.L.str.18, 44

	.type	.L.str.20,@object               # @.str.20
.L.str.20:
	.asciz	"CPU computations == GPU computation : FALSE line:%d difrence:%f \nExitting program...\n GPU: %lf \n"
	.size	.L.str.20, 97

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z17convolutionRowGPUPdS_ii"
	.size	.L__unnamed_1, 28

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z20convolutionColumnGPUPdS_ii"
	.size	.L__unnamed_2, 31

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"d_Filter"
	.size	.L__unnamed_3, 9

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"Allocating and initializing host arrays and device array..."
	.size	.Lstr, 60

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"Something went wrong wille malloc in CPU"
	.size	.Lstr.1, 41

	.type	.Lstr.2,@object                 # @str.2
.Lstr.2:
	.asciz	"Memmory allocation for host arrays: COMPLETED "
	.size	.Lstr.2, 47

	.type	.Lstr.3,@object                 # @str.3
.Lstr.3:
	.asciz	"Memmory allocation for device arrays: COMPLETED "
	.size	.Lstr.3, 49

	.type	.Lstr.4,@object                 # @str.4
.Lstr.4:
	.asciz	"initialization of host arrays: COMPLETED "
	.size	.Lstr.4, 42

	.type	.Lstr.5,@object                 # @str.5
.Lstr.5:
	.asciz	"initialization of device arrays: COMPLETED \n"
	.size	.Lstr.5, 45

	.type	.Lstr.6,@object                 # @str.6
.Lstr.6:
	.asciz	"GPU computation..."
	.size	.Lstr.6, 19

	.type	.Lstr.7,@object                 # @str.7
.Lstr.7:
	.asciz	"GPU computation : COMPLETED\n"
	.size	.Lstr.7, 29

	.type	.Lstr.8,@object                 # @str.8
.Lstr.8:
	.asciz	"CPU computation..."
	.size	.Lstr.8, 19

	.type	.Lstr.9,@object                 # @str.9
.Lstr.9:
	.asciz	"\nCPU computations == GPU computation?"
	.size	.Lstr.9, 38

	.type	.Lstr.10,@object                # @str.10
.Lstr.10:
	.asciz	"CPU computations == GPU computation : TRUE \nExitting program after Memmory Free..."
	.size	.Lstr.10, 83

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z32__device_stub__convolutionRowGPUPdS_ii
	.addrsig_sym _Z35__device_stub__convolutionColumnGPUPdS_ii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym d_Filter
	.addrsig_sym _Z17convolutionRowGPUPdS_ii
	.addrsig_sym _Z20convolutionColumnGPUPdS_ii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z17convolutionRowGPUPdS_ii ; -- Begin function _Z17convolutionRowGPUPdS_ii
	.globl	_Z17convolutionRowGPUPdS_ii
	.p2align	8
	.type	_Z17convolutionRowGPUPdS_ii,@function
_Z17convolutionRowGPUPdS_ii:            ; @_Z17convolutionRowGPUPdS_ii
; %bb.0:
	s_clause 0x2
	s_load_b32 s3, s[0:1], 0x24
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b32 s2, s[0:1], 0x10
	v_and_b32_e32 v4, 0x3ff, v0
	v_bfe_u32 v0, v0, 10, 10
                                        ; implicit-def: $vgpr9
	s_waitcnt lgkmcnt(0)
	s_and_b32 s0, s3, 0xffff
	s_lshr_b32 s1, s3, 16
	v_mad_u64_u32 v[1:2], null, s14, s0, v[4:5]
                                        ; implicit-def: $vgpr5_vgpr6
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, s15, s1, v[0:1]
	v_mul_u32_u24_e32 v3, 0x60, v0
	s_mov_b32 s1, exec_lo
	v_cmpx_lt_i32_e32 31, v1
	s_xor_b32 s1, exec_lo, s1
	s_cbranch_execz .LBB0_6
; %bb.1:
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[7:8], null, v2, s2, v[1:2]
	s_mov_b32 s3, exec_lo
                                        ; implicit-def: $vgpr9
	v_ashrrev_i32_e32 v8, 31, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], 3, v[7:8]
	v_add_co_u32 v5, vcc_lo, s6, v5
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v6, vcc_lo, s7, v6, vcc_lo
	global_load_b64 v[5:6], v[5:6], off offset:-256
	v_cmpx_lt_u32_e32 31, v4
	s_xor_b32 s3, exec_lo, s3
; %bb.2:
	v_add_nc_u32_e32 v9, v3, v4
                                        ; implicit-def: $vgpr7_vgpr8
; %bb.3:                                ; %Flow76
	s_and_not1_saveexec_b32 s3, s3
	s_cbranch_execz .LBB0_5
; %bb.4:
	v_or_b32_e32 v0, v3, v4
	v_dual_mov_b32 v10, 0 :: v_dual_add_nc_u32 v7, s0, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v0, 3, v0
	v_subrev_nc_u32_e32 v9, 32, v7
	s_waitcnt vmcnt(0)
	ds_store_b64 v0, v[5:6]
	v_add3_u32 v0, v4, s0, v3
	v_mov_b32_e32 v8, v10
	v_lshlrev_b64 v[9:10], 3, v[9:10]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[7:8], 3, v[7:8]
	v_add_co_u32 v9, vcc_lo, s6, v9
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v10, vcc_lo, s7, v10, vcc_lo
	v_add_co_u32 v7, vcc_lo, s6, v7
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v8, vcc_lo, s7, v8, vcc_lo
	s_clause 0x1
	global_load_b64 v[10:11], v[9:10], off
	global_load_b64 v[5:6], v[7:8], off
	v_lshlrev_b32_e32 v7, 3, v0
	v_add_nc_u32_e32 v9, 32, v0
	s_waitcnt vmcnt(1)
	ds_store_b64 v7, v[10:11]
.LBB0_5:                                ; %Flow77
	s_or_b32 exec_lo, exec_lo, s3
                                        ; implicit-def: $vgpr0
.LBB0_6:                                ; %Flow78
	s_and_not1_saveexec_b32 s1, s1
	s_cbranch_execz .LBB0_8
; %bb.7:
	s_waitcnt vmcnt(0)
	v_mul_lo_u32 v5, v2, s2
	v_mad_u32_u24 v0, 0x60, v0, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v7, 0 :: v_dual_lshlrev_b32 v12, 3, v0
	v_mov_b32_e32 v9, v7
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add3_u32 v5, v1, s0, v5
	v_mov_b32_e32 v6, v7
	v_lshl_add_u32 v13, s0, 3, v12
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_subrev_nc_u32_e32 v8, 32, v5
	v_lshlrev_b64 v[5:6], 3, v[5:6]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[8:9], 3, v[8:9]
	v_add_co_u32 v8, vcc_lo, s6, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e32 v9, vcc_lo, s7, v9, vcc_lo
	v_add_co_u32 v5, vcc_lo, s6, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, s7, v6, vcc_lo
	s_clause 0x1
	global_load_b64 v[10:11], v[8:9], off
	global_load_b64 v[5:6], v[5:6], off
	v_mov_b32_e32 v8, v7
	v_add3_u32 v9, v0, s0, 32
	ds_store_b64 v12, v[7:8]
	s_waitcnt vmcnt(1)
	ds_store_b64 v13, v[10:11]
.LBB0_8:
	s_or_b32 exec_lo, exec_lo, s1
	v_add_nc_u32_e32 v0, 32, v1
	v_lshlrev_b32_e32 v7, 3, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	v_cmp_le_i32_e32 vcc_lo, s2, v0
	s_waitcnt vmcnt(0)
	ds_store_b64 v7, v[5:6]
                                        ; implicit-def: $vgpr0
	s_and_saveexec_b32 s0, vcc_lo
	s_xor_b32 s0, exec_lo, s0
	s_cbranch_execz .LBB0_10
; %bb.9:
	v_mad_u64_u32 v[5:6], null, v2, s2, v[1:2]
	v_dual_mov_b32 v3, 0 :: v_dual_add_nc_u32 v0, v4, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_mov_b32 v4, v3 :: v_dual_lshlrev_b32 v7, 3, v0
	v_ashrrev_i32_e32 v6, 31, v5
	v_add_nc_u32_e32 v0, 32, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], 3, v[5:6]
	v_add_co_u32 v5, vcc_lo, s6, v5
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v6, vcc_lo, s7, v6, vcc_lo
	global_load_b64 v[5:6], v[5:6], off
	s_waitcnt vmcnt(0)
	ds_store_2addr_b64 v7, v[5:6], v[3:4] offset0:32 offset1:64
                                        ; implicit-def: $vgpr4
                                        ; implicit-def: $vgpr3
.LBB0_10:                               ; %Flow
	s_and_not1_saveexec_b32 s0, s0
; %bb.11:                               ; %._crit_edge
	v_add3_u32 v0, v4, v3, 32
; %bb.12:
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v3, 0 :: v_dual_lshlrev_b32 v0, 3, v0
	v_mov_b32_e32 v4, 0
	s_movk_i32 s3, 0xff00
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, d_Filter@rel32@lo+516
	s_addc_u32 s1, s1, d_Filter@rel32@hi+524
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB0_13:                               ; =>This Inner Loop Header: Depth=1
	v_add_nc_u32_e32 v5, s3, v0
	s_load_b64 s[6:7], s[0:1], 0x0
	s_add_i32 s3, s3, 8
	s_add_u32 s0, s0, -8
	s_addc_u32 s1, s1, -1
	ds_load_b64 v[5:6], v5
	s_cmpk_lg_i32 s3, 0x108
	s_waitcnt lgkmcnt(0)
	v_fma_f64 v[3:4], v[5:6], s[6:7], v[3:4]
	s_cbranch_scc1 .LBB0_13
; %bb.14:
	v_mad_u64_u32 v[5:6], null, v2, s2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v6, 31, v5
	v_lshlrev_b64 v[0:1], 3, v[5:6]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
	global_store_b64 v[0:1], v[3:4], off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z17convolutionRowGPUPdS_ii
		.amdhsa_group_segment_fixed_size 24576
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 14
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z17convolutionRowGPUPdS_ii, .Lfunc_end0-_Z17convolutionRowGPUPdS_ii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 816
; NumSgprs: 18
; NumVgprs: 14
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 24576 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 14
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z20convolutionColumnGPUPdS_ii ; -- Begin function _Z20convolutionColumnGPUPdS_ii
	.globl	_Z20convolutionColumnGPUPdS_ii
	.p2align	8
	.type	_Z20convolutionColumnGPUPdS_ii,@function
_Z20convolutionColumnGPUPdS_ii:         ; @_Z20convolutionColumnGPUPdS_ii
; %bb.0:
	s_clause 0x2
	s_load_b32 s3, s[0:1], 0x24
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	v_bfe_u32 v3, v0, 10, 10
	v_and_b32_e32 v4, 0x3ff, v0
	s_mov_b32 s8, 0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s2, s3, 16
	s_and_b32 s3, s3, 0xffff
	v_mad_u64_u32 v[0:1], null, s15, s2, v[3:4]
	v_mad_u64_u32 v[1:2], null, s14, s3, v[4:5]
	s_mov_b32 s3, exec_lo
                                        ; implicit-def: $vgpr5_vgpr6
                                        ; implicit-def: $vgpr2
	s_delay_alu instid0(VALU_DEP_2)
	v_cmpx_lt_i32_e32 31, v0
	s_xor_b32 s3, exec_lo, s3
	s_cbranch_execz .LBB1_8
; %bb.1:
	v_subrev_nc_u32_e32 v7, 32, v0
	s_mov_b32 s9, exec_lo
                                        ; implicit-def: $vgpr5_vgpr6
                                        ; implicit-def: $vgpr2
	v_cmpx_lt_u32_e32 31, v3
	s_xor_b32 s9, exec_lo, s9
; %bb.2:
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[5:6], null, v7, s0, v[1:2]
	s_mov_b32 s8, exec_lo
	v_lshl_add_u32 v2, v3, 5, v4
                                        ; implicit-def: $vgpr7
	v_ashrrev_i32_e32 v6, 31, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], 3, v[5:6]
	v_add_co_u32 v5, vcc_lo, s6, v5
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v6, vcc_lo, s7, v6, vcc_lo
; %bb.3:                                ; %Flow86
	s_and_not1_saveexec_b32 s9, s9
	s_cbranch_execz .LBB1_7
; %bb.4:
	v_mad_u64_u32 v[5:6], null, v7, s0, v[1:2]
	v_lshlrev_b32_e32 v2, 5, v3
	v_add_nc_u32_e32 v7, s2, v0
	s_add_i32 s10, s1, -1
	s_mov_b32 s11, s8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_lshl_u32 v2, v2, v4, 3
	v_ashrrev_i32_e32 v6, 31, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], 3, v[5:6]
	v_add_co_u32 v5, vcc_lo, s6, v5
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v6, vcc_lo, s7, v6, vcc_lo
	v_cmp_ge_u32_e32 vcc_lo, s10, v7
	global_load_b64 v[5:6], v[5:6], off
	s_waitcnt vmcnt(0)
	ds_store_b64 v2, v[5:6]
                                        ; implicit-def: $vgpr5_vgpr6
                                        ; implicit-def: $vgpr2
	s_and_saveexec_b32 s10, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s10, exec_lo, s10
	s_cbranch_execz .LBB1_6
; %bb.5:
	v_subrev_nc_u32_e32 v2, 32, v7
	s_or_b32 s11, s8, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v2, s0, v[1:2]
	v_mad_u64_u32 v[10:11], null, v7, s0, v[1:2]
	v_add_nc_u32_e32 v2, s2, v3
	v_lshl_add_u32 v2, v2, 5, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v6, 0 :: v_dual_lshlrev_b32 v7, 3, v2
	v_lshlrev_b64 v[8:9], 3, v[5:6]
	v_dual_mov_b32 v11, v6 :: v_dual_add_nc_u32 v2, 0x400, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v8, vcc_lo, s6, v8
	v_add_co_ci_u32_e32 v9, vcc_lo, s7, v9, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_lshlrev_b64 v[5:6], 3, v[10:11]
	global_load_b64 v[8:9], v[8:9], off
	v_add_co_u32 v5, vcc_lo, s6, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, s7, v6, vcc_lo
	s_waitcnt vmcnt(0)
	ds_store_b64 v7, v[8:9]
.LBB1_6:                                ; %Flow88
	s_or_b32 exec_lo, exec_lo, s10
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_and_not1_b32 s8, s8, exec_lo
	s_and_b32 s10, s11, exec_lo
	s_or_b32 s8, s8, s10
.LBB1_7:                                ; %Flow87
	s_or_b32 exec_lo, exec_lo, s9
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s8, s8, exec_lo
.LBB1_8:                                ; %Flow
	s_or_saveexec_b32 s3, s3
	v_lshlrev_b32_e32 v7, 5, v3
	s_xor_b32 exec_lo, exec_lo, s3
	s_cbranch_execz .LBB1_10
; %bb.9:
	v_mov_b32_e32 v8, 0
	v_add_nc_u32_e32 v2, s2, v0
	v_add_lshl_u32 v12, v7, v4, 3
	s_or_b32 s8, s8, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_subrev_nc_u32_e32 v9, 32, v2
	v_mad_u64_u32 v[5:6], null, v9, s0, v[1:2]
	v_mov_b32_e32 v9, v8
	v_mov_b32_e32 v6, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], 3, v[5:6]
	v_add_co_u32 v5, vcc_lo, s6, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v6, vcc_lo, s7, v6, vcc_lo
	global_load_b64 v[10:11], v[5:6], off
	v_mad_u64_u32 v[5:6], null, v2, s0, v[1:2]
	v_add_nc_u32_e32 v2, s2, v3
	v_lshl_add_u32 v2, v2, 5, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v6, v8 :: v_dual_lshlrev_b32 v13, 3, v2
	v_add_nc_u32_e32 v2, 0x400, v2
	ds_store_b64 v12, v[8:9]
	v_lshlrev_b64 v[5:6], 3, v[5:6]
	v_add_co_u32 v5, vcc_lo, s6, v5
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v6, vcc_lo, s7, v6, vcc_lo
	s_waitcnt vmcnt(0)
	ds_store_b64 v13, v[10:11]
.LBB1_10:                               ; %Flow89
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s2, s8
	s_cbranch_execz .LBB1_12
; %bb.11:                               ; %.sink.split
	global_load_b64 v[5:6], v[5:6], off
	v_lshlrev_b32_e32 v2, 3, v2
	s_waitcnt vmcnt(0)
	ds_store_b64 v2, v[5:6]
.LBB1_12:
	s_or_b32 exec_lo, exec_lo, s2
	v_add_nc_u32_e32 v2, 32, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_le_i32_e32 vcc_lo, s1, v2
	s_and_saveexec_b32 s1, vcc_lo
	s_cbranch_execz .LBB1_14
; %bb.13:
	v_mad_u64_u32 v[5:6], null, v0, s0, v[1:2]
	v_mov_b32_e32 v8, 0
	v_add_lshl_u32 v2, v4, v7, 3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mov_b32_e32 v9, v8
	v_ashrrev_i32_e32 v6, 31, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], 3, v[5:6]
	v_add_co_u32 v5, vcc_lo, s6, v5
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v6, vcc_lo, s7, v6, vcc_lo
	global_load_b64 v[5:6], v[5:6], off
	s_waitcnt vmcnt(0)
	ds_store_2addr_stride64_b64 v2, v[5:6], v[8:9] offset0:16 offset1:32
.LBB1_14:
	s_or_b32 exec_lo, exec_lo, s1
	v_lshlrev_b32_e32 v2, 3, v4
	v_mov_b32_e32 v4, 0
	v_mov_b32_e32 v5, 0
	s_mov_b32 s1, 0
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, d_Filter@rel32@lo+516
	s_addc_u32 s3, s3, d_Filter@rel32@hi+524
	v_lshl_add_u32 v2, v3, 8, v2
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB1_15:                               ; =>This Inner Loop Header: Depth=1
	v_add_nc_u32_e32 v3, s1, v2
	s_load_b64 s[6:7], s[2:3], 0x0
	s_addk_i32 s1, 0x100
	s_add_u32 s2, s2, -8
	s_addc_u32 s3, s3, -1
	ds_load_b64 v[6:7], v3
	s_cmpk_lg_i32 s1, 0x4100
	s_waitcnt lgkmcnt(0)
	v_fma_f64 v[4:5], v[6:7], s[6:7], v[4:5]
	s_cbranch_scc1 .LBB1_15
; %bb.16:
	v_mad_u64_u32 v[2:3], null, v0, s0, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[0:1], 3, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
	global_store_b64 v[0:1], v[4:5], off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z20convolutionColumnGPUPdS_ii
		.amdhsa_group_segment_fixed_size 24576
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 14
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z20convolutionColumnGPUPdS_ii, .Lfunc_end1-_Z20convolutionColumnGPUPdS_ii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 948
; NumSgprs: 18
; NumVgprs: 14
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 24576 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 14
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.protected	d_Filter                ; @d_Filter
	.type	d_Filter,@object
	.section	.bss,"aw",@nobits
	.globl	d_Filter
	.p2align	4, 0x0
d_Filter:
	.zero	520
	.size	d_Filter, 520

	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym d_Filter
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 24576
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z17convolutionRowGPUPdS_ii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z17convolutionRowGPUPdS_ii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     14
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 24576
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z20convolutionColumnGPUPdS_ii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z20convolutionColumnGPUPdS_ii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     14
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
