
#include <stdio.h>
#include <stdlib.h>
#include <assert.h>

#define BLOCK_SIZE 16

/*
*********************************************************************
function name: inicializarMatrizRandom
descripcion: inicializa aleatoriamente los elementos de una matriz
parametros:
		- M: puntero a la matriz a inicializar
		- m: numero de filas de A
		- n: numero de columnas de A
*********************************************************************
*/

void inicializarMatrizRandom (float *M, int m, int n){
    int i;
    for (i = 0; i < m*n; i++) {
	    M[i] = rand() % 10;
}
}
/*
*********************************************************************
funcion: gpu_matrix_mult
descripcion: producto de dos matrices sin caches en GPU (no necesariamente cuadradas)
parametros:
		- a,b,c: punteros a las matrices con las que operar en GPU
		- m: numero de filas de A
		- n: numero de columnas de A
		- k: numero de columnas de B
*********************************************************************
*/
__global__ void gpu_matrix_mult(float *a,float *b, float *c, int m, int n, int k)
{
    int row = blockIdx.y * blockDim.y + threadIdx.y;
    int col = blockIdx.x * blockDim.x + threadIdx.x;
    float sum = 0.0;
    if( col < k && row < m)
    {
        for(int i = 0; i < n; i++)
        {
            sum += a[row * n + i] * b[i * k + col];
        }
        c[row * k + col] = sum;
    }
}

/*
*********************************************************************
funcion: gpu_square_matrix_mult
descripcion: producto de dos matrices utilizando caches en GPU (matriz cuadrada)
parametros:
		- d_a,d_b,d_result: punteros a las matrices device con las que operar en GPU
		- n: numero de columnas de A (se presupone que la matriz sera cuadrada)
*********************************************************************
*/
__global__ void gpu_square_matrix_mult(float *d_a, float *d_b, float *d_result, int n)
{
    __shared__ float tile_a[BLOCK_SIZE][BLOCK_SIZE];
    __shared__ float tile_b[BLOCK_SIZE][BLOCK_SIZE];

    int row = blockIdx.y * BLOCK_SIZE + threadIdx.y;
    int col = blockIdx.x * BLOCK_SIZE + threadIdx.x;
    float tmp = 0.0;
    int idx;

    for (int sub = 0; sub < gridDim.x; ++sub)
    {
        idx = row * n + sub * BLOCK_SIZE + threadIdx.x;
        if(idx >= n*n)
        {

            tile_a[threadIdx.y][threadIdx.x] = 0.0;
        }
        else
        {
            tile_a[threadIdx.y][threadIdx.x] = d_a[idx];
        }

        idx = (sub * BLOCK_SIZE + threadIdx.y) * n + col;
        if(idx >= n*n)
        {
            tile_b[threadIdx.y][threadIdx.x] = 0.0;
        }
        else
        {
            tile_b[threadIdx.y][threadIdx.x] = d_b[idx];
        }
        __syncthreads();

        for (int k = 0; k < BLOCK_SIZE; ++k)
        {
            tmp += tile_a[threadIdx.y][k] * tile_b[k][threadIdx.x];
        }
        __syncthreads();
    }
    if(row < n && col < n)
    {
        d_result[row * n + col] = tmp;
    }
}


/*
*********************************************************************
funcion: cpu_matrix_mult
descripcion: producto de dos matrices (no necesariamente cuadradas) en CPU.
parametros:
		- h_a,h_b,h_result: punteros a las matrices host con las que operar en CPU
		- m: numero de filas de A
		- n: numero de columnas de A
		- k: numero de columnas de B
*********************************************************************
*/
void cpu_matrix_mult(float *h_a, float *h_b, float *h_result, int m, int n, int k) {

/*
*********************************************************************
Version IKJ (secuencial optimizada)
*********************************************************************
*/
 float r=0.0;
 int i;
 int j;
 int h;
    for (i=0; i< m; i++)
      for (j=0; j< k; j++)
        h_result[i*k+j] = 0;

    for (i=0; i<m; i++)
      for (h=0; h<n; h++) {
        r = h_a[i*n+h];
        for (j=0; j<k; j++)
	  h_result[i*k+j]+= r * h_b[h*k+j];
	}

/*
*********************************************************************
Version IJK (secuencial original)
*********************************************************************
*/
    for (int i = 0; i < m; ++i)
    {
        for (int j = 0; j < k; ++j)
        {
            float tmp = 0.0;
            for (int h = 0; h < n; ++h)
            {
                tmp += h_a[i * n + h] * h_b[h * k + j];
            }
            h_result[i * k + j] = tmp;
        }
    }
}

int main(int argc, char const *argv[])
{
  int m, n, k;
  if(argc < 4 || argc > 4){
    fprintf(stderr,"Uso: filas matriz A, columnas matriz A, columnas matriz B\n");
    exit(-1);
  }
  // Recogemos los parámetros de ejecución relativos al tamaño de las matrices
  m = atoi(argv[1]);
  n = atoi(argv[2]);
  k = atoi(argv[3]);

  // Reservamos memoria para almacenar las matrices en host y su posterior multiplicación en CPU
  float *h_a, *h_b, *h_c, *h_cc;
  h_a=(float*)malloc(sizeof(float)*m*n);
  h_b=(float*)malloc(sizeof(float)*n*k);
  h_c=(float*)malloc(sizeof(float)*m*k);
  h_cc=(float*)malloc(sizeof(float)*m*k);

  // Inicializamos las matrices con valores decimales aleatorios
  inicializarMatrizRandom (h_a, m, n);
  inicializarMatrizRandom (h_b, n, k);


  // Creamos cudaEvents para medir los tiempos de ejeución en CPU y GPU.
  float gpu_elapsed_time_ms, cpu_elapsed_time_ms;
  cudaEvent_t start, stop;
  cudaEventCreate(&start);
  cudaEventCreate(&stop);

  cudaEventRecord(start, 0);

  // Reservamos memoria para almacenar las matrices en device y su posterior multiplicación en GPU
  float *d_a, *d_b, *d_c;
  cudaMalloc((void **) &d_a, sizeof(float)*m*n);
  cudaMalloc((void **) &d_b, sizeof(float)*n*k);
  cudaMalloc((void **) &d_c, sizeof(float)*m*k);


  cudaMemcpy(d_a, h_a, sizeof(float)*m*n, cudaMemcpyHostToDevice);
  cudaMemcpy(d_b, h_b, sizeof(float)*n*k, cudaMemcpyHostToDevice);

  // Establecemos las dimensiones del Grid (Rejilla) y el Bloque
  unsigned int grid_rows = (m + BLOCK_SIZE - 1) / BLOCK_SIZE;
  unsigned int grid_cols = (k + BLOCK_SIZE - 1) / BLOCK_SIZE;
  dim3 dimGrid(grid_cols, grid_rows);
  dim3 dimBlock(BLOCK_SIZE, BLOCK_SIZE);

  // If y else para elegir entre ejecución sin caches o con caches (memoria sin compartir o compartida)
  if(m == n && n == k){
      gpu_square_matrix_mult<<<dimGrid, dimBlock>>>(d_a, d_b, d_c, n);
  }
  else{
      gpu_matrix_mult<<<dimGrid, dimBlock>>>(d_a, d_b, d_c, m, n, k);
  }

  cudaMemcpy(h_c, d_c, sizeof(float)*m*k, cudaMemcpyDeviceToHost);
  cudaThreadSynchronize();

  cudaEventRecord(stop, 0);
  cudaEventSynchronize(stop);

  // Medimos el tiempo empleado en ejecutar la multiplicación en GPU
  cudaEventElapsedTime(&gpu_elapsed_time_ms, start, stop);
  printf("Tiempo empleado en la Mult de Matrices %dx%d . %dx%d en GPU: %fs.\n\n", m, n, n, k, gpu_elapsed_time_ms/1000);


  cudaEventRecord(start, 0);
  cpu_matrix_mult(h_a, h_b, h_cc, m, n, k);

  cudaEventRecord(stop, 0);
  cudaEventSynchronize(stop);

  // Medimos el tiempo empleado en ejecutar la multiplicación en CPU
  cudaEventElapsedTime(&cpu_elapsed_time_ms, start, stop);
  printf("Tiempo empleado en la Mult de Matrices %dx%d . %dx%d en CPU: %fs.\n\n", m, n, n, k, cpu_elapsed_time_ms/1000);

  // Comprobamos que los resultados de la multiplicación son correctos
  int all_ok = 1;
  for (int i = 0; i < m; ++i){
      for (int j = 0; j < k; ++j){
         if(h_cc[i*k + j] != h_c[i*k + j])
            {
              all_ok = 0;
            }
        }
    }

  // Calculamos el speedup empleado respecto a la CPU
  if(all_ok){
      printf("CORRECTO!, Speedup = %f\n", cpu_elapsed_time_ms / gpu_elapsed_time_ms);
  }
  else{
      printf("INCORRECTO\n");
  }


  // Liberamos la memoria reservada anteriormente
  cudaFree(d_a);
  cudaFree(d_b);
  cudaFree(d_c);
  cudaFreeHost(h_a);
  cudaFreeHost(h_b);
  cudaFreeHost(h_c);
  cudaFreeHost(h_cc);

  return 0;
}

	.file	"tmpxft_0039c6cc_00000000-6_matmulCUDA.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2032:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2032:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z23inicializarMatrizRandomPfii
	.type	_Z23inicializarMatrizRandomPfii, @function
_Z23inicializarMatrizRandomPfii:
.LFB2027:
	.cfi_startproc
	endbr64
	imull	%edx, %esi
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	$10, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%rdi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movl	%esi, %ebp
	xorl	%ebx, %ebx
	pushq	%rcx
	.cfi_def_cfa_offset 48
.L3:
	cmpl	%ebx, %ebp
	jle	.L7
	call	rand@PLT
	cltd
	idivl	%r13d
	cvtsi2ssl	%edx, %xmm0
	movss	%xmm0, (%r12,%rbx,4)
	incq	%rbx
	jmp	.L3
.L7:
	popq	%rax
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z23inicializarMatrizRandomPfii, .-_Z23inicializarMatrizRandomPfii
	.globl	_Z15cpu_matrix_multPfS_S_iii
	.type	_Z15cpu_matrix_multPfS_S_iii, @function
_Z15cpu_matrix_multPfS_S_iii:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rdx, %rax
	xorl	%r10d, %r10d
	movl	%ecx, %edx
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	xorl	%r11d, %r11d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
.L9:
	cmpl	%edx, %r11d
	jl	.L11
	xorl	%ebp, %ebp
	xorl	%r12d, %r12d
	xorl	%r13d, %r13d
	jmp	.L12
.L11:
	movslq	%r10d, %rcx
	leaq	(%rax,%rcx,4), %rbx
	xorl	%ecx, %ecx
.L13:
	cmpl	%ecx, %r9d
	jle	.L26
	movl	$0x00000000, (%rbx,%rcx,4)
	incq	%rcx
	jmp	.L13
.L26:
	incl	%r11d
	addl	%r9d, %r10d
	jmp	.L9
.L27:
	incl	%r13d
	addl	%r8d, %r12d
	addl	%r9d, %ebp
.L12:
	cmpl	%edx, %r13d
	jl	.L17
	movslq	%r9d, %r12
	xorl	%r11d, %r11d
	xorl	%ebx, %ebx
	xorl	%ebp, %ebp
	salq	$2, %r12
	jmp	.L18
.L17:
	movslq	%r12d, %rcx
	leaq	(%rdi,%rcx,4), %r14
	movslq	%ebp, %rcx
	leaq	(%rax,%rcx,4), %rbx
	xorl	%ecx, %ecx
	movq	%rbx, -8(%rsp)
	xorl	%ebx, %ebx
.L19:
	cmpl	%ecx, %r8d
	jle	.L27
	movslq	%ebx, %r10
	movss	(%r14,%rcx,4), %xmm1
	movq	-8(%rsp), %r11
	leaq	(%rsi,%r10,4), %r15
	xorl	%r10d, %r10d
.L14:
	cmpl	%r10d, %r9d
	jle	.L28
	movss	(%r15,%r10,4), %xmm0
	addq	$4, %r11
	incq	%r10
	mulss	%xmm1, %xmm0
	addss	-4(%r11), %xmm0
	movss	%xmm0, -4(%r11)
	jmp	.L14
.L28:
	incq	%rcx
	addl	%r9d, %ebx
	jmp	.L19
.L21:
	incl	%ebp
	addl	%r9d, %ebx
	addl	%r8d, %r11d
.L18:
	cmpl	%edx, %ebp
	jge	.L8
	movslq	%ebx, %rcx
	leaq	(%rax,%rcx,4), %r15
	movslq	%r11d, %rcx
	leaq	(%rdi,%rcx,4), %r14
	xorl	%ecx, %ecx
.L24:
	cmpl	%ecx, %r9d
	jle	.L21
	leaq	(%rsi,%rcx,4), %r13
	xorl	%r10d, %r10d
	xorps	%xmm0, %xmm0
.L22:
	cmpl	%r10d, %r8d
	jle	.L29
	movss	(%r14,%r10,4), %xmm1
	mulss	0(%r13), %xmm1
	incq	%r10
	addq	%r12, %r13
	addss	%xmm1, %xmm0
	jmp	.L22
.L29:
	movss	%xmm0, (%r15,%rcx,4)
	incq	%rcx
	jmp	.L24
.L8:
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	_Z15cpu_matrix_multPfS_S_iii, .-_Z15cpu_matrix_multPfS_S_iii
	.globl	_Z42__device_stub__Z15gpu_matrix_multPfS_S_iiiPfS_S_iii
	.type	_Z42__device_stub__Z15gpu_matrix_multPfS_S_iiiPfS_S_iii, @function
_Z42__device_stub__Z15gpu_matrix_multPfS_S_iiiPfS_S_iii:
.LFB2054:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movl	%r9d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L30
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z15gpu_matrix_multPfS_S_iii(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L30:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L32
	call	__stack_chk_fail@PLT
.L32:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2054:
	.size	_Z42__device_stub__Z15gpu_matrix_multPfS_S_iiiPfS_S_iii, .-_Z42__device_stub__Z15gpu_matrix_multPfS_S_iiiPfS_S_iii
	.globl	_Z15gpu_matrix_multPfS_S_iii
	.type	_Z15gpu_matrix_multPfS_S_iii, @function
_Z15gpu_matrix_multPfS_S_iii:
.LFB2055:
	.cfi_startproc
	endbr64
	jmp	_Z42__device_stub__Z15gpu_matrix_multPfS_S_iiiPfS_S_iii
	.cfi_endproc
.LFE2055:
	.size	_Z15gpu_matrix_multPfS_S_iii, .-_Z15gpu_matrix_multPfS_S_iii
	.globl	_Z47__device_stub__Z22gpu_square_matrix_multPfS_S_iPfS_S_i
	.type	_Z47__device_stub__Z22gpu_square_matrix_multPfS_S_iPfS_S_i, @function
_Z47__device_stub__Z22gpu_square_matrix_multPfS_S_iPfS_S_i:
.LFB2056:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L35
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z22gpu_square_matrix_multPfS_S_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L35:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L37
	call	__stack_chk_fail@PLT
.L37:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2056:
	.size	_Z47__device_stub__Z22gpu_square_matrix_multPfS_S_iPfS_S_i, .-_Z47__device_stub__Z22gpu_square_matrix_multPfS_S_iPfS_S_i
	.globl	_Z22gpu_square_matrix_multPfS_S_i
	.type	_Z22gpu_square_matrix_multPfS_S_i, @function
_Z22gpu_square_matrix_multPfS_S_i:
.LFB2057:
	.cfi_startproc
	endbr64
	jmp	_Z47__device_stub__Z22gpu_square_matrix_multPfS_S_iPfS_S_i
	.cfi_endproc
.LFE2057:
	.size	_Z22gpu_square_matrix_multPfS_S_i, .-_Z22gpu_square_matrix_multPfS_S_i
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"Uso: filas matriz A, columnas matriz A, columnas matriz B\n"
.LC3:
	.string	"Tiempo empleado en la Mult de Matrices %dx%d . %dx%d en GPU: %fs.\n\n"
.LC4:
	.string	"Tiempo empleado en la Mult de Matrices %dx%d . %dx%d en CPU: %fs.\n\n"
.LC5:
	.string	"CORRECTO!, Speedup = %f\n"
.LC6:
	.string	"INCORRECTO\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$120, %rsp
	.cfi_def_cfa_offset 176
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	cmpl	$4, %edi
	je	.L41
	movq	stderr(%rip), %rdi
	leaq	.LC1(%rip), %rdx
	movl	$2, %esi
	call	__fprintf_chk@PLT
	orl	$-1, %edi
	call	exit@PLT
.L41:
	movq	8(%rsi), %rdi
	movq	%rsi, %rbp
	call	atoi@PLT
	movq	16(%rbp), %rdi
	movslq	%eax, %r14
	call	atoi@PLT
	movq	24(%rbp), %rdi
	movq	%r14, %r12
	movslq	%eax, %r15
	call	atoi@PLT
	movq	%r15, %rbx
	movslq	%eax, %r13
	movq	%r14, %rax
	imulq	%r15, %rax
	movq	%r13, %rbp
	imulq	%r13, %r15
	imulq	%r13, %r14
	salq	$2, %rax
	movq	%rax, %rdi
	movq	%rax, 16(%rsp)
	call	malloc@PLT
	movq	%rax, (%rsp)
	leaq	0(,%r15,4), %rax
	movq	%rax, %rdi
	movq	%rax, 24(%rsp)
	call	malloc@PLT
	movq	%rax, 8(%rsp)
	leaq	0(,%r14,4), %rax
	movq	%rax, %r13
	movq	%rax, %rdi
	call	malloc@PLT
	movq	%r13, %rdi
	movq	%rax, %r15
	call	malloc@PLT
	movq	(%rsp), %rdi
	movl	%ebx, %edx
	movl	%r12d, %esi
	movq	%rax, %r14
	call	_Z23inicializarMatrizRandomPfii
	movq	8(%rsp), %rdi
	movl	%ebp, %edx
	movl	%ebx, %esi
	call	_Z23inicializarMatrizRandomPfii
	leaq	40(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	48(%rsp), %rdi
	call	cudaEventCreate@PLT
	movq	40(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	16(%rsp), %rsi
	leaq	56(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	24(%rsp), %rsi
	leaq	64(%rsp), %rdi
	call	cudaMalloc@PLT
	leaq	72(%rsp), %rdi
	movq	%r13, %rsi
	call	cudaMalloc@PLT
	movq	16(%rsp), %rdx
	movq	(%rsp), %rsi
	movl	$1, %ecx
	movq	56(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	24(%rsp), %rdx
	movq	64(%rsp), %rdi
	movl	$1, %ecx
	movq	8(%rsp), %rsi
	call	cudaMemcpy@PLT
	leal	15(%rbp), %eax
	movl	$16, %ecx
	movl	$1, 88(%rsp)
	cltd
	movl	$1, 100(%rsp)
	idivl	%ecx
	movl	%eax, 80(%rsp)
	leal	15(%r12), %eax
	cltd
	idivl	%ecx
	movabsq	$68719476752, %rdx
	cmpl	%ebx, %r12d
	movq	%rdx, 92(%rsp)
	movl	%eax, 84(%rsp)
	movq	80(%rsp), %rdi
	jne	.L42
	cmpl	%ebp, %ebx
	jne	.L42
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	movl	$1, %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L44
	movq	72(%rsp), %rdx
	movq	64(%rsp), %rsi
	movl	%ebx, %ecx
	movq	56(%rsp), %rdi
	call	_Z47__device_stub__Z22gpu_square_matrix_multPfS_S_iPfS_S_i
	jmp	.L44
.L42:
	movl	100(%rsp), %ecx
	movq	92(%rsp), %rdx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	88(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L44
	movq	72(%rsp), %rdx
	movq	64(%rsp), %rsi
	movl	%ebp, %r9d
	movl	%ebx, %r8d
	movq	56(%rsp), %rdi
	movl	%r12d, %ecx
	call	_Z42__device_stub__Z15gpu_matrix_multPfS_S_iiiPfS_S_iii
.L44:
	movq	72(%rsp), %rsi
	movl	$2, %ecx
	movq	%r13, %rdx
	movq	%r15, %rdi
	call	cudaMemcpy@PLT
	call	cudaThreadSynchronize@PLT
	movq	48(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	48(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	48(%rsp), %rdx
	movq	40(%rsp), %rsi
	leaq	32(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	movl	%ebp, %r9d
	movl	%ebx, %r8d
	movl	%ebx, %ecx
	movl	%r12d, %edx
	movl	$2, %edi
	movb	$1, %al
	movss	32(%rsp), %xmm0
	leaq	.LC3(%rip), %rsi
	divss	.LC2(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	call	__printf_chk@PLT
	movq	40(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	8(%rsp), %rsi
	movl	%ebp, %r9d
	movl	%ebx, %r8d
	movq	(%rsp), %rdi
	movl	%r12d, %ecx
	movq	%r14, %rdx
	call	_Z15cpu_matrix_multPfS_S_iii
	movq	48(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	48(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	48(%rsp), %rdx
	movq	40(%rsp), %rsi
	leaq	36(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	movl	%ebx, %ecx
	leaq	.LC4(%rip), %rsi
	movb	$1, %al
	movl	$2, %edi
	movl	%ebp, %r9d
	movl	%ebx, %r8d
	movl	%r12d, %edx
	movss	36(%rsp), %xmm0
	divss	.LC2(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	call	__printf_chk@PLT
	xorl	%ecx, %ecx
	xorl	%esi, %esi
	movl	$1, %edi
.L46:
	cmpl	%r12d, %esi
	jge	.L50
	movslq	%ecx, %rax
	xorl	%edx, %edx
	salq	$2, %rax
.L51:
	cmpl	%ebp, %edx
	jge	.L63
	movss	(%r14,%rax), %xmm0
	ucomiss	(%r15,%rax), %xmm0
	jp	.L55
	je	.L47
.L55:
	xorl	%edi, %edi
.L47:
	incl	%edx
	addq	$4, %rax
	jmp	.L51
.L63:
	incl	%esi
	addl	%ebp, %ecx
	jmp	.L46
.L50:
	testl	%edi, %edi
	je	.L52
	leaq	.LC5(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	movss	36(%rsp), %xmm0
	divss	32(%rsp), %xmm0
	cvtss2sd	%xmm0, %xmm0
	call	__printf_chk@PLT
	jmp	.L53
.L52:
	leaq	.LC6(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L53:
	movq	56(%rsp), %rdi
	call	cudaFree@PLT
	movq	64(%rsp), %rdi
	call	cudaFree@PLT
	movq	72(%rsp), %rdi
	call	cudaFree@PLT
	movq	(%rsp), %rdi
	call	cudaFreeHost@PLT
	movq	8(%rsp), %rdi
	call	cudaFreeHost@PLT
	movq	%r15, %rdi
	call	cudaFreeHost@PLT
	movq	%r14, %rdi
	call	cudaFreeHost@PLT
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L54
	call	__stack_chk_fail@PLT
.L54:
	addq	$120, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2029:
	.size	main, .-main
	.section	.rodata.str1.1
.LC7:
	.string	"_Z22gpu_square_matrix_multPfS_S_i"
.LC8:
	.string	"_Z15gpu_matrix_multPfS_S_iii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2059:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC7(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z22gpu_square_matrix_multPfS_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC8(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z15gpu_matrix_multPfS_S_iii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2059:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC2:
	.long	1148846080
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:



#include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <assert.h>

#define BLOCK_SIZE 16

/*
*********************************************************************
function name: inicializarMatrizRandom
descripcion: inicializa aleatoriamente los elementos de una matriz
parametros:
		- M: puntero a la matriz a inicializar
		- m: numero de filas de A
		- n: numero de columnas de A
*********************************************************************
*/

void inicializarMatrizRandom (float *M, int m, int n){
    int i;
    for (i = 0; i < m*n; i++) {
	    M[i] = rand() % 10;
}
}
/*
*********************************************************************
funcion: gpu_matrix_mult
descripcion: producto de dos matrices sin caches en GPU (no necesariamente cuadradas)
parametros:
		- a,b,c: punteros a las matrices con las que operar en GPU
		- m: numero de filas de A
		- n: numero de columnas de A
		- k: numero de columnas de B
*********************************************************************
*/
__global__ void gpu_matrix_mult(float *a,float *b, float *c, int m, int n, int k)
{
    int row = blockIdx.y * blockDim.y + threadIdx.y;
    int col = blockIdx.x * blockDim.x + threadIdx.x;
    float sum = 0.0;
    if( col < k && row < m)
    {
        for(int i = 0; i < n; i++)
        {
            sum += a[row * n + i] * b[i * k + col];
        }
        c[row * k + col] = sum;
    }
}

/*
*********************************************************************
funcion: gpu_square_matrix_mult
descripcion: producto de dos matrices utilizando caches en GPU (matriz cuadrada)
parametros:
		- d_a,d_b,d_result: punteros a las matrices device con las que operar en GPU
		- n: numero de columnas de A (se presupone que la matriz sera cuadrada)
*********************************************************************
*/
__global__ void gpu_square_matrix_mult(float *d_a, float *d_b, float *d_result, int n)
{
    __shared__ float tile_a[BLOCK_SIZE][BLOCK_SIZE];
    __shared__ float tile_b[BLOCK_SIZE][BLOCK_SIZE];

    int row = blockIdx.y * BLOCK_SIZE + threadIdx.y;
    int col = blockIdx.x * BLOCK_SIZE + threadIdx.x;
    float tmp = 0.0;
    int idx;

    for (int sub = 0; sub < gridDim.x; ++sub)
    {
        idx = row * n + sub * BLOCK_SIZE + threadIdx.x;
        if(idx >= n*n)
        {

            tile_a[threadIdx.y][threadIdx.x] = 0.0;
        }
        else
        {
            tile_a[threadIdx.y][threadIdx.x] = d_a[idx];
        }

        idx = (sub * BLOCK_SIZE + threadIdx.y) * n + col;
        if(idx >= n*n)
        {
            tile_b[threadIdx.y][threadIdx.x] = 0.0;
        }
        else
        {
            tile_b[threadIdx.y][threadIdx.x] = d_b[idx];
        }
        __syncthreads();

        for (int k = 0; k < BLOCK_SIZE; ++k)
        {
            tmp += tile_a[threadIdx.y][k] * tile_b[k][threadIdx.x];
        }
        __syncthreads();
    }
    if(row < n && col < n)
    {
        d_result[row * n + col] = tmp;
    }
}


/*
*********************************************************************
funcion: cpu_matrix_mult
descripcion: producto de dos matrices (no necesariamente cuadradas) en CPU.
parametros:
		- h_a,h_b,h_result: punteros a las matrices host con las que operar en CPU
		- m: numero de filas de A
		- n: numero de columnas de A
		- k: numero de columnas de B
*********************************************************************
*/
void cpu_matrix_mult(float *h_a, float *h_b, float *h_result, int m, int n, int k) {

/*
*********************************************************************
Version IKJ (secuencial optimizada)
*********************************************************************
*/
 float r=0.0;
 int i;
 int j;
 int h;
    for (i=0; i< m; i++)
      for (j=0; j< k; j++)
        h_result[i*k+j] = 0;

    for (i=0; i<m; i++)
      for (h=0; h<n; h++) {
        r = h_a[i*n+h];
        for (j=0; j<k; j++)
	  h_result[i*k+j]+= r * h_b[h*k+j];
	}

/*
*********************************************************************
Version IJK (secuencial original)
*********************************************************************
*/
    for (int i = 0; i < m; ++i)
    {
        for (int j = 0; j < k; ++j)
        {
            float tmp = 0.0;
            for (int h = 0; h < n; ++h)
            {
                tmp += h_a[i * n + h] * h_b[h * k + j];
            }
            h_result[i * k + j] = tmp;
        }
    }
}

int main(int argc, char const *argv[])
{
  int m, n, k;
  if(argc < 4 || argc > 4){
    fprintf(stderr,"Uso: filas matriz A, columnas matriz A, columnas matriz B\n");
    exit(-1);
  }
  // Recogemos los parámetros de ejecución relativos al tamaño de las matrices
  m = atoi(argv[1]);
  n = atoi(argv[2]);
  k = atoi(argv[3]);

  // Reservamos memoria para almacenar las matrices en host y su posterior multiplicación en CPU
  float *h_a, *h_b, *h_c, *h_cc;
  h_a=(float*)malloc(sizeof(float)*m*n);
  h_b=(float*)malloc(sizeof(float)*n*k);
  h_c=(float*)malloc(sizeof(float)*m*k);
  h_cc=(float*)malloc(sizeof(float)*m*k);

  // Inicializamos las matrices con valores decimales aleatorios
  inicializarMatrizRandom (h_a, m, n);
  inicializarMatrizRandom (h_b, n, k);


  // Creamos cudaEvents para medir los tiempos de ejeución en CPU y GPU.
  float gpu_elapsed_time_ms, cpu_elapsed_time_ms;
  hipEvent_t start, stop;
  hipEventCreate(&start);
  hipEventCreate(&stop);

  hipEventRecord(start, 0);

  // Reservamos memoria para almacenar las matrices en device y su posterior multiplicación en GPU
  float *d_a, *d_b, *d_c;
  hipMalloc((void **) &d_a, sizeof(float)*m*n);
  hipMalloc((void **) &d_b, sizeof(float)*n*k);
  hipMalloc((void **) &d_c, sizeof(float)*m*k);


  hipMemcpy(d_a, h_a, sizeof(float)*m*n, hipMemcpyHostToDevice);
  hipMemcpy(d_b, h_b, sizeof(float)*n*k, hipMemcpyHostToDevice);

  // Establecemos las dimensiones del Grid (Rejilla) y el Bloque
  unsigned int grid_rows = (m + BLOCK_SIZE - 1) / BLOCK_SIZE;
  unsigned int grid_cols = (k + BLOCK_SIZE - 1) / BLOCK_SIZE;
  dim3 dimGrid(grid_cols, grid_rows);
  dim3 dimBlock(BLOCK_SIZE, BLOCK_SIZE);

  // If y else para elegir entre ejecución sin caches o con caches (memoria sin compartir o compartida)
  if(m == n && n == k){
      gpu_square_matrix_mult<<<dimGrid, dimBlock>>>(d_a, d_b, d_c, n);
  }
  else{
      gpu_matrix_mult<<<dimGrid, dimBlock>>>(d_a, d_b, d_c, m, n, k);
  }

  hipMemcpy(h_c, d_c, sizeof(float)*m*k, hipMemcpyDeviceToHost);
  hipDeviceSynchronize();

  hipEventRecord(stop, 0);
  hipEventSynchronize(stop);

  // Medimos el tiempo empleado en ejecutar la multiplicación en GPU
  hipEventElapsedTime(&gpu_elapsed_time_ms, start, stop);
  printf("Tiempo empleado en la Mult de Matrices %dx%d . %dx%d en GPU: %fs.\n\n", m, n, n, k, gpu_elapsed_time_ms/1000);


  hipEventRecord(start, 0);
  cpu_matrix_mult(h_a, h_b, h_cc, m, n, k);

  hipEventRecord(stop, 0);
  hipEventSynchronize(stop);

  // Medimos el tiempo empleado en ejecutar la multiplicación en CPU
  hipEventElapsedTime(&cpu_elapsed_time_ms, start, stop);
  printf("Tiempo empleado en la Mult de Matrices %dx%d . %dx%d en CPU: %fs.\n\n", m, n, n, k, cpu_elapsed_time_ms/1000);

  // Comprobamos que los resultados de la multiplicación son correctos
  int all_ok = 1;
  for (int i = 0; i < m; ++i){
      for (int j = 0; j < k; ++j){
         if(h_cc[i*k + j] != h_c[i*k + j])
            {
              all_ok = 0;
            }
        }
    }

  // Calculamos el speedup empleado respecto a la CPU
  if(all_ok){
      printf("CORRECTO!, Speedup = %f\n", cpu_elapsed_time_ms / gpu_elapsed_time_ms);
  }
  else{
      printf("INCORRECTO\n");
  }


  // Liberamos la memoria reservada anteriormente
  hipFree(d_a);
  hipFree(d_b);
  hipFree(d_c);
  hipHostFree(h_a);
  hipHostFree(h_b);
  hipHostFree(h_c);
  hipHostFree(h_cc);

  return 0;
}

	.text
	.file	"matmulCUDA.hip"
	.globl	_Z23inicializarMatrizRandomPfii # -- Begin function _Z23inicializarMatrizRandomPfii
	.type	_Z23inicializarMatrizRandomPfii,@function
_Z23inicializarMatrizRandomPfii:        # @_Z23inicializarMatrizRandomPfii
	.cfi_startproc
# %bb.0:
	imull	%edx, %esi
	testl	%esi, %esi
	jle	.LBB0_4
# %bb.1:                                # %.lr.ph.preheader
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdi, %rbx
	movl	%esi, %r14d
	xorl	%r15d, %r15d
.LBB0_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	cltq
	imulq	$1717986919, %rax, %rcx         # imm = 0x66666667
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$34, %rcx
	addl	%edx, %ecx
	addl	%ecx, %ecx
	leal	(%rcx,%rcx,4), %ecx
	subl	%ecx, %eax
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	movss	%xmm0, (%rbx,%r15,4)
	incq	%r15
	cmpq	%r15, %r14
	jne	.LBB0_2
# %bb.3:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r14
	.cfi_restore %r15
.LBB0_4:                                # %._crit_edge
	retq
.Lfunc_end0:
	.size	_Z23inicializarMatrizRandomPfii, .Lfunc_end0-_Z23inicializarMatrizRandomPfii
	.cfi_endproc
                                        # -- End function
	.globl	_Z30__device_stub__gpu_matrix_multPfS_S_iii # -- Begin function _Z30__device_stub__gpu_matrix_multPfS_S_iii
	.type	_Z30__device_stub__gpu_matrix_multPfS_S_iii,@function
_Z30__device_stub__gpu_matrix_multPfS_S_iii: # @_Z30__device_stub__gpu_matrix_multPfS_S_iii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	20(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	16(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z15gpu_matrix_multPfS_S_iii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z30__device_stub__gpu_matrix_multPfS_S_iii, .Lfunc_end1-_Z30__device_stub__gpu_matrix_multPfS_S_iii
	.cfi_endproc
                                        # -- End function
	.globl	_Z37__device_stub__gpu_square_matrix_multPfS_S_i # -- Begin function _Z37__device_stub__gpu_square_matrix_multPfS_S_i
	.type	_Z37__device_stub__gpu_square_matrix_multPfS_S_i,@function
_Z37__device_stub__gpu_square_matrix_multPfS_S_i: # @_Z37__device_stub__gpu_square_matrix_multPfS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z22gpu_square_matrix_multPfS_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z37__device_stub__gpu_square_matrix_multPfS_S_i, .Lfunc_end2-_Z37__device_stub__gpu_square_matrix_multPfS_S_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z15cpu_matrix_multPfS_S_iii    # -- Begin function _Z15cpu_matrix_multPfS_S_iii
	.type	_Z15cpu_matrix_multPfS_S_iii,@function
_Z15cpu_matrix_multPfS_S_iii:           # @_Z15cpu_matrix_multPfS_S_iii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdx, 8(%rsp)                   # 8-byte Spill
	movq	%rdi, 16(%rsp)                  # 8-byte Spill
	testl	%ecx, %ecx
	jle	.LBB3_23
# %bb.1:                                # %.preheader70.lr.ph
	movl	%r9d, %ebx
	movl	%r8d, %ebp
	movq	%rsi, %r15
	movl	%r9d, %r12d
	leaq	(,%r12,4), %rax
	movq	%rax, 32(%rsp)                  # 8-byte Spill
	movl	%ecx, 4(%rsp)                   # 4-byte Spill
	movl	%ecx, %r13d
	xorl	%r14d, %r14d
	movq	%r13, 24(%rsp)                  # 8-byte Spill
.LBB3_2:                                # %.preheader70
                                        # =>This Inner Loop Header: Depth=1
	testl	%ebx, %ebx
	jle	.LBB3_4
# %bb.3:                                # %.lr.ph
                                        #   in Loop: Header=BB3_2 Depth=1
	movl	%r14d, %eax
	movq	8(%rsp), %rcx                   # 8-byte Reload
	leaq	(%rcx,%rax,4), %rdi
	xorl	%esi, %esi
	movq	32(%rsp), %rdx                  # 8-byte Reload
	callq	memset@PLT
.LBB3_4:                                # %._crit_edge
                                        #   in Loop: Header=BB3_2 Depth=1
	addl	%ebx, %r14d
	decq	%r13
	jne	.LBB3_2
# %bb.5:                                # %.preheader69
	cmpl	$0, 4(%rsp)                     # 4-byte Folded Reload
	movq	24(%rsp), %r13                  # 8-byte Reload
	jle	.LBB3_23
# %bb.6:                                # %.preheader68.lr.ph
	movl	%ebp, %eax
	xorl	%ecx, %ecx
	xorl	%edx, %edx
	movq	16(%rsp), %r14                  # 8-byte Reload
.LBB3_7:                                # %.preheader68
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_9 Depth 2
                                        #       Child Loop BB3_11 Depth 3
	testl	%ebp, %ebp
	jle	.LBB3_13
# %bb.8:                                # %.lr.ph78
                                        #   in Loop: Header=BB3_7 Depth=1
	movl	%ecx, %esi
	movq	8(%rsp), %rdi                   # 8-byte Reload
	leaq	(%rdi,%rsi,4), %rsi
	movl	%edx, %edi
	imull	%ebp, %edi
	leaq	(%r14,%rdi,4), %rdi
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
.LBB3_9:                                #   Parent Loop BB3_7 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB3_11 Depth 3
	testl	%ebx, %ebx
	jle	.LBB3_12
# %bb.10:                               # %.lr.ph75
                                        #   in Loop: Header=BB3_9 Depth=2
	movl	%r8d, %r10d
	leaq	(%r15,%r10,4), %r10
	movss	(%rdi,%r9,4), %xmm0             # xmm0 = mem[0],zero,zero,zero
	xorl	%r11d, %r11d
.LBB3_11:                               #   Parent Loop BB3_7 Depth=1
                                        #     Parent Loop BB3_9 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movss	(%r10,%r11,4), %xmm1            # xmm1 = mem[0],zero,zero,zero
	mulss	%xmm0, %xmm1
	addss	(%rsi,%r11,4), %xmm1
	movss	%xmm1, (%rsi,%r11,4)
	incq	%r11
	cmpq	%r11, %r12
	jne	.LBB3_11
.LBB3_12:                               # %._crit_edge76
                                        #   in Loop: Header=BB3_9 Depth=2
	incq	%r9
	addl	%ebx, %r8d
	cmpq	%rax, %r9
	jne	.LBB3_9
.LBB3_13:                               # %._crit_edge79
                                        #   in Loop: Header=BB3_7 Depth=1
	incq	%rdx
	addl	%ebx, %ecx
	cmpq	%r13, %rdx
	jne	.LBB3_7
# %bb.14:                               # %.preheader67
	cmpl	$0, 4(%rsp)                     # 4-byte Folded Reload
	jle	.LBB3_23
# %bb.15:                               # %.preheader66.lr.ph
	movslq	%ebx, %rcx
	leaq	(,%rcx,4), %rdx
	xorl	%esi, %esi
	xorl	%edi, %edi
.LBB3_16:                               # %.preheader66
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_18 Depth 2
                                        #       Child Loop BB3_20 Depth 3
	testl	%ebx, %ebx
	jle	.LBB3_22
# %bb.17:                               # %.preheader.lr.ph
                                        #   in Loop: Header=BB3_16 Depth=1
	movl	%esi, %r8d
	movq	16(%rsp), %r9                   # 8-byte Reload
	leaq	(%r9,%r8,4), %r8
	movq	%rdi, %r9
	imulq	%rcx, %r9
	movq	8(%rsp), %r10                   # 8-byte Reload
	leaq	(%r10,%r9,4), %r9
	movq	%r15, %r10
	xorl	%r11d, %r11d
.LBB3_18:                               # %.preheader
                                        #   Parent Loop BB3_16 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB3_20 Depth 3
	xorps	%xmm0, %xmm0
	testl	%ebp, %ebp
	jle	.LBB3_21
# %bb.19:                               # %.lr.ph83.preheader
                                        #   in Loop: Header=BB3_18 Depth=2
	movq	%r10, %r14
	xorl	%r13d, %r13d
.LBB3_20:                               # %.lr.ph83
                                        #   Parent Loop BB3_16 Depth=1
                                        #     Parent Loop BB3_18 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movss	(%r8,%r13,4), %xmm1             # xmm1 = mem[0],zero,zero,zero
	mulss	(%r14), %xmm1
	addss	%xmm1, %xmm0
	incq	%r13
	addq	%rdx, %r14
	cmpq	%r13, %rax
	jne	.LBB3_20
.LBB3_21:                               # %._crit_edge84
                                        #   in Loop: Header=BB3_18 Depth=2
	movss	%xmm0, (%r9,%r11,4)
	incq	%r11
	addq	$4, %r10
	cmpq	%r12, %r11
	jne	.LBB3_18
.LBB3_22:                               # %._crit_edge86
                                        #   in Loop: Header=BB3_16 Depth=1
	incq	%rdi
	addl	%ebp, %esi
	cmpq	24(%rsp), %rdi                  # 8-byte Folded Reload
	jne	.LBB3_16
.LBB3_23:                               # %._crit_edge88
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z15cpu_matrix_multPfS_S_iii, .Lfunc_end3-_Z15cpu_matrix_multPfS_S_iii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI4_0:
	.long	0x447a0000                      # float 1000
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$120, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	cmpl	$4, %edi
	jne	.LBB4_23
# %bb.1:
	movq	%rsi, %rbx
	movq	8(%rsi), %rdi
	callq	atoi
	movl	%eax, %r15d
	movq	%r15, 88(%rsp)                  # 8-byte Spill
	movq	16(%rbx), %rdi
	callq	atoi
	movl	%eax, %r14d
	movq	24(%rbx), %rdi
	callq	atoi
	movl	%eax, %r13d
	movslq	%r15d, %r15
	shlq	$2, %r15
	movslq	%r14d, %rbp
	movq	%r15, %rdi
	imulq	%rbp, %rdi
	movq	%rdi, 96(%rsp)                  # 8-byte Spill
	callq	malloc
	movq	%rax, %rbx
	movslq	%r13d, %r12
	imulq	%r12, %rbp
	shlq	$2, %rbp
	movq	%rbp, 104(%rsp)                 # 8-byte Spill
	movq	%rbp, %rdi
	callq	malloc
	movq	%rax, 24(%rsp)                  # 8-byte Spill
	imulq	%r12, %r15
	movq	%r15, %rdi
	callq	malloc
	movq	%rax, 72(%rsp)                  # 8-byte Spill
	movq	%r15, 80(%rsp)                  # 8-byte Spill
	movq	%r15, %rdi
	callq	malloc
	movq	%rax, 112(%rsp)                 # 8-byte Spill
	movl	%r14d, 8(%rsp)                  # 4-byte Spill
	imull	88(%rsp), %r14d                 # 4-byte Folded Reload
	testl	%r14d, %r14d
	jle	.LBB4_4
# %bb.2:                                # %.lr.ph.preheader.i
	movl	%r14d, %r12d
	xorl	%ebp, %ebp
.LBB4_3:                                # %.lr.ph.i
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	cltq
	imulq	$1717986919, %rax, %rcx         # imm = 0x66666667
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$34, %rcx
	addl	%edx, %ecx
	addl	%ecx, %ecx
	leal	(%rcx,%rcx,4), %ecx
	subl	%ecx, %eax
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	movss	%xmm0, (%rbx,%rbp,4)
	incq	%rbp
	cmpq	%rbp, %r12
	jne	.LBB4_3
.LBB4_4:                                # %_Z23inicializarMatrizRandomPfii.exit
	movq	%rbx, 32(%rsp)                  # 8-byte Spill
	movl	%r13d, %eax
	imull	8(%rsp), %eax                   # 4-byte Folded Reload
	testl	%eax, %eax
	movq	24(%rsp), %r14                  # 8-byte Reload
	jle	.LBB4_7
# %bb.5:                                # %.lr.ph.preheader.i100
	movl	%eax, %r12d
	xorl	%ebp, %ebp
.LBB4_6:                                # %.lr.ph.i102
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	cltq
	imulq	$1717986919, %rax, %rcx         # imm = 0x66666667
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$34, %rcx
	addl	%edx, %ecx
	addl	%ecx, %ecx
	leal	(%rcx,%rcx,4), %ecx
	subl	%ecx, %eax
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	movss	%xmm0, (%r14,%rbp,4)
	incq	%rbp
	cmpq	%rbp, %r12
	jne	.LBB4_6
.LBB4_7:                                # %_Z23inicializarMatrizRandomPfii.exit106
	leaq	56(%rsp), %r12
	movq	%r12, %rdi
	callq	hipEventCreate
	movq	%rsp, %rdi
	callq	hipEventCreate
	movq	(%r12), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	leaq	48(%rsp), %r12
	movq	%r12, %rdi
	movq	96(%rsp), %rbp                  # 8-byte Reload
	movq	%rbp, %rsi
	callq	hipMalloc
	leaq	40(%rsp), %rbx
	movq	%rbx, %rdi
	movq	104(%rsp), %r15                 # 8-byte Reload
	movq	%r15, %rsi
	callq	hipMalloc
	leaq	16(%rsp), %rdi
	movq	80(%rsp), %rsi                  # 8-byte Reload
	callq	hipMalloc
	movq	(%r12), %rdi
	movq	32(%rsp), %rsi                  # 8-byte Reload
	movq	%rbp, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%rbx), %rdi
	movq	%r14, %rsi
	movq	%r15, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	88(%rsp), %r14                  # 8-byte Reload
	leal	15(%r14), %eax
	leal	30(%r14), %edi
	testl	%eax, %eax
	cmovnsl	%eax, %edi
	sarl	$4, %edi
	leal	15(%r13), %eax
	leal	30(%r13), %ecx
	testl	%eax, %eax
	cmovnsl	%eax, %ecx
	sarl	$4, %ecx
	shlq	$32, %rdi
	orq	%rcx, %rdi
	movabsq	$68719476752, %rdx              # imm = 0x1000000010
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	movl	8(%rsp), %ebx                   # 4-byte Reload
	cmpl	%ebx, %r14d
	jne	.LBB4_11
# %bb.8:                                # %_Z23inicializarMatrizRandomPfii.exit106
	cmpl	%r13d, %ebx
	jne	.LBB4_11
# %bb.9:
	testl	%eax, %eax
	movq	72(%rsp), %rbp                  # 8-byte Reload
	jne	.LBB4_13
# %bb.10:
	movq	48(%rsp), %rdi
	movq	40(%rsp), %rsi
	movq	16(%rsp), %rdx
	movl	%r14d, %ecx
	callq	_Z37__device_stub__gpu_square_matrix_multPfS_S_i
	jmp	.LBB4_13
.LBB4_11:
	testl	%eax, %eax
	movq	72(%rsp), %rbp                  # 8-byte Reload
	jne	.LBB4_13
# %bb.12:
	movq	48(%rsp), %rdi
	movq	40(%rsp), %rsi
	movq	16(%rsp), %rdx
	movl	%r14d, %ecx
	movl	%ebx, %r8d
	movl	%r13d, %r9d
	callq	_Z30__device_stub__gpu_matrix_multPfS_S_iii
.LBB4_13:
	movq	16(%rsp), %rsi
	movq	%rbp, %rdi
	movq	80(%rsp), %rdx                  # 8-byte Reload
	movl	$2, %ecx
	callq	hipMemcpy
	callq	hipDeviceSynchronize
	movq	(%rsp), %rdi
	xorl	%r12d, %r12d
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	(%rsp), %rdi
	callq	hipEventSynchronize
	movq	56(%rsp), %rsi
	movq	(%rsp), %rdx
	leaq	68(%rsp), %r15
	movq	%r15, %rdi
	callq	hipEventElapsedTime
	movss	(%r15), %xmm0                   # xmm0 = mem[0],zero,zero,zero
	divss	.LCPI4_0(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	movl	$.L.str.1, %edi
	movl	%r14d, %esi
	movl	%ebx, %edx
	movl	%ebx, %ecx
	movl	%r13d, %r8d
	movb	$1, %al
	callq	printf
	movq	56(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	32(%rsp), %rdi                  # 8-byte Reload
	movq	24(%rsp), %rsi                  # 8-byte Reload
	movq	112(%rsp), %r15                 # 8-byte Reload
	movq	%r15, %rdx
	movl	%r14d, %ecx
	movl	%ebx, %r8d
	movl	%r13d, %r9d
	callq	_Z15cpu_matrix_multPfS_S_iii
	movq	(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	(%rsp), %rdi
	callq	hipEventSynchronize
	movq	56(%rsp), %rsi
	movq	(%rsp), %rdx
	leaq	12(%rsp), %rdi
	callq	hipEventElapsedTime
	leaq	12(%rsp), %rax
	movss	(%rax), %xmm0                   # xmm0 = mem[0],zero,zero,zero
	divss	.LCPI4_0(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	movl	$.L.str.2, %edi
	movl	%r14d, %esi
	movl	%ebx, %edx
	movl	%ebx, %ecx
	movl	%r13d, %r8d
	movb	$1, %al
	callq	printf
	testl	%r14d, %r14d
	jle	.LBB4_20
# %bb.14:                               # %.preheader.lr.ph
	movl	%r14d, %eax
	movl	%r13d, %ecx
	movl	$1, %edx
	xorl	%esi, %esi
	xorl	%edi, %edi
.LBB4_15:                               # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB4_17 Depth 2
	testl	%r13d, %r13d
	jle	.LBB4_18
# %bb.16:                               # %.lr.ph
                                        #   in Loop: Header=BB4_15 Depth=1
	movl	%esi, %r9d
	leaq	(,%r9,4), %r8
	addq	%rbp, %r8
	leaq	(%r15,%r9,4), %r9
	xorl	%r10d, %r10d
.LBB4_17:                               #   Parent Loop BB4_15 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movss	(%r9,%r10,4), %xmm0             # xmm0 = mem[0],zero,zero,zero
	ucomiss	(%r8,%r10,4), %xmm0
	cmovnel	%r12d, %edx
	cmovpl	%r12d, %edx
	incq	%r10
	cmpq	%r10, %rcx
	jne	.LBB4_17
.LBB4_18:                               # %._crit_edge
                                        #   in Loop: Header=BB4_15 Depth=1
	incq	%rdi
	addl	%r13d, %esi
	cmpq	%rax, %rdi
	jne	.LBB4_15
# %bb.19:                               # %._crit_edge117
	testl	%edx, %edx
	je	.LBB4_21
.LBB4_20:                               # %._crit_edge117.thread
	movss	12(%rsp), %xmm0                 # xmm0 = mem[0],zero,zero,zero
	divss	68(%rsp), %xmm0
	cvtss2sd	%xmm0, %xmm0
	movl	$.L.str.3, %edi
	movb	$1, %al
	callq	printf
	jmp	.LBB4_22
.LBB4_21:
	movl	$.Lstr, %edi
	callq	puts@PLT
.LBB4_22:
	movq	48(%rsp), %rdi
	callq	hipFree
	movq	40(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	32(%rsp), %rdi                  # 8-byte Reload
	callq	hipHostFree
	movq	24(%rsp), %rdi                  # 8-byte Reload
	callq	hipHostFree
	movq	%rbp, %rdi
	callq	hipHostFree
	movq	%r15, %rdi
	callq	hipHostFree
	xorl	%eax, %eax
	addq	$120, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB4_23:
	.cfi_def_cfa_offset 176
	movq	stderr(%rip), %rcx
	movl	$.L.str, %edi
	movl	$58, %esi
	movl	$1, %edx
	callq	fwrite@PLT
	movl	$-1, %edi
	callq	exit
.Lfunc_end4:
	.size	main, .Lfunc_end4-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB5_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB5_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z15gpu_matrix_multPfS_S_iii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z22gpu_square_matrix_multPfS_S_i, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end5:
	.size	__hip_module_ctor, .Lfunc_end5-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB6_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB6_2:
	retq
.Lfunc_end6:
	.size	__hip_module_dtor, .Lfunc_end6-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z15gpu_matrix_multPfS_S_iii,@object # @_Z15gpu_matrix_multPfS_S_iii
	.section	.rodata,"a",@progbits
	.globl	_Z15gpu_matrix_multPfS_S_iii
	.p2align	3, 0x0
_Z15gpu_matrix_multPfS_S_iii:
	.quad	_Z30__device_stub__gpu_matrix_multPfS_S_iii
	.size	_Z15gpu_matrix_multPfS_S_iii, 8

	.type	_Z22gpu_square_matrix_multPfS_S_i,@object # @_Z22gpu_square_matrix_multPfS_S_i
	.globl	_Z22gpu_square_matrix_multPfS_S_i
	.p2align	3, 0x0
_Z22gpu_square_matrix_multPfS_S_i:
	.quad	_Z37__device_stub__gpu_square_matrix_multPfS_S_i
	.size	_Z22gpu_square_matrix_multPfS_S_i, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Uso: filas matriz A, columnas matriz A, columnas matriz B\n"
	.size	.L.str, 59

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"Tiempo empleado en la Mult de Matrices %dx%d . %dx%d en GPU: %fs.\n\n"
	.size	.L.str.1, 68

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Tiempo empleado en la Mult de Matrices %dx%d . %dx%d en CPU: %fs.\n\n"
	.size	.L.str.2, 68

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"CORRECTO!, Speedup = %f\n"
	.size	.L.str.3, 25

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z15gpu_matrix_multPfS_S_iii"
	.size	.L__unnamed_1, 29

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z22gpu_square_matrix_multPfS_S_i"
	.size	.L__unnamed_2, 34

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"INCORRECTO"
	.size	.Lstr, 11

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z30__device_stub__gpu_matrix_multPfS_S_iii
	.addrsig_sym _Z37__device_stub__gpu_square_matrix_multPfS_S_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z15gpu_matrix_multPfS_S_iii
	.addrsig_sym _Z22gpu_square_matrix_multPfS_S_i
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z15gpu_matrix_multPfS_S_iii ; -- Begin function _Z15gpu_matrix_multPfS_S_iii
	.globl	_Z15gpu_matrix_multPfS_S_iii
	.p2align	8
	.type	_Z15gpu_matrix_multPfS_S_iii,@function
_Z15gpu_matrix_multPfS_S_iii:           ; @_Z15gpu_matrix_multPfS_S_iii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x34
	s_load_b128 s[4:7], s[0:1], 0x18
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[0:1], null, s14, s2, v[2:3]
	v_mad_u64_u32 v[1:2], null, s15, s3, v[3:4]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e32 vcc_lo, s6, v0
	v_cmp_gt_i32_e64 s2, s4, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, vcc_lo
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_6
; %bb.1:                                ; %.preheader
	s_clause 0x1
	s_load_b128 s[8:11], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	s_cmp_lt_i32 s5, 1
	s_cbranch_scc1 .LBB0_4
; %bb.2:                                ; %.lr.ph
	v_mul_lo_u32 v2, v1, s5
	v_mov_b32_e32 v6, 0
	v_mov_b32_e32 v4, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s8, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s9, v3, vcc_lo
.LBB0_3:                                ; =>This Inner Loop Header: Depth=1
	v_ashrrev_i32_e32 v5, 31, v4
	s_add_i32 s5, s5, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_cmp_eq_u32 s5, 0
	v_lshlrev_b64 v[7:8], 2, v[4:5]
	v_add_nc_u32_e32 v4, s6, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v7, vcc_lo, s10, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s11, v8, vcc_lo
	global_load_b32 v5, v[2:3], off
	global_load_b32 v7, v[7:8], off
	v_add_co_u32 v2, vcc_lo, v2, 4
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v6, v5, v7
	s_cbranch_scc0 .LBB0_3
	s_branch .LBB0_5
.LBB0_4:
	v_mov_b32_e32 v6, 0
.LBB0_5:                                ; %Flow54
	v_mad_u64_u32 v[2:3], null, v1, s6, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[0:1], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v6, off
.LBB0_6:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z15gpu_matrix_multPfS_S_iii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z15gpu_matrix_multPfS_S_iii, .Lfunc_end0-_Z15gpu_matrix_multPfS_S_iii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 340
; NumSgprs: 18
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z22gpu_square_matrix_multPfS_S_i ; -- Begin function _Z22gpu_square_matrix_multPfS_S_i
	.globl	_Z22gpu_square_matrix_multPfS_S_i
	.p2align	8
	.type	_Z22gpu_square_matrix_multPfS_S_i,@function
_Z22gpu_square_matrix_multPfS_S_i:      ; @_Z22gpu_square_matrix_multPfS_S_i
; %bb.0:
	s_clause 0x3
	s_load_b32 s3, s[0:1], 0x20
	s_load_b32 s2, s[0:1], 0x18
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	v_bfe_u32 v6, v0, 10, 10
	v_and_b32_e32 v3, 0x3ff, v0
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshl_add_u32 v4, s15, 4, v6
	v_lshl_add_u32 v0, s14, 4, v3
	s_waitcnt lgkmcnt(0)
	s_cmp_eq_u32 s3, 0
	s_cbranch_scc1 .LBB1_9
; %bb.1:                                ; %.lr.ph
	v_lshlrev_b32_e32 v5, 2, v3
	v_lshlrev_b32_e32 v7, 6, v6
	v_mad_u64_u32 v[1:2], null, v4, s2, v[3:4]
	s_mul_i32 s9, s2, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v8, 0x400, v5
	v_add_nc_u32_e32 v9, v7, v5
	s_delay_alu instid0(VALU_DEP_2)
	v_dual_mov_b32 v5, 0 :: v_dual_add_nc_u32 v10, v8, v7
.LBB1_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB1_7 Depth 2
	s_lshl_b32 s10, s8, 4
	s_mov_b32 s11, exec_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v11, 0 :: v_dual_add_nc_u32 v2, s10, v1
	v_cmpx_gt_i32_e64 s9, v2
	s_cbranch_execz .LBB1_4
; %bb.3:                                ;   in Loop: Header=BB1_2 Depth=1
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	v_add_co_u32 v2, vcc_lo, s4, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	global_load_b32 v11, v[2:3], off
.LBB1_4:                                ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s11
	v_add_nc_u32_e32 v12, s10, v6
	s_mov_b32 s10, exec_lo
	s_waitcnt vmcnt(0)
	ds_store_b32 v9, v11
	v_mad_u64_u32 v[2:3], null, v12, s2, v[0:1]
	v_mov_b32_e32 v3, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_cmpx_gt_i32_e64 s9, v2
	s_cbranch_execz .LBB1_6
; %bb.5:                                ;   in Loop: Header=BB1_2 Depth=1
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	v_add_co_u32 v2, vcc_lo, s6, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v3, vcc_lo
	global_load_b32 v3, v[2:3], off
.LBB1_6:                                ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s10
	v_mov_b32_e32 v2, v8
	s_mov_b32 s10, 0
	s_waitcnt vmcnt(0)
	ds_store_b32 v10, v3
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB1_7:                                ;   Parent Loop BB1_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_add_nc_u32_e32 v3, s10, v7
	s_add_i32 s10, s10, 4
	ds_load_b32 v11, v2
	ds_load_b32 v3, v3
	v_add_nc_u32_e32 v2, 64, v2
	s_cmp_eq_u32 s10, 64
	s_waitcnt lgkmcnt(0)
	v_fmac_f32_e32 v5, v3, v11
	s_cbranch_scc0 .LBB1_7
; %bb.8:                                ;   in Loop: Header=BB1_2 Depth=1
	s_add_i32 s8, s8, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s8, s3
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB1_2
	s_branch .LBB1_10
.LBB1_9:
	v_mov_b32_e32 v5, 0
.LBB1_10:                               ; %Flow63
	v_max_i32_e32 v1, v4, v0
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s2, v1
	s_cbranch_execz .LBB1_12
; %bb.11:
	v_mad_u64_u32 v[1:2], null, v4, s2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v2, 31, v1
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v5, off
.LBB1_12:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z22gpu_square_matrix_multPfS_S_i
		.amdhsa_group_segment_fixed_size 2048
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 13
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z22gpu_square_matrix_multPfS_S_i, .Lfunc_end1-_Z22gpu_square_matrix_multPfS_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 504
; NumSgprs: 18
; NumVgprs: 13
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 2048 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 13
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         44
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         52
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         54
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         56
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         58
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         60
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         62
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         104
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 296
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z15gpu_matrix_multPfS_S_iii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z15gpu_matrix_multPfS_S_iii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     9
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 2048
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z22gpu_square_matrix_multPfS_S_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z22gpu_square_matrix_multPfS_S_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     13
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
