#define BLOCK_DIM	4
#define TILE_DIM	BLOCK_DIM

#include <stdio.h>
#include <stdlib.h>
#include<time.h>

void Print_Matrix( int* mtxArray , int n, int m );
void PrintMatrixToText(int* mtxArray, int height, int width, const char* fileName);

// Matrix Mult Kernel
__global__ void matrixMult(int* A, int* B, int* C, int ARows, int ACols, int BRows, int BCols, int CRows, int CCols) {
	
	__shared__ int As[TILE_DIM][TILE_DIM];
    __shared__ int Bs[TILE_DIM][TILE_DIM];
    
    int bx = blockIdx.x;  int by = blockIdx.y;
	int tx = threadIdx.x; int ty = threadIdx.y;

	int Row = by * blockDim.y + ty;
	int Col = bx * blockDim.x + tx;
	
	int CValue = 0;
	int NUM_PHASE = (int)ceil((float)(ACols + BLOCK_DIM - 1) / (float)BLOCK_DIM);

    for (int k = 0; k < NUM_PHASE; ++k) {
			
        if (k*TILE_DIM + tx < ACols && Row < ARows)	
			As[ty][tx] = A[Row*ACols + k*TILE_DIM + tx];
			
		else													
			As[ty][tx] = 0;

		if (k*TILE_DIM + ty < BRows && Col < BCols)	
			Bs[ty][tx] = B[(k*TILE_DIM + ty)*BCols + Col];
			
		else													
			Bs[ty][tx] = 0;
         
		__syncthreads();

			for (int i = 0; i < TILE_DIM; ++i) 
				CValue += As[ty][i] * Bs[i][tx];
				
		__syncthreads();
    }
    
    if (Row < CRows && Col < CCols) 
		C[(Row*CCols)+Col] = CValue;
		
}

int main(){
	int *h_a, *h_b, *h_c;	// Host Variables
	int *d_a, *d_b, *d_c;	// Device Variables
	int n,m,k;
	
	// Receive Parameters
	/*Todo:Write Receive Parameters through console commands*/
	printf("n = ");
	scanf("%d", &n);
	printf("m = ");
	scanf("%d", &m);
	printf("k = ");
	scanf("%d", &k);
	printf("\n");
	
	// Alloc & Initialize Host Input Matrices	
	int sizeA = (n) * (m) * sizeof(int);
	int sizeB = (m) * (k) * sizeof(int);
	int sizeC = (n) * (k) * sizeof(int);
	h_a = (int*)malloc( sizeA );
	h_b = (int*)malloc( sizeB );
	h_c = (int*)malloc( sizeC );
	
	/*Todo: Initialize A and B with Random Varialbles Ranged (-10, 10)*/
	srand(time(NULL));
		
	for ( int i=0 ; i<n ; i++ )
		for ( int j=0 ; j<m ; j++ )
			h_a[i*m+j] = rand() % 20 - 10;
		
	for ( int i=0 ; i<m ; i++ )
		for ( int j=0 ; j<k ; j++ )
			h_b[i*k+j] = rand() % 20 - 10;

	// Allocate Device Memory
	cudaMalloc((void **) &d_a, sizeA);
	cudaMalloc((void **) &d_b, sizeB);
	cudaMalloc((void **) &d_c, sizeC);

	// Copy Input Matrices to Device Memory
	cudaMemcpy(d_a, h_a, sizeA, cudaMemcpyHostToDevice);
	cudaMemcpy(d_b, h_b, sizeB, cudaMemcpyHostToDevice);

	
	// Set Grid/Block Dimensions
	dim3 dimGrid((int)ceil((float)(BLOCK_DIM+n-1)/(float)BLOCK_DIM), (int)ceil((float)(BLOCK_DIM+k-1)/(float)BLOCK_DIM));
	dim3 dimBlock(BLOCK_DIM,BLOCK_DIM);

	// Launch Kernel
	matrixMult<<<dimGrid ,dimBlock >>>(d_a , d_b , d_c , n, m, m, k, n, k);

	// Copy Result to Host
	cudaMemcpy( h_c, d_c, sizeC, cudaMemcpyDeviceToHost );
	
	// Free Device Memory
	cudaFree(d_a); cudaFree(d_b); cudaFree(d_c);
	
	// Print Results
	printf("[Input matrix A]\n");	Print_Matrix( h_a , n, m );
	printf("[Input matrix B]\n");	Print_Matrix( h_b , m, k );
	
	printf("[GPU Result]\n");	Print_Matrix( h_c , n, k );
	
	// Print Results
	PrintMatrixToText(h_a,n,m,"matrixA.txt");
	PrintMatrixToText(h_b,m,k,"matrixB.txt");
	PrintMatrixToText(h_c,n,k,"matrixC.txt");
	
	// Free Host Memory
	free(h_a); free(h_b); free(h_c);
	
	return 0;
}

// Utilities
void Print_Matrix( int* mtxArray , int n, int m )
{
	for ( int i=0 ; i<n ; i++ )
	{
		for ( int j=0 ; j<m ; j++ )
		{
			printf( "%d " , mtxArray[i*m+j] );
		}
		printf( "\n" );
	}	
	printf( "\n" );
}

void PrintMatrixToText(int* mtxArray, int height, int width, const char* fileName){
	FILE *f = fopen(fileName, "w");
	for ( int i=0 ; i<height ; i++ )
	{
		for ( int j=0 ; j<width ; j++ )
		{
			fprintf(f, "%d\t" , mtxArray[i*width+j] );
		}
		fprintf(f,"\n" );
	}	
	
	fclose(f);
}


	.file	"tmpxft_00225d23_00000000-6_Assignment4.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2032:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2032:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"%d "
.LC1:
	.string	"\n"
	.text
	.globl	_Z12Print_MatrixPiii
	.type	_Z12Print_MatrixPiii, @function
_Z12Print_MatrixPiii:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movl	%esi, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	xorl	%r13d, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	xorl	%r12d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rdi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%edx, %ebx
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
.L3:
	cmpl	%r14d, %r13d
	jge	.L5
	movslq	%r12d, %rax
	xorl	%r15d, %r15d
	leaq	0(%rbp,%rax,4), %r8
.L6:
	cmpl	%r15d, %ebx
	jle	.L9
	movl	(%r8,%r15,4), %edx
	leaq	.LC0(%rip), %rsi
	xorl	%eax, %eax
	incq	%r15
	movl	$2, %edi
	movq	%r8, 8(%rsp)
	call	__printf_chk@PLT
	movq	8(%rsp), %r8
	jmp	.L6
.L9:
	leaq	.LC1(%rip), %rsi
	xorl	%eax, %eax
	incl	%r13d
	addl	%ebx, %r12d
	movl	$2, %edi
	call	__printf_chk@PLT
	jmp	.L3
.L5:
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	leaq	.LC1(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	__printf_chk@PLT
	.cfi_endproc
.LFE2028:
	.size	_Z12Print_MatrixPiii, .-_Z12Print_MatrixPiii
	.section	.rodata.str1.1
.LC2:
	.string	"w"
.LC3:
	.string	"%d\t"
	.text
	.globl	_Z17PrintMatrixToTextPiiiPKc
	.type	_Z17PrintMatrixToTextPiiiPKc, @function
_Z17PrintMatrixToTextPiiiPKc:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movl	%esi, %r14d
	leaq	.LC2(%rip), %rsi
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	xorl	%r13d, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	xorl	%r12d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rdi, %rbp
	movq	%rcx, %rdi
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%edx, %ebx
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	call	fopen@PLT
	movq	%rax, (%rsp)
.L11:
	cmpl	%r14d, %r13d
	jge	.L13
	movslq	%r12d, %rax
	xorl	%r15d, %r15d
	leaq	0(%rbp,%rax,4), %r9
.L14:
	cmpl	%r15d, %ebx
	jle	.L16
	movl	(%r9,%r15,4), %ecx
	movq	(%rsp), %rdi
	movl	$2, %esi
	xorl	%eax, %eax
	leaq	.LC3(%rip), %rdx
	movq	%r9, 8(%rsp)
	incq	%r15
	call	__fprintf_chk@PLT
	movq	8(%rsp), %r9
	jmp	.L14
.L16:
	movq	(%rsp), %rdi
	leaq	.LC1(%rip), %rdx
	xorl	%eax, %eax
	incl	%r13d
	movl	$2, %esi
	addl	%ebx, %r12d
	call	__fprintf_chk@PLT
	jmp	.L11
.L13:
	movq	(%rsp), %rdi
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	fclose@PLT
	.cfi_endproc
.LFE2029:
	.size	_Z17PrintMatrixToTextPiiiPKc, .-_Z17PrintMatrixToTextPiiiPKc
	.globl	_Z40__device_stub__Z10matrixMultPiS_S_iiiiiiPiS_S_iiiiii
	.type	_Z40__device_stub__Z10matrixMultPiS_S_iiiiiiPiS_S_iiiiii, @function
_Z40__device_stub__Z10matrixMultPiS_S_iiiiiiPiS_S_iiiiii:
.LFB2054:
	.cfi_startproc
	endbr64
	subq	$200, %rsp
	.cfi_def_cfa_offset 208
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	56(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movl	%r9d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 184(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	208(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	216(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	224(%rsp), %rax
	movq	%rax, 176(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L17
	pushq	56(%rsp)
	.cfi_def_cfa_offset 216
	leaq	_Z10matrixMultPiS_S_iiiiii(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 224
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 216
	popq	%rdx
	.cfi_def_cfa_offset 208
.L17:
	movq	184(%rsp), %rax
	subq	%fs:40, %rax
	je	.L19
	call	__stack_chk_fail@PLT
.L19:
	addq	$200, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2054:
	.size	_Z40__device_stub__Z10matrixMultPiS_S_iiiiiiPiS_S_iiiiii, .-_Z40__device_stub__Z10matrixMultPiS_S_iiiiiiPiS_S_iiiiii
	.globl	_Z10matrixMultPiS_S_iiiiii
	.type	_Z10matrixMultPiS_S_iiiiii, @function
_Z10matrixMultPiS_S_iiiiii:
.LFB2055:
	.cfi_startproc
	endbr64
	jmp	_Z40__device_stub__Z10matrixMultPiS_S_iiiiiiPiS_S_iiiiii
	.cfi_endproc
.LFE2055:
	.size	_Z10matrixMultPiS_S_iiiiii, .-_Z10matrixMultPiS_S_iiiiii
	.section	.rodata.str1.1
.LC4:
	.string	"n = "
.LC5:
	.string	"%d"
.LC6:
	.string	"m = "
.LC7:
	.string	"k = "
.LC9:
	.string	"[Input matrix A]\n"
.LC10:
	.string	"[Input matrix B]\n"
.LC11:
	.string	"[GPU Result]\n"
.LC12:
	.string	"matrixA.txt"
.LC13:
	.string	"matrixB.txt"
.LC14:
	.string	"matrixC.txt"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	leaq	.LC4(%rip), %rsi
	movl	$2, %edi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	leaq	.LC5(%rip), %rbx
	subq	$120, %rsp
	.cfi_def_cfa_offset 176
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	%rbx, %rdi
	leaq	44(%rsp), %rsi
	xorl	%eax, %eax
	call	__isoc23_scanf@PLT
	leaq	.LC6(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	%rbx, %rdi
	leaq	48(%rsp), %rsi
	xorl	%eax, %eax
	call	__isoc23_scanf@PLT
	leaq	.LC7(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	%rbx, %rdi
	leaq	52(%rsp), %rsi
	xorl	%eax, %eax
	call	__isoc23_scanf@PLT
	leaq	.LC1(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	44(%rsp), %ebx
	movl	48(%rsp), %ebp
	movl	52(%rsp), %r15d
	movl	%ebx, %r14d
	imull	%ebp, %r14d
	imull	%r15d, %ebp
	imull	%r15d, %ebx
	movl	$20, %r15d
	sall	$2, %r14d
	movslq	%r14d, %r14
	sall	$2, %ebp
	movq	%r14, %rdi
	sall	$2, %ebx
	call	malloc@PLT
	movq	%rax, %r13
	movslq	%ebp, %rax
	movq	%rax, %rdi
	movq	%rax, 16(%rsp)
	call	malloc@PLT
	movq	%rax, %r12
	movslq	%ebx, %rax
	xorl	%ebx, %ebx
	movq	%rax, %rdi
	movq	%rax, 24(%rsp)
	call	malloc@PLT
	xorl	%edi, %edi
	movq	%rax, 8(%rsp)
	call	time@PLT
	movl	%eax, %edi
	call	srand@PLT
.L23:
	cmpl	%ebx, 44(%rsp)
	jle	.L34
	xorl	%ebp, %ebp
.L25:
	cmpl	%ebp, 48(%rsp)
	jle	.L35
	call	rand@PLT
	movl	48(%rsp), %ecx
	cltd
	idivl	%r15d
	imull	%ebx, %ecx
	addl	%ebp, %ecx
	incl	%ebp
	movslq	%ecx, %rcx
	subl	$10, %edx
	movl	%edx, 0(%r13,%rcx,4)
	jmp	.L25
.L35:
	incl	%ebx
	jmp	.L23
.L34:
	xorl	%ebx, %ebx
	movl	$20, %r15d
.L26:
	cmpl	%ebx, 48(%rsp)
	jle	.L36
	xorl	%ebp, %ebp
.L28:
	cmpl	%ebp, 52(%rsp)
	jle	.L37
	call	rand@PLT
	movl	52(%rsp), %ecx
	cltd
	idivl	%r15d
	imull	%ebx, %ecx
	addl	%ebp, %ecx
	incl	%ebp
	movslq	%ecx, %rcx
	subl	$10, %edx
	movl	%edx, (%r12,%rcx,4)
	jmp	.L28
.L37:
	incl	%ebx
	jmp	.L26
.L36:
	leaq	56(%rsp), %rdi
	movq	%r14, %rsi
	call	cudaMalloc@PLT
	movq	16(%rsp), %rsi
	leaq	64(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	24(%rsp), %rsi
	leaq	72(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	56(%rsp), %rdi
	movq	%r14, %rdx
	movq	%r13, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rdx
	movq	64(%rsp), %rdi
	movq	%r12, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movl	52(%rsp), %eax
	addl	$3, %eax
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC8(%rip), %xmm0
	call	ceilf@PLT
	movl	44(%rsp), %eax
	movd	%xmm0, %ebp
	addl	$3, %eax
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC8(%rip), %xmm0
	call	ceilf@PLT
	movd	%ebp, %xmm1
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	cvttss2sil	%xmm0, %eax
	movl	$1, %ecx
	movl	$1, %esi
	movabsq	$17179869188, %rdx
	movl	%eax, 80(%rsp)
	cvttss2sil	%xmm1, %eax
	movl	%eax, 84(%rsp)
	movq	80(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L29
	movl	52(%rsp), %eax
	movl	44(%rsp), %ecx
	pushq	%rdx
	.cfi_def_cfa_offset 184
	pushq	%rax
	.cfi_def_cfa_offset 192
	pushq	%rcx
	.cfi_def_cfa_offset 200
	pushq	%rax
	.cfi_def_cfa_offset 208
	movl	80(%rsp), %r9d
	movq	104(%rsp), %rdx
	movq	96(%rsp), %rsi
	movq	88(%rsp), %rdi
	movl	%r9d, %r8d
	call	_Z40__device_stub__Z10matrixMultPiS_S_iiiiiiPiS_S_iiiiii
	addq	$32, %rsp
	.cfi_def_cfa_offset 176
.L29:
	movq	24(%rsp), %rdx
	movq	72(%rsp), %rsi
	movl	$2, %ecx
	movq	8(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	56(%rsp), %rdi
	call	cudaFree@PLT
	movq	64(%rsp), %rdi
	call	cudaFree@PLT
	movq	72(%rsp), %rdi
	call	cudaFree@PLT
	leaq	.LC9(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	48(%rsp), %edx
	movl	44(%rsp), %esi
	movq	%r13, %rdi
	call	_Z12Print_MatrixPiii
	leaq	.LC10(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	52(%rsp), %edx
	movl	48(%rsp), %esi
	movq	%r12, %rdi
	call	_Z12Print_MatrixPiii
	leaq	.LC11(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	52(%rsp), %edx
	movl	44(%rsp), %esi
	movq	8(%rsp), %rdi
	call	_Z12Print_MatrixPiii
	movl	48(%rsp), %edx
	movl	44(%rsp), %esi
	movq	%r13, %rdi
	leaq	.LC12(%rip), %rcx
	call	_Z17PrintMatrixToTextPiiiPKc
	movl	52(%rsp), %edx
	movl	48(%rsp), %esi
	movq	%r12, %rdi
	leaq	.LC13(%rip), %rcx
	call	_Z17PrintMatrixToTextPiiiPKc
	movl	52(%rsp), %edx
	movl	44(%rsp), %esi
	leaq	.LC14(%rip), %rcx
	movq	8(%rsp), %rdi
	call	_Z17PrintMatrixToTextPiiiPKc
	movq	%r13, %rdi
	call	free@PLT
	movq	%r12, %rdi
	call	free@PLT
	movq	8(%rsp), %rdi
	call	free@PLT
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L30
	call	__stack_chk_fail@PLT
.L30:
	addq	$120, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	main, .-main
	.section	.rodata.str1.1
.LC15:
	.string	"_Z10matrixMultPiS_S_iiiiii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2057:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC15(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z10matrixMultPiS_S_iiiiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2057:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC8:
	.long	1048576000
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#define BLOCK_DIM	4
#define TILE_DIM	BLOCK_DIM


#include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include<time.h>

void Print_Matrix( int* mtxArray , int n, int m );
void PrintMatrixToText(int* mtxArray, int height, int width, const char* fileName);

// Matrix Mult Kernel
__global__ void matrixMult(int* A, int* B, int* C, int ARows, int ACols, int BRows, int BCols, int CRows, int CCols) {
	
	__shared__ int As[TILE_DIM][TILE_DIM];
    __shared__ int Bs[TILE_DIM][TILE_DIM];
    
    int bx = blockIdx.x;  int by = blockIdx.y;
	int tx = threadIdx.x; int ty = threadIdx.y;

	int Row = by * blockDim.y + ty;
	int Col = bx * blockDim.x + tx;
	
	int CValue = 0;
	int NUM_PHASE = (int)ceil((float)(ACols + BLOCK_DIM - 1) / (float)BLOCK_DIM);

    for (int k = 0; k < NUM_PHASE; ++k) {
			
        if (k*TILE_DIM + tx < ACols && Row < ARows)	
			As[ty][tx] = A[Row*ACols + k*TILE_DIM + tx];
			
		else													
			As[ty][tx] = 0;

		if (k*TILE_DIM + ty < BRows && Col < BCols)	
			Bs[ty][tx] = B[(k*TILE_DIM + ty)*BCols + Col];
			
		else													
			Bs[ty][tx] = 0;
         
		__syncthreads();

			for (int i = 0; i < TILE_DIM; ++i) 
				CValue += As[ty][i] * Bs[i][tx];
				
		__syncthreads();
    }
    
    if (Row < CRows && Col < CCols) 
		C[(Row*CCols)+Col] = CValue;
		
}

int main(){
	int *h_a, *h_b, *h_c;	// Host Variables
	int *d_a, *d_b, *d_c;	// Device Variables
	int n,m,k;
	
	// Receive Parameters
	/*Todo:Write Receive Parameters through console commands*/
	printf("n = ");
	scanf("%d", &n);
	printf("m = ");
	scanf("%d", &m);
	printf("k = ");
	scanf("%d", &k);
	printf("\n");
	
	// Alloc & Initialize Host Input Matrices	
	int sizeA = (n) * (m) * sizeof(int);
	int sizeB = (m) * (k) * sizeof(int);
	int sizeC = (n) * (k) * sizeof(int);
	h_a = (int*)malloc( sizeA );
	h_b = (int*)malloc( sizeB );
	h_c = (int*)malloc( sizeC );
	
	/*Todo: Initialize A and B with Random Varialbles Ranged (-10, 10)*/
	srand(time(NULL));
		
	for ( int i=0 ; i<n ; i++ )
		for ( int j=0 ; j<m ; j++ )
			h_a[i*m+j] = rand() % 20 - 10;
		
	for ( int i=0 ; i<m ; i++ )
		for ( int j=0 ; j<k ; j++ )
			h_b[i*k+j] = rand() % 20 - 10;

	// Allocate Device Memory
	hipMalloc((void **) &d_a, sizeA);
	hipMalloc((void **) &d_b, sizeB);
	hipMalloc((void **) &d_c, sizeC);

	// Copy Input Matrices to Device Memory
	hipMemcpy(d_a, h_a, sizeA, hipMemcpyHostToDevice);
	hipMemcpy(d_b, h_b, sizeB, hipMemcpyHostToDevice);

	
	// Set Grid/Block Dimensions
	dim3 dimGrid((int)ceil((float)(BLOCK_DIM+n-1)/(float)BLOCK_DIM), (int)ceil((float)(BLOCK_DIM+k-1)/(float)BLOCK_DIM));
	dim3 dimBlock(BLOCK_DIM,BLOCK_DIM);

	// Launch Kernel
	matrixMult<<<dimGrid ,dimBlock >>>(d_a , d_b , d_c , n, m, m, k, n, k);

	// Copy Result to Host
	hipMemcpy( h_c, d_c, sizeC, hipMemcpyDeviceToHost );
	
	// Free Device Memory
	hipFree(d_a); hipFree(d_b); hipFree(d_c);
	
	// Print Results
	printf("[Input matrix A]\n");	Print_Matrix( h_a , n, m );
	printf("[Input matrix B]\n");	Print_Matrix( h_b , m, k );
	
	printf("[GPU Result]\n");	Print_Matrix( h_c , n, k );
	
	// Print Results
	PrintMatrixToText(h_a,n,m,"matrixA.txt");
	PrintMatrixToText(h_b,m,k,"matrixB.txt");
	PrintMatrixToText(h_c,n,k,"matrixC.txt");
	
	// Free Host Memory
	free(h_a); free(h_b); free(h_c);
	
	return 0;
}

// Utilities
void Print_Matrix( int* mtxArray , int n, int m )
{
	for ( int i=0 ; i<n ; i++ )
	{
		for ( int j=0 ; j<m ; j++ )
		{
			printf( "%d " , mtxArray[i*m+j] );
		}
		printf( "\n" );
	}	
	printf( "\n" );
}

void PrintMatrixToText(int* mtxArray, int height, int width, const char* fileName){
	FILE *f = fopen(fileName, "w");
	for ( int i=0 ; i<height ; i++ )
	{
		for ( int j=0 ; j<width ; j++ )
		{
			fprintf(f, "%d\t" , mtxArray[i*width+j] );
		}
		fprintf(f,"\n" );
	}	
	
	fclose(f);
}


	.text
	.file	"Assignment4.hip"
	.globl	_Z25__device_stub__matrixMultPiS_S_iiiiii # -- Begin function _Z25__device_stub__matrixMultPiS_S_iiiiii
	.type	_Z25__device_stub__matrixMultPiS_S_iiiiii,@function
_Z25__device_stub__matrixMultPiS_S_iiiiii: # @_Z25__device_stub__matrixMultPiS_S_iiiiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$176, %rsp
	.cfi_def_cfa_offset 224
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	20(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	16(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	224(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	232(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	240(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10matrixMultPiS_S_iiiiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$192, %rsp
	.cfi_adjust_cfa_offset -192
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z25__device_stub__matrixMultPiS_S_iiiiii, .Lfunc_end0-_Z25__device_stub__matrixMultPiS_S_iiiiii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI1_0:
	.long	0x3e800000                      # float 0.25
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	xorl	%r13d, %r13d
	movl	$.L.str, %edi
	xorl	%eax, %eax
	callq	printf
	leaq	12(%rsp), %r15
	movl	$.L.str.1, %edi
	movq	%r15, %rsi
	xorl	%eax, %eax
	callq	__isoc23_scanf
	movl	$.L.str.2, %edi
	xorl	%eax, %eax
	callq	printf
	leaq	8(%rsp), %r12
	movl	$.L.str.1, %edi
	movq	%r12, %rsi
	xorl	%eax, %eax
	callq	__isoc23_scanf
	movl	$.L.str.3, %edi
	xorl	%eax, %eax
	callq	printf
	leaq	4(%rsp), %rbx
	movl	$.L.str.1, %edi
	movq	%rbx, %rsi
	xorl	%eax, %eax
	callq	__isoc23_scanf
	movl	$10, %edi
	callq	putchar@PLT
	movl	(%r15), %ebp
	movl	(%r12), %r14d
	shll	$2, %ebp
	movl	%ebp, %eax
	imull	%r14d, %eax
	movl	(%rbx), %ecx
	imull	%ecx, %r14d
	shll	$2, %r14d
	imull	%ecx, %ebp
	movslq	%eax, %rdi
	movq	%rdi, 48(%rsp)                  # 8-byte Spill
	callq	malloc
	movq	%rax, %rbx
	movslq	%r14d, %rdi
	movq	%rdi, 56(%rsp)                  # 8-byte Spill
	callq	malloc
	movq	%rax, %r14
	movslq	%ebp, %rdi
	movq	%rdi, %rbp
	callq	malloc
	movq	%rax, 64(%rsp)                  # 8-byte Spill
	xorl	%edi, %edi
	callq	time
	movl	%eax, %edi
	callq	srand
	movl	(%r15), %ecx
	movl	(%r12), %eax
	testl	%ecx, %ecx
	jle	.LBB1_6
.LBB1_1:                                # %.preheader49
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_3 Depth 2
	testl	%eax, %eax
	jle	.LBB1_5
# %bb.2:                                # %.lr.ph.preheader
                                        #   in Loop: Header=BB1_1 Depth=1
	xorl	%r15d, %r15d
.LBB1_3:                                # %.lr.ph
                                        #   Parent Loop BB1_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	callq	rand
	cltq
	imulq	$1717986919, %rax, %rcx         # imm = 0x66666667
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$35, %rcx
	addl	%edx, %ecx
	shll	$2, %ecx
	leal	(%rcx,%rcx,4), %ecx
	negl	%ecx
	addl	%eax, %ecx
	addl	$-10, %ecx
	movl	8(%rsp), %eax
	movl	%r13d, %edx
	imull	%eax, %edx
	movslq	%edx, %rdx
	addq	%r15, %rdx
	movl	%ecx, (%rbx,%rdx,4)
	incq	%r15
	cmpl	%eax, %r15d
	jl	.LBB1_3
# %bb.4:                                # %._crit_edge.loopexit
                                        #   in Loop: Header=BB1_1 Depth=1
	movl	12(%rsp), %ecx
.LBB1_5:                                # %._crit_edge
                                        #   in Loop: Header=BB1_1 Depth=1
	incl	%r13d
	cmpl	%ecx, %r13d
	jl	.LBB1_1
.LBB1_6:                                # %.preheader48
	testl	%eax, %eax
	movq	%rbp, 24(%rsp)                  # 8-byte Spill
	jle	.LBB1_13
# %bb.7:                                # %.preheader.preheader
	xorl	%r15d, %r15d
	movl	4(%rsp), %ecx
.LBB1_8:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_10 Depth 2
	testl	%ecx, %ecx
	jle	.LBB1_12
# %bb.9:                                # %.lr.ph53.preheader
                                        #   in Loop: Header=BB1_8 Depth=1
	xorl	%r12d, %r12d
.LBB1_10:                               # %.lr.ph53
                                        #   Parent Loop BB1_8 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	callq	rand
	cltq
	imulq	$1717986919, %rax, %rcx         # imm = 0x66666667
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$35, %rcx
	addl	%edx, %ecx
	shll	$2, %ecx
	leal	(%rcx,%rcx,4), %ecx
	negl	%ecx
	addl	%ecx, %eax
	addl	$-10, %eax
	movl	4(%rsp), %ecx
	movl	%r15d, %edx
	imull	%ecx, %edx
	movslq	%edx, %rdx
	addq	%r12, %rdx
	movl	%eax, (%r14,%rdx,4)
	incq	%r12
	cmpl	%ecx, %r12d
	jl	.LBB1_10
# %bb.11:                               # %._crit_edge54.loopexit
                                        #   in Loop: Header=BB1_8 Depth=1
	movl	8(%rsp), %eax
.LBB1_12:                               # %._crit_edge54
                                        #   in Loop: Header=BB1_8 Depth=1
	incl	%r15d
	cmpl	%eax, %r15d
	jl	.LBB1_8
.LBB1_13:                               # %._crit_edge56
	leaq	40(%rsp), %r15
	movq	%r15, %rdi
	movq	48(%rsp), %r13                  # 8-byte Reload
	movq	%r13, %rsi
	callq	hipMalloc
	leaq	32(%rsp), %r12
	movq	%r12, %rdi
	movq	56(%rsp), %rbp                  # 8-byte Reload
	movq	%rbp, %rsi
	callq	hipMalloc
	leaq	16(%rsp), %rdi
	movq	24(%rsp), %rsi                  # 8-byte Reload
	callq	hipMalloc
	movq	(%r15), %rdi
	movq	%rbx, %rsi
	movq	%r13, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r12), %rdi
	movq	%r14, %rsi
	movq	%rbp, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movl	12(%rsp), %eax
	addl	$3, %eax
	cvtsi2ss	%eax, %xmm0
	mulss	.LCPI1_0(%rip), %xmm0
	callq	ceilf@PLT
	cvttss2si	%xmm0, %r15d
	movl	4(%rsp), %eax
	addl	$3, %eax
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	.LCPI1_0(%rip), %xmm0
	callq	ceilf@PLT
	cvttss2si	%xmm0, %edi
	shlq	$32, %rdi
	orq	%r15, %rdi
	movabsq	$17179869188, %rdx              # imm = 0x400000004
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_15
# %bb.14:
	movq	40(%rsp), %rdi
	movq	32(%rsp), %rsi
	movq	16(%rsp), %rdx
	movl	12(%rsp), %ecx
	movl	8(%rsp), %r8d
	movl	4(%rsp), %eax
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movl	%r8d, %r9d
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	%rcx
	.cfi_adjust_cfa_offset 8
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	callq	_Z25__device_stub__matrixMultPiS_S_iiiiii
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
.LBB1_15:
	movq	16(%rsp), %rsi
	movq	64(%rsp), %r15                  # 8-byte Reload
	movq	%r15, %rdi
	movq	24(%rsp), %rdx                  # 8-byte Reload
	movl	$2, %ecx
	callq	hipMemcpy
	movq	40(%rsp), %rdi
	callq	hipFree
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movl	$.Lstr, %edi
	callq	puts@PLT
	movl	12(%rsp), %esi
	movl	8(%rsp), %edx
	movq	%rbx, %rdi
	callq	_Z12Print_MatrixPiii
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	movl	8(%rsp), %esi
	movl	4(%rsp), %edx
	movq	%r14, %rdi
	callq	_Z12Print_MatrixPiii
	movl	$.Lstr.2, %edi
	callq	puts@PLT
	movl	12(%rsp), %esi
	movl	4(%rsp), %edx
	movq	%r15, %rdi
	callq	_Z12Print_MatrixPiii
	movl	12(%rsp), %esi
	movl	8(%rsp), %edx
	movl	$.L.str.8, %ecx
	movq	%rbx, %rdi
	callq	_Z17PrintMatrixToTextPiiiPKc
	movl	8(%rsp), %esi
	movl	4(%rsp), %edx
	movl	$.L.str.9, %ecx
	movq	%r14, %rdi
	callq	_Z17PrintMatrixToTextPiiiPKc
	movl	12(%rsp), %esi
	movl	4(%rsp), %edx
	movl	$.L.str.10, %ecx
	movq	%r15, %rdi
	callq	_Z17PrintMatrixToTextPiiiPKc
	movq	%rbx, %rdi
	callq	free
	movq	%r14, %rdi
	callq	free
	movq	%r15, %rdi
	callq	free
	xorl	%eax, %eax
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.globl	_Z12Print_MatrixPiii            # -- Begin function _Z12Print_MatrixPiii
	.type	_Z12Print_MatrixPiii,@function
_Z12Print_MatrixPiii:                   # @_Z12Print_MatrixPiii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdi, 8(%rsp)                   # 8-byte Spill
	testl	%esi, %esi
	jle	.LBB2_6
# %bb.1:                                # %.preheader.lr.ph
	movl	%edx, %ebx
	movl	%esi, %eax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movl	%edx, %r12d
	xorl	%ebp, %ebp
	xorl	%r13d, %r13d
.LBB2_2:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_4 Depth 2
	testl	%ebx, %ebx
	jle	.LBB2_5
# %bb.3:                                # %.lr.ph
                                        #   in Loop: Header=BB2_2 Depth=1
	movl	%ebp, %eax
	movq	8(%rsp), %rcx                   # 8-byte Reload
	leaq	(%rcx,%rax,4), %r14
	xorl	%r15d, %r15d
.LBB2_4:                                #   Parent Loop BB2_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	(%r14,%r15,4), %esi
	movl	$.L.str.11, %edi
	xorl	%eax, %eax
	callq	printf
	incq	%r15
	cmpq	%r15, %r12
	jne	.LBB2_4
.LBB2_5:                                # %._crit_edge
                                        #   in Loop: Header=BB2_2 Depth=1
	movl	$10, %edi
	callq	putchar@PLT
	incq	%r13
	addl	%ebx, %ebp
	cmpq	16(%rsp), %r13                  # 8-byte Folded Reload
	jne	.LBB2_2
.LBB2_6:                                # %._crit_edge14
	movl	$10, %edi
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	putchar@PLT                     # TAILCALL
.Lfunc_end2:
	.size	_Z12Print_MatrixPiii, .Lfunc_end2-_Z12Print_MatrixPiii
	.cfi_endproc
                                        # -- End function
	.globl	_Z17PrintMatrixToTextPiiiPKc    # -- Begin function _Z17PrintMatrixToTextPiiiPKc
	.type	_Z17PrintMatrixToTextPiiiPKc,@function
_Z17PrintMatrixToTextPiiiPKc:           # @_Z17PrintMatrixToTextPiiiPKc
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%edx, %ebx
	movl	%esi, %ebp
	movq	%rdi, 8(%rsp)                   # 8-byte Spill
	movl	$.L.str.12, %esi
	movq	%rcx, %rdi
	callq	fopen
	movq	%rax, %r15
	testl	%ebp, %ebp
	jle	.LBB3_6
# %bb.1:                                # %.preheader.lr.ph
	movl	%ebp, %eax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movl	%ebx, %r13d
	xorl	%ebp, %ebp
	xorl	%r14d, %r14d
	movl	%ebx, 4(%rsp)                   # 4-byte Spill
.LBB3_2:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_4 Depth 2
	testl	%ebx, %ebx
	jle	.LBB3_5
# %bb.3:                                # %.lr.ph
                                        #   in Loop: Header=BB3_2 Depth=1
	movl	%ebp, %eax
	movq	8(%rsp), %rcx                   # 8-byte Reload
	leaq	(%rcx,%rax,4), %r12
	xorl	%ebx, %ebx
.LBB3_4:                                #   Parent Loop BB3_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	(%r12,%rbx,4), %edx
	movl	$.L.str.13, %esi
	movq	%r15, %rdi
	xorl	%eax, %eax
	callq	fprintf
	incq	%rbx
	cmpq	%rbx, %r13
	jne	.LBB3_4
.LBB3_5:                                # %._crit_edge
                                        #   in Loop: Header=BB3_2 Depth=1
	movl	$10, %edi
	movq	%r15, %rsi
	callq	fputc@PLT
	incq	%r14
	movl	4(%rsp), %ebx                   # 4-byte Reload
	addl	%ebx, %ebp
	cmpq	16(%rsp), %r14                  # 8-byte Folded Reload
	jne	.LBB3_2
.LBB3_6:                                # %._crit_edge17
	movq	%r15, %rdi
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	fclose                          # TAILCALL
.Lfunc_end3:
	.size	_Z17PrintMatrixToTextPiiiPKc, .Lfunc_end3-_Z17PrintMatrixToTextPiiiPKc
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB4_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB4_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10matrixMultPiS_S_iiiiii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end4:
	.size	__hip_module_ctor, .Lfunc_end4-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB5_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB5_2:
	retq
.Lfunc_end5:
	.size	__hip_module_dtor, .Lfunc_end5-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z10matrixMultPiS_S_iiiiii,@object # @_Z10matrixMultPiS_S_iiiiii
	.section	.rodata,"a",@progbits
	.globl	_Z10matrixMultPiS_S_iiiiii
	.p2align	3, 0x0
_Z10matrixMultPiS_S_iiiiii:
	.quad	_Z25__device_stub__matrixMultPiS_S_iiiiii
	.size	_Z10matrixMultPiS_S_iiiiii, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"n = "
	.size	.L.str, 5

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"%d"
	.size	.L.str.1, 3

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"m = "
	.size	.L.str.2, 5

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"k = "
	.size	.L.str.3, 5

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"matrixA.txt"
	.size	.L.str.8, 12

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"matrixB.txt"
	.size	.L.str.9, 12

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"matrixC.txt"
	.size	.L.str.10, 12

	.type	.L.str.11,@object               # @.str.11
.L.str.11:
	.asciz	"%d "
	.size	.L.str.11, 4

	.type	.L.str.12,@object               # @.str.12
.L.str.12:
	.asciz	"w"
	.size	.L.str.12, 2

	.type	.L.str.13,@object               # @.str.13
.L.str.13:
	.asciz	"%d\t"
	.size	.L.str.13, 4

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z10matrixMultPiS_S_iiiiii"
	.size	.L__unnamed_1, 27

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"[Input matrix A]"
	.size	.Lstr, 17

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"[Input matrix B]"
	.size	.Lstr.1, 17

	.type	.Lstr.2,@object                 # @str.2
.Lstr.2:
	.asciz	"[GPU Result]"
	.size	.Lstr.2, 13

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z25__device_stub__matrixMultPiS_S_iiiiii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z10matrixMultPiS_S_iiiiii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z10matrixMultPiS_S_iiiiii ; -- Begin function _Z10matrixMultPiS_S_iiiiii
	.globl	_Z10matrixMultPiS_S_iiiiii
	.p2align	8
	.type	_Z10matrixMultPiS_S_iiiiii,@function
_Z10matrixMultPiS_S_iiiiii:             ; @_Z10matrixMultPiS_S_iiiiii
; %bb.0:
	s_clause 0x2
	s_load_b128 s[4:7], s[0:1], 0x18
	s_load_b32 s16, s[0:1], 0x3c
	s_load_b64 s[2:3], s[0:1], 0x28
	v_bfe_u32 v3, v0, 10, 10
	v_and_b32_e32 v4, 0x3ff, v0
	s_waitcnt lgkmcnt(0)
	s_add_i32 s8, s5, 3
	s_delay_alu instid0(SALU_CYCLE_1)
	v_cvt_f32_i32_e32 v1, s8
	s_clause 0x1
	s_load_b128 s[8:11], s[0:1], 0x0
	s_load_b64 s[12:13], s[0:1], 0x10
	s_lshr_b32 s0, s16, 16
	v_mul_f32_e32 v1, 0x3e800000, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ceil_f32_e32 v1, v1
	v_cvt_i32_f32_e32 v5, v1
	v_mad_u64_u32 v[0:1], null, s15, s0, v[3:4]
	s_and_b32 s0, s16, 0xffff
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[1:2], null, s14, s0, v[4:5]
	v_cmp_gt_i32_e32 vcc_lo, 1, v5
	s_cbranch_vccnz .LBB0_9
; %bb.1:                                ; %.lr.ph
	v_lshlrev_b32_e32 v2, 2, v4
	v_lshlrev_b32_e32 v6, 4, v3
	v_mul_lo_u32 v8, v0, s5
	v_cmp_gt_i32_e64 s0, s4, v0
	v_cmp_gt_i32_e64 s1, s7, v1
	v_add_nc_u32_e32 v7, 64, v2
	v_dual_mov_b32 v2, 0 :: v_dual_add_nc_u32 v9, v6, v2
	s_mov_b32 s4, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_nc_u32_e32 v10, v7, v6
.LBB0_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_7 Depth 2
	s_lshl_b32 s14, s4, 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v11, 0 :: v_dual_add_nc_u32 v12, s14, v4
	v_cmp_gt_i32_e32 vcc_lo, s5, v12
	s_and_b32 s16, s0, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s15, s16
	s_cbranch_execz .LBB0_4
; %bb.3:                                ;   in Loop: Header=BB0_2 Depth=1
	v_add_nc_u32_e32 v11, v12, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v12, 31, v11
	v_lshlrev_b64 v[11:12], 2, v[11:12]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v11, vcc_lo, s8, v11
	v_add_co_ci_u32_e32 v12, vcc_lo, s9, v12, vcc_lo
	global_load_b32 v11, v[11:12], off
.LBB0_4:                                ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s15
	v_dual_mov_b32 v13, 0 :: v_dual_add_nc_u32 v12, s14, v3
	s_waitcnt vmcnt(0)
	ds_store_b32 v9, v11
	v_cmp_gt_i32_e32 vcc_lo, s6, v12
	s_and_b32 s15, s1, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s14, s15
	s_cbranch_execz .LBB0_6
; %bb.5:                                ;   in Loop: Header=BB0_2 Depth=1
	v_mad_u64_u32 v[13:14], null, v12, s7, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v14, 31, v13
	v_lshlrev_b64 v[11:12], 2, v[13:14]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v11, vcc_lo, s10, v11
	v_add_co_ci_u32_e32 v12, vcc_lo, s11, v12, vcc_lo
	global_load_b32 v13, v[11:12], off
.LBB0_6:                                ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s14
	v_mov_b32_e32 v11, v7
	s_mov_b32 s14, 0
	s_waitcnt vmcnt(0)
	ds_store_b32 v10, v13
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB0_7:                                ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_add_nc_u32_e32 v12, s14, v6
	s_add_i32 s14, s14, 4
	ds_load_b32 v14, v11
	ds_load_b32 v15, v12
	s_cmp_eq_u32 s14, 16
	s_waitcnt lgkmcnt(0)
	v_mad_u64_u32 v[12:13], null, v14, v15, v[2:3]
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v2, v12 :: v_dual_add_nc_u32 v11, 16, v11
	s_cbranch_scc0 .LBB0_7
; %bb.8:                                ;   in Loop: Header=BB0_2 Depth=1
	s_add_i32 s4, s4, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	v_cmp_eq_u32_e32 vcc_lo, s4, v5
	s_barrier
	buffer_gl0_inv
	s_cbranch_vccz .LBB0_2
	s_branch .LBB0_10
.LBB0_9:
	v_mov_b32_e32 v2, 0
.LBB0_10:                               ; %Flow105
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cmp_gt_i32_e32 vcc_lo, s2, v0
	v_cmp_gt_i32_e64 s0, s3, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, vcc_lo, s0
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB0_12
; %bb.11:
	v_mad_u64_u32 v[3:4], null, v0, s3, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v4, 31, v3
	v_lshlrev_b64 v[0:1], 2, v[3:4]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s12, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s13, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB0_12:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10matrixMultPiS_S_iiiiii
		.amdhsa_group_segment_fixed_size 128
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 16
		.amdhsa_next_free_sgpr 17
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z10matrixMultPiS_S_iiiiii, .Lfunc_end0-_Z10matrixMultPiS_S_iiiiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 604
; NumSgprs: 19
; NumVgprs: 16
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 128 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 19
; NumVGPRsForWavesPerEU: 16
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         36
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     by_value
      - .offset:         44
        .size:           4
        .value_kind:     by_value
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         52
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         60
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         62
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         64
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         66
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         68
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         70
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         112
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 128
    .kernarg_segment_align: 8
    .kernarg_segment_size: 304
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z10matrixMultPiS_S_iiiiii
    .private_segment_fixed_size: 0
    .sgpr_count:     19
    .sgpr_spill_count: 0
    .symbol:         _Z10matrixMultPiS_S_iiiiii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     16
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
