//#include <omp.h>
#include <cstdio>
#include <cstdlib>
#include <cstring>
#include <vector>
#include <sys/mman.h>
#include <sys/stat.h>
#include <iostream>
#include <fcntl.h>
#include <cmath>
using namespace std;

__device__ __managed__ float *x, *y, *z, *res;

// Matrices are stored in row-major order:
// M(row, col) = *(M.elements + row * M.stride + col)
typedef struct {
  int width;
  int height;
  int stride; 
  float* elements;
} Matrix;

// Get a matrix element
__device__ float GetElement(const Matrix A, int row, int col)
{
      return A.elements[row * A.stride + col];
}

// Set a matrix element
__device__ void SetElement(Matrix A, int row, int col,
                               float value)
{
      A.elements[row * A.stride + col] = value;
}

// Thread block size
#define BLOCK_SIZE 16

// Get the BLOCK_SIZExBLOCK_SIZE sub-matrix Asub of A that is
// located col sub-matrices to the right and row sub-matrices down
// from the upper-left corner of A
 __device__ Matrix GetSubMatrixA(Matrix A, int row, int col) 
{
      Matrix Asub;
      Asub.width    = 3;
      Asub.height   = BLOCK_SIZE;
      Asub.stride   = A.stride;
      Asub.elements = &A.elements[A.stride * BLOCK_SIZE * row
                                  + A.width * col];
      return Asub;
}
 __device__ Matrix GetSubMatrixB(Matrix A, int row, int col) 
{
      Matrix Asub;
      Asub.width    = BLOCK_SIZE;
      Asub.height   = 3;
      Asub.stride   = A.stride;
      Asub.elements = &A.elements[A.stride * A.height * row
                                  + BLOCK_SIZE * col];
      return Asub;
}
 __device__ Matrix GetSubMatrixC(Matrix A, int row, int col) 
{
      Matrix Asub;
      Asub.width    = BLOCK_SIZE;
      Asub.height   = BLOCK_SIZE;
      Asub.stride   = A.stride;
      Asub.elements = &A.elements[A.stride * BLOCK_SIZE * row
                                  + BLOCK_SIZE * col];
      return Asub;
}


// Forward declaration of the matrix multiplication kernel
//__global__ void MatMulKernel(*float, *float, *float, int, int, int, int, int, int);


__global__ void MatMulKernel(float* A, float* B, float* C, int ARows, int ACols, int BRows,
    int BCols, int CRows, int CCols)
{
    float CValue = 0;

    int Row = blockIdx.y*BLOCK_SIZE + threadIdx.y;
    int Col = blockIdx.x*BLOCK_SIZE + threadIdx.x;

    __shared__ float As[BLOCK_SIZE][BLOCK_SIZE];
    __shared__ float Bs[BLOCK_SIZE][BLOCK_SIZE];

    for (int k = 0; k < (BLOCK_SIZE + ACols - 1)/BLOCK_SIZE; k++) {

         if (k*BLOCK_SIZE + threadIdx.x < ACols && Row < ARows)
             As[threadIdx.y][threadIdx.x] = A[Row*ACols + k*BLOCK_SIZE + threadIdx.x];
         else
             As[threadIdx.y][threadIdx.x] = 0.0;

         if (k*BLOCK_SIZE + threadIdx.y < BRows && Col < BCols)
             Bs[threadIdx.y][threadIdx.x] = B[(k*BLOCK_SIZE + threadIdx.y)*BCols + Col];
         else
             Bs[threadIdx.y][threadIdx.x] = 0.0;

         __syncthreads();
         for (int n = 0; n < BLOCK_SIZE; ++n)
             CValue += (As[threadIdx.y][n] - Bs[n][threadIdx.x])*(As[threadIdx.y][n] - Bs[n][threadIdx.x]);

         __syncthreads();
    }

    if (Row < CRows && Col < CCols){ 
         if(CValue>0)
           CValue=1/sqrt(CValue);
         else
           CValue=0;
        C[((blockIdx.y * blockDim.y + threadIdx.y)*CCols) +
           (blockIdx.x * blockDim.x)+ threadIdx.x] = CValue;
    }
}

// Matrix multiplication - Host code
// Matrix dimensions are assumed to be multiples of BLOCK_SIZE
void MatMul(const Matrix A, const Matrix B, Matrix C)
{
    // Load A and B to device memory
    Matrix d_A;
    d_A.width = d_A.stride = A.width; d_A.height = A.height;
    size_t size = A.width * A.height * sizeof(float);
    cudaMalloc(&d_A.elements, size);
    cudaMemcpy(d_A.elements, A.elements, size,
               cudaMemcpyHostToDevice);
    Matrix d_B;
    d_B.width = d_B.stride = B.width; d_B.height = B.height;
    size = B.width * B.height * sizeof(float);
    cudaMalloc(&d_B.elements, size);
    cudaMemcpy(d_B.elements, B.elements, size,
    cudaMemcpyHostToDevice);

    // Allocate C in device memory
    Matrix d_C;
    d_C.width = d_C.stride = C.width; d_C.height = C.height;
    size = C.width * C.height * sizeof(float);
    cudaMalloc(&d_C.elements, size);

    // Invoke kernel
    dim3 dimBlock(BLOCK_SIZE, BLOCK_SIZE);
    dim3 dimGrid((B.width+dimBlock.x-1) / dimBlock.x, (A.height+dimBlock.y-1) / dimBlock.y);
    MatMulKernel<<<dimGrid, dimBlock>>>(d_A.elements, d_B.elements, d_C.elements, d_A.height, d_A.width, d_B.height, d_B.width, d_C.height, d_C.width);

    // Read C from device memory
    cudaMemcpy(C.elements, d_C.elements, size,
               cudaMemcpyDeviceToHost);

    // Free device memory
    cudaFree(d_A.elements);
    cudaFree(d_B.elements);
    cudaFree(d_C.elements);
}


/*__global__ void calcGravity(const size_t n){
  int row = blockIdx.y*blockDim.x + threadIdx.y;
  int col = blockIdx.x*blockDim.x + threadIdx.x;

  __shared__ float A[blockDim.x][3];
  __shared__ float B[3][blockDim.x];

  if(threadIdx.y==0){
    A[threadIdx.x][0]=B[0][threadIdx.x]; 
    A[threadIdx.x][1]=B[1][threadIdx.x]; 
    A[threadIdx.x][2]=B[2][threadIdx.x];
  }
  if(row==0){
    res[col]==0.0f;
  }
  
  if(i<n){
    if(row!=col){
      float d = (A[col][0]-B[0][row]*A[col][0]-B[0][row]);
      d += (A[col][1]-B[1][row]*A[col][1]-B[1][row]);
      d += (A[col][2]-B[2][row]*A[col][2]-B[2][row]);
      atomicAdd(&res[col],=1/sqrt(d));
    }
  }
}*/
int main(int argc, char* argv[]){
  char* &filename = argv[1];
  vector<const char*> lineAddrs;
  struct stat st;
  stat(filename, &st);
  size_t filesize = st.st_size;
  int fd = open(filename,O_RDONLY,0);
  void* file = mmap(NULL,  filesize, PROT_READ, MAP_PRIVATE | MAP_POPULATE, fd, 0);
  const char* input = (const char*) file;
  int lines=0;
  lineAddrs.push_back(input);
  for(int i=0;i<filesize;i++){
    if(input[i]=='\n'){
      lines++;
      lineAddrs.push_back(input+i+1);
    }
  }
  float *valuesA = new float[lines*3];
  float *valuesB = new float[lines*3];
  float *results = new float[lines*lines];
  cudaMallocManaged(&res, (int) (lines*sizeof(float)));
  for(int i=0;i<lines;i++){
    const char *a,*b,*c;
    a=lineAddrs[i];
    b=strpbrk(strpbrk(a," \t"),"-0123456789");
    c=strpbrk(strpbrk(b," \t"),"-0123456789");
    valuesA[i]         = valuesB[3*i]   = atof(a);
    valuesA[lines+i]   = valuesB[3*i+1] = atof(b);
    valuesA[2*lines+i] = valuesB[3*i+2] = atof(c);
    if(!(i%1000)) cout<<i<<endl;
  }
  for(int i=0;i<3*lines;i++){
    if(isnan(valuesA[i])) cout<<"NAN A "<<i<<endl;
    if(isnan(valuesB[i])) cout<<"NAN A "<<i<<endl;
  }
  munmap(file, filesize);
  Matrix A, B, C;
  A.width=3;
  A.height=lines;
  A.stride=lines;
  A.elements=valuesA;
  B.width=lines;
  B.height=3;
  B.stride=3;
  B.elements=valuesB;
  C.width=lines;
  C.height=lines;
  C.stride=lines;
  C.elements=results;
  MatMul(A,B,C);
  /*
  const dim3 block_size(16,16);
  int block_dim=(int) sqrt( (lines + block_size -1)/ 256);
  size_t dim3 grid_size(block_dim,block_dim:wq);
  cout<<"Sending to GPU"<<endl;
  // launch the kernel
  calcGravity<<<grid_size, block_size>>>(lines);
 */
  cudaDeviceSynchronize();
  cout<<"Summing"<<endl;
  double total=0.0f;
  for(int i=0;i<lines*lines;i++){
    total+=(double)results[i];
    if(i%100000000 == 0) cout<<total<<endl;
    if(isnan(results[i])) cout<<"NAN: "<<i<<endl;
    //if(i%(lines*1000) == 0) cout<<endl;
  }
  cout<<total<<endl;
  return 0;
}

	.file	"tmpxft_002f8ba9_00000000-6_gravity-tiledgpu.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4021:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE4021:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.align 2
	.type	_ZNSt12_Vector_baseIPKcSaIS1_EE11_M_allocateEm.isra.0, @function
_ZNSt12_Vector_baseIPKcSaIS1_EE11_M_allocateEm.isra.0:
.LFB4761:
	.cfi_startproc
	testq	%rdi, %rdi
	je	.L3
	movabsq	$1152921504606846975, %rax
	cmpq	%rdi, %rax
	jnb	.L4
	pushq	%rax
	.cfi_def_cfa_offset 16
	movabsq	$2305843009213693951, %rax
	cmpq	%rdi, %rax
	jnb	.L5
	call	_ZSt28__throw_bad_array_new_lengthv@PLT
.L5:
	call	_ZSt17__throw_bad_allocv@PLT
.L4:
	.cfi_def_cfa_offset 8
	salq	$3, %rdi
	jmp	_Znwm@PLT
.L3:
	xorl	%eax, %eax
	ret
	.cfi_endproc
.LFE4761:
	.size	_ZNSt12_Vector_baseIPKcSaIS1_EE11_M_allocateEm.isra.0, .-_ZNSt12_Vector_baseIPKcSaIS1_EE11_M_allocateEm.isra.0
	.align 2
	.type	_ZNSolsEPFRSoS_E.isra.0, @function
_ZNSolsEPFRSoS_E.isra.0:
.LFB4764:
	.cfi_startproc
	jmp	*%rsi
	.cfi_endproc
.LFE4764:
	.size	_ZNSolsEPFRSoS_E.isra.0, .-_ZNSolsEPFRSoS_E.isra.0
	.globl	_Z10GetElement6Matrixii
	.type	_Z10GetElement6Matrixii, @function
_Z10GetElement6Matrixii:
.LFB4002:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE4002:
	.size	_Z10GetElement6Matrixii, .-_Z10GetElement6Matrixii
	.globl	_Z10SetElement6Matrixiif
	.type	_Z10SetElement6Matrixiif, @function
_Z10SetElement6Matrixiif:
.LFB4003:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE4003:
	.size	_Z10SetElement6Matrixiif, .-_Z10SetElement6Matrixiif
	.globl	_Z13GetSubMatrixA6Matrixii
	.type	_Z13GetSubMatrixA6Matrixii, @function
_Z13GetSubMatrixA6Matrixii:
.LFB4004:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE4004:
	.size	_Z13GetSubMatrixA6Matrixii, .-_Z13GetSubMatrixA6Matrixii
	.globl	_Z13GetSubMatrixB6Matrixii
	.type	_Z13GetSubMatrixB6Matrixii, @function
_Z13GetSubMatrixB6Matrixii:
.LFB4758:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE4758:
	.size	_Z13GetSubMatrixB6Matrixii, .-_Z13GetSubMatrixB6Matrixii
	.globl	_Z13GetSubMatrixC6Matrixii
	.type	_Z13GetSubMatrixC6Matrixii, @function
_Z13GetSubMatrixC6Matrixii:
.LFB4760:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE4760:
	.size	_Z13GetSubMatrixC6Matrixii, .-_Z13GetSubMatrixC6Matrixii
	.globl	_Z42__device_stub__Z12MatMulKernelPfS_S_iiiiiiPfS_S_iiiiii
	.type	_Z42__device_stub__Z12MatMulKernelPfS_S_iiiiiiPfS_S_iiiiii, @function
_Z42__device_stub__Z12MatMulKernelPfS_S_iiiiiiPfS_S_iiiiii:
.LFB4043:
	.cfi_startproc
	endbr64
	subq	$200, %rsp
	.cfi_def_cfa_offset 208
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	56(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movl	%r9d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 184(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	208(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	216(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	224(%rsp), %rax
	movq	%rax, 176(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L21
	pushq	56(%rsp)
	.cfi_def_cfa_offset 216
	leaq	_Z12MatMulKernelPfS_S_iiiiii(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 224
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 216
	popq	%rdx
	.cfi_def_cfa_offset 208
.L21:
	movq	184(%rsp), %rax
	subq	%fs:40, %rax
	je	.L23
	call	__stack_chk_fail@PLT
.L23:
	addq	$200, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4043:
	.size	_Z42__device_stub__Z12MatMulKernelPfS_S_iiiiiiPfS_S_iiiiii, .-_Z42__device_stub__Z12MatMulKernelPfS_S_iiiiiiPfS_S_iiiiii
	.globl	_Z12MatMulKernelPfS_S_iiiiii
	.type	_Z12MatMulKernelPfS_S_iiiiii, @function
_Z12MatMulKernelPfS_S_iiiiii:
.LFB4044:
	.cfi_startproc
	endbr64
	jmp	_Z42__device_stub__Z12MatMulKernelPfS_S_iiiiiiPfS_S_iiiiii
	.cfi_endproc
.LFE4044:
	.size	_Z12MatMulKernelPfS_S_iiiiii, .-_Z12MatMulKernelPfS_S_iiiiii
	.globl	_Z6MatMul6MatrixS_S_
	.type	_Z6MatMul6MatrixS_S_, @function
_Z6MatMul6MatrixS_S_:
.LFB4007:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$120, %rsp
	.cfi_def_cfa_offset 176
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	movl	176(%rsp), %edx
	movl	180(%rsp), %r14d
	leaq	48(%rsp), %rdi
	movl	200(%rsp), %r13d
	movl	224(%rsp), %ebx
	movl	%edx, 40(%rsp)
	movl	204(%rsp), %r12d
	movl	%edx, 32(%rsp)
	imull	%r14d, %edx
	movl	228(%rsp), %r15d
	movl	%r14d, 36(%rsp)
	addl	$15, %r14d
	shrl	$4, %r14d
	movslq	%edx, %rbp
	salq	$2, %rbp
	movq	%rbp, %rsi
	call	cudaMalloc@PLT
	movq	192(%rsp), %rsi
	movq	48(%rsp), %rdi
	movq	%rbp, %rdx
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movl	%r12d, 60(%rsp)
	imull	%r13d, %r12d
	leaq	72(%rsp), %rdi
	movl	%r13d, 64(%rsp)
	movl	%r13d, 56(%rsp)
	addl	$15, %r13d
	movslq	%r12d, %rbp
	shrl	$4, %r13d
	salq	$2, %rbp
	movq	%rbp, %rsi
	call	cudaMalloc@PLT
	movq	216(%rsp), %rsi
	movq	72(%rsp), %rdi
	movq	%rbp, %rdx
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movl	%ebx, 88(%rsp)
	leaq	96(%rsp), %rdi
	movl	%ebx, 80(%rsp)
	imull	%r15d, %ebx
	movl	%r15d, 84(%rsp)
	movslq	%ebx, %rbx
	salq	$2, %rbx
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
	movl	%r13d, 20(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	%r14d, 24(%rsp)
	movq	20(%rsp), %rdi
	movl	$1, %ecx
	movabsq	$68719476752, %rdx
	movl	$1, %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L27
	pushq	%rax
	.cfi_def_cfa_offset 184
	movl	88(%rsp), %eax
	pushq	%rax
	.cfi_def_cfa_offset 192
	movl	100(%rsp), %eax
	pushq	%rax
	.cfi_def_cfa_offset 200
	movl	80(%rsp), %eax
	pushq	%rax
	.cfi_def_cfa_offset 208
	movl	92(%rsp), %r9d
	movl	64(%rsp), %r8d
	movl	68(%rsp), %ecx
	movq	128(%rsp), %rdx
	movq	104(%rsp), %rsi
	movq	80(%rsp), %rdi
	call	_Z42__device_stub__Z12MatMulKernelPfS_S_iiiiiiPfS_S_iiiiii
	addq	$32, %rsp
	.cfi_def_cfa_offset 176
.L27:
	movq	96(%rsp), %rsi
	movq	240(%rsp), %rdi
	movl	$2, %ecx
	movq	%rbx, %rdx
	call	cudaMemcpy@PLT
	movq	48(%rsp), %rdi
	call	cudaFree@PLT
	movq	72(%rsp), %rdi
	call	cudaFree@PLT
	movq	96(%rsp), %rdi
	call	cudaFree@PLT
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L28
	call	__stack_chk_fail@PLT
.L28:
	addq	$120, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4007:
	.size	_Z6MatMul6MatrixS_S_, .-_Z6MatMul6MatrixS_S_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z12MatMulKernelPfS_S_iiiiii"
.LC1:
	.string	"x"
.LC2:
	.string	"y"
.LC3:
	.string	"z"
.LC4:
	.string	"res"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB4046:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z12MatMulKernelPfS_S_iiiiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	movq	%rax, _ZL32__nv_fatbinhandle_for_managed_rt(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC1(%rip), %rdx
	movl	$8, %r9d
	leaq	_ZL1x(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	call	__cudaRegisterManagedVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC2(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$8, %r9d
	leaq	_ZL1y(%rip), %rsi
	call	__cudaRegisterManagedVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC3(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$8, %r9d
	leaq	_ZL1z(%rip), %rsi
	call	__cudaRegisterManagedVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC4(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movl	$8, %r9d
	movq	%rdx, %rcx
	leaq	_ZL3res(%rip), %rsi
	call	__cudaRegisterManagedVar@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE4046:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.text._ZNSt6vectorIPKcSaIS1_EED2Ev,"axG",@progbits,_ZNSt6vectorIPKcSaIS1_EED5Ev,comdat
	.align 2
	.weak	_ZNSt6vectorIPKcSaIS1_EED2Ev
	.type	_ZNSt6vectorIPKcSaIS1_EED2Ev, @function
_ZNSt6vectorIPKcSaIS1_EED2Ev:
.LFB4357:
	.cfi_startproc
	endbr64
	movq	(%rdi), %rax
	testq	%rax, %rax
	je	.L32
	movq	16(%rdi), %rsi
	movq	%rax, %rdi
	subq	%rax, %rsi
	jmp	_ZdlPvm@PLT
.L32:
	ret
	.cfi_endproc
.LFE4357:
	.size	_ZNSt6vectorIPKcSaIS1_EED2Ev, .-_ZNSt6vectorIPKcSaIS1_EED2Ev
	.weak	_ZNSt6vectorIPKcSaIS1_EED1Ev
	.set	_ZNSt6vectorIPKcSaIS1_EED1Ev,_ZNSt6vectorIPKcSaIS1_EED2Ev
	.section	.text._ZNKSt6vectorIPKcSaIS1_EE12_M_check_lenEmS1_,"axG",@progbits,_ZNKSt6vectorIPKcSaIS1_EE12_M_check_lenEmS1_,comdat
	.align 2
	.weak	_ZNKSt6vectorIPKcSaIS1_EE12_M_check_lenEmS1_
	.type	_ZNKSt6vectorIPKcSaIS1_EE12_M_check_lenEmS1_, @function
_ZNKSt6vectorIPKcSaIS1_EE12_M_check_lenEmS1_:
.LFB4629:
	.cfi_startproc
	endbr64
	movq	%rdi, %rax
	movq	%rdx, %rdi
	movq	8(%rax), %rcx
	subq	(%rax), %rcx
	movabsq	$1152921504606846975, %rax
	sarq	$3, %rcx
	movq	%rax, %rdx
	subq	%rcx, %rdx
	cmpq	%rsi, %rdx
	jnb	.L35
	pushq	%rax
	.cfi_def_cfa_offset 16
	call	_ZSt20__throw_length_errorPKc@PLT
.L35:
	.cfi_def_cfa_offset 8
	cmpq	%rcx, %rsi
	cmovb	%rcx, %rsi
	addq	%rsi, %rcx
	jc	.L34
	movabsq	$1152921504606846975, %rax
	cmpq	%rax, %rcx
	cmovbe	%rcx, %rax
.L34:
	ret
	.cfi_endproc
.LFE4629:
	.size	_ZNKSt6vectorIPKcSaIS1_EE12_M_check_lenEmS1_, .-_ZNKSt6vectorIPKcSaIS1_EE12_M_check_lenEmS1_
	.section	.rodata.str1.1
.LC6:
	.string	"vector::_M_realloc_insert"
.LC7:
	.string	" \t"
.LC8:
	.string	"-0123456789"
.LC9:
	.string	"NAN A "
.LC10:
	.string	"Summing"
.LC11:
	.string	"NAN: "
	.section	.text.startup
	.globl	main
	.type	main, @function
main:
.LFB4008:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA4008
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register 6
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	.cfi_offset 15, -24
	.cfi_offset 14, -32
	.cfi_offset 13, -40
	.cfi_offset 12, -48
	.cfi_offset 3, -56
	movq	%rsi, %rbx
	leaq	-200(%rbp), %rsi
	subq	$360, %rsp
	movq	8(%rbx), %rdi
	movq	%fs:40, %rax
	movq	%rax, -56(%rbp)
	xorl	%eax, %eax
	xorl	%eax, %eax
	movq	%rax, -296(%rbp)
	movq	%rax, -288(%rbp)
	movq	%rax, -280(%rbp)
	call	stat@PLT
	movq	-152(%rbp), %rax
	xorl	%edx, %edx
	xorl	%esi, %esi
	movq	8(%rbx), %rdi
	movq	%rax, -328(%rbp)
	xorl	%eax, %eax
.LEHB0:
	call	open@PLT
	movq	-328(%rbp), %rsi
	xorl	%edi, %edi
	movl	%eax, %r8d
	xorl	%r9d, %r9d
	movl	$1, %edx
	movl	$32770, %ecx
	call	mmap@PLT
	leaq	.LC6(%rip), %rdx
	movl	$1, %esi
	movq	%rax, -320(%rbp)
	leaq	-296(%rbp), %rax
	movq	%rax, %rdi
	movq	%rax, -344(%rbp)
	call	_ZNKSt6vectorIPKcSaIS1_EE12_M_check_lenEmS1_
	movq	%rax, %rdi
	movq	%rax, %rbx
	call	_ZNSt12_Vector_baseIPKcSaIS1_EE11_M_allocateEm.isra.0
	movq	-320(%rbp), %rcx
	leaq	8(%rax), %rdx
	movq	%rax, -296(%rbp)
	xorl	%r15d, %r15d
	movq	%rdx, -288(%rbp)
	movq	%rcx, (%rax)
	leaq	(%rax,%rbx,8), %rax
	movq	%rcx, %rdx
	movq	%rax, -280(%rbp)
	movq	-328(%rbp), %rax
	addq	%rcx, %rax
	movq	%rax, -352(%rbp)
.L44:
	movq	-352(%rbp), %rcx
	cmpq	%rcx, %rdx
	je	.L79
	leaq	1(%rdx), %rax
	cmpb	$10, (%rdx)
	movq	%rax, -312(%rbp)
	jne	.L45
	movq	-288(%rbp), %rbx
	movq	-280(%rbp), %r14
	cmpq	%r14, %rbx
	je	.L46
	movq	%rax, (%rbx)
	addq	$8, %rbx
	movq	%rbx, -288(%rbp)
	jmp	.L47
.L46:
	movq	-344(%rbp), %rdi
	leaq	.LC6(%rip), %rdx
	movl	$1, %esi
	call	_ZNKSt6vectorIPKcSaIS1_EE12_M_check_lenEmS1_
	movq	-296(%rbp), %r12
	movq	%rax, %rdi
	movq	%rax, -336(%rbp)
	subq	%r12, %rbx
	call	_ZNSt12_Vector_baseIPKcSaIS1_EE11_M_allocateEm.isra.0
	movq	%rax, %r13
	movq	-312(%rbp), %rax
	movq	%rax, 0(%r13,%rbx)
	testq	%rbx, %rbx
	jle	.L48
	movq	%rbx, %rdx
	movq	%r12, %rsi
	movq	%r13, %rdi
	call	memmove@PLT
.L48:
	leaq	8(%r13,%rbx), %rbx
	testq	%r12, %r12
	je	.L49
	movq	%r14, %rsi
	movq	%r12, %rdi
	subq	%r12, %rsi
	call	_ZdlPvm@PLT
.L49:
	movq	-336(%rbp), %rax
	movq	%r13, -296(%rbp)
	movq	%rbx, -288(%rbp)
	leaq	0(%r13,%rax,8), %rax
	movq	%rax, -280(%rbp)
.L47:
	incl	%r15d
.L45:
	movq	-312(%rbp), %rdx
	jmp	.L44
.L79:
	leal	(%r15,%r15,2), %eax
	movl	%eax, -336(%rbp)
	movslq	%eax, %rbx
	movabsq	$2305843009213693950, %rax
	cmpq	%rbx, %rax
	jb	.L51
	salq	$2, %rbx
	movq	%rbx, %rdi
	call	_Znam@PLT
	movq	%rbx, %rdi
	movq	%rax, -312(%rbp)
	call	_Znam@PLT
	jmp	.L80
.L51:
	movq	-56(%rbp), %rax
	subq	%fs:40, %rax
	jne	.L76
	call	__cxa_throw_bad_array_new_length@PLT
.L80:
	movq	%rax, %r13
	movl	%r15d, %eax
	imull	%r15d, %eax
	movslq	%eax, %rdi
	movl	%eax, -356(%rbp)
	salq	$2, %rdi
	call	_Znam@PLT
	leal	0(,%r15,4), %ebx
	cmpb	$0, _ZL22__nv_inited_managed_rt(%rip)
	movq	%rax, %r12
	movslq	%ebx, %rbx
	jne	.L54
	movq	_ZL32__nv_fatbinhandle_for_managed_rt(%rip), %rdi
	call	__cudaInitModule@PLT
	movb	%al, _ZL22__nv_inited_managed_rt(%rip)
.L54:
	movq	_ZL3res(%rip), %rdi
	movl	$1, %edx
	movq	%rbx, %rsi
	call	cudaMallocManaged@PLT
	movq	-312(%rbp), %rcx
	movslq	%r15d, %rax
	movq	%r13, %r14
	xorl	%ebx, %ebx
	leaq	(%rcx,%rax,4), %rax
	movq	%rax, -392(%rbp)
	leal	(%r15,%r15), %eax
	leaq	(%rcx,%rax,4), %rax
	movq	%rax, -384(%rbp)
.L55:
	movl	%ebx, -344(%rbp)
	cmpl	%ebx, %r15d
	jle	.L81
	movq	-296(%rbp), %rax
	leaq	.LC7(%rip), %rsi
	movq	(%rax,%rbx,8), %rax
	movq	%rax, %rdi
	movq	%rax, -352(%rbp)
	call	strpbrk@PLT
	leaq	.LC8(%rip), %rsi
	movq	%rax, %rdi
	call	strpbrk@PLT
	leaq	.LC7(%rip), %rsi
	movq	%rax, %rdi
	movq	%rax, -368(%rbp)
	call	strpbrk@PLT
	leaq	.LC8(%rip), %rsi
	movq	%rax, %rdi
	call	strpbrk@PLT
	movq	-352(%rbp), %rdi
	movq	%rax, -376(%rbp)
	call	atof@PLT
	movq	-312(%rbp), %rax
	movq	-368(%rbp), %rdi
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, (%r14)
	movss	%xmm0, (%rax,%rbx,4)
	call	atof@PLT
	movq	-392(%rbp), %rax
	movq	-376(%rbp), %rdi
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, 4(%r14)
	movss	%xmm0, (%rax,%rbx,4)
	call	atof@PLT
	movq	-384(%rbp), %rax
	movl	$1000, %ecx
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, 8(%r14)
	movss	%xmm0, (%rax,%rbx,4)
	movl	-344(%rbp), %eax
	cltd
	idivl	%ecx
	testl	%edx, %edx
	jne	.L56
	movl	-344(%rbp), %esi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZNSolsEi@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
.L56:
	incq	%rbx
	addq	$12, %r14
	jmp	.L55
.L81:
	xorl	%ebx, %ebx
.L58:
	movl	%ebx, %r14d
	cmpl	%ebx, -336(%rbp)
	jle	.L82
	movq	-312(%rbp), %rax
	movss	(%rax,%rbx,4), %xmm0
	ucomiss	%xmm0, %xmm0
	jnp	.L59
	leaq	.LC9(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	movl	%r14d, %esi
	call	_ZNSolsEi@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
.L59:
	movss	0(%r13,%rbx,4), %xmm0
	ucomiss	%xmm0, %xmm0
	jnp	.L60
	leaq	.LC9(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	movl	%r14d, %esi
	call	_ZNSolsEi@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
.L60:
	incq	%rbx
	jmp	.L58
.L82:
	movq	-328(%rbp), %rsi
	movq	-320(%rbp), %rdi
	call	munmap@PLT
	movl	%r15d, -224(%rbp)
	subq	$80, %rsp
	movabsq	$12884901891, %rax
	movl	%r15d, -220(%rbp)
	movl	%r15d, -216(%rbp)
	movups	-224(%rbp), %xmm1
	movq	%rax, -244(%rbp)
	movl	$3, -272(%rbp)
	movl	%r15d, -268(%rbp)
	movl	%r15d, -264(%rbp)
	movl	%r15d, -248(%rbp)
	movq	%r12, 64(%rsp)
	movups	%xmm1, 48(%rsp)
	movups	-248(%rbp), %xmm2
	movq	%r13, 40(%rsp)
	movups	%xmm2, 24(%rsp)
	movups	-272(%rbp), %xmm3
	movups	%xmm3, (%rsp)
	movq	-312(%rbp), %rax
	movq	%rax, 16(%rsp)
	.cfi_escape 0x2e,0x50
	call	_Z6MatMul6MatrixS_S_
	addq	$80, %rsp
	.cfi_escape 0x2e,0
	call	cudaDeviceSynchronize@PLT
	leaq	.LC10(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movq	$0x000000000, -312(%rbp)
	xorl	%ebx, %ebx
	movl	$100000000, %r14d
.L62:
	movl	%ebx, %r13d
	cmpl	%ebx, -356(%rbp)
	jle	.L83
	movl	%r13d, %eax
	cvtss2sd	(%r12,%rbx,4), %xmm0
	addsd	-312(%rbp), %xmm0
	cltd
	idivl	%r14d
	movsd	%xmm0, -312(%rbp)
	testl	%edx, %edx
	jne	.L63
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
.L63:
	movss	(%r12,%rbx,4), %xmm0
	ucomiss	%xmm0, %xmm0
	jnp	.L64
	leaq	.LC11(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	movl	%r13d, %esi
	call	_ZNSolsEi@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
.L64:
	incq	%rbx
	jmp	.L62
.L83:
	movsd	-312(%rbp), %xmm0
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
.LEHE0:
	leaq	-296(%rbp), %rdi
	call	_ZNSt6vectorIPKcSaIS1_EED1Ev
	movq	-56(%rbp), %rax
	subq	%fs:40, %rax
	je	.L68
	jmp	.L76
.L70:
	endbr64
	movq	%rax, %rbx
.L66:
	leaq	-296(%rbp), %rdi
	call	_ZNSt6vectorIPKcSaIS1_EED1Ev
	movq	-56(%rbp), %rax
	subq	%fs:40, %rax
	jne	.L76
	movq	%rbx, %rdi
.LEHB1:
	call	_Unwind_Resume@PLT
.LEHE1:
.L76:
	call	__stack_chk_fail@PLT
.L68:
	leaq	-40(%rbp), %rsp
	xorl	%eax, %eax
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE4008:
	.globl	__gxx_personality_v0
	.section	.gcc_except_table,"a",@progbits
.LLSDA4008:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE4008-.LLSDACSB4008
.LLSDACSB4008:
	.uleb128 .LEHB0-.LFB4008
	.uleb128 .LEHE0-.LEHB0
	.uleb128 .L70-.LFB4008
	.uleb128 0
	.uleb128 .LEHB1-.LFB4008
	.uleb128 .LEHE1-.LEHB1
	.uleb128 0
	.uleb128 0
.LLSDACSE4008:
	.section	.text.startup
	.size	main, .-main
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	__nv_managed_data__,"aw"
	.align 8
	.type	_ZL3res, @object
	.size	_ZL3res, 8
_ZL3res:
	.zero	8
	.align 8
	.type	_ZL1z, @object
	.size	_ZL1z, 8
_ZL1z:
	.zero	8
	.align 8
	.type	_ZL1y, @object
	.size	_ZL1y, 8
_ZL1y:
	.zero	8
	.align 8
	.type	_ZL1x, @object
	.size	_ZL1x, 8
_ZL1x:
	.zero	8
	.local	_ZL32__nv_fatbinhandle_for_managed_rt
	.comm	_ZL32__nv_fatbinhandle_for_managed_rt,8,8
	.local	_ZL22__nv_inited_managed_rt
	.comm	_ZL22__nv_inited_managed_rt,1,1
	.hidden	DW.ref.__gxx_personality_v0
	.weak	DW.ref.__gxx_personality_v0
	.section	.data.rel.local.DW.ref.__gxx_personality_v0,"awG",@progbits,DW.ref.__gxx_personality_v0,comdat
	.align 8
	.type	DW.ref.__gxx_personality_v0, @object
	.size	DW.ref.__gxx_personality_v0, 8
DW.ref.__gxx_personality_v0:
	.quad	__gxx_personality_v0
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

//#include <omp.h>

#include <hip/hip_runtime.h>
#include <cstdio>
#include <cstdlib>
#include <cstring>
#include <vector>
#include <sys/mman.h>
#include <sys/stat.h>
#include <iostream>
#include <fcntl.h>
#include <cmath>
using namespace std;

__device__ __managed__ float *x, *y, *z, *res;

// Matrices are stored in row-major order:
// M(row, col) = *(M.elements + row * M.stride + col)
typedef struct {
  int width;
  int height;
  int stride; 
  float* elements;
} Matrix;

// Get a matrix element
__device__ float GetElement(const Matrix A, int row, int col)
{
      return A.elements[row * A.stride + col];
}

// Set a matrix element
__device__ void SetElement(Matrix A, int row, int col,
                               float value)
{
      A.elements[row * A.stride + col] = value;
}

// Thread block size
#define BLOCK_SIZE 16

// Get the BLOCK_SIZExBLOCK_SIZE sub-matrix Asub of A that is
// located col sub-matrices to the right and row sub-matrices down
// from the upper-left corner of A
 __device__ Matrix GetSubMatrixA(Matrix A, int row, int col) 
{
      Matrix Asub;
      Asub.width    = 3;
      Asub.height   = BLOCK_SIZE;
      Asub.stride   = A.stride;
      Asub.elements = &A.elements[A.stride * BLOCK_SIZE * row
                                  + A.width * col];
      return Asub;
}
 __device__ Matrix GetSubMatrixB(Matrix A, int row, int col) 
{
      Matrix Asub;
      Asub.width    = BLOCK_SIZE;
      Asub.height   = 3;
      Asub.stride   = A.stride;
      Asub.elements = &A.elements[A.stride * A.height * row
                                  + BLOCK_SIZE * col];
      return Asub;
}
 __device__ Matrix GetSubMatrixC(Matrix A, int row, int col) 
{
      Matrix Asub;
      Asub.width    = BLOCK_SIZE;
      Asub.height   = BLOCK_SIZE;
      Asub.stride   = A.stride;
      Asub.elements = &A.elements[A.stride * BLOCK_SIZE * row
                                  + BLOCK_SIZE * col];
      return Asub;
}


// Forward declaration of the matrix multiplication kernel
//__global__ void MatMulKernel(*float, *float, *float, int, int, int, int, int, int);


__global__ void MatMulKernel(float* A, float* B, float* C, int ARows, int ACols, int BRows,
    int BCols, int CRows, int CCols)
{
    float CValue = 0;

    int Row = blockIdx.y*BLOCK_SIZE + threadIdx.y;
    int Col = blockIdx.x*BLOCK_SIZE + threadIdx.x;

    __shared__ float As[BLOCK_SIZE][BLOCK_SIZE];
    __shared__ float Bs[BLOCK_SIZE][BLOCK_SIZE];

    for (int k = 0; k < (BLOCK_SIZE + ACols - 1)/BLOCK_SIZE; k++) {

         if (k*BLOCK_SIZE + threadIdx.x < ACols && Row < ARows)
             As[threadIdx.y][threadIdx.x] = A[Row*ACols + k*BLOCK_SIZE + threadIdx.x];
         else
             As[threadIdx.y][threadIdx.x] = 0.0;

         if (k*BLOCK_SIZE + threadIdx.y < BRows && Col < BCols)
             Bs[threadIdx.y][threadIdx.x] = B[(k*BLOCK_SIZE + threadIdx.y)*BCols + Col];
         else
             Bs[threadIdx.y][threadIdx.x] = 0.0;

         __syncthreads();
         for (int n = 0; n < BLOCK_SIZE; ++n)
             CValue += (As[threadIdx.y][n] - Bs[n][threadIdx.x])*(As[threadIdx.y][n] - Bs[n][threadIdx.x]);

         __syncthreads();
    }

    if (Row < CRows && Col < CCols){ 
         if(CValue>0)
           CValue=1/sqrt(CValue);
         else
           CValue=0;
        C[((blockIdx.y * blockDim.y + threadIdx.y)*CCols) +
           (blockIdx.x * blockDim.x)+ threadIdx.x] = CValue;
    }
}

// Matrix multiplication - Host code
// Matrix dimensions are assumed to be multiples of BLOCK_SIZE
void MatMul(const Matrix A, const Matrix B, Matrix C)
{
    // Load A and B to device memory
    Matrix d_A;
    d_A.width = d_A.stride = A.width; d_A.height = A.height;
    size_t size = A.width * A.height * sizeof(float);
    hipMalloc(&d_A.elements, size);
    hipMemcpy(d_A.elements, A.elements, size,
               hipMemcpyHostToDevice);
    Matrix d_B;
    d_B.width = d_B.stride = B.width; d_B.height = B.height;
    size = B.width * B.height * sizeof(float);
    hipMalloc(&d_B.elements, size);
    hipMemcpy(d_B.elements, B.elements, size,
    hipMemcpyHostToDevice);

    // Allocate C in device memory
    Matrix d_C;
    d_C.width = d_C.stride = C.width; d_C.height = C.height;
    size = C.width * C.height * sizeof(float);
    hipMalloc(&d_C.elements, size);

    // Invoke kernel
    dim3 dimBlock(BLOCK_SIZE, BLOCK_SIZE);
    dim3 dimGrid((B.width+dimBlock.x-1) / dimBlock.x, (A.height+dimBlock.y-1) / dimBlock.y);
    MatMulKernel<<<dimGrid, dimBlock>>>(d_A.elements, d_B.elements, d_C.elements, d_A.height, d_A.width, d_B.height, d_B.width, d_C.height, d_C.width);

    // Read C from device memory
    hipMemcpy(C.elements, d_C.elements, size,
               hipMemcpyDeviceToHost);

    // Free device memory
    hipFree(d_A.elements);
    hipFree(d_B.elements);
    hipFree(d_C.elements);
}


/*__global__ void calcGravity(const size_t n){
  int row = blockIdx.y*blockDim.x + threadIdx.y;
  int col = blockIdx.x*blockDim.x + threadIdx.x;

  __shared__ float A[blockDim.x][3];
  __shared__ float B[3][blockDim.x];

  if(threadIdx.y==0){
    A[threadIdx.x][0]=B[0][threadIdx.x]; 
    A[threadIdx.x][1]=B[1][threadIdx.x]; 
    A[threadIdx.x][2]=B[2][threadIdx.x];
  }
  if(row==0){
    res[col]==0.0f;
  }
  
  if(i<n){
    if(row!=col){
      float d = (A[col][0]-B[0][row]*A[col][0]-B[0][row]);
      d += (A[col][1]-B[1][row]*A[col][1]-B[1][row]);
      d += (A[col][2]-B[2][row]*A[col][2]-B[2][row]);
      atomicAdd(&res[col],=1/sqrt(d));
    }
  }
}*/
int main(int argc, char* argv[]){
  char* &filename = argv[1];
  vector<const char*> lineAddrs;
  struct stat st;
  stat(filename, &st);
  size_t filesize = st.st_size;
  int fd = open(filename,O_RDONLY,0);
  void* file = mmap(NULL,  filesize, PROT_READ, MAP_PRIVATE | MAP_POPULATE, fd, 0);
  const char* input = (const char*) file;
  int lines=0;
  lineAddrs.push_back(input);
  for(int i=0;i<filesize;i++){
    if(input[i]=='\n'){
      lines++;
      lineAddrs.push_back(input+i+1);
    }
  }
  float *valuesA = new float[lines*3];
  float *valuesB = new float[lines*3];
  float *results = new float[lines*lines];
  hipMallocManaged(&res, (int) (lines*sizeof(float)));
  for(int i=0;i<lines;i++){
    const char *a,*b,*c;
    a=lineAddrs[i];
    b=strpbrk(strpbrk(a," \t"),"-0123456789");
    c=strpbrk(strpbrk(b," \t"),"-0123456789");
    valuesA[i]         = valuesB[3*i]   = atof(a);
    valuesA[lines+i]   = valuesB[3*i+1] = atof(b);
    valuesA[2*lines+i] = valuesB[3*i+2] = atof(c);
    if(!(i%1000)) cout<<i<<endl;
  }
  for(int i=0;i<3*lines;i++){
    if(isnan(valuesA[i])) cout<<"NAN A "<<i<<endl;
    if(isnan(valuesB[i])) cout<<"NAN A "<<i<<endl;
  }
  munmap(file, filesize);
  Matrix A, B, C;
  A.width=3;
  A.height=lines;
  A.stride=lines;
  A.elements=valuesA;
  B.width=lines;
  B.height=3;
  B.stride=3;
  B.elements=valuesB;
  C.width=lines;
  C.height=lines;
  C.stride=lines;
  C.elements=results;
  MatMul(A,B,C);
  /*
  const dim3 block_size(16,16);
  int block_dim=(int) sqrt( (lines + block_size -1)/ 256);
  size_t dim3 grid_size(block_dim,block_dim:wq);
  cout<<"Sending to GPU"<<endl;
  // launch the kernel
  calcGravity<<<grid_size, block_size>>>(lines);
 */
  hipDeviceSynchronize();
  cout<<"Summing"<<endl;
  double total=0.0f;
  for(int i=0;i<lines*lines;i++){
    total+=(double)results[i];
    if(i%100000000 == 0) cout<<total<<endl;
    if(isnan(results[i])) cout<<"NAN: "<<i<<endl;
    //if(i%(lines*1000) == 0) cout<<endl;
  }
  cout<<total<<endl;
  return 0;
}

	.text
	.file	"gravity-tiledgpu.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z27__device_stub__MatMulKernelPfS_S_iiiiii # -- Begin function _Z27__device_stub__MatMulKernelPfS_S_iiiiii
	.type	_Z27__device_stub__MatMulKernelPfS_S_iiiiii,@function
_Z27__device_stub__MatMulKernelPfS_S_iiiiii: # @_Z27__device_stub__MatMulKernelPfS_S_iiiiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$176, %rsp
	.cfi_def_cfa_offset 224
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	20(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	16(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	224(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	232(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	240(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z12MatMulKernelPfS_S_iiiiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$192, %rsp
	.cfi_adjust_cfa_offset -192
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z27__device_stub__MatMulKernelPfS_S_iiiiii, .Lfunc_end0-_Z27__device_stub__MatMulKernelPfS_S_iiiiii
	.cfi_endproc
                                        # -- End function
	.globl	_Z6MatMul6MatrixS_S_            # -- Begin function _Z6MatMul6MatrixS_S_
	.type	_Z6MatMul6MatrixS_S_,@function
_Z6MatMul6MatrixS_S_:                   # @_Z6MatMul6MatrixS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	176(%rsp), %r12
	movl	128(%rsp), %eax
	movl	132(%rsp), %ebx
	leaq	72(%rsp), %r14
	movl	%eax, -8(%r14)
	movl	%eax, -16(%r14)
	movl	%ebx, -12(%r14)
	imull	%ebx, %eax
	movslq	%eax, %r15
	shlq	$2, %r15
	movq	%r14, %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	movq	(%r14), %rdi
	movq	144(%rsp), %rsi
	movq	%r15, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movl	152(%rsp), %r13d
	movl	156(%rsp), %eax
	leaq	48(%rsp), %r14
	movl	%r13d, -8(%r14)
	movl	%r13d, -16(%r14)
	movl	%eax, -12(%r14)
	imull	%r13d, %eax
	movslq	%eax, %r15
	shlq	$2, %r15
	movq	%r14, %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	movq	(%r14), %rdi
	movq	168(%rsp), %rsi
	movq	%r15, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movl	(%r12), %eax
	movl	4(%r12), %ecx
	leaq	24(%rsp), %rdi
	movl	%eax, -8(%rdi)
	movl	%eax, -16(%rdi)
	movl	%ecx, -12(%rdi)
	imull	%eax, %ecx
	movslq	%ecx, %r14
	shlq	$2, %r14
	movq	%r14, %rsi
	callq	hipMalloc
	addl	$15, %r13d
	shrl	$4, %r13d
	addl	$15, %ebx
	shrl	$4, %ebx
	shlq	$32, %rbx
	orq	%r13, %rbx
	movabsq	$68719476752, %rdx              # imm = 0x1000000010
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_2
# %bb.1:
	movq	72(%rsp), %rdi
	movq	48(%rsp), %rsi
	movq	24(%rsp), %rdx
	movl	56(%rsp), %r8d
	movl	60(%rsp), %ecx
	movl	32(%rsp), %eax
	movl	36(%rsp), %r9d
	movl	8(%rsp), %r10d
	movl	12(%rsp), %r11d
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	pushq	%r10
	.cfi_adjust_cfa_offset 8
	pushq	%r11
	.cfi_adjust_cfa_offset 8
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	callq	_Z27__device_stub__MatMulKernelPfS_S_iiiiii
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
.LBB1_2:
	movq	16(%r12), %rdi
	movq	24(%rsp), %rsi
	movq	%r14, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	72(%rsp), %rdi
	callq	hipFree
	movq	48(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	addq	$80, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z6MatMul6MatrixS_S_, .Lfunc_end1-_Z6MatMul6MatrixS_S_
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
.Lfunc_begin0:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception0
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$424, %rsp                      # imm = 0x1A8
	.cfi_def_cfa_offset 480
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %r15
	xorps	%xmm0, %xmm0
	leaq	224(%rsp), %rbx
	movaps	%xmm0, (%rbx)
	movq	$0, 16(%rbx)
	movq	8(%rsi), %rdi
	leaq	280(%rsp), %r14
	movq	%r14, %rsi
	callq	stat
	movq	48(%r14), %rbp
	movq	8(%r15), %rdi
	xorl	%r15d, %r15d
	xorl	%esi, %esi
	xorl	%edx, %edx
	xorl	%eax, %eax
	callq	open
	xorl	%edi, %edi
	movq	%rbp, %rsi
	movl	$1, %edx
	movl	$32770, %ecx                    # imm = 0x8002
	movl	%eax, %r8d
	xorl	%r9d, %r9d
	callq	mmap
	movq	%rax, %r14
	leaq	216(%rsp), %rdx
	movq	%rax, (%rdx)
.Ltmp0:
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	_ZNSt6vectorIPKcSaIS1_EE17_M_realloc_insertIJRKS1_EEEvN9__gnu_cxx17__normal_iteratorIPS1_S3_EEDpOT_
.Ltmp1:
# %bb.1:                                # %_ZNSt6vectorIPKcSaIS1_EE9push_backERKS1_.exit
	movq	%r14, 128(%rsp)                 # 8-byte Spill
	testq	%rbp, %rbp
	je	.LBB2_2
# %bb.47:                               # %.lr.ph.preheader
	movq	%rbp, %r14
	negq	%r14
	xorl	%r13d, %r13d
	movl	$1, %r15d
	leaq	224(%rsp), %rbx
	leaq	208(%rsp), %r12
.LBB2_48:                               # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movq	216(%rsp), %rax
	cmpb	$10, -1(%rax,%r15)
	jne	.LBB2_51
# %bb.49:                               #   in Loop: Header=BB2_48 Depth=1
	addq	%r15, %rax
	movq	%rax, 208(%rsp)
.Ltmp3:
	movq	%rbx, %rdi
	movq	%r12, %rsi
	callq	_ZNSt6vectorIPKcSaIS1_EE12emplace_backIJS1_EEERS1_DpOT_
.Ltmp4:
# %bb.50:                               # %_ZNSt6vectorIPKcSaIS1_EE9push_backEOS1_.exit
                                        #   in Loop: Header=BB2_48 Depth=1
	incl	%r13d
.LBB2_51:                               #   in Loop: Header=BB2_48 Depth=1
	leaq	(%r14,%r15), %rax
	incq	%rax
	incq	%r15
	cmpq	$1, %rax
	jne	.LBB2_48
# %bb.3:                                # %._crit_edge
	leal	(%r13,%r13,2), %r15d
	movslq	%r15d, %rax
	shlq	$2, %rax
	testl	%r13d, %r13d
	movq	$-1, %rbx
	cmovnsq	%rax, %rbx
	jmp	.LBB2_4
.LBB2_2:
	xorl	%r13d, %r13d
	xorl	%ebx, %ebx
.LBB2_4:                                # %._crit_edge.thread
.Ltmp6:
	movq	%rbx, %rdi
	callq	_Znam
	movq	%rax, 72(%rsp)                  # 8-byte Spill
.Ltmp7:
# %bb.5:
.Ltmp9:
	movq	%rbp, 120(%rsp)                 # 8-byte Spill
	movq	%rbx, %rdi
	callq	_Znam
	movq	%rax, 80(%rsp)                  # 8-byte Spill
.Ltmp10:
# %bb.6:
	movl	%r13d, %ebx
	imull	%ebx, %ebx
	leaq	(,%rbx,4), %rdi
.Ltmp12:
	callq	_Znam
.Ltmp13:
# %bb.7:
	movq	%rax, %r12
	leal	(,%r13,4), %eax
	movslq	%eax, %rsi
	movq	res(%rip), %rdi
.Ltmp14:
	movl	$1, %edx
	callq	hipMallocManaged
.Ltmp15:
# %bb.8:                                # %_ZL16hipMallocManagedIfE10hipError_tPPT_mj.exit.preheader
	testl	%r13d, %r13d
	jle	.LBB2_31
# %bb.9:                                # %.lr.ph172
	movq	%r15, 88(%rsp)                  # 8-byte Spill
	movq	%r12, 104(%rsp)                 # 8-byte Spill
	movq	%rbx, 112(%rsp)                 # 8-byte Spill
	leal	(,%r13,2), %eax
	movq	%r13, 96(%rsp)                  # 8-byte Spill
	movl	%r13d, %edx
	movq	72(%rsp), %rcx                  # 8-byte Reload
	movq	%rdx, 136(%rsp)                 # 8-byte Spill
	leaq	(%rcx,%rdx,4), %rdx
	movq	%rdx, 152(%rsp)                 # 8-byte Spill
	leaq	(%rcx,%rax,4), %rax
	movq	%rax, 144(%rsp)                 # 8-byte Spill
	movq	80(%rsp), %r12                  # 8-byte Reload
	addq	$8, %r12
	xorl	%ebp, %ebp
.LBB2_10:                               # =>This Inner Loop Header: Depth=1
	movl	%ebp, %eax
	imulq	$274877907, %rax, %rax          # imm = 0x10624DD3
	shrq	$38, %rax
	imull	$-1000, %eax, %ebx              # imm = 0xFC18
	movq	224(%rsp), %rax
	movq	(%rax,%rbp,8), %r15
	movl	$.L.str, %esi
	movq	%r15, %rdi
	callq	strpbrk
	movl	$.L.str.1, %esi
	movq	%rax, %rdi
	callq	strpbrk
	movq	%rax, %r14
	movl	$.L.str, %esi
	movq	%rax, %rdi
	callq	strpbrk
	movl	$.L.str.1, %esi
	movq	%rax, %rdi
	callq	strpbrk
	movq	%rax, %r13
	movq	%r15, %rdi
	callq	atof
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, -8(%r12)
	movq	72(%rsp), %rax                  # 8-byte Reload
	movss	%xmm0, (%rax,%rbp,4)
	movq	%r14, %rdi
	callq	atof
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, -4(%r12)
	movq	152(%rsp), %rax                 # 8-byte Reload
	movss	%xmm0, (%rax,%rbp,4)
	movq	%r13, %rdi
	callq	atof
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, (%r12)
	movq	144(%rsp), %rax                 # 8-byte Reload
	movss	%xmm0, (%rax,%rbp,4)
	addl	%ebp, %ebx
	jne	.LBB2_15
# %bb.11:                               #   in Loop: Header=BB2_10 Depth=1
.Ltmp17:
	movl	$_ZSt4cout, %edi
	movl	%ebp, %esi
	callq	_ZNSolsEi
.Ltmp18:
# %bb.12:                               #   in Loop: Header=BB2_10 Depth=1
	movq	%rax, %r15
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%r15, %rdi
.Ltmp19:
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp20:
# %bb.13:                               # %.noexc140
                                        #   in Loop: Header=BB2_10 Depth=1
.Ltmp21:
	movsbl	%al, %esi
	movq	%r15, %rdi
	callq	_ZNSo3putEc
.Ltmp22:
# %bb.14:                               # %.noexc141
                                        #   in Loop: Header=BB2_10 Depth=1
.Ltmp23:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp24:
.LBB2_15:                               # %_ZNSolsEPFRSoS_E.exit
                                        #   in Loop: Header=BB2_10 Depth=1
	incq	%rbp
	addq	$12, %r12
	cmpq	%rbp, 136(%rsp)                 # 8-byte Folded Reload
	jne	.LBB2_10
# %bb.16:                               # %.preheader
	movq	96(%rsp), %r13                  # 8-byte Reload
	testl	%r13d, %r13d
	movq	112(%rsp), %rbx                 # 8-byte Reload
	movq	104(%rsp), %r12                 # 8-byte Reload
	movq	88(%rsp), %rax                  # 8-byte Reload
	jle	.LBB2_31
# %bb.17:                               # %.lr.ph174.preheader
	cmpl	$2, %eax
	movl	$1, %r14d
	cmovgel	%eax, %r14d
	xorl	%ebp, %ebp
.LBB2_18:                               # %.lr.ph174
                                        # =>This Inner Loop Header: Depth=1
	movq	72(%rsp), %rax                  # 8-byte Reload
	movss	(%rax,%rbp,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	ucomiss	%xmm0, %xmm0
	jp	.LBB2_19
.LBB2_24:                               # %_ZNSolsEPFRSoS_E.exit118
                                        #   in Loop: Header=BB2_18 Depth=1
	movq	80(%rsp), %rax                  # 8-byte Reload
	movss	(%rax,%rbp,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	ucomiss	%xmm0, %xmm0
	jp	.LBB2_25
.LBB2_30:                               # %_ZNSolsEPFRSoS_E.exit122
                                        #   in Loop: Header=BB2_18 Depth=1
	incq	%rbp
	cmpq	%rbp, %r14
	jne	.LBB2_18
	jmp	.LBB2_31
.LBB2_19:                               #   in Loop: Header=BB2_18 Depth=1
.Ltmp26:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.2, %esi
	movl	$6, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp27:
# %bb.20:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit
                                        #   in Loop: Header=BB2_18 Depth=1
.Ltmp28:
	movl	$_ZSt4cout, %edi
	movl	%ebp, %esi
	callq	_ZNSolsEi
.Ltmp29:
# %bb.21:                               #   in Loop: Header=BB2_18 Depth=1
	movq	%rax, %r15
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%r15, %rdi
.Ltmp30:
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp31:
# %bb.22:                               # %.noexc143
                                        #   in Loop: Header=BB2_18 Depth=1
.Ltmp32:
	movsbl	%al, %esi
	movq	%r15, %rdi
	callq	_ZNSo3putEc
.Ltmp33:
# %bb.23:                               # %.noexc144
                                        #   in Loop: Header=BB2_18 Depth=1
.Ltmp34:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp35:
	jmp	.LBB2_24
.LBB2_25:                               #   in Loop: Header=BB2_18 Depth=1
.Ltmp36:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.2, %esi
	movl	$6, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp37:
# %bb.26:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit120
                                        #   in Loop: Header=BB2_18 Depth=1
.Ltmp38:
	movl	$_ZSt4cout, %edi
	movl	%ebp, %esi
	callq	_ZNSolsEi
.Ltmp39:
# %bb.27:                               #   in Loop: Header=BB2_18 Depth=1
	movq	%rax, %r15
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%r15, %rdi
.Ltmp40:
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp41:
# %bb.28:                               # %.noexc147
                                        #   in Loop: Header=BB2_18 Depth=1
.Ltmp42:
	movsbl	%al, %esi
	movq	%r15, %rdi
	callq	_ZNSo3putEc
.Ltmp43:
# %bb.29:                               # %.noexc148
                                        #   in Loop: Header=BB2_18 Depth=1
.Ltmp44:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp45:
	jmp	.LBB2_30
.LBB2_31:                               # %._crit_edge175
	movq	128(%rsp), %rdi                 # 8-byte Reload
	movq	120(%rsp), %rsi                 # 8-byte Reload
	callq	munmap
	movl	$3, 184(%rsp)
	movl	%r13d, 188(%rsp)
	movl	%r13d, 192(%rsp)
	movq	72(%rsp), %rax                  # 8-byte Reload
	movq	%rax, 200(%rsp)
	movl	%r13d, 256(%rsp)
	movabsq	$12884901891, %rax              # imm = 0x300000003
	movq	%rax, 260(%rsp)
	movq	80(%rsp), %rax                  # 8-byte Reload
	movq	%rax, 272(%rsp)
	movl	%r13d, 160(%rsp)
	movl	%r13d, 164(%rsp)
	movl	%r13d, 168(%rsp)
	movq	%r12, 176(%rsp)
.Ltmp47:
	movq	176(%rsp), %rax
	movq	%rax, 64(%rsp)
	movups	160(%rsp), %xmm0
	movups	%xmm0, 48(%rsp)
	movq	272(%rsp), %rax
	movq	%rax, 40(%rsp)
	movups	256(%rsp), %xmm0
	movups	%xmm0, 24(%rsp)
	movq	200(%rsp), %rax
	movq	%rax, 16(%rsp)
	movups	184(%rsp), %xmm0
	movups	%xmm0, (%rsp)
	callq	_Z6MatMul6MatrixS_S_
.Ltmp48:
# %bb.32:
.Ltmp49:
	callq	hipDeviceSynchronize
.Ltmp50:
# %bb.33:
.Ltmp51:
	movl	$_ZSt4cout, %r14d
	movl	$_ZSt4cout, %edi
	movl	$.L.str.3, %esi
	movl	$7, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp52:
# %bb.34:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit124
	movq	_ZSt4cout(%rip), %rax
	addq	-24(%rax), %r14
.Ltmp53:
	movq	%r14, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp54:
# %bb.35:                               # %.noexc151
.Ltmp55:
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
.Ltmp56:
# %bb.36:                               # %.noexc152
.Ltmp57:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp58:
# %bb.37:                               # %_ZNSolsEPFRSoS_E.exit126.preheader
	testl	%r13d, %r13d
	je	.LBB2_38
# %bb.58:                               # %.lr.ph178.preheader
	cmpl	$1, %ebx
	adcl	$0, %ebx
	xorps	%xmm0, %xmm0
	movsd	%xmm0, 72(%rsp)                 # 8-byte Spill
	xorl	%r14d, %r14d
.LBB2_59:                               # %.lr.ph178
                                        # =>This Inner Loop Header: Depth=1
	movsd	72(%rsp), %xmm1                 # 8-byte Reload
                                        # xmm1 = mem[0],zero
	movl	%r14d, %eax
	imulq	$1441151881, %rax, %rax         # imm = 0x55E63B89
	shrq	$57, %rax
	imull	$-100000000, %eax, %eax         # imm = 0xFA0A1F00
	movss	(%r12,%r14,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	xorps	%xmm2, %xmm2
	cvtss2sd	%xmm0, %xmm2
	addsd	%xmm1, %xmm2
	movsd	%xmm2, 72(%rsp)                 # 8-byte Spill
	addl	%r14d, %eax
	jne	.LBB2_65
# %bb.60:                               #   in Loop: Header=BB2_59 Depth=1
.Ltmp60:
	movl	$_ZSt4cout, %edi
	movsd	72(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	callq	_ZNSo9_M_insertIdEERSoT_
.Ltmp61:
# %bb.61:                               # %_ZNSolsEd.exit129
                                        #   in Loop: Header=BB2_59 Depth=1
	movq	%rax, %r15
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%r15, %rdi
.Ltmp62:
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp63:
# %bb.62:                               # %.noexc155
                                        #   in Loop: Header=BB2_59 Depth=1
.Ltmp64:
	movsbl	%al, %esi
	movq	%r15, %rdi
	callq	_ZNSo3putEc
.Ltmp65:
# %bb.63:                               # %.noexc156
                                        #   in Loop: Header=BB2_59 Depth=1
.Ltmp66:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp67:
# %bb.64:                               # %_ZNSolsEPFRSoS_E.exit131thread-pre-split
                                        #   in Loop: Header=BB2_59 Depth=1
	movss	(%r12,%r14,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
.LBB2_65:                               # %_ZNSolsEPFRSoS_E.exit131
                                        #   in Loop: Header=BB2_59 Depth=1
	ucomiss	%xmm0, %xmm0
	jp	.LBB2_66
.LBB2_71:                               # %_ZNSolsEPFRSoS_E.exit135
                                        #   in Loop: Header=BB2_59 Depth=1
	incq	%r14
	cmpq	%r14, %rbx
	jne	.LBB2_59
	jmp	.LBB2_39
.LBB2_66:                               #   in Loop: Header=BB2_59 Depth=1
.Ltmp68:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.4, %esi
	movl	$5, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp69:
# %bb.67:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit133
                                        #   in Loop: Header=BB2_59 Depth=1
.Ltmp70:
	movl	$_ZSt4cout, %edi
	movl	%r14d, %esi
	callq	_ZNSolsEi
.Ltmp71:
# %bb.68:                               #   in Loop: Header=BB2_59 Depth=1
	movq	%rax, %r15
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%r15, %rdi
.Ltmp72:
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp73:
# %bb.69:                               # %.noexc159
                                        #   in Loop: Header=BB2_59 Depth=1
.Ltmp74:
	movsbl	%al, %esi
	movq	%r15, %rdi
	callq	_ZNSo3putEc
.Ltmp75:
# %bb.70:                               # %.noexc160
                                        #   in Loop: Header=BB2_59 Depth=1
.Ltmp76:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp77:
	jmp	.LBB2_71
.LBB2_38:
	xorps	%xmm0, %xmm0
	movsd	%xmm0, 72(%rsp)                 # 8-byte Spill
.LBB2_39:                               # %_ZNSolsEPFRSoS_E.exit126._crit_edge
.Ltmp79:
	movl	$_ZSt4cout, %edi
	movsd	72(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	callq	_ZNSo9_M_insertIdEERSoT_
.Ltmp80:
# %bb.40:                               # %_ZNSolsEd.exit
	movq	%rax, %rbx
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
.Ltmp81:
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp82:
# %bb.41:                               # %.noexc163
.Ltmp83:
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
.Ltmp84:
# %bb.42:                               # %.noexc164
.Ltmp85:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp86:
# %bb.43:                               # %_ZNSolsEPFRSoS_E.exit137
	movq	224(%rsp), %rdi
	testq	%rdi, %rdi
	je	.LBB2_45
# %bb.44:
	callq	_ZdlPv
.LBB2_45:                               # %_ZNSt6vectorIPKcSaIS1_EED2Ev.exit
	xorl	%eax, %eax
	addq	$424, %rsp                      # imm = 0x1A8
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB2_56:
	.cfi_def_cfa_offset 480
.Ltmp46:
	jmp	.LBB2_73
.LBB2_53:
.Ltmp11:
	jmp	.LBB2_73
.LBB2_52:
.Ltmp8:
	jmp	.LBB2_73
.LBB2_46:
.Ltmp2:
	jmp	.LBB2_73
.LBB2_54:
.Ltmp16:
	jmp	.LBB2_73
.LBB2_72:
.Ltmp87:
	jmp	.LBB2_73
.LBB2_57:
.Ltmp59:
	jmp	.LBB2_73
.LBB2_76:
.Ltmp5:
	jmp	.LBB2_73
.LBB2_77:
.Ltmp78:
	jmp	.LBB2_73
.LBB2_55:
.Ltmp25:
.LBB2_73:
	movq	%rax, %rbx
	movq	224(%rsp), %rdi
	testq	%rdi, %rdi
	je	.LBB2_75
# %bb.74:
	callq	_ZdlPv
.LBB2_75:                               # %_ZNSt6vectorIPKcSaIS1_EED2Ev.exit139
	movq	%rbx, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
	.section	.gcc_except_table,"a",@progbits
	.p2align	2, 0x0
GCC_except_table2:
.Lexception0:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end0-.Lcst_begin0
.Lcst_begin0:
	.uleb128 .Lfunc_begin0-.Lfunc_begin0    # >> Call Site 1 <<
	.uleb128 .Ltmp0-.Lfunc_begin0           #   Call between .Lfunc_begin0 and .Ltmp0
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp0-.Lfunc_begin0           # >> Call Site 2 <<
	.uleb128 .Ltmp1-.Ltmp0                  #   Call between .Ltmp0 and .Ltmp1
	.uleb128 .Ltmp2-.Lfunc_begin0           #     jumps to .Ltmp2
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp3-.Lfunc_begin0           # >> Call Site 3 <<
	.uleb128 .Ltmp4-.Ltmp3                  #   Call between .Ltmp3 and .Ltmp4
	.uleb128 .Ltmp5-.Lfunc_begin0           #     jumps to .Ltmp5
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp6-.Lfunc_begin0           # >> Call Site 4 <<
	.uleb128 .Ltmp7-.Ltmp6                  #   Call between .Ltmp6 and .Ltmp7
	.uleb128 .Ltmp8-.Lfunc_begin0           #     jumps to .Ltmp8
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp9-.Lfunc_begin0           # >> Call Site 5 <<
	.uleb128 .Ltmp10-.Ltmp9                 #   Call between .Ltmp9 and .Ltmp10
	.uleb128 .Ltmp11-.Lfunc_begin0          #     jumps to .Ltmp11
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp12-.Lfunc_begin0          # >> Call Site 6 <<
	.uleb128 .Ltmp15-.Ltmp12                #   Call between .Ltmp12 and .Ltmp15
	.uleb128 .Ltmp16-.Lfunc_begin0          #     jumps to .Ltmp16
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp17-.Lfunc_begin0          # >> Call Site 7 <<
	.uleb128 .Ltmp24-.Ltmp17                #   Call between .Ltmp17 and .Ltmp24
	.uleb128 .Ltmp25-.Lfunc_begin0          #     jumps to .Ltmp25
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp26-.Lfunc_begin0          # >> Call Site 8 <<
	.uleb128 .Ltmp45-.Ltmp26                #   Call between .Ltmp26 and .Ltmp45
	.uleb128 .Ltmp46-.Lfunc_begin0          #     jumps to .Ltmp46
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp47-.Lfunc_begin0          # >> Call Site 9 <<
	.uleb128 .Ltmp58-.Ltmp47                #   Call between .Ltmp47 and .Ltmp58
	.uleb128 .Ltmp59-.Lfunc_begin0          #     jumps to .Ltmp59
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp60-.Lfunc_begin0          # >> Call Site 10 <<
	.uleb128 .Ltmp77-.Ltmp60                #   Call between .Ltmp60 and .Ltmp77
	.uleb128 .Ltmp78-.Lfunc_begin0          #     jumps to .Ltmp78
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp79-.Lfunc_begin0          # >> Call Site 11 <<
	.uleb128 .Ltmp86-.Ltmp79                #   Call between .Ltmp79 and .Ltmp86
	.uleb128 .Ltmp87-.Lfunc_begin0          #     jumps to .Ltmp87
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp86-.Lfunc_begin0          # >> Call Site 12 <<
	.uleb128 .Lfunc_end2-.Ltmp86            #   Call between .Ltmp86 and .Lfunc_end2
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end0:
	.p2align	2, 0x0
                                        # -- End function
	.section	.text._ZNSt6vectorIPKcSaIS1_EE17_M_realloc_insertIJRKS1_EEEvN9__gnu_cxx17__normal_iteratorIPS1_S3_EEDpOT_,"axG",@progbits,_ZNSt6vectorIPKcSaIS1_EE17_M_realloc_insertIJRKS1_EEEvN9__gnu_cxx17__normal_iteratorIPS1_S3_EEDpOT_,comdat
	.weak	_ZNSt6vectorIPKcSaIS1_EE17_M_realloc_insertIJRKS1_EEEvN9__gnu_cxx17__normal_iteratorIPS1_S3_EEDpOT_ # -- Begin function _ZNSt6vectorIPKcSaIS1_EE17_M_realloc_insertIJRKS1_EEEvN9__gnu_cxx17__normal_iteratorIPS1_S3_EEDpOT_
	.p2align	1, 0x90
	.type	_ZNSt6vectorIPKcSaIS1_EE17_M_realloc_insertIJRKS1_EEEvN9__gnu_cxx17__normal_iteratorIPS1_S3_EEDpOT_,@function
_ZNSt6vectorIPKcSaIS1_EE17_M_realloc_insertIJRKS1_EEEvN9__gnu_cxx17__normal_iteratorIPS1_S3_EEDpOT_: # @_ZNSt6vectorIPKcSaIS1_EE17_M_realloc_insertIJRKS1_EEEvN9__gnu_cxx17__normal_iteratorIPS1_S3_EEDpOT_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdx, (%rsp)                    # 8-byte Spill
	movq	%rsi, %r12
	movq	%rdi, %rbx
	movl	$1, %esi
	movl	$.L.str.5, %edx
	callq	_ZNKSt6vectorIPKcSaIS1_EE12_M_check_lenEmS1_
	movq	(%rbx), %r13
	movq	8(%rbx), %r15
	movq	%r12, 8(%rsp)                   # 8-byte Spill
	subq	%r13, %r12
	movq	%r12, %r14
	sarq	$3, %r14
	testq	%rax, %rax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	je	.LBB3_1
# %bb.2:
	movq	%rbx, %rdi
	movq	%rax, %rsi
	xorl	%edx, %edx
	callq	_ZNSt15__new_allocatorIPKcE8allocateEmPKv
	movq	%rax, %rbp
	jmp	.LBB3_3
.LBB3_1:
	xorl	%ebp, %ebp
.LBB3_3:                                # %_ZNSt12_Vector_baseIPKcSaIS1_EE11_M_allocateEm.exit
	movq	(%rsp), %rax                    # 8-byte Reload
	movq	(%rax), %rax
	movq	%rax, (%rbp,%r14,8)
	testq	%r12, %r12
	jle	.LBB3_5
# %bb.4:
	movq	%rbp, %rdi
	movq	%r13, %rsi
	movq	%r12, %rdx
	callq	memmove@PLT
.LBB3_5:                                # %_ZNSt6vectorIPKcSaIS1_EE11_S_relocateEPS1_S4_S4_RS2_.exit
	addq	%rbp, %r12
	addq	$8, %r12
	movq	8(%rsp), %rsi                   # 8-byte Reload
	subq	%rsi, %r15
	testq	%r15, %r15
	jle	.LBB3_7
# %bb.6:
	movq	%r12, %rdi
	movq	%r15, %rdx
	callq	memmove@PLT
.LBB3_7:                                # %_ZNSt6vectorIPKcSaIS1_EE11_S_relocateEPS1_S4_S4_RS2_.exit16
	testq	%r13, %r13
	je	.LBB3_9
# %bb.8:
	movq	%r13, %rdi
	callq	_ZdlPv
.LBB3_9:                                # %_ZNSt12_Vector_baseIPKcSaIS1_EE13_M_deallocateEPS1_m.exit
	addq	%r15, %r12
	movq	%rbp, (%rbx)
	movq	%r12, 8(%rbx)
	movq	16(%rsp), %rax                  # 8-byte Reload
	leaq	(,%rax,8), %rax
	addq	%rbp, %rax
	movq	%rax, 16(%rbx)
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_ZNSt6vectorIPKcSaIS1_EE17_M_realloc_insertIJRKS1_EEEvN9__gnu_cxx17__normal_iteratorIPS1_S3_EEDpOT_, .Lfunc_end3-_ZNSt6vectorIPKcSaIS1_EE17_M_realloc_insertIJRKS1_EEEvN9__gnu_cxx17__normal_iteratorIPS1_S3_EEDpOT_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNKSt6vectorIPKcSaIS1_EE12_M_check_lenEmS1_,"axG",@progbits,_ZNKSt6vectorIPKcSaIS1_EE12_M_check_lenEmS1_,comdat
	.weak	_ZNKSt6vectorIPKcSaIS1_EE12_M_check_lenEmS1_ # -- Begin function _ZNKSt6vectorIPKcSaIS1_EE12_M_check_lenEmS1_
	.p2align	1, 0x90
	.type	_ZNKSt6vectorIPKcSaIS1_EE12_M_check_lenEmS1_,@function
_ZNKSt6vectorIPKcSaIS1_EE12_M_check_lenEmS1_: # @_ZNKSt6vectorIPKcSaIS1_EE12_M_check_lenEmS1_
	.cfi_startproc
# %bb.0:
	movabsq	$1152921504606846975, %rcx      # imm = 0xFFFFFFFFFFFFFFF
	movq	8(%rdi), %r8
	subq	(%rdi), %r8
	sarq	$3, %r8
	movq	%rcx, %rax
	subq	%r8, %rax
	cmpq	%rsi, %rax
	jb	.LBB4_2
# %bb.1:
	cmpq	%rsi, %r8
	cmovaq	%r8, %rsi
	leaq	(%rsi,%r8), %rax
	cmpq	%rcx, %rax
	cmovaeq	%rcx, %rax
	addq	%r8, %rsi
	cmovbq	%rcx, %rax
	retq
.LBB4_2:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movq	%rdx, %rdi
	callq	_ZSt20__throw_length_errorPKc
.Lfunc_end4:
	.size	_ZNKSt6vectorIPKcSaIS1_EE12_M_check_lenEmS1_, .Lfunc_end4-_ZNKSt6vectorIPKcSaIS1_EE12_M_check_lenEmS1_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt15__new_allocatorIPKcE8allocateEmPKv,"axG",@progbits,_ZNSt15__new_allocatorIPKcE8allocateEmPKv,comdat
	.weak	_ZNSt15__new_allocatorIPKcE8allocateEmPKv # -- Begin function _ZNSt15__new_allocatorIPKcE8allocateEmPKv
	.p2align	1, 0x90
	.type	_ZNSt15__new_allocatorIPKcE8allocateEmPKv,@function
_ZNSt15__new_allocatorIPKcE8allocateEmPKv: # @_ZNSt15__new_allocatorIPKcE8allocateEmPKv
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movq	%rsi, %rax
	shrq	$60, %rax
	jne	.LBB5_1
# %bb.3:
	shlq	$3, %rsi
	movq	%rsi, %rdi
	popq	%rax
	.cfi_def_cfa_offset 8
	jmp	_Znwm                           # TAILCALL
.LBB5_1:
	.cfi_def_cfa_offset 16
	shrq	$61, %rsi
	je	.LBB5_2
# %bb.4:
	callq	_ZSt28__throw_bad_array_new_lengthv
.LBB5_2:
	callq	_ZSt17__throw_bad_allocv
.Lfunc_end5:
	.size	_ZNSt15__new_allocatorIPKcE8allocateEmPKv, .Lfunc_end5-_ZNSt15__new_allocatorIPKcE8allocateEmPKv
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt6vectorIPKcSaIS1_EE12emplace_backIJS1_EEERS1_DpOT_,"axG",@progbits,_ZNSt6vectorIPKcSaIS1_EE12emplace_backIJS1_EEERS1_DpOT_,comdat
	.weak	_ZNSt6vectorIPKcSaIS1_EE12emplace_backIJS1_EEERS1_DpOT_ # -- Begin function _ZNSt6vectorIPKcSaIS1_EE12emplace_backIJS1_EEERS1_DpOT_
	.p2align	1, 0x90
	.type	_ZNSt6vectorIPKcSaIS1_EE12emplace_backIJS1_EEERS1_DpOT_,@function
_ZNSt6vectorIPKcSaIS1_EE12emplace_backIJS1_EEERS1_DpOT_: # @_ZNSt6vectorIPKcSaIS1_EE12emplace_backIJS1_EEERS1_DpOT_
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movq	%rsi, %rdx
	movq	%rdi, %rbx
	movq	8(%rdi), %rsi
	cmpq	16(%rdi), %rsi
	je	.LBB6_2
# %bb.1:
	movq	(%rdx), %rax
	movq	%rax, (%rsi)
	movq	8(%rbx), %rax
	addq	$8, %rax
	movq	%rax, 8(%rbx)
	jmp	.LBB6_3
.LBB6_2:
	movq	%rbx, %rdi
	callq	_ZNSt6vectorIPKcSaIS1_EE17_M_realloc_insertIJS1_EEEvN9__gnu_cxx17__normal_iteratorIPS1_S3_EEDpOT_
	movq	8(%rbx), %rax
.LBB6_3:
	addq	$-8, %rax
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	_ZNSt6vectorIPKcSaIS1_EE12emplace_backIJS1_EEERS1_DpOT_, .Lfunc_end6-_ZNSt6vectorIPKcSaIS1_EE12emplace_backIJS1_EEERS1_DpOT_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt6vectorIPKcSaIS1_EE17_M_realloc_insertIJS1_EEEvN9__gnu_cxx17__normal_iteratorIPS1_S3_EEDpOT_,"axG",@progbits,_ZNSt6vectorIPKcSaIS1_EE17_M_realloc_insertIJS1_EEEvN9__gnu_cxx17__normal_iteratorIPS1_S3_EEDpOT_,comdat
	.weak	_ZNSt6vectorIPKcSaIS1_EE17_M_realloc_insertIJS1_EEEvN9__gnu_cxx17__normal_iteratorIPS1_S3_EEDpOT_ # -- Begin function _ZNSt6vectorIPKcSaIS1_EE17_M_realloc_insertIJS1_EEEvN9__gnu_cxx17__normal_iteratorIPS1_S3_EEDpOT_
	.p2align	1, 0x90
	.type	_ZNSt6vectorIPKcSaIS1_EE17_M_realloc_insertIJS1_EEEvN9__gnu_cxx17__normal_iteratorIPS1_S3_EEDpOT_,@function
_ZNSt6vectorIPKcSaIS1_EE17_M_realloc_insertIJS1_EEEvN9__gnu_cxx17__normal_iteratorIPS1_S3_EEDpOT_: # @_ZNSt6vectorIPKcSaIS1_EE17_M_realloc_insertIJS1_EEEvN9__gnu_cxx17__normal_iteratorIPS1_S3_EEDpOT_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdx, (%rsp)                    # 8-byte Spill
	movq	%rsi, %r12
	movq	%rdi, %rbx
	movl	$1, %esi
	movl	$.L.str.5, %edx
	callq	_ZNKSt6vectorIPKcSaIS1_EE12_M_check_lenEmS1_
	movq	(%rbx), %r13
	movq	8(%rbx), %r15
	movq	%r12, 8(%rsp)                   # 8-byte Spill
	subq	%r13, %r12
	movq	%r12, %r14
	sarq	$3, %r14
	testq	%rax, %rax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	je	.LBB7_1
# %bb.2:
	movq	%rbx, %rdi
	movq	%rax, %rsi
	xorl	%edx, %edx
	callq	_ZNSt15__new_allocatorIPKcE8allocateEmPKv
	movq	%rax, %rbp
	jmp	.LBB7_3
.LBB7_1:
	xorl	%ebp, %ebp
.LBB7_3:                                # %_ZNSt12_Vector_baseIPKcSaIS1_EE11_M_allocateEm.exit
	movq	(%rsp), %rax                    # 8-byte Reload
	movq	(%rax), %rax
	movq	%rax, (%rbp,%r14,8)
	testq	%r12, %r12
	jle	.LBB7_5
# %bb.4:
	movq	%rbp, %rdi
	movq	%r13, %rsi
	movq	%r12, %rdx
	callq	memmove@PLT
.LBB7_5:                                # %_ZNSt6vectorIPKcSaIS1_EE11_S_relocateEPS1_S4_S4_RS2_.exit
	addq	%rbp, %r12
	addq	$8, %r12
	movq	8(%rsp), %rsi                   # 8-byte Reload
	subq	%rsi, %r15
	testq	%r15, %r15
	jle	.LBB7_7
# %bb.6:
	movq	%r12, %rdi
	movq	%r15, %rdx
	callq	memmove@PLT
.LBB7_7:                                # %_ZNSt6vectorIPKcSaIS1_EE11_S_relocateEPS1_S4_S4_RS2_.exit16
	testq	%r13, %r13
	je	.LBB7_9
# %bb.8:
	movq	%r13, %rdi
	callq	_ZdlPv
.LBB7_9:                                # %_ZNSt12_Vector_baseIPKcSaIS1_EE13_M_deallocateEPS1_m.exit
	addq	%r15, %r12
	movq	%rbp, (%rbx)
	movq	%r12, 8(%rbx)
	movq	16(%rsp), %rax                  # 8-byte Reload
	leaq	(,%rax,8), %rax
	addq	%rbp, %rax
	movq	%rax, 16(%rbx)
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end7:
	.size	_ZNSt6vectorIPKcSaIS1_EE17_M_realloc_insertIJS1_EEEvN9__gnu_cxx17__normal_iteratorIPS1_S3_EEDpOT_, .Lfunc_end7-_ZNSt6vectorIPKcSaIS1_EE17_M_realloc_insertIJS1_EEEvN9__gnu_cxx17__normal_iteratorIPS1_S3_EEDpOT_
	.cfi_endproc
                                        # -- End function
	.text
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB8_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB8_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z12MatMulKernelPfS_S_iiiiii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$x, %esi
	movl	$x.managed, %edx
	movl	$.L__unnamed_2, %ecx
	movl	$8, %r8d
	movq	%rbx, %rdi
	movl	$8, %r9d
	callq	__hipRegisterManagedVar
	movl	$y, %esi
	movl	$y.managed, %edx
	movl	$.L__unnamed_3, %ecx
	movl	$8, %r8d
	movq	%rbx, %rdi
	movl	$8, %r9d
	callq	__hipRegisterManagedVar
	movl	$z, %esi
	movl	$z.managed, %edx
	movl	$.L__unnamed_4, %ecx
	movl	$8, %r8d
	movq	%rbx, %rdi
	movl	$8, %r9d
	callq	__hipRegisterManagedVar
	movl	$res, %esi
	movl	$res.managed, %edx
	movl	$.L__unnamed_5, %ecx
	movl	$8, %r8d
	movq	%rbx, %rdi
	movl	$8, %r9d
	callq	__hipRegisterManagedVar
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end8:
	.size	__hip_module_ctor, .Lfunc_end8-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB9_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB9_2:
	retq
.Lfunc_end9:
	.size	__hip_module_dtor, .Lfunc_end9-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	x.managed,@object               # @x.managed
	.local	x.managed
	.comm	x.managed,8,8
	.type	y.managed,@object               # @y.managed
	.local	y.managed
	.comm	y.managed,8,8
	.type	z.managed,@object               # @z.managed
	.local	z.managed
	.comm	z.managed,8,8
	.type	res.managed,@object             # @res.managed
	.local	res.managed
	.comm	res.managed,8,8
	.type	_Z12MatMulKernelPfS_S_iiiiii,@object # @_Z12MatMulKernelPfS_S_iiiiii
	.section	.rodata,"a",@progbits
	.globl	_Z12MatMulKernelPfS_S_iiiiii
	.p2align	3, 0x0
_Z12MatMulKernelPfS_S_iiiiii:
	.quad	_Z27__device_stub__MatMulKernelPfS_S_iiiiii
	.size	_Z12MatMulKernelPfS_S_iiiiii, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	" \t"
	.size	.L.str, 3

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"-0123456789"
	.size	.L.str.1, 12

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"NAN A "
	.size	.L.str.2, 7

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"Summing"
	.size	.L.str.3, 8

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"NAN: "
	.size	.L.str.4, 6

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"vector::_M_realloc_insert"
	.size	.L.str.5, 26

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z12MatMulKernelPfS_S_iiiiii"
	.size	.L__unnamed_1, 29

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"x"
	.size	.L__unnamed_2, 2

	.type	x,@object                       # @x
	.local	x
	.comm	x,8,8
	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"y"
	.size	.L__unnamed_3, 2

	.type	y,@object                       # @y
	.local	y
	.comm	y,8,8
	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"z"
	.size	.L__unnamed_4, 2

	.type	z,@object                       # @z
	.local	z
	.comm	z,8,8
	.type	.L__unnamed_5,@object           # @4
.L__unnamed_5:
	.asciz	"res"
	.size	.L__unnamed_5, 4

	.type	res,@object                     # @res
	.local	res
	.comm	res,8,8
	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z27__device_stub__MatMulKernelPfS_S_iiiiii
	.addrsig_sym __gxx_personality_v0
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Unwind_Resume
	.addrsig_sym x.managed
	.addrsig_sym y.managed
	.addrsig_sym z.managed
	.addrsig_sym res.managed
	.addrsig_sym _Z12MatMulKernelPfS_S_iiiiii
	.addrsig_sym _ZSt4cout
	.addrsig_sym x
	.addrsig_sym y
	.addrsig_sym z
	.addrsig_sym res
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z12MatMulKernelPfS_S_iiiiii ; -- Begin function _Z12MatMulKernelPfS_S_iiiiii
	.globl	_Z12MatMulKernelPfS_S_iiiiii
	.p2align	8
	.type	_Z12MatMulKernelPfS_S_iiiiii,@function
_Z12MatMulKernelPfS_S_iiiiii:           ; @_Z12MatMulKernelPfS_S_iiiiii
; %bb.0:
	s_clause 0x3
	s_load_b128 s[4:7], s[0:1], 0x18
	s_load_b128 s[8:11], s[0:1], 0x0
	s_load_b64 s[12:13], s[0:1], 0x10
	s_load_b64 s[16:17], s[0:1], 0x28
	v_bfe_u32 v1, v0, 10, 10
	v_and_b32_e32 v4, 0x3ff, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshl_add_u32 v5, s15, 4, v1
	v_lshl_add_u32 v0, s14, 4, v4
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s5, 1
	s_cbranch_scc1 .LBB0_9
; %bb.1:                                ; %.lr.ph
	v_dual_mov_b32 v3, 0 :: v_dual_lshlrev_b32 v2, 2, v4
	v_dual_mov_b32 v6, 0 :: v_dual_lshlrev_b32 v7, 6, v1
	v_mul_lo_u32 v9, v5, s5
	s_delay_alu instid0(VALU_DEP_3)
	v_add_nc_u32_e32 v8, 0x400, v2
	v_cmp_gt_i32_e32 vcc_lo, s4, v5
	v_cmp_gt_i32_e64 s2, s7, v0
	v_add_nc_u32_e32 v10, v7, v2
	s_add_i32 s3, s5, 15
	v_add_nc_u32_e32 v11, v8, v7
	s_lshr_b32 s4, s3, 4
	s_mov_b32 s18, 0
.LBB0_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_7 Depth 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_lshl_b32 s19, s18, 4
	v_mov_b32_e32 v2, 0
	v_add_nc_u32_e32 v12, s19, v4
	v_cmp_gt_u32_e64 s3, s5, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s3, vcc_lo, s3
	s_and_saveexec_b32 s20, s3
	s_cbranch_execz .LBB0_4
; %bb.3:                                ;   in Loop: Header=BB0_2 Depth=1
	v_add_nc_u32_e32 v2, v12, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[12:13], 2, v[2:3]
	v_add_co_u32 v12, s3, s8, v12
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v13, s3, s9, v13, s3
	global_load_b32 v2, v[12:13], off
.LBB0_4:                                ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s20
	v_dual_mov_b32 v13, 0 :: v_dual_add_nc_u32 v12, s19, v1
	s_waitcnt vmcnt(0)
	ds_store_b32 v10, v2
	v_cmp_gt_u32_e64 s3, s6, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s3, s2, s3
	s_and_saveexec_b32 s19, s3
	s_cbranch_execz .LBB0_6
; %bb.5:                                ;   in Loop: Header=BB0_2 Depth=1
	v_mad_u64_u32 v[13:14], null, v12, s7, v[0:1]
	v_mov_b32_e32 v14, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[12:13], 2, v[13:14]
	v_add_co_u32 v12, s3, s10, v12
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v13, s3, s11, v13, s3
	global_load_b32 v13, v[12:13], off
.LBB0_6:                                ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s19
	v_mov_b32_e32 v2, v8
	s_mov_b32 s3, 0
	s_waitcnt vmcnt(0)
	ds_store_b32 v11, v13
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB0_7:                                ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_add_nc_u32_e32 v12, s3, v7
	s_add_i32 s3, s3, 4
	ds_load_b32 v13, v2
	ds_load_b32 v12, v12
	v_add_nc_u32_e32 v2, 64, v2
	s_cmp_eq_u32 s3, 64
	s_waitcnt lgkmcnt(0)
	v_sub_f32_e32 v12, v12, v13
	s_delay_alu instid0(VALU_DEP_1)
	v_fmac_f32_e32 v6, v12, v12
	s_cbranch_scc0 .LBB0_7
; %bb.8:                                ;   in Loop: Header=BB0_2 Depth=1
	s_add_i32 s18, s18, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s18, s4
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB0_2
	s_branch .LBB0_10
.LBB0_9:
	v_mov_b32_e32 v6, 0
.LBB0_10:                               ; %Flow86
	v_cmp_gt_i32_e32 vcc_lo, s16, v5
	v_cmp_gt_i32_e64 s2, s17, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, vcc_lo, s2
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_14
; %bb.11:
	v_mov_b32_e32 v2, 0
	v_mov_b32_e32 v0, 0
	s_mov_b32 s3, exec_lo
	v_cmpx_lt_f32_e32 0, v6
	s_cbranch_execz .LBB0_13
; %bb.12:
	v_mul_f32_e32 v0, 0x4f800000, v6
	v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v0, v6, v0, vcc_lo
	v_sqrt_f32_e32 v3, v0
	s_waitcnt_depctr 0xfff
	v_add_nc_u32_e32 v5, -1, v3
	v_add_nc_u32_e32 v6, 1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v7, -v5, v3, v0
	v_fma_f32 v8, -v6, v3, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ge_f32_e64 s2, 0, v7
	v_cndmask_b32_e64 v3, v3, v5, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_lt_f32_e64 s2, 0, v8
	v_cndmask_b32_e64 v3, v3, v6, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v5, 0x37800000, v3
	v_cndmask_b32_e32 v3, v3, v5, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v0, 0x260
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v0, v3, v0, vcc_lo
	v_div_scale_f32 v3, null, v0, v0, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v5, v3
	s_waitcnt_depctr 0xfff
	v_fma_f32 v6, -v3, v5, 1.0
	v_fmac_f32_e32 v5, v6, v5
	v_div_scale_f32 v6, vcc_lo, 1.0, v0, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v7, v6, v5
	v_fma_f32 v8, -v3, v7, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v7, v8, v5
	v_fma_f32 v3, -v3, v7, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v3, v3, v5, v7
	v_div_fixup_f32 v0, v3, v0, 1.0
.LBB0_13:
	s_or_b32 exec_lo, exec_lo, s3
	s_load_b32 s0, s[0:1], 0x3c
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s1, s0, 16
	s_and_b32 s0, s0, 0xffff
	v_mad_u64_u32 v[5:6], null, s15, s1, v[1:2]
	s_mul_i32 s14, s14, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v1, v5, s17
	v_add3_u32 v1, s14, v4, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, vcc_lo, s12, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, s13, v2, vcc_lo
	global_store_b32 v[1:2], v0, off
.LBB0_14:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z12MatMulKernelPfS_S_iiiiii
		.amdhsa_group_segment_fixed_size 2048
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 15
		.amdhsa_next_free_sgpr 21
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z12MatMulKernelPfS_S_iiiiii, .Lfunc_end0-_Z12MatMulKernelPfS_S_iiiiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 848
; NumSgprs: 23
; NumVgprs: 15
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 2048 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 23
; NumVGPRsForWavesPerEU: 15
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.protected	x.managed               ; @x.managed
	.type	x.managed,@object
	.section	.bss,"aw",@nobits
	.globl	x.managed
	.p2align	3, 0x0
x.managed:
	.quad	0
	.size	x.managed, 8

	.protected	y.managed               ; @y.managed
	.type	y.managed,@object
	.globl	y.managed
	.p2align	3, 0x0
y.managed:
	.quad	0
	.size	y.managed, 8

	.protected	z.managed               ; @z.managed
	.type	z.managed,@object
	.globl	z.managed
	.p2align	3, 0x0
z.managed:
	.quad	0
	.size	z.managed, 8

	.protected	res.managed             ; @res.managed
	.type	res.managed,@object
	.globl	res.managed
	.p2align	3, 0x0
res.managed:
	.quad	0
	.size	res.managed, 8

	.protected	x                       ; @x
	.type	x,@object
	.globl	x
	.p2align	3, 0x0
x:
	.quad	0
	.size	x, 8

	.protected	y                       ; @y
	.type	y,@object
	.globl	y
	.p2align	3, 0x0
y:
	.quad	0
	.size	y, 8

	.protected	z                       ; @z
	.type	z,@object
	.globl	z
	.p2align	3, 0x0
z:
	.quad	0
	.size	z, 8

	.protected	res                     ; @res
	.type	res,@object
	.globl	res
	.p2align	3, 0x0
res:
	.quad	0
	.size	res, 8

	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym x.managed
	.addrsig_sym y.managed
	.addrsig_sym z.managed
	.addrsig_sym res.managed
	.addrsig_sym x
	.addrsig_sym y
	.addrsig_sym z
	.addrsig_sym res
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         36
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     by_value
      - .offset:         44
        .size:           4
        .value_kind:     by_value
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         52
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         60
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         62
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         64
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         66
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         68
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         70
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         112
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 2048
    .kernarg_segment_align: 8
    .kernarg_segment_size: 304
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z12MatMulKernelPfS_S_iiiiii
    .private_segment_fixed_size: 0
    .sgpr_count:     23
    .sgpr_spill_count: 0
    .symbol:         _Z12MatMulKernelPfS_S_iiiiii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     15
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
