#include <cuda.h>
#include <stdio.h>
#include <time.h>
#include <stdlib.h>

#define BLOCK_WIDTH 32

// kernel
__global__ void tiledConvolution_2D_Kernel(float* d_m, const float* __restrict__ d_mask, float* d_n, size_t a, size_t b, size_t maskWidth, int N_TILE_WIDTH)
{
    float result = 0;
   
    // indexing variables
    int n_row = blockIdx.y * N_TILE_WIDTH + threadIdx.y;
    int n_col = blockIdx.x * N_TILE_WIDTH + threadIdx.x;
    
    int m_row = n_row - maskWidth / 2;
    int m_col = n_col - maskWidth / 2;
    
    __shared__ float tile_m[BLOCK_WIDTH][BLOCK_WIDTH];
    
    // thread boundary check for loading input tiles
    if(m_row >= 0 && m_row < a && m_col >= 0 && m_col < b)
    {
        tile_m[threadIdx.y][threadIdx.x] = d_m[m_row * b + m_col];
    }
    else
    {
        tile_m[threadIdx.y][threadIdx.x] = 0;
    }
    
    __syncthreads();
    
    // thread boundary check for calculation
    if(threadIdx.y < N_TILE_WIDTH && threadIdx.x < N_TILE_WIDTH && n_row < a && n_col < b)
    {
        for(int i = 0; i < maskWidth; ++i)
        {
            for(int j = 0; j < maskWidth; ++j)
            {
                result += d_mask[i * maskWidth + j] * tile_m[threadIdx.y + i][threadIdx.x + j];
            }
        }
        
        // write result 
        d_n[n_row * b + n_col] = result;
    }
}

// CUDA error checking
void errorCheck(unsigned int line)
{
    cudaError_t cudaError = cudaGetLastError();

    if(cudaError != cudaSuccess)
    {
        printf("CUDA error in line %u in file %s: %s\n", line - 1, __FILE__, cudaGetErrorString(cudaError));
        exit(EXIT_FAILURE);
    }
}

// host function containing kernel call
void convolution_2D(float* m, float* mask, float* n, size_t a, size_t b, size_t maskWidth, int N_TILE_WIDTH)
{
    dim3 numOfBlocks(ceil(b / (float) N_TILE_WIDTH), ceil(a / (float) N_TILE_WIDTH), 1);
    dim3 numOfThreads(BLOCK_WIDTH, BLOCK_WIDTH, 1);

    size_t bytes_m = a * b * sizeof(float);
    size_t bytes_mask = maskWidth * maskWidth * sizeof(float);

    float* d_m;
    float* d_mask;
    float* d_n;

    cudaMalloc((void**) &d_m, bytes_m);
    errorCheck(__LINE__);
    cudaMalloc((void**) &d_mask, bytes_mask);
    errorCheck(__LINE__);
    cudaMalloc((void**) &d_n, bytes_m);
    errorCheck(__LINE__);
    
    cudaMemcpy(d_m, m, bytes_m, cudaMemcpyHostToDevice);
    errorCheck(__LINE__);
    cudaMemcpy(d_mask, mask, bytes_mask, cudaMemcpyHostToDevice);
    errorCheck(__LINE__);

    tiledConvolution_2D_Kernel<<<numOfBlocks, numOfThreads>>>(d_m, d_mask, d_n, a, b, maskWidth,  N_TILE_WIDTH);
    errorCheck(__LINE__);
    
    cudaMemcpy(n, d_n, bytes_m, cudaMemcpyDeviceToHost);
    errorCheck(__LINE__);

    cudaFree(d_m);
    errorCheck(__LINE__);
    cudaFree(d_mask);
    errorCheck(__LINE__);
    cudaFree(d_n);
    errorCheck(__LINE__);
}

int main()
{
    struct timespec start, end;
    
    srand(time(NULL));
    
    size_t a = rand() % 257 + 3840;
    size_t b = rand() % 257 + 3840;
    size_t maskWidth = 11;
    
    int N_TILE_WIDTH = BLOCK_WIDTH - (maskWidth - 1);

    float* m = (float*) malloc(a * b * sizeof(float));
    float* mask = (float*) malloc(maskWidth * maskWidth * sizeof(float));
    float* n = (float*) malloc(a * b * sizeof(float));

    for(int i = 0; i < a * b; ++i)
    {
        m[i] = rand() % 129 - 64;
    }
  
    for(int j = 0; j < maskWidth * maskWidth; ++j)
    {
        mask[j] = rand() % 1001 / 1000.0;
    }

    clock_gettime(CLOCK_REALTIME, &start);
    
    // do convolution
    convolution_2D(m, mask, n, a, b, maskWidth, N_TILE_WIDTH);
    
    clock_gettime(CLOCK_REALTIME, &end);

    time_t execTime = (end.tv_sec - start.tv_sec) * 1000000 + (end.tv_nsec - start.tv_nsec) / 1000;

    printf("Execution time: %d microseconds.", execTime);

    return 0;
}

	.file	"tmpxft_002b0021_00000000-6_tiledConvolution-2D.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2032:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2032:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"/home/ubuntu/Datasets/stackv2/train-structured/daniel0306123/cuda/master/convolution/tiledConvolution-2D.cu"
.LC1:
	.string	"CUDA error in line %u in file %s: %s\n"
	.text
	.globl	_Z10errorCheckj
	.type	_Z10errorCheckj, @function
_Z10errorCheckj:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movl	%edi, %ebx
	call	cudaGetLastError@PLT
	testl	%eax, %eax
	je	.L2
	movl	%eax, %edi
	call	cudaGetErrorString@PLT
	movl	$2, %edi
	leal	-1(%rbx), %edx
	leaq	.LC0(%rip), %rcx
	movq	%rax, %r8
	leaq	.LC1(%rip), %rsi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$1, %edi
	call	exit@PLT
.L2:
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z10errorCheckj, .-_Z10errorCheckj
	.globl	_Z55__device_stub__Z26tiledConvolution_2D_KernelPfPKfS_mmmiPfPKfS_mmmi
	.type	_Z55__device_stub__Z26tiledConvolution_2D_KernelPfPKfS_mmmiPfPKfS_mmmi, @function
_Z55__device_stub__Z26tiledConvolution_2D_KernelPfPKfS_mmmiPfPKfS_mmmi:
.LFB2054:
	.cfi_startproc
	endbr64
	subq	$200, %rsp
	.cfi_def_cfa_offset 208
	movq	%rdi, 40(%rsp)
	leaq	80(%rsp), %rdi
	movq	%rdx, 32(%rsp)
	leaq	64(%rsp), %rdx
	movq	%rcx, 24(%rsp)
	leaq	72(%rsp), %rcx
	movq	%r8, 16(%rsp)
	movq	%r9, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 184(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movq	%rsi, 56(%rsp)
	leaq	92(%rsp), %rsi
	movq	%rax, 128(%rsp)
	leaq	56(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	208(%rsp), %rax
	movq	%rax, 176(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 80(%rsp)
	movl	$1, 88(%rsp)
	movq	%rax, 92(%rsp)
	movl	$1, 100(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L6
	pushq	72(%rsp)
	.cfi_def_cfa_offset 216
	leaq	_Z26tiledConvolution_2D_KernelPfPKfS_mmmi(%rip), %rdi
	pushq	72(%rsp)
	.cfi_def_cfa_offset 224
	movq	108(%rsp), %rcx
	movl	116(%rsp), %r8d
	movq	96(%rsp), %rsi
	movl	104(%rsp), %edx
	leaq	144(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 216
	popq	%rdx
	.cfi_def_cfa_offset 208
.L6:
	movq	184(%rsp), %rax
	subq	%fs:40, %rax
	je	.L8
	call	__stack_chk_fail@PLT
.L8:
	addq	$200, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2054:
	.size	_Z55__device_stub__Z26tiledConvolution_2D_KernelPfPKfS_mmmiPfPKfS_mmmi, .-_Z55__device_stub__Z26tiledConvolution_2D_KernelPfPKfS_mmmiPfPKfS_mmmi
	.globl	_Z26tiledConvolution_2D_KernelPfPKfS_mmmi
	.type	_Z26tiledConvolution_2D_KernelPfPKfS_mmmi, @function
_Z26tiledConvolution_2D_KernelPfPKfS_mmmi:
.LFB2055:
	.cfi_startproc
	endbr64
	jmp	_Z55__device_stub__Z26tiledConvolution_2D_KernelPfPKfS_mmmiPfPKfS_mmmi
	.cfi_endproc
.LFE2055:
	.size	_Z26tiledConvolution_2D_KernelPfPKfS_mmmi, .-_Z26tiledConvolution_2D_KernelPfPKfS_mmmi
	.globl	_Z14convolution_2DPfS_S_mmmi
	.type	_Z14convolution_2DPfS_S_mmmi, @function
_Z14convolution_2DPfS_S_mmmi:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rdi, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rsi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%r9, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%r8, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rcx, %rbx
	subq	$104, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdx, 24(%rsp)
	movl	160(%rsp), %r15d
	cvtsi2ssl	%r15d, %xmm2
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	testq	%rcx, %rcx
	js	.L12
	cvtsi2ssq	%rcx, %xmm0
	jmp	.L13
.L12:
	movq	%rcx, %rax
	movq	%rcx, %rdx
	shrq	%rax
	andl	$1, %edx
	orq	%rdx, %rax
	cvtsi2ssq	%rax, %xmm0
	addss	%xmm0, %xmm0
.L13:
	divss	%xmm2, %xmm0
	movss	%xmm2, 8(%rsp)
	call	ceilf@PLT
	testq	%rbp, %rbp
	movss	8(%rsp), %xmm2
	movaps	%xmm0, %xmm1
	js	.L14
	cvtsi2ssq	%rbp, %xmm0
	jmp	.L15
.L14:
	movq	%rbp, %rax
	movq	%rbp, %rdx
	shrq	%rax
	andl	$1, %edx
	orq	%rdx, %rax
	cvtsi2ssq	%rax, %xmm0
	addss	%xmm0, %xmm0
.L15:
	divss	%xmm2, %xmm0
	movss	%xmm1, 8(%rsp)
	call	ceilf@PLT
	movss	8(%rsp), %xmm1
	leaq	40(%rsp), %rdi
	movl	$1, 72(%rsp)
	cvttss2siq	%xmm0, %rax
	movl	$1, 84(%rsp)
	movl	%eax, 64(%rsp)
	cvttss2siq	%xmm1, %rax
	movl	%eax, 68(%rsp)
	movabsq	$137438953504, %rax
	movq	%rax, 76(%rsp)
	movq	%rbx, %rax
	imulq	%rbp, %rax
	salq	$2, %rax
	movq	%rax, 8(%rsp)
	movq	%r12, %rax
	movq	8(%rsp), %rsi
	imulq	%r12, %rax
	salq	$2, %rax
	movq	%rax, 16(%rsp)
	call	cudaMalloc@PLT
	movl	$76, %edi
	call	_Z10errorCheckj
	movq	16(%rsp), %rsi
	leaq	48(%rsp), %rdi
	call	cudaMalloc@PLT
	movl	$78, %edi
	call	_Z10errorCheckj
	movq	8(%rsp), %rsi
	leaq	56(%rsp), %rdi
	call	cudaMalloc@PLT
	movl	$80, %edi
	call	_Z10errorCheckj
	movq	8(%rsp), %rdx
	movq	40(%rsp), %rdi
	movq	%r14, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movl	$83, %edi
	call	_Z10errorCheckj
	movq	16(%rsp), %rdx
	movq	48(%rsp), %rdi
	movq	%r13, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movl	$85, %edi
	call	_Z10errorCheckj
	movl	84(%rsp), %ecx
	movl	72(%rsp), %esi
	xorl	%r9d, %r9d
	movq	76(%rsp), %rdx
	movq	64(%rsp), %rdi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L16
	pushq	%rax
	.cfi_def_cfa_offset 168
	movq	%rbx, %rcx
	movq	%r12, %r9
	movq	%rbp, %r8
	pushq	%r15
	.cfi_def_cfa_offset 176
	movq	72(%rsp), %rdx
	movq	64(%rsp), %rsi
	movq	56(%rsp), %rdi
	call	_Z55__device_stub__Z26tiledConvolution_2D_KernelPfPKfS_mmmiPfPKfS_mmmi
	popq	%rdx
	.cfi_def_cfa_offset 168
	popq	%rcx
	.cfi_def_cfa_offset 160
.L16:
	movl	$88, %edi
	call	_Z10errorCheckj
	movq	8(%rsp), %rdx
	movq	56(%rsp), %rsi
	movl	$2, %ecx
	movq	24(%rsp), %rdi
	call	cudaMemcpy@PLT
	movl	$91, %edi
	call	_Z10errorCheckj
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movl	$94, %edi
	call	_Z10errorCheckj
	movq	48(%rsp), %rdi
	call	cudaFree@PLT
	movl	$96, %edi
	call	_Z10errorCheckj
	movq	56(%rsp), %rdi
	call	cudaFree@PLT
	movl	$98, %edi
	call	_Z10errorCheckj
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L17
	call	__stack_chk_fail@PLT
.L17:
	addq	$104, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	_Z14convolution_2DPfS_S_mmmi, .-_Z14convolution_2DPfS_S_mmmi
	.section	.rodata.str1.1
.LC3:
	.string	"Execution time: %d microseconds."
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	xorl	%edi, %edi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	$257, %ebx
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	call	time@PLT
	movl	%eax, %edi
	call	srand@PLT
	call	rand@PLT
	cltd
	idivl	%ebx
	addl	$3840, %edx
	movslq	%edx, %rbp
	call	rand@PLT
	cltd
	idivl	%ebx
	movq	%rbp, %rbx
	addl	$3840, %edx
	movslq	%edx, %r12
	imulq	%r12, %rbx
	salq	$2, %rbx
	movq	%rbx, %rdi
	call	malloc@PLT
	movl	$484, %edi
	movq	%rax, %r13
	call	malloc@PLT
	movq	%rbx, %rdi
	movq	%r13, %r15
	addq	%r13, %rbx
	movq	%rax, %r14
	call	malloc@PLT
	movq	%rax, 8(%rsp)
.L20:
	call	rand@PLT
	movl	$129, %ecx
	addq	$4, %r15
	cltd
	idivl	%ecx
	subl	$64, %edx
	cvtsi2ssl	%edx, %xmm0
	movss	%xmm0, -4(%r15)
	cmpq	%rbx, %r15
	jne	.L20
	xorl	%ebx, %ebx
.L21:
	call	rand@PLT
	movl	$1001, %ecx
	cltd
	idivl	%ecx
	cvtsi2sdl	%edx, %xmm0
	divsd	.LC2(%rip), %xmm0
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, (%r14,%rbx,4)
	incq	%rbx
	cmpq	$121, %rbx
	jne	.L21
	leaq	24(%rsp), %rsi
	xorl	%edi, %edi
	call	clock_gettime@PLT
	movq	%rbp, %rcx
	movq	%r12, %r8
	movq	%r14, %rsi
	pushq	%rax
	.cfi_def_cfa_offset 136
	movl	$11, %r9d
	movq	%r13, %rdi
	pushq	$22
	.cfi_def_cfa_offset 144
	movq	24(%rsp), %rdx
	call	_Z14convolution_2DPfS_S_mmmi
	leaq	56(%rsp), %rsi
	xorl	%edi, %edi
	call	clock_gettime@PLT
	popq	%rdx
	.cfi_def_cfa_offset 136
	popq	%rcx
	.cfi_def_cfa_offset 128
	movl	$1000, %esi
	movq	48(%rsp), %rax
	subq	32(%rsp), %rax
	movl	$2, %edi
	cqto
	movq	40(%rsp), %rcx
	subq	24(%rsp), %rcx
	idivq	%rsi
	imulq	$1000000, %rcx, %rcx
	leaq	.LC3(%rip), %rsi
	leaq	(%rcx,%rax), %rdx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L22
	call	__stack_chk_fail@PLT
.L22:
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2029:
	.size	main, .-main
	.section	.rodata.str1.1
.LC4:
	.string	"_Z26tiledConvolution_2D_KernelPfPKfS_mmmi"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2057:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC4(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z26tiledConvolution_2D_KernelPfPKfS_mmmi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2057:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC2:
	.long	0
	.long	1083129856
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <hip/hip_runtime.h>
#include <stdio.h>
#include <time.h>
#include <stdlib.h>

#define BLOCK_WIDTH 32

// kernel
__global__ void tiledConvolution_2D_Kernel(float* d_m, const float* __restrict__ d_mask, float* d_n, size_t a, size_t b, size_t maskWidth, int N_TILE_WIDTH)
{
    float result = 0;
   
    // indexing variables
    int n_row = blockIdx.y * N_TILE_WIDTH + threadIdx.y;
    int n_col = blockIdx.x * N_TILE_WIDTH + threadIdx.x;
    
    int m_row = n_row - maskWidth / 2;
    int m_col = n_col - maskWidth / 2;
    
    __shared__ float tile_m[BLOCK_WIDTH][BLOCK_WIDTH];
    
    // thread boundary check for loading input tiles
    if(m_row >= 0 && m_row < a && m_col >= 0 && m_col < b)
    {
        tile_m[threadIdx.y][threadIdx.x] = d_m[m_row * b + m_col];
    }
    else
    {
        tile_m[threadIdx.y][threadIdx.x] = 0;
    }
    
    __syncthreads();
    
    // thread boundary check for calculation
    if(threadIdx.y < N_TILE_WIDTH && threadIdx.x < N_TILE_WIDTH && n_row < a && n_col < b)
    {
        for(int i = 0; i < maskWidth; ++i)
        {
            for(int j = 0; j < maskWidth; ++j)
            {
                result += d_mask[i * maskWidth + j] * tile_m[threadIdx.y + i][threadIdx.x + j];
            }
        }
        
        // write result 
        d_n[n_row * b + n_col] = result;
    }
}

// CUDA error checking
void errorCheck(unsigned int line)
{
    hipError_t hipError_t = hipGetLastError();

    if(hipError_t != hipSuccess)
    {
        printf("CUDA error in line %u in file %s: %s\n", line - 1, __FILE__, hipGetErrorString(hipError_t));
        exit(EXIT_FAILURE);
    }
}

// host function containing kernel call
void convolution_2D(float* m, float* mask, float* n, size_t a, size_t b, size_t maskWidth, int N_TILE_WIDTH)
{
    dim3 numOfBlocks(ceil(b / (float) N_TILE_WIDTH), ceil(a / (float) N_TILE_WIDTH), 1);
    dim3 numOfThreads(BLOCK_WIDTH, BLOCK_WIDTH, 1);

    size_t bytes_m = a * b * sizeof(float);
    size_t bytes_mask = maskWidth * maskWidth * sizeof(float);

    float* d_m;
    float* d_mask;
    float* d_n;

    hipMalloc((void**) &d_m, bytes_m);
    errorCheck(__LINE__);
    hipMalloc((void**) &d_mask, bytes_mask);
    errorCheck(__LINE__);
    hipMalloc((void**) &d_n, bytes_m);
    errorCheck(__LINE__);
    
    hipMemcpy(d_m, m, bytes_m, hipMemcpyHostToDevice);
    errorCheck(__LINE__);
    hipMemcpy(d_mask, mask, bytes_mask, hipMemcpyHostToDevice);
    errorCheck(__LINE__);

    tiledConvolution_2D_Kernel<<<numOfBlocks, numOfThreads>>>(d_m, d_mask, d_n, a, b, maskWidth,  N_TILE_WIDTH);
    errorCheck(__LINE__);
    
    hipMemcpy(n, d_n, bytes_m, hipMemcpyDeviceToHost);
    errorCheck(__LINE__);

    hipFree(d_m);
    errorCheck(__LINE__);
    hipFree(d_mask);
    errorCheck(__LINE__);
    hipFree(d_n);
    errorCheck(__LINE__);
}

int main()
{
    struct timespec start, end;
    
    srand(time(NULL));
    
    size_t a = rand() % 257 + 3840;
    size_t b = rand() % 257 + 3840;
    size_t maskWidth = 11;
    
    int N_TILE_WIDTH = BLOCK_WIDTH - (maskWidth - 1);

    float* m = (float*) malloc(a * b * sizeof(float));
    float* mask = (float*) malloc(maskWidth * maskWidth * sizeof(float));
    float* n = (float*) malloc(a * b * sizeof(float));

    for(int i = 0; i < a * b; ++i)
    {
        m[i] = rand() % 129 - 64;
    }
  
    for(int j = 0; j < maskWidth * maskWidth; ++j)
    {
        mask[j] = rand() % 1001 / 1000.0;
    }

    clock_gettime(CLOCK_REALTIME, &start);
    
    // do convolution
    convolution_2D(m, mask, n, a, b, maskWidth, N_TILE_WIDTH);
    
    clock_gettime(CLOCK_REALTIME, &end);

    time_t execTime = (end.tv_sec - start.tv_sec) * 1000000 + (end.tv_nsec - start.tv_nsec) / 1000;

    printf("Execution time: %d microseconds.", execTime);

    return 0;
}

	.text
	.file	"tiledConvolution-2D.hip"
	.globl	_Z41__device_stub__tiledConvolution_2D_KernelPfPKfS_mmmi # -- Begin function _Z41__device_stub__tiledConvolution_2D_KernelPfPKfS_mmmi
	.type	_Z41__device_stub__tiledConvolution_2D_KernelPfPKfS_mmmi,@function
_Z41__device_stub__tiledConvolution_2D_KernelPfPKfS_mmmi: # @_Z41__device_stub__tiledConvolution_2D_KernelPfPKfS_mmmi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	16(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z26tiledConvolution_2D_KernelPfPKfS_mmmi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z41__device_stub__tiledConvolution_2D_KernelPfPKfS_mmmi, .Lfunc_end0-_Z41__device_stub__tiledConvolution_2D_KernelPfPKfS_mmmi
	.cfi_endproc
                                        # -- End function
	.globl	_Z10errorCheckj                 # -- Begin function _Z10errorCheckj
	.type	_Z10errorCheckj,@function
_Z10errorCheckj:                        # @_Z10errorCheckj
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movl	%edi, %ebx
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB1_2
# %bb.1:
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.LBB1_2:
	.cfi_def_cfa_offset 16
	decl	%ebx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %edi
	movl	$.L.str.1, %edx
	movl	%ebx, %esi
	movq	%rax, %rcx
	xorl	%eax, %eax
	callq	printf
	movl	$1, %edi
	callq	exit
.Lfunc_end1:
	.size	_Z10errorCheckj, .Lfunc_end1-_Z10errorCheckj
	.cfi_endproc
                                        # -- End function
	.globl	_Z14convolution_2DPfS_S_mmmi    # -- Begin function _Z14convolution_2DPfS_S_mmmi
	.type	_Z14convolution_2DPfS_S_mmmi,@function
_Z14convolution_2DPfS_S_mmmi:           # @_Z14convolution_2DPfS_S_mmmi
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, %r13
	movq	%r8, %rbp
	movq	%rcx, %rbx
	movq	%rdx, 64(%rsp)                  # 8-byte Spill
	movq	%rsi, 56(%rsp)                  # 8-byte Spill
	movq	%rdi, 48(%rsp)                  # 8-byte Spill
	testq	%r8, %r8
	js	.LBB2_1
# %bb.2:
	cvtsi2ss	%rbp, %xmm0
	jmp	.LBB2_3
.LBB2_1:
	movq	%rbp, %rax
	shrq	%rax
	movl	%ebp, %ecx
	andl	$1, %ecx
	orq	%rax, %rcx
	cvtsi2ss	%rcx, %xmm0
	addss	%xmm0, %xmm0
.LBB2_3:
	cvtsi2ssl	128(%rsp), %xmm1
	movss	%xmm1, 8(%rsp)                  # 4-byte Spill
	divss	%xmm1, %xmm0
	callq	ceilf@PLT
	cvttss2si	%xmm0, %r15
	testq	%rbx, %rbx
	js	.LBB2_4
# %bb.5:
	xorps	%xmm0, %xmm0
	cvtsi2ss	%rbx, %xmm0
	jmp	.LBB2_6
.LBB2_4:
	movq	%rbx, %rax
	shrq	%rax
	movl	%ebx, %ecx
	andl	$1, %ecx
	orq	%rax, %rcx
	xorps	%xmm0, %xmm0
	cvtsi2ss	%rcx, %xmm0
	addss	%xmm0, %xmm0
.LBB2_6:
	divss	8(%rsp), %xmm0                  # 4-byte Folded Reload
	callq	ceilf@PLT
	cvttss2si	%xmm0, %r14
	movl	%r15d, %eax
	shlq	$32, %r14
	orq	%rax, %r14
	movq	%rbx, %r12
	imulq	%rbp, %r12
	shlq	$2, %r12
	movq	%r13, 8(%rsp)                   # 8-byte Spill
	imulq	%r13, %r13
	shlq	$2, %r13
	leaq	32(%rsp), %r15
	movq	%r15, %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	movl	$76, %edi
	callq	_Z10errorCheckj
	movq	%rbp, 40(%rsp)                  # 8-byte Spill
	leaq	24(%rsp), %rbp
	movq	%rbp, %rdi
	movq	%r13, %rsi
	callq	hipMalloc
	movl	$78, %edi
	callq	_Z10errorCheckj
	leaq	16(%rsp), %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	movl	$80, %edi
	callq	_Z10errorCheckj
	movq	(%r15), %rdi
	movq	48(%rsp), %rsi                  # 8-byte Reload
	movq	%r12, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movl	$83, %edi
	callq	_Z10errorCheckj
	movq	(%rbp), %rdi
	movq	56(%rsp), %rsi                  # 8-byte Reload
	movq	%r13, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movl	$85, %edi
	callq	_Z10errorCheckj
	movabsq	$137438953504, %rdx             # imm = 0x2000000020
	movq	%r14, %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_8
# %bb.7:
	movq	32(%rsp), %rdi
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdx
	movl	128(%rsp), %eax
	movl	%eax, (%rsp)
	movq	%rbx, %rcx
	movq	40(%rsp), %r8                   # 8-byte Reload
	movq	8(%rsp), %r9                    # 8-byte Reload
	callq	_Z41__device_stub__tiledConvolution_2D_KernelPfPKfS_mmmi
.LBB2_8:
	movl	$88, %edi
	callq	_Z10errorCheckj
	movq	16(%rsp), %rsi
	movq	64(%rsp), %rdi                  # 8-byte Reload
	movq	%r12, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movl	$91, %edi
	callq	_Z10errorCheckj
	movq	32(%rsp), %rdi
	callq	hipFree
	movl	$94, %edi
	callq	_Z10errorCheckj
	movq	24(%rsp), %rdi
	callq	hipFree
	movl	$96, %edi
	callq	_Z10errorCheckj
	movq	16(%rsp), %rdi
	callq	hipFree
	movl	$98, %edi
	callq	_Z10errorCheckj
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z14convolution_2DPfS_S_mmmi, .Lfunc_end2-_Z14convolution_2DPfS_S_mmmi
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI3_0:
	.quad	0x408f400000000000              # double 1000
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:                                # %.lr.ph.preheader
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	xorl	%ebp, %ebp
	xorl	%edi, %edi
	callq	time
	movl	%eax, %edi
	callq	srand
	callq	rand
	movslq	%eax, %r15
	imulq	$2139127681, %r15, %rax         # imm = 0x7F807F81
	movq	%rax, %rcx
	shrq	$63, %rcx
	sarq	$39, %rax
	addl	%ecx, %eax
	movl	%eax, %ecx
	shll	$8, %ecx
	addl	%eax, %ecx
	subl	%ecx, %r15d
	movl	$3840, %r14d                    # imm = 0xF00
	addl	%r14d, %r15d
	callq	rand
	movslq	%eax, %rbx
	imulq	$2139127681, %rbx, %rax         # imm = 0x7F807F81
	movq	%rax, %rcx
	shrq	$63, %rcx
	sarq	$39, %rax
	addl	%ecx, %eax
	movl	%eax, %ecx
	shll	$8, %ecx
	addl	%eax, %ecx
	subl	%ecx, %ebx
	addl	%r14d, %ebx
	movq	%rbx, %r14
	movq	%r15, 16(%rsp)                  # 8-byte Spill
	imulq	%r15, %r14
	leaq	(,%r14,4), %r13
	movq	%r13, %rdi
	callq	malloc
	movq	%rax, %r15
	movl	$484, %edi                      # imm = 0x1E4
	callq	malloc
	movq	%rax, %r12
	movq	%r13, %rdi
	callq	malloc
	movq	%rax, %r13
.LBB3_1:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	cltq
	imulq	$266354561, %rax, %rcx          # imm = 0xFE03F81
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$35, %rcx
	addl	%edx, %ecx
	movl	%ecx, %edx
	shll	$7, %edx
	addl	%ecx, %edx
	negl	%edx
	addl	%edx, %eax
	addl	$-64, %eax
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	movss	%xmm0, (%r15,%rbp,4)
	incq	%rbp
	cmpq	%rbp, %r14
	jne	.LBB3_1
# %bb.2:                                # %.preheader.preheader
	xorl	%r14d, %r14d
.LBB3_3:                                # %.preheader
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	cltq
	imulq	$1098413215, %rax, %rcx         # imm = 0x4178749F
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$40, %rcx
	addl	%edx, %ecx
	imull	$1001, %ecx, %ecx               # imm = 0x3E9
	subl	%ecx, %eax
	xorps	%xmm0, %xmm0
	cvtsi2sd	%eax, %xmm0
	divsd	.LCPI3_0(%rip), %xmm0
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, (%r12,%r14,4)
	incq	%r14
	cmpq	$121, %r14
	jne	.LBB3_3
# %bb.4:
	leaq	40(%rsp), %rbp
	xorl	%edi, %edi
	movq	%rbp, %rsi
	callq	clock_gettime
	movl	$22, (%rsp)
	movl	$11, %r9d
	movq	%r15, %rdi
	movq	%r12, %rsi
	movq	%r13, %rdx
	movq	16(%rsp), %rcx                  # 8-byte Reload
	movq	%rbx, %r8
	callq	_Z14convolution_2DPfS_S_mmmi
	leaq	24(%rsp), %rbx
	xorl	%edi, %edi
	movq	%rbx, %rsi
	callq	clock_gettime
	movq	(%rbx), %rcx
	movq	8(%rbx), %rax
	subq	(%rbp), %rcx
	imulq	$1000000, %rcx, %rcx            # imm = 0xF4240
	subq	8(%rbp), %rax
	movabsq	$2361183241434822607, %rdx      # imm = 0x20C49BA5E353F7CF
	imulq	%rdx
	movq	%rdx, %rsi
	shrq	$63, %rsi
	sarq	$7, %rdx
	addq	%rdx, %rsi
	addq	%rcx, %rsi
	movl	$.L.str.2, %edi
	xorl	%eax, %eax
	callq	printf
	xorl	%eax, %eax
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	main, .Lfunc_end3-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB4_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB4_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z26tiledConvolution_2D_KernelPfPKfS_mmmi, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end4:
	.size	__hip_module_ctor, .Lfunc_end4-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB5_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB5_2:
	retq
.Lfunc_end5:
	.size	__hip_module_dtor, .Lfunc_end5-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z26tiledConvolution_2D_KernelPfPKfS_mmmi,@object # @_Z26tiledConvolution_2D_KernelPfPKfS_mmmi
	.section	.rodata,"a",@progbits
	.globl	_Z26tiledConvolution_2D_KernelPfPKfS_mmmi
	.p2align	3, 0x0
_Z26tiledConvolution_2D_KernelPfPKfS_mmmi:
	.quad	_Z41__device_stub__tiledConvolution_2D_KernelPfPKfS_mmmi
	.size	_Z26tiledConvolution_2D_KernelPfPKfS_mmmi, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"CUDA error in line %u in file %s: %s\n"
	.size	.L.str, 38

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"/home/ubuntu/Datasets/stackv2/train-structured-repos-hip-sm89/daniel0306123/cuda/master/convolution/tiledConvolution-2D.hip"
	.size	.L.str.1, 124

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Execution time: %d microseconds."
	.size	.L.str.2, 33

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z26tiledConvolution_2D_KernelPfPKfS_mmmi"
	.size	.L__unnamed_1, 42

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z41__device_stub__tiledConvolution_2D_KernelPfPKfS_mmmi
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z26tiledConvolution_2D_KernelPfPKfS_mmmi
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z26tiledConvolution_2D_KernelPfPKfS_mmmi ; -- Begin function _Z26tiledConvolution_2D_KernelPfPKfS_mmmi
	.globl	_Z26tiledConvolution_2D_KernelPfPKfS_mmmi
	.p2align	8
	.type	_Z26tiledConvolution_2D_KernelPfPKfS_mmmi,@function
_Z26tiledConvolution_2D_KernelPfPKfS_mmmi: ; @_Z26tiledConvolution_2D_KernelPfPKfS_mmmi
; %bb.0:
	s_clause 0x1
	s_load_b32 s3, s[0:1], 0x30
	s_load_b256 s[4:11], s[0:1], 0x10
	v_bfe_u32 v5, v0, 10, 10
	v_dual_mov_b32 v7, 0 :: v_dual_and_b32 v0, 0x3ff, v0
	s_mov_b32 s12, exec_lo
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[1:2], null, s15, s3, v[5:6]
	v_alignbit_b32 v2, s11, s10, 1
	v_mad_u64_u32 v[3:4], null, s14, s3, v[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v6, v1, v2
	v_cmpx_lt_i32_e32 -1, v6
	s_cbranch_execz .LBB0_6
; %bb.1:
	v_mov_b32_e32 v7, 0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v8, v3, v2
	v_cmp_gt_u64_e32 vcc_lo, s[6:7], v[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_lt_i32_e64 s2, -1, v8
	s_and_b32 s13, s2, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s2, s13
	s_cbranch_execz .LBB0_5
; %bb.2:
	v_mov_b32_e32 v9, 0
	s_mov_b32 s13, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u64_e64 s[8:9], v[8:9]
	s_cbranch_execz .LBB0_4
; %bb.3:
	v_mad_u64_u32 v[10:11], null, v6, s8, 0
	s_load_b64 s[14:15], s[0:1], 0x0
	v_lshlrev_b64 v[8:9], 2, v[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_e32 v2, v11
	v_mad_u64_u32 v[11:12], null, v6, s9, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[6:7], 2, v[10:11]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s14, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, s15, v7, vcc_lo
	v_add_co_u32 v6, vcc_lo, v2, v8
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v7, vcc_lo, v4, v9, vcc_lo
	global_load_b32 v9, v[6:7], off
.LBB0_4:                                ; %Flow90
	s_or_b32 exec_lo, exec_lo, s13
	s_waitcnt vmcnt(0)
	v_mov_b32_e32 v7, v9
.LBB0_5:                                ; %Flow91
	s_or_b32 exec_lo, exec_lo, s2
.LBB0_6:
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s12
	v_lshlrev_b32_e32 v2, 2, v0
	s_mov_b32 s2, exec_lo
	v_lshl_add_u32 v6, v5, 7, v2
	ds_store_b32 v6, v7
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmpx_gt_u32_e64 s3, v5
	s_cbranch_execz .LBB0_15
; %bb.7:
	v_ashrrev_i32_e32 v2, 31, v1
	v_ashrrev_i32_e32 v4, 31, v3
	v_cmp_gt_u32_e64 s2, s3, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_gt_u64_e32 vcc_lo, s[6:7], v[1:2]
	v_cmp_gt_u64_e64 s3, s[8:9], v[3:4]
	s_delay_alu instid0(VALU_DEP_3)
	s_and_b32 s2, s2, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s3, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 exec_lo, exec_lo, s2
	s_cbranch_execz .LBB0_15
; %bb.8:                                ; %.preheader59
	s_cmp_eq_u64 s[10:11], 0
	s_mov_b64 s[2:3], 0
	s_cbranch_scc1 .LBB0_13
; %bb.9:                                ; %.preheader.preheader
	s_load_b64 s[0:1], s[0:1], 0x8
	v_mov_b32_e32 v0, 0
	s_lshl_b64 s[6:7], s[10:11], 2
.LBB0_10:                               ; %.preheader
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_11 Depth 2
	v_mov_b32_e32 v5, v6
	s_mov_b64 s[12:13], 0
	s_waitcnt lgkmcnt(0)
	s_mov_b64 s[14:15], s[0:1]
.LBB0_11:                               ;   Parent Loop BB0_10 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_load_b32 s16, s[14:15], 0x0
	ds_load_b32 v7, v5
	s_add_u32 s12, s12, 1
	s_addc_u32 s13, s13, 0
	v_add_nc_u32_e32 v5, 4, v5
	v_cmp_ge_u64_e64 s17, s[12:13], s[10:11]
	s_add_u32 s14, s14, 4
	s_addc_u32 s15, s15, 0
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 vcc_lo, exec_lo, s17
	s_waitcnt lgkmcnt(0)
	v_fmac_f32_e32 v0, s16, v7
	s_cbranch_vccz .LBB0_11
; %bb.12:                               ;   in Loop: Header=BB0_10 Depth=1
	s_add_u32 s2, s2, 1
	s_addc_u32 s3, s3, 0
	v_add_nc_u32_e32 v6, 0x80, v6
	v_cmp_ge_u64_e64 s12, s[2:3], s[10:11]
	s_add_u32 s0, s0, s6
	s_addc_u32 s1, s1, s7
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 vcc_lo, exec_lo, s12
	s_cbranch_vccz .LBB0_10
	s_branch .LBB0_14
.LBB0_13:
	v_mov_b32_e32 v0, 0
.LBB0_14:                               ; %._crit_edge
	v_mul_lo_u32 v2, v2, s8
	v_mul_lo_u32 v7, v1, s9
	v_mad_u64_u32 v[5:6], null, v1, s8, 0
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v6, v6, v7, v2
	v_lshlrev_b64 v[1:2], 2, v[5:6]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v1, vcc_lo, s4, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s5, v2, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v1, vcc_lo, v1, v3
	v_add_co_ci_u32_e32 v2, vcc_lo, v2, v4, vcc_lo
	global_store_b32 v[1:2], v0, off
.LBB0_15:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z26tiledConvolution_2D_KernelPfPKfS_mmmi
		.amdhsa_group_segment_fixed_size 4096
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 52
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 13
		.amdhsa_next_free_sgpr 18
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z26tiledConvolution_2D_KernelPfPKfS_mmmi, .Lfunc_end0-_Z26tiledConvolution_2D_KernelPfPKfS_mmmi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 656
; NumSgprs: 20
; NumVgprs: 13
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 4096 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 20
; NumVGPRsForWavesPerEU: 13
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .actual_access:  read_only
        .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           8
        .value_kind:     by_value
      - .offset:         32
        .size:           8
        .value_kind:     by_value
      - .offset:         40
        .size:           8
        .value_kind:     by_value
      - .offset:         48
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 4096
    .kernarg_segment_align: 8
    .kernarg_segment_size: 52
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z26tiledConvolution_2D_KernelPfPKfS_mmmi
    .private_segment_fixed_size: 0
    .sgpr_count:     20
    .sgpr_spill_count: 0
    .symbol:         _Z26tiledConvolution_2D_KernelPfPKfS_mmmi.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     13
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
