#include <stdio.h>
#include <stdlib.h>
#include <time.h>

//CUDA RunTime API
#include <cuda_runtime.h>

#define THREAD_NUM 256

#define MATRIX_SIZE 1000

//int blocks_num = MATRIX_SIZE * MATRIX_SIZE / 1024;;
//const int blocks_num = MATRIX_SIZE*(MATRIX_SIZE + THREAD_NUM - 1) / THREAD_NUM;

//打印设备信息
void printDeviceProp(const cudaDeviceProp &prop)
{
	printf("Device Name : %s.\n", prop.name);
	printf("totalFlbalMem : %d.\n", prop.totalGlobalMem);
	printf("sharedMemPerBlock : %d.\n", prop.sharedMemPerBlock);
	printf("regsPerBlock : %d.\n", prop.regsPerBlock);
	printf("warpSize : %d.\n", prop.warpSize);
	printf("memPitch : %d.\n", prop.memPitch);
}

bool InitCUDA()
{
	int count;

	//取得CUDA装置的数目
	cudaGetDeviceCount(&count);

	if(count == 0){
		fprintf(stderr, "There is no device.\n");
		return false;
	}

	int i;

	for(i = 0; i < count; i ++){

		cudaDeviceProp prop;
		cudaGetDeviceProperties(&prop, i);
		if(cudaGetDeviceProperties(&prop, i) == cudaSuccess){
			if(prop.major >= 1){
				break;
			}
		}
	}

	if(i == count){
		fprintf(stderr, "There is no device supporting CUDA 1.x.\n");
		return false;
	}

	cudaSetDevice(i);
	return true;
}

void matgen(float* a, int n)
{
	int i, j;
	for(i = 0; i < n; i++){
		for(j = 0; j < n; j++)
		{
			a[i * n + j] = (float)rand() / RAND_MAX + (float)rand() / (RAND_MAX * RAND_MAX);
		}
	}
}

__global__ static void matMultCUDA(const float* a, const float* b, float* c, int n, clock_t* time, const int* blocks_num)
{
	const int tid = threadIdx.x;
	const int bid = blockIdx.x;
	
	const int idx = bid * THREAD_NUM + tid;
	const int row = idx / n;
	const int column = idx % n;
	
	int i;
	
	 clock_t start;
	 
	 if(tid == 0) 
		 time[bid] = clock();
		 
	if(row < n && column < n){
		float t = 0;
		float y = 0;
		for(i = 0; i < n; i++){
			float r;
			y -= a[row * n + i] * b[i * n + column];
			r = t - y;
			y = (r-t)+y;
			t = r;
		}
		c[row * n + column] = t;
	}
	
	if(tid == 0){
		time[bid + *blocks_num] = clock();
	}
}

int func(int blocks_num)
{
	printf("%d\n", blocks_num);
	if(!InitCUDA()){
		return 0;
	}

	float *a, *b, *c, *d;
	int *e;
	
	int n = MATRIX_SIZE;

	a = (float*)malloc(sizeof(float)* n * n);
	b = (float*)malloc(sizeof(float)* n * n);
	c = (float*)malloc(sizeof(float)* n * n);
	d = (float*)malloc(sizeof(float)* n * n);
	e = (int*)malloc(sizeof(int));
	*e = blocks_num;
	srand(0);

	matgen(a, n);
	matgen(b, n);

	float *cuda_a, *cuda_b, *cuda_c;
	int *cuda_e;
	clock_t* time;

	cudaMalloc((void**)&cuda_a, sizeof(float) * n * n);
	cudaMalloc((void**)&cuda_b, sizeof(float) * n * n);
	cudaMalloc((void**)&cuda_c, sizeof(float) * n * n);
	cudaMalloc((void**)&cuda_e, sizeof(int));
	cudaMalloc((void**)&time, sizeof(clock_t) * blocks_num * 2);

	cudaMemcpy(cuda_a, a, sizeof(float) * n * n, cudaMemcpyHostToDevice);
	cudaMemcpy(cuda_b, b, sizeof(float) * n * n, cudaMemcpyHostToDevice);
	cudaMemcpy(cuda_e, e, sizeof(int), cudaMemcpyHostToDevice);
	matMultCUDA<<<blocks_num, THREAD_NUM, 0>>>(cuda_a, cuda_b, cuda_c, n, time, cuda_e);

	clock_t time_use[blocks_num * 2];

	cudaMemcpy(c, cuda_c, sizeof(float) * n * n, cudaMemcpyDeviceToHost);
	cudaMemcpy(&time_use, time, sizeof(clock_t) * blocks_num * 2, cudaMemcpyHostToDevice);

	cudaFree(cuda_a);
	cudaFree(cuda_b);
	cudaFree(cuda_c);
	cudaFree(time);

	clock_t min_start, max_end;
	min_start = time_use[0];
	max_end = time_use[blocks_num];
	for(int i = 1; i < blocks_num; i++){
		if(min_start > time_use[i]){
			min_start = time_use[i];
		}
		if(max_end < time_use[i + blocks_num]){
			max_end = time_use[i + blocks_num];
		}
	}

	clock_t final_time = max_end - min_start;

	//CPU矩阵乘法，存入d中
	for(int i = 0; i < n; i++){
		for(int j = 0; j < n; j++){
			double t = 0;
			for(int k = 0; k < n; k++){
				t += a[i * n + k] * b[k * n + j];
			}
			d[i * n + j] = t;
		}
	}

	float max_err = 0;
	float average_err = 0;

	for(int i = 0; i < n; i++){
		for(int j = 0; j < n; j++){
			if(d[i * n + j] != 0){
				float err = fabs((c[i * n + j] - d[i * n + j]) / d[i * n + j]);

				if(max_err < err) 
					max_err = err;
					average_err += err;
			}
		}
	}

	printf("Max error: %g Average error: %g\n", max_err, average_err / (n * n));

	printf("gputime: %d\n", final_time);

	return 0;
}


int main()
{
	int blocks_num;
	//blocks_num = MATRIX_SIZE*(MATRIX_SIZE + THREAD_NUM - 1) / THREAD_NUM;
	//func(blocks_num);
	blocks_num = MATRIX_SIZE * MATRIX_SIZE / 1024;;
	func(blocks_num);
	//blocks_num = MATRIX_SIZE*(MATRIX_SIZE + THREAD_NUM - 1) / THREAD_NUM;
	//func(blocks_num);
}

	.file	"tmpxft_00247812_00000000-6_matMultCuda.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2034:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2034:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.type	_ZL43__device_stub__Z11matMultCUDAPKfS0_PfiPlPKiPKfS0_PfiPlPKi, @function
_ZL43__device_stub__Z11matMultCUDAPKfS0_PfiPlPKiPKfS0_PfiPlPKi:
.LFB2056:
	.cfi_startproc
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	64(%rsp), %rcx
	movq	%r8, 8(%rsp)
	movq	%r9, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 152(%rsp)
	movq	%rsp, %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_ZL11matMultCUDAPKfS0_PfiPlPKi(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L2:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2056:
	.size	_ZL43__device_stub__Z11matMultCUDAPKfS0_PfiPlPKiPKfS0_PfiPlPKi, .-_ZL43__device_stub__Z11matMultCUDAPKfS0_PfiPlPKiPKfS0_PfiPlPKi
	.type	_ZL11matMultCUDAPKfS0_PfiPlPKi, @function
_ZL11matMultCUDAPKfS0_PfiPlPKi:
.LFB2057:
	.cfi_startproc
	endbr64
	jmp	_ZL43__device_stub__Z11matMultCUDAPKfS0_PfiPlPKiPKfS0_PfiPlPKi
	.cfi_endproc
.LFE2057:
	.size	_ZL11matMultCUDAPKfS0_PfiPlPKi, .-_ZL11matMultCUDAPKfS0_PfiPlPKi
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"Device Name : %s.\n"
.LC1:
	.string	"totalFlbalMem : %d.\n"
.LC2:
	.string	"sharedMemPerBlock : %d.\n"
.LC3:
	.string	"regsPerBlock : %d.\n"
.LC4:
	.string	"warpSize : %d.\n"
.LC5:
	.string	"memPitch : %d.\n"
	.text
	.globl	_Z15printDevicePropRK14cudaDeviceProp
	.type	_Z15printDevicePropRK14cudaDeviceProp, @function
_Z15printDevicePropRK14cudaDeviceProp:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movq	%rdi, %rdx
	movq	%rdi, %rbx
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	288(%rbx), %rdx
	leaq	.LC1(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movq	296(%rbx), %rdx
	leaq	.LC2(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	304(%rbx), %edx
	leaq	.LC3(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	308(%rbx), %edx
	leaq	.LC4(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movq	312(%rbx), %rdx
	leaq	.LC5(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	__printf_chk@PLT
	.cfi_endproc
.LFE2027:
	.size	_Z15printDevicePropRK14cudaDeviceProp, .-_Z15printDevicePropRK14cudaDeviceProp
	.section	.rodata.str1.1
.LC6:
	.string	"There is no device.\n"
.LC7:
	.string	"There is no device supporting CUDA 1.x.\n"
	.text
	.globl	_Z8InitCUDAv
	.type	_Z8InitCUDAv, @function
_Z8InitCUDAv:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	subq	$1064, %rsp
	.cfi_def_cfa_offset 1088
	movq	%fs:40, %rax
	movq	%rax, 1048(%rsp)
	xorl	%eax, %eax
	leaq	12(%rsp), %rdi
	call	cudaGetDeviceCount@PLT
	cmpl	$0, 12(%rsp)
	leaq	.LC6(%rip), %rdx
	je	.L24
	xorl	%ebx, %ebx
	leaq	16(%rsp), %rbp
.L11:
	cmpl	%ebx, 12(%rsp)
	jle	.L15
	movl	%ebx, %esi
	movq	%rbp, %rdi
	call	cudaGetDeviceProperties_v2@PLT
	movl	%ebx, %esi
	movq	%rbp, %rdi
	call	cudaGetDeviceProperties_v2@PLT
	testl	%eax, %eax
	jne	.L13
	cmpl	$0, 376(%rsp)
	jg	.L15
.L13:
	incl	%ebx
	jmp	.L11
.L15:
	cmpl	%ebx, 12(%rsp)
	jne	.L17
	leaq	.LC7(%rip), %rdx
.L24:
	movq	stderr(%rip), %rdi
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	xorl	%eax, %eax
	jmp	.L10
.L17:
	movl	%ebx, %edi
	call	cudaSetDevice@PLT
	movb	$1, %al
.L10:
	movq	1048(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L19
	call	__stack_chk_fail@PLT
.L19:
	addq	$1064, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	_Z8InitCUDAv, .-_Z8InitCUDAv
	.globl	_Z6matgenPfi
	.type	_Z6matgenPfi, @function
_Z6matgenPfi:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	movslq	%esi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	xorl	%r12d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	movq	%r13, %rbp
	salq	$2, %r13
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	movq	%rdi, %rbx
	subq	$16, %rsp
	.cfi_def_cfa_offset 64
.L26:
	cmpl	%ebp, %r12d
	jge	.L31
	leaq	(%rbx,%r13), %r14
.L27:
	call	rand@PLT
	addq	$4, %rbx
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC8(%rip), %xmm0
	movss	%xmm0, 12(%rsp)
	call	rand@PLT
	cvtsi2ssl	%eax, %xmm0
	addss	12(%rsp), %xmm0
	movss	%xmm0, -4(%rbx)
	cmpq	%r14, %rbx
	jne	.L27
	incl	%r12d
	jmp	.L26
.L31:
	addq	$16, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2029:
	.size	_Z6matgenPfi, .-_Z6matgenPfi
	.section	.rodata.str1.1
.LC11:
	.string	"%d\n"
.LC14:
	.string	"Max error: %g Average error: %g\n"
.LC15:
	.string	"gputime: %d\n"
	.text
	.globl	_Z4funci
	.type	_Z4funci, @function
_Z4funci:
.LFB2030:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movl	%edi, %edx
	leaq	.LC11(%rip), %rsi
	movq	%rsp, %rbp
	.cfi_def_cfa_register 6
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	.cfi_offset 15, -24
	.cfi_offset 14, -32
	.cfi_offset 13, -40
	.cfi_offset 12, -48
	.cfi_offset 3, -56
	movl	%edi, %ebx
	movl	$2, %edi
	subq	$120, %rsp
	movq	%fs:40, %rax
	movq	%rax, -56(%rbp)
	xorl	%eax, %eax
	call	__printf_chk@PLT
	call	_Z8InitCUDAv
	testb	%al, %al
	je	.L33
	movl	$4000000, %edi
	movslq	%ebx, %r15
	call	malloc@PLT
	movl	$4000000, %edi
	movq	%rax, -144(%rbp)
	call	malloc@PLT
	movl	$4000000, %edi
	movq	%rax, -152(%rbp)
	call	malloc@PLT
	movl	$4000000, %edi
	movq	%rax, %r13
	call	malloc@PLT
	movl	$4, %edi
	movq	%rax, %r14
	call	malloc@PLT
	xorl	%edi, %edi
	movl	%ebx, (%rax)
	movq	%rax, %r12
	call	srand@PLT
	movq	-144(%rbp), %rdi
	movl	$1000, %esi
	call	_Z6matgenPfi
	movq	-152(%rbp), %rdi
	movl	$1000, %esi
	call	_Z6matgenPfi
	leaq	-120(%rbp), %rdi
	movl	$4000000, %esi
	call	cudaMalloc@PLT
	leaq	-112(%rbp), %rdi
	movl	$4000000, %esi
	call	cudaMalloc@PLT
	leaq	-104(%rbp), %rdi
	movl	$4000000, %esi
	call	cudaMalloc@PLT
	leaq	-96(%rbp), %rdi
	movl	$4, %esi
	call	cudaMalloc@PLT
	movq	%r15, %rax
	leaq	-88(%rbp), %rdi
	salq	$4, %rax
	movq	%rax, %rsi
	movq	%rax, -136(%rbp)
	call	cudaMalloc@PLT
	movq	-144(%rbp), %rsi
	movq	-120(%rbp), %rdi
	movl	$1, %ecx
	movl	$4000000, %edx
	call	cudaMemcpy@PLT
	movq	-152(%rbp), %rsi
	movq	-112(%rbp), %rdi
	movl	$1, %ecx
	movl	$4000000, %edx
	call	cudaMemcpy@PLT
	movq	-96(%rbp), %rdi
	movl	$1, %ecx
	movq	%r12, %rsi
	movl	$4, %edx
	call	cudaMemcpy@PLT
	movl	%ebx, -80(%rbp)
	movl	$16777217, %edx
	xorl	%r9d, %r9d
	salq	$8, %rdx
	xorl	%r8d, %r8d
	movabsq	$4294967297, %rax
	movl	$1, %ecx
	movq	%rax, -76(%rbp)
	movq	-80(%rbp), %rdi
	movl	-72(%rbp), %esi
	movq	%rdx, -68(%rbp)
	movl	$1, -60(%rbp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L34
	movq	-96(%rbp), %r9
	movq	-88(%rbp), %r8
	movl	$1000, %ecx
	movq	-104(%rbp), %rdx
	movq	-112(%rbp), %rsi
	movq	-120(%rbp), %rdi
	call	_ZL43__device_stub__Z11matMultCUDAPKfS0_PfiPlPKiPKfS0_PfiPlPKi
.L34:
	movq	-136(%rbp), %rax
	movq	%rsp, %rdx
	movq	%rax, %rcx
	andq	$-4096, %rcx
	subq	%rcx, %rdx
.L35:
	cmpq	%rdx, %rsp
	je	.L36
	subq	$4096, %rsp
	orq	$0, 4088(%rsp)
	jmp	.L35
.L36:
	andl	$4095, %eax
	subq	%rax, %rsp
	testq	%rax, %rax
	je	.L37
	orq	$0, -8(%rsp,%rax)
.L37:
	leaq	7(%rsp), %r8
	movq	-104(%rbp), %rsi
	movl	$2, %ecx
	movq	%r13, %rdi
	movq	%r8, %rax
	movl	$4000000, %edx
	andq	$-8, %r8
	shrq	$3, %rax
	movq	%r8, %r12
	movq	%rax, -160(%rbp)
	call	cudaMemcpy@PLT
	movq	-136(%rbp), %rdx
	movq	-88(%rbp), %rsi
	movq	%r12, %rdi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	-120(%rbp), %rdi
	call	cudaFree@PLT
	movq	-112(%rbp), %rdi
	call	cudaFree@PLT
	movq	-104(%rbp), %rdi
	call	cudaFree@PLT
	movq	-88(%rbp), %rdi
	call	cudaFree@PLT
	movq	-160(%rbp), %rax
	movq	(%r12,%r15,8), %rcx
	leaq	(%r12,%r15,8), %rdi
	movq	0(,%rax,8), %rdx
	xorl	%eax, %eax
.L38:
	incq	%rax
	cmpl	%eax, %ebx
	jle	.L63
	movq	(%r12,%rax,8), %rsi
	cmpq	%rsi, %rdx
	cmovg	%rsi, %rdx
	movq	(%rdi,%rax,8), %rsi
	cmpq	%rsi, %rcx
	cmovl	%rsi, %rcx
	jmp	.L38
.L63:
	movq	%rcx, %rbx
	xorl	%eax, %eax
	subq	%rdx, %rbx
.L40:
	movq	-144(%rbp), %rcx
	xorl	%edx, %edx
	leaq	(%r14,%rax), %rdi
	leaq	(%rcx,%rax), %r8
.L44:
	movq	-152(%rbp), %rcx
	xorps	%xmm0, %xmm0
	leaq	(%rcx,%rdx,4), %rsi
	xorl	%ecx, %ecx
.L41:
	movss	(%r8,%rcx,4), %xmm1
	mulss	(%rsi), %xmm1
	incq	%rcx
	addq	$4000, %rsi
	cvtss2sd	%xmm1, %xmm1
	addsd	%xmm1, %xmm0
	cmpq	$1000, %rcx
	jne	.L41
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, (%rdi,%rdx,4)
	incq	%rdx
	cmpq	$1000, %rdx
	jne	.L44
	addq	$4000, %rax
	cmpq	$4000000, %rax
	jne	.L40
	xorps	%xmm1, %xmm1
	xorl	%edx, %edx
	movss	.LC12(%rip), %xmm5
	movaps	%xmm1, %xmm0
	movaps	%xmm1, %xmm4
.L43:
	movq	%rdx, %rax
	xorl	%ecx, %ecx
.L48:
	movss	(%r14,%rax), %xmm3
	ucomiss	%xmm4, %xmm3
	jp	.L53
	je	.L45
.L53:
	movss	0(%r13,%rax), %xmm2
	subss	%xmm3, %xmm2
	divss	%xmm3, %xmm2
	andps	%xmm5, %xmm2
	movaps	%xmm2, %xmm6
	addss	%xmm2, %xmm1
	maxss	%xmm0, %xmm6
	movaps	%xmm6, %xmm0
.L45:
	incl	%ecx
	addq	$4, %rax
	cmpl	$1000, %ecx
	jne	.L48
	addq	$4000, %rdx
	cmpq	$4000000, %rdx
	jne	.L43
	leaq	.LC14(%rip), %rsi
	movl	$2, %edi
	movb	$2, %al
	divss	.LC13(%rip), %xmm1
	cvtss2sd	%xmm0, %xmm0
	cvtss2sd	%xmm1, %xmm1
	call	__printf_chk@PLT
	movq	%rbx, %rdx
	leaq	.LC15(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L33:
	movq	-56(%rbp), %rax
	subq	%fs:40, %rax
	je	.L50
	call	__stack_chk_fail@PLT
.L50:
	leaq	-40(%rbp), %rsp
	xorl	%eax, %eax
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE2030:
	.size	_Z4funci, .-_Z4funci
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2031:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	movl	$976, %edi
	call	_Z4funci
	xorl	%eax, %eax
	popq	%rdx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2031:
	.size	main, .-main
	.section	.rodata.str1.1
.LC16:
	.string	"_Z11matMultCUDAPKfS0_PfiPlPKi"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2059:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC16(%rip), %rdx
	movq	%rax, %rdi
	leaq	_ZL11matMultCUDAPKfS0_PfiPlPKi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2059:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC8:
	.long	805306368
	.section	.rodata.cst16,"aM",@progbits,16
	.align 16
.LC12:
	.long	2147483647
	.long	0
	.long	0
	.long	0
	.section	.rodata.cst4
	.align 4
.LC13:
	.long	1232348160
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <stdio.h>
#include <stdlib.h>
#include <time.h>

//CUDA RunTime API
#include <hip/hip_runtime.h>

#define THREAD_NUM 256

#define MATRIX_SIZE 1000

//int blocks_num = MATRIX_SIZE * MATRIX_SIZE / 1024;;
//const int blocks_num = MATRIX_SIZE*(MATRIX_SIZE + THREAD_NUM - 1) / THREAD_NUM;

//打印设备信息
void printDeviceProp(const hipDeviceProp_t &prop)
{
	printf("Device Name : %s.\n", prop.name);
	printf("totalFlbalMem : %d.\n", prop.totalGlobalMem);
	printf("sharedMemPerBlock : %d.\n", prop.sharedMemPerBlock);
	printf("regsPerBlock : %d.\n", prop.regsPerBlock);
	printf("warpSize : %d.\n", prop.warpSize);
	printf("memPitch : %d.\n", prop.memPitch);
}

bool InitCUDA()
{
	int count;

	//取得CUDA装置的数目
	hipGetDeviceCount(&count);

	if(count == 0){
		fprintf(stderr, "There is no device.\n");
		return false;
	}

	int i;

	for(i = 0; i < count; i ++){

		hipDeviceProp_t prop;
		hipGetDeviceProperties(&prop, i);
		if(hipGetDeviceProperties(&prop, i) == hipSuccess){
			if(prop.major >= 1){
				break;
			}
		}
	}

	if(i == count){
		fprintf(stderr, "There is no device supporting CUDA 1.x.\n");
		return false;
	}

	hipSetDevice(i);
	return true;
}

void matgen(float* a, int n)
{
	int i, j;
	for(i = 0; i < n; i++){
		for(j = 0; j < n; j++)
		{
			a[i * n + j] = (float)rand() / RAND_MAX + (float)rand() / (RAND_MAX * RAND_MAX);
		}
	}
}

__global__ static void matMultCUDA(const float* a, const float* b, float* c, int n, clock_t* time, const int* blocks_num)
{
	const int tid = threadIdx.x;
	const int bid = blockIdx.x;
	
	const int idx = bid * THREAD_NUM + tid;
	const int row = idx / n;
	const int column = idx % n;
	
	int i;
	
	 clock_t start;
	 
	 if(tid == 0) 
		 time[bid] = clock();
		 
	if(row < n && column < n){
		float t = 0;
		float y = 0;
		for(i = 0; i < n; i++){
			float r;
			y -= a[row * n + i] * b[i * n + column];
			r = t - y;
			y = (r-t)+y;
			t = r;
		}
		c[row * n + column] = t;
	}
	
	if(tid == 0){
		time[bid + *blocks_num] = clock();
	}
}

int func(int blocks_num)
{
	printf("%d\n", blocks_num);
	if(!InitCUDA()){
		return 0;
	}

	float *a, *b, *c, *d;
	int *e;
	
	int n = MATRIX_SIZE;

	a = (float*)malloc(sizeof(float)* n * n);
	b = (float*)malloc(sizeof(float)* n * n);
	c = (float*)malloc(sizeof(float)* n * n);
	d = (float*)malloc(sizeof(float)* n * n);
	e = (int*)malloc(sizeof(int));
	*e = blocks_num;
	srand(0);

	matgen(a, n);
	matgen(b, n);

	float *cuda_a, *cuda_b, *cuda_c;
	int *cuda_e;
	clock_t* time;

	hipMalloc((void**)&cuda_a, sizeof(float) * n * n);
	hipMalloc((void**)&cuda_b, sizeof(float) * n * n);
	hipMalloc((void**)&cuda_c, sizeof(float) * n * n);
	hipMalloc((void**)&cuda_e, sizeof(int));
	hipMalloc((void**)&time, sizeof(clock_t) * blocks_num * 2);

	hipMemcpy(cuda_a, a, sizeof(float) * n * n, hipMemcpyHostToDevice);
	hipMemcpy(cuda_b, b, sizeof(float) * n * n, hipMemcpyHostToDevice);
	hipMemcpy(cuda_e, e, sizeof(int), hipMemcpyHostToDevice);
	matMultCUDA<<<blocks_num, THREAD_NUM, 0>>>(cuda_a, cuda_b, cuda_c, n, time, cuda_e);

	clock_t time_use[blocks_num * 2];

	hipMemcpy(c, cuda_c, sizeof(float) * n * n, hipMemcpyDeviceToHost);
	hipMemcpy(&time_use, time, sizeof(clock_t) * blocks_num * 2, hipMemcpyHostToDevice);

	hipFree(cuda_a);
	hipFree(cuda_b);
	hipFree(cuda_c);
	hipFree(time);

	clock_t min_start, max_end;
	min_start = time_use[0];
	max_end = time_use[blocks_num];
	for(int i = 1; i < blocks_num; i++){
		if(min_start > time_use[i]){
			min_start = time_use[i];
		}
		if(max_end < time_use[i + blocks_num]){
			max_end = time_use[i + blocks_num];
		}
	}

	clock_t final_time = max_end - min_start;

	//CPU矩阵乘法，存入d中
	for(int i = 0; i < n; i++){
		for(int j = 0; j < n; j++){
			double t = 0;
			for(int k = 0; k < n; k++){
				t += a[i * n + k] * b[k * n + j];
			}
			d[i * n + j] = t;
		}
	}

	float max_err = 0;
	float average_err = 0;

	for(int i = 0; i < n; i++){
		for(int j = 0; j < n; j++){
			if(d[i * n + j] != 0){
				float err = fabs((c[i * n + j] - d[i * n + j]) / d[i * n + j]);

				if(max_err < err) 
					max_err = err;
					average_err += err;
			}
		}
	}

	printf("Max error: %g Average error: %g\n", max_err, average_err / (n * n));

	printf("gputime: %d\n", final_time);

	return 0;
}


int main()
{
	int blocks_num;
	//blocks_num = MATRIX_SIZE*(MATRIX_SIZE + THREAD_NUM - 1) / THREAD_NUM;
	//func(blocks_num);
	blocks_num = MATRIX_SIZE * MATRIX_SIZE / 1024;;
	func(blocks_num);
	//blocks_num = MATRIX_SIZE*(MATRIX_SIZE + THREAD_NUM - 1) / THREAD_NUM;
	//func(blocks_num);
}

	.text
	.file	"matMultCuda.hip"
	.globl	_Z15printDevicePropRK20hipDeviceProp_tR0600 # -- Begin function _Z15printDevicePropRK20hipDeviceProp_tR0600
	.type	_Z15printDevicePropRK20hipDeviceProp_tR0600,@function
_Z15printDevicePropRK20hipDeviceProp_tR0600: # @_Z15printDevicePropRK20hipDeviceProp_tR0600
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movq	%rdi, %rbx
	movl	$.L.str, %edi
	movq	%rbx, %rsi
	xorl	%eax, %eax
	callq	printf
	movq	288(%rbx), %rsi
	movl	$.L.str.1, %edi
	xorl	%eax, %eax
	callq	printf
	movq	296(%rbx), %rsi
	movl	$.L.str.2, %edi
	xorl	%eax, %eax
	callq	printf
	movl	304(%rbx), %esi
	movl	$.L.str.3, %edi
	xorl	%eax, %eax
	callq	printf
	movl	308(%rbx), %esi
	movl	$.L.str.4, %edi
	xorl	%eax, %eax
	callq	printf
	movq	312(%rbx), %rsi
	movl	$.L.str.5, %edi
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	printf                          # TAILCALL
.Lfunc_end0:
	.size	_Z15printDevicePropRK20hipDeviceProp_tR0600, .Lfunc_end0-_Z15printDevicePropRK20hipDeviceProp_tR0600
	.cfi_endproc
                                        # -- End function
	.globl	_Z8InitCUDAv                    # -- Begin function _Z8InitCUDAv
	.type	_Z8InitCUDAv,@function
_Z8InitCUDAv:                           # @_Z8InitCUDAv
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	subq	$1480, %rsp                     # imm = 0x5C8
	.cfi_def_cfa_offset 1504
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	leaq	4(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipGetDeviceCount
	movl	(%rbx), %ecx
	testl	%ecx, %ecx
	je	.LBB1_3
# %bb.1:                                # %.preheader
	jle	.LBB1_2
# %bb.5:                                # %.lr.ph
	xorl	%ebx, %ebx
	leaq	8(%rsp), %r14
.LBB1_6:                                # =>This Inner Loop Header: Depth=1
	movq	%r14, %rdi
	movl	%ebx, %esi
	callq	hipGetDevicePropertiesR0600
	movq	%r14, %rdi
	movl	%ebx, %esi
	callq	hipGetDevicePropertiesR0600
	movl	4(%rsp), %ecx
	testl	%eax, %eax
	jne	.LBB1_8
# %bb.7:                                #   in Loop: Header=BB1_6 Depth=1
	cmpl	$0, 368(%rsp)
	jg	.LBB1_9
.LBB1_8:                                #   in Loop: Header=BB1_6 Depth=1
	incl	%ebx
	cmpl	%ecx, %ebx
	jl	.LBB1_6
	jmp	.LBB1_9
.LBB1_2:
	xorl	%ebx, %ebx
.LBB1_9:                                # %._crit_edge
	cmpl	%ecx, %ebx
	je	.LBB1_10
# %bb.11:
	movl	%ebx, %edi
	callq	hipSetDevice
	movb	$1, %al
.LBB1_12:
                                        # kill: def $al killed $al killed $eax
	addq	$1480, %rsp                     # imm = 0x5C8
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	retq
.LBB1_3:
	.cfi_def_cfa_offset 1504
	movq	stderr(%rip), %rcx
	movl	$.L.str.6, %edi
	movl	$20, %esi
	jmp	.LBB1_4
.LBB1_10:
	movq	stderr(%rip), %rcx
	movl	$.L.str.7, %edi
	movl	$40, %esi
.LBB1_4:
	movl	$1, %edx
	callq	fwrite@PLT
	xorl	%eax, %eax
	jmp	.LBB1_12
.Lfunc_end1:
	.size	_Z8InitCUDAv, .Lfunc_end1-_Z8InitCUDAv
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z6matgenPfi
.LCPI2_0:
	.long	0x30000000                      # float 4.65661287E-10
	.text
	.globl	_Z6matgenPfi
	.type	_Z6matgenPfi,@function
_Z6matgenPfi:                           # @_Z6matgenPfi
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdi, 16(%rsp)                  # 8-byte Spill
	testl	%esi, %esi
	jle	.LBB2_5
# %bb.1:                                # %.preheader.lr.ph
	movl	%esi, %ebx
	movl	%esi, %r15d
	xorl	%r12d, %r12d
	xorl	%r13d, %r13d
.LBB2_2:                                # %.lr.ph
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_3 Depth 2
	movl	%r12d, %eax
	movq	16(%rsp), %rcx                  # 8-byte Reload
	leaq	(%rcx,%rax,4), %rbp
	xorl	%r14d, %r14d
.LBB2_3:                                #   Parent Loop BB2_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	.LCPI2_0(%rip), %xmm0
	movss	%xmm0, 12(%rsp)                 # 4-byte Spill
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	addss	12(%rsp), %xmm0                 # 4-byte Folded Reload
	movss	%xmm0, (%rbp,%r14,4)
	incq	%r14
	cmpq	%r14, %r15
	jne	.LBB2_3
# %bb.4:                                # %._crit_edge
                                        #   in Loop: Header=BB2_2 Depth=1
	incq	%r13
	addl	%ebx, %r12d
	cmpq	%r15, %r13
	jne	.LBB2_2
.LBB2_5:                                # %._crit_edge13
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z6matgenPfi, .Lfunc_end2-_Z6matgenPfi
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0                          # -- Begin function _Z4funci
.LCPI3_0:
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0
.LCPI3_1:
	.long	0x49742400                      # float 1.0E+6
	.text
	.globl	_Z4funci
	.type	_Z4funci,@function
_Z4funci:                               # @_Z4funci
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$104, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%edi, %r12d
	movl	$.L.str.8, %edi
	movl	%r12d, %esi
	xorl	%eax, %eax
	callq	printf
	callq	_Z8InitCUDAv
	testb	%al, %al
	je	.LBB3_18
# %bb.1:
	movl	$4000000, %edi                  # imm = 0x3D0900
	callq	malloc
	movq	%rax, %r15
	movl	$4000000, %edi                  # imm = 0x3D0900
	callq	malloc
	movq	%rax, %r13
	movl	$4000000, %edi                  # imm = 0x3D0900
	callq	malloc
	movq	%rax, %rbx
	movl	$4000000, %edi                  # imm = 0x3D0900
	callq	malloc
	movq	%rax, %r14
	movl	$4, %edi
	callq	malloc
	movq	%rax, -48(%rbp)                 # 8-byte Spill
	movl	%r12d, (%rax)
	xorl	%edi, %edi
	callq	srand
	movq	%r15, %rdi
	movl	$1000, %esi                     # imm = 0x3E8
	callq	_Z6matgenPfi
	movq	%r13, %rdi
	movl	$1000, %esi                     # imm = 0x3E8
	callq	_Z6matgenPfi
	leaq	-80(%rbp), %rdi
	movl	$4000000, %esi                  # imm = 0x3D0900
	callq	hipMalloc
	leaq	-72(%rbp), %rdi
	movl	$4000000, %esi                  # imm = 0x3D0900
	callq	hipMalloc
	leaq	-64(%rbp), %rdi
	movl	$4000000, %esi                  # imm = 0x3D0900
	callq	hipMalloc
	leaq	-96(%rbp), %rdi
	movl	$4, %esi
	callq	hipMalloc
	movslq	%r12d, %rcx
	movq	%rcx, -136(%rbp)                # 8-byte Spill
	movq	%rcx, %rsi
	shlq	$4, %rsi
	leaq	-56(%rbp), %rdi
	movq	%rsi, -128(%rbp)                # 8-byte Spill
	callq	hipMalloc
	leaq	-80(%rbp), %rax
	movq	(%rax), %rdi
	movl	$4000000, %edx                  # imm = 0x3D0900
	movq	%r15, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	-72(%rbp), %rax
	movq	(%rax), %rdi
	movl	$4000000, %edx                  # imm = 0x3D0900
	movq	%r13, -88(%rbp)                 # 8-byte Spill
	movq	%r13, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	-96(%rbp), %rax
	movq	(%rax), %rdi
	movl	$4, %edx
	movq	-48(%rbp), %rsi                 # 8-byte Reload
	movl	$1, %ecx
	callq	hipMemcpy
	movl	%r12d, %edi
	movq	%rdi, -104(%rbp)                # 8-byte Spill
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$256, %rdx                      # imm = 0x100
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_3
# %bb.2:
	movq	-80(%rbp), %rdi
	movq	-72(%rbp), %rsi
	movq	-64(%rbp), %rdx
	movq	-56(%rbp), %r8
	movq	-96(%rbp), %r9
	movl	$1000, %ecx                     # imm = 0x3E8
	callq	_ZL26__device_stub__matMultCUDAPKfS0_PfiPlPKi
.LBB3_3:
	movq	%rsp, -48(%rbp)                 # 8-byte Spill
	leal	(%r12,%r12), %r13d
	movq	%rsp, %rax
	movq	%rax, -112(%rbp)                # 8-byte Spill
	shlq	$3, %r13
	movq	%r12, -120(%rbp)                # 8-byte Spill
	movq	%rax, %r12
	subq	%r13, %r12
	movq	%r12, %rsp
	negq	%r13
	movq	-64(%rbp), %rsi
	movl	$4000000, %edx                  # imm = 0x3D0900
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	-56(%rbp), %rsi
	movq	%r12, %rdi
	movq	-128(%rbp), %rdx                # 8-byte Reload
	movl	$1, %ecx
	callq	hipMemcpy
	movq	-80(%rbp), %rdi
	callq	hipFree
	movq	-72(%rbp), %rdi
	callq	hipFree
	movq	-64(%rbp), %rdi
	callq	hipFree
	movq	-56(%rbp), %rdi
	callq	hipFree
	movq	-112(%rbp), %rax                # 8-byte Reload
	movq	(%rax,%r13), %rdi
	movq	-136(%rbp), %rax                # 8-byte Reload
	movq	(%r12,%rax,8), %rsi
	cmpl	$2, -120(%rbp)                  # 4-byte Folded Reload
	jl	.LBB3_4
# %bb.19:                               # %.lr.ph.preheader
	movq	-104(%rbp), %r8                 # 8-byte Reload
	leaq	(%r12,%r8,8), %rcx
	movl	$1, %edx
	movq	-88(%rbp), %r10                 # 8-byte Reload
.LBB3_20:                               # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movq	(%r12,%rdx,8), %rax
	cmpq	%rax, %rdi
	cmovlq	%rdi, %rax
	movq	(%rcx,%rdx,8), %r13
	cmpq	%r13, %rsi
	cmovgq	%rsi, %r13
	incq	%rdx
	movq	%rax, %rdi
	movq	%r13, %rsi
	cmpq	%rdx, %r8
	jne	.LBB3_20
	jmp	.LBB3_5
.LBB3_4:
	movq	%rsi, %r13
	movq	%rdi, %rax
	movq	-88(%rbp), %r10                 # 8-byte Reload
.LBB3_5:                                # %._crit_edge
	xorl	%ecx, %ecx
.LBB3_6:                                # %.preheader132
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_7 Depth 2
                                        #       Child Loop BB3_8 Depth 3
	imulq	$4000, %rcx, %rdx               # imm = 0xFA0
	addq	%r14, %rdx
	movq	%r10, %rsi
	xorl	%edi, %edi
.LBB3_7:                                # %.preheader131
                                        #   Parent Loop BB3_6 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB3_8 Depth 3
	xorpd	%xmm0, %xmm0
	movq	%rsi, %r8
	xorl	%r9d, %r9d
.LBB3_8:                                #   Parent Loop BB3_6 Depth=1
                                        #     Parent Loop BB3_7 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movss	(%r15,%r9,4), %xmm1             # xmm1 = mem[0],zero,zero,zero
	mulss	(%r8), %xmm1
	cvtss2sd	%xmm1, %xmm1
	addsd	%xmm1, %xmm0
	incq	%r9
	addq	$4000, %r8                      # imm = 0xFA0
	cmpq	$1000, %r9                      # imm = 0x3E8
	jne	.LBB3_8
# %bb.9:                                #   in Loop: Header=BB3_7 Depth=2
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, (%rdx,%rdi,4)
	incq	%rdi
	addq	$4, %rsi
	cmpq	$1000, %rdi                     # imm = 0x3E8
	jne	.LBB3_7
# %bb.10:                               #   in Loop: Header=BB3_6 Depth=1
	incq	%rcx
	addq	$4000, %r15                     # imm = 0xFA0
	cmpq	$1000, %rcx                     # imm = 0x3E8
	jne	.LBB3_6
# %bb.11:                               # %.preheader.preheader
	xorps	%xmm0, %xmm0
	xorl	%ecx, %ecx
	movaps	.LCPI3_0(%rip), %xmm2           # xmm2 = [NaN,NaN,NaN,NaN]
	movl	$4000, %edx                     # imm = 0xFA0
	xorps	%xmm1, %xmm1
	xorps	%xmm3, %xmm3
.LBB3_12:                               # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_13 Depth 2
	xorl	%esi, %esi
.LBB3_13:                               #   Parent Loop BB3_12 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movss	(%r14,%rsi,4), %xmm4            # xmm4 = mem[0],zero,zero,zero
	ucomiss	%xmm0, %xmm4
	jne	.LBB3_14
	jnp	.LBB3_15
.LBB3_14:                               #   in Loop: Header=BB3_13 Depth=2
	movss	(%rbx,%rsi,4), %xmm5            # xmm5 = mem[0],zero,zero,zero
	subss	%xmm4, %xmm5
	divss	%xmm4, %xmm5
	andps	%xmm2, %xmm5
	addss	%xmm5, %xmm1
	maxss	%xmm3, %xmm5
	movaps	%xmm5, %xmm3
.LBB3_15:                               #   in Loop: Header=BB3_13 Depth=2
	incq	%rsi
	cmpq	$1000, %rsi                     # imm = 0x3E8
	jne	.LBB3_13
# %bb.16:                               #   in Loop: Header=BB3_12 Depth=1
	incq	%rcx
	addq	%rdx, %rbx
	addq	%rdx, %r14
	cmpq	$1000, %rcx                     # imm = 0x3E8
	jne	.LBB3_12
# %bb.17:
	subq	%rax, %r13
	xorps	%xmm0, %xmm0
	cvtss2sd	%xmm3, %xmm0
	divss	.LCPI3_1(%rip), %xmm1
	cvtss2sd	%xmm1, %xmm1
	movl	$.L.str.9, %edi
	movb	$2, %al
	callq	printf
	movl	$.L.str.10, %edi
	movq	%r13, %rsi
	xorl	%eax, %eax
	callq	printf
	movq	-48(%rbp), %rsp                 # 8-byte Reload
.LBB3_18:
	xorl	%eax, %eax
	leaq	-40(%rbp), %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	.cfi_def_cfa %rsp, 8
	retq
.Lfunc_end3:
	.size	_Z4funci, .Lfunc_end3-_Z4funci
	.cfi_endproc
                                        # -- End function
	.type	_ZL26__device_stub__matMultCUDAPKfS0_PfiPlPKi,@function # -- Begin function _ZL26__device_stub__matMultCUDAPKfS0_PfiPlPKi
_ZL26__device_stub__matMultCUDAPKfS0_PfiPlPKi: # @_ZL26__device_stub__matMultCUDAPKfS0_PfiPlPKi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	32(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	24(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_ZL11matMultCUDAPKfS0_PfiPlPKi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_ZL26__device_stub__matMultCUDAPKfS0_PfiPlPKi, .Lfunc_end4-_ZL26__device_stub__matMultCUDAPKfS0_PfiPlPKi
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movl	$976, %edi                      # imm = 0x3D0
	callq	_Z4funci
	xorl	%eax, %eax
	popq	%rcx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	main, .Lfunc_end5-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB6_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB6_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_ZL11matMultCUDAPKfS0_PfiPlPKi, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end6:
	.size	__hip_module_ctor, .Lfunc_end6-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB7_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB7_2:
	retq
.Lfunc_end7:
	.size	__hip_module_dtor, .Lfunc_end7-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Device Name : %s.\n"
	.size	.L.str, 19

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"totalFlbalMem : %d.\n"
	.size	.L.str.1, 21

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"sharedMemPerBlock : %d.\n"
	.size	.L.str.2, 25

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"regsPerBlock : %d.\n"
	.size	.L.str.3, 20

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"warpSize : %d.\n"
	.size	.L.str.4, 16

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"memPitch : %d.\n"
	.size	.L.str.5, 16

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"There is no device.\n"
	.size	.L.str.6, 21

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"There is no device supporting CUDA 1.x.\n"
	.size	.L.str.7, 41

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"%d\n"
	.size	.L.str.8, 4

	.type	_ZL11matMultCUDAPKfS0_PfiPlPKi,@object # @_ZL11matMultCUDAPKfS0_PfiPlPKi
	.section	.rodata,"a",@progbits
	.p2align	3, 0x0
_ZL11matMultCUDAPKfS0_PfiPlPKi:
	.quad	_ZL26__device_stub__matMultCUDAPKfS0_PfiPlPKi
	.size	_ZL11matMultCUDAPKfS0_PfiPlPKi, 8

	.type	.L.str.9,@object                # @.str.9
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.9:
	.asciz	"Max error: %g Average error: %g\n"
	.size	.L.str.9, 33

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"gputime: %d\n"
	.size	.L.str.10, 13

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_ZL11matMultCUDAPKfS0_PfiPlPKi"
	.size	.L__unnamed_1, 31

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _ZL26__device_stub__matMultCUDAPKfS0_PfiPlPKi
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _ZL11matMultCUDAPKfS0_PfiPlPKi
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.section	.text._ZL11matMultCUDAPKfS0_PfiPlPKi,"axG",@progbits,_ZL11matMultCUDAPKfS0_PfiPlPKi,comdat
	.globl	_ZL11matMultCUDAPKfS0_PfiPlPKi  ; -- Begin function _ZL11matMultCUDAPKfS0_PfiPlPKi
	.p2align	8
	.type	_ZL11matMultCUDAPKfS0_PfiPlPKi,@function
_ZL11matMultCUDAPKfS0_PfiPlPKi:         ; @_ZL11matMultCUDAPKfS0_PfiPlPKi
; %bb.0:
	s_load_b128 s[4:7], s[0:1], 0x20
	v_cmp_eq_u32_e32 vcc_lo, 0, v0
	s_mov_b32 s12, s15
	s_and_saveexec_b32 s2, vcc_lo
	s_cbranch_execz .LBB0_2
; %bb.1:
	s_ashr_i32 s13, s12, 31
	s_getreg_b32 s3, hwreg(HW_REG_SHADER_CYCLES, 0, 20)
	s_lshl_b64 s[8:9], s[12:13], 3
	v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s3
	s_waitcnt lgkmcnt(0)
	s_add_u32 s8, s4, s8
	s_addc_u32 s9, s5, s9
	global_store_b64 v2, v[1:2], s[8:9]
.LBB0_2:
	s_or_b32 exec_lo, exec_lo, s2
	s_load_b32 s13, s[0:1], 0x18
	v_lshl_add_u32 v0, s12, 8, v0
	s_mov_b32 s14, exec_lo
	s_waitcnt lgkmcnt(0)
	s_ashr_i32 s3, s13, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s2, s13, s3
	s_xor_b32 s8, s2, s3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cvt_f32_u32_e32 v1, s8
	s_sub_i32 s2, 0, s8
	v_rcp_iflag_f32_e32 v1, v1
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v1, 0x4f7ffffe, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cvt_u32_f32_e32 v2, v1
	v_ashrrev_i32_e32 v1, 31, v0
	v_mul_lo_u32 v3, s2, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v4, v0, v1
	v_xor_b32_e32 v4, v4, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v3, v2, v3
	v_add_nc_u32_e32 v2, v2, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v2, v4, v2
	v_mul_lo_u32 v3, v2, s8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v3, v4, v3
	v_add_nc_u32_e32 v4, 1, v2
	v_subrev_nc_u32_e32 v5, s8, v3
	v_cmp_le_u32_e64 s2, s8, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v2, v2, v4, s2
	v_cndmask_b32_e64 v3, v3, v5, s2
	v_xor_b32_e32 v5, s3, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v4, 1, v2
	v_cmp_le_u32_e64 s2, s8, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v2, v2, v4, s2
	v_xor_b32_e32 v2, v2, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v2, v2, v5
	v_max_i32_e32 v3, -1, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s13, v3
	s_cbranch_execz .LBB0_6
; %bb.3:                                ; %.lr.ph
	s_clause 0x1
	s_load_b128 s[8:11], s[0:1], 0x0
	s_load_b64 s[2:3], s[0:1], 0x10
	v_mul_lo_u32 v2, v2, s13
	v_dual_mov_b32 v7, 0 :: v_dual_mov_b32 v6, 0
	s_mov_b32 s1, s13
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[4:5], 2, v[2:3]
	v_sub_nc_u32_e32 v2, v0, v2
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v4, s0, s8, v4
	v_add_co_ci_u32_e64 v5, s0, s9, v5, s0
.LBB0_4:                                ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_ashrrev_i32_e32 v3, 31, v2
	s_add_i32 s1, s1, -1
	s_cmp_lg_u32 s1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[8:9], 2, v[2:3]
	v_add_nc_u32_e32 v2, s13, v2
	v_add_co_u32 v8, s0, s10, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v9, s0, s11, v9, s0
	global_load_b32 v3, v[4:5], off
	global_load_b32 v8, v[8:9], off
	v_mov_b32_e32 v9, v6
	v_add_co_u32 v4, s0, v4, 4
	v_add_co_ci_u32_e64 v5, s0, 0, v5, s0
	s_waitcnt vmcnt(0)
	v_fma_f32 v3, -v3, v8, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v6, v9, v3
	v_sub_f32_e32 v7, v6, v9
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f32_e32 v7, v3, v7
	s_cbranch_scc1 .LBB0_4
; %bb.5:                                ; %._crit_edge
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v0, s0, s2, v0
	v_add_co_ci_u32_e64 v1, s0, s3, v1, s0
	global_store_b32 v[0:1], v6, off
.LBB0_6:                                ; %Flow
	s_or_b32 exec_lo, exec_lo, s14
	s_and_saveexec_b32 s0, vcc_lo
	s_cbranch_execz .LBB0_8
; %bb.7:
	s_getreg_b32 s2, hwreg(HW_REG_SHADER_CYCLES, 0, 20)
	v_mov_b32_e32 v1, 0
	global_load_b32 v0, v1, s[6:7]
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s0, v0
	v_mov_b32_e32 v0, s2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s0, s0, s12
	s_ashr_i32 s1, s0, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[0:1], s[0:1], 3
	s_add_u32 s0, s4, s0
	s_addc_u32 s1, s5, s1
	global_store_b64 v1, v[0:1], s[0:1]
.LBB0_8:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _ZL11matMultCUDAPKfS0_PfiPlPKi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 48
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._ZL11matMultCUDAPKfS0_PfiPlPKi,"axG",@progbits,_ZL11matMultCUDAPKfS0_PfiPlPKi,comdat
.Lfunc_end0:
	.size	_ZL11matMultCUDAPKfS0_PfiPlPKi, .Lfunc_end0-_ZL11matMultCUDAPKfS0_PfiPlPKi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 644
; NumSgprs: 18
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 48
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _ZL11matMultCUDAPKfS0_PfiPlPKi
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _ZL11matMultCUDAPKfS0_PfiPlPKi.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     10
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
