#include <stdio.h>
#include <stdlib.h>
#include <string.h>

// a struct 
typedef struct
{
  int size;
  char *_string;
} string_t;

__global__ void string_append(string_t*, string_t*, string_t*);

int main(void)
{
  string_t *str1, *str2, *str3;
  size_t size1 = strlen("Hello, ");
  size_t size2 = sizeof("world!");
  
  // allocate memory for str1, str2, and str3 
  // and for their string members.
  cudaMallocManaged(&str1, sizeof(string_t));
  cudaMallocManaged(&(str1->_string), size1*sizeof(char));

  cudaMallocManaged(&str2, sizeof(string_t));
  cudaMallocManaged(&(str2->_string), size2*sizeof(char));

  cudaMallocManaged(&str3, sizeof(string_t));
  cudaMallocManaged(&(str3->_string), (size1+size2) * sizeof(char));
  
  // the CPU and the GPU can directly access memory allocated to str's 
  
  //In the following 4 lines the Host is accessing
  // the memory allocated via cudaMallocManaged().
  str1->size = size1;
  memcpy(str1->_string, "Hello, ", size1);

  str2->size = size2;
  memcpy(str2->_string, "world!", size2);
  
  // Since the kernel has been declared/defined with 
  // "__global__" keyword we are sure it will run on the device.
  // So the device will be accessing memory allocated via cudaMallocManaged().
  string_append<<<1, 1>>>(str1, str2, str3);

  // the device and the host should be synchronized
  // before we call printf in the host.
  cudaDeviceSynchronize();
  
  printf("%s\n", str3->_string);

  exit(EXIT_SUCCESS);
}



// a kernel to append 2 strings in a 3rd string.
__global__ void string_append(string_t *s1, string_t *s2, string_t *s3)
{
  memcpy(s3->_string, s1->_string, s1->size);
  memcpy(s3->_string+(s1->size), s2->_string, s2->size);
}

	.file	"tmpxft_002f305d_00000000-6_unifMem.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2030:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z47__device_stub__Z13string_appendP8string_tS0_S0_P8string_tS0_S0_
	.type	_Z47__device_stub__Z13string_appendP8string_tS0_S0_P8string_tS0_S0_, @function
_Z47__device_stub__Z13string_appendP8string_tS0_S0_P8string_tS0_S0_:
.LFB2052:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z13string_appendP8string_tS0_S0_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L2:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2052:
	.size	_Z47__device_stub__Z13string_appendP8string_tS0_S0_P8string_tS0_S0_, .-_Z47__device_stub__Z13string_appendP8string_tS0_S0_P8string_tS0_S0_
	.globl	_Z13string_appendP8string_tS0_S0_
	.type	_Z13string_appendP8string_tS0_S0_, @function
_Z13string_appendP8string_tS0_S0_:
.LFB2053:
	.cfi_startproc
	endbr64
	jmp	_Z47__device_stub__Z13string_appendP8string_tS0_S0_P8string_tS0_S0_
	.cfi_endproc
.LFE2053:
	.size	_Z13string_appendP8string_tS0_S0_, .-_Z13string_appendP8string_tS0_S0_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"%s\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	movl	$1, %edx
	movl	$16, %esi
	subq	$72, %rsp
	.cfi_def_cfa_offset 80
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rdi
	call	cudaMallocManaged@PLT
	movq	8(%rsp), %rax
	movl	$1, %edx
	movl	$7, %esi
	leaq	8(%rax), %rdi
	call	cudaMallocManaged@PLT
	leaq	16(%rsp), %rdi
	movl	$1, %edx
	movl	$16, %esi
	call	cudaMallocManaged@PLT
	movq	16(%rsp), %rax
	movl	$1, %edx
	movl	$7, %esi
	leaq	8(%rax), %rdi
	call	cudaMallocManaged@PLT
	leaq	24(%rsp), %rdi
	movl	$1, %edx
	movl	$16, %esi
	call	cudaMallocManaged@PLT
	movq	24(%rsp), %rax
	movl	$1, %edx
	movl	$14, %esi
	leaq	8(%rax), %rdi
	call	cudaMallocManaged@PLT
	movq	8(%rsp), %rax
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movabsq	$4294967297, %rdi
	movl	$1, %ecx
	movl	$1, %esi
	movl	$1, 52(%rsp)
	movl	$7, (%rax)
	movq	8(%rax), %rax
	movq	%rdi, %rdx
	movq	%rdi, 44(%rsp)
	movl	$1819043144, (%rax)
	movl	$539783020, 3(%rax)
	movq	16(%rsp), %rax
	movq	%rdi, 32(%rsp)
	movl	$7, (%rax)
	movq	8(%rax), %rax
	movl	$1, 40(%rsp)
	movl	$1819438967, (%rax)
	movl	$2188396, 3(%rax)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L9
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdi
	call	_Z47__device_stub__Z13string_appendP8string_tS0_S0_P8string_tS0_S0_
.L9:
	call	cudaDeviceSynchronize@PLT
	movq	24(%rsp), %rax
	movl	$2, %edi
	leaq	.LC0(%rip), %rsi
	movq	8(%rax), %rdx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	xorl	%edi, %edi
	call	exit@PLT
	.cfi_endproc
.LFE2027:
	.size	main, .-main
	.section	.rodata.str1.1
.LC1:
	.string	"_Z13string_appendP8string_tS0_S0_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2055:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC1(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z13string_appendP8string_tS0_S0_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2055:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>

// a struct 
typedef struct
{
  int size;
  char *_string;
} string_t;

__global__ void string_append(string_t*, string_t*, string_t*);

int main(void)
{
  string_t *str1, *str2, *str3;
  size_t size1 = strlen("Hello, ");
  size_t size2 = sizeof("world!");
  
  // allocate memory for str1, str2, and str3 
  // and for their string members.
  hipMallocManaged(&str1, sizeof(string_t));
  hipMallocManaged(&(str1->_string), size1*sizeof(char));

  hipMallocManaged(&str2, sizeof(string_t));
  hipMallocManaged(&(str2->_string), size2*sizeof(char));

  hipMallocManaged(&str3, sizeof(string_t));
  hipMallocManaged(&(str3->_string), (size1+size2) * sizeof(char));
  
  // the CPU and the GPU can directly access memory allocated to str's 
  
  //In the following 4 lines the Host is accessing
  // the memory allocated via cudaMallocManaged().
  str1->size = size1;
  memcpy(str1->_string, "Hello, ", size1);

  str2->size = size2;
  memcpy(str2->_string, "world!", size2);
  
  // Since the kernel has been declared/defined with 
  // "__global__" keyword we are sure it will run on the device.
  // So the device will be accessing memory allocated via cudaMallocManaged().
  string_append<<<1, 1>>>(str1, str2, str3);

  // the device and the host should be synchronized
  // before we call printf in the host.
  hipDeviceSynchronize();
  
  printf("%s\n", str3->_string);

  exit(EXIT_SUCCESS);
}



// a kernel to append 2 strings in a 3rd string.
__global__ void string_append(string_t *s1, string_t *s2, string_t *s3)
{
  memcpy(s3->_string, s1->_string, s1->size);
  memcpy(s3->_string+(s1->size), s2->_string, s2->size);
}

	.text
	.file	"unifMem.hip"
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$32, %rsp
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rbx
	movl	$16, %esi
	movq	%rbx, %rdi
	movl	$1, %edx
	callq	hipMallocManaged
	movq	(%rbx), %rdi
	addq	$8, %rdi
	movl	$7, %esi
	movl	$1, %edx
	callq	hipMallocManaged
	leaq	16(%rsp), %r14
	movl	$16, %esi
	movq	%r14, %rdi
	movl	$1, %edx
	callq	hipMallocManaged
	movq	(%r14), %rdi
	addq	$8, %rdi
	movl	$7, %esi
	movl	$1, %edx
	callq	hipMallocManaged
	leaq	8(%rsp), %r15
	movl	$16, %esi
	movq	%r15, %rdi
	movl	$1, %edx
	callq	hipMallocManaged
	movq	(%r15), %rdi
	addq	$8, %rdi
	movl	$14, %esi
	movl	$1, %edx
	callq	hipMallocManaged
	movq	(%rbx), %rax
	movl	$7, %ecx
	movl	%ecx, (%rax)
	movq	8(%rax), %rax
	movl	$539783020, 3(%rax)             # imm = 0x202C6F6C
	movl	$1819043144, (%rax)             # imm = 0x6C6C6548
	movq	(%r14), %rax
	movl	%ecx, (%rax)
	movq	8(%rax), %rax
	movl	$1819438967, (%rax)             # imm = 0x6C726F77
	movl	$2188396, 3(%rax)               # imm = 0x21646C
	movabsq	$4294967297, %rdi               # imm = 0x100000001
	movl	$1, %esi
	movq	%rdi, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB0_2
# %bb.1:
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
	callq	_Z28__device_stub__string_appendP8string_tS0_S0_
.LBB0_2:
	callq	hipDeviceSynchronize
	movq	8(%rsp), %rax
	movq	8(%rax), %rdi
	callq	puts@PLT
	xorl	%edi, %edi
	callq	exit
.Lfunc_end0:
	.size	main, .Lfunc_end0-main
	.cfi_endproc
                                        # -- End function
	.globl	_Z28__device_stub__string_appendP8string_tS0_S0_ # -- Begin function _Z28__device_stub__string_appendP8string_tS0_S0_
	.type	_Z28__device_stub__string_appendP8string_tS0_S0_,@function
_Z28__device_stub__string_appendP8string_tS0_S0_: # @_Z28__device_stub__string_appendP8string_tS0_S0_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z13string_appendP8string_tS0_S0_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z28__device_stub__string_appendP8string_tS0_S0_, .Lfunc_end1-_Z28__device_stub__string_appendP8string_tS0_S0_
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z13string_appendP8string_tS0_S0_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Hello, "
	.size	.L.str, 8

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"world!"
	.size	.L.str.1, 7

	.type	_Z13string_appendP8string_tS0_S0_,@object # @_Z13string_appendP8string_tS0_S0_
	.section	.rodata,"a",@progbits
	.globl	_Z13string_appendP8string_tS0_S0_
	.p2align	3, 0x0
_Z13string_appendP8string_tS0_S0_:
	.quad	_Z28__device_stub__string_appendP8string_tS0_S0_
	.size	_Z13string_appendP8string_tS0_S0_, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z13string_appendP8string_tS0_S0_"
	.size	.L__unnamed_1, 34

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z28__device_stub__string_appendP8string_tS0_S0_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z13string_appendP8string_tS0_S0_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z13string_appendP8string_tS0_S0_ ; -- Begin function _Z13string_appendP8string_tS0_S0_
	.globl	_Z13string_appendP8string_tS0_S0_
	.p2align	8
	.type	_Z13string_appendP8string_tS0_S0_,@function
_Z13string_appendP8string_tS0_S0_:      ; @_Z13string_appendP8string_tS0_S0_
; %bb.0:
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_load_b32 s10, s[4:5], 0x0
	s_load_b64 s[2:3], s[0:1], 0x8
	s_load_b64 s[8:9], s[4:5], 0x8
	s_waitcnt lgkmcnt(0)
	s_ashr_i32 s11, s10, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_lt_u64_e64 s12, s[10:11], 4
	s_and_b32 vcc_lo, exec_lo, s12
	s_cbranch_vccnz .LBB0_3
; %bb.1:                                ; %.lr.ph.i.i.preheader
	v_mov_b32_e32 v0, 0
.LBB0_2:                                ; %.lr.ph.i.i
                                        ; =>This Inner Loop Header: Depth=1
	global_load_u8 v1, v0, s[8:9]
	s_add_u32 s10, s10, -4
	s_addc_u32 s11, s11, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	v_cmp_gt_u64_e64 s12, s[10:11], 3
	s_waitcnt vmcnt(0)
	global_store_b8 v0, v1, s[2:3]
	global_load_u8 v1, v0, s[8:9] offset:1
	s_waitcnt vmcnt(0)
	global_store_b8 v0, v1, s[2:3] offset:1
	global_load_u8 v1, v0, s[8:9] offset:2
	s_waitcnt vmcnt(0)
	global_store_b8 v0, v1, s[2:3] offset:2
	global_load_u8 v1, v0, s[8:9] offset:3
	s_add_u32 s8, s8, 4
	s_addc_u32 s9, s9, 0
	s_waitcnt vmcnt(0)
	global_store_b8 v0, v1, s[2:3] offset:3
	s_add_u32 s2, s2, 4
	s_addc_u32 s3, s3, 0
	s_and_b32 vcc_lo, exec_lo, s12
	s_cbranch_vccnz .LBB0_2
.LBB0_3:                                ; %NodeBlock66
	v_cmp_lt_i64_e64 s12, s[10:11], 2
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 vcc_lo, exec_lo, s12
	s_cbranch_vccnz .LBB0_9
; %bb.4:                                ; %NodeBlock
	v_cmp_gt_i64_e64 s12, s[10:11], 2
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 vcc_lo, exec_lo, s12
	s_mov_b32 s12, -1
	s_cbranch_vccz .LBB0_7
; %bb.5:                                ; %LeafBlock64
	s_cmp_eq_u64 s[10:11], 3
	s_mov_b32 s12, 0
	s_cbranch_scc0 .LBB0_7
; %bb.6:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s12, -1
	global_load_u8 v1, v0, s[8:9] offset:2
	s_waitcnt vmcnt(0)
	global_store_b8 v0, v1, s[2:3] offset:2
.LBB0_7:                                ; %Flow83
	s_mov_b32 s13, 0
	s_and_b32 vcc_lo, exec_lo, s12
	s_mov_b32 s12, 0
	s_cbranch_vccz .LBB0_10
; %bb.8:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s12, -1
	global_load_u8 v1, v0, s[8:9] offset:1
	s_waitcnt vmcnt(0)
	global_store_b8 v0, v1, s[2:3] offset:1
	s_branch .LBB0_10
.LBB0_9:
	s_mov_b32 s13, -1
	s_mov_b32 s12, 0
.LBB0_10:                               ; %Flow82
	s_and_b32 vcc_lo, exec_lo, s13
	s_cbranch_vccz .LBB0_12
; %bb.11:                               ; %LeafBlock
	s_cmp_eq_u64 s[10:11], 1
	s_cselect_b32 s12, -1, 0
.LBB0_12:                               ; %Flow86
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s12
	s_cbranch_vccnz .LBB0_14
; %bb.13:
	v_mov_b32_e32 v0, 0
	global_load_u8 v1, v0, s[8:9]
	s_waitcnt vmcnt(0)
	global_store_b8 v0, v1, s[2:3]
.LBB0_14:                               ; %_ZL6memcpyPvPKvm.exit
	v_mov_b32_e32 v0, 0
	s_clause 0x3
	global_load_b32 v4, v0, s[6:7]
	global_load_b32 v6, v0, s[4:5]
	global_load_b64 v[2:3], v0, s[0:1] offset:8
	global_load_b64 v[0:1], v0, s[6:7] offset:8
	s_waitcnt vmcnt(3)
	v_ashrrev_i32_e32 v5, 31, v4
	s_waitcnt vmcnt(2)
	v_ashrrev_i32_e32 v7, 31, v6
	s_waitcnt vmcnt(1)
	v_add_co_u32 v2, s0, v2, v6
	v_cmp_gt_u64_e32 vcc_lo, 4, v[4:5]
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e64 v3, s0, v3, v7, s0
	s_cbranch_vccnz .LBB0_16
.LBB0_15:                               ; %.lr.ph.i.i14
                                        ; =>This Inner Loop Header: Depth=1
	s_waitcnt vmcnt(0)
	flat_load_u8 v6, v[0:1]
	v_add_co_u32 v4, vcc_lo, v4, -4
	v_add_co_ci_u32_e32 v5, vcc_lo, -1, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_lt_u64_e32 vcc_lo, 3, v[4:5]
	s_and_b32 vcc_lo, exec_lo, vcc_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_store_b8 v[2:3], v6
	flat_load_u8 v6, v[0:1] offset:1
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_store_b8 v[2:3], v6 offset:1
	flat_load_u8 v6, v[0:1] offset:2
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_store_b8 v[2:3], v6 offset:2
	flat_load_u8 v6, v[0:1] offset:3
	v_add_co_u32 v0, s0, v0, 4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v1, s0, 0, v1, s0
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_store_b8 v[2:3], v6 offset:3
	v_add_co_u32 v2, s0, v2, 4
	v_add_co_ci_u32_e64 v3, s0, 0, v3, s0
	s_cbranch_vccnz .LBB0_15
.LBB0_16:                               ; %NodeBlock74
	v_cmp_gt_i64_e32 vcc_lo, 2, v[4:5]
	s_cbranch_vccnz .LBB0_22
; %bb.17:                               ; %NodeBlock72
	v_cmp_lt_i64_e32 vcc_lo, 2, v[4:5]
	s_mov_b32 s0, -1
	s_cbranch_vccz .LBB0_20
; %bb.18:                               ; %LeafBlock70
	v_cmp_eq_u64_e32 vcc_lo, 3, v[4:5]
	s_mov_b32 s0, 0
	s_cbranch_vccz .LBB0_20
; %bb.19:
	s_waitcnt vmcnt(0)
	flat_load_u8 v6, v[0:1] offset:2
	s_mov_b32 s0, -1
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_store_b8 v[2:3], v6 offset:2
.LBB0_20:                               ; %Flow76
	s_mov_b32 s1, 0
	s_and_b32 vcc_lo, exec_lo, s0
	s_mov_b32 s0, 0
	s_cbranch_vccz .LBB0_23
; %bb.21:
	s_waitcnt vmcnt(0)
	flat_load_u8 v6, v[0:1] offset:1
	s_mov_b32 s0, -1
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_store_b8 v[2:3], v6 offset:1
	s_branch .LBB0_23
.LBB0_22:
	s_mov_b32 s1, -1
	s_mov_b32 s0, 0
.LBB0_23:                               ; %Flow
	s_and_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccz .LBB0_25
; %bb.24:                               ; %LeafBlock68
	v_cmp_eq_u64_e64 s0, 1, v[4:5]
.LBB0_25:                               ; %Flow79
	s_delay_alu instid0(VALU_DEP_1)
	s_and_not1_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccnz .LBB0_27
; %bb.26:
	s_waitcnt vmcnt(0)
	flat_load_u8 v0, v[0:1]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_store_b8 v[2:3], v0
.LBB0_27:                               ; %_ZL6memcpyPvPKvm.exit18
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z13string_appendP8string_tS0_S0_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 24
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 14
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z13string_appendP8string_tS0_S0_, .Lfunc_end0-_Z13string_appendP8string_tS0_S0_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 804
; NumSgprs: 16
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 1
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 16
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 24
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z13string_appendP8string_tS0_S0_
    .private_segment_fixed_size: 0
    .sgpr_count:     16
    .sgpr_spill_count: 0
    .symbol:         _Z13string_appendP8string_tS0_S0_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     8
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
