/*
	Name: Matthew Matze
	Date: 10/4/2016
	Class: csc4310
	Location: ~/csc4310/add4

	General Summary of Program

	The program is designed to take one input file holding a matrix of
	integers and add the second, third, and fourth quardrant to the first.
	After the addition the first quadrant is outputed to the output file.

	To Compile:

	nvcc addquad.cu

	To Execute:

	a.out <inputfile >outputfile


*/

#include<cuda.h>
#include<stdio.h>
#include<stdlib.h>

void load(int *matrix, int n);
/*
 * The load function puts the matrix from the file into a 1-d array of ints.
 *
 * Precondition: The file has the row/column dimension on the first line
 * which has already been read in. On the following lines it will have that
 * number of rows and columns of integers to be read in. The next parameter
 * is an empty array of integers large enough to hold the contents of the 
 * input file. Lastly we have the row/column value in the final in parameter
 *
 * Postcondition: After Execution the file has been completely read through 
 * and the integer array is now fully loaded from the provided input file
*/

__global__ void kerneladd4(int *matrix, int n);
/*
 * The kerneladd4 function adds the contents of quadrant 2, 3, and 4 into the 
 * contents of quadrant 1. 
 *
 * Precondition: The matrix array is filled with the values of the matrix
 * ready to be processed. The integer holds the size of the rows/columns
 *
 * Postcondition: After execution the contents of the first quadrant of the
 * matrix will be equal to the all four quadrants added together.
*/

void add4(int *matrix, int n);
/*
 * The add4 function sets the size of the grid and block and calls the kerneladd4
 * function. 
 *
 * Precondition: The matrix array is filled with the values of the matrix
 * ready to be processed. The integer holds the size of the rows/columns
 *
 * Postcondition: After execution the contents of the first quadrant of the
 * matrix will be equal to the all four quadrants added together.
*/

void outfunc(int *output, int n);
/*
 * The output function outputs the  matrix in the form of a 1-d array to the
 * output file.
 *
 * Precondition: The first parameter is the array of the integers we have
 * already processed and the second is the row/column dimension
 *
 * Postcondition: After Execution the output file is loaded with the first
 * quadrant of the output array.
*/
int main(int argc, char *argv[]){

	int *matrix;
	int n;
	//Intialize Variables

	scanf("%d", &n);
	//Scan in the size
	
   matrix = (int*) malloc(n*n*sizeof(int *));
   //Allocate memory for matrix
	
	load(matrix, n);
	//Load the 1-d array from the input file
	
	add4(matrix, n);
	//add all quadrants of the matrix into the first

	outfunc(matrix, n);
	//Output the matrix to the file and close the file	

	return 0;
}
void load(int *matrix,int n){
	for(int i=0;i<n*n;i++){
		scanf("%d", &matrix[i]);
	}
}
__global__ void kerneladd4(int *matrix, int n){

	int row = threadIdx.x + blockDim.x * blockIdx.x;
	int col = threadIdx.y + blockDim.y * blockIdx.y;
	if((row<n/2)&&col<(n/2)){
		int loc=row+(col*n);
		matrix[loc]+=matrix[loc+(n/2)]
		+matrix[loc+(n*n/2)]+matrix[loc+(n*n/2)+(n/2)];
	}

}
void add4(int *matrix, int n){
	
	int size=n*n*sizeof(int *);
	int *output;
	cudaMalloc((void **) &output, size);
	cudaMemcpy(output, matrix, size, cudaMemcpyHostToDevice);
	
	dim3 DimGrid((int)ceil((double)n/8.0),(int)ceil((double)n/8.0),1);
	if(size%8) DimGrid.x++;
	dim3 DimBlock(8,8,1);
	
	kerneladd4<<<DimGrid,DimBlock>>>(output, n);
	cudaMemcpy(matrix, output, size, cudaMemcpyDeviceToHost);

	cudaFree(output);
}
void outfunc(int *output, int n){
	int loc=0;
	printf("%d\n", n);
	for(int j=0;j<n/2;j++){
		for(int i=0;i<n/2;i++){
			loc=i+(j*n);
			printf("%d ", output[loc]);
		}
		printf("\n");
	}
}

	.file	"tmpxft_003a37ed_00000000-6_addquad.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2033:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2033:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"%d"
	.text
	.globl	_Z4loadPii
	.type	_Z4loadPii, @function
_Z4loadPii:
.LFB2028:
	.cfi_startproc
	endbr64
	imull	%esi, %esi
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	leaq	.LC0(%rip), %r12
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	%rdi, %rbx
	movslq	%esi, %rsi
	leaq	(%rdi,%rsi,4), %rbp
.L3:
	cmpq	%rbp, %rbx
	je	.L7
	movq	%rbx, %rsi
	movq	%r12, %rdi
	xorl	%eax, %eax
	addq	$4, %rbx
	call	__isoc23_scanf@PLT
	jmp	.L3
.L7:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	_Z4loadPii, .-_Z4loadPii
	.section	.rodata.str1.1
.LC1:
	.string	"%d\n"
.LC2:
	.string	"%d "
.LC3:
	.string	"\n"
	.text
	.globl	_Z7outfuncPii
	.type	_Z7outfuncPii, @function
_Z7outfuncPii:
.LFB2030:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	%esi, %edx
	xorl	%eax, %eax
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	xorl	%r13d, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	xorl	%r12d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rdi, %rbp
	movl	$2, %edi
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%esi, %ebx
	leaq	.LC1(%rip), %rsi
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	call	__printf_chk@PLT
	movl	%ebx, %eax
	movl	$2, %ecx
	cltd
	idivl	%ecx
	movl	%eax, 4(%rsp)
	movslq	%eax, %r14
.L9:
	cmpl	%r12d, 4(%rsp)
	jle	.L8
	cmpl	$1, %ebx
	jle	.L13
	movslq	%r13d, %rax
	leaq	0(%rbp,%rax,4), %rcx
	addq	%r14, %rax
	leaq	0(%rbp,%rax,4), %r15
.L10:
	movl	(%rcx), %edx
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	movq	%rcx, 8(%rsp)
	call	__printf_chk@PLT
	movq	8(%rsp), %rcx
	addq	$4, %rcx
	cmpq	%r15, %rcx
	jne	.L10
.L13:
	leaq	.LC3(%rip), %rsi
	xorl	%eax, %eax
	incl	%r12d
	addl	%ebx, %r13d
	movl	$2, %edi
	call	__printf_chk@PLT
	jmp	.L9
.L8:
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2030:
	.size	_Z7outfuncPii, .-_Z7outfuncPii
	.globl	_Z31__device_stub__Z10kerneladd4PiiPii
	.type	_Z31__device_stub__Z10kerneladd4PiiPii, @function
_Z31__device_stub__Z10kerneladd4PiiPii:
.LFB2055:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movl	%esi, 4(%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L16
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z10kerneladd4Pii(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L16:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L18
	call	__stack_chk_fail@PLT
.L18:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2055:
	.size	_Z31__device_stub__Z10kerneladd4PiiPii, .-_Z31__device_stub__Z10kerneladd4PiiPii
	.globl	_Z10kerneladd4Pii
	.type	_Z10kerneladd4Pii, @function
_Z10kerneladd4Pii:
.LFB2056:
	.cfi_startproc
	endbr64
	jmp	_Z31__device_stub__Z10kerneladd4PiiPii
	.cfi_endproc
.LFE2056:
	.size	_Z10kerneladd4Pii, .-_Z10kerneladd4Pii
	.globl	_Z4add4Pii
	.type	_Z4add4Pii, @function
_Z4add4Pii:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movl	%esi, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rdi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movl	%esi, %ebx
	imull	%esi, %ebx
	subq	$48, %rsp
	.cfi_def_cfa_offset 80
	movq	%fs:40, %rax
	movq	%rax, 40(%rsp)
	xorl	%eax, %eax
	sall	$3, %ebx
	leaq	8(%rsp), %rdi
	movslq	%ebx, %rbx
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rdi
	movq	%rbx, %rdx
	movq	%rbp, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	cvtsi2sdl	%r12d, %xmm0
	mulsd	.LC4(%rip), %xmm0
	call	ceil@PLT
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	cvttsd2sil	%xmm0, %eax
	movl	$1, %esi
	movabsq	$34359738376, %rdx
	movl	%eax, 16(%rsp)
	movl	%eax, 20(%rsp)
	movq	16(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L22
	movq	8(%rsp), %rdi
	movl	%r12d, %esi
	call	_Z31__device_stub__Z10kerneladd4PiiPii
.L22:
	movq	8(%rsp), %rsi
	movq	%rbp, %rdi
	movl	$2, %ecx
	movq	%rbx, %rdx
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rax
	subq	%fs:40, %rax
	je	.L23
	call	__stack_chk_fail@PLT
.L23:
	addq	$48, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2029:
	.size	_Z4add4Pii, .-_Z4add4Pii
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	leaq	.LC0(%rip), %rdi
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	subq	$24, %rsp
	.cfi_def_cfa_offset 48
	movq	%fs:40, %rax
	movq	%rax, 8(%rsp)
	xorl	%eax, %eax
	leaq	4(%rsp), %rsi
	call	__isoc23_scanf@PLT
	movl	4(%rsp), %ebp
	movl	%ebp, %edi
	imull	%ebp, %edi
	movslq	%edi, %rdi
	salq	$3, %rdi
	call	malloc@PLT
	movl	%ebp, %esi
	movq	%rax, %rdi
	movq	%rax, %rbx
	call	_Z4loadPii
	movl	4(%rsp), %esi
	movq	%rbx, %rdi
	call	_Z4add4Pii
	movl	4(%rsp), %esi
	movq	%rbx, %rdi
	call	_Z7outfuncPii
	movq	8(%rsp), %rax
	subq	%fs:40, %rax
	je	.L26
	call	__stack_chk_fail@PLT
.L26:
	addq	$24, %rsp
	.cfi_def_cfa_offset 24
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	main, .-main
	.section	.rodata.str1.1
.LC5:
	.string	"_Z10kerneladd4Pii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2058:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC5(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z10kerneladd4Pii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2058:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC4:
	.long	0
	.long	1069547520
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

/*
	Name: Matthew Matze
	Date: 10/4/2016
	Class: csc4310
	Location: ~/csc4310/add4

	General Summary of Program

	The program is designed to take one input file holding a matrix of
	integers and add the second, third, and fourth quardrant to the first.
	After the addition the first quadrant is outputed to the output file.

	To Compile:

	nvcc addquad.cu

	To Execute:

	a.out <inputfile >outputfile


*/

#include<hip/hip_runtime.h>
#include<stdio.h>
#include<stdlib.h>

void load(int *matrix, int n);
/*
 * The load function puts the matrix from the file into a 1-d array of ints.
 *
 * Precondition: The file has the row/column dimension on the first line
 * which has already been read in. On the following lines it will have that
 * number of rows and columns of integers to be read in. The next parameter
 * is an empty array of integers large enough to hold the contents of the 
 * input file. Lastly we have the row/column value in the final in parameter
 *
 * Postcondition: After Execution the file has been completely read through 
 * and the integer array is now fully loaded from the provided input file
*/

__global__ void kerneladd4(int *matrix, int n);
/*
 * The kerneladd4 function adds the contents of quadrant 2, 3, and 4 into the 
 * contents of quadrant 1. 
 *
 * Precondition: The matrix array is filled with the values of the matrix
 * ready to be processed. The integer holds the size of the rows/columns
 *
 * Postcondition: After execution the contents of the first quadrant of the
 * matrix will be equal to the all four quadrants added together.
*/

void add4(int *matrix, int n);
/*
 * The add4 function sets the size of the grid and block and calls the kerneladd4
 * function. 
 *
 * Precondition: The matrix array is filled with the values of the matrix
 * ready to be processed. The integer holds the size of the rows/columns
 *
 * Postcondition: After execution the contents of the first quadrant of the
 * matrix will be equal to the all four quadrants added together.
*/

void outfunc(int *output, int n);
/*
 * The output function outputs the  matrix in the form of a 1-d array to the
 * output file.
 *
 * Precondition: The first parameter is the array of the integers we have
 * already processed and the second is the row/column dimension
 *
 * Postcondition: After Execution the output file is loaded with the first
 * quadrant of the output array.
*/
int main(int argc, char *argv[]){

	int *matrix;
	int n;
	//Intialize Variables

	scanf("%d", &n);
	//Scan in the size
	
   matrix = (int*) malloc(n*n*sizeof(int *));
   //Allocate memory for matrix
	
	load(matrix, n);
	//Load the 1-d array from the input file
	
	add4(matrix, n);
	//add all quadrants of the matrix into the first

	outfunc(matrix, n);
	//Output the matrix to the file and close the file	

	return 0;
}
void load(int *matrix,int n){
	for(int i=0;i<n*n;i++){
		scanf("%d", &matrix[i]);
	}
}
__global__ void kerneladd4(int *matrix, int n){

	int row = threadIdx.x + blockDim.x * blockIdx.x;
	int col = threadIdx.y + blockDim.y * blockIdx.y;
	if((row<n/2)&&col<(n/2)){
		int loc=row+(col*n);
		matrix[loc]+=matrix[loc+(n/2)]
		+matrix[loc+(n*n/2)]+matrix[loc+(n*n/2)+(n/2)];
	}

}
void add4(int *matrix, int n){
	
	int size=n*n*sizeof(int *);
	int *output;
	hipMalloc((void **) &output, size);
	hipMemcpy(output, matrix, size, hipMemcpyHostToDevice);
	
	dim3 DimGrid((int)ceil((double)n/8.0),(int)ceil((double)n/8.0),1);
	if(size%8) DimGrid.x++;
	dim3 DimBlock(8,8,1);
	
	kerneladd4<<<DimGrid,DimBlock>>>(output, n);
	hipMemcpy(matrix, output, size, hipMemcpyDeviceToHost);

	hipFree(output);
}
void outfunc(int *output, int n){
	int loc=0;
	printf("%d\n", n);
	for(int j=0;j<n/2;j++){
		for(int i=0;i<n/2;i++){
			loc=i+(j*n);
			printf("%d ", output[loc]);
		}
		printf("\n");
	}
}

	.text
	.file	"addquad.hip"
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	xorl	%ebp, %ebp
	leaq	4(%rsp), %rbx
	movl	$.L.str, %edi
	movq	%rbx, %rsi
	xorl	%eax, %eax
	callq	__isoc23_scanf
	movl	(%rbx), %r14d
	movl	%r14d, %r15d
	imull	%r15d, %r15d
	leaq	(,%r15,8), %rdi
	callq	malloc
	movq	%rax, %rbx
	testl	%r14d, %r14d
	je	.LBB0_4
# %bb.1:                                # %.lr.ph.preheader.i
	cmpl	$1, %r15d
	adcl	$0, %r15d
	movq	%rbx, %r14
.LBB0_2:                                # %.lr.ph.i
                                        # =>This Inner Loop Header: Depth=1
	movl	$.L.str, %edi
	movq	%r14, %rsi
	xorl	%eax, %eax
	callq	__isoc23_scanf
	addq	$4, %r14
	decq	%r15
	jne	.LBB0_2
# %bb.3:                                # %_Z4loadPii.exit.loopexit
	movl	4(%rsp), %ebp
.LBB0_4:                                # %_Z4loadPii.exit
	movq	%rbx, %rdi
	movl	%ebp, %esi
	callq	_Z4add4Pii
	movl	4(%rsp), %esi
	movq	%rbx, %rdi
	callq	_Z7outfuncPii
	xorl	%eax, %eax
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	main, .Lfunc_end0-main
	.cfi_endproc
                                        # -- End function
	.globl	_Z4loadPii                      # -- Begin function _Z4loadPii
	.type	_Z4loadPii,@function
_Z4loadPii:                             # @_Z4loadPii
	.cfi_startproc
# %bb.0:
	testl	%esi, %esi
	je	.LBB1_4
# %bb.1:                                # %.lr.ph.preheader
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	pushq	%rax
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	movl	%esi, %ebx
	movq	%rdi, %r14
	imull	%ebx, %ebx
	cmpl	$1, %ebx
	adcl	$0, %ebx
.LBB1_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movl	$.L.str, %edi
	movq	%r14, %rsi
	xorl	%eax, %eax
	callq	__isoc23_scanf
	addq	$4, %r14
	decq	%rbx
	jne	.LBB1_2
# %bb.3:
	addq	$8, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r14
.LBB1_4:                                # %._crit_edge
	retq
.Lfunc_end1:
	.size	_Z4loadPii, .Lfunc_end1-_Z4loadPii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z4add4Pii
.LCPI2_0:
	.quad	0x3fc0000000000000              # double 0.125
	.text
	.globl	_Z4add4Pii
	.type	_Z4add4Pii,@function
_Z4add4Pii:                             # @_Z4add4Pii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%esi, %ebp
	movq	%rdi, %rbx
	movl	%esi, %eax
	imull	%esi, %eax
	shll	$3, %eax
	movslq	%eax, %r14
	movq	%rsp, %r15
	movq	%r15, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movq	(%r15), %rdi
	movq	%rbx, %rsi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	cvtsi2sd	%ebp, %xmm0
	mulsd	.LCPI2_0(%rip), %xmm0
	callq	ceil@PLT
	cvttsd2si	%xmm0, %eax
	movq	%rax, %rdi
	shlq	$32, %rdi
	orq	%rax, %rdi
	movabsq	$34359738376, %rdx              # imm = 0x800000008
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_2
# %bb.1:
	movq	(%rsp), %rdi
	movl	%ebp, %esi
	callq	_Z25__device_stub__kerneladd4Pii
.LBB2_2:
	movq	(%rsp), %rsi
	movq	%rbx, %rdi
	movq	%r14, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	(%rsp), %rdi
	callq	hipFree
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z4add4Pii, .Lfunc_end2-_Z4add4Pii
	.cfi_endproc
                                        # -- End function
	.globl	_Z7outfuncPii                   # -- Begin function _Z7outfuncPii
	.type	_Z7outfuncPii,@function
_Z7outfuncPii:                          # @_Z7outfuncPii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%esi, %ebx
	movq	%rdi, (%rsp)                    # 8-byte Spill
	movl	$.L.str.1, %edi
	xorl	%eax, %eax
	callq	printf
	cmpl	$2, %ebx
	jl	.LBB3_5
# %bb.1:                                # %.preheader.lr.ph
	movl	%ebx, %r15d
	shrl	%r15d
	xorl	%ebp, %ebp
	xorl	%r12d, %r12d
.LBB3_2:                                # %.lr.ph
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_3 Depth 2
	movl	%ebp, %eax
	movq	(%rsp), %rcx                    # 8-byte Reload
	leaq	(%rcx,%rax,4), %r13
	xorl	%r14d, %r14d
.LBB3_3:                                #   Parent Loop BB3_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	(%r13,%r14,4), %esi
	movl	$.L.str.2, %edi
	xorl	%eax, %eax
	callq	printf
	incq	%r14
	cmpq	%r14, %r15
	jne	.LBB3_3
# %bb.4:                                # %._crit_edge
                                        #   in Loop: Header=BB3_2 Depth=1
	movl	$10, %edi
	callq	putchar@PLT
	incq	%r12
	addl	%ebx, %ebp
	cmpq	%r15, %r12
	jne	.LBB3_2
.LBB3_5:                                # %._crit_edge15
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z7outfuncPii, .Lfunc_end3-_Z7outfuncPii
	.cfi_endproc
                                        # -- End function
	.globl	_Z25__device_stub__kerneladd4Pii # -- Begin function _Z25__device_stub__kerneladd4Pii
	.type	_Z25__device_stub__kerneladd4Pii,@function
_Z25__device_stub__kerneladd4Pii:       # @_Z25__device_stub__kerneladd4Pii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	4(%rsp), %rcx
	movl	%esi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10kerneladd4Pii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z25__device_stub__kerneladd4Pii, .Lfunc_end4-_Z25__device_stub__kerneladd4Pii
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB5_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB5_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10kerneladd4Pii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end5:
	.size	__hip_module_ctor, .Lfunc_end5-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB6_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB6_2:
	retq
.Lfunc_end6:
	.size	__hip_module_dtor, .Lfunc_end6-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"%d"
	.size	.L.str, 3

	.type	_Z10kerneladd4Pii,@object       # @_Z10kerneladd4Pii
	.section	.rodata,"a",@progbits
	.globl	_Z10kerneladd4Pii
	.p2align	3, 0x0
_Z10kerneladd4Pii:
	.quad	_Z25__device_stub__kerneladd4Pii
	.size	_Z10kerneladd4Pii, 8

	.type	.L.str.1,@object                # @.str.1
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.1:
	.asciz	"%d\n"
	.size	.L.str.1, 4

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"%d "
	.size	.L.str.2, 4

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z10kerneladd4Pii"
	.size	.L__unnamed_1, 18

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z25__device_stub__kerneladd4Pii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z10kerneladd4Pii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z10kerneladd4Pii       ; -- Begin function _Z10kerneladd4Pii
	.globl	_Z10kerneladd4Pii
	.p2align	8
	.type	_Z10kerneladd4Pii,@function
_Z10kerneladd4Pii:                      ; @_Z10kerneladd4Pii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x1c
	s_load_b32 s3, s[0:1], 0x8
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s4, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[0:1], null, s14, s2, v[2:3]
	v_mad_u64_u32 v[1:2], null, s15, s4, v[3:4]
	s_lshr_b32 s2, s3, 31
	s_mov_b32 s4, exec_lo
	s_add_i32 s2, s3, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_ashr_i32 s2, s2, 1
	v_max_i32_e32 v2, v0, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s2, v2
	s_cbranch_execz .LBB0_2
; %bb.1:
	v_mad_u64_u32 v[2:3], null, v1, s3, v[0:1]
	s_load_b64 s[0:1], s[0:1], 0x0
	s_mul_i32 s3, s3, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshr_b32 s3, s3, 1
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_add_nc_u32_e32 v0, s3, v2
	v_add_nc_u32_e32 v4, s2, v2
	v_ashrrev_i32_e32 v3, 31, v2
	s_ashr_i32 s3, s2, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	s_lshl_b64 s[2:3], s[2:3], 2
	v_ashrrev_i32_e32 v1, 31, v0
	v_ashrrev_i32_e32 v5, 31, v4
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s0, v4
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v5, vcc_lo
	v_add_co_u32 v6, vcc_lo, v0, s2
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v7, vcc_lo, s3, v1, vcc_lo
	v_add_co_u32 v2, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
	s_clause 0x3
	global_load_b32 v4, v[4:5], off
	global_load_b32 v0, v[0:1], off
	global_load_b32 v1, v[6:7], off
	global_load_b32 v5, v[2:3], off
	s_waitcnt vmcnt(2)
	v_add_nc_u32_e32 v0, v0, v4
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_add3_u32 v0, v0, v1, v5
	global_store_b32 v[2:3], v0, off
.LBB0_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10kerneladd4Pii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z10kerneladd4Pii, .Lfunc_end0-_Z10kerneladd4Pii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 348
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z10kerneladd4Pii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z10kerneladd4Pii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     8
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
