#include <iostream>
#include <cstdio>
#include <cstdlib>
#include <cstring>
using namespace std;

#define N 1024
#define INF 0x03F3F3F
int map[N * N];
int path[N];

__global__ void kernel1(int *nv,int *map,int *cost,int *tmp_cost,bool *visited,int * tmp_path)
{
	const int nn = 1024;
	int tid = threadIdx.x + blockIdx.x * blockDim.x;
	//fetch all its neighbour
	if(visited[tid])
	{
		visited[tid] = false;
		for(int i = 0; i < *nv; ++i)
		{
			if(cost[tid] + map[tid * nn + i] < tmp_cost[i])
			{
				tmp_path[i] = tid;
				tmp_cost[i] = cost[tid] + map[tid * N + i];
			}
		}
	}
	return;
}
__global__ void kernel2(int *cost,int *tmp_cost,bool *visited,bool *flag,int *tmp_path,int *path)
{
	int tid = threadIdx.x + blockIdx.x * blockDim.x;
	//some vertex can be updated,means that it is the new one to the queue
	if(cost[tid] > tmp_cost[tid])
	{
		path[tid] = tmp_path[tid];
		visited[tid] = true;
		cost[tid] = tmp_cost[tid];
		*flag = true;
	}
	tmp_cost[tid] = cost[tid];//if cost[tid] <= tmp_cost[tid]
	tmp_path[tid] = path[tid];
	return;
}
void print_path(int node,int path[])
{
	if(path[node] == -1)
	{
		printf("%d ",node + 1);
		return;
	}
	else
	{
		print_path(path[node],path);
		printf("%d ",node + 1);
	}
	return;
}

int main()
{
	freopen("input_dijkstra","r",stdin);
	int cost[N],tmp_cost[N],path[N],tmp_path[N];
	bool visited[N],flag;

	int *dev_cost,*dev_tmp_cost,*dev_map,*dev_nv,*dev_path,*dev_tmp_path;
	bool *dev_visited,*dev_flag;

	int nv,ne;
	scanf("%d%d",&nv,&ne);
	//initialize
	for(int i = 0; i < nv; ++i)
	{
		cost[i] = INF;
		tmp_cost[i] = INF;
		visited[i] = false;
		for(int j = 0; j < nv; ++j)
			map[i * N + j] = map[j * N + i] = INF;
	}
	//read all the edges
	for(int i = 0; i < ne; ++i)
	{
		int p,q,w;
		scanf("%d%d%d",&p,&q,&w);
		map[p * N + q] = map[q * N + p] = w;
	}

	int source;
	scanf("%d",&source);
	cost[source] = tmp_cost[source] = 0;
	visited[source] = true;
	flag = true;
	path[source] = -1;
	tmp_path[source] = -1;

	cout<<0<<endl;
	cudaMalloc((void**)&dev_cost,N * sizeof(int));
	cout<<1<<endl;
	cudaMalloc((void**)&dev_tmp_cost,N * sizeof(int));
	cudaMalloc((void**)&dev_visited,N * sizeof(bool));
	cudaMalloc((void**)&dev_map,N * N * sizeof(int));
	cudaMalloc((void**)&dev_flag,sizeof(bool));
	cudaMalloc((void**)&dev_nv,sizeof(int));
	cudaMalloc((void**)&dev_path,N * sizeof(int));
	cudaMalloc((void**)&dev_tmp_path,N * sizeof(int));

	cudaMemcpy(dev_cost,cost,N * sizeof(int),cudaMemcpyHostToDevice);
	cudaMemcpy(dev_tmp_cost,tmp_cost,N * sizeof(int),cudaMemcpyHostToDevice);
	cudaMemcpy(dev_visited,visited,N * sizeof(bool),cudaMemcpyHostToDevice);
	cudaMemcpy(dev_map,map,N * N * sizeof(int),cudaMemcpyHostToDevice);
	cudaMemcpy(dev_flag,&flag,sizeof(bool),cudaMemcpyHostToDevice);
	cudaMemcpy(dev_nv,&nv,sizeof(int),cudaMemcpyHostToDevice);
	cudaMemcpy(dev_path,path,N*sizeof(int),cudaMemcpyHostToDevice);
	cudaMemcpy(dev_tmp_path,tmp_path,N*sizeof(int),cudaMemcpyHostToDevice);

	while(flag)
	{
		flag = false;
		kernel1<<<1,nv>>>(dev_nv,dev_map,dev_cost,dev_tmp_cost,dev_visited,dev_tmp_path);
		cudaMemcpy(dev_flag,&flag,sizeof(bool),cudaMemcpyHostToDevice);
		kernel2<<<1,nv>>>(dev_cost,dev_tmp_cost,dev_visited,dev_flag,dev_tmp_path,dev_path);
		cudaMemcpy(&flag,dev_flag,sizeof(bool),cudaMemcpyDeviceToHost);
	}
	cudaMemcpy(cost,dev_cost,N*sizeof(int),cudaMemcpyDeviceToHost);
	cudaMemcpy(path,dev_path,N*sizeof(int),cudaMemcpyDeviceToHost);
	for(int i = 0; i < nv; ++i)
	{
		printf("Node %d cost = %2d  path: ",i+1,cost[i]);
		print_path(i,path);
		printf("\n");
	}
	cout << endl;
	return 0;
}




	.file	"tmpxft_002c8db0_00000000-6_dijkstra.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3639:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3639:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"%d "
	.text
	.globl	_Z10print_pathiPi
	.type	_Z10print_pathiPi, @function
_Z10print_pathiPi:
.LFB3635:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movslq	%edi, %rax
	leal	1(%rdi), %edx
	leaq	.LC0(%rip), %rbx
	subq	$16, %rsp
	.cfi_def_cfa_offset 32
	movl	(%rsi,%rax,4), %eax
	cmpl	$-1, %eax
	je	.L5
	movl	%eax, %edi
	movl	%edx, 12(%rsp)
	call	_Z10print_pathiPi
	movl	12(%rsp), %edx
.L5:
	addq	$16, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	__printf_chk@PLT
	.cfi_endproc
.LFE3635:
	.size	_Z10print_pathiPi, .-_Z10print_pathiPi
	.globl	_Z36__device_stub__Z7kernel1PiS_S_S_PbS_PiS_S_S_PbS_
	.type	_Z36__device_stub__Z7kernel1PiS_S_S_PbS_PiS_S_S_PbS_, @function
_Z36__device_stub__Z7kernel1PiS_S_S_PbS_PiS_S_S_PbS_:
.LFB3661:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	64(%rsp), %rcx
	movq	%r8, 8(%rsp)
	movq	%r9, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 152(%rsp)
	movq	%rsp, %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L7
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z7kernel1PiS_S_S_PbS_(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L7:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L9
	call	__stack_chk_fail@PLT
.L9:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3661:
	.size	_Z36__device_stub__Z7kernel1PiS_S_S_PbS_PiS_S_S_PbS_, .-_Z36__device_stub__Z7kernel1PiS_S_S_PbS_PiS_S_S_PbS_
	.globl	_Z7kernel1PiS_S_S_PbS_
	.type	_Z7kernel1PiS_S_S_PbS_, @function
_Z7kernel1PiS_S_S_PbS_:
.LFB3662:
	.cfi_startproc
	endbr64
	jmp	_Z36__device_stub__Z7kernel1PiS_S_S_PbS_PiS_S_S_PbS_
	.cfi_endproc
.LFE3662:
	.size	_Z7kernel1PiS_S_S_PbS_, .-_Z7kernel1PiS_S_S_PbS_
	.globl	_Z37__device_stub__Z7kernel2PiS_PbS0_S_S_PiS_PbS0_S_S_
	.type	_Z37__device_stub__Z7kernel2PiS_PbS0_S_S_PiS_PbS0_S_S_, @function
_Z37__device_stub__Z7kernel2PiS_PbS0_S_S_PiS_PbS0_S_S_:
.LFB3663:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	64(%rsp), %rcx
	movq	%r8, 8(%rsp)
	movq	%r9, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 152(%rsp)
	movq	%rsp, %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L12
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z7kernel2PiS_PbS0_S_S_(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L12:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L14
	call	__stack_chk_fail@PLT
.L14:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3663:
	.size	_Z37__device_stub__Z7kernel2PiS_PbS0_S_S_PiS_PbS0_S_S_, .-_Z37__device_stub__Z7kernel2PiS_PbS0_S_S_PiS_PbS0_S_S_
	.globl	_Z7kernel2PiS_PbS0_S_S_
	.type	_Z7kernel2PiS_PbS0_S_S_, @function
_Z7kernel2PiS_PbS0_S_S_:
.LFB3664:
	.cfi_startproc
	endbr64
	jmp	_Z37__device_stub__Z7kernel2PiS_PbS0_S_S_PiS_PbS0_S_S_
	.cfi_endproc
.LFE3664:
	.size	_Z7kernel2PiS_PbS0_S_S_, .-_Z7kernel2PiS_PbS0_S_S_
	.section	.rodata.str1.1
.LC1:
	.string	"r"
.LC2:
	.string	"input_dijkstra"
.LC3:
	.string	"%d%d"
.LC4:
	.string	"%d%d%d"
.LC5:
	.string	"%d"
.LC6:
	.string	"Node %d cost = %2d  path: "
.LC7:
	.string	"\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3636:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	leaq	-16384(%rsp), %r11
	.cfi_def_cfa 11, 16440
.LPSRL0:
	subq	$4096, %rsp
	orq	$0, (%rsp)
	cmpq	%r11, %rsp
	jne	.LPSRL0
	.cfi_def_cfa_register 7
	subq	$1144, %rsp
	.cfi_def_cfa_offset 17584
	movq	stdin(%rip), %rdx
	leaq	.LC1(%rip), %rsi
	leaq	.LC2(%rip), %rdi
	movq	%fs:40, %rax
	movq	%rax, 17512(%rsp)
	xorl	%eax, %eax
	leaq	4(%rsp), %rbp
	call	freopen@PLT
	leaq	8(%rsp), %rdx
	movq	%rbp, %rsi
	xorl	%eax, %eax
	leaq	.LC3(%rip), %rdi
	call	__isoc23_scanf@PLT
	leaq	map(%rip), %rdx
	movl	4(%rsp), %r8d
	xorl	%eax, %eax
	movq	%rdx, %rsi
	movq	%rdx, %rbx
.L18:
	cmpl	%eax, %r8d
	jle	.L32
	movl	$4144959, 1128(%rsp,%rax,4)
	movq	%rdx, %rdi
	xorl	%ecx, %ecx
	movl	$4144959, 5224(%rsp,%rax,4)
	movb	$0, 104(%rsp,%rax)
.L19:
	movl	$4144959, (%rdi)
	addq	$4096, %rdi
	movl	$4144959, (%rsi,%rcx,4)
	incq	%rcx
	cmpl	%ecx, %r8d
	jg	.L19
	incq	%rax
	addq	$4, %rdx
	addq	$4096, %rsi
	jmp	.L18
.L32:
	xorl	%r13d, %r13d
	leaq	.LC4(%rip), %r12
.L21:
	cmpl	%r13d, 8(%rsp)
	leaq	72(%rsp), %r14
	jle	.L33
	leaq	92(%rsp), %rcx
	leaq	80(%rsp), %rdx
	movq	%r14, %rsi
	movq	%r12, %rdi
	xorl	%eax, %eax
	incl	%r13d
	call	__isoc23_scanf@PLT
	movl	80(%rsp), %esi
	movl	72(%rsp), %eax
	movl	92(%rsp), %ecx
	movl	%esi, %edx
	sall	$10, %edx
	addl	%eax, %edx
	sall	$10, %eax
	addl	%esi, %eax
	movslq	%edx, %rdx
	cltq
	movl	%ecx, (%rbx,%rdx,4)
	movl	%ecx, (%rbx,%rax,4)
	jmp	.L21
.L33:
	leaq	12(%rsp), %rsi
	leaq	.LC5(%rip), %rdi
	xorl	%eax, %eax
	call	__isoc23_scanf@PLT
	movslq	12(%rsp), %rax
	xorl	%edx, %edx
	xorl	%esi, %esi
	leaq	_ZSt4cout(%rip), %r12
	movb	$1, 3(%rsp)
	leaq	1128(%rsp), %r13
	movq	%r12, %rdi
	movl	%edx, 5224(%rsp,%rax,4)
	movl	%edx, 1128(%rsp,%rax,4)
	movb	$1, 104(%rsp,%rax)
	movl	$-1, 9320(%rsp,%rax,4)
	movl	$-1, 13416(%rsp,%rax,4)
	call	_ZNSolsEi@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	leaq	16(%rsp), %rdi
	movl	$4096, %esi
	call	cudaMalloc@PLT
	movl	$1, %esi
	movq	%r12, %rdi
	call	_ZNSolsEi@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	leaq	24(%rsp), %rdi
	movl	$4096, %esi
	call	cudaMalloc@PLT
	leaq	64(%rsp), %rdi
	movl	$1024, %esi
	call	cudaMalloc@PLT
	leaq	32(%rsp), %rdi
	movl	$4194304, %esi
	call	cudaMalloc@PLT
	movq	%r14, %rdi
	movl	$1, %esi
	leaq	3(%rsp), %r14
	call	cudaMalloc@PLT
	leaq	40(%rsp), %rdi
	movl	$4, %esi
	call	cudaMalloc@PLT
	leaq	48(%rsp), %rdi
	movl	$4096, %esi
	call	cudaMalloc@PLT
	leaq	56(%rsp), %rdi
	movl	$4096, %esi
	call	cudaMalloc@PLT
	movq	16(%rsp), %rdi
	movl	$1, %ecx
	movq	%r13, %rsi
	movl	$4096, %edx
	call	cudaMemcpy@PLT
	movq	24(%rsp), %rdi
	movl	$1, %ecx
	leaq	5224(%rsp), %rsi
	movl	$4096, %edx
	call	cudaMemcpy@PLT
	movq	64(%rsp), %rdi
	leaq	104(%rsp), %rsi
	movl	$1, %ecx
	movl	$1024, %edx
	call	cudaMemcpy@PLT
	movq	32(%rsp), %rdi
	movq	%rbx, %rsi
	movl	$1, %ecx
	movabsq	$4294967297, %rbx
	movl	$4194304, %edx
	call	cudaMemcpy@PLT
	movq	72(%rsp), %rdi
	movl	$1, %ecx
	movq	%r14, %rsi
	movl	$1, %edx
	call	cudaMemcpy@PLT
	movq	40(%rsp), %rdi
	movq	%rbp, %rsi
	movl	$1, %ecx
	movl	$4, %edx
	leaq	9320(%rsp), %rbp
	call	cudaMemcpy@PLT
	movq	48(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	movl	$4096, %edx
	call	cudaMemcpy@PLT
	movq	56(%rsp), %rdi
	movl	$1, %ecx
	leaq	13416(%rsp), %rsi
	movl	$4096, %edx
	call	cudaMemcpy@PLT
.L23:
	cmpb	$0, 3(%rsp)
	je	.L34
	movl	4(%rsp), %eax
	movq	%rbx, 96(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	100(%rsp), %ecx
	movq	%rbx, %rdi
	movl	$1, %esi
	movb	$0, 3(%rsp)
	movl	%eax, 92(%rsp)
	movq	92(%rsp), %rdx
	movq	%rbx, 80(%rsp)
	movl	$1, 88(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L24
	movq	56(%rsp), %r9
	movq	64(%rsp), %r8
	movq	24(%rsp), %rcx
	movq	16(%rsp), %rdx
	movq	32(%rsp), %rsi
	movq	40(%rsp), %rdi
	call	_Z36__device_stub__Z7kernel1PiS_S_S_PbS_PiS_S_S_PbS_
.L24:
	movq	72(%rsp), %rdi
	movl	$1, %ecx
	movl	$1, %edx
	movq	%r14, %rsi
	call	cudaMemcpy@PLT
	movl	4(%rsp), %eax
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%rbx, 96(%rsp)
	movl	100(%rsp), %ecx
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	%eax, 92(%rsp)
	movq	92(%rsp), %rdx
	movq	%rbx, 80(%rsp)
	movl	$1, 88(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L25
	movq	48(%rsp), %r9
	movq	56(%rsp), %r8
	movq	72(%rsp), %rcx
	movq	64(%rsp), %rdx
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdi
	call	_Z37__device_stub__Z7kernel2PiS_PbS0_S_S_PiS_PbS0_S_S_
.L25:
	movq	72(%rsp), %rsi
	movl	$2, %ecx
	movl	$1, %edx
	movq	%r14, %rdi
	call	cudaMemcpy@PLT
	jmp	.L23
.L34:
	movq	16(%rsp), %rsi
	movl	$2, %ecx
	movq	%r13, %rdi
	xorl	%ebx, %ebx
	movl	$4096, %edx
	leaq	.LC6(%rip), %r15
	call	cudaMemcpy@PLT
	movq	48(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbp, %rdi
	movl	$4096, %edx
	call	cudaMemcpy@PLT
.L27:
	movl	%ebx, %r14d
	cmpl	%ebx, 4(%rsp)
	jle	.L35
	movl	0(%r13,%rbx,4), %ecx
	leal	1(%rbx), %edx
	movq	%r15, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	incq	%rbx
	call	__printf_chk@PLT
	movq	%rbp, %rsi
	movl	%r14d, %edi
	call	_Z10print_pathiPi
	leaq	.LC7(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	jmp	.L27
.L35:
	movq	%r12, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	movq	17512(%rsp), %rax
	subq	%fs:40, %rax
	je	.L29
	call	__stack_chk_fail@PLT
.L29:
	addq	$17528, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3636:
	.size	main, .-main
	.section	.rodata.str1.1
.LC8:
	.string	"_Z7kernel2PiS_PbS0_S_S_"
.LC9:
	.string	"_Z7kernel1PiS_S_S_PbS_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3666:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC8(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z7kernel2PiS_PbS0_S_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC9(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z7kernel1PiS_S_S_PbS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3666:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.globl	path
	.bss
	.align 32
	.type	path, @object
	.size	path, 4096
path:
	.zero	4096
	.globl	map
	.align 32
	.type	map, @object
	.size	map, 4194304
map:
	.zero	4194304
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <iostream>
#include <cstdio>
#include <cstdlib>
#include <cstring>
using namespace std;

#define N 1024
#define INF 0x03F3F3F
int map[N * N];
int path[N];

__global__ void kernel1(int *nv,int *map,int *cost,int *tmp_cost,bool *visited,int * tmp_path)
{
	const int nn = 1024;
	int tid = threadIdx.x + blockIdx.x * blockDim.x;
	//fetch all its neighbour
	if(visited[tid])
	{
		visited[tid] = false;
		for(int i = 0; i < *nv; ++i)
		{
			if(cost[tid] + map[tid * nn + i] < tmp_cost[i])
			{
				tmp_path[i] = tid;
				tmp_cost[i] = cost[tid] + map[tid * N + i];
			}
		}
	}
	return;
}
__global__ void kernel2(int *cost,int *tmp_cost,bool *visited,bool *flag,int *tmp_path,int *path)
{
	int tid = threadIdx.x + blockIdx.x * blockDim.x;
	//some vertex can be updated,means that it is the new one to the queue
	if(cost[tid] > tmp_cost[tid])
	{
		path[tid] = tmp_path[tid];
		visited[tid] = true;
		cost[tid] = tmp_cost[tid];
		*flag = true;
	}
	tmp_cost[tid] = cost[tid];//if cost[tid] <= tmp_cost[tid]
	tmp_path[tid] = path[tid];
	return;
}
void print_path(int node,int path[])
{
	if(path[node] == -1)
	{
		printf("%d ",node + 1);
		return;
	}
	else
	{
		print_path(path[node],path);
		printf("%d ",node + 1);
	}
	return;
}

int main()
{
	freopen("input_dijkstra","r",stdin);
	int cost[N],tmp_cost[N],path[N],tmp_path[N];
	bool visited[N],flag;

	int *dev_cost,*dev_tmp_cost,*dev_map,*dev_nv,*dev_path,*dev_tmp_path;
	bool *dev_visited,*dev_flag;

	int nv,ne;
	scanf("%d%d",&nv,&ne);
	//initialize
	for(int i = 0; i < nv; ++i)
	{
		cost[i] = INF;
		tmp_cost[i] = INF;
		visited[i] = false;
		for(int j = 0; j < nv; ++j)
			map[i * N + j] = map[j * N + i] = INF;
	}
	//read all the edges
	for(int i = 0; i < ne; ++i)
	{
		int p,q,w;
		scanf("%d%d%d",&p,&q,&w);
		map[p * N + q] = map[q * N + p] = w;
	}

	int source;
	scanf("%d",&source);
	cost[source] = tmp_cost[source] = 0;
	visited[source] = true;
	flag = true;
	path[source] = -1;
	tmp_path[source] = -1;

	cout<<0<<endl;
	hipMalloc((void**)&dev_cost,N * sizeof(int));
	cout<<1<<endl;
	hipMalloc((void**)&dev_tmp_cost,N * sizeof(int));
	hipMalloc((void**)&dev_visited,N * sizeof(bool));
	hipMalloc((void**)&dev_map,N * N * sizeof(int));
	hipMalloc((void**)&dev_flag,sizeof(bool));
	hipMalloc((void**)&dev_nv,sizeof(int));
	hipMalloc((void**)&dev_path,N * sizeof(int));
	hipMalloc((void**)&dev_tmp_path,N * sizeof(int));

	hipMemcpy(dev_cost,cost,N * sizeof(int),hipMemcpyHostToDevice);
	hipMemcpy(dev_tmp_cost,tmp_cost,N * sizeof(int),hipMemcpyHostToDevice);
	hipMemcpy(dev_visited,visited,N * sizeof(bool),hipMemcpyHostToDevice);
	hipMemcpy(dev_map,map,N * N * sizeof(int),hipMemcpyHostToDevice);
	hipMemcpy(dev_flag,&flag,sizeof(bool),hipMemcpyHostToDevice);
	hipMemcpy(dev_nv,&nv,sizeof(int),hipMemcpyHostToDevice);
	hipMemcpy(dev_path,path,N*sizeof(int),hipMemcpyHostToDevice);
	hipMemcpy(dev_tmp_path,tmp_path,N*sizeof(int),hipMemcpyHostToDevice);

	while(flag)
	{
		flag = false;
		kernel1<<<1,nv>>>(dev_nv,dev_map,dev_cost,dev_tmp_cost,dev_visited,dev_tmp_path);
		hipMemcpy(dev_flag,&flag,sizeof(bool),hipMemcpyHostToDevice);
		kernel2<<<1,nv>>>(dev_cost,dev_tmp_cost,dev_visited,dev_flag,dev_tmp_path,dev_path);
		hipMemcpy(&flag,dev_flag,sizeof(bool),hipMemcpyDeviceToHost);
	}
	hipMemcpy(cost,dev_cost,N*sizeof(int),hipMemcpyDeviceToHost);
	hipMemcpy(path,dev_path,N*sizeof(int),hipMemcpyDeviceToHost);
	for(int i = 0; i < nv; ++i)
	{
		printf("Node %d cost = %2d  path: ",i+1,cost[i]);
		print_path(i,path);
		printf("\n");
	}
	cout << endl;
	return 0;
}




	.text
	.file	"dijkstra.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z22__device_stub__kernel1PiS_S_S_PbS_ # -- Begin function _Z22__device_stub__kernel1PiS_S_S_PbS_
	.type	_Z22__device_stub__kernel1PiS_S_S_PbS_,@function
_Z22__device_stub__kernel1PiS_S_S_PbS_: # @_Z22__device_stub__kernel1PiS_S_S_PbS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	16(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z7kernel1PiS_S_S_PbS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z22__device_stub__kernel1PiS_S_S_PbS_, .Lfunc_end0-_Z22__device_stub__kernel1PiS_S_S_PbS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z22__device_stub__kernel2PiS_PbS0_S_S_ # -- Begin function _Z22__device_stub__kernel2PiS_PbS0_S_S_
	.type	_Z22__device_stub__kernel2PiS_PbS0_S_S_,@function
_Z22__device_stub__kernel2PiS_PbS0_S_S_: # @_Z22__device_stub__kernel2PiS_PbS0_S_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	16(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z7kernel2PiS_PbS0_S_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z22__device_stub__kernel2PiS_PbS0_S_S_, .Lfunc_end1-_Z22__device_stub__kernel2PiS_PbS0_S_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z10print_pathiPi               # -- Begin function _Z10print_pathiPi
	.type	_Z10print_pathiPi,@function
_Z10print_pathiPi:                      # @_Z10print_pathiPi
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movl	%edi, %ebx
	movslq	%edi, %rax
	movl	(%rsi,%rax,4), %edi
	cmpl	$-1, %edi
	je	.LBB2_2
# %bb.1:
	callq	_Z10print_pathiPi
.LBB2_2:                                # %common.ret
	incl	%ebx
	movl	$.L.str, %edi
	movl	%ebx, %esi
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	printf                          # TAILCALL
.Lfunc_end2:
	.size	_Z10print_pathiPi, .Lfunc_end2-_Z10print_pathiPi
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$17512, %rsp                    # imm = 0x4468
	.cfi_def_cfa_offset 17568
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	stdin(%rip), %rdx
	movl	$.L.str.1, %edi
	movl	$.L.str.2, %esi
	callq	freopen
	leaq	12(%rsp), %rbx
	leaq	28(%rsp), %rdx
	movl	$.L.str.3, %edi
	movq	%rbx, %rsi
	xorl	%eax, %eax
	callq	__isoc23_scanf
	movl	(%rbx), %eax
	testl	%eax, %eax
	jle	.LBB3_5
# %bb.1:                                # %.lr.ph42
	movl	$map, %ecx
	xorl	%edx, %edx
	movl	$4144959, %esi                  # imm = 0x3F3F3F
.LBB3_2:                                # %.lr.ph
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_3 Depth 2
	movl	%edx, %edi
	andl	$4194303, %edi                  # imm = 0x3FFFFF
	shlq	$12, %rdi
	movl	%esi, 5216(%rsp,%rdx,4)
	movl	%esi, 13408(%rsp,%rdx,4)
	movb	$0, 96(%rsp,%rdx)
	movq	%rcx, %r8
	xorl	%r9d, %r9d
.LBB3_3:                                #   Parent Loop BB3_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	%esi, (%r8)
	movl	%esi, map(%rdi,%r9,4)
	incq	%r9
	addq	$4096, %r8                      # imm = 0x1000
	cmpq	%r9, %rax
	jne	.LBB3_3
# %bb.4:                                # %._crit_edge
                                        #   in Loop: Header=BB3_2 Depth=1
	incq	%rdx
	addq	$4, %rcx
	cmpq	%rax, %rdx
	jne	.LBB3_2
.LBB3_5:                                # %.preheader
	cmpl	$0, 28(%rsp)
	jle	.LBB3_8
# %bb.6:                                # %.lr.ph44.preheader
	leaq	1120(%rsp), %rbx
	leaq	9312(%rsp), %r14
	leaq	16(%rsp), %r15
	xorl	%ebp, %ebp
.LBB3_7:                                # %.lr.ph44
                                        # =>This Inner Loop Header: Depth=1
	movl	$.L.str.4, %edi
	movq	%rbx, %rsi
	movq	%r14, %rdx
	movq	%r15, %rcx
	xorl	%eax, %eax
	callq	__isoc23_scanf
	movl	16(%rsp), %eax
	movl	9312(%rsp), %ecx
	movl	%ecx, %edx
	shll	$10, %edx
	movl	1120(%rsp), %esi
	addl	%esi, %edx
	movslq	%edx, %rdx
	movl	%eax, map(,%rdx,4)
	shll	$10, %esi
	addl	%ecx, %esi
	movslq	%esi, %rcx
	movl	%eax, map(,%rcx,4)
	incl	%ebp
	cmpl	28(%rsp), %ebp
	jl	.LBB3_7
.LBB3_8:                                # %._crit_edge45
	xorl	%ebp, %ebp
	leaq	92(%rsp), %rbx
	movl	$.L.str.5, %edi
	movq	%rbx, %rsi
	xorl	%eax, %eax
	callq	__isoc23_scanf
	movslq	(%rbx), %rax
	movl	%ebp, 13408(%rsp,%rax,4)
	movl	%ebp, 5216(%rsp,%rax,4)
	movb	$1, %cl
	movb	%cl, 96(%rsp,%rax)
	leaq	11(%rsp), %rdx
	movb	%cl, (%rdx)
	movl	$-1, %ecx
	movl	%ecx, 1120(%rsp,%rax,4)
	movl	%ecx, 9312(%rsp,%rax,4)
	movl	$_ZSt4cout, %edi
	xorl	%esi, %esi
	callq	_ZNSolsEi
	movq	%rax, %rbx
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	leaq	16(%rsp), %rdi
	movl	$4096, %esi                     # imm = 0x1000
	callq	hipMalloc
	movl	$_ZSt4cout, %edi
	movl	$1, %esi
	callq	_ZNSolsEi
	movq	%rax, %rbx
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	leaq	64(%rsp), %r15
	movl	$4096, %esi                     # imm = 0x1000
	movq	%r15, %rdi
	callq	hipMalloc
	leaq	48(%rsp), %r14
	movl	$1024, %esi                     # imm = 0x400
	movq	%r14, %rdi
	callq	hipMalloc
	leaq	80(%rsp), %rbx
	movl	$4194304, %esi                  # imm = 0x400000
	movq	%rbx, %rdi
	callq	hipMalloc
	leaq	32(%rsp), %rbp
	movl	$1, %esi
	movq	%rbp, %rdi
	callq	hipMalloc
	leaq	72(%rsp), %r13
	movl	$4, %esi
	movq	%r13, %rdi
	callq	hipMalloc
	leaq	56(%rsp), %r12
	movl	$4096, %esi                     # imm = 0x1000
	movq	%r12, %rdi
	callq	hipMalloc
	leaq	40(%rsp), %rdi
	movl	$4096, %esi                     # imm = 0x1000
	callq	hipMalloc
	leaq	16(%rsp), %rax
	movq	(%rax), %rdi
	leaq	5216(%rsp), %rsi
	movl	$4096, %edx                     # imm = 0x1000
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r15), %rdi
	leaq	13408(%rsp), %rsi
	movl	$4096, %edx                     # imm = 0x1000
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r14), %rdi
	leaq	96(%rsp), %rsi
	movl	$1024, %edx                     # imm = 0x400
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%rbx), %rdi
	movl	$map, %esi
	movl	$4194304, %edx                  # imm = 0x400000
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%rbp), %rdi
	movl	$1, %edx
	leaq	11(%rsp), %rbx
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r13), %rdi
	leaq	12(%rsp), %rsi
	movl	$4, %edx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r12), %rdi
	leaq	1120(%rsp), %rsi
	movl	$4096, %edx                     # imm = 0x1000
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	40(%rsp), %rax
	movq	(%rax), %rdi
	leaq	9312(%rsp), %rsi
	movl	$4096, %edx                     # imm = 0x1000
	movl	$1, %ecx
	callq	hipMemcpy
	cmpb	$0, (%rbx)
	je	.LBB3_15
# %bb.9:                                # %.lr.ph48.preheader
	movabsq	$4294967296, %r15               # imm = 0x100000000
	leaq	1(%r15), %rbx
	leaq	11(%rsp), %r14
.LBB3_10:                               # %.lr.ph48
                                        # =>This Inner Loop Header: Depth=1
	movb	$0, 11(%rsp)
	movl	12(%rsp), %edx
	orq	%r15, %rdx
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_12
# %bb.11:                               #   in Loop: Header=BB3_10 Depth=1
	movq	72(%rsp), %rdi
	movq	80(%rsp), %rsi
	movq	16(%rsp), %rdx
	movq	64(%rsp), %rcx
	movq	48(%rsp), %r8
	movq	40(%rsp), %r9
	callq	_Z22__device_stub__kernel1PiS_S_S_PbS_
.LBB3_12:                               #   in Loop: Header=BB3_10 Depth=1
	movq	32(%rsp), %rdi
	movl	$1, %edx
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movl	12(%rsp), %edx
	orq	%r15, %rdx
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_14
# %bb.13:                               #   in Loop: Header=BB3_10 Depth=1
	movq	16(%rsp), %rdi
	movq	64(%rsp), %rsi
	movq	48(%rsp), %rdx
	movq	32(%rsp), %rcx
	movq	40(%rsp), %r8
	movq	56(%rsp), %r9
	callq	_Z22__device_stub__kernel2PiS_PbS0_S_S_
.LBB3_14:                               #   in Loop: Header=BB3_10 Depth=1
	movq	32(%rsp), %rsi
	movl	$1, %edx
	movq	%r14, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	cmpb	$0, 11(%rsp)
	jne	.LBB3_10
.LBB3_15:                               # %._crit_edge49
	movq	16(%rsp), %rsi
	leaq	5216(%rsp), %rdi
	movl	$4096, %edx                     # imm = 0x1000
	movl	$2, %ecx
	callq	hipMemcpy
	movq	56(%rsp), %rsi
	leaq	1120(%rsp), %rdi
	movl	$4096, %edx                     # imm = 0x1000
	movl	$2, %ecx
	callq	hipMemcpy
	cmpl	$0, 12(%rsp)
	jle	.LBB3_18
# %bb.16:                               # %.lr.ph52.preheader
	leaq	1120(%rsp), %rbx
	xorl	%r14d, %r14d
.LBB3_17:                               # %.lr.ph52
                                        # =>This Inner Loop Header: Depth=1
	leaq	1(%r14), %r15
	movl	5216(%rsp,%r14,4), %edx
	movl	$.L.str.6, %edi
	movl	%r15d, %esi
	xorl	%eax, %eax
	callq	printf
	movl	%r14d, %edi
	movq	%rbx, %rsi
	callq	_Z10print_pathiPi
	movl	$10, %edi
	callq	putchar@PLT
	movslq	12(%rsp), %rax
	movq	%r15, %r14
	cmpq	%rax, %r15
	jl	.LBB3_17
.LBB3_18:                               # %._crit_edge53
	movq	_ZSt4cout(%rip), %rax
	movl	$_ZSt4cout, %ecx
	movq	-24(%rax), %rdi
	addq	%rcx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	xorl	%eax, %eax
	addq	$17512, %rsp                    # imm = 0x4468
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	main, .Lfunc_end3-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB4_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB4_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z7kernel1PiS_S_S_PbS_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z7kernel2PiS_PbS0_S_S_, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end4:
	.size	__hip_module_ctor, .Lfunc_end4-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB5_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB5_2:
	retq
.Lfunc_end5:
	.size	__hip_module_dtor, .Lfunc_end5-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	map,@object                     # @map
	.bss
	.globl	map
	.p2align	4, 0x0
map:
	.zero	4194304
	.size	map, 4194304

	.type	path,@object                    # @path
	.globl	path
	.p2align	4, 0x0
path:
	.zero	4096
	.size	path, 4096

	.type	_Z7kernel1PiS_S_S_PbS_,@object  # @_Z7kernel1PiS_S_S_PbS_
	.section	.rodata,"a",@progbits
	.globl	_Z7kernel1PiS_S_S_PbS_
	.p2align	3, 0x0
_Z7kernel1PiS_S_S_PbS_:
	.quad	_Z22__device_stub__kernel1PiS_S_S_PbS_
	.size	_Z7kernel1PiS_S_S_PbS_, 8

	.type	_Z7kernel2PiS_PbS0_S_S_,@object # @_Z7kernel2PiS_PbS0_S_S_
	.globl	_Z7kernel2PiS_PbS0_S_S_
	.p2align	3, 0x0
_Z7kernel2PiS_PbS0_S_S_:
	.quad	_Z22__device_stub__kernel2PiS_PbS0_S_S_
	.size	_Z7kernel2PiS_PbS0_S_S_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"%d "
	.size	.L.str, 4

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"input_dijkstra"
	.size	.L.str.1, 15

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"r"
	.size	.L.str.2, 2

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"%d%d"
	.size	.L.str.3, 5

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"%d%d%d"
	.size	.L.str.4, 7

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"%d"
	.size	.L.str.5, 3

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"Node %d cost = %2d  path: "
	.size	.L.str.6, 27

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z7kernel1PiS_S_S_PbS_"
	.size	.L__unnamed_1, 23

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z7kernel2PiS_PbS0_S_S_"
	.size	.L__unnamed_2, 24

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z22__device_stub__kernel1PiS_S_S_PbS_
	.addrsig_sym _Z22__device_stub__kernel2PiS_PbS0_S_S_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym map
	.addrsig_sym _Z7kernel1PiS_S_S_PbS_
	.addrsig_sym _Z7kernel2PiS_PbS0_S_S_
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z7kernel1PiS_S_S_PbS_  ; -- Begin function _Z7kernel1PiS_S_S_PbS_
	.globl	_Z7kernel1PiS_S_S_PbS_
	.p2align	8
	.type	_Z7kernel1PiS_S_S_PbS_,@function
_Z7kernel1PiS_S_S_PbS_:                 ; @_Z7kernel1PiS_S_S_PbS_
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x3c
	s_load_b128 s[8:11], s[0:1], 0x20
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_ashrrev_i32_e32 v2, 31, v1
	v_add_co_u32 v3, vcc_lo, s8, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, s9, v2, vcc_lo
	global_load_u8 v0, v[3:4], off
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u16_e32 0, v0
	s_cbranch_execz .LBB0_6
; %bb.1:
	s_load_b256 s[0:7], s[0:1], 0x0
	v_mov_b32_e32 v0, 0
	s_mov_b32 s8, 0
	global_store_b8 v[3:4], v0, off
	s_waitcnt lgkmcnt(0)
	s_load_b32 s9, s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s9, 1
	s_cbranch_scc1 .LBB0_6
; %bb.2:                                ; %.lr.ph
	v_lshlrev_b32_e32 v3, 10, v1
	v_lshlrev_b64 v[5:6], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v4, 31, v3
	v_add_co_u32 v2, vcc_lo, s4, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_lshlrev_b64 v[7:8], 2, v[3:4]
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v6, vcc_lo
	v_mov_b32_e32 v6, s9
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v4, vcc_lo, s2, v7
	v_add_co_ci_u32_e32 v5, vcc_lo, s3, v8, vcc_lo
	s_mov_b32 s2, 0
.LBB0_3:                                ; =>This Inner Loop Header: Depth=1
	global_load_b32 v7, v[2:3], off
	global_load_b32 v8, v[4:5], off
	global_load_b32 v9, v0, s[6:7]
	s_mov_b32 s3, exec_lo
	s_waitcnt vmcnt(1)
	v_add_nc_u32_e32 v7, v8, v7
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_lt_i32_e64 v7, v9
	s_cbranch_execz .LBB0_5
; %bb.4:                                ;   in Loop: Header=BB0_3 Depth=1
	global_store_b32 v0, v1, s[10:11]
	global_load_b32 v6, v[2:3], off
	global_load_b32 v7, v[4:5], off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v6, v7, v6
	global_store_b32 v0, v6, s[6:7]
	global_load_b32 v6, v0, s[0:1]
.LBB0_5:                                ;   in Loop: Header=BB0_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	v_add_co_u32 v4, vcc_lo, v4, 4
	s_add_i32 s2, s2, 1
	v_add_co_ci_u32_e32 v5, vcc_lo, 0, v5, vcc_lo
	s_waitcnt vmcnt(0)
	v_cmp_ge_i32_e32 vcc_lo, s2, v6
	s_add_u32 s6, s6, 4
	s_addc_u32 s7, s7, 0
	s_add_u32 s10, s10, 4
	s_addc_u32 s11, s11, 0
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB0_3
.LBB0_6:                                ; %.loopexit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z7kernel1PiS_S_S_PbS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z7kernel1PiS_S_S_PbS_, .Lfunc_end0-_Z7kernel1PiS_S_S_PbS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 380
; NumSgprs: 18
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z7kernel2PiS_PbS0_S_S_ ; -- Begin function _Z7kernel2PiS_PbS0_S_S_
	.globl	_Z7kernel2PiS_PbS0_S_S_
	.p2align	8
	.type	_Z7kernel2PiS_PbS0_S_S_,@function
_Z7kernel2PiS_PbS0_S_S_:                ; @_Z7kernel2PiS_PbS0_S_S_
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x3c
	s_load_b256 s[4:11], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[4:5], null, s15, s2, v[0:1]
	s_load_b128 s[0:3], s[0:1], 0x20
	v_ashrrev_i32_e32 v5, 31, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[4:5]
	v_add_co_u32 v6, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v2, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v1, vcc_lo
	s_mov_b32 s4, exec_lo
	global_load_b32 v8, v[6:7], off
	global_load_b32 v9, v[2:3], off
	s_waitcnt vmcnt(0)
	v_cmpx_gt_i32_e64 v8, v9
	s_cbranch_execz .LBB1_2
; %bb.1:
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v8, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v9, vcc_lo, s1, v1, vcc_lo
	global_load_b32 v10, v[8:9], off
	v_add_co_u32 v8, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v9, vcc_lo, s3, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s8, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s9, v5, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[8:9], v10, off
	global_load_b32 v8, v[2:3], off
	v_dual_mov_b32 v9, 1 :: v_dual_mov_b32 v10, 0
	global_store_b8 v[4:5], v9, off
	s_waitcnt vmcnt(0)
	global_store_b32 v[6:7], v8, off
	global_store_b8 v10, v9, s[10:11]
.LBB1_2:
	s_or_b32 exec_lo, exec_lo, s4
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v4, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s3, v1, vcc_lo
	global_store_b32 v[2:3], v8, off
	v_add_co_u32 v0, vcc_lo, s0, v0
	global_load_b32 v2, v[4:5], off
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[0:1], v2, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z7kernel2PiS_PbS0_S_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 11
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z7kernel2PiS_PbS0_S_S_, .Lfunc_end1-_Z7kernel2PiS_PbS0_S_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 308
; NumSgprs: 18
; NumVgprs: 11
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 11
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         52
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         60
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         62
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         64
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         66
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         68
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         70
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         112
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 304
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z7kernel1PiS_S_S_PbS_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z7kernel1PiS_S_S_PbS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     10
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         52
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         60
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         62
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         64
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         66
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         68
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         70
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         112
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 304
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z7kernel2PiS_PbS0_S_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z7kernel2PiS_PbS0_S_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     11
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
