#include <stdio.h>
#include <stdlib.h>
#include <cstring>

#define CSC(call) do { \
	cudaError_t res = call;	\
	if (res != cudaSuccess) { \
		fprintf(stderr, "CUDA Error in %s:%d: %s\n", __FILE__, __LINE__, cudaGetErrorString(res)); \
		exit(1); \
	} \
} while (0)

#define mult(a, b) ((data[y[j] * w + x[j]].a - avg[i].a) * (data[y[j] * w + x[j]].b - avg[i].b))
#define calc(a) ((av[i].x - p.x) * cov[i][0][a] + (av[i].y - p.y) * cov[i][1][a] + (av[i].z - p.z) * cov[i][2][a])

__constant__ double cov[32][3][3];
__constant__ double av[32][3];

__global__ void kernel(uchar4 *dst, int w, int h, int nc) {
	int offsetx = blockDim.x * gridDim.x;
	int offsety = blockDim.y * gridDim.y;
	int x, y;
	for(x = blockDim.x * blockIdx.x + threadIdx.x; x < w; x += offsetx) {
		for(y = blockDim.y * blockIdx.y + threadIdx.y; y < h; y += offsety) {
			double mn;
			int id = -1;
			uchar4 p = dst[y * w + x];
			for (int i = 0; i < nc; ++i) {
				double cur[3] = {p.x - av[i][0], p.y - av[i][1], p.z - av[i][2]};
				double val[3] = {0, 0, 0};
				for (int j = 0; j < 3; ++j) {
					for (int k = 0; k < 3; ++k) {
						val[j] += cur[k] * cov[i][k][j];
					}
				}
				double vval = 0;
				for (int j = 0; j < 3; ++j) {
					vval += val[j] * cur[j];
				}
				//double cur = calc(0) * (av[i].x - p.x) + calc(1) * (av[i].y - p.y) + calc(2) * (av[i].z - p.z);
				if (vval < mn || id == -1) {
					mn = vval;
					id = i;
				}
			}
			dst[y * w + x].w = id;
		}
	}
}

int main() {
	int w, h;
	size_t sz = 256;
	char* name = (char*) malloc(sizeof(char) * sz);
	name[getline(&name, &sz, stdin) - 1] = '\0';
	FILE *in = fopen(name, "rb");
	fread(&w, sizeof(int), 1 , in);
	fread(&h, sizeof(int), 1 , in);
	uchar4 *data = (uchar4*)malloc(sizeof(uchar4) * h * w);
	fread(data, sizeof(uchar4), h * w, in);
	fclose(in);

	name[getline(&name, &sz, stdin) - 1] = '\0';
	
	int nc;
	scanf("%d", &nc);
	int x[1 << 19];
	int y[1 << 19];
	double matr[32][3][3];
	double inv[32][3][3];
	double avg[32][3];
	for (int i = 0; i < nc; ++i) {
		int np;
		scanf("%d", &np);
		int avgt[3] = {0, 0, 0};
		
		for (int j = 0; j < np; ++j) {
			scanf("%d %d", x + j, y + j);
			avgt[0] += data[y[j] * w + x[j]].x;
			avgt[1] += data[y[j] * w + x[j]].y;
			avgt[2] += data[y[j] * w + x[j]].z;
		}


		for (int j = 0; j < 3; ++j) {
			avg[i][j] = avgt[j] / double(np);
		}

		for (int k = 0; k < 3; ++k) {
			for (int l = 0; l < 3; ++l) {
				matr[i][k][l] = 0;
			}
		}

		for (int j = 0; j < np; ++j) {
			double cur[3] = {avg[i][0] - data[y[j] * w + x[j]].x, avg[i][1] - data[y[j] * w + x[j]].y, avg[i][2] - data[y[j] * w + x[j]].z};
			for (int k = 0; k < 3; ++k) {
				for (int l = 0; l < 3; ++l) {
					matr[i][l][k] += cur[k] * cur[l];
				}
			}
		}
		for (int k = 0; k < 3; ++k) {
			for (int l = 0; l < 3; ++l) {
				matr[i][k][l] /= np - 1;
			}
		}
		double det = matr[i][0][0] * (matr[i][1][1] * matr[i][2][2] - matr[i][1][2] * matr[i][2][1]) -
					 matr[i][0][1] * (matr[i][1][0] * matr[i][2][2] - matr[i][1][2] * matr[i][2][0]) + 
					 matr[i][0][2] * (matr[i][1][0] * matr[i][2][1] - matr[i][1][1] * matr[i][2][0]);

		inv[i][0][0] = (matr[i][1][1] * matr[i][2][2] - matr[i][1][2] * matr[i][2][1]) / det;
		inv[i][1][0] = -(matr[i][1][0] * matr[i][2][2] - matr[i][1][2] * matr[i][2][0]) / det;
		inv[i][2][0] = (matr[i][1][0] * matr[i][2][1] - matr[i][1][1] * matr[i][2][0]) / det;

		inv[i][0][1] = -(matr[i][0][1] * matr[i][2][2] - matr[i][0][2] * matr[i][2][1]) / det;
		inv[i][1][1] = (matr[i][0][0] * matr[i][2][2] - matr[i][0][2] * matr[i][2][0]) / det;
		inv[i][2][1] = -(matr[i][0][0] * matr[i][2][1] - matr[i][0][1] * matr[i][2][0]) / det;

		inv[i][0][2] = (matr[i][0][1] * matr[i][1][2] - matr[i][0][2] * matr[i][1][1]) / det;
		inv[i][1][2] = -(matr[i][0][0] * matr[i][1][2] - matr[i][0][2] * matr[i][1][0]) / det;
		inv[i][2][2] = (matr[i][0][0] * matr[i][1][1] - matr[i][0][1] * matr[i][1][0]) / det;
	}

	CSC(cudaMemcpyToSymbol(cov, inv, sizeof(double) * nc * 9));
	CSC(cudaMemcpyToSymbol(av, avg, sizeof(double) * nc * 3));

	uchar4 *dev_data;
	CSC(cudaMalloc(&dev_data, sizeof(uchar4) * h * w));
	CSC(cudaMemcpy(dev_data, data, sizeof(uchar4) * h * w, cudaMemcpyHostToDevice));
	kernel<<<dim3(16, 16), dim3(16, 16)>>>(dev_data, w, h, nc);
	CSC(cudaMemcpy(data, dev_data, sizeof(uchar4) * h * w, cudaMemcpyDeviceToHost));
	FILE *out = fopen(name, "wb");
	fwrite(&w, sizeof(int), 1, out);
	fwrite(&h, sizeof(int), 1, out);
	fwrite(data, sizeof(uchar4), w * h, out);
	fclose(out);

	CSC(cudaFree(dev_data));
	free(data);
	free(name);
	return 0;
}
	.file	"tmpxft_003a95d0_00000000-6_lab3.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2030:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z34__device_stub__Z6kernelP6uchar4iiiP6uchar4iii
	.type	_Z34__device_stub__Z6kernelP6uchar4iiiP6uchar4iii, @function
_Z34__device_stub__Z6kernelP6uchar4iiiP6uchar4iii:
.LFB2052:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movl	%esi, 20(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 16(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 12(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z6kernelP6uchar4iii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L2:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2052:
	.size	_Z34__device_stub__Z6kernelP6uchar4iiiP6uchar4iii, .-_Z34__device_stub__Z6kernelP6uchar4iiiP6uchar4iii
	.globl	_Z6kernelP6uchar4iii
	.type	_Z6kernelP6uchar4iii, @function
_Z6kernelP6uchar4iii:
.LFB2053:
	.cfi_startproc
	endbr64
	jmp	_Z34__device_stub__Z6kernelP6uchar4iiiP6uchar4iii
	.cfi_endproc
.LFE2053:
	.size	_Z6kernelP6uchar4iii, .-_Z6kernelP6uchar4iii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"rb"
.LC1:
	.string	"%d"
.LC2:
	.string	"%d %d"
.LC5:
	.string	"/home/ubuntu/Datasets/stackv2/train-structured/ssor96/CUDA_labs/master/lab3.cu"
.LC6:
	.string	"CUDA Error in %s:%d: %s\n"
.LC7:
	.string	"wb"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	leaq	-4198400(%rsp), %r11
	.cfi_def_cfa 11, 4198456
.LPSRL0:
	subq	$4096, %rsp
	orq	$0, (%rsp)
	cmpq	%r11, %rsp
	jne	.LPSRL0
	.cfi_def_cfa_register 7
	subq	$1464, %rsp
	.cfi_def_cfa_offset 4199920
	movl	$256, %edi
	movq	%fs:40, %rax
	movq	%rax, 4199848(%rsp)
	xorl	%eax, %eax
	leaq	80(%rsp), %r13
	leaq	88(%rsp), %rbp
	movq	$256, 80(%rsp)
	call	malloc@PLT
	movq	stdin(%rip), %rdx
	movq	%r13, %rsi
	movq	%rbp, %rdi
	movq	%rax, %rbx
	movq	%rax, 88(%rsp)
	call	getline@PLT
	movq	88(%rsp), %rdi
	leaq	.LC0(%rip), %rsi
	movb	$0, -1(%rbx,%rax)
	call	fopen@PLT
	movl	$1, %ecx
	movl	$4, %edx
	movl	$4, %esi
	movq	%rax, %rbx
	leaq	68(%rsp), %rax
	movq	%rbx, %r8
	movq	%rax, %rdi
	movq	%rax, 8(%rsp)
	call	__fread_chk@PLT
	leaq	72(%rsp), %rax
	movq	%rbx, %r8
	movl	$1, %ecx
	movl	$4, %edx
	movl	$4, %esi
	movq	%rax, %rdi
	movq	%rax, 16(%rsp)
	call	__fread_chk@PLT
	movslq	72(%rsp), %r15
	movslq	68(%rsp), %rax
	imulq	%rax, %r15
	leaq	0(,%r15,4), %r14
	movq	%r14, %rdi
	call	malloc@PLT
	movq	%rbx, %r8
	movq	%r15, %rcx
	movq	%r14, %rsi
	movl	$4, %edx
	movq	%rax, %rdi
	movq	%rax, %r12
	xorl	%r14d, %r14d
	call	__fread_chk@PLT
	movq	%rbx, %rdi
	call	fclose@PLT
	movq	88(%rsp), %rbx
	movq	%r13, %rsi
	movq	%rbp, %rdi
	movq	stdin(%rip), %rdx
	leaq	3240(%rsp), %rbp
	leaq	168(%rsp), %r13
	call	getline@PLT
	leaq	76(%rsp), %rsi
	leaq	.LC1(%rip), %rdi
	movb	$0, -1(%rbx,%rax)
	xorl	%eax, %eax
	leaq	936(%rsp), %rbx
	call	__isoc23_scanf@PLT
.L9:
	movslq	76(%rsp), %rdx
	cmpl	%r14d, %edx
	jle	.L35
	leaq	120(%rsp), %rsi
	leaq	.LC1(%rip), %rdi
	xorl	%eax, %eax
	call	__isoc23_scanf@PLT
	xorl	%eax, %eax
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%rax, 132(%rsp)
	leaq	5544(%rsp), %rcx
	leaq	2102696(%rsp), %rdx
	movq	%rcx, %r15
	movq	%rdx, %r11
.L10:
	movl	132(%rsp), %esi
	movl	120(%rsp), %eax
	movl	%r9d, 140(%rsp)
	movl	%esi, 28(%rsp)
	cmpl	%r8d, %eax
	jle	.L36
	movq	%rcx, %rsi
	leaq	.LC2(%rip), %rdi
	xorl	%eax, %eax
	movq	%r11, 56(%rsp)
	movl	%r9d, 52(%rsp)
	movl	%r8d, 48(%rsp)
	movq	%rdx, 40(%rsp)
	movq	%rcx, 32(%rsp)
	call	__isoc23_scanf@PLT
	movq	40(%rsp), %rdx
	movq	32(%rsp), %rcx
	movl	28(%rsp), %edi
	movl	52(%rsp), %r9d
	movl	(%rdx), %eax
	imull	68(%rsp), %eax
	addq	$4, %rcx
	addq	$4, %rdx
	addl	-4(%rcx), %eax
	movl	48(%rsp), %r8d
	cltq
	movq	56(%rsp), %r11
	leaq	(%r12,%rax,4), %rax
	incl	%r8d
	movzbl	(%rax), %esi
	addl	%edi, %esi
	movl	%esi, 132(%rsp)
	movzbl	1(%rax), %esi
	movzbl	2(%rax), %eax
	addl	%esi, 136(%rsp)
	addl	%eax, %r9d
	jmp	.L10
.L36:
	cvtsi2sdl	%eax, %xmm1
	xorl	%edx, %edx
	leaq	132(%rsp), %rcx
.L12:
	cvtsi2sdl	(%rcx,%rdx,4), %xmm0
	divsd	%xmm1, %xmm0
	movsd	%xmm0, 0(%r13,%rdx,8)
	incq	%rdx
	cmpq	$3, %rdx
	jne	.L12
	movq	$0x000000000, (%rbx)
	movl	68(%rsp), %r8d
	xorl	%edx, %edx
	movq	$0x000000000, 8(%rbx)
	movq	$0x000000000, 16(%rbx)
	movq	$0x000000000, 24(%rbx)
	movq	$0x000000000, 32(%rbx)
	movq	$0x000000000, 40(%rbx)
	movq	$0x000000000, 48(%rbx)
	movq	$0x000000000, 56(%rbx)
	movq	$0x000000000, 64(%rbx)
.L13:
	cmpl	%edx, %eax
	jle	.L37
	movl	(%r11,%rdx,4), %ecx
	movsd	0(%r13), %xmm0
	imull	%r8d, %ecx
	addl	(%r15,%rdx,4), %ecx
	movslq	%ecx, %rcx
	leaq	(%r12,%rcx,4), %rcx
	movzbl	(%rcx), %esi
	cvtsi2sdl	%esi, %xmm1
	movzbl	1(%rcx), %esi
	movzbl	2(%rcx), %ecx
	subsd	%xmm1, %xmm0
	cvtsi2sdl	%esi, %xmm1
	movsd	%xmm0, 144(%rsp)
	movsd	8(%r13), %xmm0
	subsd	%xmm1, %xmm0
	cvtsi2sdl	%ecx, %xmm1
	xorl	%ecx, %ecx
	movsd	%xmm0, 152(%rsp)
	movsd	16(%r13), %xmm0
	subsd	%xmm1, %xmm0
	movsd	%xmm0, 160(%rsp)
.L14:
	movsd	144(%rsp,%rcx), %xmm1
	leaq	144(%rsp), %r9
	leaq	(%rcx,%rbx), %rdi
	xorl	%esi, %esi
.L15:
	movsd	(%r9,%rsi,8), %xmm0
	incq	%rsi
	addq	$24, %rdi
	mulsd	%xmm1, %xmm0
	addsd	-24(%rdi), %xmm0
	movsd	%xmm0, -24(%rdi)
	cmpq	$3, %rsi
	jne	.L15
	addq	$8, %rcx
	cmpq	$24, %rcx
	jne	.L14
	incq	%rdx
	jmp	.L13
.L37:
	decl	%eax
	movq	%rbx, %rcx
	movl	$3, %esi
	cvtsi2sdl	%eax, %xmm1
.L18:
	movq	%rcx, %rax
	xorl	%edx, %edx
.L19:
	movsd	(%rax), %xmm0
	incl	%edx
	addq	$8, %rax
	divsd	%xmm1, %xmm0
	movsd	%xmm0, -8(%rax)
	cmpl	$3, %edx
	jne	.L19
	addq	$24, %rcx
	decl	%esi
	jne	.L18
	movsd	32(%rbx), %xmm7
	movsd	40(%rbx), %xmm1
	incq	%r14
	addq	$72, %rbx
	movsd	-8(%rbx), %xmm4
	movsd	-16(%rbx), %xmm2
	addq	$72, %rbp
	addq	$24, %r13
	movaps	%xmm1, %xmm0
	movaps	%xmm7, %xmm12
	movsd	-48(%rbx), %xmm6
	movsd	-24(%rbx), %xmm10
	mulsd	%xmm2, %xmm0
	movaps	%xmm4, %xmm9
	movaps	%xmm2, %xmm11
	movsd	-72(%rbx), %xmm3
	mulsd	%xmm4, %xmm12
	movsd	-64(%rbx), %xmm5
	movsd	-56(%rbx), %xmm8
	mulsd	%xmm6, %xmm9
	mulsd	%xmm6, %xmm11
	movaps	%xmm5, %xmm13
	subsd	%xmm0, %xmm12
	movaps	%xmm1, %xmm0
	mulsd	%xmm10, %xmm0
	subsd	%xmm0, %xmm9
	movaps	%xmm7, %xmm0
	mulsd	%xmm10, %xmm0
	mulsd	%xmm9, %xmm13
	xorps	.LC4(%rip), %xmm9
	subsd	%xmm0, %xmm11
	movaps	%xmm3, %xmm0
	mulsd	%xmm12, %xmm0
	subsd	%xmm13, %xmm0
	movaps	%xmm8, %xmm13
	mulsd	%xmm11, %xmm13
	addsd	%xmm13, %xmm0
	divsd	%xmm0, %xmm9
	divsd	%xmm0, %xmm11
	movsd	%xmm9, -48(%rbp)
	movaps	%xmm4, %xmm9
	mulsd	%xmm5, %xmm9
	mulsd	%xmm3, %xmm4
	divsd	%xmm0, %xmm12
	movsd	%xmm11, -24(%rbp)
	movaps	%xmm2, %xmm11
	mulsd	%xmm8, %xmm11
	mulsd	%xmm3, %xmm2
	subsd	%xmm11, %xmm9
	xorps	.LC4(%rip), %xmm9
	divsd	%xmm0, %xmm9
	movsd	%xmm12, -72(%rbp)
	movsd	%xmm9, -64(%rbp)
	movaps	%xmm10, %xmm9
	mulsd	%xmm8, %xmm9
	mulsd	%xmm5, %xmm10
	subsd	%xmm9, %xmm4
	subsd	%xmm10, %xmm2
	xorps	.LC4(%rip), %xmm2
	divsd	%xmm0, %xmm4
	divsd	%xmm0, %xmm2
	movsd	%xmm4, -40(%rbp)
	movaps	%xmm7, %xmm4
	mulsd	%xmm8, %xmm4
	mulsd	%xmm6, %xmm8
	movsd	%xmm2, -16(%rbp)
	movaps	%xmm1, %xmm2
	mulsd	%xmm5, %xmm2
	mulsd	%xmm3, %xmm1
	mulsd	%xmm6, %xmm5
	mulsd	%xmm7, %xmm3
	subsd	%xmm4, %xmm2
	subsd	%xmm8, %xmm1
	xorps	.LC4(%rip), %xmm1
	subsd	%xmm5, %xmm3
	divsd	%xmm0, %xmm2
	divsd	%xmm0, %xmm1
	movsd	%xmm2, -56(%rbp)
	divsd	%xmm0, %xmm3
	movsd	%xmm1, -32(%rbp)
	movsd	%xmm3, -8(%rbp)
	jmp	.L9
.L35:
	imulq	$72, %rdx, %rdx
	leaq	_ZL3cov(%rip), %rdi
	movl	$1, %r8d
	xorl	%ecx, %ecx
	leaq	3240(%rsp), %rsi
	call	cudaMemcpyToSymbol@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L22
	call	cudaGetErrorString@PLT
	movl	$125, %r8d
	movq	%rax, %r9
	jmp	.L34
.L22:
	movslq	76(%rsp), %rdx
	leaq	_ZL2av(%rip), %rdi
	movl	$1, %r8d
	xorl	%ecx, %ecx
	leaq	168(%rsp), %rsi
	imulq	$24, %rdx, %rdx
	call	cudaMemcpyToSymbol@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L23
	call	cudaGetErrorString@PLT
	movl	$126, %r8d
	movq	%rax, %r9
.L34:
	movq	stderr(%rip), %rdi
	leaq	.LC5(%rip), %rcx
	leaq	.LC6(%rip), %rdx
	xorl	%eax, %eax
	movl	$2, %esi
	call	__fprintf_chk@PLT
	movl	$1, %edi
	call	exit@PLT
.L23:
	movslq	72(%rsp), %rsi
	movslq	68(%rsp), %rax
	leaq	96(%rsp), %rdi
	imulq	%rax, %rsi
	salq	$2, %rsi
	call	cudaMalloc@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L24
	call	cudaGetErrorString@PLT
	movl	$129, %r8d
	movq	%rax, %r9
	jmp	.L34
.L24:
	movslq	72(%rsp), %rdx
	movslq	68(%rsp), %rax
	movl	$1, %ecx
	movq	%r12, %rsi
	movq	96(%rsp), %rdi
	imulq	%rax, %rdx
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L25
	call	cudaGetErrorString@PLT
	movl	$130, %r8d
	movq	%rax, %r9
	jmp	.L34
.L25:
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	movl	$1, %esi
	movabsq	$68719476752, %rdi
	movl	$1, 116(%rsp)
	movq	%rdi, %rdx
	movq	%rdi, 120(%rsp)
	movl	$1, 128(%rsp)
	movq	%rdi, 108(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L26
	movl	76(%rsp), %ecx
	movl	72(%rsp), %edx
	movl	68(%rsp), %esi
	movq	96(%rsp), %rdi
	call	_Z34__device_stub__Z6kernelP6uchar4iiiP6uchar4iii
.L26:
	movslq	72(%rsp), %rdx
	movslq	68(%rsp), %rax
	movq	%r12, %rdi
	movl	$2, %ecx
	movq	96(%rsp), %rsi
	imulq	%rax, %rdx
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L27
	call	cudaGetErrorString@PLT
	movl	$132, %r8d
	movq	%rax, %r9
	jmp	.L34
.L27:
	movq	88(%rsp), %rdi
	leaq	.LC7(%rip), %rsi
	call	fopen@PLT
	movq	8(%rsp), %rdi
	movl	$1, %edx
	movl	$4, %esi
	movq	%rax, %rcx
	movq	%rax, %rbx
	call	fwrite@PLT
	movq	16(%rsp), %rdi
	movq	%rbx, %rcx
	movl	$1, %edx
	movl	$4, %esi
	call	fwrite@PLT
	movl	68(%rsp), %edx
	movq	%rbx, %rcx
	movq	%r12, %rdi
	imull	72(%rsp), %edx
	movl	$4, %esi
	movslq	%edx, %rdx
	call	fwrite@PLT
	movq	%rbx, %rdi
	call	fclose@PLT
	movq	96(%rsp), %rdi
	call	cudaFree@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L28
	call	cudaGetErrorString@PLT
	movl	$139, %r8d
	movq	%rax, %r9
	jmp	.L34
.L28:
	movq	%r12, %rdi
	call	free@PLT
	movq	88(%rsp), %rdi
	call	free@PLT
	movq	4199848(%rsp), %rax
	subq	%fs:40, %rax
	je	.L29
	call	__stack_chk_fail@PLT
.L29:
	addq	$4199864, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	main, .-main
	.section	.rodata.str1.1
.LC8:
	.string	"_Z6kernelP6uchar4iii"
.LC9:
	.string	"cov"
.LC10:
	.string	"av"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2055:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC8(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z6kernelP6uchar4iii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC9(%rip), %rdx
	movl	$2304, %r9d
	leaq	_ZL3cov(%rip), %rsi
	pushq	$1
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$1
	.cfi_def_cfa_offset 32
	leaq	.LC10(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$768, %r9d
	leaq	_ZL2av(%rip), %rsi
	call	__cudaRegisterVar@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2055:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.local	_ZL2av
	.comm	_ZL2av,768,32
	.local	_ZL3cov
	.comm	_ZL3cov,2304,32
	.section	.rodata.cst16,"aM",@progbits,16
	.align 16
.LC4:
	.long	0
	.long	-2147483648
	.long	0
	.long	0
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <cstring>

#define CSC(call) do { \
	hipError_t res = call;	\
	if (res != hipSuccess) { \
		fprintf(stderr, "CUDA Error in %s:%d: %s\n", __FILE__, __LINE__, hipGetErrorString(res)); \
		exit(1); \
	} \
} while (0)

#define mult(a, b) ((data[y[j] * w + x[j]].a - avg[i].a) * (data[y[j] * w + x[j]].b - avg[i].b))
#define calc(a) ((av[i].x - p.x) * cov[i][0][a] + (av[i].y - p.y) * cov[i][1][a] + (av[i].z - p.z) * cov[i][2][a])

__constant__ double cov[32][3][3];
__constant__ double av[32][3];

__global__ void kernel(uchar4 *dst, int w, int h, int nc) {
	int offsetx = blockDim.x * gridDim.x;
	int offsety = blockDim.y * gridDim.y;
	int x, y;
	for(x = blockDim.x * blockIdx.x + threadIdx.x; x < w; x += offsetx) {
		for(y = blockDim.y * blockIdx.y + threadIdx.y; y < h; y += offsety) {
			double mn;
			int id = -1;
			uchar4 p = dst[y * w + x];
			for (int i = 0; i < nc; ++i) {
				double cur[3] = {p.x - av[i][0], p.y - av[i][1], p.z - av[i][2]};
				double val[3] = {0, 0, 0};
				for (int j = 0; j < 3; ++j) {
					for (int k = 0; k < 3; ++k) {
						val[j] += cur[k] * cov[i][k][j];
					}
				}
				double vval = 0;
				for (int j = 0; j < 3; ++j) {
					vval += val[j] * cur[j];
				}
				//double cur = calc(0) * (av[i].x - p.x) + calc(1) * (av[i].y - p.y) + calc(2) * (av[i].z - p.z);
				if (vval < mn || id == -1) {
					mn = vval;
					id = i;
				}
			}
			dst[y * w + x].w = id;
		}
	}
}

int main() {
	int w, h;
	size_t sz = 256;
	char* name = (char*) malloc(sizeof(char) * sz);
	name[getline(&name, &sz, stdin) - 1] = '\0';
	FILE *in = fopen(name, "rb");
	fread(&w, sizeof(int), 1 , in);
	fread(&h, sizeof(int), 1 , in);
	uchar4 *data = (uchar4*)malloc(sizeof(uchar4) * h * w);
	fread(data, sizeof(uchar4), h * w, in);
	fclose(in);

	name[getline(&name, &sz, stdin) - 1] = '\0';
	
	int nc;
	scanf("%d", &nc);
	int x[1 << 19];
	int y[1 << 19];
	double matr[32][3][3];
	double inv[32][3][3];
	double avg[32][3];
	for (int i = 0; i < nc; ++i) {
		int np;
		scanf("%d", &np);
		int avgt[3] = {0, 0, 0};
		
		for (int j = 0; j < np; ++j) {
			scanf("%d %d", x + j, y + j);
			avgt[0] += data[y[j] * w + x[j]].x;
			avgt[1] += data[y[j] * w + x[j]].y;
			avgt[2] += data[y[j] * w + x[j]].z;
		}


		for (int j = 0; j < 3; ++j) {
			avg[i][j] = avgt[j] / double(np);
		}

		for (int k = 0; k < 3; ++k) {
			for (int l = 0; l < 3; ++l) {
				matr[i][k][l] = 0;
			}
		}

		for (int j = 0; j < np; ++j) {
			double cur[3] = {avg[i][0] - data[y[j] * w + x[j]].x, avg[i][1] - data[y[j] * w + x[j]].y, avg[i][2] - data[y[j] * w + x[j]].z};
			for (int k = 0; k < 3; ++k) {
				for (int l = 0; l < 3; ++l) {
					matr[i][l][k] += cur[k] * cur[l];
				}
			}
		}
		for (int k = 0; k < 3; ++k) {
			for (int l = 0; l < 3; ++l) {
				matr[i][k][l] /= np - 1;
			}
		}
		double det = matr[i][0][0] * (matr[i][1][1] * matr[i][2][2] - matr[i][1][2] * matr[i][2][1]) -
					 matr[i][0][1] * (matr[i][1][0] * matr[i][2][2] - matr[i][1][2] * matr[i][2][0]) + 
					 matr[i][0][2] * (matr[i][1][0] * matr[i][2][1] - matr[i][1][1] * matr[i][2][0]);

		inv[i][0][0] = (matr[i][1][1] * matr[i][2][2] - matr[i][1][2] * matr[i][2][1]) / det;
		inv[i][1][0] = -(matr[i][1][0] * matr[i][2][2] - matr[i][1][2] * matr[i][2][0]) / det;
		inv[i][2][0] = (matr[i][1][0] * matr[i][2][1] - matr[i][1][1] * matr[i][2][0]) / det;

		inv[i][0][1] = -(matr[i][0][1] * matr[i][2][2] - matr[i][0][2] * matr[i][2][1]) / det;
		inv[i][1][1] = (matr[i][0][0] * matr[i][2][2] - matr[i][0][2] * matr[i][2][0]) / det;
		inv[i][2][1] = -(matr[i][0][0] * matr[i][2][1] - matr[i][0][1] * matr[i][2][0]) / det;

		inv[i][0][2] = (matr[i][0][1] * matr[i][1][2] - matr[i][0][2] * matr[i][1][1]) / det;
		inv[i][1][2] = -(matr[i][0][0] * matr[i][1][2] - matr[i][0][2] * matr[i][1][0]) / det;
		inv[i][2][2] = (matr[i][0][0] * matr[i][1][1] - matr[i][0][1] * matr[i][1][0]) / det;
	}

	CSC(hipMemcpyToSymbol(HIP_SYMBOL(cov), inv, sizeof(double) * nc * 9));
	CSC(hipMemcpyToSymbol(HIP_SYMBOL(av), avg, sizeof(double) * nc * 3));

	uchar4 *dev_data;
	CSC(hipMalloc(&dev_data, sizeof(uchar4) * h * w));
	CSC(hipMemcpy(dev_data, data, sizeof(uchar4) * h * w, hipMemcpyHostToDevice));
	kernel<<<dim3(16, 16), dim3(16, 16)>>>(dev_data, w, h, nc);
	CSC(hipMemcpy(data, dev_data, sizeof(uchar4) * h * w, hipMemcpyDeviceToHost));
	FILE *out = fopen(name, "wb");
	fwrite(&w, sizeof(int), 1, out);
	fwrite(&h, sizeof(int), 1, out);
	fwrite(data, sizeof(uchar4), w * h, out);
	fclose(out);

	CSC(hipFree(dev_data));
	free(data);
	free(name);
	return 0;
}
	.text
	.file	"lab3.hip"
	.globl	_Z21__device_stub__kernelP15HIP_vector_typeIhLj4EEiii # -- Begin function _Z21__device_stub__kernelP15HIP_vector_typeIhLj4EEiii
	.type	_Z21__device_stub__kernelP15HIP_vector_typeIhLj4EEiii,@function
_Z21__device_stub__kernelP15HIP_vector_typeIhLj4EEiii: # @_Z21__device_stub__kernelP15HIP_vector_typeIhLj4EEiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	20(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	16(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	12(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z6kernelP15HIP_vector_typeIhLj4EEiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z21__device_stub__kernelP15HIP_vector_typeIhLj4EEiii, .Lfunc_end0-_Z21__device_stub__kernelP15HIP_vector_typeIhLj4EEiii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0                          # -- Begin function main
.LCPI1_0:
	.quad	0x8000000000000000              # double -0
	.quad	0x8000000000000000              # double -0
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$4199816, %rsp                  # imm = 0x401588
	.cfi_def_cfa_offset 4199872
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	leaq	120(%rsp), %r14
	movq	$256, (%r14)                    # imm = 0x100
	movl	$256, %edi                      # imm = 0x100
	callq	malloc
	movq	%rax, %rbx
	leaq	72(%rsp), %rbp
	movq	%rax, (%rbp)
	movq	stdin(%rip), %rdx
	movq	%rbp, %rdi
	movq	%r14, %rsi
	callq	getline
	xorl	%ecx, %ecx
	movb	%cl, -1(%rbx,%rax)
	movq	(%rbp), %rdi
	movl	$.L.str, %esi
	callq	fopen
	movq	%rax, %r15
	leaq	12(%rsp), %rbx
	movl	$4, %esi
	movl	$1, %edx
	movq	%rbx, %rdi
	movq	%rax, %rcx
	callq	fread
	leaq	8(%rsp), %r14
	movl	$4, %esi
	movl	$1, %edx
	movq	%r14, %rdi
	movq	%r15, %rcx
	callq	fread
	movslq	(%r14), %rax
	movslq	(%rbx), %r13
	movq	%r13, %r14
	movq	%rax, 80(%rsp)                  # 8-byte Spill
	imulq	%rax, %r14
	leaq	(,%r14,4), %rdi
	movq	%rdi, 88(%rsp)                  # 8-byte Spill
	callq	malloc
	movq	%rax, %r12
	movl	$4, %esi
	movq	%rax, %rdi
	movq	%r14, %rdx
	movq	%r15, %rcx
	callq	fread
	movq	%r15, %rdi
	callq	fclose
	movq	(%rbp), %rbx
	movq	stdin(%rip), %rdx
	movq	%rbp, %rdi
	leaq	120(%rsp), %rsi
	callq	getline
	xorl	%ecx, %ecx
	movb	%cl, -1(%rbx,%rax)
	movq	%rsp, %r14
	movl	$.L.str.1, %edi
	movq	%r14, %rsi
	xorl	%eax, %eax
	callq	__isoc23_scanf
	movslq	(%r14), %rax
	movq	%r13, %r14
	testq	%rax, %rax
	jle	.LBB1_20
# %bb.1:                                # %.lr.ph202
	leaq	128(%rsp), %rbx
	leaq	896(%rsp), %r15
	xorl	%ebp, %ebp
	movq	%r12, 64(%rsp)                  # 8-byte Spill
	movq	%r14, 56(%rsp)                  # 8-byte Spill
.LBB1_2:                                # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_4 Depth 2
                                        #     Child Loop BB1_7 Depth 2
                                        #     Child Loop BB1_10 Depth 2
                                        #       Child Loop BB1_11 Depth 3
                                        #         Child Loop BB1_12 Depth 4
                                        #     Child Loop BB1_16 Depth 2
                                        #       Child Loop BB1_17 Depth 3
	movl	$.L.str.1, %edi
	leaq	4(%rsp), %rsi
	xorl	%eax, %eax
	callq	__isoc23_scanf
	movq	$0, 48(%rsp)
	movl	4(%rsp), %eax
	movl	$0, %r13d
	testl	%eax, %eax
	jle	.LBB1_6
# %bb.3:                                # %.lr.ph.preheader
                                        #   in Loop: Header=BB1_2 Depth=1
	movq	%rbp, 96(%rsp)                  # 8-byte Spill
	movq	%r15, 104(%rsp)                 # 8-byte Spill
	movq	%rbx, 112(%rsp)                 # 8-byte Spill
	xorl	%r12d, %r12d
	leaq	2102656(%rsp), %rbp
	leaq	5504(%rsp), %r15
	xorl	%r14d, %r14d
	xorl	%ebx, %ebx
	xorl	%r13d, %r13d
.LBB1_4:                                # %.lr.ph
                                        #   Parent Loop BB1_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	$.L.str.2, %edi
	movq	%rbp, %rsi
	movq	%r15, %rdx
	xorl	%eax, %eax
	callq	__isoc23_scanf
	movslq	(%r15), %rax
	imulq	56(%rsp), %rax                  # 8-byte Folded Reload
	movslq	(%rbp), %rcx
	addq	%rax, %rcx
	movq	64(%rsp), %rdx                  # 8-byte Reload
	movzbl	(%rdx,%rcx,4), %eax
	addl	%eax, %r13d
	movzbl	1(%rdx,%rcx,4), %eax
	addl	%eax, %ebx
	movzbl	2(%rdx,%rcx,4), %eax
	addl	%eax, %r14d
	incq	%r12
	movslq	4(%rsp), %rax
	addq	$4, %r15
	addq	$4, %rbp
	cmpq	%rax, %r12
	jl	.LBB1_4
# %bb.5:                                # %..preheader183_crit_edge
                                        #   in Loop: Header=BB1_2 Depth=1
	movl	%ebx, 48(%rsp)
	movl	%r14d, 52(%rsp)
	movq	64(%rsp), %r12                  # 8-byte Reload
	movq	56(%rsp), %r14                  # 8-byte Reload
	movq	112(%rsp), %rbx                 # 8-byte Reload
	movq	104(%rsp), %r15                 # 8-byte Reload
	movq	96(%rsp), %rbp                  # 8-byte Reload
.LBB1_6:                                # %.preheader183
                                        #   in Loop: Header=BB1_2 Depth=1
	leaq	(,%rbp,8), %rcx
	addq	%rbp, %rcx
	leaq	896(%rsp,%rcx,8), %rcx
	movl	%r13d, 44(%rsp)
	xorps	%xmm0, %xmm0
	cvtsi2sd	%eax, %xmm0
	xorl	%edx, %edx
.LBB1_7:                                #   Parent Loop BB1_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorps	%xmm1, %xmm1
	cvtsi2sdl	44(%rsp,%rdx,4), %xmm1
	divsd	%xmm0, %xmm1
	movsd	%xmm1, (%rbx,%rdx,8)
	incq	%rdx
	cmpq	$3, %rdx
	jne	.LBB1_7
# %bb.8:                                # %.preheader182
                                        #   in Loop: Header=BB1_2 Depth=1
	xorpd	%xmm0, %xmm0
	movupd	%xmm0, 48(%rcx)
	movupd	%xmm0, 32(%rcx)
	movupd	%xmm0, 16(%rcx)
	movupd	%xmm0, (%rcx)
	movq	$0, 64(%rcx)
	testl	%eax, %eax
	jle	.LBB1_15
# %bb.9:                                # %.lr.ph198
                                        #   in Loop: Header=BB1_2 Depth=1
	leaq	(,%rbp,2), %rcx
	addq	%rbp, %rcx
	movsd	128(%rsp,%rcx,8), %xmm0         # xmm0 = mem[0],zero
	movsd	136(%rsp,%rcx,8), %xmm1         # xmm1 = mem[0],zero
	movsd	144(%rsp,%rcx,8), %xmm2         # xmm2 = mem[0],zero
	movl	%eax, %ecx
	xorl	%edx, %edx
.LBB1_10:                               #   Parent Loop BB1_2 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB1_11 Depth 3
                                        #         Child Loop BB1_12 Depth 4
	movslq	5504(%rsp,%rdx,4), %rsi
	imulq	%r14, %rsi
	movslq	2102656(%rsp,%rdx,4), %rdi
	addq	%rsi, %rdi
	movzbl	(%r12,%rdi,4), %esi
	xorps	%xmm3, %xmm3
	cvtsi2sd	%esi, %xmm3
	movapd	%xmm0, %xmm4
	subsd	%xmm3, %xmm4
	movzbl	1(%r12,%rdi,4), %esi
	xorps	%xmm3, %xmm3
	cvtsi2sd	%esi, %xmm3
	movsd	%xmm4, 16(%rsp)
	movapd	%xmm1, %xmm4
	subsd	%xmm3, %xmm4
	movsd	%xmm4, 24(%rsp)
	movzbl	2(%r12,%rdi,4), %esi
	xorps	%xmm3, %xmm3
	cvtsi2sd	%esi, %xmm3
	movapd	%xmm2, %xmm4
	subsd	%xmm3, %xmm4
	movsd	%xmm4, 32(%rsp)
	movq	%r15, %rsi
	xorl	%edi, %edi
.LBB1_11:                               # %.preheader
                                        #   Parent Loop BB1_2 Depth=1
                                        #     Parent Loop BB1_10 Depth=2
                                        # =>    This Loop Header: Depth=3
                                        #         Child Loop BB1_12 Depth 4
	movsd	16(%rsp,%rdi,8), %xmm3          # xmm3 = mem[0],zero
	movq	%rsi, %r8
	xorl	%r9d, %r9d
.LBB1_12:                               #   Parent Loop BB1_2 Depth=1
                                        #     Parent Loop BB1_10 Depth=2
                                        #       Parent Loop BB1_11 Depth=3
                                        # =>      This Inner Loop Header: Depth=4
	movsd	16(%rsp,%r9,8), %xmm4           # xmm4 = mem[0],zero
	mulsd	%xmm3, %xmm4
	addsd	(%r8), %xmm4
	movsd	%xmm4, (%r8)
	incq	%r9
	addq	$24, %r8
	cmpq	$3, %r9
	jne	.LBB1_12
# %bb.13:                               #   in Loop: Header=BB1_11 Depth=3
	incq	%rdi
	addq	$8, %rsi
	cmpq	$3, %rdi
	jne	.LBB1_11
# %bb.14:                               #   in Loop: Header=BB1_10 Depth=2
	incq	%rdx
	cmpq	%rcx, %rdx
	jne	.LBB1_10
.LBB1_15:                               # %.preheader180
                                        #   in Loop: Header=BB1_2 Depth=1
	decl	%eax
	xorps	%xmm0, %xmm0
	cvtsi2sd	%eax, %xmm0
	movq	%r15, %rax
	xorl	%ecx, %ecx
.LBB1_16:                               # %.preheader178
                                        #   Parent Loop BB1_2 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB1_17 Depth 3
	xorl	%edx, %edx
.LBB1_17:                               #   Parent Loop BB1_2 Depth=1
                                        #     Parent Loop BB1_16 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movsd	(%rax,%rdx,8), %xmm1            # xmm1 = mem[0],zero
	divsd	%xmm0, %xmm1
	movsd	%xmm1, (%rax,%rdx,8)
	incq	%rdx
	cmpq	$3, %rdx
	jne	.LBB1_17
# %bb.18:                               #   in Loop: Header=BB1_16 Depth=2
	incq	%rcx
	addq	$24, %rax
	cmpq	$3, %rcx
	jne	.LBB1_16
# %bb.19:                               #   in Loop: Header=BB1_2 Depth=1
	leaq	(,%rbp,8), %rax
	leaq	(%rax,%rax,8), %rax
	movsd	928(%rsp,%rax), %xmm3           # xmm3 = mem[0],zero
	movsd	960(%rsp,%rax), %xmm7           # xmm7 = mem[0],zero
	movapd	%xmm3, %xmm10
	mulsd	%xmm7, %xmm10
	movsd	936(%rsp,%rax), %xmm4           # xmm4 = mem[0],zero
	movsd	952(%rsp,%rax), %xmm8           # xmm8 = mem[0],zero
	movapd	%xmm4, %xmm0
	mulsd	%xmm8, %xmm0
	subsd	%xmm0, %xmm10
	movsd	896(%rsp,%rax), %xmm0           # xmm0 = mem[0],zero
	movsd	904(%rsp,%rax), %xmm1           # xmm1 = mem[0],zero
	movapd	%xmm0, %xmm11
	mulsd	%xmm10, %xmm11
	movsd	920(%rsp,%rax), %xmm2           # xmm2 = mem[0],zero
	movapd	%xmm7, %xmm12
	mulsd	%xmm2, %xmm12
	movsd	944(%rsp,%rax), %xmm9           # xmm9 = mem[0],zero
	movapd	%xmm4, %xmm5
	mulsd	%xmm9, %xmm5
	subsd	%xmm5, %xmm12
	movapd	%xmm1, %xmm5
	mulsd	%xmm12, %xmm5
	subsd	%xmm5, %xmm11
	movsd	912(%rsp,%rax), %xmm6           # xmm6 = mem[0],zero
	movapd	%xmm8, %xmm13
	mulsd	%xmm2, %xmm13
	movapd	%xmm3, %xmm5
	mulsd	%xmm9, %xmm5
	subsd	%xmm5, %xmm13
	movapd	%xmm6, %xmm5
	mulsd	%xmm13, %xmm5
	addsd	%xmm11, %xmm5
	divsd	%xmm5, %xmm10
	movsd	%xmm10, 3200(%rsp,%rax)
	movapd	.LCPI1_0(%rip), %xmm14          # xmm14 = [-0.0E+0,-0.0E+0]
	xorpd	%xmm14, %xmm12
	divsd	%xmm5, %xmm12
	movsd	%xmm12, 3224(%rsp,%rax)
	divsd	%xmm5, %xmm13
	movsd	%xmm13, 3248(%rsp,%rax)
	movapd	%xmm0, %xmm10
	mulsd	%xmm7, %xmm10
	mulsd	%xmm1, %xmm7
	movapd	%xmm0, %xmm11
	mulsd	%xmm8, %xmm11
	mulsd	%xmm6, %xmm8
	subsd	%xmm8, %xmm7
	xorpd	%xmm14, %xmm7
	divsd	%xmm5, %xmm7
	movsd	%xmm7, 3208(%rsp,%rax)
	movapd	%xmm1, %xmm7
	mulsd	%xmm9, %xmm7
	mulsd	%xmm6, %xmm9
	subsd	%xmm9, %xmm10
	divsd	%xmm5, %xmm10
	movsd	%xmm10, 3232(%rsp,%rax)
	subsd	%xmm7, %xmm11
	xorpd	%xmm14, %xmm11
	divsd	%xmm5, %xmm11
	movsd	%xmm11, 3256(%rsp,%rax)
	movapd	%xmm0, %xmm7
	mulsd	%xmm4, %xmm7
	mulsd	%xmm1, %xmm4
	mulsd	%xmm3, %xmm0
	mulsd	%xmm6, %xmm3
	subsd	%xmm3, %xmm4
	divsd	%xmm5, %xmm4
	movsd	%xmm4, 3216(%rsp,%rax)
	mulsd	%xmm2, %xmm6
	subsd	%xmm6, %xmm7
	xorpd	%xmm14, %xmm7
	divsd	%xmm5, %xmm7
	movsd	%xmm7, 3240(%rsp,%rax)
	mulsd	%xmm2, %xmm1
	subsd	%xmm1, %xmm0
	divsd	%xmm5, %xmm0
	movsd	%xmm0, 3264(%rsp,%rax)
	incq	%rbp
	movslq	(%rsp), %rax
	addq	$24, %rbx
	addq	$72, %r15
	cmpq	%rax, %rbp
	jl	.LBB1_2
.LBB1_20:                               # %._crit_edge
	shlq	$3, %rax
	leaq	(%rax,%rax,8), %rdx
	leaq	3200(%rsp), %rsi
	movl	$cov, %edi
	xorl	%ecx, %ecx
	movl	$1, %r8d
	callq	hipMemcpyToSymbol
	testl	%eax, %eax
	jne	.LBB1_21
# %bb.23:
	movslq	(%rsp), %rax
	shlq	$3, %rax
	leaq	(%rax,%rax,2), %rdx
	leaq	128(%rsp), %rsi
	movl	$av, %edi
	xorl	%ecx, %ecx
	movl	$1, %r8d
	callq	hipMemcpyToSymbol
	testl	%eax, %eax
	movq	88(%rsp), %rbx                  # 8-byte Reload
	jne	.LBB1_24
# %bb.25:
	leaq	16(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB1_26
# %bb.27:
	movq	16(%rsp), %rdi
	movq	%r12, %rsi
	movq	%rbx, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB1_28
# %bb.29:
	movabsq	$68719476752, %rdi              # imm = 0x1000000010
	movl	$1, %esi
	movq	%rdi, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_31
# %bb.30:
	movq	16(%rsp), %rdi
	movl	(%rsp), %ecx
	movl	%r14d, %esi
	movq	80(%rsp), %rdx                  # 8-byte Reload
                                        # kill: def $edx killed $edx killed $rdx
	callq	_Z21__device_stub__kernelP15HIP_vector_typeIhLj4EEiii
.LBB1_31:
	movq	16(%rsp), %rsi
	movq	%r12, %rdi
	movq	%rbx, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB1_32
# %bb.33:
	movq	%r12, %rbx
	movq	72(%rsp), %rdi
	movl	$.L.str.5, %esi
	callq	fopen
	movq	%rax, %r14
	leaq	12(%rsp), %r15
	movl	$4, %esi
	movl	$1, %edx
	movq	%r15, %rdi
	movq	%rax, %rcx
	callq	fwrite
	leaq	8(%rsp), %r12
	movl	$4, %esi
	movl	$1, %edx
	movq	%r12, %rdi
	movq	%r14, %rcx
	callq	fwrite
	movslq	(%r15), %rax
	movslq	(%r12), %rdx
	imulq	%rax, %rdx
	movl	$4, %esi
	movq	%rbx, %rdi
	movq	%r14, %rcx
	callq	fwrite
	movq	%r14, %rdi
	callq	fclose
	movq	16(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB1_34
# %bb.35:
	movq	%rbx, %rdi
	callq	free
	movq	72(%rsp), %rdi
	callq	free
	xorl	%eax, %eax
	addq	$4199816, %rsp                  # imm = 0x401588
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB1_21:
	.cfi_def_cfa_offset 4199872
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.3, %esi
	movl	$.L.str.4, %edx
	movq	%rbx, %rdi
	movl	$127, %ecx
	jmp	.LBB1_22
.LBB1_24:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.3, %esi
	movl	$.L.str.4, %edx
	movq	%rbx, %rdi
	movl	$128, %ecx
	jmp	.LBB1_22
.LBB1_26:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.3, %esi
	movl	$.L.str.4, %edx
	movq	%rbx, %rdi
	movl	$131, %ecx
	jmp	.LBB1_22
.LBB1_28:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.3, %esi
	movl	$.L.str.4, %edx
	movq	%rbx, %rdi
	movl	$132, %ecx
	jmp	.LBB1_22
.LBB1_32:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.3, %esi
	movl	$.L.str.4, %edx
	movq	%rbx, %rdi
	movl	$134, %ecx
	jmp	.LBB1_22
.LBB1_34:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.3, %esi
	movl	$.L.str.4, %edx
	movq	%rbx, %rdi
	movl	$141, %ecx
.LBB1_22:
	movq	%rax, %r8
	xorl	%eax, %eax
	callq	fprintf
	movl	$1, %edi
	callq	exit
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	subq	$32, %rsp
	.cfi_adjust_cfa_offset 32
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z6kernelP15HIP_vector_typeIhLj4EEiii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$cov, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movl	$2304, %r9d                     # imm = 0x900
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$1
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterVar
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
	movl	$av, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movl	$768, %r9d                      # imm = 0x300
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$1
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterVar
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
	movl	$__hip_module_dtor, %edi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	cov,@object                     # @cov
	.local	cov
	.comm	cov,2304,16
	.type	av,@object                      # @av
	.local	av
	.comm	av,768,16
	.type	_Z6kernelP15HIP_vector_typeIhLj4EEiii,@object # @_Z6kernelP15HIP_vector_typeIhLj4EEiii
	.section	.rodata,"a",@progbits
	.globl	_Z6kernelP15HIP_vector_typeIhLj4EEiii
	.p2align	3, 0x0
_Z6kernelP15HIP_vector_typeIhLj4EEiii:
	.quad	_Z21__device_stub__kernelP15HIP_vector_typeIhLj4EEiii
	.size	_Z6kernelP15HIP_vector_typeIhLj4EEiii, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"rb"
	.size	.L.str, 3

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"%d"
	.size	.L.str.1, 3

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"%d %d"
	.size	.L.str.2, 6

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"CUDA Error in %s:%d: %s\n"
	.size	.L.str.3, 25

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"/home/ubuntu/Datasets/stackv2/train-structured-repos-hip-sm89/ssor96/CUDA_labs/master/lab3.hip"
	.size	.L.str.4, 95

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"wb"
	.size	.L.str.5, 3

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z6kernelP15HIP_vector_typeIhLj4EEiii"
	.size	.L__unnamed_1, 38

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"cov"
	.size	.L__unnamed_2, 4

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"av"
	.size	.L__unnamed_3, 3

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z21__device_stub__kernelP15HIP_vector_typeIhLj4EEiii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym cov
	.addrsig_sym av
	.addrsig_sym _Z6kernelP15HIP_vector_typeIhLj4EEiii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z6kernelP15HIP_vector_typeIhLj4EEiii ; -- Begin function _Z6kernelP15HIP_vector_typeIhLj4EEiii
	.globl	_Z6kernelP15HIP_vector_typeIhLj4EEiii
	.p2align	8
	.type	_Z6kernelP15HIP_vector_typeIhLj4EEiii,@function
_Z6kernelP15HIP_vector_typeIhLj4EEiii:  ; @_Z6kernelP15HIP_vector_typeIhLj4EEiii
; %bb.0:
	s_clause 0x1
	s_load_b32 s5, s[0:1], 0x24
	s_load_b128 s[16:19], s[0:1], 0x8
	v_and_b32_e32 v1, 0x3ff, v0
	s_add_u32 s2, s0, 24
	s_addc_u32 s3, s1, 0
	s_mov_b32 s6, exec_lo
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s5, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[6:7], null, s14, s4, v[1:2]
	v_cmpx_gt_i32_e64 s16, v6
	s_cbranch_execz .LBB0_17
; %bb.1:                                ; %.lr.ph87
	s_load_b64 s[2:3], s[2:3], 0x0
	s_load_b64 s[10:11], s[0:1], 0x0
	v_bfe_u32 v0, v0, 10, 10
	s_lshr_b32 s1, s5, 16
	s_cmp_gt_i32 s18, 0
	s_mov_b32 s22, 0
	s_cselect_b32 s19, -1, 0
	v_mad_u64_u32 v[7:8], null, s15, s1, v[0:1]
                                        ; implicit-def: $vgpr8_vgpr9
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_i32_e64 s0, s17, v7
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s20, s2, s4
	s_mul_i32 s21, s3, s1
	s_mov_b32 s4, 0
.LBB0_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_4 Depth 2
                                        ;       Child Loop BB0_6 Depth 3
                                        ;         Child Loop BB0_7 Depth 4
                                        ;           Child Loop BB0_8 Depth 5
                                        ;         Child Loop BB0_11 Depth 4
	s_and_saveexec_b32 s23, s0
	s_cbranch_execz .LBB0_16
; %bb.3:                                ; %.lr.ph79.preheader
                                        ;   in Loop: Header=BB0_2 Depth=1
	v_mov_b32_e32 v26, v7
	s_mov_b32 s24, 0
.LBB0_4:                                ; %.lr.ph79
                                        ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB0_6 Depth 3
                                        ;         Child Loop BB0_7 Depth 4
                                        ;           Child Loop BB0_8 Depth 5
                                        ;         Child Loop BB0_11 Depth 4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[0:1], null, v26, s16, v[6:7]
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	v_add_co_u32 v10, vcc_lo, s10, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v11, vcc_lo, s11, v1, vcc_lo
	s_and_not1_b32 vcc_lo, exec_lo, s19
	s_cbranch_vccnz .LBB0_13
; %bb.5:                                ; %.lr.ph
                                        ;   in Loop: Header=BB0_4 Depth=2
	global_load_b32 v0, v[10:11], off
	v_mov_b32_e32 v27, -1
	s_mov_b32 s25, 0
	s_getpc_b64 s[12:13]
	s_add_u32 s12, s12, cov@rel32@lo+4
	s_addc_u32 s13, s13, cov@rel32@hi+12
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v1, 0xff, v0
	v_bfe_u32 v2, v0, 8, 8
	v_bfe_u32 v0, v0, 16, 8
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cvt_f64_u32_e32 v[12:13], v1
	v_cvt_f64_u32_e32 v[14:15], v2
	s_delay_alu instid0(VALU_DEP_3)
	v_cvt_f64_u32_e32 v[16:17], v0
.LBB0_6:                                ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_4 Depth=2
                                        ; =>    This Loop Header: Depth=3
                                        ;         Child Loop BB0_7 Depth 4
                                        ;           Child Loop BB0_8 Depth 5
                                        ;         Child Loop BB0_11 Depth 4
	s_mul_i32 s1, s25, 24
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, av@rel32@lo+4
	s_addc_u32 s3, s3, av@rel32@hi+12
	s_mul_hi_u32 s5, s25, 24
	s_add_u32 s2, s1, s2
	s_addc_u32 s3, s5, s3
	s_clause 0x1
	s_load_b128 s[28:31], s[2:3], 0x0
	s_load_b64 s[2:3], s[2:3], 0x10
	s_mov_b32 s5, s4
	s_mov_b32 s6, s4
	s_mov_b32 s7, s4
	s_mov_b32 s8, s4
	s_mov_b32 s9, s4
	v_dual_mov_b32 v0, s4 :: v_dual_mov_b32 v1, s5
	v_dual_mov_b32 v2, s6 :: v_dual_mov_b32 v3, s7
	v_dual_mov_b32 v4, s8 :: v_dual_mov_b32 v5, s9
	s_mov_b64 s[6:7], s[12:13]
	s_waitcnt lgkmcnt(0)
	v_add_f64 v[18:19], v[12:13], -s[28:29]
	v_add_f64 v[20:21], v[14:15], -s[30:31]
	v_add_f64 v[22:23], v[16:17], -s[2:3]
	s_mov_b32 s3, 0
.LBB0_7:                                ; %.preheader
                                        ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_4 Depth=2
                                        ;       Parent Loop BB0_6 Depth=3
                                        ; =>      This Loop Header: Depth=4
                                        ;           Child Loop BB0_8 Depth 5
	s_mov_b64 s[8:9], 0
	s_mov_b64 s[14:15], s[6:7]
.LBB0_8:                                ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_4 Depth=2
                                        ;       Parent Loop BB0_6 Depth=3
                                        ;         Parent Loop BB0_7 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_load_b64 s[26:27], s[14:15], 0x0
	s_cmp_eq_u32 s8, 1
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s8, 2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v24, v19, v21, vcc_lo
	s_cselect_b32 s1, -1, 0
	s_cmp_eq_u32 s3, 1
	v_cndmask_b32_e32 v28, v18, v20, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s3, 2
	v_dual_cndmask_b32 v29, v1, v3 :: v_dual_cndmask_b32 v30, v0, v2
	s_cselect_b32 s2, -1, 0
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v25, v24, v23, s1
	v_cndmask_b32_e64 v24, v28, v22, s1
	v_cndmask_b32_e64 v29, v29, v5, s2
	v_cndmask_b32_e64 v28, v30, v4, s2
	s_cmp_eq_u32 s3, 0
	s_cselect_b32 s1, -1, 0
	s_add_u32 s8, s8, 1
	s_waitcnt lgkmcnt(0)
	v_fma_f64 v[24:25], v[24:25], s[26:27], v[28:29]
	s_addc_u32 s9, s9, 0
	s_add_u32 s14, s14, 24
	s_addc_u32 s15, s15, 0
	s_cmp_eq_u32 s8, 3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v3, v3, v25, vcc_lo
	v_cndmask_b32_e64 v5, v5, v25, s2
	v_cndmask_b32_e64 v4, v4, v24, s2
	v_cndmask_b32_e32 v2, v2, v24, vcc_lo
	v_cndmask_b32_e64 v1, v1, v25, s1
	v_cndmask_b32_e64 v0, v0, v24, s1
	s_cbranch_scc0 .LBB0_8
; %bb.9:                                ;   in Loop: Header=BB0_7 Depth=4
	s_add_i32 s3, s3, 1
	s_add_u32 s6, s6, 8
	s_addc_u32 s7, s7, 0
	s_cmp_lg_u32 s3, 3
	s_cbranch_scc1 .LBB0_7
; %bb.10:                               ; %.preheader63.preheader
                                        ;   in Loop: Header=BB0_6 Depth=3
	v_mov_b32_e32 v24, 0
	v_mov_b32_e32 v25, 0
	s_mov_b64 s[2:3], 0
.LBB0_11:                               ; %.preheader63
                                        ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_4 Depth=2
                                        ;       Parent Loop BB0_6 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s2, 1
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s2, 2
	v_dual_cndmask_b32 v28, v1, v3 :: v_dual_cndmask_b32 v31, v19, v21
	v_cndmask_b32_e32 v30, v0, v2, vcc_lo
	v_cndmask_b32_e32 v32, v18, v20, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_add_u32 s2, s2, 1
	v_cndmask_b32_e32 v29, v28, v5, vcc_lo
	v_dual_cndmask_b32 v31, v31, v23 :: v_dual_cndmask_b32 v28, v30, v4
	v_cndmask_b32_e32 v30, v32, v22, vcc_lo
	s_addc_u32 s3, s3, 0
	s_cmp_eq_u32 s2, 3
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[24:25], v[28:29], v[30:31], v[24:25]
	s_cbranch_scc0 .LBB0_11
; %bb.12:                               ;   in Loop: Header=BB0_6 Depth=3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_lt_f64_e32 vcc_lo, v[24:25], v[8:9]
	v_cmp_eq_u32_e64 s1, -1, v27
	s_or_b32 vcc_lo, vcc_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	v_cndmask_b32_e64 v27, v27, s25, vcc_lo
	s_add_i32 s25, s25, 1
	v_dual_cndmask_b32 v9, v9, v25 :: v_dual_cndmask_b32 v8, v8, v24
	s_add_u32 s12, s12, 0x48
	s_addc_u32 s13, s13, 0
	s_cmp_eq_u32 s25, s18
	s_cbranch_scc0 .LBB0_6
	s_branch .LBB0_14
.LBB0_13:                               ;   in Loop: Header=BB0_4 Depth=2
	v_mov_b32_e32 v27, -1
.LBB0_14:                               ; %Flow122
                                        ;   in Loop: Header=BB0_4 Depth=2
	v_add_nc_u32_e32 v26, s21, v26
	global_store_b8 v[10:11], v27, off offset:3
	v_cmp_le_i32_e32 vcc_lo, s17, v26
	s_or_b32 s24, vcc_lo, s24
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s24
	s_cbranch_execnz .LBB0_4
; %bb.15:                               ; %Flow123
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s24
.LBB0_16:                               ; %Flow124
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s23
	v_add_nc_u32_e32 v6, s20, v6
	v_cmp_le_i32_e32 vcc_lo, s16, v6
	s_or_b32 s22, vcc_lo, s22
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s22
	s_cbranch_execnz .LBB0_2
.LBB0_17:                               ; %._crit_edge88
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z6kernelP15HIP_vector_typeIhLj4EEiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 33
		.amdhsa_next_free_sgpr 32
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z6kernelP15HIP_vector_typeIhLj4EEiii, .Lfunc_end0-_Z6kernelP15HIP_vector_typeIhLj4EEiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 896
; NumSgprs: 34
; NumVgprs: 33
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 4
; VGPRBlocks: 4
; NumSGPRsForWavesPerEU: 34
; NumVGPRsForWavesPerEU: 33
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.protected	cov                     ; @cov
	.type	cov,@object
	.section	.bss,"aw",@nobits
	.globl	cov
	.p2align	4, 0x0
cov:
	.zero	2304
	.size	cov, 2304

	.protected	av                      ; @av
	.type	av,@object
	.globl	av
	.p2align	4, 0x0
av:
	.zero	768
	.size	av, 768

	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym cov
	.addrsig_sym av
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .offset:         12
        .size:           4
        .value_kind:     by_value
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z6kernelP15HIP_vector_typeIhLj4EEiii
    .private_segment_fixed_size: 0
    .sgpr_count:     34
    .sgpr_spill_count: 0
    .symbol:         _Z6kernelP15HIP_vector_typeIhLj4EEiii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     33
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
