
// Includes
#include <stdio.h>

// Constants
#define WPT 64
#define THREADS 512
#define BLOCKS 14*2*8
#define N (WPT*BLOCKS*THREADS)

// Kernel
__global__ void bwbench(unsigned *A, unsigned *B) {
	unsigned i = blockIdx.x*THREADS + threadIdx.x;
	B[i+ 0*THREADS*BLOCKS] = A[i+ 0*THREADS*BLOCKS];
	B[i+ 1*THREADS*BLOCKS] = A[i+ 1*THREADS*BLOCKS];
	B[i+ 2*THREADS*BLOCKS] = A[i+ 2*THREADS*BLOCKS];
	B[i+ 3*THREADS*BLOCKS] = A[i+ 3*THREADS*BLOCKS];
	B[i+ 4*THREADS*BLOCKS] = A[i+ 4*THREADS*BLOCKS];
	B[i+ 5*THREADS*BLOCKS] = A[i+ 5*THREADS*BLOCKS];
	B[i+ 6*THREADS*BLOCKS] = A[i+ 6*THREADS*BLOCKS];
	B[i+ 7*THREADS*BLOCKS] = A[i+ 7*THREADS*BLOCKS];
	B[i+ 8*THREADS*BLOCKS] = A[i+ 8*THREADS*BLOCKS];
	B[i+ 9*THREADS*BLOCKS] = A[i+ 9*THREADS*BLOCKS];
	B[i+10*THREADS*BLOCKS] = A[i+10*THREADS*BLOCKS];
	B[i+11*THREADS*BLOCKS] = A[i+11*THREADS*BLOCKS];
	B[i+12*THREADS*BLOCKS] = A[i+12*THREADS*BLOCKS];
	B[i+13*THREADS*BLOCKS] = A[i+13*THREADS*BLOCKS];
	B[i+14*THREADS*BLOCKS] = A[i+14*THREADS*BLOCKS];
	B[i+15*THREADS*BLOCKS] = A[i+15*THREADS*BLOCKS];
	B[i+16*THREADS*BLOCKS] = A[i+16*THREADS*BLOCKS];
	B[i+17*THREADS*BLOCKS] = A[i+17*THREADS*BLOCKS];
	B[i+18*THREADS*BLOCKS] = A[i+18*THREADS*BLOCKS];
	B[i+19*THREADS*BLOCKS] = A[i+19*THREADS*BLOCKS];
	B[i+20*THREADS*BLOCKS] = A[i+20*THREADS*BLOCKS];
	B[i+21*THREADS*BLOCKS] = A[i+21*THREADS*BLOCKS];
	B[i+22*THREADS*BLOCKS] = A[i+22*THREADS*BLOCKS];
	B[i+23*THREADS*BLOCKS] = A[i+23*THREADS*BLOCKS];
	B[i+24*THREADS*BLOCKS] = A[i+24*THREADS*BLOCKS];
	B[i+25*THREADS*BLOCKS] = A[i+25*THREADS*BLOCKS];
	B[i+26*THREADS*BLOCKS] = A[i+26*THREADS*BLOCKS];
	B[i+27*THREADS*BLOCKS] = A[i+27*THREADS*BLOCKS];
	B[i+28*THREADS*BLOCKS] = A[i+28*THREADS*BLOCKS];
	B[i+29*THREADS*BLOCKS] = A[i+29*THREADS*BLOCKS];
	B[i+30*THREADS*BLOCKS] = A[i+30*THREADS*BLOCKS];
	B[i+31*THREADS*BLOCKS] = A[i+31*THREADS*BLOCKS];
	B[i+32*THREADS*BLOCKS] = A[i+32*THREADS*BLOCKS];
	B[i+33*THREADS*BLOCKS] = A[i+33*THREADS*BLOCKS];
	B[i+34*THREADS*BLOCKS] = A[i+34*THREADS*BLOCKS];
	B[i+35*THREADS*BLOCKS] = A[i+35*THREADS*BLOCKS];
	B[i+36*THREADS*BLOCKS] = A[i+36*THREADS*BLOCKS];
	B[i+37*THREADS*BLOCKS] = A[i+37*THREADS*BLOCKS];
	B[i+38*THREADS*BLOCKS] = A[i+38*THREADS*BLOCKS];
	B[i+39*THREADS*BLOCKS] = A[i+39*THREADS*BLOCKS];
	B[i+40*THREADS*BLOCKS] = A[i+40*THREADS*BLOCKS];
	B[i+41*THREADS*BLOCKS] = A[i+41*THREADS*BLOCKS];
	B[i+42*THREADS*BLOCKS] = A[i+42*THREADS*BLOCKS];
	B[i+43*THREADS*BLOCKS] = A[i+43*THREADS*BLOCKS];
	B[i+44*THREADS*BLOCKS] = A[i+44*THREADS*BLOCKS];
	B[i+45*THREADS*BLOCKS] = A[i+45*THREADS*BLOCKS];
	B[i+46*THREADS*BLOCKS] = A[i+46*THREADS*BLOCKS];
	B[i+47*THREADS*BLOCKS] = A[i+47*THREADS*BLOCKS];
	B[i+48*THREADS*BLOCKS] = A[i+48*THREADS*BLOCKS];
	B[i+49*THREADS*BLOCKS] = A[i+49*THREADS*BLOCKS];
	B[i+50*THREADS*BLOCKS] = A[i+50*THREADS*BLOCKS];
	B[i+51*THREADS*BLOCKS] = A[i+51*THREADS*BLOCKS];
	B[i+52*THREADS*BLOCKS] = A[i+52*THREADS*BLOCKS];
	B[i+53*THREADS*BLOCKS] = A[i+53*THREADS*BLOCKS];
	B[i+54*THREADS*BLOCKS] = A[i+54*THREADS*BLOCKS];
	B[i+55*THREADS*BLOCKS] = A[i+55*THREADS*BLOCKS];
	B[i+56*THREADS*BLOCKS] = A[i+56*THREADS*BLOCKS];
	B[i+57*THREADS*BLOCKS] = A[i+57*THREADS*BLOCKS];
	B[i+58*THREADS*BLOCKS] = A[i+58*THREADS*BLOCKS];
	B[i+59*THREADS*BLOCKS] = A[i+59*THREADS*BLOCKS];
	B[i+60*THREADS*BLOCKS] = A[i+60*THREADS*BLOCKS];
	B[i+61*THREADS*BLOCKS] = A[i+61*THREADS*BLOCKS];
	B[i+62*THREADS*BLOCKS] = A[i+62*THREADS*BLOCKS];
	B[i+63*THREADS*BLOCKS] = A[i+63*THREADS*BLOCKS];
}

// Timers
cudaEvent_t start;
void timer_start();
void timer_stop();

// Main function
int main(void) {
	unsigned size = N*sizeof(unsigned);
	
	// Allocate and initialise the data
	unsigned *A = (unsigned *)malloc(size);
	unsigned *B = (unsigned *)malloc(size);
	for (unsigned i=0; i<N; i++) {
		A[i] = i;
		B[i] = 0;
	}
	
	// Allocate CUDA arrays
	unsigned *devA = 0;
	unsigned *devB = 0;
	cudaMalloc(&devA, size);
	cudaMalloc(&devB, size);
	
	// Copy to the GPU
	cudaMemcpy(devA, A, size, cudaMemcpyHostToDevice);
	
	// Configure the kernel
	dim3 threads(THREADS);
	dim3 blocks(BLOCKS);
	
	// Launch the kernel
	timer_start();
	bwbench<<<blocks, threads>>>(devA, devB);
	timer_stop();
	
	// Copy from the GPU
	cudaMemcpy(B, devB, size, cudaMemcpyDeviceToHost);
	
	// Clean-up and exit
	cudaFree(A);
	cudaFree(B);
	free(A);
	free(B);
	return 0;
}

// Start the timer
void timer_start() {
	cudaDeviceSynchronize();
	cudaEventCreate(&start);
	cudaEventRecord(start);
}

// End the timer
void timer_stop() {
	cudaDeviceSynchronize();
	cudaEvent_t stop;
	cudaEventCreate(&stop);
	cudaEventRecord(stop);
	cudaEventSynchronize(stop);
	float timer = 0;
	cudaEventElapsedTime(&timer,start,stop);
	printf("Execution time: %.3lf ms \n", timer);
	float megabytes = (N*2*sizeof(unsigned)) / (1024*1024);
	printf("Bandwidth: %.3lf GB/s \n", megabytes/timer);
}

	.file	"tmpxft_002f20aa_00000000-6_bwbench.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2032:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2032:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z11timer_startv
	.type	_Z11timer_startv, @function
_Z11timer_startv:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	call	cudaDeviceSynchronize@PLT
	leaq	start(%rip), %rdi
	call	cudaEventCreate@PLT
	movq	start(%rip), %rdi
	xorl	%esi, %esi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	cudaEventRecord@PLT
	.cfi_endproc
.LFE2028:
	.size	_Z11timer_startv, .-_Z11timer_startv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"Execution time: %.3lf ms \n"
.LC3:
	.string	"Bandwidth: %.3lf GB/s \n"
	.text
	.globl	_Z10timer_stopv
	.type	_Z10timer_stopv, @function
_Z10timer_stopv:
.LFB2029:
	.cfi_startproc
	endbr64
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	%fs:40, %rax
	movq	%rax, 24(%rsp)
	xorl	%eax, %eax
	call	cudaDeviceSynchronize@PLT
	leaq	16(%rsp), %rdi
	call	cudaEventCreate@PLT
	movq	16(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	16(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	16(%rsp), %rdx
	movq	start(%rip), %rsi
	leaq	12(%rsp), %rdi
	movl	$0x00000000, 12(%rsp)
	call	cudaEventElapsedTime@PLT
	leaq	.LC1(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	12(%rsp), %xmm0
	call	__printf_chk@PLT
	movl	$2, %edi
	movb	$1, %al
	leaq	.LC3(%rip), %rsi
	movss	.LC2(%rip), %xmm0
	divss	12(%rsp), %xmm0
	cvtss2sd	%xmm0, %xmm0
	call	__printf_chk@PLT
	movq	24(%rsp), %rax
	subq	%fs:40, %rax
	je	.L5
	call	__stack_chk_fail@PLT
.L5:
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2029:
	.size	_Z10timer_stopv, .-_Z10timer_stopv
	.globl	_Z28__device_stub__Z7bwbenchPjS_PjS_
	.type	_Z28__device_stub__Z7bwbenchPjS_PjS_, @function
_Z28__device_stub__Z7bwbenchPjS_PjS_:
.LFB2054:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z7bwbenchPjS_(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L8:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2054:
	.size	_Z28__device_stub__Z7bwbenchPjS_PjS_, .-_Z28__device_stub__Z7bwbenchPjS_PjS_
	.globl	_Z7bwbenchPjS_
	.type	_Z7bwbenchPjS_, @function
_Z7bwbenchPjS_:
.LFB2055:
	.cfi_startproc
	endbr64
	jmp	_Z28__device_stub__Z7bwbenchPjS_PjS_
	.cfi_endproc
.LFE2055:
	.size	_Z7bwbenchPjS_, .-_Z7bwbenchPjS_
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movl	$29360128, %edi
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	subq	$56, %rsp
	.cfi_def_cfa_offset 80
	movq	%fs:40, %rax
	movq	%rax, 40(%rsp)
	xorl	%eax, %eax
	call	malloc@PLT
	movl	$29360128, %edi
	movq	%rax, %rbp
	call	malloc@PLT
	xorl	%ecx, %ecx
	movq	%rax, %rbx
.L14:
	movl	%ecx, 0(%rbp,%rcx,4)
	incq	%rcx
	cmpq	$7340032, %rcx
	jne	.L14
	xorl	%eax, %eax
	movq	%rbx, %rdi
	movl	$29360128, %esi
	rep stosl
	xorl	%eax, %eax
	movq	%rsp, %rdi
	movq	%rax, (%rsp)
	movq	%rax, 8(%rsp)
	call	cudaMalloc@PLT
	leaq	8(%rsp), %rdi
	movl	$29360128, %esi
	call	cudaMalloc@PLT
	movq	(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	movl	$29360128, %edx
	call	cudaMemcpy@PLT
	movl	$8388609, %eax
	movl	$1, 24(%rsp)
	salq	$9, %rax
	movl	$1, 36(%rsp)
	movq	%rax, 16(%rsp)
	subq	$288, %rax
	movq	%rax, 28(%rsp)
	call	_Z11timer_startv
	movl	24(%rsp), %ecx
	movl	36(%rsp), %esi
	xorl	%r9d, %r9d
	movq	16(%rsp), %rdx
	movq	28(%rsp), %rdi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L15
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdi
	call	_Z28__device_stub__Z7bwbenchPjS_PjS_
.L15:
	call	_Z10timer_stopv
	movq	8(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbx, %rdi
	movl	$29360128, %edx
	call	cudaMemcpy@PLT
	movq	%rbp, %rdi
	call	cudaFree@PLT
	movq	%rbx, %rdi
	call	cudaFree@PLT
	movq	%rbp, %rdi
	call	free@PLT
	movq	%rbx, %rdi
	call	free@PLT
	movq	40(%rsp), %rax
	subq	%fs:40, %rax
	je	.L16
	call	__stack_chk_fail@PLT
.L16:
	addq	$56, %rsp
	.cfi_def_cfa_offset 24
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	main, .-main
	.section	.rodata.str1.1
.LC4:
	.string	"_Z7bwbenchPjS_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2057:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC4(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z7bwbenchPjS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2057:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.globl	start
	.bss
	.align 8
	.type	start, @object
	.size	start, 8
start:
	.zero	8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC2:
	.long	1113587712
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


// Includes

#include <hip/hip_runtime.h>
#include <stdio.h>

// Constants
#define WPT 64
#define THREADS 512
#define BLOCKS 14*2*8
#define N (WPT*BLOCKS*THREADS)

// Kernel
__global__ void bwbench(unsigned *A, unsigned *B) {
	unsigned i = blockIdx.x*THREADS + threadIdx.x;
	B[i+ 0*THREADS*BLOCKS] = A[i+ 0*THREADS*BLOCKS];
	B[i+ 1*THREADS*BLOCKS] = A[i+ 1*THREADS*BLOCKS];
	B[i+ 2*THREADS*BLOCKS] = A[i+ 2*THREADS*BLOCKS];
	B[i+ 3*THREADS*BLOCKS] = A[i+ 3*THREADS*BLOCKS];
	B[i+ 4*THREADS*BLOCKS] = A[i+ 4*THREADS*BLOCKS];
	B[i+ 5*THREADS*BLOCKS] = A[i+ 5*THREADS*BLOCKS];
	B[i+ 6*THREADS*BLOCKS] = A[i+ 6*THREADS*BLOCKS];
	B[i+ 7*THREADS*BLOCKS] = A[i+ 7*THREADS*BLOCKS];
	B[i+ 8*THREADS*BLOCKS] = A[i+ 8*THREADS*BLOCKS];
	B[i+ 9*THREADS*BLOCKS] = A[i+ 9*THREADS*BLOCKS];
	B[i+10*THREADS*BLOCKS] = A[i+10*THREADS*BLOCKS];
	B[i+11*THREADS*BLOCKS] = A[i+11*THREADS*BLOCKS];
	B[i+12*THREADS*BLOCKS] = A[i+12*THREADS*BLOCKS];
	B[i+13*THREADS*BLOCKS] = A[i+13*THREADS*BLOCKS];
	B[i+14*THREADS*BLOCKS] = A[i+14*THREADS*BLOCKS];
	B[i+15*THREADS*BLOCKS] = A[i+15*THREADS*BLOCKS];
	B[i+16*THREADS*BLOCKS] = A[i+16*THREADS*BLOCKS];
	B[i+17*THREADS*BLOCKS] = A[i+17*THREADS*BLOCKS];
	B[i+18*THREADS*BLOCKS] = A[i+18*THREADS*BLOCKS];
	B[i+19*THREADS*BLOCKS] = A[i+19*THREADS*BLOCKS];
	B[i+20*THREADS*BLOCKS] = A[i+20*THREADS*BLOCKS];
	B[i+21*THREADS*BLOCKS] = A[i+21*THREADS*BLOCKS];
	B[i+22*THREADS*BLOCKS] = A[i+22*THREADS*BLOCKS];
	B[i+23*THREADS*BLOCKS] = A[i+23*THREADS*BLOCKS];
	B[i+24*THREADS*BLOCKS] = A[i+24*THREADS*BLOCKS];
	B[i+25*THREADS*BLOCKS] = A[i+25*THREADS*BLOCKS];
	B[i+26*THREADS*BLOCKS] = A[i+26*THREADS*BLOCKS];
	B[i+27*THREADS*BLOCKS] = A[i+27*THREADS*BLOCKS];
	B[i+28*THREADS*BLOCKS] = A[i+28*THREADS*BLOCKS];
	B[i+29*THREADS*BLOCKS] = A[i+29*THREADS*BLOCKS];
	B[i+30*THREADS*BLOCKS] = A[i+30*THREADS*BLOCKS];
	B[i+31*THREADS*BLOCKS] = A[i+31*THREADS*BLOCKS];
	B[i+32*THREADS*BLOCKS] = A[i+32*THREADS*BLOCKS];
	B[i+33*THREADS*BLOCKS] = A[i+33*THREADS*BLOCKS];
	B[i+34*THREADS*BLOCKS] = A[i+34*THREADS*BLOCKS];
	B[i+35*THREADS*BLOCKS] = A[i+35*THREADS*BLOCKS];
	B[i+36*THREADS*BLOCKS] = A[i+36*THREADS*BLOCKS];
	B[i+37*THREADS*BLOCKS] = A[i+37*THREADS*BLOCKS];
	B[i+38*THREADS*BLOCKS] = A[i+38*THREADS*BLOCKS];
	B[i+39*THREADS*BLOCKS] = A[i+39*THREADS*BLOCKS];
	B[i+40*THREADS*BLOCKS] = A[i+40*THREADS*BLOCKS];
	B[i+41*THREADS*BLOCKS] = A[i+41*THREADS*BLOCKS];
	B[i+42*THREADS*BLOCKS] = A[i+42*THREADS*BLOCKS];
	B[i+43*THREADS*BLOCKS] = A[i+43*THREADS*BLOCKS];
	B[i+44*THREADS*BLOCKS] = A[i+44*THREADS*BLOCKS];
	B[i+45*THREADS*BLOCKS] = A[i+45*THREADS*BLOCKS];
	B[i+46*THREADS*BLOCKS] = A[i+46*THREADS*BLOCKS];
	B[i+47*THREADS*BLOCKS] = A[i+47*THREADS*BLOCKS];
	B[i+48*THREADS*BLOCKS] = A[i+48*THREADS*BLOCKS];
	B[i+49*THREADS*BLOCKS] = A[i+49*THREADS*BLOCKS];
	B[i+50*THREADS*BLOCKS] = A[i+50*THREADS*BLOCKS];
	B[i+51*THREADS*BLOCKS] = A[i+51*THREADS*BLOCKS];
	B[i+52*THREADS*BLOCKS] = A[i+52*THREADS*BLOCKS];
	B[i+53*THREADS*BLOCKS] = A[i+53*THREADS*BLOCKS];
	B[i+54*THREADS*BLOCKS] = A[i+54*THREADS*BLOCKS];
	B[i+55*THREADS*BLOCKS] = A[i+55*THREADS*BLOCKS];
	B[i+56*THREADS*BLOCKS] = A[i+56*THREADS*BLOCKS];
	B[i+57*THREADS*BLOCKS] = A[i+57*THREADS*BLOCKS];
	B[i+58*THREADS*BLOCKS] = A[i+58*THREADS*BLOCKS];
	B[i+59*THREADS*BLOCKS] = A[i+59*THREADS*BLOCKS];
	B[i+60*THREADS*BLOCKS] = A[i+60*THREADS*BLOCKS];
	B[i+61*THREADS*BLOCKS] = A[i+61*THREADS*BLOCKS];
	B[i+62*THREADS*BLOCKS] = A[i+62*THREADS*BLOCKS];
	B[i+63*THREADS*BLOCKS] = A[i+63*THREADS*BLOCKS];
}

// Timers
hipEvent_t start;
void timer_start();
void timer_stop();

// Main function
int main(void) {
	unsigned size = N*sizeof(unsigned);
	
	// Allocate and initialise the data
	unsigned *A = (unsigned *)malloc(size);
	unsigned *B = (unsigned *)malloc(size);
	for (unsigned i=0; i<N; i++) {
		A[i] = i;
		B[i] = 0;
	}
	
	// Allocate CUDA arrays
	unsigned *devA = 0;
	unsigned *devB = 0;
	hipMalloc(&devA, size);
	hipMalloc(&devB, size);
	
	// Copy to the GPU
	hipMemcpy(devA, A, size, hipMemcpyHostToDevice);
	
	// Configure the kernel
	dim3 threads(THREADS);
	dim3 blocks(BLOCKS);
	
	// Launch the kernel
	timer_start();
	bwbench<<<blocks, threads>>>(devA, devB);
	timer_stop();
	
	// Copy from the GPU
	hipMemcpy(B, devB, size, hipMemcpyDeviceToHost);
	
	// Clean-up and exit
	hipFree(A);
	hipFree(B);
	free(A);
	free(B);
	return 0;
}

// Start the timer
void timer_start() {
	hipDeviceSynchronize();
	hipEventCreate(&start);
	hipEventRecord(start);
}

// End the timer
void timer_stop() {
	hipDeviceSynchronize();
	hipEvent_t stop;
	hipEventCreate(&stop);
	hipEventRecord(stop);
	hipEventSynchronize(stop);
	float timer = 0;
	hipEventElapsedTime(&timer,start,stop);
	printf("Execution time: %.3lf ms \n", timer);
	float megabytes = (N*2*sizeof(unsigned)) / (1024*1024);
	printf("Bandwidth: %.3lf GB/s \n", megabytes/timer);
}

	.text
	.file	"bwbench.hip"
	.globl	_Z22__device_stub__bwbenchPjS_  # -- Begin function _Z22__device_stub__bwbenchPjS_
	.type	_Z22__device_stub__bwbenchPjS_,@function
_Z22__device_stub__bwbenchPjS_:         # @_Z22__device_stub__bwbenchPjS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z7bwbenchPjS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z22__device_stub__bwbenchPjS_, .Lfunc_end0-_Z22__device_stub__bwbenchPjS_
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$24, %rsp
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	$29360128, %edi                 # imm = 0x1C00000
	callq	malloc
	movq	%rax, %rbx
	movl	$1, %edi
	movl	$29360128, %esi                 # imm = 0x1C00000
	callq	calloc@PLT
	movq	%rax, %r14
	xorl	%eax, %eax
.LBB1_1:                                # =>This Inner Loop Header: Depth=1
	movl	%eax, (%rbx,%rax,4)
	incq	%rax
	cmpq	$7340032, %rax                  # imm = 0x700000
	jne	.LBB1_1
# %bb.2:
	xorl	%eax, %eax
	leaq	16(%rsp), %r15
	movq	%rax, (%r15)
	leaq	8(%rsp), %r12
	movq	%rax, (%r12)
	movl	$29360128, %esi                 # imm = 0x1C00000
	movq	%r15, %rdi
	callq	hipMalloc
	movl	$29360128, %esi                 # imm = 0x1C00000
	movq	%r12, %rdi
	callq	hipMalloc
	movq	(%r15), %rdi
	movl	$29360128, %edx                 # imm = 0x1C00000
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	callq	_Z11timer_startv
	movabsq	$4294967520, %rdi               # imm = 0x1000000E0
	leaq	288(%rdi), %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_4
# %bb.3:
	movq	16(%rsp), %rdi
	movq	8(%rsp), %rsi
	callq	_Z22__device_stub__bwbenchPjS_
.LBB1_4:
	callq	_Z10timer_stopv
	movq	8(%rsp), %rsi
	movl	$29360128, %edx                 # imm = 0x1C00000
	movq	%r14, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	%rbx, %rdi
	callq	hipFree
	movq	%r14, %rdi
	callq	hipFree
	movq	%rbx, %rdi
	callq	free
	movq	%r14, %rdi
	callq	free
	xorl	%eax, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.globl	_Z11timer_startv                # -- Begin function _Z11timer_startv
	.type	_Z11timer_startv,@function
_Z11timer_startv:                       # @_Z11timer_startv
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	hipDeviceSynchronize
	movl	$start, %edi
	callq	hipEventCreate
	movq	start(%rip), %rdi
	xorl	%esi, %esi
	popq	%rax
	.cfi_def_cfa_offset 8
	jmp	hipEventRecord                  # TAILCALL
.Lfunc_end2:
	.size	_Z11timer_startv, .Lfunc_end2-_Z11timer_startv
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z10timer_stopv
.LCPI3_0:
	.long	0x42600000                      # float 56
	.text
	.globl	_Z10timer_stopv
	.type	_Z10timer_stopv,@function
_Z10timer_stopv:                        # @_Z10timer_stopv
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	subq	$24, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	callq	hipDeviceSynchronize
	leaq	16(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipEventCreate
	movq	(%rbx), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	(%rbx), %rdi
	callq	hipEventSynchronize
	leaq	12(%rsp), %r14
	movl	$0, (%r14)
	movq	start(%rip), %rsi
	movq	(%rbx), %rdx
	movq	%r14, %rdi
	callq	hipEventElapsedTime
	cvtss2sd	(%r14), %xmm0
	movl	$.L.str, %edi
	movb	$1, %al
	callq	printf
	movss	.LCPI3_0(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	divss	(%r14), %xmm0
	cvtss2sd	%xmm0, %xmm0
	movl	$.L.str.1, %edi
	movb	$1, %al
	callq	printf
	addq	$24, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z10timer_stopv, .Lfunc_end3-_Z10timer_stopv
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB4_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB4_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z7bwbenchPjS_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end4:
	.size	__hip_module_ctor, .Lfunc_end4-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB5_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB5_2:
	retq
.Lfunc_end5:
	.size	__hip_module_dtor, .Lfunc_end5-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z7bwbenchPjS_,@object          # @_Z7bwbenchPjS_
	.section	.rodata,"a",@progbits
	.globl	_Z7bwbenchPjS_
	.p2align	3, 0x0
_Z7bwbenchPjS_:
	.quad	_Z22__device_stub__bwbenchPjS_
	.size	_Z7bwbenchPjS_, 8

	.type	start,@object                   # @start
	.bss
	.globl	start
	.p2align	3, 0x0
start:
	.quad	0
	.size	start, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Execution time: %.3lf ms \n"
	.size	.L.str, 27

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"Bandwidth: %.3lf GB/s \n"
	.size	.L.str.1, 24

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z7bwbenchPjS_"
	.size	.L__unnamed_1, 15

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z22__device_stub__bwbenchPjS_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z7bwbenchPjS_
	.addrsig_sym start
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z7bwbenchPjS_          ; -- Begin function _Z7bwbenchPjS_
	.globl	_Z7bwbenchPjS_
	.p2align	8
	.type	_Z7bwbenchPjS_,@function
_Z7bwbenchPjS_:                         ; @_Z7bwbenchPjS_
; %bb.0:
	s_load_b128 s[0:3], s[0:1], 0x0
	v_lshl_add_u32 v0, s15, 9, v0
	v_mov_b32_e32 v1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v4, vcc_lo, s0, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v3, vcc_lo
	v_add_co_u32 v2, vcc_lo, s2, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
	global_load_b32 v8, v[4:5], off
	v_dual_mov_b32 v5, v1 :: v_dual_add_nc_u32 v4, 0x1c000, v0
	s_waitcnt vmcnt(0)
	global_store_b32 v[2:3], v8, off
	v_add_nc_u32_e32 v2, 0x38000, v0
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	v_mov_b32_e32 v3, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, s0, v4
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v5, vcc_lo
	v_add_co_u32 v4, vcc_lo, s2, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s3, v5, vcc_lo
	global_load_b32 v8, v[6:7], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[4:5], v8, off
	v_add_nc_u32_e32 v4, 0x54000, v0
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	v_mov_b32_e32 v5, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v3, vcc_lo
	v_add_co_u32 v2, vcc_lo, s2, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
	global_load_b32 v8, v[6:7], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[2:3], v8, off
	v_add_nc_u32_e32 v2, 0x70000, v0
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	v_mov_b32_e32 v3, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, s0, v4
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v5, vcc_lo
	v_add_co_u32 v4, vcc_lo, s2, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s3, v5, vcc_lo
	global_load_b32 v8, v[6:7], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[4:5], v8, off
	v_add_nc_u32_e32 v4, 0x8c000, v0
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	v_mov_b32_e32 v5, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v3, vcc_lo
	v_add_co_u32 v2, vcc_lo, s2, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
	global_load_b32 v8, v[6:7], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[2:3], v8, off
	v_add_nc_u32_e32 v2, 0xa8000, v0
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	v_mov_b32_e32 v3, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, s0, v4
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v5, vcc_lo
	v_add_co_u32 v4, vcc_lo, s2, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s3, v5, vcc_lo
	global_load_b32 v8, v[6:7], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[4:5], v8, off
	v_add_nc_u32_e32 v4, 0xc4000, v0
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	v_mov_b32_e32 v5, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v3, vcc_lo
	v_add_co_u32 v2, vcc_lo, s2, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
	global_load_b32 v8, v[6:7], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[2:3], v8, off
	v_add_nc_u32_e32 v2, 0xe0000, v0
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	v_mov_b32_e32 v3, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, s0, v4
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v5, vcc_lo
	v_add_co_u32 v4, vcc_lo, s2, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s3, v5, vcc_lo
	global_load_b32 v8, v[6:7], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[4:5], v8, off
	v_add_nc_u32_e32 v4, 0xfc000, v0
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	v_mov_b32_e32 v5, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v3, vcc_lo
	v_add_co_u32 v2, vcc_lo, s2, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
	global_load_b32 v8, v[6:7], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[2:3], v8, off
	v_add_nc_u32_e32 v2, 0x118000, v0
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	v_mov_b32_e32 v3, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, s0, v4
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v5, vcc_lo
	v_add_co_u32 v4, vcc_lo, s2, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s3, v5, vcc_lo
	global_load_b32 v8, v[6:7], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[4:5], v8, off
	v_add_nc_u32_e32 v4, 0x134000, v0
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	v_mov_b32_e32 v5, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v3, vcc_lo
	v_add_co_u32 v2, vcc_lo, s2, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
	global_load_b32 v8, v[6:7], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[2:3], v8, off
	v_add_nc_u32_e32 v2, 0x150000, v0
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	v_mov_b32_e32 v3, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, s0, v4
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v5, vcc_lo
	v_add_co_u32 v4, vcc_lo, s2, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s3, v5, vcc_lo
	global_load_b32 v8, v[6:7], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[4:5], v8, off
	v_add_nc_u32_e32 v4, 0x16c000, v0
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	v_mov_b32_e32 v5, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v3, vcc_lo
	v_add_co_u32 v2, vcc_lo, s2, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
	global_load_b32 v8, v[6:7], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[2:3], v8, off
	v_add_nc_u32_e32 v2, 0x188000, v0
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	v_mov_b32_e32 v3, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, s0, v4
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v5, vcc_lo
	v_add_co_u32 v4, vcc_lo, s2, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s3, v5, vcc_lo
	global_load_b32 v8, v[6:7], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[4:5], v8, off
	v_add_nc_u32_e32 v4, 0x1a4000, v0
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	v_mov_b32_e32 v5, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v3, vcc_lo
	v_add_co_u32 v2, vcc_lo, s2, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
	global_load_b32 v8, v[6:7], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[2:3], v8, off
	v_add_nc_u32_e32 v2, 0x1c0000, v0
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	v_mov_b32_e32 v3, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, s0, v4
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v5, vcc_lo
	v_add_co_u32 v4, vcc_lo, s2, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s3, v5, vcc_lo
	global_load_b32 v8, v[6:7], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[4:5], v8, off
	v_add_nc_u32_e32 v4, 0x1dc000, v0
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	v_mov_b32_e32 v5, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v3, vcc_lo
	v_add_co_u32 v2, vcc_lo, s2, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
	global_load_b32 v8, v[6:7], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[2:3], v8, off
	v_add_nc_u32_e32 v2, 0x1f8000, v0
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	v_mov_b32_e32 v3, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, s0, v4
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v5, vcc_lo
	v_add_co_u32 v4, vcc_lo, s2, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s3, v5, vcc_lo
	global_load_b32 v8, v[6:7], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[4:5], v8, off
	v_add_nc_u32_e32 v4, 0x214000, v0
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	v_mov_b32_e32 v5, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v3, vcc_lo
	v_add_co_u32 v2, vcc_lo, s2, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
	global_load_b32 v8, v[6:7], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[2:3], v8, off
	v_add_nc_u32_e32 v2, 0x230000, v0
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	v_mov_b32_e32 v3, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, s0, v4
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v5, vcc_lo
	v_add_co_u32 v4, vcc_lo, s2, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s3, v5, vcc_lo
	global_load_b32 v8, v[6:7], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[4:5], v8, off
	v_add_nc_u32_e32 v4, 0x24c000, v0
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	v_mov_b32_e32 v5, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v3, vcc_lo
	v_add_co_u32 v2, vcc_lo, s2, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
	global_load_b32 v8, v[6:7], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[2:3], v8, off
	v_add_nc_u32_e32 v2, 0x268000, v0
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	v_mov_b32_e32 v3, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, s0, v4
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v5, vcc_lo
	v_add_co_u32 v4, vcc_lo, s2, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s3, v5, vcc_lo
	global_load_b32 v8, v[6:7], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[4:5], v8, off
	v_add_nc_u32_e32 v4, 0x284000, v0
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	v_mov_b32_e32 v5, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v3, vcc_lo
	v_add_co_u32 v2, vcc_lo, s2, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
	global_load_b32 v8, v[6:7], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[2:3], v8, off
	v_add_nc_u32_e32 v2, 0x2a0000, v0
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	v_mov_b32_e32 v3, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, s0, v4
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v5, vcc_lo
	v_add_co_u32 v4, vcc_lo, s2, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s3, v5, vcc_lo
	global_load_b32 v8, v[6:7], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[4:5], v8, off
	v_add_nc_u32_e32 v4, 0x2bc000, v0
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	v_mov_b32_e32 v5, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v3, vcc_lo
	v_add_co_u32 v2, vcc_lo, s2, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
	global_load_b32 v8, v[6:7], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[2:3], v8, off
	v_add_nc_u32_e32 v2, 0x2d8000, v0
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	v_mov_b32_e32 v3, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, s0, v4
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v5, vcc_lo
	v_add_co_u32 v4, vcc_lo, s2, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s3, v5, vcc_lo
	global_load_b32 v8, v[6:7], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[4:5], v8, off
	v_add_nc_u32_e32 v4, 0x2f4000, v0
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	v_mov_b32_e32 v5, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v3, vcc_lo
	v_add_co_u32 v2, vcc_lo, s2, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
	global_load_b32 v8, v[6:7], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[2:3], v8, off
	v_add_nc_u32_e32 v2, 0x310000, v0
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	v_mov_b32_e32 v3, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, s0, v4
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v5, vcc_lo
	v_add_co_u32 v4, vcc_lo, s2, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s3, v5, vcc_lo
	global_load_b32 v8, v[6:7], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[4:5], v8, off
	v_add_nc_u32_e32 v4, 0x32c000, v0
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	v_mov_b32_e32 v5, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v3, vcc_lo
	v_add_co_u32 v2, vcc_lo, s2, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
	global_load_b32 v8, v[6:7], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[2:3], v8, off
	v_add_nc_u32_e32 v2, 0x348000, v0
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	v_mov_b32_e32 v3, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, s0, v4
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v5, vcc_lo
	v_add_co_u32 v4, vcc_lo, s2, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s3, v5, vcc_lo
	global_load_b32 v8, v[6:7], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[4:5], v8, off
	v_add_nc_u32_e32 v4, 0x364000, v0
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	v_mov_b32_e32 v5, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v3, vcc_lo
	v_add_co_u32 v2, vcc_lo, s2, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
	global_load_b32 v8, v[6:7], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[2:3], v8, off
	v_add_nc_u32_e32 v2, 0x380000, v0
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	v_mov_b32_e32 v3, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, s0, v4
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v5, vcc_lo
	v_add_co_u32 v4, vcc_lo, s2, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s3, v5, vcc_lo
	global_load_b32 v8, v[6:7], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[4:5], v8, off
	v_add_nc_u32_e32 v4, 0x39c000, v0
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	v_mov_b32_e32 v5, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v3, vcc_lo
	v_add_co_u32 v2, vcc_lo, s2, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
	global_load_b32 v8, v[6:7], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[2:3], v8, off
	v_add_nc_u32_e32 v2, 0x3b8000, v0
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	v_mov_b32_e32 v3, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, s0, v4
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v5, vcc_lo
	v_add_co_u32 v4, vcc_lo, s2, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s3, v5, vcc_lo
	global_load_b32 v8, v[6:7], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[4:5], v8, off
	v_add_nc_u32_e32 v4, 0x3d4000, v0
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	v_mov_b32_e32 v5, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v3, vcc_lo
	v_add_co_u32 v2, vcc_lo, s2, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
	global_load_b32 v8, v[6:7], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[2:3], v8, off
	v_add_nc_u32_e32 v2, 0x3f0000, v0
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	v_mov_b32_e32 v3, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, s0, v4
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v5, vcc_lo
	v_add_co_u32 v4, vcc_lo, s2, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s3, v5, vcc_lo
	global_load_b32 v8, v[6:7], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[4:5], v8, off
	v_add_nc_u32_e32 v4, 0x40c000, v0
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	v_mov_b32_e32 v5, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v3, vcc_lo
	v_add_co_u32 v2, vcc_lo, s2, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
	global_load_b32 v8, v[6:7], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[2:3], v8, off
	v_add_nc_u32_e32 v2, 0x428000, v0
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	v_mov_b32_e32 v3, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, s0, v4
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v5, vcc_lo
	v_add_co_u32 v4, vcc_lo, s2, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s3, v5, vcc_lo
	global_load_b32 v8, v[6:7], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[4:5], v8, off
	v_add_nc_u32_e32 v4, 0x444000, v0
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	v_mov_b32_e32 v5, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v3, vcc_lo
	v_add_co_u32 v2, vcc_lo, s2, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
	global_load_b32 v8, v[6:7], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[2:3], v8, off
	v_add_nc_u32_e32 v2, 0x460000, v0
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	v_mov_b32_e32 v3, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, s0, v4
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v5, vcc_lo
	v_add_co_u32 v4, vcc_lo, s2, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s3, v5, vcc_lo
	global_load_b32 v8, v[6:7], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[4:5], v8, off
	v_add_nc_u32_e32 v4, 0x47c000, v0
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	v_mov_b32_e32 v5, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v3, vcc_lo
	v_add_co_u32 v2, vcc_lo, s2, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
	global_load_b32 v8, v[6:7], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[2:3], v8, off
	v_add_nc_u32_e32 v2, 0x498000, v0
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	v_mov_b32_e32 v3, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, s0, v4
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v5, vcc_lo
	v_add_co_u32 v4, vcc_lo, s2, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s3, v5, vcc_lo
	global_load_b32 v8, v[6:7], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[4:5], v8, off
	v_add_nc_u32_e32 v4, 0x4b4000, v0
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	v_mov_b32_e32 v5, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v3, vcc_lo
	v_add_co_u32 v2, vcc_lo, s2, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
	global_load_b32 v8, v[6:7], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[2:3], v8, off
	v_add_nc_u32_e32 v2, 0x4d0000, v0
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	v_mov_b32_e32 v3, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, s0, v4
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v5, vcc_lo
	v_add_co_u32 v4, vcc_lo, s2, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s3, v5, vcc_lo
	global_load_b32 v8, v[6:7], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[4:5], v8, off
	v_add_nc_u32_e32 v4, 0x4ec000, v0
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	v_mov_b32_e32 v5, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v3, vcc_lo
	v_add_co_u32 v2, vcc_lo, s2, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
	global_load_b32 v8, v[6:7], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[2:3], v8, off
	v_add_nc_u32_e32 v2, 0x508000, v0
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	v_mov_b32_e32 v3, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, s0, v4
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v5, vcc_lo
	v_add_co_u32 v4, vcc_lo, s2, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s3, v5, vcc_lo
	global_load_b32 v8, v[6:7], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[4:5], v8, off
	v_add_nc_u32_e32 v4, 0x524000, v0
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	v_mov_b32_e32 v5, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v3, vcc_lo
	v_add_co_u32 v2, vcc_lo, s2, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
	global_load_b32 v8, v[6:7], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[2:3], v8, off
	v_add_nc_u32_e32 v2, 0x540000, v0
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	v_mov_b32_e32 v3, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, s0, v4
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v5, vcc_lo
	v_add_co_u32 v4, vcc_lo, s2, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s3, v5, vcc_lo
	global_load_b32 v8, v[6:7], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[4:5], v8, off
	v_add_nc_u32_e32 v4, 0x55c000, v0
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	v_mov_b32_e32 v5, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v3, vcc_lo
	v_add_co_u32 v2, vcc_lo, s2, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
	global_load_b32 v8, v[6:7], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[2:3], v8, off
	v_add_nc_u32_e32 v2, 0x578000, v0
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	v_mov_b32_e32 v3, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, s0, v4
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v5, vcc_lo
	v_add_co_u32 v4, vcc_lo, s2, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s3, v5, vcc_lo
	global_load_b32 v8, v[6:7], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[4:5], v8, off
	v_add_nc_u32_e32 v4, 0x594000, v0
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	v_mov_b32_e32 v5, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v3, vcc_lo
	v_add_co_u32 v2, vcc_lo, s2, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
	global_load_b32 v8, v[6:7], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[2:3], v8, off
	v_add_nc_u32_e32 v2, 0x5b0000, v0
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	v_mov_b32_e32 v3, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, s0, v4
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v5, vcc_lo
	v_add_co_u32 v4, vcc_lo, s2, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s3, v5, vcc_lo
	global_load_b32 v8, v[6:7], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[4:5], v8, off
	v_add_nc_u32_e32 v4, 0x5cc000, v0
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	v_mov_b32_e32 v5, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v3, vcc_lo
	v_add_co_u32 v2, vcc_lo, s2, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
	global_load_b32 v8, v[6:7], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[2:3], v8, off
	v_add_nc_u32_e32 v2, 0x5e8000, v0
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	v_mov_b32_e32 v3, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, s0, v4
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v5, vcc_lo
	v_add_co_u32 v4, vcc_lo, s2, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s3, v5, vcc_lo
	global_load_b32 v8, v[6:7], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[4:5], v8, off
	v_add_nc_u32_e32 v4, 0x604000, v0
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	v_mov_b32_e32 v5, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v3, vcc_lo
	v_add_co_u32 v2, vcc_lo, s2, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
	global_load_b32 v8, v[6:7], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[2:3], v8, off
	v_add_nc_u32_e32 v2, 0x620000, v0
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	v_mov_b32_e32 v3, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, s0, v4
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v5, vcc_lo
	v_add_co_u32 v4, vcc_lo, s2, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s3, v5, vcc_lo
	global_load_b32 v8, v[6:7], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[4:5], v8, off
	v_add_nc_u32_e32 v4, 0x63c000, v0
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	v_mov_b32_e32 v5, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v3, vcc_lo
	v_add_co_u32 v2, vcc_lo, s2, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
	global_load_b32 v8, v[6:7], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[2:3], v8, off
	v_add_nc_u32_e32 v2, 0x658000, v0
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	v_mov_b32_e32 v3, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, s0, v4
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v5, vcc_lo
	v_add_co_u32 v4, vcc_lo, s2, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s3, v5, vcc_lo
	global_load_b32 v8, v[6:7], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[4:5], v8, off
	v_add_nc_u32_e32 v4, 0x674000, v0
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	v_mov_b32_e32 v5, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v3, vcc_lo
	v_add_co_u32 v2, vcc_lo, s2, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
	global_load_b32 v8, v[6:7], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[2:3], v8, off
	v_add_nc_u32_e32 v2, 0x690000, v0
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	v_mov_b32_e32 v3, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, s0, v4
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v5, vcc_lo
	v_add_co_u32 v4, vcc_lo, s2, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s3, v5, vcc_lo
	global_load_b32 v8, v[6:7], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[4:5], v8, off
	v_add_nc_u32_e32 v4, 0x6ac000, v0
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	v_mov_b32_e32 v5, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v3, vcc_lo
	v_add_co_u32 v2, vcc_lo, s2, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
	global_load_b32 v8, v[6:7], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[2:3], v8, off
	v_add_nc_u32_e32 v2, 0x6c8000, v0
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	v_dual_mov_b32 v3, v1 :: v_dual_add_nc_u32 v0, 0x6e4000, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, s0, v4
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	v_add_co_u32 v4, vcc_lo, s2, v4
	global_load_b32 v8, v[6:7], off
	v_add_co_ci_u32_e32 v5, vcc_lo, s3, v5, vcc_lo
	v_add_co_u32 v6, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v3, vcc_lo
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	v_add_co_u32 v2, vcc_lo, s2, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[4:5], v8, off
	global_load_b32 v6, v[6:7], off
	v_add_co_u32 v4, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[2:3], v6, off
	global_load_b32 v2, v[4:5], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[0:1], v2, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z7bwbenchPjS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 16
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z7bwbenchPjS_, .Lfunc_end0-_Z7bwbenchPjS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 4372
; NumSgprs: 18
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 16
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z7bwbenchPjS_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z7bwbenchPjS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     9
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
