#include <cuda_runtime_api.h>

__global__ void image3_crop(
    const float *in_pixels,
    int in_width,
    int in_height,
    int channels,
    int x_offset,
    int y_offset,
    float *out_pixels,
    int crop_width,
    int crop_height)
{
  int idx = threadIdx.x + blockIdx.x * blockDim.x;
  int x = idx % crop_width;
  int y = (idx / crop_width) % crop_height;
  int c = idx / (crop_width * crop_height);

  if ((x < crop_width) && (y < crop_height) && (c < channels)) {
    int in_idx = x_offset + x + (y_offset + y) * in_width + c * in_width * in_height;
    int out_idx = x + y * crop_width + c * crop_width * crop_height;

    out_pixels[out_idx] = in_pixels[in_idx];
  }
}

extern "C" void rembrandt_kernel_image3_crop(
    const float *in_pixels,
    int in_width,
    int in_height,
    int channels,
    int x_offset,
    int y_offset,
    float *out_pixels,
    int crop_width,
    int crop_height,
    cudaStream_t stream)
{
  int n = crop_width * crop_height * channels;
  image3_crop<<<(n+1024-1)/1024, 1024, 0, stream>>>(
      in_pixels,
      in_width,
      in_height,
      channels,
      x_offset,
      y_offset,
      out_pixels,
      crop_width,
      crop_height);
}

__global__ void batch_image3_crop(
    const float *in_pixels,
    int in_stride,
    int batch_size,
    const int *in_widths,
    const int *in_heights,
    int channels,
    const int *in_x_offsets,
    const int *in_y_offsets,
    float *out_pixels,
    int crop_width,
    int crop_height)
{
  int idx = threadIdx.x + blockIdx.x * blockDim.x;
  int x = idx % crop_width;
  int y = (idx / crop_width) % crop_height;
  int c = (idx / (crop_width * crop_height)) % channels;
  int batch_idx = idx / (crop_width * crop_height * channels);

  if ((x < crop_width) && (y < crop_height) && (c < channels) && (batch_idx < batch_size)) {
    int in_width = in_widths[batch_idx];
    int in_height = in_heights[batch_idx];
    int x_offset = in_x_offsets[batch_idx];
    int y_offset = in_y_offsets[batch_idx];

    int in_idx = x_offset + x + (y_offset + y) * in_width + c * in_width * in_height + batch_idx * in_stride;
    int out_idx = x + y * crop_width + c * crop_width * crop_height + batch_idx * crop_width * crop_height * channels;

    out_pixels[out_idx] = in_pixels[in_idx];
  }
}

extern "C" void rembrandt_kernel_batch_image3_crop(
    const float *in_pixels,
    int in_stride,
    int batch_size,
    const int *in_widths,
    const int *in_heights,
    int channels,
    const int *in_x_offsets,
    const int *in_y_offsets,
    float *out_pixels,
    int crop_width,
    int crop_height,
    cudaStream_t stream)
{
  int n = crop_width * crop_height * channels * batch_size;
  batch_image3_crop<<<(n+1024-1)/1024, 1024, 0, stream>>>(
      in_pixels,
      in_stride,
      batch_size,
      in_widths,
      in_heights,
      channels,
      in_x_offsets,
      in_y_offsets,
      out_pixels,
      crop_width,
      crop_height);
}

	.file	"tmpxft_00272a61_00000000-6_batch_image_kernels.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2012:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2012:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z41__device_stub__Z11image3_cropPKfiiiiiPfiiPKfiiiiiPfii
	.type	_Z41__device_stub__Z11image3_cropPKfiiiiiPfiiPKfiiiiiPfii, @function
_Z41__device_stub__Z11image3_cropPKfiiiiiPfiiPKfiiiiiPfii:
.LFB2034:
	.cfi_startproc
	endbr64
	subq	$200, %rsp
	.cfi_def_cfa_offset 208
	movq	208(%rsp), %rax
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movl	%esi, 36(%rsp)
	leaq	76(%rsp), %rsi
	movl	%edx, 32(%rsp)
	leaq	48(%rsp), %rdx
	movl	%ecx, 28(%rsp)
	leaq	56(%rsp), %rcx
	movl	%r8d, 24(%rsp)
	movl	%r9d, 20(%rsp)
	movq	%rax, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 184(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	36(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	28(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	216(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	224(%rsp), %rax
	movq	%rax, 176(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	56(%rsp)
	.cfi_def_cfa_offset 216
	leaq	_Z11image3_cropPKfiiiiiPfii(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 224
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 216
	popq	%rdx
	.cfi_def_cfa_offset 208
.L2:
	movq	184(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$200, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2034:
	.size	_Z41__device_stub__Z11image3_cropPKfiiiiiPfiiPKfiiiiiPfii, .-_Z41__device_stub__Z11image3_cropPKfiiiiiPfiiPKfiiiiiPfii
	.globl	_Z11image3_cropPKfiiiiiPfii
	.type	_Z11image3_cropPKfiiiiiPfii, @function
_Z11image3_cropPKfiiiiiPfii:
.LFB2035:
	.cfi_startproc
	endbr64
	jmp	_Z41__device_stub__Z11image3_cropPKfiiiiiPfiiPKfiiiiiPfii
	.cfi_endproc
.LFE2035:
	.size	_Z11image3_cropPKfiiiiiPfii, .-_Z11image3_cropPKfiiiiiPfii
	.globl	rembrandt_kernel_image3_crop
	.type	rembrandt_kernel_image3_crop, @function
rembrandt_kernel_image3_crop:
.LFB2008:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movl	%r9d, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movl	%r8d, %r13d
	xorl	%r8d, %r8d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%ecx, %ebx
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	movl	120(%rsp), %r15d
	movl	128(%rsp), %r12d
	movl	%edx, 12(%rsp)
	movq	%rdi, (%rsp)
	movq	136(%rsp), %r9
	movl	%r15d, %eax
	movl	%esi, 8(%rsp)
	movq	112(%rsp), %rbp
	imull	%r12d, %eax
	imull	%ecx, %eax
	movl	$1024, %ecx
	addl	$1023, %eax
	cltd
	idivl	%ecx
	movl	$4194305, %edx
	movl	$1, %ecx
	salq	$10, %rdx
	movl	%eax, 24(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 28(%rsp)
	movq	24(%rsp), %rdi
	movl	32(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	movl	%r12d, 128(%rsp)
	movl	%r14d, %r9d
	movl	%r13d, %r8d
	movl	%ebx, %ecx
	movl	12(%rsp), %edx
	movl	8(%rsp), %esi
	movl	%r15d, 120(%rsp)
	movq	%rbp, 112(%rsp)
	movq	(%rsp), %rdi
	addq	$56, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z41__device_stub__Z11image3_cropPKfiiiiiPfiiPKfiiiiiPfii
.L8:
	.cfi_restore_state
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2008:
	.size	rembrandt_kernel_image3_crop, .-rembrandt_kernel_image3_crop
	.globl	_Z57__device_stub__Z17batch_image3_cropPKfiiPKiS2_iS2_S2_PfiiPKfiiPKiS2_iS2_S2_Pfii
	.type	_Z57__device_stub__Z17batch_image3_cropPKfiiPKiS2_iS2_S2_PfiiPKfiiPKiS2_iS2_S2_Pfii, @function
_Z57__device_stub__Z17batch_image3_cropPKfiiPKiS2_iS2_S2_PfiiPKfiiPKiS2_iS2_S2_Pfii:
.LFB2036:
	.cfi_startproc
	endbr64
	subq	$232, %rsp
	.cfi_def_cfa_offset 240
	movq	240(%rsp), %rax
	movq	%rdi, 56(%rsp)
	leaq	80(%rsp), %rdi
	movl	%esi, 52(%rsp)
	leaq	92(%rsp), %rsi
	movq	%rax, 16(%rsp)
	movq	248(%rsp), %rax
	movl	%edx, 48(%rsp)
	leaq	64(%rsp), %rdx
	movq	%rax, 8(%rsp)
	movq	256(%rsp), %rax
	movq	%rcx, 40(%rsp)
	leaq	72(%rsp), %rcx
	movq	%r8, 32(%rsp)
	movl	%r9d, 28(%rsp)
	movq	%rax, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 216(%rsp)
	xorl	%eax, %eax
	leaq	56(%rsp), %rax
	movl	$1, 88(%rsp)
	movq	%rax, 128(%rsp)
	leaq	52(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	28(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 176(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 184(%rsp)
	movq	%rsp, %rax
	movq	%rax, 192(%rsp)
	leaq	264(%rsp), %rax
	movq	%rax, 200(%rsp)
	leaq	272(%rsp), %rax
	movq	%rax, 208(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 80(%rsp)
	movq	%rax, 92(%rsp)
	movl	$1, 100(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L11
	pushq	72(%rsp)
	.cfi_def_cfa_offset 248
	leaq	_Z17batch_image3_cropPKfiiPKiS2_iS2_S2_Pfii(%rip), %rdi
	pushq	72(%rsp)
	.cfi_def_cfa_offset 256
	movq	108(%rsp), %rcx
	movl	116(%rsp), %r8d
	movq	96(%rsp), %rsi
	movl	104(%rsp), %edx
	leaq	144(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 248
	popq	%rdx
	.cfi_def_cfa_offset 240
.L11:
	movq	216(%rsp), %rax
	subq	%fs:40, %rax
	je	.L13
	call	__stack_chk_fail@PLT
.L13:
	addq	$232, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2036:
	.size	_Z57__device_stub__Z17batch_image3_cropPKfiiPKiS2_iS2_S2_PfiiPKfiiPKiS2_iS2_S2_Pfii, .-_Z57__device_stub__Z17batch_image3_cropPKfiiPKiS2_iS2_S2_PfiiPKfiiPKiS2_iS2_S2_Pfii
	.globl	_Z17batch_image3_cropPKfiiPKiS2_iS2_S2_Pfii
	.type	_Z17batch_image3_cropPKfiiPKiS2_iS2_S2_Pfii, @function
_Z17batch_image3_cropPKfiiPKiS2_iS2_S2_Pfii:
.LFB2037:
	.cfi_startproc
	endbr64
	jmp	_Z57__device_stub__Z17batch_image3_cropPKfiiPKiS2_iS2_S2_PfiiPKfiiPKiS2_iS2_S2_Pfii
	.cfi_endproc
.LFE2037:
	.size	_Z17batch_image3_cropPKfiiPKiS2_iS2_S2_Pfii, .-_Z17batch_image3_cropPKfiiPKiS2_iS2_S2_Pfii
	.globl	rembrandt_kernel_batch_image3_crop
	.type	rembrandt_kernel_batch_image3_crop, @function
rembrandt_kernel_batch_image3_crop:
.LFB2009:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movl	%r9d, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%edx, %ebx
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	movl	168(%rsp), %r13d
	movl	176(%rsp), %r14d
	movq	%rcx, 24(%rsp)
	movl	$1024, %ecx
	movq	160(%rsp), %r11
	movq	%rdi, 8(%rsp)
	movl	%r13d, %eax
	movl	%esi, 20(%rsp)
	movq	144(%rsp), %r15
	imull	%r14d, %eax
	movq	%r8, 32(%rsp)
	xorl	%r8d, %r8d
	movq	152(%rsp), %r12
	movq	%r11, 40(%rsp)
	imull	%r9d, %eax
	movq	184(%rsp), %r9
	imull	%edx, %eax
	addl	$1023, %eax
	cltd
	idivl	%ecx
	movl	$4194305, %edx
	movl	$1, %ecx
	salq	$10, %rdx
	movl	%eax, 56(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 60(%rsp)
	movq	56(%rsp), %rdi
	movl	64(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	movq	40(%rsp), %r11
	testl	%eax, %eax
	jne	.L16
	movl	%r14d, 176(%rsp)
	movq	32(%rsp), %r8
	movl	%ebp, %r9d
	movl	%ebx, %edx
	movl	%r13d, 168(%rsp)
	movq	24(%rsp), %rcx
	movq	%r12, 152(%rsp)
	movl	20(%rsp), %esi
	movq	%r15, 144(%rsp)
	movq	8(%rsp), %rdi
	movq	%r11, 160(%rsp)
	addq	$88, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z57__device_stub__Z17batch_image3_cropPKfiiPKiS2_iS2_S2_PfiiPKfiiPKiS2_iS2_S2_Pfii
.L16:
	.cfi_restore_state
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2009:
	.size	rembrandt_kernel_batch_image3_crop, .-rembrandt_kernel_batch_image3_crop
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z17batch_image3_cropPKfiiPKiS2_iS2_S2_Pfii"
.LC1:
	.string	"_Z11image3_cropPKfiiiiiPfii"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2039:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z17batch_image3_cropPKfiiPKiS2_iS2_S2_Pfii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC1(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z11image3_cropPKfiiiiiPfii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2039:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <hip/hip_runtime_api.h>

__global__ void image3_crop(
    const float *in_pixels,
    int in_width,
    int in_height,
    int channels,
    int x_offset,
    int y_offset,
    float *out_pixels,
    int crop_width,
    int crop_height)
{
  int idx = threadIdx.x + blockIdx.x * blockDim.x;
  int x = idx % crop_width;
  int y = (idx / crop_width) % crop_height;
  int c = idx / (crop_width * crop_height);

  if ((x < crop_width) && (y < crop_height) && (c < channels)) {
    int in_idx = x_offset + x + (y_offset + y) * in_width + c * in_width * in_height;
    int out_idx = x + y * crop_width + c * crop_width * crop_height;

    out_pixels[out_idx] = in_pixels[in_idx];
  }
}

extern "C" void rembrandt_kernel_image3_crop(
    const float *in_pixels,
    int in_width,
    int in_height,
    int channels,
    int x_offset,
    int y_offset,
    float *out_pixels,
    int crop_width,
    int crop_height,
    hipStream_t stream)
{
  int n = crop_width * crop_height * channels;
  image3_crop<<<(n+1024-1)/1024, 1024, 0, stream>>>(
      in_pixels,
      in_width,
      in_height,
      channels,
      x_offset,
      y_offset,
      out_pixels,
      crop_width,
      crop_height);
}

__global__ void batch_image3_crop(
    const float *in_pixels,
    int in_stride,
    int batch_size,
    const int *in_widths,
    const int *in_heights,
    int channels,
    const int *in_x_offsets,
    const int *in_y_offsets,
    float *out_pixels,
    int crop_width,
    int crop_height)
{
  int idx = threadIdx.x + blockIdx.x * blockDim.x;
  int x = idx % crop_width;
  int y = (idx / crop_width) % crop_height;
  int c = (idx / (crop_width * crop_height)) % channels;
  int batch_idx = idx / (crop_width * crop_height * channels);

  if ((x < crop_width) && (y < crop_height) && (c < channels) && (batch_idx < batch_size)) {
    int in_width = in_widths[batch_idx];
    int in_height = in_heights[batch_idx];
    int x_offset = in_x_offsets[batch_idx];
    int y_offset = in_y_offsets[batch_idx];

    int in_idx = x_offset + x + (y_offset + y) * in_width + c * in_width * in_height + batch_idx * in_stride;
    int out_idx = x + y * crop_width + c * crop_width * crop_height + batch_idx * crop_width * crop_height * channels;

    out_pixels[out_idx] = in_pixels[in_idx];
  }
}

extern "C" void rembrandt_kernel_batch_image3_crop(
    const float *in_pixels,
    int in_stride,
    int batch_size,
    const int *in_widths,
    const int *in_heights,
    int channels,
    const int *in_x_offsets,
    const int *in_y_offsets,
    float *out_pixels,
    int crop_width,
    int crop_height,
    hipStream_t stream)
{
  int n = crop_width * crop_height * channels * batch_size;
  batch_image3_crop<<<(n+1024-1)/1024, 1024, 0, stream>>>(
      in_pixels,
      in_stride,
      batch_size,
      in_widths,
      in_heights,
      channels,
      in_x_offsets,
      in_y_offsets,
      out_pixels,
      crop_width,
      crop_height);
}

	.text
	.file	"batch_image_kernels.hip"
	.globl	_Z26__device_stub__image3_cropPKfiiiiiPfii # -- Begin function _Z26__device_stub__image3_cropPKfiiiiiPfii
	.type	_Z26__device_stub__image3_cropPKfiiiiiPfii,@function
_Z26__device_stub__image3_cropPKfiiiiiPfii: # @_Z26__device_stub__image3_cropPKfiiiiiPfii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	20(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	16(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	12(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	8(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	4(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	216(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	224(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11image3_cropPKfiiiiiPfii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z26__device_stub__image3_cropPKfiiiiiPfii, .Lfunc_end0-_Z26__device_stub__image3_cropPKfiiiiiPfii
	.cfi_endproc
                                        # -- End function
	.globl	rembrandt_kernel_image3_crop    # -- Begin function rembrandt_kernel_image3_crop
	.type	rembrandt_kernel_image3_crop,@function
rembrandt_kernel_image3_crop:           # @rembrandt_kernel_image3_crop
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r9d, %ebx
	movl	%r8d, %ebp
	movl	%ecx, %r14d
	movl	%edx, %r15d
	movl	%esi, %r12d
	movq	%rdi, %r13
	movq	88(%rsp), %r9
	movl	72(%rsp), %edi
	imull	%ecx, %edi
	imull	80(%rsp), %edi
	leal	1023(%rdi), %eax
	addl	$2046, %edi                     # imm = 0x7FE
	testl	%eax, %eax
	cmovnsl	%eax, %edi
	sarl	$10, %edi
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$1024, %rdx                     # imm = 0x400
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	je	.LBB1_2
# %bb.1:
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB1_2:
	.cfi_def_cfa_offset 64
	movq	%r13, %rdi
	movl	%r12d, %esi
	movl	%r15d, %edx
	movl	%r14d, %ecx
	movl	%ebp, %r8d
	movl	%ebx, %r9d
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z26__device_stub__image3_cropPKfiiiiiPfii # TAILCALL
.Lfunc_end1:
	.size	rembrandt_kernel_image3_crop, .Lfunc_end1-rembrandt_kernel_image3_crop
	.cfi_endproc
                                        # -- End function
	.globl	_Z32__device_stub__batch_image3_cropPKfiiPKiS2_iS2_S2_Pfii # -- Begin function _Z32__device_stub__batch_image3_cropPKfiiPKiS2_iS2_S2_Pfii
	.type	_Z32__device_stub__batch_image3_cropPKfiiPKiS2_iS2_S2_Pfii,@function
_Z32__device_stub__batch_image3_cropPKfiiPKiS2_iS2_S2_Pfii: # @_Z32__device_stub__batch_image3_cropPKfiiPKiS2_iS2_S2_Pfii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$192, %rsp
	.cfi_def_cfa_offset 240
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	20(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	16(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	48(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	40(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	240(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	248(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	256(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	264(%rsp), %rax
	movq	%rax, 72(%rbx)
	leaq	272(%rsp), %rax
	movq	%rax, 80(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z17batch_image3_cropPKfiiPKiS2_iS2_S2_Pfii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$208, %rsp
	.cfi_adjust_cfa_offset -208
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z32__device_stub__batch_image3_cropPKfiiPKiS2_iS2_S2_Pfii, .Lfunc_end2-_Z32__device_stub__batch_image3_cropPKfiiPKiS2_iS2_S2_Pfii
	.cfi_endproc
                                        # -- End function
	.globl	rembrandt_kernel_batch_image3_crop # -- Begin function rembrandt_kernel_batch_image3_crop
	.type	rembrandt_kernel_batch_image3_crop,@function
rembrandt_kernel_batch_image3_crop:     # @rembrandt_kernel_batch_image3_crop
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r9d, %ebx
	movq	%r8, %r14
	movq	%rcx, %r15
	movl	%edx, %ebp
	movl	%esi, %r12d
	movq	%rdi, %r13
	movl	%r9d, %edi
	imull	%edx, %edi
	imull	88(%rsp), %edi
	movq	104(%rsp), %r9
	imull	96(%rsp), %edi
	leal	1023(%rdi), %eax
	addl	$2046, %edi                     # imm = 0x7FE
	testl	%eax, %eax
	cmovnsl	%eax, %edi
	sarl	$10, %edi
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$1024, %rdx                     # imm = 0x400
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	je	.LBB3_2
# %bb.1:
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB3_2:
	.cfi_def_cfa_offset 64
	movq	%r13, %rdi
	movl	%r12d, %esi
	movl	%ebp, %edx
	movq	%r15, %rcx
	movq	%r14, %r8
	movl	%ebx, %r9d
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z32__device_stub__batch_image3_cropPKfiiPKiS2_iS2_S2_Pfii # TAILCALL
.Lfunc_end3:
	.size	rembrandt_kernel_batch_image3_crop, .Lfunc_end3-rembrandt_kernel_batch_image3_crop
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB4_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB4_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11image3_cropPKfiiiiiPfii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z17batch_image3_cropPKfiiPKiS2_iS2_S2_Pfii, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end4:
	.size	__hip_module_ctor, .Lfunc_end4-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB5_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB5_2:
	retq
.Lfunc_end5:
	.size	__hip_module_dtor, .Lfunc_end5-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z11image3_cropPKfiiiiiPfii,@object # @_Z11image3_cropPKfiiiiiPfii
	.section	.rodata,"a",@progbits
	.globl	_Z11image3_cropPKfiiiiiPfii
	.p2align	3, 0x0
_Z11image3_cropPKfiiiiiPfii:
	.quad	_Z26__device_stub__image3_cropPKfiiiiiPfii
	.size	_Z11image3_cropPKfiiiiiPfii, 8

	.type	_Z17batch_image3_cropPKfiiPKiS2_iS2_S2_Pfii,@object # @_Z17batch_image3_cropPKfiiPKiS2_iS2_S2_Pfii
	.globl	_Z17batch_image3_cropPKfiiPKiS2_iS2_S2_Pfii
	.p2align	3, 0x0
_Z17batch_image3_cropPKfiiPKiS2_iS2_S2_Pfii:
	.quad	_Z32__device_stub__batch_image3_cropPKfiiPKiS2_iS2_S2_Pfii
	.size	_Z17batch_image3_cropPKfiiPKiS2_iS2_S2_Pfii, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z11image3_cropPKfiiiiiPfii"
	.size	.L__unnamed_1, 28

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z17batch_image3_cropPKfiiPKiS2_iS2_S2_Pfii"
	.size	.L__unnamed_2, 44

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z26__device_stub__image3_cropPKfiiiiiPfii
	.addrsig_sym _Z32__device_stub__batch_image3_cropPKfiiPKiS2_iS2_S2_Pfii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z11image3_cropPKfiiiiiPfii
	.addrsig_sym _Z17batch_image3_cropPKfiiPKiS2_iS2_S2_Pfii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z11image3_cropPKfiiiiiPfii ; -- Begin function _Z11image3_cropPKfiiiiiPfii
	.globl	_Z11image3_cropPKfiiiiiPfii
	.p2align	8
	.type	_Z11image3_cropPKfiiiiiPfii,@function
_Z11image3_cropPKfiiiiiPfii:            ; @_Z11image3_cropPKfiiiiiPfii
; %bb.0:
	s_load_b64 s[2:3], s[0:1], 0x28
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s4, s3, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_ashr_i32 s8, s4, 31
	s_add_i32 s4, s4, s8
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_xor_b32 s9, s4, s8
	s_load_b32 s4, s[0:1], 0x3c
	v_cvt_f32_u32_e32 v1, s9
	v_rcp_iflag_f32_e32 v1, v1
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v1, 0x4f7ffffe, v1
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(VALU_DEP_1)
	v_cvt_u32_f32_e32 v4, v1
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	s_sub_i32 s4, 0, s9
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_mul_lo_u32 v0, s4, v4
	s_load_b128 s[4:7], s[0:1], 0x8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v2, 31, v1
	v_mul_hi_u32 v0, v4, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v3, v1, v2
	v_xor_b32_e32 v3, v3, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v0, v4, v0
	v_mul_hi_u32 v0, v3, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v4, v0, s9
	v_sub_nc_u32_e32 v4, v3, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_subrev_nc_u32_e32 v6, s9, v4
	v_cmp_le_u32_e32 vcc_lo, s9, v4
	v_dual_cndmask_b32 v4, v4, v6 :: v_dual_add_nc_u32 v5, 1, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v0, v0, v5, vcc_lo
	v_xor_b32_e32 v6, s8, v2
	s_or_b32 s8, s3, s2
	v_cmp_le_u32_e32 vcc_lo, s9, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v5, 1, v0
	s_cmp_gt_i32 s8, -1
	v_cndmask_b32_e32 v0, v0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v0, v0, v6
	v_sub_nc_u32_e32 v0, v0, v6
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_gt_i32_e32 vcc_lo, s6, v0
	s_cselect_b32 s6, -1, 0
	s_and_b32 s6, s6, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s8, s6
	s_cbranch_execz .LBB0_2
; %bb.1:
	s_ashr_i32 s6, s2, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_add_i32 s8, s2, s6
	v_xor_b32_e32 v2, s6, v2
	s_xor_b32 s8, s8, s6
	v_cvt_f32_u32_e32 v4, s8
	s_sub_i32 s9, 0, s8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v4, v4
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v4, 0x4f7ffffe, v4
	v_cvt_u32_f32_e32 v4, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_mul_lo_u32 v5, s9, v4
	s_ashr_i32 s9, s3, 31
	s_add_i32 s10, s3, s9
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_xor_b32 s9, s10, s9
	v_cvt_f32_u32_e32 v6, s9
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v5, v4, v5
	s_sub_i32 s6, 0, s9
	v_rcp_iflag_f32_e32 v6, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v4, v4, v5
	v_mul_hi_u32 v4, v3, v4
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v6, 0x4f7ffffe, v6
	v_mul_lo_u32 v5, v4, s8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v3, v3, v5
	v_add_nc_u32_e32 v5, 1, v4
	v_subrev_nc_u32_e32 v7, s8, v3
	v_cmp_le_u32_e32 vcc_lo, s8, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v4, v4, v5 :: v_dual_cndmask_b32 v3, v3, v7
	v_add_nc_u32_e32 v5, 1, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_le_u32_e32 vcc_lo, s8, v3
	v_cndmask_b32_e32 v3, v4, v5, vcc_lo
	v_cvt_u32_f32_e32 v4, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v3, v3, v2
	v_mul_lo_u32 v5, s6, v4
	s_load_b32 s6, s[0:1], 0x18
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v3, v3, v2
	v_mul_hi_u32 v5, v4, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v2, 31, v3
	v_add_nc_u32_e32 v6, v3, v2
	v_mul_lo_u32 v3, v3, s2
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v4, v4, v5
	v_xor_b32_e32 v5, v6, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v1, v1, v3
	v_mul_hi_u32 v4, v5, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v4, v4, s9
	v_sub_nc_u32_e32 v4, v5, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_subrev_nc_u32_e32 v5, s9, v4
	v_cmp_le_u32_e32 vcc_lo, s9, v4
	v_cndmask_b32_e32 v4, v4, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_subrev_nc_u32_e32 v5, s9, v4
	v_cmp_le_u32_e32 vcc_lo, s9, v4
	s_clause 0x1
	s_load_b64 s[8:9], s[0:1], 0x20
	s_load_b64 s[0:1], s[0:1], 0x0
	v_cndmask_b32_e32 v4, v4, v5, vcc_lo
	v_mul_lo_u32 v5, v0, s5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v4, v4, v2
	v_sub_nc_u32_e32 v2, v4, v2
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v4, v5, s6, v2
	v_mul_lo_u32 v4, v4, s4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v3, v1, s7, v4
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, vcc_lo, s0, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
	global_load_b32 v6, v[3:4], off
	v_mad_u64_u32 v[3:4], null, v0, s3, v[2:3]
	v_mad_u64_u32 v[4:5], null, v3, s2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v5, 31, v4
	v_lshlrev_b64 v[0:1], 2, v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s8, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s9, v1, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[0:1], v6, off
.LBB0_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11image3_cropPKfiiiiiPfii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z11image3_cropPKfiiiiiPfii, .Lfunc_end0-_Z11image3_cropPKfiiiiiPfii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 792
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z17batch_image3_cropPKfiiPKiS2_iS2_S2_Pfii ; -- Begin function _Z17batch_image3_cropPKfiiPKiS2_iS2_S2_Pfii
	.globl	_Z17batch_image3_cropPKfiiPKiS2_iS2_S2_Pfii
	.p2align	8
	.type	_Z17batch_image3_cropPKfiiPKiS2_iS2_S2_Pfii,@function
_Z17batch_image3_cropPKfiiPKiS2_iS2_S2_Pfii: ; @_Z17batch_image3_cropPKfiiPKiS2_iS2_S2_Pfii
; %bb.0:
	s_clause 0x2
	s_load_b64 s[12:13], s[0:1], 0x40
	s_load_b32 s3, s[0:1], 0x20
	s_load_b32 s4, s[0:1], 0x54
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s2, s13, s12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_mul_i32 s5, s2, s3
	s_and_b32 s4, s4, 0xffff
	s_ashr_i32 s6, s5, 31
	s_add_i32 s5, s5, s6
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_xor_b32 s5, s5, s6
	v_cvt_f32_u32_e32 v1, s5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v1, v1
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v1, 0x4f7ffffe, v1
	v_cvt_u32_f32_e32 v3, v1
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	s_sub_i32 s4, 0, s5
	s_load_b64 s[14:15], s[0:1], 0x8
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_mul_lo_u32 v0, s4, v3
	s_or_b32 s4, s12, s3
	s_or_b32 s4, s4, s13
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v4, 31, v1
	s_cmp_gt_i32 s4, -1
	s_cselect_b32 s4, -1, 0
	v_mul_hi_u32 v2, v3, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v0, v1, v4
	v_xor_b32_e32 v0, v0, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v2, v3, v2
	v_mul_hi_u32 v2, v0, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v3, v2, s5
	v_add_nc_u32_e32 v5, 1, v2
	v_sub_nc_u32_e32 v3, v0, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_subrev_nc_u32_e32 v6, s5, v3
	v_cmp_le_u32_e32 vcc_lo, s5, v3
	v_dual_cndmask_b32 v3, v3, v6 :: v_dual_cndmask_b32 v2, v2, v5
	v_xor_b32_e32 v6, s6, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_le_u32_e32 vcc_lo, s5, v3
	v_add_nc_u32_e32 v5, 1, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v2, v2, v5, vcc_lo
	v_xor_b32_e32 v2, v2, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v2, v2, v6
	s_waitcnt lgkmcnt(0)
	v_cmp_gt_i32_e32 vcc_lo, s15, v2
	s_and_b32 s4, s4, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s5, s4
	s_cbranch_execz .LBB1_2
; %bb.1:
	s_clause 0x1
	s_load_b128 s[8:11], s[0:1], 0x10
	s_load_b128 s[4:7], s[0:1], 0x28
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v7, vcc_lo, s10, v5
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v8, vcc_lo, s11, v6, vcc_lo
	s_clause 0x1
	s_load_b64 s[10:11], s[0:1], 0x38
	s_load_b64 s[0:1], s[0:1], 0x0
	global_load_b32 v3, v[7:8], off
	v_add_co_u32 v7, vcc_lo, s6, v5
	v_add_co_ci_u32_e32 v8, vcc_lo, s7, v6, vcc_lo
	v_add_co_u32 v9, vcc_lo, s8, v5
	v_add_co_ci_u32_e32 v10, vcc_lo, s9, v6, vcc_lo
	global_load_b32 v7, v[7:8], off
	global_load_b32 v8, v[9:10], off
	v_add_co_u32 v5, vcc_lo, s4, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, s5, v6, vcc_lo
	s_ashr_i32 s4, s2, 31
	s_ashr_i32 s5, s12, 31
	s_add_i32 s2, s2, s4
	global_load_b32 v6, v[5:6], off
	s_xor_b32 s2, s2, s4
	s_add_i32 s6, s12, s5
	v_cvt_f32_u32_e32 v5, s2
	s_xor_b32 s6, s6, s5
	s_sub_i32 s7, 0, s2
	v_cvt_f32_u32_e32 v9, s6
	s_ashr_i32 s8, s13, 31
	v_rcp_iflag_f32_e32 v5, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_rcp_iflag_f32_e32 v9, v9
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v5, 0x4f7ffffe, v5
	v_mul_f32_e32 v9, 0x4f7ffffe, v9
	v_cvt_u32_f32_e32 v5, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_u32_f32_e32 v9, v9
	v_mul_lo_u32 v10, s7, v5
	s_sub_i32 s7, 0, s6
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_mul_lo_u32 v11, s7, v9
	s_ashr_i32 s7, s3, 31
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v10, v5, v10
	v_mul_hi_u32 v11, v9, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v5, v5, v10
	v_xor_b32_e32 v10, s4, v4
	s_add_i32 s4, s3, s7
	v_add_nc_u32_e32 v9, v9, v11
	s_xor_b32 s4, s4, s7
	v_mul_hi_u32 v5, v0, v5
	v_cvt_f32_u32_e32 v13, s4
	v_xor_b32_e32 v4, s5, v4
	v_mul_hi_u32 v9, v0, v9
	s_add_i32 s5, s13, s8
	s_sub_i32 s7, 0, s4
	s_xor_b32 s5, s5, s8
	v_rcp_iflag_f32_e32 v13, v13
	v_mul_lo_u32 v11, v5, s2
	v_add_nc_u32_e32 v15, 1, v5
	v_cvt_f32_u32_e32 v14, s5
	v_mul_lo_u32 v12, v9, s6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_rcp_iflag_f32_e32 v14, v14
	v_sub_nc_u32_e32 v11, v0, v11
	s_delay_alu instid0(TRANS32_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f32_e32 v13, 0x4f7ffffe, v13
	v_sub_nc_u32_e32 v0, v0, v12
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_subrev_nc_u32_e32 v12, s2, v11
	v_cmp_le_u32_e32 vcc_lo, s2, v11
	v_subrev_nc_u32_e32 v16, s6, v0
	v_cndmask_b32_e32 v5, v5, v15, vcc_lo
	v_add_nc_u32_e32 v15, 1, v9
	v_cndmask_b32_e32 v11, v11, v12, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s6, v0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v12, 1, v5
	v_cmp_le_u32_e64 s2, s2, v11
	v_dual_cndmask_b32 v9, v9, v15 :: v_dual_cndmask_b32 v0, v0, v16
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v5, v5, v12, s2
	v_add_nc_u32_e32 v11, 1, v9
	s_delay_alu instid0(VALU_DEP_3)
	v_cmp_le_u32_e32 vcc_lo, s6, v0
	v_cvt_u32_f32_e32 v12, v13
	v_mul_f32_e32 v13, 0x4f7ffffe, v14
	v_xor_b32_e32 v5, v5, v10
	s_sub_i32 s2, 0, s5
	v_cndmask_b32_e32 v0, v9, v11, vcc_lo
	v_mul_lo_u32 v9, s7, v12
	v_cvt_u32_f32_e32 v11, v13
	v_sub_nc_u32_e32 v5, v5, v10
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_xor_b32_e32 v0, v0, v4
	v_mul_lo_u32 v10, s2, v11
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_ashrrev_i32_e32 v13, 31, v5
	v_mul_hi_u32 v9, v12, v9
	v_sub_nc_u32_e32 v4, v0, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v0, v5, v13
	v_ashrrev_i32_e32 v5, 31, v4
	v_mul_hi_u32 v10, v11, v10
	v_add_nc_u32_e32 v9, v12, v9
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_xor_b32_e32 v0, v0, v13
	v_add_nc_u32_e32 v12, v4, v5
	v_mul_lo_u32 v4, v4, s12
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_mul_hi_u32 v9, v0, v9
	v_add_nc_u32_e32 v10, v11, v10
	v_xor_b32_e32 v11, v12, v5
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v1, v1, v4
	v_mul_hi_u32 v10, v11, v10
	v_mul_lo_u32 v9, v9, s4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v10, v10, s5
	v_sub_nc_u32_e32 v0, v0, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_subrev_nc_u32_e32 v9, s4, v0
	v_cmp_le_u32_e32 vcc_lo, s4, v0
	v_sub_nc_u32_e32 v10, v11, v10
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v0, v0, v9, vcc_lo
	v_subrev_nc_u32_e32 v9, s5, v10
	v_cmp_le_u32_e32 vcc_lo, s5, v10
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_subrev_nc_u32_e32 v11, s4, v0
	v_cndmask_b32_e32 v9, v10, v9, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_subrev_nc_u32_e32 v10, s5, v9
	v_cndmask_b32_e32 v0, v0, v11, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s5, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_xor_b32_e32 v0, v0, v13
	v_cndmask_b32_e32 v9, v9, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v0, v0, v13
	v_xor_b32_e32 v9, v9, v5
	s_waitcnt vmcnt(3)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v10, v3, v0
	v_sub_nc_u32_e32 v3, v9, v5
	v_mad_u64_u32 v[4:5], null, v2, s14, v[1:2]
	s_waitcnt vmcnt(2)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add3_u32 v7, v10, v3, v7
	s_waitcnt vmcnt(1)
	v_mul_lo_u32 v5, v7, v8
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v4, v4, v6, v5
	v_ashrrev_i32_e32 v5, 31, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v4, vcc_lo, s0, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v5, vcc_lo
	global_load_b32 v7, v[4:5], off
	v_mad_u64_u32 v[4:5], null, v2, s3, v[0:1]
	v_mad_u64_u32 v[5:6], null, v4, s13, v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, v5, s12, v[1:2]
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[2:3]
	v_add_co_u32 v0, vcc_lo, s10, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s11, v1, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[0:1], v7, off
.LBB1_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z17batch_image3_cropPKfiiPKiS2_iS2_S2_Pfii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 328
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 17
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z17batch_image3_cropPKfiiPKiS2_iS2_S2_Pfii, .Lfunc_end1-_Z17batch_image3_cropPKfiiPKiS2_iS2_S2_Pfii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1228
; NumSgprs: 18
; NumVgprs: 17
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 17
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .offset:         12
        .size:           4
        .value_kind:     by_value
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .offset:         40
        .size:           4
        .value_kind:     by_value
      - .offset:         44
        .size:           4
        .value_kind:     by_value
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         52
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         60
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         62
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         64
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         66
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         68
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         70
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         112
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 304
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z11image3_cropPKfiiiiiPfii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z11image3_cropPKfiiiiiPfii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     8
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .offset:         12
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         48
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         56
        .size:           8
        .value_kind:     global_buffer
      - .offset:         64
        .size:           4
        .value_kind:     by_value
      - .offset:         68
        .size:           4
        .value_kind:     by_value
      - .offset:         72
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         76
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         80
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         84
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         86
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         88
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         90
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         92
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         94
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         112
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         120
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         128
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         136
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 328
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z17batch_image3_cropPKfiiPKiS2_iS2_S2_Pfii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z17batch_image3_cropPKfiiPKiS2_iS2_S2_Pfii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     17
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
