#include <stdio.h>
#include <malloc.h>
#include <stdlib.h>
#include <math.h>
#include <cuda.h>


void Mul(float *A, float *B, int hA, int wA, int wB, float *C)
{
	int i,j,k;

	for (i=0; i<hA; i++)
		for (j=0; j<wB; j++){
			C[i*wB+j] = 0.0;
			for (k=0; k<wA; k++)
				C[i*wB+j] += A[i*wA+k]*B[k*wB+j];
		}
}

__global__ void MulGpu(float *A, float *B, float *C, int hA, int wA, int wB)
{
	int i = threadIdx.x + blockDim.x * blockIdx.x;
	int j = threadIdx.y + blockDim.y * blockIdx.y;
	if(i < hA && j < wB) for(int k = 0; k < wA ; k++) C[i*wB+j] += A[i*wA+k]*B[k*wB+j];

}

void init_matrix(float *M, int hM, int wM, float k)
{
	int i,j;

	for (i=0; i<hM; i++)
		for (j=0; j<wM; j++)
			if (i==j)
				M[i*wM+j] = k*1.0f;
			else
				M[i*wM+j] = -1.0f/(float)(wM);
}

void print_matrix(float *M, int hM, int wM)
{
	int i,j;

	for (i=0; i<hM; i++){
//		printf("Line %i: ", i);
		for (j=0; j<wM; j++)
			printf("%4.1f ", M[i*wM+j]);
		printf("\n");
	}
}

int diff(float *A, float *B, int hA, int wA, int wB, float *C)
{
	float *C_cpu;
	int size_C = wB * hA;
	C_cpu = (float*)malloc(size_C*sizeof(float));

	int i,j,k;

	for (i=0; i<hA; i++)
		for (j=0; j<wB; j++){
			C_cpu[i*wB+j] = 0.0;
			for (k=0; k<wA; k++){
				C_cpu[i*wB+j] += A[i*wA+k]*B[k*wB+j];
			}
		}
	//printf("\n\nMATRIX C_cpu\n");print_matrix(C_cpu, hA, wB);

	for (i=0; i<hA; i++)
		for (j=0; j<wB; j++)
			if (fabsf(C_cpu[i*wB+j]-C[i*wB+j])>1e-5)
			{
				printf("[%i,%i]: %f!=%f\n", i, j, C_cpu[i*wB+j], C[i*wB+j]);
				return(0);
			}


	return(1);

}

////////////////////////////////////////////////////////////////////////////////
// Program main
////////////////////////////////////////////////////////////////////////////////
int main(int argc, char** argv)
{
	// Matrix variables
	float *A, *B, *C;
	float *A_G, *B_G, *C_G;
	int hA, wA, hB, wB;
	int i;

	setbuf(stdout, NULL);

	if (argc!=4){
		printf("./exec hA hB/WA wB\n");
		exit(-1);
	}

	hA = atoi(argv[1]);
	hB = wA = atoi(argv[2]);
	wB = atoi(argv[3]);

	// Init A and B, malloc C
	int size_A = wA * hA;
	A = (float*)malloc(size_A*sizeof(float));
	init_matrix(A, hA, wA, 1.0);

	int size_B = wB * hB;
	B = (float*)malloc(size_B*sizeof(float));
	init_matrix(B, hB, wB, 2.0);

	int size_C = wB * hA;
	C = (float*)malloc(size_C*sizeof(float));
	for (i = 0; i < (hA*wB); i++) {
		C[i] = 0.0;
	}

	cudaMalloc((void**) &A_G, sizeof (float)*hA*wA);
	cudaMalloc((void**) &B_G, sizeof (float)*hB*wB);
	cudaMalloc((void**) &C_G, sizeof (float)*hA*wB);

	cudaMemcpy(A_G,A,sizeof (float)*hA*wA,cudaMemcpyHostToDevice);
	cudaMemcpy(B_G,B,sizeof (float)*hB*wB,cudaMemcpyHostToDevice);
	cudaMemcpy(C_G,C,sizeof (float)*hA*wB,cudaMemcpyHostToDevice);
	
	dim3 nThreads_per_block(32,32);
	dim3 nBlocks;
	if ((hA*wB)%32==0)
		nBlocks = dim3((hA*wB)/32,(hA*wB)/32);
	else
		nBlocks = dim3((hA*wB)/32 +1,(hA*wB)/32 +1);
	
	MulGpu<<<nBlocks,nThreads_per_block>>>(A_G, B_G,  C_G, hA, wA, wB);

	//Mul(A, B, hA, wA, wB, C);

	cudaMemcpy(C,C_G,sizeof (float)*hA*wB,cudaMemcpyDeviceToHost);	
	
	//printf("\n\nMATRIX A\n");print_matrix(A, hA, wA);
	//printf("\n\nMATRIX B\n");print_matrix(B, hB, wB);
	//printf("\n\nMATRIX C\n");print_matrix(C, hA, wB);

	if (!diff(A, B, hA, wA, wB, C))
		printf("ERROR=GPU.vs.CPU matrix mult differs\n");
	

	// print Matrix
	//printf("\n\nMATRIX A\n");print_matrix(A, hA, wA);
	//printf("\n\nMATRIX B\n");print_matrix(B, hB, wB);
	//printf("\n\nMATRIX C\n");print_matrix(C, hA, wB);

	return (1);
}


	.file	"tmpxft_002bad5e_00000000-6_main.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2034:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2034:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z3MulPfS_iiiS_
	.type	_Z3MulPfS_iiiS_, @function
_Z3MulPfS_iiiS_:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	%ecx, %eax
	xorl	%r11d, %r11d
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movslq	%r8d, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	salq	$2, %r13
	movl	%edx, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	xorl	%ebp, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rsi, -8(%rsp)
	xorl	%esi, %esi
.L3:
	cmpl	%r12d, %ebp
	jge	.L2
	movslq	%r11d, %rdx
	movq	-8(%rsp), %rbx
	xorl	%ecx, %ecx
	leaq	(%r9,%rdx,4), %r10
	movslq	%esi, %rdx
	leaq	(%rdi,%rdx,4), %r15
.L7:
	cmpl	%r8d, %ecx
	jge	.L11
	movq	%rbx, %r14
	xorl	%edx, %edx
	xorps	%xmm0, %xmm0
.L5:
	movss	%xmm0, (%r10)
	cmpl	%edx, %eax
	jle	.L12
	movss	(%r15,%rdx,4), %xmm1
	mulss	(%r14), %xmm1
	incq	%rdx
	addq	%r13, %r14
	addss	%xmm1, %xmm0
	jmp	.L5
.L12:
	incl	%ecx
	addq	$4, %rbx
	addq	$4, %r10
	jmp	.L7
.L11:
	incl	%ebp
	addl	%r8d, %r11d
	addl	%eax, %esi
	jmp	.L3
.L2:
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z3MulPfS_iiiS_, .-_Z3MulPfS_iiiS_
	.globl	_Z11init_matrixPfiif
	.type	_Z11init_matrixPfiif, @function
_Z11init_matrixPfiif:
.LFB2028:
	.cfi_startproc
	endbr64
	movss	.LC1(%rip), %xmm2
	xorl	%r8d, %r8d
	xorl	%ecx, %ecx
.L14:
	cmpl	%esi, %ecx
	jge	.L13
	movslq	%r8d, %rax
	leaq	(%rdi,%rax,4), %r9
	xorl	%eax, %eax
.L18:
	cmpl	%edx, %eax
	jge	.L20
	movaps	%xmm0, %xmm1
	cmpl	%ecx, %eax
	je	.L15
	cvtsi2ssl	%edx, %xmm3
	movaps	%xmm2, %xmm1
	divss	%xmm3, %xmm1
.L15:
	movss	%xmm1, (%r9,%rax,4)
	incq	%rax
	jmp	.L18
.L20:
	incl	%ecx
	addl	%edx, %r8d
	jmp	.L14
.L13:
	ret
	.cfi_endproc
.LFE2028:
	.size	_Z11init_matrixPfiif, .-_Z11init_matrixPfiif
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC2:
	.string	"%4.1f "
.LC3:
	.string	"\n"
	.text
	.globl	_Z12print_matrixPfii
	.type	_Z12print_matrixPfii, @function
_Z12print_matrixPfii:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movl	%esi, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	xorl	%r13d, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	xorl	%r12d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rdi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%edx, %ebx
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
.L22:
	cmpl	%r14d, %r13d
	jge	.L21
	movslq	%r12d, %rax
	xorl	%r15d, %r15d
	leaq	0(%rbp,%rax,4), %rcx
.L25:
	cmpl	%r15d, %ebx
	jle	.L27
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	(%rcx,%r15,4), %xmm0
	movq	%rcx, 8(%rsp)
	incq	%r15
	call	__printf_chk@PLT
	movq	8(%rsp), %rcx
	jmp	.L25
.L27:
	leaq	.LC3(%rip), %rsi
	xorl	%eax, %eax
	incl	%r13d
	addl	%ebx, %r12d
	movl	$2, %edi
	call	__printf_chk@PLT
	jmp	.L22
.L21:
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2029:
	.size	_Z12print_matrixPfii, .-_Z12print_matrixPfii
	.section	.rodata.str1.1
.LC6:
	.string	"[%i,%i]: %f!=%f\n"
	.text
	.globl	_Z4diffPfS_iiiS_
	.type	_Z4diffPfS_iiiS_, @function
_Z4diffPfS_iiiS_:
.LFB2030:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rdi, %r14
	movl	%r8d, %edi
	imull	%edx, %edi
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%ecx, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movl	%edx, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movslq	%edi, %rdi
	movl	%r8d, %ebx
	salq	$2, %rdi
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	movq	%rsi, (%rsp)
	movq	%r9, 8(%rsp)
	call	malloc@PLT
	movslq	%ebx, %rdx
	xorl	%esi, %esi
	xorl	%r8d, %r8d
	leaq	0(,%rdx,4), %rcx
	xorl	%r10d, %r10d
	movq	%rcx, %r13
.L29:
	cmpl	%ebp, %r10d
	jge	.L40
	movslq	%r8d, %rdx
	movq	(%rsp), %r9
	xorl	%ecx, %ecx
	leaq	(%rax,%rdx,4), %rdi
	movslq	%esi, %rdx
	leaq	(%r14,%rdx,4), %r15
.L33:
	cmpl	%ebx, %ecx
	jge	.L45
	movq	%r9, %r11
	xorl	%edx, %edx
	xorps	%xmm0, %xmm0
.L31:
	movss	%xmm0, (%rdi)
	cmpl	%edx, %r12d
	jle	.L46
	movss	(%r15,%rdx,4), %xmm1
	mulss	(%r11), %xmm1
	incq	%rdx
	addq	%r13, %r11
	addss	%xmm1, %xmm0
	jmp	.L31
.L46:
	incl	%ecx
	addq	$4, %r9
	addq	$4, %rdi
	jmp	.L33
.L45:
	incl	%r10d
	addl	%ebx, %r8d
	addl	%r12d, %esi
	jmp	.L29
.L40:
	movsd	.LC5(%rip), %xmm4
	xorl	%edi, %edi
	xorl	%esi, %esi
	movss	.LC4(%rip), %xmm3
.L32:
	cmpl	%ebp, %esi
	jge	.L41
	movslq	%edi, %rdx
	xorl	%ecx, %ecx
	salq	$2, %rdx
.L38:
	cmpl	%ebx, %ecx
	jge	.L47
	movq	8(%rsp), %r14
	movss	(%rax,%rdx), %xmm0
	movss	(%r14,%rdx), %xmm1
	movaps	%xmm0, %xmm2
	addq	$4, %rdx
	subss	%xmm1, %xmm2
	andps	%xmm3, %xmm2
	cvtss2sd	%xmm2, %xmm2
	comisd	%xmm4, %xmm2
	jbe	.L43
	movl	%esi, %edx
	movl	$2, %edi
	movb	$2, %al
	cvtss2sd	%xmm0, %xmm0
	leaq	.LC6(%rip), %rsi
	cvtss2sd	%xmm1, %xmm1
	call	__printf_chk@PLT
	xorl	%eax, %eax
	jmp	.L28
.L43:
	incl	%ecx
	jmp	.L38
.L47:
	incl	%esi
	addl	%ebx, %edi
	jmp	.L32
.L41:
	movl	$1, %eax
.L28:
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2030:
	.size	_Z4diffPfS_iiiS_, .-_Z4diffPfS_iiiS_
	.globl	_Z32__device_stub__Z6MulGpuPfS_S_iiiPfS_S_iii
	.type	_Z32__device_stub__Z6MulGpuPfS_S_iiiPfS_S_iii, @function
_Z32__device_stub__Z6MulGpuPfS_S_iiiPfS_S_iii:
.LFB2056:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movl	%r9d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L48
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z6MulGpuPfS_S_iii(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L48:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L50
	call	__stack_chk_fail@PLT
.L50:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2056:
	.size	_Z32__device_stub__Z6MulGpuPfS_S_iiiPfS_S_iii, .-_Z32__device_stub__Z6MulGpuPfS_S_iiiPfS_S_iii
	.globl	_Z6MulGpuPfS_S_iii
	.type	_Z6MulGpuPfS_S_iii, @function
_Z6MulGpuPfS_S_iii:
.LFB2057:
	.cfi_startproc
	endbr64
	jmp	_Z32__device_stub__Z6MulGpuPfS_S_iiiPfS_S_iii
	.cfi_endproc
.LFE2057:
	.size	_Z6MulGpuPfS_S_iii, .-_Z6MulGpuPfS_S_iii
	.section	.rodata.str1.1
.LC7:
	.string	"./exec hA hB/WA wB\n"
.LC10:
	.string	"ERROR=GPU.vs.CPU matrix mult differs\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2031:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rsi, %r12
	xorl	%esi, %esi
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%edi, %ebx
	subq	$120, %rsp
	.cfi_def_cfa_offset 176
	movq	stdout(%rip), %rdi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	call	setbuf@PLT
	cmpl	$4, %ebx
	je	.L54
	movl	$2, %edi
	leaq	.LC7(%rip), %rsi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	orl	$-1, %edi
	call	exit@PLT
.L54:
	movq	8(%r12), %rdi
	call	atoi@PLT
	movq	16(%r12), %rdi
	movl	%eax, %ebp
	call	atoi@PLT
	movq	24(%r12), %rdi
	movl	%ebp, %r15d
	movl	%eax, %ebx
	call	atoi@PLT
	movl	%ebp, %edi
	imull	%ebx, %edi
	movl	%eax, %r12d
	imull	%r12d, %r15d
	movslq	%edi, %rdi
	salq	$2, %rdi
	call	malloc@PLT
	movss	.LC8(%rip), %xmm0
	movl	%ebx, %edx
	movl	%ebp, %esi
	movq	%rax, %rdi
	movq	%rax, 8(%rsp)
	call	_Z11init_matrixPfiif
	movl	%ebx, %edi
	imull	%r12d, %edi
	movslq	%edi, %rdi
	salq	$2, %rdi
	call	malloc@PLT
	movss	.LC9(%rip), %xmm0
	movl	%r12d, %edx
	movl	%ebx, %esi
	movq	%rax, %rdi
	movq	%rax, 16(%rsp)
	call	_Z11init_matrixPfiif
	movslq	%r15d, %rdi
	salq	$2, %rdi
	call	malloc@PLT
	movq	%rax, %r13
	xorl	%eax, %eax
.L55:
	cmpl	%eax, %r15d
	jle	.L63
	movl	$0x00000000, 0(%r13,%rax,4)
	incq	%rax
	jmp	.L55
.L63:
	movslq	%ebp, %rcx
	movslq	%ebx, %r8
	leaq	56(%rsp), %rdi
	movslq	%r12d, %r14
	movq	%rcx, %rdx
	movq	%rcx, 40(%rsp)
	imulq	%r8, %rdx
	movq	%r8, 24(%rsp)
	salq	$2, %rdx
	movq	%rdx, %rsi
	movq	%rdx, 32(%rsp)
	call	cudaMalloc@PLT
	movq	24(%rsp), %r8
	leaq	64(%rsp), %rdi
	imulq	%r14, %r8
	leaq	0(,%r8,4), %rax
	movq	%rax, %rsi
	movq	%rax, 24(%rsp)
	call	cudaMalloc@PLT
	movq	40(%rsp), %rcx
	leaq	72(%rsp), %rdi
	imulq	%r14, %rcx
	leaq	0(,%rcx,4), %rax
	movq	%rax, %rsi
	movq	%rax, %r14
	call	cudaMalloc@PLT
	movq	32(%rsp), %rdx
	movq	8(%rsp), %rsi
	movl	$1, %ecx
	movq	56(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rsi
	movl	$1, %ecx
	movq	64(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	72(%rsp), %rdi
	movq	%r14, %rdx
	movq	%r13, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movl	%r15d, %eax
	movl	$32, %ecx
	movl	$1, %esi
	cltd
	idivl	%ecx
	andl	$31, %r15d
	movl	$1, %ecx
	leal	1(%rax), %edx
	cmove	%eax, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	%edx, 92(%rsp)
	movl	%edx, 96(%rsp)
	movq	92(%rsp), %rdi
	movabsq	$137438953504, %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L59
	movq	72(%rsp), %rdx
	movq	64(%rsp), %rsi
	movl	%r12d, %r9d
	movl	%ebx, %r8d
	movq	56(%rsp), %rdi
	movl	%ebp, %ecx
	call	_Z32__device_stub__Z6MulGpuPfS_S_iiiPfS_S_iii
.L59:
	movq	72(%rsp), %rsi
	movl	$2, %ecx
	movq	%r14, %rdx
	movq	%r13, %rdi
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rsi
	movq	%r13, %r9
	movl	%r12d, %r8d
	movq	8(%rsp), %rdi
	movl	%ebx, %ecx
	movl	%ebp, %edx
	call	_Z4diffPfS_iiiS_
	testl	%eax, %eax
	jne	.L60
	leaq	.LC10(%rip), %rsi
	movl	$2, %edi
	call	__printf_chk@PLT
.L60:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L61
	call	__stack_chk_fail@PLT
.L61:
	addq	$120, %rsp
	.cfi_def_cfa_offset 56
	movl	$1, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2031:
	.size	main, .-main
	.section	.rodata.str1.1
.LC11:
	.string	"_Z6MulGpuPfS_S_iii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2059:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC11(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z6MulGpuPfS_S_iii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2059:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC1:
	.long	-1082130432
	.section	.rodata.cst16,"aM",@progbits,16
	.align 16
.LC4:
	.long	2147483647
	.long	0
	.long	0
	.long	0
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC5:
	.long	-1998362383
	.long	1055193269
	.section	.rodata.cst4
	.align 4
.LC8:
	.long	1065353216
	.align 4
.LC9:
	.long	1073741824
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <stdio.h>
#include <malloc.h>
#include <stdlib.h>
#include <math.h>
#include <hip/hip_runtime.h>


void Mul(float *A, float *B, int hA, int wA, int wB, float *C)
{
	int i,j,k;

	for (i=0; i<hA; i++)
		for (j=0; j<wB; j++){
			C[i*wB+j] = 0.0;
			for (k=0; k<wA; k++)
				C[i*wB+j] += A[i*wA+k]*B[k*wB+j];
		}
}

__global__ void MulGpu(float *A, float *B, float *C, int hA, int wA, int wB)
{
	int i = threadIdx.x + blockDim.x * blockIdx.x;
	int j = threadIdx.y + blockDim.y * blockIdx.y;
	if(i < hA && j < wB) for(int k = 0; k < wA ; k++) C[i*wB+j] += A[i*wA+k]*B[k*wB+j];

}

void init_matrix(float *M, int hM, int wM, float k)
{
	int i,j;

	for (i=0; i<hM; i++)
		for (j=0; j<wM; j++)
			if (i==j)
				M[i*wM+j] = k*1.0f;
			else
				M[i*wM+j] = -1.0f/(float)(wM);
}

void print_matrix(float *M, int hM, int wM)
{
	int i,j;

	for (i=0; i<hM; i++){
//		printf("Line %i: ", i);
		for (j=0; j<wM; j++)
			printf("%4.1f ", M[i*wM+j]);
		printf("\n");
	}
}

int diff(float *A, float *B, int hA, int wA, int wB, float *C)
{
	float *C_cpu;
	int size_C = wB * hA;
	C_cpu = (float*)malloc(size_C*sizeof(float));

	int i,j,k;

	for (i=0; i<hA; i++)
		for (j=0; j<wB; j++){
			C_cpu[i*wB+j] = 0.0;
			for (k=0; k<wA; k++){
				C_cpu[i*wB+j] += A[i*wA+k]*B[k*wB+j];
			}
		}
	//printf("\n\nMATRIX C_cpu\n");print_matrix(C_cpu, hA, wB);

	for (i=0; i<hA; i++)
		for (j=0; j<wB; j++)
			if (fabsf(C_cpu[i*wB+j]-C[i*wB+j])>1e-5)
			{
				printf("[%i,%i]: %f!=%f\n", i, j, C_cpu[i*wB+j], C[i*wB+j]);
				return(0);
			}


	return(1);

}

////////////////////////////////////////////////////////////////////////////////
// Program main
////////////////////////////////////////////////////////////////////////////////
int main(int argc, char** argv)
{
	// Matrix variables
	float *A, *B, *C;
	float *A_G, *B_G, *C_G;
	int hA, wA, hB, wB;
	int i;

	setbuf(stdout, NULL);

	if (argc!=4){
		printf("./exec hA hB/WA wB\n");
		exit(-1);
	}

	hA = atoi(argv[1]);
	hB = wA = atoi(argv[2]);
	wB = atoi(argv[3]);

	// Init A and B, malloc C
	int size_A = wA * hA;
	A = (float*)malloc(size_A*sizeof(float));
	init_matrix(A, hA, wA, 1.0);

	int size_B = wB * hB;
	B = (float*)malloc(size_B*sizeof(float));
	init_matrix(B, hB, wB, 2.0);

	int size_C = wB * hA;
	C = (float*)malloc(size_C*sizeof(float));
	for (i = 0; i < (hA*wB); i++) {
		C[i] = 0.0;
	}

	hipMalloc((void**) &A_G, sizeof (float)*hA*wA);
	hipMalloc((void**) &B_G, sizeof (float)*hB*wB);
	hipMalloc((void**) &C_G, sizeof (float)*hA*wB);

	hipMemcpy(A_G,A,sizeof (float)*hA*wA,hipMemcpyHostToDevice);
	hipMemcpy(B_G,B,sizeof (float)*hB*wB,hipMemcpyHostToDevice);
	hipMemcpy(C_G,C,sizeof (float)*hA*wB,hipMemcpyHostToDevice);
	
	dim3 nThreads_per_block(32,32);
	dim3 nBlocks;
	if ((hA*wB)%32==0)
		nBlocks = dim3((hA*wB)/32,(hA*wB)/32);
	else
		nBlocks = dim3((hA*wB)/32 +1,(hA*wB)/32 +1);
	
	MulGpu<<<nBlocks,nThreads_per_block>>>(A_G, B_G,  C_G, hA, wA, wB);

	//Mul(A, B, hA, wA, wB, C);

	hipMemcpy(C,C_G,sizeof (float)*hA*wB,hipMemcpyDeviceToHost);	
	
	//printf("\n\nMATRIX A\n");print_matrix(A, hA, wA);
	//printf("\n\nMATRIX B\n");print_matrix(B, hB, wB);
	//printf("\n\nMATRIX C\n");print_matrix(C, hA, wB);

	if (!diff(A, B, hA, wA, wB, C))
		printf("ERROR=GPU.vs.CPU matrix mult differs\n");
	

	// print Matrix
	//printf("\n\nMATRIX A\n");print_matrix(A, hA, wA);
	//printf("\n\nMATRIX B\n");print_matrix(B, hB, wB);
	//printf("\n\nMATRIX C\n");print_matrix(C, hA, wB);

	return (1);
}


	.text
	.file	"main.hip"
	.globl	_Z3MulPfS_iiiS_                 # -- Begin function _Z3MulPfS_iiiS_
	.type	_Z3MulPfS_iiiS_,@function
_Z3MulPfS_iiiS_:                        # @_Z3MulPfS_iiiS_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, -8(%rsp)                   # 8-byte Spill
	movq	%rsi, -16(%rsp)                 # 8-byte Spill
	movq	%rdi, -24(%rsp)                 # 8-byte Spill
	testl	%edx, %edx
	jle	.LBB0_9
# %bb.1:                                # %.preheader.lr.ph
	movslq	%r8d, %rdi
	movl	%edx, %edx
	movl	%edi, %r10d
	movl	%ecx, %r11d
	leaq	(,%rdi,4), %rbx
	xorl	%r14d, %r14d
	xorl	%r15d, %r15d
.LBB0_2:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB0_4 Depth 2
                                        #       Child Loop BB0_6 Depth 3
	testl	%r8d, %r8d
	jle	.LBB0_8
# %bb.3:                                # %.lr.ph30
                                        #   in Loop: Header=BB0_2 Depth=1
	movl	%r14d, %eax
	movq	-24(%rsp), %rsi                 # 8-byte Reload
	leaq	(%rsi,%rax,4), %r12
	movq	%r15, %rax
	imulq	%rdi, %rax
	movq	-8(%rsp), %rsi                  # 8-byte Reload
	leaq	(%rsi,%rax,4), %r13
	movq	-16(%rsp), %rsi                 # 8-byte Reload
	xorl	%eax, %eax
.LBB0_4:                                #   Parent Loop BB0_2 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB0_6 Depth 3
	movl	$0, (%r13,%rax,4)
	testl	%ecx, %ecx
	jle	.LBB0_7
# %bb.5:                                # %.lr.ph
                                        #   in Loop: Header=BB0_4 Depth=2
	xorps	%xmm0, %xmm0
	movq	%rsi, %rbp
	xorl	%r9d, %r9d
.LBB0_6:                                #   Parent Loop BB0_2 Depth=1
                                        #     Parent Loop BB0_4 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movss	(%r12,%r9,4), %xmm1             # xmm1 = mem[0],zero,zero,zero
	mulss	(%rbp), %xmm1
	addss	%xmm1, %xmm0
	movss	%xmm0, (%r13,%rax,4)
	incq	%r9
	addq	%rbx, %rbp
	cmpq	%r9, %r11
	jne	.LBB0_6
.LBB0_7:                                # %._crit_edge
                                        #   in Loop: Header=BB0_4 Depth=2
	incq	%rax
	addq	$4, %rsi
	cmpq	%r10, %rax
	jne	.LBB0_4
.LBB0_8:                                # %._crit_edge31
                                        #   in Loop: Header=BB0_2 Depth=1
	incq	%r15
	addl	%ecx, %r14d
	cmpq	%rdx, %r15
	jne	.LBB0_2
.LBB0_9:                                # %._crit_edge33
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z3MulPfS_iiiS_, .Lfunc_end0-_Z3MulPfS_iiiS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z21__device_stub__MulGpuPfS_S_iii # -- Begin function _Z21__device_stub__MulGpuPfS_S_iii
	.type	_Z21__device_stub__MulGpuPfS_S_iii,@function
_Z21__device_stub__MulGpuPfS_S_iii:     # @_Z21__device_stub__MulGpuPfS_S_iii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	20(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	16(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z6MulGpuPfS_S_iii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z21__device_stub__MulGpuPfS_S_iii, .Lfunc_end1-_Z21__device_stub__MulGpuPfS_S_iii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z11init_matrixPfiif
.LCPI2_0:
	.long	0xbf800000                      # float -1
	.text
	.globl	_Z11init_matrixPfiif
	.type	_Z11init_matrixPfiif,@function
_Z11init_matrixPfiif:                   # @_Z11init_matrixPfiif
	.cfi_startproc
# %bb.0:
	testl	%esi, %esi
	jle	.LBB2_10
# %bb.1:                                # %.preheader.lr.ph
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	cvtsi2ss	%edx, %xmm2
	movss	.LCPI2_0(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	divss	%xmm2, %xmm1
	movl	%esi, %eax
	movl	%edx, %ecx
	xorl	%esi, %esi
	xorl	%r8d, %r8d
.LBB2_2:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_4 Depth 2
	testl	%edx, %edx
	jle	.LBB2_8
# %bb.3:                                # %.lr.ph
                                        #   in Loop: Header=BB2_2 Depth=1
	movl	%esi, %r9d
	leaq	(%rdi,%r9,4), %r9
	movl	%r8d, %r10d
	imull	%edx, %r10d
	leaq	(%rdi,%r8,4), %r11
	xorl	%ebx, %ebx
.LBB2_4:                                #   Parent Loop BB2_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	cmpq	%rbx, %r8
	jne	.LBB2_6
# %bb.5:                                #   in Loop: Header=BB2_4 Depth=2
	movss	%xmm0, (%r11,%r10,4)
	jmp	.LBB2_7
.LBB2_6:                                #   in Loop: Header=BB2_4 Depth=2
	movss	%xmm1, (%r9,%rbx,4)
.LBB2_7:                                #   in Loop: Header=BB2_4 Depth=2
	incq	%rbx
	cmpq	%rbx, %rcx
	jne	.LBB2_4
.LBB2_8:                                # %._crit_edge
                                        #   in Loop: Header=BB2_2 Depth=1
	incq	%r8
	addl	%edx, %esi
	cmpq	%rax, %r8
	jne	.LBB2_2
# %bb.9:
	popq	%rbx
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
.LBB2_10:                               # %._crit_edge21
	retq
.Lfunc_end2:
	.size	_Z11init_matrixPfiif, .Lfunc_end2-_Z11init_matrixPfiif
	.cfi_endproc
                                        # -- End function
	.globl	_Z12print_matrixPfii            # -- Begin function _Z12print_matrixPfii
	.type	_Z12print_matrixPfii,@function
_Z12print_matrixPfii:                   # @_Z12print_matrixPfii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdi, 8(%rsp)                   # 8-byte Spill
	testl	%esi, %esi
	jle	.LBB3_6
# %bb.1:                                # %.preheader.lr.ph
	movl	%edx, %ebx
	movl	%esi, %eax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movl	%edx, %r12d
	xorl	%r13d, %r13d
	xorl	%ebp, %ebp
.LBB3_2:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_4 Depth 2
	testl	%ebx, %ebx
	jle	.LBB3_5
# %bb.3:                                # %.lr.ph
                                        #   in Loop: Header=BB3_2 Depth=1
	movl	%r13d, %eax
	movq	8(%rsp), %rcx                   # 8-byte Reload
	leaq	(%rcx,%rax,4), %r14
	xorl	%r15d, %r15d
.LBB3_4:                                #   Parent Loop BB3_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r14,%r15,4), %xmm0
	movl	$.L.str, %edi
	movb	$1, %al
	callq	printf
	incq	%r15
	cmpq	%r15, %r12
	jne	.LBB3_4
.LBB3_5:                                # %._crit_edge
                                        #   in Loop: Header=BB3_2 Depth=1
	movl	$10, %edi
	callq	putchar@PLT
	incq	%rbp
	addl	%ebx, %r13d
	cmpq	16(%rsp), %rbp                  # 8-byte Folded Reload
	jne	.LBB3_2
.LBB3_6:                                # %._crit_edge13
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z12print_matrixPfii, .Lfunc_end3-_Z12print_matrixPfii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0                          # -- Begin function _Z4diffPfS_iiiS_
.LCPI4_0:
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0
.LCPI4_1:
	.quad	0x3ee4f8b588e368f1              # double 1.0000000000000001E-5
	.text
	.globl	_Z4diffPfS_iiiS_
	.type	_Z4diffPfS_iiiS_,@function
_Z4diffPfS_iiiS_:                       # @_Z4diffPfS_iiiS_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, %rbx
	movl	%r8d, %ebp
	movl	%ecx, %r15d
	movl	%edx, %r14d
	movq	%rsi, 32(%rsp)                  # 8-byte Spill
	movq	%rdi, 24(%rsp)                  # 8-byte Spill
	movl	%r8d, %eax
	imull	%edx, %eax
	movslq	%eax, %rdi
	shlq	$2, %rdi
	callq	malloc
	movq	%rax, 8(%rsp)                   # 8-byte Spill
	movl	$1, %eax
	testl	%r14d, %r14d
	jle	.LBB4_19
# %bb.1:                                # %.preheader61.lr.ph
	movq	%rbx, 16(%rsp)                  # 8-byte Spill
	movslq	%ebp, %rax
	movl	%r14d, 4(%rsp)                  # 4-byte Spill
	movl	%r14d, %edi
	movl	%eax, %r8d
	movl	%r15d, %esi
	leaq	(,%rax,4), %r9
	xorl	%r10d, %r10d
	xorl	%r11d, %r11d
.LBB4_2:                                # %.preheader61
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB4_4 Depth 2
                                        #       Child Loop BB4_6 Depth 3
	testl	%ebp, %ebp
	jle	.LBB4_9
# %bb.3:                                # %.lr.ph68
                                        #   in Loop: Header=BB4_2 Depth=1
	movl	%r10d, %ecx
	movq	24(%rsp), %rdx                  # 8-byte Reload
	leaq	(%rdx,%rcx,4), %rbx
	movq	%r11, %rcx
	imulq	%rax, %rcx
	movq	8(%rsp), %rdx                   # 8-byte Reload
	leaq	(%rdx,%rcx,4), %r14
	movq	32(%rsp), %r13                  # 8-byte Reload
	xorl	%ecx, %ecx
.LBB4_4:                                #   Parent Loop BB4_2 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB4_6 Depth 3
	movl	$0, (%r14,%rcx,4)
	testl	%r15d, %r15d
	jle	.LBB4_8
# %bb.5:                                # %.lr.ph
                                        #   in Loop: Header=BB4_4 Depth=2
	xorps	%xmm0, %xmm0
	movq	%r13, %r12
	xorl	%edx, %edx
.LBB4_6:                                #   Parent Loop BB4_2 Depth=1
                                        #     Parent Loop BB4_4 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movss	(%rbx,%rdx,4), %xmm1            # xmm1 = mem[0],zero,zero,zero
	mulss	(%r12), %xmm1
	addss	%xmm1, %xmm0
	incq	%rdx
	addq	%r9, %r12
	cmpq	%rdx, %rsi
	jne	.LBB4_6
# %bb.7:                                # %._crit_edge
                                        #   in Loop: Header=BB4_4 Depth=2
	movss	%xmm0, (%r14,%rcx,4)
.LBB4_8:                                #   in Loop: Header=BB4_4 Depth=2
	incq	%rcx
	addq	$4, %r13
	cmpq	%r8, %rcx
	jne	.LBB4_4
.LBB4_9:                                # %._crit_edge69
                                        #   in Loop: Header=BB4_2 Depth=1
	incq	%r11
	addl	%r15d, %r10d
	cmpq	%rdi, %r11
	jne	.LBB4_2
# %bb.10:                               # %.preheader60
	cmpl	$0, 4(%rsp)                     # 4-byte Folded Reload
	jle	.LBB4_18
# %bb.11:                               # %.preheader.lr.ph
	xorl	%r9d, %r9d
	movaps	.LCPI4_0(%rip), %xmm0           # xmm0 = [NaN,NaN,NaN,NaN]
	movsd	.LCPI4_1(%rip), %xmm1           # xmm1 = mem[0],zero
	xorl	%esi, %esi
	movq	16(%rsp), %r11                  # 8-byte Reload
.LBB4_12:                               # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB4_14 Depth 2
	testl	%ebp, %ebp
	jle	.LBB4_17
# %bb.13:                               # %.lr.ph72
                                        #   in Loop: Header=BB4_12 Depth=1
	movl	%r9d, %eax
	leaq	(%r11,%rax,4), %rcx
	movq	8(%rsp), %rdx                   # 8-byte Reload
	leaq	(%rdx,%rax,4), %r10
	xorl	%edx, %edx
.LBB4_14:                               #   Parent Loop BB4_12 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movss	(%r10,%rdx,4), %xmm2            # xmm2 = mem[0],zero,zero,zero
	movss	(%rcx,%rdx,4), %xmm3            # xmm3 = mem[0],zero,zero,zero
	movaps	%xmm2, %xmm4
	subss	%xmm3, %xmm4
	andps	%xmm0, %xmm4
	cvtss2sd	%xmm4, %xmm4
	ucomisd	%xmm1, %xmm4
	ja	.LBB4_15
# %bb.16:                               #   in Loop: Header=BB4_14 Depth=2
	incq	%rdx
	cmpq	%rdx, %r8
	jne	.LBB4_14
.LBB4_17:                               # %._crit_edge73
                                        #   in Loop: Header=BB4_12 Depth=1
	incq	%rsi
	addl	%ebp, %r9d
	cmpq	%rdi, %rsi
	jne	.LBB4_12
.LBB4_18:
	movl	$1, %eax
	jmp	.LBB4_19
.LBB4_15:
	xorps	%xmm0, %xmm0
	cvtss2sd	%xmm2, %xmm0
	xorps	%xmm1, %xmm1
	cvtss2sd	%xmm3, %xmm1
	movl	$.L.str.2, %edi
                                        # kill: def $esi killed $esi killed $rsi
                                        # kill: def $edx killed $edx killed $rdx
	movb	$2, %al
	callq	printf
	xorl	%eax, %eax
.LBB4_19:                               # %.loopexit
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z4diffPfS_iiiS_, .Lfunc_end4-_Z4diffPfS_iiiS_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI5_0:
	.long	0xbf800000                      # float -1
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %rbx
	movl	%edi, %ebp
	movq	stdout(%rip), %rdi
	xorl	%esi, %esi
	callq	setbuf
	cmpl	$4, %ebp
	jne	.LBB5_29
# %bb.1:
	movq	8(%rbx), %rdi
	callq	atoi
	movl	%eax, %r13d
	movq	16(%rbx), %rdi
	callq	atoi
	movl	%eax, %ebp
	movq	24(%rbx), %rdi
	callq	atoi
	movl	%eax, %r14d
	movl	%ebp, %eax
	imull	%r13d, %eax
	movslq	%eax, %rdi
	shlq	$2, %rdi
	callq	malloc
	movq	%rax, %r15
	movl	%ebp, %ebx
	testl	%r13d, %r13d
	jle	.LBB5_10
# %bb.2:                                # %.preheader.lr.ph.i
	cvtsi2ss	%ebp, %xmm1
	movss	.LCPI5_0(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	divss	%xmm1, %xmm0
	movl	%r13d, %eax
	xorl	%ecx, %ecx
	xorl	%edx, %edx
.LBB5_3:                                # %.preheader.i
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB5_5 Depth 2
	testl	%ebp, %ebp
	jle	.LBB5_9
# %bb.4:                                # %.lr.ph.i
                                        #   in Loop: Header=BB5_3 Depth=1
	movl	%ecx, %esi
	leaq	(%r15,%rsi,4), %rsi
	movl	%ebp, %edi
	imull	%edx, %edi
	leaq	(%r15,%rdx,4), %r8
	xorl	%r9d, %r9d
.LBB5_5:                                #   Parent Loop BB5_3 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	cmpq	%r9, %rdx
	jne	.LBB5_7
# %bb.6:                                #   in Loop: Header=BB5_5 Depth=2
	movl	$1065353216, (%r8,%rdi,4)       # imm = 0x3F800000
	jmp	.LBB5_8
.LBB5_7:                                #   in Loop: Header=BB5_5 Depth=2
	movss	%xmm0, (%rsi,%r9,4)
.LBB5_8:                                #   in Loop: Header=BB5_5 Depth=2
	incq	%r9
	cmpq	%r9, %rbx
	jne	.LBB5_5
.LBB5_9:                                # %._crit_edge.i
                                        #   in Loop: Header=BB5_3 Depth=1
	incq	%rdx
	addl	%ebp, %ecx
	cmpq	%rax, %rdx
	jne	.LBB5_3
.LBB5_10:                               # %_Z11init_matrixPfiif.exit
	movl	%r14d, %eax
	imull	%ebp, %eax
	movslq	%eax, %rdi
	shlq	$2, %rdi
	callq	malloc
	movq	%rax, %r12
	testl	%ebp, %ebp
	jle	.LBB5_19
# %bb.11:                               # %.preheader.lr.ph.i71
	xorps	%xmm1, %xmm1
	cvtsi2ss	%r14d, %xmm1
	movss	.LCPI5_0(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	divss	%xmm1, %xmm0
	movl	%r14d, %eax
	xorl	%ecx, %ecx
	xorl	%edx, %edx
.LBB5_12:                               # %.preheader.i74
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB5_14 Depth 2
	testl	%r14d, %r14d
	jle	.LBB5_18
# %bb.13:                               # %.lr.ph.i79
                                        #   in Loop: Header=BB5_12 Depth=1
	movl	%ecx, %esi
	leaq	(%r12,%rsi,4), %rsi
	movl	%r14d, %edi
	imull	%edx, %edi
	leaq	(%r12,%rdx,4), %r8
	xorl	%r9d, %r9d
.LBB5_14:                               #   Parent Loop BB5_12 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	cmpq	%r9, %rdx
	jne	.LBB5_16
# %bb.15:                               #   in Loop: Header=BB5_14 Depth=2
	movl	$1073741824, (%r8,%rdi,4)       # imm = 0x40000000
	jmp	.LBB5_17
.LBB5_16:                               #   in Loop: Header=BB5_14 Depth=2
	movss	%xmm0, (%rsi,%r9,4)
.LBB5_17:                               #   in Loop: Header=BB5_14 Depth=2
	incq	%r9
	cmpq	%r9, %rax
	jne	.LBB5_14
.LBB5_18:                               # %._crit_edge.i76
                                        #   in Loop: Header=BB5_12 Depth=1
	incq	%rdx
	addl	%r14d, %ecx
	cmpq	%rbx, %rdx
	jne	.LBB5_12
.LBB5_19:                               # %_Z11init_matrixPfiif.exit85
	movl	%r14d, %eax
	imull	%r13d, %eax
	movq	%rax, 40(%rsp)                  # 8-byte Spill
	movslq	%eax, %rbx
	leaq	(,%rbx,4), %rdi
	callq	malloc
	movq	%rax, 32(%rsp)                  # 8-byte Spill
	testl	%ebx, %ebx
	jle	.LBB5_21
# %bb.20:                               # %.lr.ph.preheader
	movl	40(%rsp), %edx                  # 4-byte Reload
	shlq	$2, %rdx
	movq	32(%rsp), %rdi                  # 8-byte Reload
	xorl	%esi, %esi
	callq	memset@PLT
.LBB5_21:                               # %._crit_edge
	movl	%r13d, 28(%rsp)                 # 4-byte Spill
	movslq	%r13d, %rbx
	shlq	$2, %rbx
	movslq	%ebp, %r13
	movq	%rbx, %rsi
	imulq	%r13, %rsi
	movq	%rsi, 8(%rsp)                   # 8-byte Spill
	leaq	56(%rsp), %rdi
	callq	hipMalloc
	movslq	%r14d, %rax
	movq	%rax, 64(%rsp)                  # 8-byte Spill
	imulq	%rax, %r13
	shlq	$2, %r13
	leaq	48(%rsp), %rdi
	movq	%r13, %rsi
	callq	hipMalloc
	imulq	64(%rsp), %rbx                  # 8-byte Folded Reload
	leaq	16(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	leaq	56(%rsp), %rax
	movq	(%rax), %rdi
	movq	%r15, %rsi
	movq	8(%rsp), %rdx                   # 8-byte Reload
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	48(%rsp), %rax
	movq	(%rax), %rdi
	movq	%r12, %rsi
	movq	%r13, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	16(%rsp), %rax
	movq	(%rax), %rdi
	movq	32(%rsp), %r13                  # 8-byte Reload
	movq	%r13, %rsi
	movq	%rbx, 8(%rsp)                   # 8-byte Spill
	movq	%rbx, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	40(%rsp), %rcx                  # 8-byte Reload
	testb	$31, %cl
	je	.LBB5_22
# %bb.23:
	leal	31(%rcx), %eax
	testl	%ecx, %ecx
	cmovnsl	%ecx, %eax
	sarl	$5, %eax
	incl	%eax
	movl	%eax, %ecx
	jmp	.LBB5_24
.LBB5_22:
	sarl	$5, %ecx
.LBB5_24:
	movl	%ecx, %eax
	movq	%rax, %rdi
	shlq	$32, %rdi
	orq	%rax, %rdi
	movabsq	$137438953504, %rdx             # imm = 0x2000000020
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	movl	28(%rsp), %ebx                  # 4-byte Reload
	jne	.LBB5_26
# %bb.25:
	movq	56(%rsp), %rdi
	movq	48(%rsp), %rsi
	movq	16(%rsp), %rdx
	movl	%ebx, %ecx
	movl	%ebp, %r8d
	movl	%r14d, %r9d
	callq	_Z21__device_stub__MulGpuPfS_S_iii
.LBB5_26:
	movq	16(%rsp), %rsi
	movq	%r13, %rdi
	movq	8(%rsp), %rdx                   # 8-byte Reload
	movl	$2, %ecx
	callq	hipMemcpy
	movq	%r15, %rdi
	movq	%r12, %rsi
	movl	%ebx, %edx
	movl	%ebp, %ecx
	movl	%r14d, %r8d
	movq	%r13, %r9
	callq	_Z4diffPfS_iiiS_
	testl	%eax, %eax
	jne	.LBB5_28
# %bb.27:
	movl	$.Lstr, %edi
	callq	puts@PLT
.LBB5_28:
	movl	$1, %eax
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB5_29:
	.cfi_def_cfa_offset 128
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	movl	$-1, %edi
	callq	exit
.Lfunc_end5:
	.size	main, .Lfunc_end5-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB6_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB6_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z6MulGpuPfS_S_iii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end6:
	.size	__hip_module_ctor, .Lfunc_end6-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB7_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB7_2:
	retq
.Lfunc_end7:
	.size	__hip_module_dtor, .Lfunc_end7-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z6MulGpuPfS_S_iii,@object      # @_Z6MulGpuPfS_S_iii
	.section	.rodata,"a",@progbits
	.globl	_Z6MulGpuPfS_S_iii
	.p2align	3, 0x0
_Z6MulGpuPfS_S_iii:
	.quad	_Z21__device_stub__MulGpuPfS_S_iii
	.size	_Z6MulGpuPfS_S_iii, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"%4.1f "
	.size	.L.str, 7

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"[%i,%i]: %f!=%f\n"
	.size	.L.str.2, 17

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z6MulGpuPfS_S_iii"
	.size	.L__unnamed_1, 19

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"ERROR=GPU.vs.CPU matrix mult differs"
	.size	.Lstr, 37

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"./exec hA hB/WA wB"
	.size	.Lstr.1, 19

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z21__device_stub__MulGpuPfS_S_iii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z6MulGpuPfS_S_iii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z6MulGpuPfS_S_iii      ; -- Begin function _Z6MulGpuPfS_S_iii
	.globl	_Z6MulGpuPfS_S_iii
	.p2align	8
	.type	_Z6MulGpuPfS_S_iii,@function
_Z6MulGpuPfS_S_iii:                     ; @_Z6MulGpuPfS_S_iii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x34
	s_load_b128 s[4:7], s[0:1], 0x18
	v_and_b32_e32 v1, 0x3ff, v0
	v_bfe_u32 v2, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[4:5], null, s14, s2, v[1:2]
	v_mad_u64_u32 v[0:1], null, s15, s3, v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e32 vcc_lo, s4, v4
	v_cmp_gt_i32_e64 s2, s6, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, vcc_lo, s2
	s_cmp_gt_i32 s5, 0
	s_cselect_b32 s3, -1, 0
	s_and_b32 s2, s2, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_3
; %bb.1:                                ; %.lr.ph
	s_load_b64 s[2:3], s[0:1], 0x10
	v_mad_u64_u32 v[1:2], null, v4, s6, v[0:1]
	v_mul_lo_u32 v4, v4, s5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v2, 31, v1
	v_ashrrev_i32_e32 v5, 31, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v2, vcc_lo, s2, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
	s_load_b128 s[0:3], s[0:1], 0x0
	global_load_b32 v6, v[2:3], off
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v4, vcc_lo, s0, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v5, vcc_lo
.LBB0_2:                                ; =>This Inner Loop Header: Depth=1
	v_ashrrev_i32_e32 v1, 31, v0
	s_add_i32 s5, s5, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_cmp_lg_u32 s5, 0
	v_lshlrev_b64 v[7:8], 2, v[0:1]
	v_add_nc_u32_e32 v0, s6, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v7, vcc_lo, s2, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s3, v8, vcc_lo
	global_load_b32 v1, v[4:5], off
	global_load_b32 v7, v[7:8], off
	v_add_co_u32 v4, vcc_lo, v4, 4
	v_add_co_ci_u32_e32 v5, vcc_lo, 0, v5, vcc_lo
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v6, v1, v7
	global_store_b32 v[2:3], v6, off
	s_cbranch_scc1 .LBB0_2
.LBB0_3:                                ; %.loopexit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z6MulGpuPfS_S_iii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z6MulGpuPfS_S_iii, .Lfunc_end0-_Z6MulGpuPfS_S_iii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 332
; NumSgprs: 18
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         44
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         52
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         54
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         56
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         58
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         60
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         62
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         104
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 296
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z6MulGpuPfS_S_iii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z6MulGpuPfS_S_iii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     9
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
