#include "merge_sort_cpu.cuh"

void mergeSortAscCpu(float* arr, int length, float* out)
{
	if (length < 2) {
		out[0] = arr[0];
		return;
	}
	//splitting of the arrays
	int halfSize = length / 2;

	int length_left = halfSize;
	int length_right = length - halfSize;

	float* leftPart = new float[length_left];
	float* rightPart = new float[length_right];

	for (int i = 0; i < length; i++)
	{
		if (i < halfSize)
		{
			//copying of the left part
			leftPart[i] = arr[i];
		}
		else {
			//copying of the right part
			rightPart[i - halfSize] = arr[i];
		}

	}

	float* out_left = new float[length_left];
	float* out_right = new float[length_right];

	mergeSortAscCpu(leftPart, length_left, out_left);
	mergeSortAscCpu(rightPart, length_right, out_right);

	float* out_temp = new float[length];
	
	mergeArraysAscCpu(out_left, out_right, length_left, length_right, out_temp);

	for (int i = 0; i < length; i++)
	{
		out[i] = out_temp[i];
	}
}

void mergeArraysAscCpu(float* arr_left, float* arr_right, int length_left, int length_right, float* out)
{
	int totalLength = length_left + length_right;

	//running indices
	int i = 0;
	int j = 0;
	int index = 0;

	while (i < length_left && j < length_right)
	{
		if (arr_left[i] <= arr_right[j])
		{
			out[index] = arr_left[i];
			i++;
			index++;
		}
		else {
			out[index] = arr_right[j];
			j++;
			index++;
		}
	}

	//only one of these two loops will run
	while (i < length_left)
	{
		out[index] = arr_left[i];
		index++;
		i++;
	}

	while (j < length_right)
	{
		out[index] = arr_right[j];
		index++;
		j++;
	}
}
	.file	"tmpxft_0023ed08_00000000-6_merge_sort_cpu.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2012:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2012:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z17mergeArraysAscCpuPfS_iiS_
	.type	_Z17mergeArraysAscCpuPfS_iiS_, @function
_Z17mergeArraysAscCpuPfS_iiS_:
.LFB2009:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movq	%rdi, %r11
	movq	%rsi, %r9
	movl	%ecx, %r10d
	movl	%edx, %esi
	xorl	%eax, %eax
	xorl	%edx, %edx
	xorl	%edi, %edi
.L3:
	cmpl	%esi, %edi
	movslq	%edi, %rcx
	jge	.L14
	cmpl	%r10d, %eax
	jge	.L14
	movss	(%r11,%rcx,4), %xmm0
	movslq	%eax, %rcx
	movss	(%r9,%rcx,4), %xmm1
	comiss	%xmm0, %xmm1
	jb	.L18
	incl	%edi
	jmp	.L6
.L18:
	incl	%eax
	movaps	%xmm1, %xmm0
.L6:
	movss	%xmm0, (%r8,%rdx,4)
	incq	%rdx
	jmp	.L3
.L14:
	movl	%edx, %ebx
	movslq	%edx, %rdx
.L9:
	cmpl	%ecx, %esi
	jle	.L21
	movss	(%r11,%rcx,4), %xmm0
	incq	%rcx
	movss	%xmm0, (%r8,%rdx,4)
	incq	%rdx
	jmp	.L9
.L21:
	movl	%esi, %edx
	xorl	%ecx, %ecx
	cltq
	subl	%edi, %edx
	cmpl	%esi, %edi
	cmovg	%ecx, %edx
	addl	%ebx, %edx
	movslq	%edx, %rdx
.L11:
	cmpl	%eax, %r10d
	jle	.L22
	movss	(%r9,%rax,4), %xmm0
	incq	%rax
	movss	%xmm0, (%r8,%rdx,4)
	incq	%rdx
	jmp	.L11
.L22:
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2009:
	.size	_Z17mergeArraysAscCpuPfS_iiS_, .-_Z17mergeArraysAscCpuPfS_iiS_
	.globl	_Z15mergeSortAscCpuPfiS_
	.type	_Z15mergeSortAscCpuPfiS_, @function
_Z15mergeSortAscCpuPfiS_:
.LFB2008:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rdx, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	cmpl	$1, %esi
	jg	.L24
	movss	(%rdi), %xmm0
	movss	%xmm0, (%rdx)
	jmp	.L23
.L24:
	movl	%esi, %ebp
	movl	%esi, %eax
	movq	%rdi, 24(%rsp)
	movl	%esi, %ebx
	sarl	%ebp
	movslq	%ebp, %r13
	subl	%ebp, %eax
	salq	$2, %r13
	movl	%eax, 12(%rsp)
	movq	%r13, %rdi
	call	_Znam@PLT
	movq	%rax, %r14
	movslq	12(%rsp), %rax
	salq	$2, %rax
	movq	%rax, %rdi
	movq	%rax, 16(%rsp)
	call	_Znam@PLT
	movq	24(%rsp), %r8
	movq	%rax, %r15
	xorl	%eax, %eax
.L28:
	movss	(%r8,%rax,4), %xmm0
	cmpl	%eax, %ebp
	jle	.L26
	movss	%xmm0, (%r14,%rax,4)
	jmp	.L27
.L26:
	movl	%eax, %edx
	subl	%ebp, %edx
	movslq	%edx, %rdx
	movss	%xmm0, (%r15,%rdx,4)
.L27:
	incq	%rax
	cmpl	%eax, %ebx
	jg	.L28
	movq	%r13, %rdi
	call	_Znam@PLT
	movq	16(%rsp), %rdi
	movq	%rax, 24(%rsp)
	call	_Znam@PLT
	movq	24(%rsp), %rdx
	movl	%ebp, %esi
	movq	%r14, %rdi
	movq	%rax, %r13
	call	_Z15mergeSortAscCpuPfiS_
	movl	12(%rsp), %esi
	movq	%r13, %rdx
	movq	%r15, %rdi
	call	_Z15mergeSortAscCpuPfiS_
	movslq	%ebx, %rdi
	salq	$2, %rdi
	call	_Znam@PLT
	movl	12(%rsp), %ecx
	movq	24(%rsp), %rdi
	movl	%ebp, %edx
	movq	%rax, %r8
	movq	%r13, %rsi
	call	_Z17mergeArraysAscCpuPfS_iiS_
	movl	%ebx, %ecx
	movq	%r12, %rdi
	movq	%r8, %rsi
	salq	$2, %rcx
	rep movsb
.L23:
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2008:
	.size	_Z15mergeSortAscCpuPfiS_, .-_Z15mergeSortAscCpuPfiS_
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2035:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	movq	%rax, %rdi
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2035:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
void mergeSortAscCpu(float* arr, int length, float* out);
void mergeArraysAscCpu(float* arr_left, float* arr_right, int length_left, int length_right, float* out);
	.text
	.file	"merge_sort_cpu.hip"
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_

	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.amdgpu_metadata
---
amdhsa.kernels:  []
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
