/* 
 * The function of this file implements Matrix Norm in GPU using CUDA.
 * 
 * input: N: the Matrix Size (required) 
 *        Random Seed : use for initial matrix value (not required)
 *
 * __global__ void kernel(float *d_A, float *d_B, int n) finish the function in GPU
 * 
 * d_A transfer data from host to device
 * d_B get the result from device to host
 *
 * @date : 3/9/2014
 */

/* ****** ADD YOUR CODE AT THE END OF THIS FILE. ******
 * You need not submit the provided code.
 */

#include <stdio.h>
#include <stdlib.h>
#include <unistd.h>
#include <math.h>
#include <sys/types.h>
#include <sys/times.h>
#include <sys/time.h>
#include <time.h>

/* Program Parameters */
#define MAXN 8000  /* Max value of N */
#define CHECK_ERR(x)                                    \
  if (x != cudaSuccess) {                               \
    fprintf(stderr,"%s in %s at line %d\n",             \
	    cudaGetErrorString(res),__FILE__,__LINE__);	\
    exit(-1);						\
  }                                                     \
  
int N;  /* Matrix size */
/* Matrices */
float A[MAXN][MAXN], B[MAXN][MAXN];

/* junk */
#define randm() 4|2[uid]&3

/* Prototype */
void matrixNorm();

/* returns a seed for srand based on the time */
unsigned int time_seed() {
  struct timeval t;
  struct timezone tzdummy;

  gettimeofday(&t, &tzdummy);
  return (unsigned int)(t.tv_usec);
}

/* Set the program parameters from the command-line arguments */
void parameters(int argc, char **argv) {
  int seed = 0;  /* Random seed */
  char uid[32]; /*User name */

  /* Read command-line arguments */
  srand(time_seed());  /* Randomize */

  if (argc == 3) {
    seed = atoi(argv[2]);
    srand(seed);
    printf("Random seed = %i\n", seed);
  } 
  if (argc >= 2) {
    N = atoi(argv[1]);
    if (N < 1 || N > MAXN) {
      printf("N = %i is out of range.\n", N);
      exit(0);
    }
  }
  else {
    printf("Usage: %s <matrix_dimension> [random seed]\n",
           argv[0]);    
    exit(0);
  }

  /* Print parameters */
  printf("\nMatrix dimension N = %i.\n", N);
}

/* Initialize A and B*/
void initialize_inputs() {
  int row, col;

  printf("\nInitializing...\n");
  for (col = 0; col < N; col++) {
    for (row = 0; row < N; row++) {
      A[row][col] = (float)rand() / 32768.0;
      B[row][col] = 0.0;
    }
  }

}

/* Print input matrices */
void print_inputs() {
  int row, col;

  if (N < 10) {
    printf("\nA =\n\t");
    for (row = 0; row < N; row++) {
      for (col = 0; col < N; col++) {
	    printf("%5.2f%s", A[row][col], (col < N-1) ? ", " : ";\n\t");
      }
    }
  }
}

void print_B() {
    int row, col;

    if (N < 10) {
        printf("\nB =\n\t");
        for (row = 0; row < N; row++) {
            for (col = 0; col < N; col++) {
                printf("%1.10f%s", B[row][col], (col < N-1) ? ", " : ";\n\t");
            }
        }
    }
}
//
__global__ void kernel(float *d_A, float *d_B, int n) {
	int tId = threadIdx.x;
	int blockId = blockIdx.x;
	float mu;
	float sigma;
	int i;
	
	//int index = threadIdx.x + blockIdx.x*blockDim.x;
	
	if( blockId < n){
			
		for(i=0; i<n; i++){
			mu += d_A[tId + i*n];
		}
		mu /= n;
		for(i=0; i<n; i++){
			sigma += powf((d_A[tId + i*n] - mu), 2.0);
		}
		
		sigma /= n;
		sigma = powf(sigma, 0.5);
		
		for(i=0; i<n; i++){
			if(sigma == 0.0){
				d_B[tId + i*n] = 0.0;
			}else{
				d_B[tId + i*n] = (d_A[tId + i*n] - mu)/sigma;
			}
		}
	
	}

}

int main(int argc, char **argv) {
  /* Timing variables */
  struct timeval etstart, etstop;  /* Elapsed times using gettimeofday() */
  struct timezone tzdummy;
  clock_t etstart2, etstop2;  /* Elapsed times using times() */
  unsigned long long usecstart, usecstop;
  struct tms cputstart, cputstop;  /* CPU times for my processes */

  /* Process program parameters */
  parameters(argc, argv);

  /* Initialize A and B */
  initialize_inputs();

  /* Print input matrices */
  print_inputs();

  /* Start Clock */
  printf("\nStarting clock.\n");
  gettimeofday(&etstart, &tzdummy);
  etstart2 = times(&cputstart);

  /* Gaussian Elimination */
  matrixNorm();
  
  /* Stop Clock */
  gettimeofday(&etstop, &tzdummy);
  etstop2 = times(&cputstop);
  printf("Stopped clock.\n");
  usecstart = (unsigned long long)etstart.tv_sec * 1000000 + etstart.tv_usec;
  usecstop = (unsigned long long)etstop.tv_sec * 1000000 + etstop.tv_usec;

  /* Display output */
  print_B();

  /* Display timing results */
  printf("\n Total Elapsed time = %g ms.\n",
	 (float)(usecstop - usecstart)/(float)1000);
  printf("(CPU times are accurate to the nearest %g ms)\n",
	 1.0/(float)CLOCKS_PER_SEC * 1000.0);
  printf("My total CPU time for parent = %g ms.\n",
	 (float)( (cputstop.tms_utime + cputstop.tms_stime) -
		  (cputstart.tms_utime + cputstart.tms_stime) ) /
	 (float)CLOCKS_PER_SEC * 1000);
  printf("My system CPU time for parent = %g ms.\n",
	 (float)(cputstop.tms_stime - cputstart.tms_stime) /
	 (float)CLOCKS_PER_SEC * 1000);
  printf("My total CPU time for child processes = %g ms.\n",
	 (float)( (cputstop.tms_cutime + cputstop.tms_cstime) -
		  (cputstart.tms_cutime + cputstart.tms_cstime) ) /
	 (float)CLOCKS_PER_SEC * 1000);
      /* Contrary to the man pages, this appears not to include the parent */
  printf("--------------------------------------------\n");
  
  exit(0);
}

/* ------------------ Above Was Provided --------------------- */

/****** You will replace this routine with your own parallel version *******/
/* Provided global variables are MAXN, N, A[][] and B[][],
 * defined in the beginning of this code.  B[][] is initialized to zeros.
 */
void matrixNorm(){
	cudaError_t res;
	float *d_A, *d_B;	
	float *h_A, *h_B;
	int i,j;
	int size = N*N*sizeof(float);
	
	h_A = (float*) malloc(size);
	h_B = (float*) malloc(size);
	
	for(i=0; i<N; i++){
		for(j=0; j<N; j++){
			h_A[i*N + j] = A[i][j];
		}
	}
	
	//allocate memory for d_A and d_B in the device
	res = cudaMalloc((void **) &d_A, size);
	CHECK_ERR(res);
	res = cudaMalloc((void **) &d_B, size);
	CHECK_ERR(res);

	//initial memory 
	//res = cudaMemset(d_A, 0, size);
	//CHECK_ERR(res);
	//res = cudaMemset(d_B, 0, size);
	//CHECK_ERR(res);

	//copy memory to device
	res = cudaMemcpy(d_A, h_A, size, cudaMemcpyHostToDevice);
	CHECK_ERR(res);
	res = cudaMemcpy(d_B, h_B, size, cudaMemcpyHostToDevice);
	CHECK_ERR(res);

	//calling the kernel
	int threadPerBlock = 128; 
	int blockPerGrid = ceil((float)(N*N)/(float)threadPerBlock);
	
	//printf("test... %d \n", blockPerGrid);
	kernel<<<blockPerGrid, threadPerBlock>>>(d_A, d_B, N);
	
	res = cudaMemcpy(h_B, d_B, size, cudaMemcpyDeviceToHost);
	CHECK_ERR(res);
	
	//free memeory
	cudaFree(d_A);
	cudaFree(d_B);
	
	for(i=0; i<N; i++){
		for(j=0; j<N; j++){
			B[i][j] = h_B[i*N+j];
		}
	}
 }
 
 
 


	.file	"tmpxft_0025e18b_00000000-6_gpuMatrixNorm.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2049:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2049:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z9time_seedv
	.type	_Z9time_seedv, @function
_Z9time_seedv:
.LFB2040:
	.cfi_startproc
	endbr64
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	%fs:40, %rax
	movq	%rax, 24(%rsp)
	xorl	%eax, %eax
	movq	%rsp, %rsi
	leaq	8(%rsp), %rdi
	call	gettimeofday@PLT
	movl	16(%rsp), %eax
	movq	24(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L3
	call	__stack_chk_fail@PLT
.L3:
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2040:
	.size	_Z9time_seedv, .-_Z9time_seedv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"Random seed = %i\n"
.LC1:
	.string	"N = %i is out of range.\n"
.LC2:
	.string	"Usage: %s <matrix_dimension> [random seed]\n"
.LC3:
	.string	"\nMatrix dimension N = %i.\n"
	.text
	.globl	_Z10parametersiPPc
	.type	_Z10parametersiPPc, @function
_Z10parametersiPPc:
.LFB2041:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movl	%edi, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	movq	%rsi, %rbx
	pushq	%r8
	.cfi_def_cfa_offset 32
	call	_Z9time_seedv
	movl	%eax, %edi
	call	srand@PLT
	cmpl	$3, %ebp
	jne	.L7
	movq	16(%rbx), %rdi
	call	atoi@PLT
	movl	%eax, %ebp
	movl	%eax, %edi
	call	srand@PLT
	movl	%ebp, %edx
	leaq	.LC0(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	jmp	.L8
.L7:
	decl	%ebp
	jle	.L9
.L8:
	movq	8(%rbx), %rdi
	call	atoi@PLT
	movl	%eax, N(%rip)
	movl	%eax, %edx
	leal	-1(%rax), %eax
	cmpl	$7999, %eax
	jbe	.L10
	leaq	.LC1(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	jmp	.L12
.L9:
	movq	(%rbx), %rdx
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L12:
	xorl	%edi, %edi
	call	exit@PLT
.L10:
	popq	%rcx
	.cfi_def_cfa_offset 24
	leaq	.LC3(%rip), %rsi
	popq	%rbx
	.cfi_def_cfa_offset 16
	movl	$2, %edi
	xorl	%eax, %eax
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	__printf_chk@PLT
	.cfi_endproc
.LFE2041:
	.size	_Z10parametersiPPc, .-_Z10parametersiPPc
	.section	.rodata.str1.1
.LC4:
	.string	"\nInitializing...\n"
	.text
	.globl	_Z17initialize_inputsv
	.type	_Z17initialize_inputsv, @function
_Z17initialize_inputsv:
.LFB2042:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	leaq	.LC4(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	leaq	A(%rip), %r13
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	xorl	%ebp, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	pushq	%rdx
	.cfi_def_cfa_offset 48
	call	__printf_chk@PLT
.L14:
	cmpl	%ebp, N(%rip)
	jle	.L13
	leaq	0(,%rbp,4), %rbx
	xorl	%r12d, %r12d
.L17:
	cmpl	%r12d, N(%rip)
	jle	.L19
	call	rand@PLT
	incl	%r12d
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC5(%rip), %xmm0
	leaq	B(%rip), %rax
	movl	$0x00000000, (%rax,%rbx)
	movss	%xmm0, 0(%r13,%rbx)
	addq	$32000, %rbx
	jmp	.L17
.L19:
	incq	%rbp
	jmp	.L14
.L13:
	popq	%rax
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2042:
	.size	_Z17initialize_inputsv, .-_Z17initialize_inputsv
	.section	.rodata.str1.1
.LC7:
	.string	", "
.LC8:
	.string	";\n\t"
.LC9:
	.string	"\nA =\n\t"
.LC10:
	.string	"%5.2f%s"
	.text
	.globl	_Z12print_inputsv
	.type	_Z12print_inputsv, @function
_Z12print_inputsv:
.LFB2043:
	.cfi_startproc
	endbr64
	cmpl	$9, N(%rip)
	jg	.L29
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	leaq	.LC9(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	leaq	.LC8(%rip), %r13
	leaq	A(%rip), %r12
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	xorl	%ebp, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	pushq	%rdx
	.cfi_def_cfa_offset 48
	call	__printf_chk@PLT
.L22:
	cmpl	N(%rip), %ebp
	jge	.L32
	xorl	%ebx, %ebx
.L25:
	movl	N(%rip), %eax
	cmpl	%ebx, %eax
	jle	.L33
	decl	%eax
	movl	$2, %edi
	leaq	.LC7(%rip), %rdx
	cvtss2sd	(%r12,%rbx,4), %xmm0
	cmpl	%ebx, %eax
	leaq	.LC10(%rip), %rsi
	movb	$1, %al
	cmovle	%r13, %rdx
	incq	%rbx
	call	__printf_chk@PLT
	jmp	.L25
.L33:
	incl	%ebp
	addq	$32000, %r12
	jmp	.L22
.L32:
	popq	%rax
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
.L29:
	.cfi_restore 3
	.cfi_restore 6
	.cfi_restore 12
	.cfi_restore 13
	ret
	.cfi_endproc
.LFE2043:
	.size	_Z12print_inputsv, .-_Z12print_inputsv
	.section	.rodata.str1.1
.LC11:
	.string	"\nB =\n\t"
.LC12:
	.string	"%1.10f%s"
	.text
	.globl	_Z7print_Bv
	.type	_Z7print_Bv, @function
_Z7print_Bv:
.LFB2044:
	.cfi_startproc
	endbr64
	cmpl	$9, N(%rip)
	jg	.L43
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	leaq	.LC11(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	leaq	.LC8(%rip), %r13
	leaq	B(%rip), %r12
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	xorl	%ebp, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	pushq	%rdx
	.cfi_def_cfa_offset 48
	call	__printf_chk@PLT
.L36:
	cmpl	N(%rip), %ebp
	jge	.L46
	xorl	%ebx, %ebx
.L39:
	movl	N(%rip), %eax
	cmpl	%ebx, %eax
	jle	.L47
	decl	%eax
	movl	$2, %edi
	leaq	.LC7(%rip), %rdx
	cvtss2sd	(%r12,%rbx,4), %xmm0
	cmpl	%ebx, %eax
	leaq	.LC12(%rip), %rsi
	movb	$1, %al
	cmovle	%r13, %rdx
	incq	%rbx
	call	__printf_chk@PLT
	jmp	.L39
.L47:
	incl	%ebp
	addq	$32000, %r12
	jmp	.L36
.L46:
	popq	%rax
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
.L43:
	.cfi_restore 3
	.cfi_restore 6
	.cfi_restore 12
	.cfi_restore 13
	ret
	.cfi_endproc
.LFE2044:
	.size	_Z7print_Bv, .-_Z7print_Bv
	.globl	_Z28__device_stub__Z6kernelPfS_iPfS_i
	.type	_Z28__device_stub__Z6kernelPfS_iPfS_i, @function
_Z28__device_stub__Z6kernelPfS_iPfS_i:
.LFB2071:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L48
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z6kernelPfS_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L48:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L50
	call	__stack_chk_fail@PLT
.L50:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2071:
	.size	_Z28__device_stub__Z6kernelPfS_iPfS_i, .-_Z28__device_stub__Z6kernelPfS_iPfS_i
	.globl	_Z6kernelPfS_i
	.type	_Z6kernelPfS_i, @function
_Z6kernelPfS_i:
.LFB2072:
	.cfi_startproc
	endbr64
	jmp	_Z28__device_stub__Z6kernelPfS_iPfS_i
	.cfi_endproc
.LFE2072:
	.size	_Z6kernelPfS_i, .-_Z6kernelPfS_i
	.section	.rodata.str1.1
.LC13:
	.string	"/home/ubuntu/Datasets/stackv2/train-structured/zhuweiwu/computer_parallel/master/CUDA/gpuMatrixNorm.cu"
.LC14:
	.string	"%s in %s at line %d\n"
	.text
	.globl	_Z10matrixNormv
	.type	_Z10matrixNormv, @function
_Z10matrixNormv:
.LFB2046:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	subq	$56, %rsp
	.cfi_def_cfa_offset 96
	movl	N(%rip), %r12d
	movq	%fs:40, %rax
	movq	%rax, 40(%rsp)
	xorl	%eax, %eax
	movl	%r12d, %ebx
	imull	%r12d, %ebx
	sall	$2, %ebx
	movslq	%ebx, %rbx
	movq	%rbx, %rdi
	call	malloc@PLT
	movq	%rbx, %rdi
	movq	%rax, %r13
	call	malloc@PLT
	movslq	%r12d, %r9
	leal	-1(%r12), %ecx
	xorl	%r8d, %r8d
	movq	%rax, %rbp
	salq	$2, %r9
	movq	%r13, %rax
	leaq	A(%rip), %rdx
	leaq	4(,%rcx,4), %r10
.L54:
	cmpl	%r8d, %r12d
	jle	.L67
	movq	%rax, %rdi
	movq	%rdx, %rsi
	movq	%r10, %rcx
	incl	%r8d
	rep movsb
	addq	%r9, %rax
	addq	$32000, %rdx
	jmp	.L54
.L67:
	movq	%rsp, %rdi
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L56
	call	cudaGetErrorString@PLT
	movl	$242, %r9d
	movq	%rax, %rcx
	jmp	.L66
.L56:
	leaq	8(%rsp), %rdi
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L57
	call	cudaGetErrorString@PLT
	movl	$244, %r9d
	movq	%rax, %rcx
.L66:
	movq	stderr(%rip), %rdi
	leaq	.LC13(%rip), %r8
	leaq	.LC14(%rip), %rdx
	xorl	%eax, %eax
	movl	$2, %esi
	call	__fprintf_chk@PLT
	orl	$-1, %edi
	call	exit@PLT
.L57:
	movq	(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rdx
	movq	%r13, %rsi
	call	cudaMemcpy@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L58
	call	cudaGetErrorString@PLT
	movl	$254, %r9d
	movq	%rax, %rcx
	jmp	.L66
.L58:
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rdx
	movq	%rbp, %rsi
	call	cudaMemcpy@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L59
	call	cudaGetErrorString@PLT
	movl	$256, %r9d
	movq	%rax, %rcx
	jmp	.L66
.L59:
	movl	N(%rip), %eax
	imull	%eax, %eax
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC15(%rip), %xmm0
	call	ceilf@PLT
	movl	$33554433, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	cvttss2sil	%xmm0, %eax
	salq	$7, %rdx
	movl	$1, %ecx
	movl	%eax, 16(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 20(%rsp)
	movq	16(%rsp), %rdi
	movl	24(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L60
	movl	N(%rip), %edx
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdi
	call	_Z28__device_stub__Z6kernelPfS_iPfS_i
.L60:
	movq	8(%rsp), %rsi
	movq	%rbp, %rdi
	movl	$2, %ecx
	movq	%rbx, %rdx
	call	cudaMemcpy@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L61
	call	cudaGetErrorString@PLT
	movl	$266, %r9d
	movq	%rax, %rcx
	jmp	.L66
.L61:
	movq	(%rsp), %rdi
	call	cudaFree@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movslq	N(%rip), %r10
	leaq	B(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%r10, %r9
	salq	$2, %r10
	leal	-1(%r9), %ecx
	leaq	4(,%rcx,4), %r11
.L62:
	cmpl	%r8d, %r9d
	jle	.L68
	movq	%rdx, %rdi
	movq	%rbp, %rsi
	movq	%r11, %rcx
	incl	%r8d
	rep movsb
	addq	$32000, %rdx
	addq	%r10, %rbp
	jmp	.L62
.L68:
	movq	40(%rsp), %rax
	subq	%fs:40, %rax
	je	.L64
	call	__stack_chk_fail@PLT
.L64:
	addq	$56, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2046:
	.size	_Z10matrixNormv, .-_Z10matrixNormv
	.section	.rodata.str1.1
.LC16:
	.string	"\nStarting clock.\n"
.LC17:
	.string	"Stopped clock.\n"
.LC19:
	.string	"\n Total Elapsed time = %g ms.\n"
.LC21:
	.string	"(CPU times are accurate to the nearest %g ms)\n"
.LC23:
	.string	"My total CPU time for parent = %g ms.\n"
.LC24:
	.string	"My system CPU time for parent = %g ms.\n"
.LC25:
	.string	"My total CPU time for child processes = %g ms.\n"
.LC26:
	.string	"--------------------------------------------\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2045:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	subq	$112, %rsp
	.cfi_def_cfa_offset 144
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	movq	%rsp, %rbx
	call	_Z10parametersiPPc
	call	_Z17initialize_inputsv
	call	_Z12print_inputsv
	leaq	.LC16(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	%rbx, %rsi
	leaq	8(%rsp), %rdi
	call	gettimeofday@PLT
	leaq	40(%rsp), %rdi
	call	times@PLT
	call	_Z10matrixNormv
	movq	%rbx, %rsi
	leaq	24(%rsp), %rdi
	call	gettimeofday@PLT
	leaq	72(%rsp), %rdi
	call	times@PLT
	leaq	.LC17(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	32(%rsp), %rbx
	imulq	$1000000, 8(%rsp), %r12
	imulq	$1000000, 24(%rsp), %rbp
	subq	16(%rsp), %rbp
	call	_Z7print_Bv
	leaq	(%rbx,%rbp), %rax
	subq	%r12, %rax
	js	.L70
	cvtsi2ssq	%rax, %xmm0
	jmp	.L71
.L70:
	movq	%rax, %rdx
	andl	$1, %eax
	shrq	%rdx
	orq	%rax, %rdx
	cvtsi2ssq	%rdx, %xmm0
	addss	%xmm0, %xmm0
.L71:
	leaq	.LC19(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	divss	.LC18(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	call	__printf_chk@PLT
	movl	$2, %edi
	movb	$1, %al
	movsd	.LC20(%rip), %xmm0
	leaq	.LC21(%rip), %rsi
	call	__printf_chk@PLT
	movq	80(%rsp), %rax
	addq	72(%rsp), %rax
	leaq	.LC23(%rip), %rsi
	subq	48(%rsp), %rax
	subq	40(%rsp), %rax
	movl	$2, %edi
	cvtsi2ssq	%rax, %xmm0
	divss	.LC22(%rip), %xmm0
	movb	$1, %al
	mulss	.LC18(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	call	__printf_chk@PLT
	movq	80(%rsp), %rax
	subq	48(%rsp), %rax
	cvtsi2ssq	%rax, %xmm0
	divss	.LC22(%rip), %xmm0
	leaq	.LC24(%rip), %rsi
	movl	$2, %edi
	mulss	.LC18(%rip), %xmm0
	movb	$1, %al
	cvtss2sd	%xmm0, %xmm0
	call	__printf_chk@PLT
	movq	96(%rsp), %rax
	addq	88(%rsp), %rax
	subq	64(%rsp), %rax
	subq	56(%rsp), %rax
	movl	$2, %edi
	cvtsi2ssq	%rax, %xmm0
	divss	.LC22(%rip), %xmm0
	leaq	.LC25(%rip), %rsi
	movb	$1, %al
	mulss	.LC18(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	call	__printf_chk@PLT
	movl	$2, %edi
	xorl	%eax, %eax
	leaq	.LC26(%rip), %rsi
	call	__printf_chk@PLT
	xorl	%edi, %edi
	call	exit@PLT
	.cfi_endproc
.LFE2045:
	.size	main, .-main
	.section	.rodata.str1.1
.LC27:
	.string	"_Z6kernelPfS_i"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2074:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC27(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z6kernelPfS_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2074:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.globl	B
	.bss
	.align 32
	.type	B, @object
	.size	B, 256000000
B:
	.zero	256000000
	.globl	A
	.align 32
	.type	A, @object
	.size	A, 256000000
A:
	.zero	256000000
	.globl	N
	.align 4
	.type	N, @object
	.size	N, 4
N:
	.zero	4
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC5:
	.long	939524096
	.align 4
.LC15:
	.long	1006632960
	.align 4
.LC18:
	.long	1148846080
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC20:
	.long	-755914244
	.long	1062232653
	.section	.rodata.cst4
	.align 4
.LC22:
	.long	1232348160
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

/* 
 * The function of this file implements Matrix Norm in GPU using CUDA.
 * 
 * input: N: the Matrix Size (required) 
 *        Random Seed : use for initial matrix value (not required)
 *
 * __global__ void kernel(float *d_A, float *d_B, int n) finish the function in GPU
 * 
 * d_A transfer data from host to device
 * d_B get the result from device to host
 *
 * @date : 3/9/2014
 */

/* ****** ADD YOUR CODE AT THE END OF THIS FILE. ******
 * You need not submit the provided code.
 */


#include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <unistd.h>
#include <math.h>
#include <sys/types.h>
#include <sys/times.h>
#include <sys/time.h>
#include <time.h>

/* Program Parameters */
#define MAXN 8000  /* Max value of N */
#define CHECK_ERR(x)                                    \
  if (x != hipSuccess) {                               \
    fprintf(stderr,"%s in %s at line %d\n",             \
	    hipGetErrorString(res),__FILE__,__LINE__);	\
    exit(-1);						\
  }                                                     \
  
int N;  /* Matrix size */
/* Matrices */
float A[MAXN][MAXN], B[MAXN][MAXN];

/* junk */
#define randm() 4|2[uid]&3

/* Prototype */
void matrixNorm();

/* returns a seed for srand based on the time */
unsigned int time_seed() {
  struct timeval t;
  struct timezone tzdummy;

  gettimeofday(&t, &tzdummy);
  return (unsigned int)(t.tv_usec);
}

/* Set the program parameters from the command-line arguments */
void parameters(int argc, char **argv) {
  int seed = 0;  /* Random seed */
  char uid[32]; /*User name */

  /* Read command-line arguments */
  srand(time_seed());  /* Randomize */

  if (argc == 3) {
    seed = atoi(argv[2]);
    srand(seed);
    printf("Random seed = %i\n", seed);
  } 
  if (argc >= 2) {
    N = atoi(argv[1]);
    if (N < 1 || N > MAXN) {
      printf("N = %i is out of range.\n", N);
      exit(0);
    }
  }
  else {
    printf("Usage: %s <matrix_dimension> [random seed]\n",
           argv[0]);    
    exit(0);
  }

  /* Print parameters */
  printf("\nMatrix dimension N = %i.\n", N);
}

/* Initialize A and B*/
void initialize_inputs() {
  int row, col;

  printf("\nInitializing...\n");
  for (col = 0; col < N; col++) {
    for (row = 0; row < N; row++) {
      A[row][col] = (float)rand() / 32768.0;
      B[row][col] = 0.0;
    }
  }

}

/* Print input matrices */
void print_inputs() {
  int row, col;

  if (N < 10) {
    printf("\nA =\n\t");
    for (row = 0; row < N; row++) {
      for (col = 0; col < N; col++) {
	    printf("%5.2f%s", A[row][col], (col < N-1) ? ", " : ";\n\t");
      }
    }
  }
}

void print_B() {
    int row, col;

    if (N < 10) {
        printf("\nB =\n\t");
        for (row = 0; row < N; row++) {
            for (col = 0; col < N; col++) {
                printf("%1.10f%s", B[row][col], (col < N-1) ? ", " : ";\n\t");
            }
        }
    }
}
//
__global__ void kernel(float *d_A, float *d_B, int n) {
	int tId = threadIdx.x;
	int blockId = blockIdx.x;
	float mu;
	float sigma;
	int i;
	
	//int index = threadIdx.x + blockIdx.x*blockDim.x;
	
	if( blockId < n){
			
		for(i=0; i<n; i++){
			mu += d_A[tId + i*n];
		}
		mu /= n;
		for(i=0; i<n; i++){
			sigma += powf((d_A[tId + i*n] - mu), 2.0);
		}
		
		sigma /= n;
		sigma = powf(sigma, 0.5);
		
		for(i=0; i<n; i++){
			if(sigma == 0.0){
				d_B[tId + i*n] = 0.0;
			}else{
				d_B[tId + i*n] = (d_A[tId + i*n] - mu)/sigma;
			}
		}
	
	}

}

int main(int argc, char **argv) {
  /* Timing variables */
  struct timeval etstart, etstop;  /* Elapsed times using gettimeofday() */
  struct timezone tzdummy;
  clock_t etstart2, etstop2;  /* Elapsed times using times() */
  unsigned long long usecstart, usecstop;
  struct tms cputstart, cputstop;  /* CPU times for my processes */

  /* Process program parameters */
  parameters(argc, argv);

  /* Initialize A and B */
  initialize_inputs();

  /* Print input matrices */
  print_inputs();

  /* Start Clock */
  printf("\nStarting clock.\n");
  gettimeofday(&etstart, &tzdummy);
  etstart2 = times(&cputstart);

  /* Gaussian Elimination */
  matrixNorm();
  
  /* Stop Clock */
  gettimeofday(&etstop, &tzdummy);
  etstop2 = times(&cputstop);
  printf("Stopped clock.\n");
  usecstart = (unsigned long long)etstart.tv_sec * 1000000 + etstart.tv_usec;
  usecstop = (unsigned long long)etstop.tv_sec * 1000000 + etstop.tv_usec;

  /* Display output */
  print_B();

  /* Display timing results */
  printf("\n Total Elapsed time = %g ms.\n",
	 (float)(usecstop - usecstart)/(float)1000);
  printf("(CPU times are accurate to the nearest %g ms)\n",
	 1.0/(float)CLOCKS_PER_SEC * 1000.0);
  printf("My total CPU time for parent = %g ms.\n",
	 (float)( (cputstop.tms_utime + cputstop.tms_stime) -
		  (cputstart.tms_utime + cputstart.tms_stime) ) /
	 (float)CLOCKS_PER_SEC * 1000);
  printf("My system CPU time for parent = %g ms.\n",
	 (float)(cputstop.tms_stime - cputstart.tms_stime) /
	 (float)CLOCKS_PER_SEC * 1000);
  printf("My total CPU time for child processes = %g ms.\n",
	 (float)( (cputstop.tms_cutime + cputstop.tms_cstime) -
		  (cputstart.tms_cutime + cputstart.tms_cstime) ) /
	 (float)CLOCKS_PER_SEC * 1000);
      /* Contrary to the man pages, this appears not to include the parent */
  printf("--------------------------------------------\n");
  
  exit(0);
}

/* ------------------ Above Was Provided --------------------- */

/****** You will replace this routine with your own parallel version *******/
/* Provided global variables are MAXN, N, A[][] and B[][],
 * defined in the beginning of this code.  B[][] is initialized to zeros.
 */
void matrixNorm(){
	hipError_t res;
	float *d_A, *d_B;	
	float *h_A, *h_B;
	int i,j;
	int size = N*N*sizeof(float);
	
	h_A = (float*) malloc(size);
	h_B = (float*) malloc(size);
	
	for(i=0; i<N; i++){
		for(j=0; j<N; j++){
			h_A[i*N + j] = A[i][j];
		}
	}
	
	//allocate memory for d_A and d_B in the device
	res = hipMalloc((void **) &d_A, size);
	CHECK_ERR(res);
	res = hipMalloc((void **) &d_B, size);
	CHECK_ERR(res);

	//initial memory 
	//res = cudaMemset(d_A, 0, size);
	//CHECK_ERR(res);
	//res = cudaMemset(d_B, 0, size);
	//CHECK_ERR(res);

	//copy memory to device
	res = hipMemcpy(d_A, h_A, size, hipMemcpyHostToDevice);
	CHECK_ERR(res);
	res = hipMemcpy(d_B, h_B, size, hipMemcpyHostToDevice);
	CHECK_ERR(res);

	//calling the kernel
	int threadPerBlock = 128; 
	int blockPerGrid = ceil((float)(N*N)/(float)threadPerBlock);
	
	//printf("test... %d \n", blockPerGrid);
	kernel<<<blockPerGrid, threadPerBlock>>>(d_A, d_B, N);
	
	res = hipMemcpy(h_B, d_B, size, hipMemcpyDeviceToHost);
	CHECK_ERR(res);
	
	//free memeory
	hipFree(d_A);
	hipFree(d_B);
	
	for(i=0; i<N; i++){
		for(j=0; j<N; j++){
			B[i][j] = h_B[i*N+j];
		}
	}
 }
 
 
 


	.text
	.file	"gpuMatrixNorm.hip"
	.globl	_Z9time_seedv                   # -- Begin function _Z9time_seedv
	.type	_Z9time_seedv,@function
_Z9time_seedv:                          # @_Z9time_seedv
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	leaq	16(%rsp), %rbx
	leaq	8(%rsp), %rsi
	movq	%rbx, %rdi
	callq	gettimeofday
	movl	8(%rbx), %eax
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z9time_seedv, .Lfunc_end0-_Z9time_seedv
	.cfi_endproc
                                        # -- End function
	.globl	_Z10parametersiPPc              # -- Begin function _Z10parametersiPPc
	.type	_Z10parametersiPPc,@function
_Z10parametersiPPc:                     # @_Z10parametersiPPc
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$32, %rsp
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %rbx
	movl	%edi, %ebp
	leaq	16(%rsp), %r14
	leaq	8(%rsp), %rsi
	movq	%r14, %rdi
	callq	gettimeofday
	movl	8(%r14), %edi
	callq	srand
	cmpl	$3, %ebp
	jne	.LBB1_2
# %bb.1:                                # %.thread
	movq	16(%rbx), %rdi
	callq	atoi
	movl	%eax, %ebp
	movl	%eax, %edi
	callq	srand
	movl	$.L.str, %edi
	movl	%ebp, %esi
	xorl	%eax, %eax
	callq	printf
	jmp	.LBB1_3
.LBB1_2:
	cmpl	$2, %ebp
	jl	.LBB1_7
.LBB1_3:
	movq	8(%rbx), %rdi
	callq	atoi
	movl	%eax, N(%rip)
	movl	$-8001, %ecx                    # imm = 0xE0BF
	movl	%eax, %edx
	addl	%ecx, %edx
	cmpl	%ecx, %edx
	jbe	.LBB1_5
# %bb.4:
	movl	$.L.str.3, %edi
	movl	%eax, %esi
	xorl	%eax, %eax
	addq	$32, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	printf                          # TAILCALL
.LBB1_5:
	.cfi_def_cfa_offset 64
	movl	$.L.str.1, %edi
	movl	%eax, %esi
	xorl	%eax, %eax
	callq	printf
	jmp	.LBB1_6
.LBB1_7:
	movq	(%rbx), %rsi
	movl	$.L.str.2, %edi
	xorl	%eax, %eax
	callq	printf
.LBB1_6:
	xorl	%edi, %edi
	callq	exit
.Lfunc_end1:
	.size	_Z10parametersiPPc, .Lfunc_end1-_Z10parametersiPPc
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z17initialize_inputsv
.LCPI2_0:
	.long	0x38000000                      # float 3.05175781E-5
	.text
	.globl	_Z17initialize_inputsv
	.type	_Z17initialize_inputsv,@function
_Z17initialize_inputsv:                 # @_Z17initialize_inputsv
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	$.Lstr, %edi
	callq	puts@PLT
	movl	N(%rip), %eax
	testl	%eax, %eax
	jle	.LBB2_6
# %bb.1:                                # %.preheader.preheader
	xorl	%ebx, %ebx
	xorl	%r14d, %r14d
.LBB2_2:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_4 Depth 2
	testl	%eax, %eax
	jle	.LBB2_7
# %bb.3:                                # %.lr.ph.preheader
                                        #   in Loop: Header=BB2_2 Depth=1
	movq	%rbx, %r15
	xorl	%r12d, %r12d
.LBB2_4:                                # %.lr.ph
                                        #   Parent Loop BB2_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	callq	rand
	movss	.LCPI2_0(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	%xmm1, %xmm0
	movss	%xmm0, A(%r15)
	movl	$0, B(%r15)
	incq	%r12
	movl	N(%rip), %eax
	movslq	%eax, %rcx
	addq	$32000, %r15                    # imm = 0x7D00
	cmpq	%rcx, %r12
	jl	.LBB2_4
	jmp	.LBB2_5
.LBB2_7:                                # %.preheader.._crit_edge_crit_edge
                                        #   in Loop: Header=BB2_2 Depth=1
	movslq	%eax, %rcx
.LBB2_5:                                # %._crit_edge
                                        #   in Loop: Header=BB2_2 Depth=1
	incq	%r14
	addq	$4, %rbx
	cmpq	%rcx, %r14
	jl	.LBB2_2
.LBB2_6:                                # %._crit_edge11
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z17initialize_inputsv, .Lfunc_end2-_Z17initialize_inputsv
	.cfi_endproc
                                        # -- End function
	.globl	_Z12print_inputsv               # -- Begin function _Z12print_inputsv
	.type	_Z12print_inputsv,@function
_Z12print_inputsv:                      # @_Z12print_inputsv
	.cfi_startproc
# %bb.0:
	cmpl	$9, N(%rip)
	jg	.LBB3_8
# %bb.1:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	$.L.str.5, %edi
	xorl	%eax, %eax
	callq	printf
	movl	N(%rip), %eax
	testl	%eax, %eax
	jle	.LBB3_7
# %bb.2:                                # %.preheader.preheader
	movl	$A, %ebx
	xorl	%r14d, %r14d
	movl	$.L.str.7, %r15d
.LBB3_3:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_5 Depth 2
	testl	%eax, %eax
	jle	.LBB3_9
# %bb.4:                                # %.lr.ph.preheader
                                        #   in Loop: Header=BB3_3 Depth=1
	xorl	%r12d, %r12d
.LBB3_5:                                # %.lr.ph
                                        #   Parent Loop BB3_3 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rbx,%r12,4), %xmm0
	decl	%eax
	cltq
	cmpq	%rax, %r12
	movl	$.L.str.8, %esi
	cmovlq	%r15, %rsi
	movl	$.L.str.6, %edi
	movb	$1, %al
	callq	printf
	incq	%r12
	movl	N(%rip), %eax
	movslq	%eax, %rcx
	cmpq	%rcx, %r12
	jl	.LBB3_5
	jmp	.LBB3_6
.LBB3_9:                                # %.preheader.._crit_edge_crit_edge
                                        #   in Loop: Header=BB3_3 Depth=1
	movslq	%eax, %rcx
.LBB3_6:                                # %._crit_edge
                                        #   in Loop: Header=BB3_3 Depth=1
	incq	%r14
	addq	$32000, %rbx                    # imm = 0x7D00
	cmpq	%rcx, %r14
	jl	.LBB3_3
.LBB3_7:
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r12
	.cfi_restore %r14
	.cfi_restore %r15
.LBB3_8:                                # %.loopexit
	retq
.Lfunc_end3:
	.size	_Z12print_inputsv, .Lfunc_end3-_Z12print_inputsv
	.cfi_endproc
                                        # -- End function
	.globl	_Z7print_Bv                     # -- Begin function _Z7print_Bv
	.type	_Z7print_Bv,@function
_Z7print_Bv:                            # @_Z7print_Bv
	.cfi_startproc
# %bb.0:
	cmpl	$9, N(%rip)
	jg	.LBB4_8
# %bb.1:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	$.L.str.9, %edi
	xorl	%eax, %eax
	callq	printf
	movl	N(%rip), %eax
	testl	%eax, %eax
	jle	.LBB4_7
# %bb.2:                                # %.preheader.preheader
	movl	$B, %ebx
	xorl	%r14d, %r14d
	movl	$.L.str.7, %r15d
.LBB4_3:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB4_5 Depth 2
	testl	%eax, %eax
	jle	.LBB4_9
# %bb.4:                                # %.lr.ph.preheader
                                        #   in Loop: Header=BB4_3 Depth=1
	xorl	%r12d, %r12d
.LBB4_5:                                # %.lr.ph
                                        #   Parent Loop BB4_3 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rbx,%r12,4), %xmm0
	decl	%eax
	cltq
	cmpq	%rax, %r12
	movl	$.L.str.8, %esi
	cmovlq	%r15, %rsi
	movl	$.L.str.10, %edi
	movb	$1, %al
	callq	printf
	incq	%r12
	movl	N(%rip), %eax
	movslq	%eax, %rcx
	cmpq	%rcx, %r12
	jl	.LBB4_5
	jmp	.LBB4_6
.LBB4_9:                                # %.preheader.._crit_edge_crit_edge
                                        #   in Loop: Header=BB4_3 Depth=1
	movslq	%eax, %rcx
.LBB4_6:                                # %._crit_edge
                                        #   in Loop: Header=BB4_3 Depth=1
	incq	%r14
	addq	$32000, %rbx                    # imm = 0x7D00
	cmpq	%rcx, %r14
	jl	.LBB4_3
.LBB4_7:
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r12
	.cfi_restore %r14
	.cfi_restore %r15
.LBB4_8:                                # %.loopexit
	retq
.Lfunc_end4:
	.size	_Z7print_Bv, .Lfunc_end4-_Z7print_Bv
	.cfi_endproc
                                        # -- End function
	.globl	_Z21__device_stub__kernelPfS_i  # -- Begin function _Z21__device_stub__kernelPfS_i
	.type	_Z21__device_stub__kernelPfS_i,@function
_Z21__device_stub__kernelPfS_i:         # @_Z21__device_stub__kernelPfS_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z6kernelPfS_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	_Z21__device_stub__kernelPfS_i, .Lfunc_end5-_Z21__device_stub__kernelPfS_i
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI6_0:
	.long	0x447a0000                      # float 1000
.LCPI6_2:
	.long	0x49742400                      # float 1.0E+6
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0
.LCPI6_1:
	.quad	0x3f50624dd2f1a9fc              # double 0.001
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$112, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	callq	_Z10parametersiPPc
	callq	_Z17initialize_inputsv
	callq	_Z12print_inputsv
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	leaq	96(%rsp), %rbx
	leaq	72(%rsp), %r14
	movq	%rbx, %rdi
	movq	%r14, %rsi
	callq	gettimeofday
	leaq	40(%rsp), %rdi
	callq	times
	callq	_Z10matrixNormv
	leaq	80(%rsp), %r15
	movq	%r15, %rdi
	movq	%r14, %rsi
	callq	gettimeofday
	leaq	8(%rsp), %rdi
	callq	times
	movl	$.Lstr.2, %edi
	callq	puts@PLT
	movq	(%r15), %r14
	movq	8(%r15), %r15
	subq	(%rbx), %r14
	subq	8(%rbx), %r15
	callq	_Z7print_Bv
	imulq	$1000000, %r14, %rax            # imm = 0xF4240
	addq	%r15, %rax
	js	.LBB6_1
# %bb.2:
	cvtsi2ss	%rax, %xmm0
	jmp	.LBB6_3
.LBB6_1:
	movq	%rax, %rcx
	shrq	%rcx
	andl	$1, %eax
	orq	%rcx, %rax
	cvtsi2ss	%rax, %xmm0
	addss	%xmm0, %xmm0
.LBB6_3:
	divss	.LCPI6_0(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	movl	$.L.str.13, %edi
	movb	$1, %al
	callq	printf
	movsd	.LCPI6_1(%rip), %xmm0           # xmm0 = mem[0],zero
	movl	$.L.str.14, %edi
	movb	$1, %al
	callq	printf
	movq	16(%rsp), %rbx
	movq	48(%rsp), %r14
	movq	8(%rsp), %rax
	addq	%rbx, %rax
	movq	40(%rsp), %rcx
	addq	%r14, %rcx
	subq	%rcx, %rax
	xorps	%xmm0, %xmm0
	cvtsi2ss	%rax, %xmm0
	divss	.LCPI6_2(%rip), %xmm0
	mulss	.LCPI6_0(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	movl	$.L.str.15, %edi
	movb	$1, %al
	callq	printf
	subq	%r14, %rbx
	xorps	%xmm0, %xmm0
	cvtsi2ss	%rbx, %xmm0
	divss	.LCPI6_2(%rip), %xmm0
	mulss	.LCPI6_0(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	movl	$.L.str.16, %edi
	movb	$1, %al
	callq	printf
	movq	32(%rsp), %rax
	movq	56(%rsp), %rcx
	addq	24(%rsp), %rax
	addq	64(%rsp), %rcx
	subq	%rcx, %rax
	xorps	%xmm0, %xmm0
	cvtsi2ss	%rax, %xmm0
	divss	.LCPI6_2(%rip), %xmm0
	mulss	.LCPI6_0(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	movl	$.L.str.17, %edi
	movb	$1, %al
	callq	printf
	movl	$.Lstr.3, %edi
	callq	puts@PLT
	xorl	%edi, %edi
	callq	exit
.Lfunc_end6:
	.size	main, .Lfunc_end6-main
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z10matrixNormv
.LCPI7_0:
	.long	0x3c000000                      # float 0.0078125
	.text
	.globl	_Z10matrixNormv
	.type	_Z10matrixNormv,@function
_Z10matrixNormv:                        # @_Z10matrixNormv
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	N(%rip), %r13d
	movl	%r13d, %eax
	imull	%r13d, %eax
	shll	$2, %eax
	movslq	%eax, %rbx
	movq	%rbx, %rdi
	callq	malloc
	movq	%rax, %r15
	movq	%rbx, 32(%rsp)                  # 8-byte Spill
	movq	%rbx, %rdi
	callq	malloc
	movq	%rax, 24(%rsp)                  # 8-byte Spill
	testl	%r13d, %r13d
	jle	.LBB7_3
# %bb.1:                                # %.preheader59.lr.ph
	leaq	(,%r13,4), %r12
	imulq	$32000, %r13, %rbp              # imm = 0x7D00
	xorl	%r14d, %r14d
	xorl	%ebx, %ebx
.LBB7_2:                                # %._crit_edge
                                        # =>This Inner Loop Header: Depth=1
	leaq	A(%r14), %rsi
	movl	%ebx, %eax
	leaq	(%r15,%rax,4), %rdi
	movq	%r12, %rdx
	callq	memcpy@PLT
	addl	%r13d, %ebx
	addq	$32000, %r14                    # imm = 0x7D00
	cmpq	%r14, %rbp
	jne	.LBB7_2
.LBB7_3:                                # %._crit_edge62
	leaq	16(%rsp), %rdi
	movq	32(%rsp), %rbx                  # 8-byte Reload
	movq	%rbx, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB7_4
# %bb.6:
	leaq	8(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB7_7
# %bb.8:
	movq	16(%rsp), %rdi
	movq	%r15, %rsi
	movq	%rbx, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	movq	24(%rsp), %rbp                  # 8-byte Reload
	jne	.LBB7_9
# %bb.10:
	movq	8(%rsp), %rdi
	movq	%rbp, %rsi
	movq	%rbx, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB7_11
# %bb.12:
	movl	N(%rip), %eax
	imull	%eax, %eax
	cvtsi2ss	%eax, %xmm0
	mulss	.LCPI7_0(%rip), %xmm0
	callq	ceilf@PLT
	cvttss2si	%xmm0, %edi
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$128, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB7_14
# %bb.13:
	movq	16(%rsp), %rdi
	movq	8(%rsp), %rsi
	movl	N(%rip), %edx
	callq	_Z21__device_stub__kernelPfS_i
.LBB7_14:
	movq	8(%rsp), %rsi
	movq	%rbp, %rdi
	movq	%rbx, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB7_15
# %bb.16:
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movl	N(%rip), %r15d
	testl	%r15d, %r15d
	jle	.LBB7_19
# %bb.17:                               # %.preheader.lr.ph
	leaq	(,%r15,4), %r14
	imulq	$32000, %r15, %r12              # imm = 0x7D00
	xorl	%r13d, %r13d
	xorl	%ebx, %ebx
.LBB7_18:                               # %._crit_edge65
                                        # =>This Inner Loop Header: Depth=1
	movl	%ebx, %eax
	leaq	(,%rax,4), %rsi
	addq	%rbp, %rsi
	leaq	B(%r13), %rdi
	movq	%r14, %rdx
	callq	memcpy@PLT
	addl	%r15d, %ebx
	addq	$32000, %r13                    # imm = 0x7D00
	cmpq	%r13, %r12
	jne	.LBB7_18
.LBB7_19:                               # %._crit_edge67
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB7_4:
	.cfi_def_cfa_offset 96
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.19, %esi
	movl	$.L.str.20, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$244, %r8d
	jmp	.LBB7_5
.LBB7_7:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.19, %esi
	movl	$.L.str.20, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$246, %r8d
	jmp	.LBB7_5
.LBB7_9:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.19, %esi
	movl	$.L.str.20, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$256, %r8d                      # imm = 0x100
	jmp	.LBB7_5
.LBB7_11:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.19, %esi
	movl	$.L.str.20, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$258, %r8d                      # imm = 0x102
	jmp	.LBB7_5
.LBB7_15:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.19, %esi
	movl	$.L.str.20, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$268, %r8d                      # imm = 0x10C
.LBB7_5:
	xorl	%eax, %eax
	callq	fprintf
	movl	$-1, %edi
	callq	exit
.Lfunc_end7:
	.size	_Z10matrixNormv, .Lfunc_end7-_Z10matrixNormv
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB8_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB8_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z6kernelPfS_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end8:
	.size	__hip_module_ctor, .Lfunc_end8-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB9_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB9_2:
	retq
.Lfunc_end9:
	.size	__hip_module_dtor, .Lfunc_end9-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	N,@object                       # @N
	.bss
	.globl	N
	.p2align	2, 0x0
N:
	.long	0                               # 0x0
	.size	N, 4

	.type	A,@object                       # @A
	.globl	A
	.p2align	4, 0x0
A:
	.zero	256000000
	.size	A, 256000000

	.type	B,@object                       # @B
	.globl	B
	.p2align	4, 0x0
B:
	.zero	256000000
	.size	B, 256000000

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Random seed = %i\n"
	.size	.L.str, 18

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"N = %i is out of range.\n"
	.size	.L.str.1, 25

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Usage: %s <matrix_dimension> [random seed]\n"
	.size	.L.str.2, 44

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"\nMatrix dimension N = %i.\n"
	.size	.L.str.3, 27

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"\nA =\n\t"
	.size	.L.str.5, 7

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"%5.2f%s"
	.size	.L.str.6, 8

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	", "
	.size	.L.str.7, 3

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	";\n\t"
	.size	.L.str.8, 4

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"\nB =\n\t"
	.size	.L.str.9, 7

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"%1.10f%s"
	.size	.L.str.10, 9

	.type	_Z6kernelPfS_i,@object          # @_Z6kernelPfS_i
	.section	.rodata,"a",@progbits
	.globl	_Z6kernelPfS_i
	.p2align	3, 0x0
_Z6kernelPfS_i:
	.quad	_Z21__device_stub__kernelPfS_i
	.size	_Z6kernelPfS_i, 8

	.type	.L.str.13,@object               # @.str.13
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.13:
	.asciz	"\n Total Elapsed time = %g ms.\n"
	.size	.L.str.13, 31

	.type	.L.str.14,@object               # @.str.14
.L.str.14:
	.asciz	"(CPU times are accurate to the nearest %g ms)\n"
	.size	.L.str.14, 47

	.type	.L.str.15,@object               # @.str.15
.L.str.15:
	.asciz	"My total CPU time for parent = %g ms.\n"
	.size	.L.str.15, 39

	.type	.L.str.16,@object               # @.str.16
.L.str.16:
	.asciz	"My system CPU time for parent = %g ms.\n"
	.size	.L.str.16, 40

	.type	.L.str.17,@object               # @.str.17
.L.str.17:
	.asciz	"My total CPU time for child processes = %g ms.\n"
	.size	.L.str.17, 48

	.type	.L.str.19,@object               # @.str.19
.L.str.19:
	.asciz	"%s in %s at line %d\n"
	.size	.L.str.19, 21

	.type	.L.str.20,@object               # @.str.20
.L.str.20:
	.asciz	"/home/ubuntu/Datasets/stackv2/train-structured-repos-hip-sm89/zhuweiwu/computer_parallel/master/CUDA/gpuMatrixNorm.hip"
	.size	.L.str.20, 119

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z6kernelPfS_i"
	.size	.L__unnamed_1, 15

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"\nInitializing..."
	.size	.Lstr, 17

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"\nStarting clock."
	.size	.Lstr.1, 17

	.type	.Lstr.2,@object                 # @str.2
.Lstr.2:
	.asciz	"Stopped clock."
	.size	.Lstr.2, 15

	.type	.Lstr.3,@object                 # @str.3
.Lstr.3:
	.asciz	"--------------------------------------------"
	.size	.Lstr.3, 45

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z21__device_stub__kernelPfS_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z6kernelPfS_i
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z6kernelPfS_i          ; -- Begin function _Z6kernelPfS_i
	.globl	_Z6kernelPfS_i
	.p2align	8
	.type	_Z6kernelPfS_i,@function
_Z6kernelPfS_i:                         ; @_Z6kernelPfS_i
; %bb.0:
	s_load_b32 s2, s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_cmp_ge_i32 s15, s2
	s_cbranch_scc1 .LBB0_14
; %bb.1:                                ; %.preheader
	s_load_b128 s[4:7], s[0:1], 0x0
	s_cmp_gt_i32 s2, 0
	s_cselect_b32 s0, -1, 0
	s_cmp_lt_i32 s2, 1
	s_cbranch_scc1 .LBB0_4
; %bb.2:                                ; %.lr.ph.preheader
	v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, v0
	s_mov_b32 s1, s2
                                        ; implicit-def: $vgpr4
.LBB0_3:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_lshlrev_b64 v[5:6], 2, v[1:2]
	s_add_i32 s1, s1, -1
	s_cmp_lg_u32 s1, 0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v5, vcc_lo, s4, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, s5, v6, vcc_lo
	global_load_b32 v3, v[5:6], off
	s_waitcnt vmcnt(0)
	v_dual_add_f32 v4, v4, v3 :: v_dual_add_nc_u32 v1, s2, v1
	s_cbranch_scc1 .LBB0_3
	s_branch .LBB0_5
.LBB0_4:
                                        ; implicit-def: $vgpr4
.LBB0_5:                                ; %._crit_edge
	v_cvt_f32_i32_e32 v3, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_scale_f32 v1, null, v3, v3, v4
	v_rcp_f32_e32 v2, v1
	s_waitcnt_depctr 0xfff
	v_fma_f32 v5, -v1, v2, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v2, v5, v2
	v_div_scale_f32 v5, vcc_lo, v4, v3, v4
	v_mul_f32_e32 v7, v5, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v6, -v1, v7, v5
	v_fmac_f32_e32 v7, v6, v2
	v_cndmask_b32_e64 v6, 0, 1, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v1, -v1, v7, v5
	v_div_fmas_f32 v1, v1, v2, v7
	s_and_not1_b32 vcc_lo, exec_lo, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_div_fixup_f32 v4, v1, v3, v4
	s_cbranch_vccnz .LBB0_8
; %bb.6:                                ; %.lr.ph51.preheader
	v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, v0
	s_mov_b32 s3, 0x3e76c4e1
	s_mov_b32 s8, s2
                                        ; implicit-def: $vgpr5
.LBB0_7:                                ; %.lr.ph51
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[7:8], 2, v[1:2]
	s_add_i32 s8, s8, -1
	v_add_nc_u32_e32 v1, s2, v1
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v7, vcc_lo, s4, v7
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v8, vcc_lo, s5, v8, vcc_lo
	global_load_b32 v7, v[7:8], off
	s_waitcnt vmcnt(0)
	v_sub_f32_e32 v7, v7, v4
	v_frexp_mant_f32_e64 v8, |v7|
	v_frexp_exp_i32_f32_e32 v9, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cmp_gt_f32_e32 vcc_lo, 0x3f2aaaab, v8
	v_cndmask_b32_e64 v10, 0, 1, vcc_lo
	v_subrev_co_ci_u32_e32 v9, vcc_lo, 0, v9, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ldexp_f32 v8, v8, v10
	v_cvt_f32_i32_e32 v9, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f32_e32 v10, 1.0, v8
	v_mul_f32_e32 v14, 0x3f317218, v9
	v_cmp_eq_f32_e32 vcc_lo, 1.0, v7
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v13, -1.0, v10
	v_dual_add_f32 v11, -1.0, v8 :: v_dual_sub_f32 v8, v8, v13
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v13, 0x3f317218, v9, -v14
	v_fmac_f32_e32 v13, 0xb102e308, v9
	v_rcp_f32_e32 v12, v10
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v15, v11, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v9, v10, v15
	v_fma_f32 v10, v15, v10, -v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v10, v15, v8
	v_add_f32_e32 v8, v9, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v16, v11, v8
	v_sub_f32_e32 v11, v11, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v9, v8, v9 :: v_dual_sub_f32 v8, v11, v8
	v_sub_f32_e32 v9, v9, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v8, v9, v8
	v_add_f32_e32 v8, v16, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v8, v12, v8
	v_add_f32_e32 v9, v15, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v10, v9, v15
	v_dual_mul_f32 v11, v9, v9 :: v_dual_sub_f32 v8, v8, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f32 v10, v9, v9, -v11
	v_ldexp_f32 v12, v9, 1
	v_add_f32_e32 v15, v8, v8
	v_ldexp_f32 v16, v8, 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v10, v9, v15
	v_add_f32_e32 v15, v11, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmaak_f32 v17, s3, v15, 0x3e91f4c4
	v_fmaak_f32 v17, v15, v17, 0x3ecccdef
	v_sub_f32_e32 v11, v15, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_mul_f32 v18, v9, v15 :: v_dual_mul_f32 v19, v15, v17
	v_sub_f32_e32 v10, v10, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v11, v15, v9, -v18
	v_fmac_f32_e32 v11, v15, v8
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v8, v15, v17, -v19
	v_fmac_f32_e32 v11, v10, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v8, v10, v17
	v_add_f32_e32 v10, v19, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v17, v10, v19
	v_sub_f32_e32 v8, v8, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_add_f32 v8, 0x31739010, v8 :: v_dual_add_f32 v9, v18, v11
	v_sub_f32_e32 v15, v9, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_add_f32 v18, 0x3f2aaaaa, v10 :: v_dual_sub_f32 v11, v11, v15
	v_add_f32_e32 v15, 0xbf2aaaaa, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v10, v10, v15
	v_add_f32_e32 v8, v8, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v10, v18, v8
	v_sub_f32_e32 v15, v18, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mul_f32 v17, v9, v10 :: v_dual_add_f32 v8, v8, v15
	v_fma_f32 v15, v9, v10, -v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v15, v9, v8
	v_fmac_f32_e32 v15, v11, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v8, v17, v15
	v_add_f32_e32 v9, v12, v8
	v_sub_f32_e32 v10, v8, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v10, v15, v10 :: v_dual_sub_f32 v11, v9, v12
	v_add_f32_e32 v10, v16, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v8, v8, v11 :: v_dual_add_f32 v11, v14, v13
	v_add_f32_e32 v8, v10, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v10, v11, v14
	v_add_f32_e32 v12, v9, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v10, v13, v10 :: v_dual_add_f32 v13, v11, v12
	v_dual_sub_f32 v9, v12, v9 :: v_dual_sub_f32 v14, v13, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v8, v8, v9 :: v_dual_sub_f32 v9, v13, v14
	v_dual_sub_f32 v9, v11, v9 :: v_dual_sub_f32 v12, v12, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_add_f32 v14, v10, v8 :: v_dual_add_f32 v9, v12, v9
	v_sub_f32_e32 v11, v14, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f32_e32 v9, v14, v9
	v_sub_f32_e32 v12, v14, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_sub_f32 v8, v8, v11 :: v_dual_add_f32 v11, v13, v9
	v_sub_f32_e32 v10, v10, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v12, v11, v13
	v_dual_sub_f32 v9, v9, v12 :: v_dual_add_f32 v8, v8, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f32_e32 v8, v8, v9
	v_cndmask_b32_e64 v9, 2.0, 1.0, vcc_lo
	v_add_f32_e32 v10, v11, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v11, v10, v11 :: v_dual_mul_f32 v12, v9, v10
	v_sub_f32_e32 v8, v8, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f32 v10, v9, v10, -v12
	v_cmp_class_f32_e64 vcc_lo, v12, 0x204
	v_fmac_f32_e32 v10, v9, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v8, v12, v10
	v_cndmask_b32_e32 v11, v8, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_f32_e32 vcc_lo, 0x42b17218, v11
	v_cndmask_b32_e64 v13, 0, 0x37000000, vcc_lo
	v_sub_f32_e32 v14, v11, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v15, 0x3fb8aa3b, v14
	v_fma_f32 v16, 0x3fb8aa3b, v14, -v15
	v_rndne_f32_e32 v17, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_dual_fmac_f32 v16, 0x32a5705f, v14 :: v_dual_sub_f32 v15, v15, v17
	v_cmp_neq_f32_e64 vcc_lo, 0x7f800000, |v11|
	v_trunc_f32_e32 v11, v9
	v_add_f32_e32 v15, v15, v16
	v_sub_f32_e32 v8, v8, v12
	v_cvt_i32_f32_e32 v12, v17
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_exp_f32_e32 v15, v15
	v_sub_f32_e32 v8, v10, v8
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e32 v8, 0, v8, vcc_lo
	v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v14
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v10, v15, v12
	v_mul_f32_e32 v12, 0.5, v9
	v_add_f32_e32 v8, v13, v8
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_cndmask_b32_e32 v10, 0, v10, vcc_lo
	v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v14
	v_trunc_f32_e32 v15, v12
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v10, 0x7f800000, v10, vcc_lo
	v_cmp_eq_f32_e32 vcc_lo, v11, v9
	v_cmp_neq_f32_e64 s0, v15, v12
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f32 v8, v10, v8, v10
	v_cmp_eq_f32_e64 s1, 0x7f800000, v10
	s_and_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v9, 1.0, v7, s0
	v_cndmask_b32_e64 v8, v8, v10, s1
	v_cmp_eq_f32_e64 s1, 0, v7
	v_cndmask_b32_e64 v10, 0, v7, s0
	v_cmp_class_f32_e64 s0, v7, 0x204
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_bfi_b32 v8, 0x7fffffff, v8, v9
	v_cndmask_b32_e64 v9, 0x7f800000, 0, s1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v11, 0x7fc00000, v8, vcc_lo
	v_cmp_gt_f32_e32 vcc_lo, 0, v7
	v_bfi_b32 v9, 0x7fffffff, v9, v10
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v8, v8, v11, vcc_lo
	s_or_b32 vcc_lo, s1, s0
	s_cmp_lg_u32 s8, 0
	v_cndmask_b32_e32 v8, v8, v9, vcc_lo
	v_cmp_o_f32_e32 vcc_lo, v7, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v7, 0x7fc00000, v8, vcc_lo
	v_add_f32_e32 v5, v5, v7
	s_cbranch_scc1 .LBB0_7
	s_branch .LBB0_9
.LBB0_8:
                                        ; implicit-def: $vgpr5
.LBB0_9:                                ; %._crit_edge52
	v_cmp_ne_u32_e32 vcc_lo, 1, v6
	s_cbranch_vccnz .LBB0_14
; %bb.10:                               ; %.lr.ph56
	v_div_scale_f32 v1, null, v3, v3, v5
	v_div_scale_f32 v7, vcc_lo, v5, v3, v5
	s_mov_b32 s0, 0x3e76c4e1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v2, v1
	s_waitcnt_depctr 0xfff
	v_fma_f32 v6, -v1, v2, 1.0
	v_fmac_f32_e32 v2, v6, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v6, v7, v2
	v_fma_f32 v8, -v1, v6, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v6, v8, v2
	v_fma_f32 v1, -v1, v6, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v1, v1, v2, v6
	v_div_fixup_f32 v1, v1, v3, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_frexp_mant_f32_e64 v2, |v1|
	v_cmp_gt_f32_e32 vcc_lo, 0x3f2aaaab, v2
	v_cndmask_b32_e64 v3, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f32 v2, v2, v3
	v_add_f32_e32 v3, 1.0, v2
	v_add_f32_e32 v6, -1.0, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v8, -1.0, v3
	v_sub_f32_e32 v2, v2, v8
	v_rcp_f32_e32 v5, v3
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v7, v6, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v9, v3, v7
	v_fma_f32 v3, v7, v3, -v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v3, v7, v2
	v_add_f32_e32 v2, v9, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v8, v6, v2
	v_sub_f32_e32 v9, v2, v9
	v_dual_sub_f32 v6, v6, v8 :: v_dual_sub_f32 v3, v9, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v2, v6, v2
	v_add_f32_e32 v2, v3, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v2, v8, v2
	v_mul_f32_e32 v2, v5, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v3, v7, v2
	v_sub_f32_e32 v5, v3, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v2, v2, v5
	v_dual_mul_f32 v6, v3, v3 :: v_dual_add_f32 v7, v2, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v5, v3, v3, -v6
	v_fmac_f32_e32 v5, v3, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v7, v6, v5
	v_fmaak_f32 v8, s0, v7, 0x3e91f4c4
	v_sub_f32_e32 v6, v7, v6
	v_mul_f32_e32 v11, v3, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_fmaak_f32 v8, v7, v8, 0x3ecccdef :: v_dual_sub_f32 v5, v5, v6
	v_fma_f32 v12, v7, v3, -v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v9, v7, v8
	v_fmac_f32_e32 v12, v7, v2
	v_ldexp_f32 v2, v2, 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f32 v6, v7, v8, -v9
	v_fmac_f32_e32 v12, v5, v3
	v_ldexp_f32 v3, v3, 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v6, v5, v8
	v_dual_add_f32 v7, v11, v12 :: v_dual_add_f32 v8, v9, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v9, v8, v9 :: v_dual_add_f32 v10, 0x3f2aaaaa, v8
	v_dual_sub_f32 v6, v6, v9 :: v_dual_add_f32 v9, 0xbf2aaaaa, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f32_e32 v6, 0x31739010, v6
	v_sub_f32_e32 v8, v8, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v6, v6, v8
	v_add_f32_e32 v5, v10, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v9, v7, v5
	v_sub_f32_e32 v8, v10, v5
	v_sub_f32_e32 v10, v7, v11
	v_add_f32_e32 v6, v6, v8
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f32 v8, v7, v5, -v9
	v_sub_f32_e32 v10, v12, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v8, v7, v6
	v_frexp_exp_i32_f32_e32 v6, v1
	v_fmac_f32_e32 v8, v10, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_subrev_co_ci_u32_e32 v5, vcc_lo, 0, v6, vcc_lo
	v_cmp_eq_f32_e32 vcc_lo, 1.0, v1
	v_add_f32_e32 v6, v9, v8
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f32_i32_e32 v5, v5
	v_add_f32_e32 v7, v3, v6
	v_sub_f32_e32 v9, v6, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_mul_f32 v10, 0x3f317218, v5 :: v_dual_sub_f32 v3, v7, v3
	v_sub_f32_e32 v8, v8, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f32 v9, 0x3f317218, v5, -v10
	v_sub_f32_e32 v3, v6, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_add_f32 v2, v2, v8 :: v_dual_fmamk_f32 v5, v5, 0xb102e308, v9
	v_add_f32_e32 v2, v2, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_add_f32 v3, v10, v5 :: v_dual_add_f32 v6, v7, v2
	v_sub_f32_e32 v10, v3, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_add_f32 v8, v3, v6 :: v_dual_sub_f32 v7, v6, v7
	v_sub_f32_e32 v5, v5, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v9, v8, v3
	v_dual_sub_f32 v2, v2, v7 :: v_dual_sub_f32 v11, v8, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_sub_f32 v6, v6, v9 :: v_dual_add_f32 v7, v5, v2
	v_sub_f32_e32 v3, v3, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_add_f32 v3, v6, v3 :: v_dual_sub_f32 v6, v7, v5
	v_add_f32_e32 v3, v7, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v7, v7, v6
	v_dual_sub_f32 v2, v2, v6 :: v_dual_add_f32 v9, v8, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v5, v5, v7
	v_sub_f32_e32 v6, v9, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f32_e32 v2, v2, v5
	v_cndmask_b32_e64 v5, 0.5, 1.0, vcc_lo
	v_sub_f32_e32 v3, v3, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v2, v2, v3
	v_add_f32_e32 v3, v9, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v6, v3, v9 :: v_dual_mul_f32 v7, v5, v3
	v_sub_f32_e32 v2, v2, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f32 v3, v5, v3, -v7
	v_cmp_class_f32_e64 vcc_lo, v7, 0x204
	v_fmac_f32_e32 v3, v5, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v2, v7, v3
	v_cndmask_b32_e32 v6, v2, v7, vcc_lo
	v_sub_f32_e32 v2, v2, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_eq_f32_e32 vcc_lo, 0x42b17218, v6
	v_sub_f32_e32 v2, v3, v2
	v_cndmask_b32_e64 v8, 0, 0x37000000, vcc_lo
	v_cmp_neq_f32_e64 vcc_lo, 0x7f800000, |v6|
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_sub_f32 v9, v6, v8 :: v_dual_cndmask_b32 v2, 0, v2
	v_trunc_f32_e32 v6, v5
	v_mul_f32_e32 v10, 0x3fb8aa3b, v9
	v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v9
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f32_e32 v2, v8, v2
	v_fma_f32 v11, 0x3fb8aa3b, v9, -v10
	v_rndne_f32_e32 v12, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_fmamk_f32 v11, v9, 0x32a5705f, v11 :: v_dual_sub_f32 v10, v10, v12
	v_cvt_i32_f32_e32 v7, v12
	v_add_f32_e32 v10, v10, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_exp_f32_e32 v10, v10
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v3, v10, v7
	v_mul_f32_e32 v7, 0.5, v5
	v_cndmask_b32_e32 v3, 0, v3, vcc_lo
	v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v9
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_trunc_f32_e32 v10, v7
	v_cndmask_b32_e32 v3, 0x7f800000, v3, vcc_lo
	v_cmp_eq_f32_e32 vcc_lo, v6, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_neq_f32_e64 s0, v10, v7
	v_fma_f32 v2, v3, v2, v3
	v_cmp_eq_f32_e64 s1, 0x7f800000, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, vcc_lo, s0
	v_cndmask_b32_e64 v5, 1.0, v1, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v2, v2, v3, s1
	v_cmp_eq_f32_e64 s1, 0, v1
	v_bfi_b32 v2, 0x7fffffff, v2, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v3, 0x7f800000, 0, s1
	v_cndmask_b32_e64 v5, 0, v1, s0
	v_cmp_class_f32_e64 s0, v1, 0x204
	v_cndmask_b32_e32 v6, 0x7fc00000, v2, vcc_lo
	v_cmp_gt_f32_e32 vcc_lo, 0, v1
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_bfi_b32 v3, 0x7fffffff, v3, v5
	v_cndmask_b32_e32 v2, v2, v6, vcc_lo
	s_or_b32 vcc_lo, s1, s0
	s_mov_b32 s1, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v2, v2, v3, vcc_lo
	v_cmp_o_f32_e32 vcc_lo, v1, v1
	v_mov_b32_e32 v1, 0
	v_cndmask_b32_e32 v5, 0x7fc00000, v2, vcc_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_neq_f32_e64 s0, 0, v5
.LBB0_11:                               ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[2:3], 2, v[0:1]
	v_mov_b32_e32 v6, v1
	s_and_saveexec_b32 s3, s0
	s_cbranch_execz .LBB0_13
; %bb.12:                               ;   in Loop: Header=BB0_11 Depth=1
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_u32 v6, vcc_lo, s4, v2
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v3, vcc_lo
	global_load_b32 v6, v[6:7], off
	s_waitcnt vmcnt(0)
	v_sub_f32_e32 v6, v6, v4
	v_div_scale_f32 v7, null, v5, v5, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v8, v7
	s_waitcnt_depctr 0xfff
	v_fma_f32 v9, -v7, v8, 1.0
	v_fmac_f32_e32 v8, v9, v8
	v_div_scale_f32 v9, vcc_lo, v6, v5, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v10, v9, v8
	v_fma_f32 v11, -v7, v10, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v10, v11, v8
	v_fma_f32 v7, -v7, v10, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v7, v7, v8, v10
	v_div_fixup_f32 v6, v7, v5, v6
.LBB0_13:                               ;   in Loop: Header=BB0_11 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s6, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v3, vcc_lo
	v_add_nc_u32_e32 v0, s2, v0
	s_add_i32 s1, s1, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s1, 0
	global_store_b32 v[2:3], v6, off
	s_cbranch_scc1 .LBB0_11
.LBB0_14:                               ; %.loopexit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z6kernelPfS_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 20
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 20
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z6kernelPfS_i, .Lfunc_end0-_Z6kernelPfS_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 2768
; NumSgprs: 18
; NumVgprs: 20
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 20
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 20
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z6kernelPfS_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z6kernelPfS_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     20
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
