/***************************************************************************
 *cr
 *cr            (C) Copyright 2010 The Board of Trustees of the
 *cr                        University of Illinois
 *cr                         All Rights Reserved
 *cr
 ***************************************************************************/

#include "common.h"

__device__ void block2D_hybrid_coarsen_x(float c0, float c1, float* A0, float* Anext, int nx, int ny, int nz)
{

    //thread coarsening along x direction
    const int i = blockIdx.x * blockDim.x * 2 + threadIdx.x;
    const int i2 = blockIdx.x * blockDim.x * 2 + threadIdx.x + blockDim.x;
    const int j = blockIdx.y * blockDim.y + threadIdx.y;
    const int sh_id = threadIdx.x + threadIdx.y * blockDim.x * 2;
    const int sh_id2 = threadIdx.x + blockDim.x + threadIdx.y * blockDim.x * 2;

    //shared memeory
    // extern __shared__ float sh_A0[];
    // FIXME: Dynamic shared memory.
    __shared__ float sh_A0[32 * 2 * 4];

    sh_A0[sh_id] = 0.0f;
    sh_A0[sh_id2] = 0.0f;
    __syncthreads();

    //get available region for load and store
    const bool w_region = i > 0 && j > 0 && (i < (nx - 1)) && (j < (ny - 1));
    const bool w_region2 = j > 0 && (i2 < nx - 1) && (j < ny - 1);
    const bool x_l_bound = (threadIdx.x == 0);
    const bool x_h_bound = ((threadIdx.x + blockDim.x) == (blockDim.x * 2 - 1));
    const bool y_l_bound = (threadIdx.y == 0);
    const bool y_h_bound = (threadIdx.y == (blockDim.y - 1));

    //register for bottom and top planes
    //because of thread coarsening, we need to doulbe registers
    float bottom = 0.0f, bottom2 = 0.0f, top = 0.0f, top2 = 0.0f;

    //load data for bottom and current
    if ((i < nx) && (j < ny)) {

        bottom = A0[Index3D(nx, ny, i, j, 0)];
        sh_A0[sh_id] = A0[Index3D(nx, ny, i, j, 1)];
    }
    if ((i2 < nx) && (j < ny)) {
        bottom2 = A0[Index3D(nx, ny, i2, j, 0)];
        sh_A0[sh_id2] = A0[Index3D(nx, ny, i2, j, 1)];
    }

    __syncthreads();

    for (int k = 1; k < nz - 1; k++) {

        float a_left_right, a_up, a_down;

        //load required data on xy planes
        //if it on shared memory, load from shared memory
        //if not, load from global memory
        if ((i < nx) && (j < ny))
            top = A0[Index3D(nx, ny, i, j, k + 1)];

        if (w_region) {
            a_up = y_h_bound ? A0[Index3D(nx, ny, i, j + 1, k)] : sh_A0[sh_id + 2 * blockDim.x];
            a_down = y_l_bound ? A0[Index3D(nx, ny, i, j - 1, k)] : sh_A0[sh_id - 2 * blockDim.x];
            a_left_right = x_l_bound ? A0[Index3D(nx, ny, i - 1, j, k)] : sh_A0[sh_id - 1];

            Anext[Index3D(nx, ny, i, j, k)] = (top + bottom + a_up + a_down + sh_A0[sh_id + 1] + a_left_right) * c1
                - sh_A0[sh_id] * c0;
        }

        //load another block
        if ((i2 < nx) && (j < ny))
            top2 = A0[Index3D(nx, ny, i2, j, k + 1)];

        if (w_region2) {
            a_up = y_h_bound ? A0[Index3D(nx, ny, i2, j + 1, k)] : sh_A0[sh_id2 + 2 * blockDim.x];
            a_down = y_l_bound ? A0[Index3D(nx, ny, i2, j - 1, k)] : sh_A0[sh_id2 - 2 * blockDim.x];
            a_left_right = x_h_bound ? A0[Index3D(nx, ny, i2 + 1, j, k)] : sh_A0[sh_id2 + 1];

            Anext[Index3D(nx, ny, i2, j, k)] = (top2 + bottom2 + a_up + a_down + a_left_right + sh_A0[sh_id2 - 1]) * c1
                - sh_A0[sh_id2] * c0;
        }

        //swap data
        __syncthreads();
        bottom = sh_A0[sh_id];
        sh_A0[sh_id] = top;
        bottom2 = sh_A0[sh_id2];
        sh_A0[sh_id2] = top2;
        __syncthreads();
    }
}

	.file	"tmpxft_0021a564_00000000-6_kernels.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2011:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2011:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z24block2D_hybrid_coarsen_xffPfS_iii
	.type	_Z24block2D_hybrid_coarsen_xffPfS_iii, @function
_Z24block2D_hybrid_coarsen_xffPfS_iii:
.LFB2008:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2008:
	.size	_Z24block2D_hybrid_coarsen_xffPfS_iii, .-_Z24block2D_hybrid_coarsen_xffPfS_iii
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2034:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	movq	%rax, %rdi
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2034:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

/***************************************************************************
 *cr
 *cr            (C) Copyright 2010 The Board of Trustees of the
 *cr                        University of Illinois
 *cr                         All Rights Reserved
 *cr
 ***************************************************************************/


#include <hip/hip_runtime.h>
#include "common.h"

__device__ void block2D_hybrid_coarsen_x(float c0, float c1, float* A0, float* Anext, int nx, int ny, int nz)
{

    //thread coarsening along x direction
    const int i = blockIdx.x * blockDim.x * 2 + threadIdx.x;
    const int i2 = blockIdx.x * blockDim.x * 2 + threadIdx.x + blockDim.x;
    const int j = blockIdx.y * blockDim.y + threadIdx.y;
    const int sh_id = threadIdx.x + threadIdx.y * blockDim.x * 2;
    const int sh_id2 = threadIdx.x + blockDim.x + threadIdx.y * blockDim.x * 2;

    //shared memeory
    // extern __shared__ float sh_A0[];
    // FIXME: Dynamic shared memory.
    __shared__ float sh_A0[32 * 2 * 4];

    sh_A0[sh_id] = 0.0f;
    sh_A0[sh_id2] = 0.0f;
    __syncthreads();

    //get available region for load and store
    const bool w_region = i > 0 && j > 0 && (i < (nx - 1)) && (j < (ny - 1));
    const bool w_region2 = j > 0 && (i2 < nx - 1) && (j < ny - 1);
    const bool x_l_bound = (threadIdx.x == 0);
    const bool x_h_bound = ((threadIdx.x + blockDim.x) == (blockDim.x * 2 - 1));
    const bool y_l_bound = (threadIdx.y == 0);
    const bool y_h_bound = (threadIdx.y == (blockDim.y - 1));

    //register for bottom and top planes
    //because of thread coarsening, we need to doulbe registers
    float bottom = 0.0f, bottom2 = 0.0f, top = 0.0f, top2 = 0.0f;

    //load data for bottom and current
    if ((i < nx) && (j < ny)) {

        bottom = A0[Index3D(nx, ny, i, j, 0)];
        sh_A0[sh_id] = A0[Index3D(nx, ny, i, j, 1)];
    }
    if ((i2 < nx) && (j < ny)) {
        bottom2 = A0[Index3D(nx, ny, i2, j, 0)];
        sh_A0[sh_id2] = A0[Index3D(nx, ny, i2, j, 1)];
    }

    __syncthreads();

    for (int k = 1; k < nz - 1; k++) {

        float a_left_right, a_up, a_down;

        //load required data on xy planes
        //if it on shared memory, load from shared memory
        //if not, load from global memory
        if ((i < nx) && (j < ny))
            top = A0[Index3D(nx, ny, i, j, k + 1)];

        if (w_region) {
            a_up = y_h_bound ? A0[Index3D(nx, ny, i, j + 1, k)] : sh_A0[sh_id + 2 * blockDim.x];
            a_down = y_l_bound ? A0[Index3D(nx, ny, i, j - 1, k)] : sh_A0[sh_id - 2 * blockDim.x];
            a_left_right = x_l_bound ? A0[Index3D(nx, ny, i - 1, j, k)] : sh_A0[sh_id - 1];

            Anext[Index3D(nx, ny, i, j, k)] = (top + bottom + a_up + a_down + sh_A0[sh_id + 1] + a_left_right) * c1
                - sh_A0[sh_id] * c0;
        }

        //load another block
        if ((i2 < nx) && (j < ny))
            top2 = A0[Index3D(nx, ny, i2, j, k + 1)];

        if (w_region2) {
            a_up = y_h_bound ? A0[Index3D(nx, ny, i2, j + 1, k)] : sh_A0[sh_id2 + 2 * blockDim.x];
            a_down = y_l_bound ? A0[Index3D(nx, ny, i2, j - 1, k)] : sh_A0[sh_id2 - 2 * blockDim.x];
            a_left_right = x_h_bound ? A0[Index3D(nx, ny, i2 + 1, j, k)] : sh_A0[sh_id2 + 1];

            Anext[Index3D(nx, ny, i2, j, k)] = (top2 + bottom2 + a_up + a_down + a_left_right + sh_A0[sh_id2 - 1]) * c1
                - sh_A0[sh_id2] * c0;
        }

        //swap data
        __syncthreads();
        bottom = sh_A0[sh_id];
        sh_A0[sh_id] = top;
        bottom2 = sh_A0[sh_id2];
        sh_A0[sh_id2] = top2;
        __syncthreads();
    }
}

	.text
	.file	"kernels.hip"
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_

	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.amdgpu_metadata
---
amdhsa.kernels:  []
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
