#include <cuda.h>
#include <stdio.h>
#include <stdint.h> 


// For comparisons
//#include "seqScan.c"


#define CLONES 8
#define REPS   8

// block size in ELEMENTS!
#define BLOCK_SIZE (CLONES*REPS*64) 

#define N 4096*CLONES*REPS*64


/* ------------------------------------------------------------------------
   Unrolled in-place(shared memory) Scan without syncs (32 threads, 64 elts). 
   Needs 2*64 elements of shared memory storage (512bytes).
     (shared mem is 49152 bytes, but you share it with other blocks on an MP) 
   --------------------------------------------------------------------- */
__device__ void skl_scan(int i, 
			 float* input, 
			 float *output, 
			 float *s_data, // The shared memory
			 float *maxs) { 
    
  int tid = threadIdx.x; 
  int tids = tid << 1; 

  // Load data from global memory into shared memory (in two separate load ops)
  s_data[tid*2] = input[tid*2]; 
  s_data[tid*2+1] = input[tid*2+1]; 
  //  __syncthreads();


  s_data[tids | 1] += s_data[tids]; 
  s_data[(tids | 3) - (tid & 1)] += s_data[tids & 0xFFFFFFFC | 1]; 
  s_data[(tids | 7) - (tid & 3)] += s_data[tids & 0xFFFFFFF8 | 3]; 
  s_data[(tids | 15) - (tid & 7)] += s_data[tids & 0xFFFFFFF0 | 7]; 
  s_data[(tids | 31) - (tid & 15)] += s_data[tids & 0xFFFFFFE0 | 15]; 
  s_data[(tids | 63) - (tid & 31)] += s_data[tids & 0xFFFFFFC0 | 31];
  // NO Interleaved SYNCS here.

  //__syncthreads();
  output[tid*2] = s_data[tid*2]; 
  output[tid*2+1] = s_data[tid*2+1];
  
  //__syncthreads();
  if(tid % 32 == 0) 
    maxs[(i<<3)+(tid>>5)] = s_data[(tid << 1) | 0x3F];
  //maxs[i*CLONES+(tid / 32)] = s_data[(tid / 32)*64 + 63];
  // (i<<3)+(tid>>5)                    ((tid>>5)<<6) + 63 
  //                                    (tid << 1) | 0x3F)   
  
}


/* ------------------------------------------------------------------------
   The Scan kernel (Thousand(s) of elements. NO SYNCS AT ALL) 
   --------------------------------------------------------------------- */
__global__ void kernel(float* input0,
                       float* output0, 
                       float* maxout){
   
  // shared data. (two different kinds. warp local and across warps.) 
  extern __shared__ float s_data[]; 
  float *maxs = &s_data[512]; 
  
  // Sequentially execute 64 scans
  for (int i = 0; i < REPS; i ++) {  
    skl_scan(i,
	     input0+(blockIdx.x*BLOCK_SIZE)+(i*512),
	     output0+(blockIdx.x*BLOCK_SIZE)+(i*512),
	     s_data,maxs);
  }

  // Now needs one __syncthreads() here! 
  __syncthreads();

  // in parallel scan the maximum array 
  float v; //discard this value.
  if (threadIdx.x < 32) 
    skl_scan(0,maxs,maxs,(float *)s_data,&v);
  
  __syncthreads();

  
  // really messy code  
  for (int j = 0; j < REPS; j ++) {
    if (j != 0 || threadIdx.x >=  64) 
      output0[(blockIdx.x*BLOCK_SIZE)+(j*256)+threadIdx.x] += maxs[(((j*256)+threadIdx.x) / 64)-1];
    output0[(blockIdx.x*BLOCK_SIZE)+(j*256)+threadIdx.x+2048] += maxs[(((j*256)+threadIdx.x+2048) /64)-1];
  }
 
  // This is a debug step. 
  if (threadIdx.x < 32) {
    maxout[threadIdx.x] = maxs[threadIdx.x];
    maxout[threadIdx.x+32] = maxs[threadIdx.x+32];
  }
}

/* ------------------------------------------------------------------------
   MAIN
   --------------------------------------------------------------------- */
int main(void) {
  
  float *v; 
  float *r; 
  //float rc[N];
  float m[64];

  float *dv; 
  float *dr; 
  float *dm;
  
  v = (float*)malloc(sizeof(float) * N);
  r = (float*)malloc(sizeof(float) * N);
  memset(m,0,64*sizeof(float));
  
  for (int i = 0; i < N; i ++) {
    v[i] = 1.0; 
    r[i] = 7.0;
  }

  cudaMalloc((void**)&dv,N*sizeof(float)); 
  cudaMalloc((void**)&dr,N*sizeof(float));
  cudaMalloc((void**)&dm,64*sizeof(float));
  
  cudaMemcpy(dv,v,N*sizeof(float),cudaMemcpyHostToDevice);
  
  //kernel<<<1,32,32*3*(sizeof(float))>>>(dv,dr,dm);
  //kernel<<<1,16,32*2*(sizeof(float))>>>(dv,dr,dm);
  
  cudaEvent_t start, stop;
  cudaEventCreate(&start);
  cudaEventCreate(&stop);
  cudaEventRecord(start,0);

  kernel<<<4096,256,(512+64)*(sizeof(float))>>>(dv,dr,dm);

  cudaEventRecord(stop,0);
  cudaEventSynchronize(stop);
  float elapsedTime;
  cudaEventElapsedTime(&elapsedTime, start, stop);

  // std::cout << std::endl;

  cudaMemcpy(r,dr,N*sizeof(float),cudaMemcpyDeviceToHost);
  cudaMemcpy(m,dm,64*sizeof(float),cudaMemcpyDeviceToHost);


  for (int i = 0; i < 4096 /*N*/; i ++) { 
    printf("%f ",r[i]);
  }

  
  printf("\n ------ \n");
  
  for (int i = 0; i < 64; i ++) { 
    printf("%f ",m[i]);
  }
  
  

  printf("Elapsed time: %f\n", elapsedTime);


  //seqScan(v,rc,N);
  //int s = compare(rc,r,0.01,N);
 
 

  //printf ("\n%s\n", s? "same" : "not the same");
  

  return 0;
}



	.file	"tmpxft_0021ac9a_00000000-6_sklansky5.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2031:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2031:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z8skl_scaniPfS_S_S_
	.type	_Z8skl_scaniPfS_S_S_, @function
_Z8skl_scaniPfS_S_S_:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2027:
	.size	_Z8skl_scaniPfS_S_S_, .-_Z8skl_scaniPfS_S_S_
	.globl	_Z29__device_stub__Z6kernelPfS_S_PfS_S_
	.type	_Z29__device_stub__Z6kernelPfS_S_PfS_S_, @function
_Z29__device_stub__Z6kernelPfS_S_PfS_S_:
.LFB2053:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L4
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z6kernelPfS_S_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L4:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L6
	call	__stack_chk_fail@PLT
.L6:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2053:
	.size	_Z29__device_stub__Z6kernelPfS_S_PfS_S_, .-_Z29__device_stub__Z6kernelPfS_S_PfS_S_
	.globl	_Z6kernelPfS_S_
	.type	_Z6kernelPfS_S_, @function
_Z6kernelPfS_S_:
.LFB2054:
	.cfi_startproc
	endbr64
	jmp	_Z29__device_stub__Z6kernelPfS_S_PfS_S_
	.cfi_endproc
.LFE2054:
	.size	_Z6kernelPfS_S_, .-_Z6kernelPfS_S_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC2:
	.string	"%f "
.LC3:
	.string	"\n ------ \n"
.LC4:
	.string	"Elapsed time: %f\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	$67108864, %edi
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	subq	$344, %rsp
	.cfi_def_cfa_offset 384
	movq	%fs:40, %rax
	movq	%rax, 328(%rsp)
	xorl	%eax, %eax
	leaq	72(%rsp), %rbp
	call	malloc@PLT
	movl	$67108864, %edi
	movq	%rax, %r12
	call	malloc@PLT
	movl	$64, %ecx
	movq	%rbp, %rdi
	movss	.LC0(%rip), %xmm1
	movq	%rax, %rbx
	movss	.LC1(%rip), %xmm0
	xorl	%eax, %eax
	rep stosl
	xorl	%eax, %eax
.L11:
	movss	%xmm1, (%r12,%rax)
	movss	%xmm0, (%rbx,%rax)
	addq	$4, %rax
	cmpq	$67108864, %rax
	jne	.L11
	leaq	8(%rsp), %rdi
	movl	$67108864, %esi
	call	cudaMalloc@PLT
	leaq	16(%rsp), %rdi
	movl	$67108864, %esi
	call	cudaMalloc@PLT
	leaq	24(%rsp), %rdi
	movl	$256, %esi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movq	%r12, %rsi
	movl	$67108864, %edx
	call	cudaMemcpy@PLT
	leaq	32(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	40(%rsp), %rdi
	call	cudaEventCreate@PLT
	movq	32(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movl	$16777217, %edx
	movl	$1048577, %edi
	xorl	%r9d, %r9d
	salq	$8, %rdx
	salq	$12, %rdi
	movl	$2304, %r8d
	movl	$1, %ecx
	movl	$1, %esi
	movq	%rdx, 60(%rsp)
	movl	$1, 68(%rsp)
	movq	%rdi, 48(%rsp)
	movl	$1, 56(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L12
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdi
	call	_Z29__device_stub__Z6kernelPfS_S_PfS_S_
.L12:
	movq	40(%rsp), %rdi
	xorl	%esi, %esi
	xorl	%r12d, %r12d
	leaq	.LC2(%rip), %r13
	call	cudaEventRecord@PLT
	movq	40(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	40(%rsp), %rdx
	movq	32(%rsp), %rsi
	leaq	60(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	movq	16(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbx, %rdi
	movl	$67108864, %edx
	call	cudaMemcpy@PLT
	movq	24(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbp, %rdi
	movl	$256, %edx
	call	cudaMemcpy@PLT
.L13:
	cvtss2sd	(%rbx,%r12,4), %xmm0
	movq	%r13, %rsi
	movl	$2, %edi
	movb	$1, %al
	call	__printf_chk@PLT
	incq	%r12
	cmpq	$4096, %r12
	jne	.L13
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	xorl	%ebx, %ebx
	call	__printf_chk@PLT
.L14:
	cvtss2sd	0(%rbp,%rbx,4), %xmm0
	movq	%r13, %rsi
	movl	$2, %edi
	movb	$1, %al
	call	__printf_chk@PLT
	incq	%rbx
	cmpq	$64, %rbx
	jne	.L14
	leaq	.LC4(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	60(%rsp), %xmm0
	call	__printf_chk@PLT
	movq	328(%rsp), %rax
	subq	%fs:40, %rax
	je	.L15
	call	__stack_chk_fail@PLT
.L15:
	addq	$344, %rsp
	.cfi_def_cfa_offset 40
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	main, .-main
	.section	.rodata.str1.1
.LC5:
	.string	"_Z6kernelPfS_S_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2056:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC5(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z6kernelPfS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2056:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC0:
	.long	1065353216
	.align 4
.LC1:
	.long	1088421888
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdint.h> 


// For comparisons
//#include "seqScan.c"


#define CLONES 8
#define REPS   8

// block size in ELEMENTS!
#define BLOCK_SIZE (CLONES*REPS*64) 

#define N 4096*CLONES*REPS*64


/* ------------------------------------------------------------------------
   Unrolled in-place(shared memory) Scan without syncs (32 threads, 64 elts). 
   Needs 2*64 elements of shared memory storage (512bytes).
     (shared mem is 49152 bytes, but you share it with other blocks on an MP) 
   --------------------------------------------------------------------- */
__device__ void skl_scan(int i, 
			 float* input, 
			 float *output, 
			 float *s_data, // The shared memory
			 float *maxs) { 
    
  int tid = threadIdx.x; 
  int tids = tid << 1; 

  // Load data from global memory into shared memory (in two separate load ops)
  s_data[tid*2] = input[tid*2]; 
  s_data[tid*2+1] = input[tid*2+1]; 
  //  __syncthreads();


  s_data[tids | 1] += s_data[tids]; 
  s_data[(tids | 3) - (tid & 1)] += s_data[tids & 0xFFFFFFFC | 1]; 
  s_data[(tids | 7) - (tid & 3)] += s_data[tids & 0xFFFFFFF8 | 3]; 
  s_data[(tids | 15) - (tid & 7)] += s_data[tids & 0xFFFFFFF0 | 7]; 
  s_data[(tids | 31) - (tid & 15)] += s_data[tids & 0xFFFFFFE0 | 15]; 
  s_data[(tids | 63) - (tid & 31)] += s_data[tids & 0xFFFFFFC0 | 31];
  // NO Interleaved SYNCS here.

  //__syncthreads();
  output[tid*2] = s_data[tid*2]; 
  output[tid*2+1] = s_data[tid*2+1];
  
  //__syncthreads();
  if(tid % 32 == 0) 
    maxs[(i<<3)+(tid>>5)] = s_data[(tid << 1) | 0x3F];
  //maxs[i*CLONES+(tid / 32)] = s_data[(tid / 32)*64 + 63];
  // (i<<3)+(tid>>5)                    ((tid>>5)<<6) + 63 
  //                                    (tid << 1) | 0x3F)   
  
}


/* ------------------------------------------------------------------------
   The Scan kernel (Thousand(s) of elements. NO SYNCS AT ALL) 
   --------------------------------------------------------------------- */
__global__ void kernel(float* input0,
                       float* output0, 
                       float* maxout){
   
  // shared data. (two different kinds. warp local and across warps.) 
  extern __shared__ float s_data[]; 
  float *maxs = &s_data[512]; 
  
  // Sequentially execute 64 scans
  for (int i = 0; i < REPS; i ++) {  
    skl_scan(i,
	     input0+(blockIdx.x*BLOCK_SIZE)+(i*512),
	     output0+(blockIdx.x*BLOCK_SIZE)+(i*512),
	     s_data,maxs);
  }

  // Now needs one __syncthreads() here! 
  __syncthreads();

  // in parallel scan the maximum array 
  float v; //discard this value.
  if (threadIdx.x < 32) 
    skl_scan(0,maxs,maxs,(float *)s_data,&v);
  
  __syncthreads();

  
  // really messy code  
  for (int j = 0; j < REPS; j ++) {
    if (j != 0 || threadIdx.x >=  64) 
      output0[(blockIdx.x*BLOCK_SIZE)+(j*256)+threadIdx.x] += maxs[(((j*256)+threadIdx.x) / 64)-1];
    output0[(blockIdx.x*BLOCK_SIZE)+(j*256)+threadIdx.x+2048] += maxs[(((j*256)+threadIdx.x+2048) /64)-1];
  }
 
  // This is a debug step. 
  if (threadIdx.x < 32) {
    maxout[threadIdx.x] = maxs[threadIdx.x];
    maxout[threadIdx.x+32] = maxs[threadIdx.x+32];
  }
}

/* ------------------------------------------------------------------------
   MAIN
   --------------------------------------------------------------------- */
int main(void) {
  
  float *v; 
  float *r; 
  //float rc[N];
  float m[64];

  float *dv; 
  float *dr; 
  float *dm;
  
  v = (float*)malloc(sizeof(float) * N);
  r = (float*)malloc(sizeof(float) * N);
  memset(m,0,64*sizeof(float));
  
  for (int i = 0; i < N; i ++) {
    v[i] = 1.0; 
    r[i] = 7.0;
  }

  hipMalloc((void**)&dv,N*sizeof(float)); 
  hipMalloc((void**)&dr,N*sizeof(float));
  hipMalloc((void**)&dm,64*sizeof(float));
  
  hipMemcpy(dv,v,N*sizeof(float),hipMemcpyHostToDevice);
  
  //kernel<<<1,32,32*3*(sizeof(float))>>>(dv,dr,dm);
  //kernel<<<1,16,32*2*(sizeof(float))>>>(dv,dr,dm);
  
  hipEvent_t start, stop;
  hipEventCreate(&start);
  hipEventCreate(&stop);
  hipEventRecord(start,0);

  kernel<<<4096,256,(512+64)*(sizeof(float))>>>(dv,dr,dm);

  hipEventRecord(stop,0);
  hipEventSynchronize(stop);
  float elapsedTime;
  hipEventElapsedTime(&elapsedTime, start, stop);

  // std::cout << std::endl;

  hipMemcpy(r,dr,N*sizeof(float),hipMemcpyDeviceToHost);
  hipMemcpy(m,dm,64*sizeof(float),hipMemcpyDeviceToHost);


  for (int i = 0; i < 4096 /*N*/; i ++) { 
    printf("%f ",r[i]);
  }

  
  printf("\n ------ \n");
  
  for (int i = 0; i < 64; i ++) { 
    printf("%f ",m[i]);
  }
  
  

  printf("Elapsed time: %f\n", elapsedTime);


  //seqScan(v,rc,N);
  //int s = compare(rc,r,0.01,N);
 
 

  //printf ("\n%s\n", s? "same" : "not the same");
  

  return 0;
}



	.text
	.file	"sklansky5.hip"
	.globl	_Z21__device_stub__kernelPfS_S_ # -- Begin function _Z21__device_stub__kernelPfS_S_
	.type	_Z21__device_stub__kernelPfS_S_,@function
_Z21__device_stub__kernelPfS_S_:        # @_Z21__device_stub__kernelPfS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z6kernelPfS_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z21__device_stub__kernelPfS_S_, .Lfunc_end0-_Z21__device_stub__kernelPfS_S_
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$304, %rsp                      # imm = 0x130
	.cfi_def_cfa_offset 336
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	$67108864, %edi                 # imm = 0x4000000
	callq	malloc
	movq	%rax, %r14
	movl	$67108864, %edi                 # imm = 0x4000000
	callq	malloc
	movq	%rax, %rbx
	leaq	48(%rsp), %rdi
	xorl	%r15d, %r15d
	movl	$256, %edx                      # imm = 0x100
	xorl	%esi, %esi
	callq	memset@PLT
.LBB1_1:                                # =>This Inner Loop Header: Depth=1
	movl	$1065353216, (%r14,%r15,4)      # imm = 0x3F800000
	movl	$1088421888, (%rbx,%r15,4)      # imm = 0x40E00000
	incq	%r15
	cmpq	$16777216, %r15                 # imm = 0x1000000
	jne	.LBB1_1
# %bb.2:
	leaq	40(%rsp), %r15
	movl	$67108864, %esi                 # imm = 0x4000000
	movq	%r15, %rdi
	callq	hipMalloc
	leaq	24(%rsp), %rdi
	movl	$67108864, %esi                 # imm = 0x4000000
	callq	hipMalloc
	leaq	16(%rsp), %rdi
	movl	$256, %esi                      # imm = 0x100
	callq	hipMalloc
	movq	(%r15), %rdi
	movl	$67108864, %edx                 # imm = 0x4000000
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	32(%rsp), %r14
	movq	%r14, %rdi
	callq	hipEventCreate
	movq	%rsp, %rdi
	callq	hipEventCreate
	movq	(%r14), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movabsq	$4294967552, %rdx               # imm = 0x100000100
	leaq	3840(%rdx), %rdi
	movl	$2304, %r8d                     # imm = 0x900
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_4
# %bb.3:
	movq	40(%rsp), %rdi
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdx
	callq	_Z21__device_stub__kernelPfS_S_
.LBB1_4:
	movq	(%rsp), %rdi
	xorl	%r14d, %r14d
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	(%rsp), %rdi
	callq	hipEventSynchronize
	movq	32(%rsp), %rsi
	movq	(%rsp), %rdx
	leaq	12(%rsp), %rdi
	callq	hipEventElapsedTime
	movq	24(%rsp), %rsi
	movl	$67108864, %edx                 # imm = 0x4000000
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	16(%rsp), %rsi
	leaq	48(%rsp), %rdi
	movl	$256, %edx                      # imm = 0x100
	movl	$2, %ecx
	callq	hipMemcpy
.LBB1_5:                                # =>This Inner Loop Header: Depth=1
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rbx,%r14,4), %xmm0
	movl	$.L.str, %edi
	movb	$1, %al
	callq	printf
	incq	%r14
	cmpq	$4096, %r14                     # imm = 0x1000
	jne	.LBB1_5
# %bb.6:
	movl	$.Lstr, %edi
	callq	puts@PLT
	xorl	%ebx, %ebx
.LBB1_7:                                # =>This Inner Loop Header: Depth=1
	xorps	%xmm0, %xmm0
	cvtss2sd	48(%rsp,%rbx,4), %xmm0
	movl	$.L.str, %edi
	movb	$1, %al
	callq	printf
	incq	%rbx
	cmpq	$64, %rbx
	jne	.LBB1_7
# %bb.8:
	xorps	%xmm0, %xmm0
	cvtss2sd	12(%rsp), %xmm0
	movl	$.L.str.2, %edi
	movb	$1, %al
	callq	printf
	xorl	%eax, %eax
	addq	$304, %rsp                      # imm = 0x130
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z6kernelPfS_S_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z6kernelPfS_S_,@object         # @_Z6kernelPfS_S_
	.section	.rodata,"a",@progbits
	.globl	_Z6kernelPfS_S_
	.p2align	3, 0x0
_Z6kernelPfS_S_:
	.quad	_Z21__device_stub__kernelPfS_S_
	.size	_Z6kernelPfS_S_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"%f "
	.size	.L.str, 4

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Elapsed time: %f\n"
	.size	.L.str.2, 18

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z6kernelPfS_S_"
	.size	.L__unnamed_1, 16

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"\n ------ "
	.size	.Lstr, 10

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z21__device_stub__kernelPfS_S_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z6kernelPfS_S_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z6kernelPfS_S_         ; -- Begin function _Z6kernelPfS_S_
	.globl	_Z6kernelPfS_S_
	.p2align	8
	.type	_Z6kernelPfS_S_,@function
_Z6kernelPfS_S_:                        ; @_Z6kernelPfS_S_
; %bb.0:
	v_lshlrev_b32_e32 v14, 3, v0
	s_mov_b32 s9, 0
	s_lshl_b32 s8, s15, 12
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[2:3], s[0:1], 0x10
	s_lshl_b64 s[0:1], s[8:9], 2
	v_lshlrev_b32_e32 v1, 1, v0
	v_and_b32_e32 v4, 0x1ff0, v14
	v_dual_mov_b32 v18, s1 :: v_dual_and_b32 v3, 1, v0
	v_and_b32_e32 v6, 3, v0
	s_delay_alu instid0(VALU_DEP_4)
	v_or_b32_e32 v5, 3, v1
	v_or_b32_e32 v8, 7, v1
	v_add_nc_u32_e32 v7, 0, v4
	v_and_b32_e32 v4, 0x1fe0, v14
	v_or_b32_e32 v10, 15, v1
	v_and_b32_e32 v11, 7, v0
	v_sub_nc_u32_e32 v3, v5, v3
	v_sub_nc_u32_e32 v6, v8, v6
	v_add_nc_u32_e32 v8, 0, v4
	v_or_b32_e32 v13, 63, v1
	v_sub_nc_u32_e32 v4, v10, v11
	v_or_b32_e32 v10, 31, v1
	v_and_b32_e32 v11, 15, v0
	v_and_b32_e32 v15, 31, v0
	v_lshl_add_u32 v5, v3, 2, 0
	v_lshl_add_u32 v3, v6, 2, 0
	v_lshl_add_u32 v6, v4, 2, 0
	v_and_b32_e32 v4, 0x1f80, v14
	v_sub_nc_u32_e32 v11, v10, v11
	v_and_b32_e32 v12, 0x1f00, v14
	v_sub_nc_u32_e32 v16, v13, v15
	v_lshrrev_b32_e32 v17, 3, v0
	v_add_nc_u32_e32 v10, 0, v4
	v_lshl_add_u32 v4, v11, 2, 0
	v_add_nc_u32_e32 v11, 0, v12
	v_lshl_add_u32 v12, v16, 2, 0
	v_and_b32_e32 v16, 0x7c, v17
	v_or3_b32 v17, s0, v14, 4
	v_add_nc_u32_e32 v2, 0, v14
	v_and_b32_e32 v9, 0x1fc0, v14
	v_cmp_eq_u32_e32 vcc_lo, 0, v15
	v_add3_u32 v14, 0, v16, 0x800
	v_mov_b32_e32 v16, s1
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v15, s0, s6, v17
	v_add_nc_u32_e32 v9, 0, v9
	v_lshl_add_u32 v13, v13, 2, 0
	v_add_co_ci_u32_e64 v16, s0, s7, v16, s0
	v_add_co_u32 v17, s0, s4, v17
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v18, s0, s5, v18, s0
	s_mov_b64 s[4:5], 0
.LBB0_1:                                ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_add_co_u32 v19, s0, v17, s4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v20, s0, s5, v18, s0
	v_add_co_u32 v21, s0, v15, s4
	v_add_co_ci_u32_e64 v22, s0, s5, v16, s0
	global_load_b64 v[19:20], v[19:20], off offset:-4
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v20, v19, v20
	ds_store_2addr_b32 v2, v19, v20 offset1:1
	ds_load_b32 v19, v7 offset:4
	ds_load_b32 v20, v5
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v19, v19, v20
	ds_store_b32 v5, v19
	ds_load_b32 v19, v8 offset:12
	ds_load_b32 v20, v3
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v19, v19, v20
	ds_store_b32 v3, v19
	ds_load_b32 v19, v9 offset:28
	ds_load_b32 v20, v6
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v19, v19, v20
	ds_store_b32 v6, v19
	ds_load_b32 v19, v10 offset:60
	ds_load_b32 v20, v4
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v19, v19, v20
	ds_store_b32 v4, v19
	ds_load_b32 v19, v11 offset:124
	ds_load_b32 v20, v12
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v19, v19, v20
	ds_store_b32 v12, v19
	ds_load_2addr_b32 v[19:20], v2 offset1:1
	s_waitcnt lgkmcnt(0)
	global_store_b64 v[21:22], v[19:20], off offset:-4
	s_and_saveexec_b32 s0, vcc_lo
	s_cbranch_execz .LBB0_3
; %bb.2:                                ;   in Loop: Header=BB0_1 Depth=1
	ds_load_b32 v19, v13
	s_waitcnt lgkmcnt(0)
	ds_store_b32 v14, v19
.LBB0_3:                                ; %_Z8skl_scaniPfS_S_S_.exit
                                        ;   in Loop: Header=BB0_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	v_add_nc_u32_e32 v14, 32, v14
	s_add_u32 s4, s4, 0x800
	s_addc_u32 s5, s5, 0
	s_cmpk_eq_i32 s4, 0x4000
	s_cbranch_scc0 .LBB0_1
; %bb.4:
	v_cmp_gt_u32_e32 vcc_lo, 32, v0
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s0, vcc_lo
	s_cbranch_execz .LBB0_6
; %bb.5:
	v_add_nc_u32_e32 v9, 0x800, v2
	v_and_b32_e32 v10, 60, v1
	ds_load_2addr_b32 v[7:8], v9 offset1:1
	v_lshl_add_u32 v10, v10, 2, 0
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v8, v7, v8
	ds_store_2addr_b32 v2, v7, v8 offset1:1
	ds_load_b32 v7, v10 offset:4
	ds_load_b32 v8, v5
	s_waitcnt lgkmcnt(0)
	v_dual_add_f32 v7, v7, v8 :: v_dual_and_b32 v10, 56, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_lshl_add_u32 v8, v10, 2, 0
	ds_store_b32 v5, v7
	ds_load_b32 v5, v8 offset:12
	ds_load_b32 v7, v3
	v_and_b32_e32 v8, 48, v1
	v_and_b32_e32 v1, 32, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_lshl_add_u32 v1, v1, 2, 0
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v5, v5, v7
	v_lshl_add_u32 v7, v8, 2, 0
	ds_store_b32 v3, v5
	ds_load_b32 v3, v7 offset:28
	ds_load_b32 v5, v6
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v3, v3, v5
	v_xor_b32_e32 v5, 63, v0
	ds_store_b32 v6, v3
	ds_load_b32 v1, v1 offset:60
	ds_load_b32 v3, v4
	v_lshl_add_u32 v5, v5, 2, 0
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v1, v1, v3
	v_mov_b32_e32 v3, 0
	ds_store_b32 v4, v1
	ds_load_b32 v1, v3 offset:124
	ds_load_b32 v3, v5
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v1, v1, v3
	ds_store_b32 v5, v1
	ds_load_2addr_b32 v[1:2], v2 offset1:1
	s_waitcnt lgkmcnt(0)
	ds_store_2addr_b32 v9, v1, v2 offset1:1
.LBB0_6:                                ; %_Z8skl_scaniPfS_S_S_.exit28
	s_or_b32 exec_lo, exec_lo, s0
	v_or_b32_e32 v1, s8, v0
	v_lshrrev_b32_e32 v7, 4, v0
	v_mov_b32_e32 v2, 0
	v_cmp_lt_u32_e64 s0, 63, v0
	v_or_b32_e32 v5, 0x800, v0
	v_or_b32_e32 v6, 0x800, v1
	s_mov_b32 s4, 0
	v_lshlrev_b64 v[3:4], 2, v[1:2]
	v_and_b32_e32 v1, 60, v7
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_add_co_u32 v3, s1, s6, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s1, s7, v4, s1
	v_add3_u32 v7, v1, 0, 0x7fc
.LBB0_7:                                ; =>This Inner Loop Header: Depth=1
	s_cmp_lg_u32 s4, 0
	v_mov_b32_e32 v8, 0
	s_cselect_b32 s1, -1, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s5, s0, s1
	s_and_saveexec_b32 s1, s5
	s_cbranch_execz .LBB0_9
; %bb.8:                                ;   in Loop: Header=BB0_7 Depth=1
	global_load_b32 v1, v[3:4], off
	ds_load_b32 v8, v7
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_dual_add_f32 v1, v8, v1 :: v_dual_mov_b32 v8, s4
	global_store_b32 v[3:4], v1, off
.LBB0_9:                                ; %._crit_edge
                                        ;   in Loop: Header=BB0_7 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	v_add_nc_u32_e32 v1, v6, v8
	v_add_nc_u32_e32 v8, v5, v8
	v_add_nc_u32_e32 v7, 16, v7
	s_addk_i32 s4, 0x100
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_cmpk_eq_i32 s4, 0x800
	v_lshlrev_b64 v[9:10], 2, v[1:2]
	v_lshrrev_b32_e32 v8, 4, v8
	v_and_b32_e32 v8, 0xffffffc, v8
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v9, s1, s6, v9
	v_add_co_ci_u32_e64 v10, s1, s7, v10, s1
	s_delay_alu instid0(VALU_DEP_3)
	v_add_nc_u32_e32 v8, 0, v8
	v_add_co_u32 v3, s1, 0x400, v3
	global_load_b32 v1, v[9:10], off
	v_add_co_ci_u32_e64 v4, s1, 0, v4, s1
	ds_load_b32 v8, v8 offset:2044
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_f32_e32 v1, v8, v1
	global_store_b32 v[9:10], v1, off
	s_cbranch_scc0 .LBB0_7
; %bb.10:
	s_and_saveexec_b32 s0, vcc_lo
	s_cbranch_execz .LBB0_12
; %bb.11:
	v_lshlrev_b32_e32 v2, 2, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v0, 0, v2
	v_add_nc_u32_e32 v0, 0x800, v0
	ds_load_2addr_b32 v[0:1], v0 offset1:32
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_store_b32 v2, v0, s[2:3]
	global_store_b32 v2, v1, s[2:3] offset:128
.LBB0_12:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z6kernelPfS_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 24
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 23
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z6kernelPfS_S_, .Lfunc_end0-_Z6kernelPfS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1292
; NumSgprs: 18
; NumVgprs: 23
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 23
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 24
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z6kernelPfS_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z6kernelPfS_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     23
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
