/*******************************************************************************

This program uses streams and events to asynchronously perform arithmetic
functions on the GPU. Comparison of timing is shown as output.

Author: Said Darham
*******************************************************************************/

#include <iostream>
#include <stdlib.h> //srand and rand
#include <math.h>

// Test types
#define THREAD 1
#define STREAM 2

//Timer struct declaration. Using CUDA EVENTS
typedef struct timer{
  cudaEvent_t startEvent;
  cudaEvent_t stopEvent;
  float time_ms;
} timerEvent;

/*******************************************************************************

                        PROFILER FUNCTIONS USING EVENTS

*******************************************************************************/
void startEventTimer(timerEvent *timer){
  /* startEventTimer()
     Creates and starts recording an event
  */
  cudaEventCreate(&timer->startEvent);
  cudaEventCreate(&timer->stopEvent);
  cudaEventRecord(timer->startEvent);
}

void stopEventTimer(timerEvent *timer){
  /* stopEventTimer()
     Stops an event and calculates the elapsed time between start and stop event
  */
  cudaEventRecord(timer->stopEvent);
  cudaEventSynchronize(timer->stopEvent);
  cudaEventElapsedTime(&timer->time_ms, timer->startEvent, timer->stopEvent);

}
void freeEventTimer(timerEvent *timer){
  /*  freeEventTimer()
      cleans up the events
  */
  cudaEventDestroy(timer->startEvent);
  cudaEventDestroy(timer->stopEvent);
}

void checkDevices(void){
  //Check and print devices name
  cudaDeviceProp prop;
  int deviceCount; //number of devices found
  int devId = 0; // default device Id

  cudaGetDeviceCount(&deviceCount);

  if(deviceCount == 0){
    std::cout << "No GPU Device Found\n";
    exit(0);
  }else if(deviceCount == 1){
    cudaSetDevice(devId); //set the device 0 as default
  }

  std::cout << "Number Of Devices Found: " << deviceCount << std::endl;
  //Print device names and some basic associated properties
  for (int i = 0; i<deviceCount; i++){
    cudaGetDeviceProperties(&prop,i);
    std::cout << "Device " << i << " Name: " << prop.name << std::endl;
    std::cout << "Compute Capability: " << prop.major << "." << prop.minor << std::endl;
  }
}


/*******************************************************************************

ARITHMETIC KERNEL FUNCTIONS

*******************************************************************************/
// Add Function
__global__ void add(int *a, int *b, int *c, int n){
  // Get our global thread ID
  int id = blockIdx.x*blockDim.x+threadIdx.x;

  // Make sure we do not go out of bounds
  if (id < n)
  c[id] = a[id] + b[id];
}
// subtract function
__global__ void subtract(int *a, int *b, int *c, int n){
  // Get our global thread ID
  int id = blockIdx.x*blockDim.x+threadIdx.x;

  // Make sure we do not go out of bounds
  if (id < n)
  c[id] = a[id] - b[id];
}
// multiply function
__global__ void mult(int *a, int *b, int *c, int n){
  // Get our global thread ID
  int id = blockIdx.x*blockDim.x+threadIdx.x;

  // Make sure we do not go out of bounds
  if (id < n)
  c[id] = a[id] * b[id];
}
// Moudulu function
__global__ void mod(int *a, int *b, int *c, int n){
  // Get our global thread ID
  int id = blockIdx.x*blockDim.x+threadIdx.x;

  // Make sure we do not go out of bounds
  if (id < n)
  c[id] = a[id] % b[id];
}



/*******************************************************************************

                                  GPU Test
                        ( Sequential Threads & STREAMS)

*******************************************************************************/
void gpuTest(int numBlocks, int totalThreads, const int testType){
  /*  gpuTest()
      runs either sequential transfer and execute or asynchronous streams
      testType is either THREAD or STREAM
  */

  //Since both transfer and execute routines will use pinned memory, allocating
  //and initializing data is the same for both

  // Host input/output vectors
  int *h_a, *h_b, *h_c_add,*h_c_sub,*h_c_mult,*h_c_mod;

  // Device input/output vectors
  int *d_a, *d_b, *d_c_add,*d_c_sub,*d_c_mult,*d_c_mod;

  // Size, in bytes, of each vector
  const unsigned int bytes = totalThreads*sizeof(int);

  // Allocate memory for each vector on host Pinned
  cudaMallocHost((void**)&h_a, bytes);
  cudaMallocHost((void**)&h_b, bytes);
  cudaMallocHost((void**)&h_c_add, bytes);
  cudaMallocHost((void**)&h_c_sub, bytes);
  cudaMallocHost((void**)&h_c_mult, bytes);
  cudaMallocHost((void**)&h_c_mod, bytes);

  // Allocate memory for each vector on GPU
  cudaMalloc(&d_a, bytes);
  cudaMalloc(&d_b, bytes);
  cudaMalloc(&d_c_add, bytes);
  cudaMalloc(&d_c_sub, bytes);
  cudaMalloc(&d_c_mult, bytes);
  cudaMalloc(&d_c_mod, bytes);

  //initialize the input vectors
	for(int i = 0;i<totalThreads;i++){
		//first array is 0 through number of threads
		h_a[i] = i;
		// second array is a random number between 0 and 3
		h_b[i] = rand() % 4;
	}

  // create a struct which will contain info for timing using events
  timerEvent timer;

  switch(testType){
    case THREAD:
      std::cout << "\n\t\t*****Executing Arithmetic Functions Using Sequential*****" << std::endl;

      //Transfer and Profile data from host to device and profile using EVENTS
      startEventTimer(&timer);
      cudaMemcpy( d_a, h_a, bytes, cudaMemcpyHostToDevice);
      cudaMemcpy( d_b, h_b, bytes, cudaMemcpyHostToDevice);

      //Execute  the kernel arithmetic functions
    	add<<<numBlocks, totalThreads>>>(d_a, d_b, d_c_add, totalThreads);
    	subtract<<<numBlocks, totalThreads>>>(d_a, d_b, d_c_sub, totalThreads);
    	mult<<<numBlocks, totalThreads>>>(d_a, d_b, d_c_mult, totalThreads);
    	mod<<<numBlocks, totalThreads>>>(d_a, d_b, d_c_mod, totalThreads);

      //Transfer data from device to host
      cudaMemcpy(h_c_add, d_c_add, bytes, cudaMemcpyDeviceToHost);
      cudaMemcpy(h_c_sub, d_c_sub, bytes, cudaMemcpyDeviceToHost);
      cudaMemcpy(h_c_mult, d_c_mult, bytes, cudaMemcpyDeviceToHost);
      cudaMemcpy(h_c_mod, d_c_mod, bytes, cudaMemcpyDeviceToHost);
      stopEventTimer(&timer);

      std::cout << "Time Elaplsed For Sequential Transfer and Execute: " << timer.time_ms << " ms" << std::endl;
      break;
    case STREAM:
    {
      std::cout << "\n\t\t*****Executing Arithmetic Functions Using Streams*****\n";

      //choose 4 streams for four kernels
      int nStreams = 4;
      int iStream; //

      //create four asynchronous streams
      cudaStream_t stream[nStreams];
      for(iStream = 0; iStream < nStreams; iStream++)
        cudaStreamCreate(&stream[iStream]);

      //Copy data from host to device and profile using EVENTS
      startEventTimer(&timer);

      for(iStream = 0; iStream < nStreams; iStream++ ){
        cudaMemcpyAsync(d_a, h_a, bytes, cudaMemcpyHostToDevice, stream[iStream]);
        cudaMemcpyAsync(d_b, h_b, bytes, cudaMemcpyHostToDevice, stream[iStream]);
      }

    	add<<<numBlocks, totalThreads, 0, stream[0]>>>(d_a, d_b, d_c_add, totalThreads);
      cudaMemcpyAsync(h_c_add, d_c_add, bytes, cudaMemcpyDeviceToHost, stream[0]);
      //performing subtract function
    	subtract<<<numBlocks, totalThreads, 0, stream[1]>>>(d_a, d_b, d_c_sub, totalThreads);
      cudaMemcpyAsync(h_c_sub, d_c_sub, bytes, cudaMemcpyDeviceToHost, stream[1]);
    	//performing mult function
    	mult<<<numBlocks, totalThreads, 0, stream[2]>>>(d_a, d_b, d_c_mult, totalThreads);
      cudaMemcpyAsync(h_c_mult, d_c_mult, bytes, cudaMemcpyDeviceToHost, stream[2]);
    	//performing mod fuction
    	mod<<<numBlocks, totalThreads, 0, stream[3]>>>(d_a, d_b, d_c_mod, totalThreads);
      cudaMemcpyAsync(h_c_mod, d_c_mod, bytes, cudaMemcpyDeviceToHost, stream[2]);

      //Wait till all tasks referenced to streams are finished
      for(iStream = 0; iStream < nStreams; iStream++)
        cudaStreamSynchronize(stream[iStream]);

      stopEventTimer(&timer);
      std::cout << "TIME ELAPSED For Asynchronous Transfer and Execute: " << timer.time_ms << " ms" << std::endl;
      break;
    }
    default:
      std::cout << "Unknown Test Type!\n";
      break;
  }

  //destroy Event timer
  freeEventTimer(&timer);

  //free up space on our GPU
	cudaFree(d_a);
	cudaFree(d_b);
	cudaFree(d_c_add);
	cudaFree(d_c_sub);
	cudaFree(d_c_mult);
	cudaFree(d_c_add);

	//free up space on our CPU use cudaFreeHost since pinnned
	cudaFreeHost(h_a);
	cudaFreeHost(h_b);
	cudaFreeHost(h_c_add);
	cudaFreeHost(h_c_sub);
	cudaFreeHost(h_c_mult);
	cudaFreeHost(h_c_mod);
}


/*******************************************************************************

MAIN

*******************************************************************************/
int main(int argc, char** argv)
{

  int totalThreads = (1 << 10);
  int blockSize = 256;

  //User wants to run the Global vs Pinned Examples
  if( argc > 2 && argc < 4){
    // Ensure the user supplies both number of threads and block size
    // otherwise use default values
    totalThreads = atoi(argv[1]);
    blockSize = atoi(argv[2]);
  }

  int numBlocks = totalThreads/blockSize;
  std::cout << "\nUsing " << totalThreads << " Threads and " << blockSize << " BlockSize\n" ;

  // validate command line arguments
  if (totalThreads % blockSize != 0) {
    ++numBlocks;
    totalThreads = numBlocks*blockSize;
    std::cout << "Warning: Total thread count is not evenly divisible by the block size\n";
    std::cout << "The total number of threads will be rounded up to %d\n";
  }

  // get number of devices and print some basic properties
  checkDevices();

  //perform Sequential transfer and execute Test
  gpuTest( totalThreads, numBlocks, THREAD);

  //perform asynchronous transfer and execute using streams
  gpuTest( totalThreads, numBlocks, STREAM);
  return 0;
}

	.file	"tmpxft_0037dc7e_00000000-6_assignment7.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3643:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3643:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.align 2
	.type	_ZNSolsEPFRSoS_E.isra.0, @function
_ZNSolsEPFRSoS_E.isra.0:
.LFB4305:
	.cfi_startproc
	jmp	*%rsi
	.cfi_endproc
.LFE4305:
	.size	_ZNSolsEPFRSoS_E.isra.0, .-_ZNSolsEPFRSoS_E.isra.0
	.globl	_Z15startEventTimerP5timer
	.type	_Z15startEventTimerP5timer, @function
_Z15startEventTimerP5timer:
.LFB3635:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movq	%rdi, %rbx
	call	cudaEventCreate@PLT
	leaq	8(%rbx), %rdi
	call	cudaEventCreate@PLT
	movq	(%rbx), %rdi
	xorl	%esi, %esi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	cudaEventRecord@PLT
	.cfi_endproc
.LFE3635:
	.size	_Z15startEventTimerP5timer, .-_Z15startEventTimerP5timer
	.globl	_Z14stopEventTimerP5timer
	.type	_Z14stopEventTimerP5timer, @function
_Z14stopEventTimerP5timer:
.LFB3636:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movq	%rdi, %rbx
	movq	8(%rdi), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	8(%rbx), %rdi
	call	cudaEventSynchronize@PLT
	movq	8(%rbx), %rdx
	movq	(%rbx), %rsi
	leaq	16(%rbx), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	cudaEventElapsedTime@PLT
	.cfi_endproc
.LFE3636:
	.size	_Z14stopEventTimerP5timer, .-_Z14stopEventTimerP5timer
	.globl	_Z14freeEventTimerP5timer
	.type	_Z14freeEventTimerP5timer, @function
_Z14freeEventTimerP5timer:
.LFB3637:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movq	%rdi, %rbx
	movq	(%rdi), %rdi
	call	cudaEventDestroy@PLT
	movq	8(%rbx), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	cudaEventDestroy@PLT
	.cfi_endproc
.LFE3637:
	.size	_Z14freeEventTimerP5timer, .-_Z14freeEventTimerP5timer
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"No GPU Device Found\n"
.LC1:
	.string	"Number Of Devices Found: "
.LC2:
	.string	"Device "
.LC3:
	.string	" Name: "
.LC4:
	.string	"Compute Capability: "
.LC5:
	.string	"."
	.text
	.globl	_Z12checkDevicesv
	.type	_Z12checkDevicesv, @function
_Z12checkDevicesv:
.LFB3638:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	leaq	_ZSt4cout(%rip), %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	subq	$1064, %rsp
	.cfi_def_cfa_offset 1104
	movq	%fs:40, %rax
	movq	%rax, 1048(%rsp)
	xorl	%eax, %eax
	leaq	12(%rsp), %rdi
	call	cudaGetDeviceCount@PLT
	movl	12(%rsp), %eax
	testl	%eax, %eax
	jne	.L10
	movq	%rbp, %rdi
	leaq	.LC0(%rip), %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	xorl	%edi, %edi
	call	exit@PLT
.L10:
	decl	%eax
	jne	.L11
	xorl	%edi, %edi
	call	cudaSetDevice@PLT
.L11:
	leaq	.LC1(%rip), %rsi
	movq	%rbp, %rdi
	xorl	%ebx, %ebx
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	12(%rsp), %esi
	leaq	.LC2(%rip), %r12
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
.L12:
	cmpl	%ebx, 12(%rsp)
	jle	.L17
	leaq	16(%rsp), %r13
	movl	%ebx, %esi
	movq	%r13, %rdi
	call	cudaGetDeviceProperties_v2@PLT
	movq	%r12, %rsi
	movq	%rbp, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%ebx, %esi
	incl	%ebx
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	leaq	.LC3(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%r13, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	leaq	.LC4(%rip), %rsi
	movq	%rbp, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	376(%rsp), %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	leaq	.LC5(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	380(%rsp), %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	jmp	.L12
.L17:
	movq	1048(%rsp), %rax
	subq	%fs:40, %rax
	je	.L14
	call	__stack_chk_fail@PLT
.L14:
	addq	$1064, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3638:
	.size	_Z12checkDevicesv, .-_Z12checkDevicesv
	.globl	_Z27__device_stub__Z3addPiS_S_iPiS_S_i
	.type	_Z27__device_stub__Z3addPiS_S_iPiS_S_i, @function
_Z27__device_stub__Z3addPiS_S_iPiS_S_i:
.LFB3665:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L18
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z3addPiS_S_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L18:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L20
	call	__stack_chk_fail@PLT
.L20:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3665:
	.size	_Z27__device_stub__Z3addPiS_S_iPiS_S_i, .-_Z27__device_stub__Z3addPiS_S_iPiS_S_i
	.globl	_Z3addPiS_S_i
	.type	_Z3addPiS_S_i, @function
_Z3addPiS_S_i:
.LFB3666:
	.cfi_startproc
	endbr64
	jmp	_Z27__device_stub__Z3addPiS_S_iPiS_S_i
	.cfi_endproc
.LFE3666:
	.size	_Z3addPiS_S_i, .-_Z3addPiS_S_i
	.globl	_Z32__device_stub__Z8subtractPiS_S_iPiS_S_i
	.type	_Z32__device_stub__Z8subtractPiS_S_iPiS_S_i, @function
_Z32__device_stub__Z8subtractPiS_S_iPiS_S_i:
.LFB3667:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L23
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z8subtractPiS_S_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L23:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L25
	call	__stack_chk_fail@PLT
.L25:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3667:
	.size	_Z32__device_stub__Z8subtractPiS_S_iPiS_S_i, .-_Z32__device_stub__Z8subtractPiS_S_iPiS_S_i
	.globl	_Z8subtractPiS_S_i
	.type	_Z8subtractPiS_S_i, @function
_Z8subtractPiS_S_i:
.LFB3668:
	.cfi_startproc
	endbr64
	jmp	_Z32__device_stub__Z8subtractPiS_S_iPiS_S_i
	.cfi_endproc
.LFE3668:
	.size	_Z8subtractPiS_S_i, .-_Z8subtractPiS_S_i
	.globl	_Z28__device_stub__Z4multPiS_S_iPiS_S_i
	.type	_Z28__device_stub__Z4multPiS_S_iPiS_S_i, @function
_Z28__device_stub__Z4multPiS_S_iPiS_S_i:
.LFB3669:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L28
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z4multPiS_S_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L28:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L30
	call	__stack_chk_fail@PLT
.L30:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3669:
	.size	_Z28__device_stub__Z4multPiS_S_iPiS_S_i, .-_Z28__device_stub__Z4multPiS_S_iPiS_S_i
	.globl	_Z4multPiS_S_i
	.type	_Z4multPiS_S_i, @function
_Z4multPiS_S_i:
.LFB3670:
	.cfi_startproc
	endbr64
	jmp	_Z28__device_stub__Z4multPiS_S_iPiS_S_i
	.cfi_endproc
.LFE3670:
	.size	_Z4multPiS_S_i, .-_Z4multPiS_S_i
	.globl	_Z27__device_stub__Z3modPiS_S_iPiS_S_i
	.type	_Z27__device_stub__Z3modPiS_S_iPiS_S_i, @function
_Z27__device_stub__Z3modPiS_S_iPiS_S_i:
.LFB3671:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L33
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z3modPiS_S_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L33:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L35
	call	__stack_chk_fail@PLT
.L35:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3671:
	.size	_Z27__device_stub__Z3modPiS_S_iPiS_S_i, .-_Z27__device_stub__Z3modPiS_S_iPiS_S_i
	.globl	_Z3modPiS_S_i
	.type	_Z3modPiS_S_i, @function
_Z3modPiS_S_i:
.LFB3672:
	.cfi_startproc
	endbr64
	jmp	_Z27__device_stub__Z3modPiS_S_iPiS_S_i
	.cfi_endproc
.LFE3672:
	.size	_Z3modPiS_S_i, .-_Z3modPiS_S_i
	.section	.rodata.str1.1
.LC6:
	.string	"\n\t\t*****Executing Arithmetic Functions Using Sequential*****"
.LC7:
	.string	"Time Elaplsed For Sequential Transfer and Execute: "
.LC8:
	.string	" ms"
.LC9:
	.string	"\n\t\t*****Executing Arithmetic Functions Using Streams*****\n"
.LC10:
	.string	"TIME ELAPSED For Asynchronous Transfer and Execute: "
.LC11:
	.string	"Unknown Test Type!\n"
	.text
	.globl	_Z7gpuTestiii
	.type	_Z7gpuTestiii, @function
_Z7gpuTestiii:
.LFB3639:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register 6
	pushq	%r15
	.cfi_offset 15, -24
	movl	$4, %r15d
	pushq	%r14
	.cfi_offset 14, -32
	movl	%edi, %r14d
	leaq	-200(%rbp), %rdi
	pushq	%r13
	.cfi_offset 13, -40
	movl	%edx, %r13d
	pushq	%r12
	.cfi_offset 12, -48
	movl	%esi, %r12d
	pushq	%rbx
	.cfi_offset 3, -56
	xorl	%ebx, %ebx
	subq	$200, %rsp
	movq	%fs:40, %rax
	movq	%rax, -56(%rbp)
	xorl	%eax, %eax
	leal	0(,%r12,4), %eax
	movq	%rax, %rsi
	movq	%rax, -216(%rbp)
	call	cudaMallocHost@PLT
	movq	-216(%rbp), %rsi
	leaq	-192(%rbp), %rdi
	call	cudaMallocHost@PLT
	movq	-216(%rbp), %rsi
	leaq	-184(%rbp), %rdi
	call	cudaMallocHost@PLT
	movq	-216(%rbp), %rsi
	leaq	-176(%rbp), %rdi
	call	cudaMallocHost@PLT
	movq	-216(%rbp), %rsi
	leaq	-168(%rbp), %rdi
	call	cudaMallocHost@PLT
	movq	-216(%rbp), %rsi
	leaq	-160(%rbp), %rdi
	call	cudaMallocHost@PLT
	movq	-216(%rbp), %rsi
	leaq	-152(%rbp), %rdi
	call	cudaMalloc@PLT
	movq	-216(%rbp), %rsi
	leaq	-144(%rbp), %rdi
	call	cudaMalloc@PLT
	movq	-216(%rbp), %rsi
	leaq	-136(%rbp), %rdi
	call	cudaMalloc@PLT
	movq	-216(%rbp), %rsi
	leaq	-128(%rbp), %rdi
	call	cudaMalloc@PLT
	movq	-216(%rbp), %rsi
	leaq	-120(%rbp), %rdi
	call	cudaMalloc@PLT
	movq	-216(%rbp), %rsi
	leaq	-112(%rbp), %rdi
	call	cudaMalloc@PLT
.L39:
	cmpl	%ebx, %r12d
	jle	.L63
	movq	-200(%rbp), %rax
	movl	%ebx, (%rax,%rbx,4)
	call	rand@PLT
	cltd
	idivl	%r15d
	movq	-192(%rbp), %rax
	movl	%edx, (%rax,%rbx,4)
	incq	%rbx
	jmp	.L39
.L63:
	cmpl	$1, %r13d
	je	.L41
	cmpl	$2, %r13d
	jne	.L64
	leaq	.LC9(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	movq	%rsp, -224(%rbp)
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	jmp	.L49
.L41:
	leaq	.LC6(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	leaq	-80(%rbp), %r13
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movq	%r13, %rdi
	call	_Z15startEventTimerP5timer
	movq	-216(%rbp), %rdx
	movl	$1, %ecx
	movq	-200(%rbp), %rsi
	movq	-152(%rbp), %rdi
	call	cudaMemcpy@PLT
	movq	-216(%rbp), %rdx
	movl	$1, %ecx
	movq	-192(%rbp), %rsi
	movq	-144(%rbp), %rdi
	call	cudaMemcpy@PLT
	movl	%r12d, -92(%rbp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movabsq	$4294967297, %rax
	movl	%r14d, -104(%rbp)
	movq	%rax, -88(%rbp)
	movl	-84(%rbp), %ecx
	movq	%rax, -100(%rbp)
	movq	-92(%rbp), %rdx
	movq	-104(%rbp), %rdi
	movl	-96(%rbp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L44
	movq	-136(%rbp), %rdx
	movq	-144(%rbp), %rsi
	movl	%r12d, %ecx
	movq	-152(%rbp), %rdi
	call	_Z27__device_stub__Z3addPiS_S_iPiS_S_i
.L44:
	movabsq	$4294967297, %rax
	movl	%r12d, -92(%rbp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%rax, -88(%rbp)
	movl	-84(%rbp), %ecx
	movq	%rax, -100(%rbp)
	movq	-92(%rbp), %rdx
	movl	%r14d, -104(%rbp)
	movl	-96(%rbp), %esi
	movq	-104(%rbp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L45
	movq	-128(%rbp), %rdx
	movq	-144(%rbp), %rsi
	movl	%r12d, %ecx
	movq	-152(%rbp), %rdi
	call	_Z32__device_stub__Z8subtractPiS_S_iPiS_S_i
.L45:
	movabsq	$4294967297, %rax
	movl	%r12d, -92(%rbp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%rax, -88(%rbp)
	movl	-84(%rbp), %ecx
	movq	%rax, -100(%rbp)
	movq	-92(%rbp), %rdx
	movl	%r14d, -104(%rbp)
	movl	-96(%rbp), %esi
	movq	-104(%rbp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L46
	movq	-120(%rbp), %rdx
	movq	-144(%rbp), %rsi
	movl	%r12d, %ecx
	movq	-152(%rbp), %rdi
	call	_Z28__device_stub__Z4multPiS_S_iPiS_S_i
.L46:
	movabsq	$4294967297, %rax
	movl	%r12d, -92(%rbp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%rax, -88(%rbp)
	movl	-84(%rbp), %ecx
	movq	%rax, -100(%rbp)
	movq	-92(%rbp), %rdx
	movl	%r14d, -104(%rbp)
	movl	-96(%rbp), %esi
	movq	-104(%rbp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L47
	movq	-112(%rbp), %rdx
	movq	-144(%rbp), %rsi
	movl	%r12d, %ecx
	movq	-152(%rbp), %rdi
	call	_Z27__device_stub__Z3modPiS_S_iPiS_S_i
.L47:
	movq	-216(%rbp), %rdx
	movq	-136(%rbp), %rsi
	movl	$2, %ecx
	movq	-184(%rbp), %rdi
	call	cudaMemcpy@PLT
	movq	-216(%rbp), %rdx
	movq	-128(%rbp), %rsi
	movl	$2, %ecx
	movq	-176(%rbp), %rdi
	call	cudaMemcpy@PLT
	movq	-216(%rbp), %rdx
	movq	-120(%rbp), %rsi
	movl	$2, %ecx
	movq	-168(%rbp), %rdi
	call	cudaMemcpy@PLT
	movq	-216(%rbp), %rdx
	movq	-112(%rbp), %rsi
	movl	$2, %ecx
	movq	-160(%rbp), %rdi
	call	cudaMemcpy@PLT
	movq	%r13, %rdi
	call	_Z14stopEventTimerP5timer
	leaq	.LC7(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	cvtss2sd	-64(%rbp), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC8(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	jmp	.L48
.L49:
	movq	-224(%rbp), %rax
	cmpq	%rax, %rsp
	je	.L50
	subq	$4096, %rsp
	orq	$0, 4088(%rsp)
	jmp	.L49
.L50:
	subq	$32, %rsp
	orq	$0, 24(%rsp)
	xorl	%ebx, %ebx
	leaq	7(%rsp), %r13
	movq	%r13, %r15
	andq	$-8, %r13
	movq	%r13, %rdi
	shrq	$3, %r15
	call	cudaStreamCreate@PLT
	leaq	8(%r13), %rdi
	call	cudaStreamCreate@PLT
	leaq	16(%r13), %rdi
	call	cudaStreamCreate@PLT
	leaq	24(%r13), %rdi
	call	cudaStreamCreate@PLT
	leaq	-80(%rbp), %rax
	movq	%rax, %rdi
	movq	%rax, -232(%rbp)
	call	_Z15startEventTimerP5timer
.L52:
	movq	0(%r13,%rbx,8), %r8
	movq	-216(%rbp), %rdx
	movl	$1, %ecx
	movq	-200(%rbp), %rsi
	movq	-152(%rbp), %rdi
	call	cudaMemcpyAsync@PLT
	movq	0(%r13,%rbx,8), %r8
	incq	%rbx
	movq	-216(%rbp), %rdx
	movq	-192(%rbp), %rsi
	movq	-144(%rbp), %rdi
	movl	$1, %ecx
	call	cudaMemcpyAsync@PLT
	cmpq	$4, %rbx
	jne	.L52
	movl	%r12d, -92(%rbp)
	movq	0(,%r15,8), %r9
	xorl	%r8d, %r8d
	movabsq	$4294967297, %rax
	movq	%rax, -88(%rbp)
	movl	-84(%rbp), %ecx
	movq	%rax, -100(%rbp)
	movq	-92(%rbp), %rdx
	movl	%r14d, -104(%rbp)
	movl	-96(%rbp), %esi
	movq	-104(%rbp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L53
	movq	-136(%rbp), %rdx
	movq	-144(%rbp), %rsi
	movl	%r12d, %ecx
	movq	-152(%rbp), %rdi
	call	_Z27__device_stub__Z3addPiS_S_iPiS_S_i
.L53:
	movq	0(,%r15,8), %r8
	movq	-216(%rbp), %rdx
	movl	$2, %ecx
	movq	-136(%rbp), %rsi
	movq	-184(%rbp), %rdi
	call	cudaMemcpyAsync@PLT
	movl	%r12d, -92(%rbp)
	movq	8(,%r15,8), %r9
	xorl	%r8d, %r8d
	movabsq	$4294967297, %rax
	movl	%r14d, -104(%rbp)
	movq	%rax, -88(%rbp)
	movl	-84(%rbp), %ecx
	movq	%rax, -100(%rbp)
	movq	-92(%rbp), %rdx
	movq	-104(%rbp), %rdi
	movl	-96(%rbp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L54
	movq	-128(%rbp), %rdx
	movq	-144(%rbp), %rsi
	movl	%r12d, %ecx
	movq	-152(%rbp), %rdi
	call	_Z32__device_stub__Z8subtractPiS_S_iPiS_S_i
.L54:
	movq	-216(%rbp), %rdx
	movq	-128(%rbp), %rsi
	movl	$2, %ecx
	movq	8(,%r15,8), %r8
	movq	-176(%rbp), %rdi
	call	cudaMemcpyAsync@PLT
	movl	%r12d, -92(%rbp)
	movq	16(,%r15,8), %r9
	xorl	%r8d, %r8d
	movabsq	$4294967297, %rax
	movl	%r14d, -104(%rbp)
	movq	%rax, -88(%rbp)
	movl	-84(%rbp), %ecx
	movq	%rax, -100(%rbp)
	movq	-92(%rbp), %rdx
	movq	-104(%rbp), %rdi
	movl	-96(%rbp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L55
	movq	-120(%rbp), %rdx
	movq	-144(%rbp), %rsi
	movl	%r12d, %ecx
	movq	-152(%rbp), %rdi
	call	_Z28__device_stub__Z4multPiS_S_iPiS_S_i
.L55:
	movq	-216(%rbp), %rdx
	movq	-120(%rbp), %rsi
	movl	$2, %ecx
	movq	16(,%r15,8), %r8
	movq	-168(%rbp), %rdi
	call	cudaMemcpyAsync@PLT
	movl	%r12d, -92(%rbp)
	movq	24(,%r15,8), %r9
	xorl	%r8d, %r8d
	movabsq	$4294967297, %rax
	movl	%r14d, -104(%rbp)
	movq	%rax, -88(%rbp)
	movl	-84(%rbp), %ecx
	movq	%rax, -100(%rbp)
	movq	-92(%rbp), %rdx
	movq	-104(%rbp), %rdi
	movl	-96(%rbp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L56
	movq	-112(%rbp), %rdx
	movq	-144(%rbp), %rsi
	movl	%r12d, %ecx
	movq	-152(%rbp), %rdi
	call	_Z27__device_stub__Z3modPiS_S_iPiS_S_i
.L56:
	movq	16(,%r15,8), %r8
	movq	-216(%rbp), %rdx
	xorl	%ebx, %ebx
	movl	$2, %ecx
	movq	-112(%rbp), %rsi
	movq	-160(%rbp), %rdi
	call	cudaMemcpyAsync@PLT
.L57:
	movq	0(%r13,%rbx,8), %rdi
	incq	%rbx
	call	cudaStreamSynchronize@PLT
	cmpq	$4, %rbx
	jne	.L57
	movq	-232(%rbp), %rdi
	call	_Z14stopEventTimerP5timer
	leaq	.LC10(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	cvtss2sd	-64(%rbp), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC8(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movq	-224(%rbp), %rsp
	jmp	.L48
.L64:
	leaq	.LC11(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
.L48:
	leaq	-80(%rbp), %rdi
	call	_Z14freeEventTimerP5timer
	movq	-152(%rbp), %rdi
	call	cudaFree@PLT
	movq	-144(%rbp), %rdi
	call	cudaFree@PLT
	movq	-136(%rbp), %rdi
	call	cudaFree@PLT
	movq	-128(%rbp), %rdi
	call	cudaFree@PLT
	movq	-120(%rbp), %rdi
	call	cudaFree@PLT
	movq	-136(%rbp), %rdi
	call	cudaFree@PLT
	movq	-200(%rbp), %rdi
	call	cudaFreeHost@PLT
	movq	-192(%rbp), %rdi
	call	cudaFreeHost@PLT
	movq	-184(%rbp), %rdi
	call	cudaFreeHost@PLT
	movq	-176(%rbp), %rdi
	call	cudaFreeHost@PLT
	movq	-168(%rbp), %rdi
	call	cudaFreeHost@PLT
	movq	-160(%rbp), %rdi
	call	cudaFreeHost@PLT
	movq	-56(%rbp), %rax
	subq	%fs:40, %rax
	je	.L58
	call	__stack_chk_fail@PLT
.L58:
	leaq	-40(%rbp), %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE3639:
	.size	_Z7gpuTestiii, .-_Z7gpuTestiii
	.section	.rodata.str1.1
.LC12:
	.string	"\nUsing "
.LC13:
	.string	" Threads and "
.LC14:
	.string	" BlockSize\n"
.LC15:
	.string	"Warning: Total thread count is not evenly divisible by the block size\n"
.LC16:
	.string	"The total number of threads will be rounded up to %d\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3640:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	cmpl	$3, %edi
	jne	.L68
	movq	8(%rsi), %rdi
	movq	%rsi, %rbp
	call	atoi@PLT
	movq	16(%rbp), %rdi
	movl	%eax, %ebx
	call	atoi@PLT
	movl	%eax, %ebp
	jmp	.L66
.L68:
	movl	$256, %ebp
	movl	$1024, %ebx
.L66:
	movl	%ebx, %eax
	leaq	_ZSt4cout(%rip), %r13
	leaq	.LC12(%rip), %rsi
	cltd
	movq	%r13, %rdi
	idivl	%ebp
	movl	%edx, %r14d
	movl	%eax, %r12d
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%ebx, %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	leaq	.LC13(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%ebp, %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	leaq	.LC14(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	testl	%r14d, %r14d
	je	.L67
	leaq	.LC15(%rip), %rsi
	movq	%r13, %rdi
	incl	%r12d
	movl	%ebp, %ebx
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC16(%rip), %rsi
	movq	%r13, %rdi
	imull	%r12d, %ebx
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
.L67:
	call	_Z12checkDevicesv
	movl	%r12d, %esi
	movl	%ebx, %edi
	movl	$1, %edx
	call	_Z7gpuTestiii
	movl	%r12d, %esi
	movl	%ebx, %edi
	movl	$2, %edx
	call	_Z7gpuTestiii
	popq	%rbx
	.cfi_def_cfa_offset 40
	xorl	%eax, %eax
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3640:
	.size	main, .-main
	.section	.rodata.str1.1
.LC17:
	.string	"_Z3modPiS_S_i"
.LC18:
	.string	"_Z4multPiS_S_i"
.LC19:
	.string	"_Z8subtractPiS_S_i"
.LC20:
	.string	"_Z3addPiS_S_i"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3674:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC17(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z3modPiS_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC18(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z4multPiS_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC19(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z8subtractPiS_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC20(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z3addPiS_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3674:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

/*******************************************************************************

This program uses streams and events to asynchronously perform arithmetic
functions on the GPU. Comparison of timing is shown as output.

Author: Said Darham
*******************************************************************************/


#include <hip/hip_runtime.h>
#include <iostream>
#include <stdlib.h> //srand and rand
#include <math.h>

// Test types
#define THREAD 1
#define STREAM 2

//Timer struct declaration. Using CUDA EVENTS
typedef struct timer{
  hipEvent_t startEvent;
  hipEvent_t stopEvent;
  float time_ms;
} timerEvent;

/*******************************************************************************

                        PROFILER FUNCTIONS USING EVENTS

*******************************************************************************/
void startEventTimer(timerEvent *timer){
  /* startEventTimer()
     Creates and starts recording an event
  */
  hipEventCreate(&timer->startEvent);
  hipEventCreate(&timer->stopEvent);
  hipEventRecord(timer->startEvent);
}

void stopEventTimer(timerEvent *timer){
  /* stopEventTimer()
     Stops an event and calculates the elapsed time between start and stop event
  */
  hipEventRecord(timer->stopEvent);
  hipEventSynchronize(timer->stopEvent);
  hipEventElapsedTime(&timer->time_ms, timer->startEvent, timer->stopEvent);

}
void freeEventTimer(timerEvent *timer){
  /*  freeEventTimer()
      cleans up the events
  */
  hipEventDestroy(timer->startEvent);
  hipEventDestroy(timer->stopEvent);
}

void checkDevices(void){
  //Check and print devices name
  hipDeviceProp_t prop;
  int deviceCount; //number of devices found
  int devId = 0; // default device Id

  hipGetDeviceCount(&deviceCount);

  if(deviceCount == 0){
    std::cout << "No GPU Device Found\n";
    exit(0);
  }else if(deviceCount == 1){
    hipSetDevice(devId); //set the device 0 as default
  }

  std::cout << "Number Of Devices Found: " << deviceCount << std::endl;
  //Print device names and some basic associated properties
  for (int i = 0; i<deviceCount; i++){
    hipGetDeviceProperties(&prop,i);
    std::cout << "Device " << i << " Name: " << prop.name << std::endl;
    std::cout << "Compute Capability: " << prop.major << "." << prop.minor << std::endl;
  }
}


/*******************************************************************************

ARITHMETIC KERNEL FUNCTIONS

*******************************************************************************/
// Add Function
__global__ void add(int *a, int *b, int *c, int n){
  // Get our global thread ID
  int id = blockIdx.x*blockDim.x+threadIdx.x;

  // Make sure we do not go out of bounds
  if (id < n)
  c[id] = a[id] + b[id];
}
// subtract function
__global__ void subtract(int *a, int *b, int *c, int n){
  // Get our global thread ID
  int id = blockIdx.x*blockDim.x+threadIdx.x;

  // Make sure we do not go out of bounds
  if (id < n)
  c[id] = a[id] - b[id];
}
// multiply function
__global__ void mult(int *a, int *b, int *c, int n){
  // Get our global thread ID
  int id = blockIdx.x*blockDim.x+threadIdx.x;

  // Make sure we do not go out of bounds
  if (id < n)
  c[id] = a[id] * b[id];
}
// Moudulu function
__global__ void mod(int *a, int *b, int *c, int n){
  // Get our global thread ID
  int id = blockIdx.x*blockDim.x+threadIdx.x;

  // Make sure we do not go out of bounds
  if (id < n)
  c[id] = a[id] % b[id];
}



/*******************************************************************************

                                  GPU Test
                        ( Sequential Threads & STREAMS)

*******************************************************************************/
void gpuTest(int numBlocks, int totalThreads, const int testType){
  /*  gpuTest()
      runs either sequential transfer and execute or asynchronous streams
      testType is either THREAD or STREAM
  */

  //Since both transfer and execute routines will use pinned memory, allocating
  //and initializing data is the same for both

  // Host input/output vectors
  int *h_a, *h_b, *h_c_add,*h_c_sub,*h_c_mult,*h_c_mod;

  // Device input/output vectors
  int *d_a, *d_b, *d_c_add,*d_c_sub,*d_c_mult,*d_c_mod;

  // Size, in bytes, of each vector
  const unsigned int bytes = totalThreads*sizeof(int);

  // Allocate memory for each vector on host Pinned
  hipHostMalloc((void**)&h_a, bytes, hipHostMallocDefault);
  hipHostMalloc((void**)&h_b, bytes, hipHostMallocDefault);
  hipHostMalloc((void**)&h_c_add, bytes, hipHostMallocDefault);
  hipHostMalloc((void**)&h_c_sub, bytes, hipHostMallocDefault);
  hipHostMalloc((void**)&h_c_mult, bytes, hipHostMallocDefault);
  hipHostMalloc((void**)&h_c_mod, bytes, hipHostMallocDefault);

  // Allocate memory for each vector on GPU
  hipMalloc(&d_a, bytes);
  hipMalloc(&d_b, bytes);
  hipMalloc(&d_c_add, bytes);
  hipMalloc(&d_c_sub, bytes);
  hipMalloc(&d_c_mult, bytes);
  hipMalloc(&d_c_mod, bytes);

  //initialize the input vectors
	for(int i = 0;i<totalThreads;i++){
		//first array is 0 through number of threads
		h_a[i] = i;
		// second array is a random number between 0 and 3
		h_b[i] = rand() % 4;
	}

  // create a struct which will contain info for timing using events
  timerEvent timer;

  switch(testType){
    case THREAD:
      std::cout << "\n\t\t*****Executing Arithmetic Functions Using Sequential*****" << std::endl;

      //Transfer and Profile data from host to device and profile using EVENTS
      startEventTimer(&timer);
      hipMemcpy( d_a, h_a, bytes, hipMemcpyHostToDevice);
      hipMemcpy( d_b, h_b, bytes, hipMemcpyHostToDevice);

      //Execute  the kernel arithmetic functions
    	add<<<numBlocks, totalThreads>>>(d_a, d_b, d_c_add, totalThreads);
    	subtract<<<numBlocks, totalThreads>>>(d_a, d_b, d_c_sub, totalThreads);
    	mult<<<numBlocks, totalThreads>>>(d_a, d_b, d_c_mult, totalThreads);
    	mod<<<numBlocks, totalThreads>>>(d_a, d_b, d_c_mod, totalThreads);

      //Transfer data from device to host
      hipMemcpy(h_c_add, d_c_add, bytes, hipMemcpyDeviceToHost);
      hipMemcpy(h_c_sub, d_c_sub, bytes, hipMemcpyDeviceToHost);
      hipMemcpy(h_c_mult, d_c_mult, bytes, hipMemcpyDeviceToHost);
      hipMemcpy(h_c_mod, d_c_mod, bytes, hipMemcpyDeviceToHost);
      stopEventTimer(&timer);

      std::cout << "Time Elaplsed For Sequential Transfer and Execute: " << timer.time_ms << " ms" << std::endl;
      break;
    case STREAM:
    {
      std::cout << "\n\t\t*****Executing Arithmetic Functions Using Streams*****\n";

      //choose 4 streams for four kernels
      int nStreams = 4;
      int iStream; //

      //create four asynchronous streams
      hipStream_t stream[nStreams];
      for(iStream = 0; iStream < nStreams; iStream++)
        hipStreamCreate(&stream[iStream]);

      //Copy data from host to device and profile using EVENTS
      startEventTimer(&timer);

      for(iStream = 0; iStream < nStreams; iStream++ ){
        hipMemcpyAsync(d_a, h_a, bytes, hipMemcpyHostToDevice, stream[iStream]);
        hipMemcpyAsync(d_b, h_b, bytes, hipMemcpyHostToDevice, stream[iStream]);
      }

    	add<<<numBlocks, totalThreads, 0, stream[0]>>>(d_a, d_b, d_c_add, totalThreads);
      hipMemcpyAsync(h_c_add, d_c_add, bytes, hipMemcpyDeviceToHost, stream[0]);
      //performing subtract function
    	subtract<<<numBlocks, totalThreads, 0, stream[1]>>>(d_a, d_b, d_c_sub, totalThreads);
      hipMemcpyAsync(h_c_sub, d_c_sub, bytes, hipMemcpyDeviceToHost, stream[1]);
    	//performing mult function
    	mult<<<numBlocks, totalThreads, 0, stream[2]>>>(d_a, d_b, d_c_mult, totalThreads);
      hipMemcpyAsync(h_c_mult, d_c_mult, bytes, hipMemcpyDeviceToHost, stream[2]);
    	//performing mod fuction
    	mod<<<numBlocks, totalThreads, 0, stream[3]>>>(d_a, d_b, d_c_mod, totalThreads);
      hipMemcpyAsync(h_c_mod, d_c_mod, bytes, hipMemcpyDeviceToHost, stream[2]);

      //Wait till all tasks referenced to streams are finished
      for(iStream = 0; iStream < nStreams; iStream++)
        hipStreamSynchronize(stream[iStream]);

      stopEventTimer(&timer);
      std::cout << "TIME ELAPSED For Asynchronous Transfer and Execute: " << timer.time_ms << " ms" << std::endl;
      break;
    }
    default:
      std::cout << "Unknown Test Type!\n";
      break;
  }

  //destroy Event timer
  freeEventTimer(&timer);

  //free up space on our GPU
	hipFree(d_a);
	hipFree(d_b);
	hipFree(d_c_add);
	hipFree(d_c_sub);
	hipFree(d_c_mult);
	hipFree(d_c_add);

	//free up space on our CPU use cudaFreeHost since pinnned
	hipHostFree(h_a);
	hipHostFree(h_b);
	hipHostFree(h_c_add);
	hipHostFree(h_c_sub);
	hipHostFree(h_c_mult);
	hipHostFree(h_c_mod);
}


/*******************************************************************************

MAIN

*******************************************************************************/
int main(int argc, char** argv)
{

  int totalThreads = (1 << 10);
  int blockSize = 256;

  //User wants to run the Global vs Pinned Examples
  if( argc > 2 && argc < 4){
    // Ensure the user supplies both number of threads and block size
    // otherwise use default values
    totalThreads = atoi(argv[1]);
    blockSize = atoi(argv[2]);
  }

  int numBlocks = totalThreads/blockSize;
  std::cout << "\nUsing " << totalThreads << " Threads and " << blockSize << " BlockSize\n" ;

  // validate command line arguments
  if (totalThreads % blockSize != 0) {
    ++numBlocks;
    totalThreads = numBlocks*blockSize;
    std::cout << "Warning: Total thread count is not evenly divisible by the block size\n";
    std::cout << "The total number of threads will be rounded up to %d\n";
  }

  // get number of devices and print some basic properties
  checkDevices();

  //perform Sequential transfer and execute Test
  gpuTest( totalThreads, numBlocks, THREAD);

  //perform asynchronous transfer and execute using streams
  gpuTest( totalThreads, numBlocks, STREAM);
  return 0;
}

	.text
	.file	"assignment7.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z15startEventTimerP5timer      # -- Begin function _Z15startEventTimerP5timer
	.type	_Z15startEventTimerP5timer,@function
_Z15startEventTimerP5timer:             # @_Z15startEventTimerP5timer
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movq	%rdi, %rbx
	callq	hipEventCreate
	leaq	8(%rbx), %rdi
	callq	hipEventCreate
	movq	(%rbx), %rdi
	xorl	%esi, %esi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	hipEventRecord                  # TAILCALL
.Lfunc_end0:
	.size	_Z15startEventTimerP5timer, .Lfunc_end0-_Z15startEventTimerP5timer
	.cfi_endproc
                                        # -- End function
	.globl	_Z14stopEventTimerP5timer       # -- Begin function _Z14stopEventTimerP5timer
	.type	_Z14stopEventTimerP5timer,@function
_Z14stopEventTimerP5timer:              # @_Z14stopEventTimerP5timer
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movq	%rdi, %rbx
	movq	8(%rdi), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	8(%rbx), %rdi
	callq	hipEventSynchronize
	leaq	16(%rbx), %rdi
	movq	(%rbx), %rsi
	movq	8(%rbx), %rdx
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	hipEventElapsedTime             # TAILCALL
.Lfunc_end1:
	.size	_Z14stopEventTimerP5timer, .Lfunc_end1-_Z14stopEventTimerP5timer
	.cfi_endproc
                                        # -- End function
	.globl	_Z14freeEventTimerP5timer       # -- Begin function _Z14freeEventTimerP5timer
	.type	_Z14freeEventTimerP5timer,@function
_Z14freeEventTimerP5timer:              # @_Z14freeEventTimerP5timer
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movq	%rdi, %rbx
	movq	(%rdi), %rdi
	callq	hipEventDestroy
	movq	8(%rbx), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	hipEventDestroy                 # TAILCALL
.Lfunc_end2:
	.size	_Z14freeEventTimerP5timer, .Lfunc_end2-_Z14freeEventTimerP5timer
	.cfi_endproc
                                        # -- End function
	.globl	_Z12checkDevicesv               # -- Begin function _Z12checkDevicesv
	.type	_Z12checkDevicesv,@function
_Z12checkDevicesv:                      # @_Z12checkDevicesv
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$1488, %rsp                     # imm = 0x5D0
	.cfi_def_cfa_offset 1520
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipGetDeviceCount
	movl	(%rbx), %eax
	cmpl	$1, %eax
	je	.LBB3_3
# %bb.1:
	testl	%eax, %eax
	jne	.LBB3_4
# %bb.2:
	movl	$_ZSt4cout, %edi
	movl	$.L.str, %esi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	xorl	%edi, %edi
	callq	exit
.LBB3_3:
	xorl	%edi, %edi
	callq	hipSetDevice
.LBB3_4:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.1, %esi
	movl	$25, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	12(%rsp), %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSolsEi
	movq	%rax, %rbx
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	cmpl	$0, 12(%rsp)
	jle	.LBB3_7
# %bb.5:                                # %.lr.ph
	xorl	%ebx, %ebx
	leaq	16(%rsp), %r14
.LBB3_6:                                # =>This Inner Loop Header: Depth=1
	movq	%r14, %rdi
	movl	%ebx, %esi
	callq	hipGetDevicePropertiesR0600
	movl	$_ZSt4cout, %edi
	movl	$.L.str.2, %esi
	movl	$7, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	%ebx, %esi
	callq	_ZNSolsEi
	movq	%rax, %r15
	movl	$.L.str.3, %esi
	movl	$7, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%r14, %rdi
	callq	strlen
	movq	%r15, %rdi
	movq	%r14, %rsi
	movq	%rax, %rdx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%r15), %rax
	movq	-24(%rax), %rdi
	addq	%r15, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r15, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	$_ZSt4cout, %edi
	movl	$.L.str.4, %esi
	movl	$20, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	376(%rsp), %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSolsEi
	movq	%rax, %r15
	movl	$.L.str.5, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	380(%rsp), %esi
	movq	%r15, %rdi
	callq	_ZNSolsEi
	movq	%rax, %r15
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%r15, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r15, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	incl	%ebx
	cmpl	12(%rsp), %ebx
	jl	.LBB3_6
.LBB3_7:                                # %._crit_edge
	addq	$1488, %rsp                     # imm = 0x5D0
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z12checkDevicesv, .Lfunc_end3-_Z12checkDevicesv
	.cfi_endproc
                                        # -- End function
	.globl	_Z18__device_stub__addPiS_S_i   # -- Begin function _Z18__device_stub__addPiS_S_i
	.type	_Z18__device_stub__addPiS_S_i,@function
_Z18__device_stub__addPiS_S_i:          # @_Z18__device_stub__addPiS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z3addPiS_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z18__device_stub__addPiS_S_i, .Lfunc_end4-_Z18__device_stub__addPiS_S_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z23__device_stub__subtractPiS_S_i # -- Begin function _Z23__device_stub__subtractPiS_S_i
	.type	_Z23__device_stub__subtractPiS_S_i,@function
_Z23__device_stub__subtractPiS_S_i:     # @_Z23__device_stub__subtractPiS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z8subtractPiS_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	_Z23__device_stub__subtractPiS_S_i, .Lfunc_end5-_Z23__device_stub__subtractPiS_S_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z19__device_stub__multPiS_S_i  # -- Begin function _Z19__device_stub__multPiS_S_i
	.type	_Z19__device_stub__multPiS_S_i,@function
_Z19__device_stub__multPiS_S_i:         # @_Z19__device_stub__multPiS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z4multPiS_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	_Z19__device_stub__multPiS_S_i, .Lfunc_end6-_Z19__device_stub__multPiS_S_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z18__device_stub__modPiS_S_i   # -- Begin function _Z18__device_stub__modPiS_S_i
	.type	_Z18__device_stub__modPiS_S_i,@function
_Z18__device_stub__modPiS_S_i:          # @_Z18__device_stub__modPiS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z3modPiS_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end7:
	.size	_Z18__device_stub__modPiS_S_i, .Lfunc_end7-_Z18__device_stub__modPiS_S_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z7gpuTestiii                   # -- Begin function _Z7gpuTestiii
	.type	_Z7gpuTestiii,@function
_Z7gpuTestiii:                          # @_Z7gpuTestiii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$136, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%edx, %r12d
	movl	%esi, %r14d
	movl	%edi, -84(%rbp)                 # 4-byte Spill
	leal	(,%r14,4), %ebx
	leaq	-112(%rbp), %rdi
	movq	%rbx, %rsi
	xorl	%edx, %edx
	callq	hipHostMalloc
	leaq	-104(%rbp), %rdi
	movq	%rbx, %rsi
	xorl	%edx, %edx
	callq	hipHostMalloc
	leaq	-144(%rbp), %rdi
	movq	%rbx, %rsi
	xorl	%edx, %edx
	callq	hipHostMalloc
	leaq	-136(%rbp), %rdi
	movq	%rbx, %rsi
	xorl	%edx, %edx
	callq	hipHostMalloc
	leaq	-128(%rbp), %rdi
	movq	%rbx, %rsi
	xorl	%edx, %edx
	callq	hipHostMalloc
	leaq	-120(%rbp), %rdi
	movq	%rbx, %rsi
	xorl	%edx, %edx
	callq	hipHostMalloc
	leaq	-56(%rbp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	leaq	-48(%rbp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	leaq	-64(%rbp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	leaq	-80(%rbp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	leaq	-72(%rbp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	leaq	-96(%rbp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	testl	%r14d, %r14d
	jle	.LBB8_3
# %bb.1:                                # %.lr.ph.preheader
	movl	%r14d, %r13d
	xorl	%r15d, %r15d
.LBB8_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movq	-112(%rbp), %rax
	movl	%r15d, (%rax,%r15,4)
	callq	rand
                                        # kill: def $eax killed $eax def $rax
	leal	3(%rax), %ecx
	testl	%eax, %eax
	cmovnsl	%eax, %ecx
	andl	$-4, %ecx
	subl	%ecx, %eax
	movq	-104(%rbp), %rcx
	movl	%eax, (%rcx,%r15,4)
	incq	%r15
	cmpq	%r15, %r13
	jne	.LBB8_2
.LBB8_3:                                # %._crit_edge
	cmpl	$1, %r12d
	je	.LBB8_20
# %bb.4:                                # %._crit_edge
	movl	$_ZSt4cout, %edi
	cmpl	$2, %r12d
	jne	.LBB8_29
# %bb.5:
	movl	$.L.str.9, %esi
	movl	$58, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%rsp, -152(%rbp)                # 8-byte Spill
	movq	%rsp, %r13
	addq	$-32, %r13
	movq	%r13, %rsp
	xorl	%r15d, %r15d
.LBB8_6:                                # =>This Inner Loop Header: Depth=1
	leaq	(%r15,%r13), %rdi
	callq	hipStreamCreate
	addq	$8, %r15
	cmpq	$32, %r15
	jne	.LBB8_6
# %bb.7:
	leaq	-176(%rbp), %rdi
	callq	_Z15startEventTimerP5timer
	xorl	%r12d, %r12d
.LBB8_8:                                # =>This Inner Loop Header: Depth=1
	movq	-56(%rbp), %rdi
	movq	-112(%rbp), %rsi
	movq	(%r13,%r12,8), %r8
	movq	%rbx, %rdx
	movl	$1, %ecx
	callq	hipMemcpyAsync
	movq	-48(%rbp), %rdi
	movq	-104(%rbp), %rsi
	movq	(%r13,%r12,8), %r8
	movq	%rbx, %rdx
	movl	$1, %ecx
	callq	hipMemcpyAsync
	incq	%r12
	cmpq	$4, %r12
	jne	.LBB8_8
# %bb.9:
	movq	(%r13), %r9
	movl	-84(%rbp), %r15d                # 4-byte Reload
	btsq	$32, %r15
	movl	%r14d, %r12d
	btsq	$32, %r12
	movq	%r15, %rdi
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB8_11
# %bb.10:
	movq	-56(%rbp), %rdi
	movq	-48(%rbp), %rsi
	movq	-64(%rbp), %rdx
	movl	%r14d, %ecx
	callq	_Z18__device_stub__addPiS_S_i
.LBB8_11:
	movq	-144(%rbp), %rdi
	movq	-64(%rbp), %rsi
	movq	(%r13), %r8
	movq	%rbx, %rdx
	movl	$2, %ecx
	callq	hipMemcpyAsync
	movq	8(%r13), %r9
	movq	%r15, %rdi
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB8_13
# %bb.12:
	movq	-56(%rbp), %rdi
	movq	-48(%rbp), %rsi
	movq	-80(%rbp), %rdx
	movl	%r14d, %ecx
	callq	_Z23__device_stub__subtractPiS_S_i
.LBB8_13:
	movq	-136(%rbp), %rdi
	movq	-80(%rbp), %rsi
	movq	8(%r13), %r8
	movq	%rbx, %rdx
	movl	$2, %ecx
	callq	hipMemcpyAsync
	movq	16(%r13), %r9
	movq	%r15, %rdi
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB8_15
# %bb.14:
	movq	-56(%rbp), %rdi
	movq	-48(%rbp), %rsi
	movq	-72(%rbp), %rdx
	movl	%r14d, %ecx
	callq	_Z19__device_stub__multPiS_S_i
.LBB8_15:
	movq	-128(%rbp), %rdi
	movq	-72(%rbp), %rsi
	movq	16(%r13), %r8
	movq	%rbx, %rdx
	movl	$2, %ecx
	callq	hipMemcpyAsync
	movq	24(%r13), %r9
	movq	%r15, %rdi
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB8_17
# %bb.16:
	movq	-56(%rbp), %rdi
	movq	-48(%rbp), %rsi
	movq	-96(%rbp), %rdx
	movl	%r14d, %ecx
	callq	_Z18__device_stub__modPiS_S_i
.LBB8_17:
	movq	-120(%rbp), %rdi
	movq	-96(%rbp), %rsi
	movq	16(%r13), %r8
	movq	%rbx, %rdx
	movl	$2, %ecx
	callq	hipMemcpyAsync
	xorl	%ebx, %ebx
.LBB8_18:                               # =>This Inner Loop Header: Depth=1
	movq	(%r13,%rbx,8), %rdi
	callq	hipStreamSynchronize
	incq	%rbx
	cmpq	$4, %rbx
	jne	.LBB8_18
# %bb.19:
	leaq	-176(%rbp), %rbx
	movq	%rbx, %rdi
	callq	_Z14stopEventTimerP5timer
	movl	$_ZSt4cout, %edi
	movl	$.L.str.10, %esi
	movl	$52, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	cvtss2sd	16(%rbx), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbx
	movl	$.L.str.8, %esi
	movl	$3, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%rbx), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	-152(%rbp), %rsp                # 8-byte Reload
	jmp	.LBB8_30
.LBB8_20:
	movl	$_ZSt4cout, %r15d
	movl	$_ZSt4cout, %edi
	movl	$.L.str.6, %esi
	movl	$60, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%r15, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	leaq	-176(%rbp), %rdi
	callq	_Z15startEventTimerP5timer
	movq	-56(%rbp), %rdi
	movq	-112(%rbp), %rsi
	movq	%rbx, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	-48(%rbp), %rdi
	movq	-104(%rbp), %rsi
	movq	%rbx, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movl	-84(%rbp), %r15d                # 4-byte Reload
	btsq	$32, %r15
	movl	%r14d, %r12d
	btsq	$32, %r12
	movq	%r15, %rdi
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB8_22
# %bb.21:
	movq	-56(%rbp), %rdi
	movq	-48(%rbp), %rsi
	movq	-64(%rbp), %rdx
	movl	%r14d, %ecx
	callq	_Z18__device_stub__addPiS_S_i
.LBB8_22:
	movq	%r15, %rdi
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB8_24
# %bb.23:
	movq	-56(%rbp), %rdi
	movq	-48(%rbp), %rsi
	movq	-80(%rbp), %rdx
	movl	%r14d, %ecx
	callq	_Z23__device_stub__subtractPiS_S_i
.LBB8_24:
	movq	%r15, %rdi
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB8_26
# %bb.25:
	movq	-56(%rbp), %rdi
	movq	-48(%rbp), %rsi
	movq	-72(%rbp), %rdx
	movl	%r14d, %ecx
	callq	_Z19__device_stub__multPiS_S_i
.LBB8_26:
	movq	%r15, %rdi
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB8_28
# %bb.27:
	movq	-56(%rbp), %rdi
	movq	-48(%rbp), %rsi
	movq	-96(%rbp), %rdx
	movl	%r14d, %ecx
	callq	_Z18__device_stub__modPiS_S_i
.LBB8_28:
	movq	-144(%rbp), %rdi
	movq	-64(%rbp), %rsi
	movq	%rbx, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	-136(%rbp), %rdi
	movq	-80(%rbp), %rsi
	movq	%rbx, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	-128(%rbp), %rdi
	movq	-72(%rbp), %rsi
	movq	%rbx, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	-120(%rbp), %rdi
	movq	-96(%rbp), %rsi
	movq	%rbx, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	leaq	-176(%rbp), %rbx
	movq	%rbx, %rdi
	callq	_Z14stopEventTimerP5timer
	movl	$_ZSt4cout, %edi
	movl	$.L.str.7, %esi
	movl	$51, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	cvtss2sd	16(%rbx), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbx
	movl	$.L.str.8, %esi
	movl	$3, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%rbx), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	jmp	.LBB8_30
.LBB8_29:
	movl	$.L.str.11, %esi
	movl	$19, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.LBB8_30:
	movq	-176(%rbp), %rdi
	callq	hipEventDestroy
	movq	-168(%rbp), %rdi
	callq	hipEventDestroy
	movq	-56(%rbp), %rdi
	callq	hipFree
	movq	-48(%rbp), %rdi
	callq	hipFree
	movq	-64(%rbp), %rdi
	callq	hipFree
	movq	-80(%rbp), %rdi
	callq	hipFree
	movq	-72(%rbp), %rdi
	callq	hipFree
	movq	-64(%rbp), %rdi
	callq	hipFree
	movq	-112(%rbp), %rdi
	callq	hipHostFree
	movq	-104(%rbp), %rdi
	callq	hipHostFree
	movq	-144(%rbp), %rdi
	callq	hipHostFree
	movq	-136(%rbp), %rdi
	callq	hipHostFree
	movq	-128(%rbp), %rdi
	callq	hipHostFree
	movq	-120(%rbp), %rdi
	callq	hipHostFree
	leaq	-40(%rbp), %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	.cfi_def_cfa %rsp, 8
	retq
.Lfunc_end8:
	.size	_Z7gpuTestiii, .Lfunc_end8-_Z7gpuTestiii
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	cmpl	$3, %edi
	jne	.LBB9_1
# %bb.2:
	movq	%rsi, %r14
	movq	8(%rsi), %rdi
	callq	atoi
	movl	%eax, %ebx
	movq	16(%r14), %rdi
	callq	atoi
	movl	%eax, %r14d
	jmp	.LBB9_3
.LBB9_1:
	movl	$256, %r14d                     # imm = 0x100
	movl	$1024, %ebx                     # imm = 0x400
.LBB9_3:
	movl	%ebx, %eax
	cltd
	idivl	%r14d
	movl	%edx, %r15d
	movl	%eax, %ebp
	movl	$_ZSt4cout, %edi
	movl	$.L.str.12, %esi
	movl	$7, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	%ebx, %esi
	callq	_ZNSolsEi
	movq	%rax, %r12
	movl	$.L.str.13, %esi
	movl	$13, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%r12, %rdi
	movl	%r14d, %esi
	callq	_ZNSolsEi
	movl	$.L.str.14, %esi
	movl	$11, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	testl	%r15d, %r15d
	je	.LBB9_5
# %bb.4:
	incl	%ebp
	imull	%ebp, %r14d
	movl	$_ZSt4cout, %edi
	movl	$.L.str.15, %esi
	movl	$70, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.16, %esi
	movl	$53, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%r14d, %ebx
.LBB9_5:
	callq	_Z12checkDevicesv
	movl	%ebx, %edi
	movl	%ebp, %esi
	movl	$1, %edx
	callq	_Z7gpuTestiii
	movl	%ebx, %edi
	movl	%ebp, %esi
	movl	$2, %edx
	callq	_Z7gpuTestiii
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end9:
	.size	main, .Lfunc_end9-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB10_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB10_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z3addPiS_S_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z8subtractPiS_S_i, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z4multPiS_S_i, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z3modPiS_S_i, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end10:
	.size	__hip_module_ctor, .Lfunc_end10-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB11_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB11_2:
	retq
.Lfunc_end11:
	.size	__hip_module_dtor, .Lfunc_end11-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"No GPU Device Found\n"
	.size	.L.str, 21

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"Number Of Devices Found: "
	.size	.L.str.1, 26

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Device "
	.size	.L.str.2, 8

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	" Name: "
	.size	.L.str.3, 8

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"Compute Capability: "
	.size	.L.str.4, 21

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"."
	.size	.L.str.5, 2

	.type	_Z3addPiS_S_i,@object           # @_Z3addPiS_S_i
	.section	.rodata,"a",@progbits
	.globl	_Z3addPiS_S_i
	.p2align	3, 0x0
_Z3addPiS_S_i:
	.quad	_Z18__device_stub__addPiS_S_i
	.size	_Z3addPiS_S_i, 8

	.type	_Z8subtractPiS_S_i,@object      # @_Z8subtractPiS_S_i
	.globl	_Z8subtractPiS_S_i
	.p2align	3, 0x0
_Z8subtractPiS_S_i:
	.quad	_Z23__device_stub__subtractPiS_S_i
	.size	_Z8subtractPiS_S_i, 8

	.type	_Z4multPiS_S_i,@object          # @_Z4multPiS_S_i
	.globl	_Z4multPiS_S_i
	.p2align	3, 0x0
_Z4multPiS_S_i:
	.quad	_Z19__device_stub__multPiS_S_i
	.size	_Z4multPiS_S_i, 8

	.type	_Z3modPiS_S_i,@object           # @_Z3modPiS_S_i
	.globl	_Z3modPiS_S_i
	.p2align	3, 0x0
_Z3modPiS_S_i:
	.quad	_Z18__device_stub__modPiS_S_i
	.size	_Z3modPiS_S_i, 8

	.type	.L.str.6,@object                # @.str.6
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.6:
	.asciz	"\n\t\t*****Executing Arithmetic Functions Using Sequential*****"
	.size	.L.str.6, 61

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"Time Elaplsed For Sequential Transfer and Execute: "
	.size	.L.str.7, 52

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	" ms"
	.size	.L.str.8, 4

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"\n\t\t*****Executing Arithmetic Functions Using Streams*****\n"
	.size	.L.str.9, 59

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"TIME ELAPSED For Asynchronous Transfer and Execute: "
	.size	.L.str.10, 53

	.type	.L.str.11,@object               # @.str.11
.L.str.11:
	.asciz	"Unknown Test Type!\n"
	.size	.L.str.11, 20

	.type	.L.str.12,@object               # @.str.12
.L.str.12:
	.asciz	"\nUsing "
	.size	.L.str.12, 8

	.type	.L.str.13,@object               # @.str.13
.L.str.13:
	.asciz	" Threads and "
	.size	.L.str.13, 14

	.type	.L.str.14,@object               # @.str.14
.L.str.14:
	.asciz	" BlockSize\n"
	.size	.L.str.14, 12

	.type	.L.str.15,@object               # @.str.15
.L.str.15:
	.asciz	"Warning: Total thread count is not evenly divisible by the block size\n"
	.size	.L.str.15, 71

	.type	.L.str.16,@object               # @.str.16
.L.str.16:
	.asciz	"The total number of threads will be rounded up to %d\n"
	.size	.L.str.16, 54

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z3addPiS_S_i"
	.size	.L__unnamed_1, 14

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z8subtractPiS_S_i"
	.size	.L__unnamed_2, 19

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z4multPiS_S_i"
	.size	.L__unnamed_3, 15

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"_Z3modPiS_S_i"
	.size	.L__unnamed_4, 14

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z18__device_stub__addPiS_S_i
	.addrsig_sym _Z23__device_stub__subtractPiS_S_i
	.addrsig_sym _Z19__device_stub__multPiS_S_i
	.addrsig_sym _Z18__device_stub__modPiS_S_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _ZSt4cout
	.addrsig_sym _Z3addPiS_S_i
	.addrsig_sym _Z8subtractPiS_S_i
	.addrsig_sym _Z4multPiS_S_i
	.addrsig_sym _Z3modPiS_S_i
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z3addPiS_S_i           ; -- Begin function _Z3addPiS_S_i
	.globl	_Z3addPiS_S_i
	.p2align	8
	.type	_Z3addPiS_S_i,@function
_Z3addPiS_S_i:                          ; @_Z3addPiS_S_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB0_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b64 s[0:1], s[0:1], 0x10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	global_load_b32 v2, v[2:3], off
	global_load_b32 v3, v[4:5], off
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v2, v3, v2
	global_store_b32 v[0:1], v2, off
.LBB0_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z3addPiS_S_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z3addPiS_S_i, .Lfunc_end0-_Z3addPiS_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 180
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z8subtractPiS_S_i      ; -- Begin function _Z8subtractPiS_S_i
	.globl	_Z8subtractPiS_S_i
	.p2align	8
	.type	_Z8subtractPiS_S_i,@function
_Z8subtractPiS_S_i:                     ; @_Z8subtractPiS_S_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB1_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b64 s[0:1], s[0:1], 0x10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	global_load_b32 v2, v[2:3], off
	global_load_b32 v3, v[4:5], off
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_waitcnt vmcnt(0)
	v_sub_nc_u32_e32 v2, v2, v3
	global_store_b32 v[0:1], v2, off
.LBB1_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z8subtractPiS_S_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z8subtractPiS_S_i, .Lfunc_end1-_Z8subtractPiS_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 180
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z4multPiS_S_i          ; -- Begin function _Z4multPiS_S_i
	.globl	_Z4multPiS_S_i
	.p2align	8
	.type	_Z4multPiS_S_i,@function
_Z4multPiS_S_i:                         ; @_Z4multPiS_S_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB2_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b64 s[0:1], s[0:1], 0x10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	global_load_b32 v2, v[2:3], off
	global_load_b32 v3, v[4:5], off
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_waitcnt vmcnt(0)
	v_mul_lo_u32 v2, v3, v2
	global_store_b32 v[0:1], v2, off
.LBB2_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z4multPiS_S_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z4multPiS_S_i, .Lfunc_end2-_Z4multPiS_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 184
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z3modPiS_S_i           ; -- Begin function _Z3modPiS_S_i
	.globl	_Z3modPiS_S_i
	.p2align	8
	.type	_Z3modPiS_S_i,@function
_Z3modPiS_S_i:                          ; @_Z3modPiS_S_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB3_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b64 s[0:1], s[0:1], 0x10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s6, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v1, vcc_lo
	global_load_b32 v4, v[2:3], off
	v_add_co_u32 v2, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(1)
	v_ashrrev_i32_e32 v3, 31, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v4, v4, v3
	s_waitcnt vmcnt(0)
	v_ashrrev_i32_e32 v6, 31, v2
	v_xor_b32_e32 v3, v4, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v2, v6
	v_cvt_f32_u32_e32 v4, v3
	v_sub_nc_u32_e32 v5, 0, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_xor_b32_e32 v2, v2, v6
	v_rcp_iflag_f32_e32 v4, v4
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v4, 0x4f7ffffe, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_u32_f32_e32 v4, v4
	v_mul_lo_u32 v5, v5, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v5, v4, v5
	v_add_nc_u32_e32 v4, v4, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v4, v2, v4
	v_mul_lo_u32 v4, v4, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v2, v2, v4
	v_sub_nc_u32_e32 v4, v2, v3
	v_cmp_ge_u32_e32 vcc_lo, v2, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v2, v2, v4, vcc_lo
	v_sub_nc_u32_e32 v4, v2, v3
	v_cmp_ge_u32_e32 vcc_lo, v2, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v2, v2, v4, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	v_xor_b32_e32 v2, v2, v6
	s_delay_alu instid0(VALU_DEP_1)
	v_sub_nc_u32_e32 v2, v2, v6
	global_store_b32 v[0:1], v2, off
.LBB3_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z3modPiS_S_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end3:
	.size	_Z3modPiS_S_i, .Lfunc_end3-_Z3modPiS_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 344
; NumSgprs: 18
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z3addPiS_S_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z3addPiS_S_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     6
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z8subtractPiS_S_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z8subtractPiS_S_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     6
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z4multPiS_S_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z4multPiS_S_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     6
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z3modPiS_S_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z3modPiS_S_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     7
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
