#include <cuda_runtime.h>
#include <stdio.h>
#include <sys/time.h>

double cpuSecond() {
    struct timeval tp;
    gettimeofday(&tp,NULL);
    return ((double)tp.tv_sec + (double)tp.tv_usec*1.e-6);
}

__global__
void MatAdd1D(int* A, int* B, int* C, int nx, int ny)
{
    int ix = threadIdx.x + blockIdx.x * blockDim.x;
    int iy = threadIdx.y + blockIdx.y * blockDim.y;
    int idx = iy * nx + ix;

    C[idx] = A[idx] + B[idx];
}

__global__
void MatAdd2D(int* A, int* B, int* C, int nx, int ny)
{
    int ix = threadIdx.x + blockIdx.x * blockDim.x;
    int iy = threadIdx.y + blockIdx.y * blockDim.y;
    int idx = iy * nx + ix;
    if (ix < nx && iy < ny)
        C[idx] = A[idx] + B[idx];
}

__global__
void MatAdd1D1D(int* A, int* B, int* C, int nx, int ny)
{
    unsigned int ix = threadIdx.x + blockIdx.x * blockDim.x;
    if (ix < nx)
    {
        for (int iy = 0; iy < ny; ++iy)
        {
            int idx = iy * nx + ix;
            C[idx] = A[idx] + B[idx];
        }
    }
}


__global__
void MatAdd2D1D(int* A, int* B, int* C, int nx, int ny)
{
    unsigned int ix = threadIdx.x + blockIdx.x * blockDim.x;
    unsigned int iy = blockIdx.y;

    unsigned int idx = iy*nx + ix;
    if (ix < nx && iy < ny)
        C[idx] = A[idx] + B[idx];
}

void sumMatrixOnHost (int *A, int *B, int *C, const int nx, const int ny)
{
    int *ia = A;
    int *ib = B;
    int *ic = C;
    for (int iy = 0; iy < ny; iy++)
    {
        for (int ix = 0; ix < nx; ix++)
        {
            ic[ix] = ia[ix] + ib[ix];
        }
        ia += nx;
        ib += nx;
        ic += nx;
    }
}

void checkResult(int *hostRef, int *gpuRef, const int N)
{
    double epsilon = 1.0E-8;

    for (int i = 0; i < N; i++)
    {
        if (abs(hostRef[i] - gpuRef[i]) > epsilon)
        {
            printf("host %f gpu %f ", hostRef[i], gpuRef[i]);
            printf("Arrays do not match.\n\n");
            break;
        }
    }
}

void GenerateMatrix(int* m, int size)
{
    for (int i=0; i<size; ++i)
        m[i] = rand()% 10;
}

int main( void ) {

    double time1, time2, time3, time4;

    // size of matrix
    unsigned int nx = 1<<10; // столбцы
    unsigned int ny = 1<<10; // строки
    int size = nx*ny;
    size_t sizeBytes = size * sizeof(int);

    int* h_A = (int*)malloc(sizeBytes);
    int* h_B = (int*)malloc(sizeBytes);
    int* h_C = (int*)malloc(sizeBytes);
    int* cpu_C = (int*)malloc(sizeBytes);

    GenerateMatrix(h_A, size);
    GenerateMatrix(h_B, size);
    sumMatrixOnHost(h_A, h_B, cpu_C, nx, ny);

    int* d_A;
    int* d_B;
    cudaMalloc((void**)&d_A, sizeBytes);
    cudaMalloc((void**)&d_B, sizeBytes);

    cudaMemcpy(d_A, h_A, sizeBytes, cudaMemcpyHostToDevice);
    cudaMemcpy(d_B, h_B, sizeBytes, cudaMemcpyHostToDevice);

    printf("Started succesfylly\n");

    /* Варивант с 1D */

    int* d_C1D;
    cudaMalloc((void**)&d_C1D, sizeBytes);

    int BlockPerGrid = ny; // строки
    int ThreadsPerBlock = nx; // столбцы

    cudaDeviceSynchronize();
    time1 = cpuSecond();
    MatAdd1D<<< BlockPerGrid, ThreadsPerBlock >>>(d_A, d_B, d_C1D, nx, ny);
    cudaDeviceSynchronize();
    time1 = cpuSecond() - time1;
    printf("MattAdd1D <<<(%d, %d)>>> elapsed %f ms\n", BlockPerGrid,
           ThreadsPerBlock, time1);

    cudaMemcpy(h_C, d_C1D, sizeBytes, cudaMemcpyDeviceToHost);
    checkResult(cpu_C, h_C, size);
    cudaFree(d_C1D);

    /* Вариант с 2D */

    int* d_C2D;
    cudaMalloc((void**)&d_C2D, sizeBytes);

    int dimx = 32;
    int dimy = 16;
    dim3 block(dimx, dimy);
    dim3 grid((nx + block.x - 1) / block.x, (ny + block.y - 1) / block.y);

    cudaDeviceSynchronize();
    time2 = cpuSecond();
    MatAdd2D<<<grid, block>>>(d_A, d_B, d_C2D, nx, ny);
    cudaDeviceSynchronize();
    time2 = cpuSecond() - time2;
    printf("MattAdd2D <<<(%d, %d), (%d, %d)>>> elapsed %f ms\n", grid.x,
           grid.y,
           block.x, block.y, time2);

    cudaMemcpy(h_C, d_C1D, sizeBytes, cudaMemcpyDeviceToHost);
    checkResult(cpu_C, h_C, size);
    cudaFree(d_C1D);

    /* Вариант с 1D-сеткой и 1D-блоками */

    int* d_C1D1D;
    cudaMalloc((void**)&d_C1D1D, sizeBytes);

    block = dim3{128,1};
    grid = dim3{(nx+block.x-1)/block.x,1};

    cudaDeviceSynchronize();
    time3 = cpuSecond();
    MatAdd1D1D <<<grid, block>>> (d_A, d_B, d_C1D1D, nx, ny);
    cudaDeviceSynchronize();
    time3 = cpuSecond() - time3;
    printf("MatAdd1D1D <<<(%d, %d), (%d, %d)>>> elapsed %f ms\n", grid.x,
           grid.y,
           block.x, block.y, time3);
    cudaMemcpy(h_C, d_C1D1D, sizeBytes, cudaMemcpyDeviceToHost);
    checkResult(cpu_C, h_C, size);
    cudaFree(d_C1D1D);


    /* Вариант с 2D-сеткой и 1D-блоками */
    int* d_C2D1D;
    cudaMalloc((void**)&d_C2D1D, sizeBytes);

    block = dim3{256};
    grid = dim3{(nx + block.x - 1) / block.x,ny};

    cudaDeviceSynchronize();
    time4 = cpuSecond();
    MatAdd2D1D <<<grid, block>>> (d_A, d_B, d_C2D1D, nx, ny);
    cudaDeviceSynchronize();
    time4 = cpuSecond() - time4;
    printf("MatAdd2D1D <<<(%d, %d), (%d, %d)>>> elapsed %f ms\n", grid.x,
           grid.y,
           block.x, block.y, time4);
    cudaMemcpy(h_C, d_C2D1D, sizeBytes, cudaMemcpyDeviceToHost);
    checkResult(cpu_C, h_C, size);
    cudaFree(d_C2D1D);


    cudaFree(d_A);
    cudaFree(d_B);

    free(h_A);
    free(h_B);
    free(h_C);

    return 0;
}

	.file	"tmpxft_003664a7_00000000-6_Matrix_1.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2034:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2034:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z9cpuSecondv
	.type	_Z9cpuSecondv, @function
_Z9cpuSecondv:
.LFB2027:
	.cfi_startproc
	endbr64
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	xorl	%esi, %esi
	movq	%fs:40, %rax
	movq	%rax, 24(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rdi
	call	gettimeofday@PLT
	cvtsi2sdq	16(%rsp), %xmm0
	mulsd	.LC0(%rip), %xmm0
	cvtsi2sdq	8(%rsp), %xmm1
	addsd	%xmm1, %xmm0
	movq	24(%rsp), %rax
	subq	%fs:40, %rax
	je	.L3
	call	__stack_chk_fail@PLT
.L3:
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z9cpuSecondv, .-_Z9cpuSecondv
	.globl	_Z15sumMatrixOnHostPiS_S_ii
	.type	_Z15sumMatrixOnHostPiS_S_ii, @function
_Z15sumMatrixOnHostPiS_S_ii:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movslq	%ecx, %r11
	movq	%rsi, %r9
	movq	%rdx, %r10
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	salq	$2, %r11
	xorl	%edx, %edx
	xorl	%esi, %esi
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
.L7:
	leaq	(%r10,%rdx), %r13
	leaq	(%r9,%rdx), %r12
	leaq	(%rdi,%rdx), %rbp
	cmpl	%r8d, %esi
	jge	.L12
	xorl	%eax, %eax
.L9:
	cmpl	%eax, %ecx
	jle	.L13
	movl	(%r12,%rax,4), %ebx
	addl	0(%rbp,%rax,4), %ebx
	movl	%ebx, 0(%r13,%rax,4)
	incq	%rax
	jmp	.L9
.L13:
	incl	%esi
	addq	%r11, %rdx
	jmp	.L7
.L12:
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	_Z15sumMatrixOnHostPiS_S_ii, .-_Z15sumMatrixOnHostPiS_S_ii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"host %f gpu %f "
.LC2:
	.string	"Arrays do not match.\n\n"
	.text
	.globl	_Z11checkResultPiS_i
	.type	_Z11checkResultPiS_i, @function
_Z11checkResultPiS_i:
.LFB2029:
	.cfi_startproc
	endbr64
	xorl	%eax, %eax
.L15:
	cmpl	%eax, %edx
	jle	.L21
	movl	(%rdi,%rax,4), %r8d
	incq	%rax
	movl	-4(%rsi,%rax,4), %ecx
	cmpl	%ecx, %r8d
	je	.L15
	pushq	%rax
	.cfi_def_cfa_offset 16
	movl	%r8d, %edx
	leaq	.LC1(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC2(%rip), %rsi
	xorl	%eax, %eax
	popq	%rdx
	.cfi_def_cfa_offset 8
	movl	$2, %edi
	jmp	__printf_chk@PLT
.L21:
	ret
	.cfi_endproc
.LFE2029:
	.size	_Z11checkResultPiS_i, .-_Z11checkResultPiS_i
	.globl	_Z14GenerateMatrixPii
	.type	_Z14GenerateMatrixPii, @function
_Z14GenerateMatrixPii:
.LFB2030:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	$10, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%rdi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movl	%esi, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	xorl	%ebx, %ebx
	pushq	%rdx
	.cfi_def_cfa_offset 48
.L23:
	cmpl	%ebx, %ebp
	jle	.L26
	call	rand@PLT
	cltd
	idivl	%r13d
	movl	%edx, (%r12,%rbx,4)
	incq	%rbx
	jmp	.L23
.L26:
	popq	%rax
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2030:
	.size	_Z14GenerateMatrixPii, .-_Z14GenerateMatrixPii
	.globl	_Z33__device_stub__Z8MatAdd1DPiS_S_iiPiS_S_ii
	.type	_Z33__device_stub__Z8MatAdd1DPiS_S_iiPiS_S_ii, @function
_Z33__device_stub__Z8MatAdd1DPiS_S_iiPiS_S_ii:
.LFB2056:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	40(%rsp), %rcx
	movl	%r8d, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L27
	pushq	40(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z8MatAdd1DPiS_S_ii(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 176
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L27:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L29
	call	__stack_chk_fail@PLT
.L29:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2056:
	.size	_Z33__device_stub__Z8MatAdd1DPiS_S_iiPiS_S_ii, .-_Z33__device_stub__Z8MatAdd1DPiS_S_iiPiS_S_ii
	.globl	_Z8MatAdd1DPiS_S_ii
	.type	_Z8MatAdd1DPiS_S_ii, @function
_Z8MatAdd1DPiS_S_ii:
.LFB2057:
	.cfi_startproc
	endbr64
	jmp	_Z33__device_stub__Z8MatAdd1DPiS_S_iiPiS_S_ii
	.cfi_endproc
.LFE2057:
	.size	_Z8MatAdd1DPiS_S_ii, .-_Z8MatAdd1DPiS_S_ii
	.globl	_Z33__device_stub__Z8MatAdd2DPiS_S_iiPiS_S_ii
	.type	_Z33__device_stub__Z8MatAdd2DPiS_S_iiPiS_S_ii, @function
_Z33__device_stub__Z8MatAdd2DPiS_S_iiPiS_S_ii:
.LFB2058:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	40(%rsp), %rcx
	movl	%r8d, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L32
	pushq	40(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z8MatAdd2DPiS_S_ii(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 176
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L32:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L34
	call	__stack_chk_fail@PLT
.L34:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2058:
	.size	_Z33__device_stub__Z8MatAdd2DPiS_S_iiPiS_S_ii, .-_Z33__device_stub__Z8MatAdd2DPiS_S_iiPiS_S_ii
	.globl	_Z8MatAdd2DPiS_S_ii
	.type	_Z8MatAdd2DPiS_S_ii, @function
_Z8MatAdd2DPiS_S_ii:
.LFB2059:
	.cfi_startproc
	endbr64
	jmp	_Z33__device_stub__Z8MatAdd2DPiS_S_iiPiS_S_ii
	.cfi_endproc
.LFE2059:
	.size	_Z8MatAdd2DPiS_S_ii, .-_Z8MatAdd2DPiS_S_ii
	.globl	_Z36__device_stub__Z10MatAdd1D1DPiS_S_iiPiS_S_ii
	.type	_Z36__device_stub__Z10MatAdd1D1DPiS_S_iiPiS_S_ii, @function
_Z36__device_stub__Z10MatAdd1D1DPiS_S_iiPiS_S_ii:
.LFB2060:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	40(%rsp), %rcx
	movl	%r8d, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L37
	pushq	40(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z10MatAdd1D1DPiS_S_ii(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 176
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L37:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L39
	call	__stack_chk_fail@PLT
.L39:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2060:
	.size	_Z36__device_stub__Z10MatAdd1D1DPiS_S_iiPiS_S_ii, .-_Z36__device_stub__Z10MatAdd1D1DPiS_S_iiPiS_S_ii
	.globl	_Z10MatAdd1D1DPiS_S_ii
	.type	_Z10MatAdd1D1DPiS_S_ii, @function
_Z10MatAdd1D1DPiS_S_ii:
.LFB2061:
	.cfi_startproc
	endbr64
	jmp	_Z36__device_stub__Z10MatAdd1D1DPiS_S_iiPiS_S_ii
	.cfi_endproc
.LFE2061:
	.size	_Z10MatAdd1D1DPiS_S_ii, .-_Z10MatAdd1D1DPiS_S_ii
	.globl	_Z36__device_stub__Z10MatAdd2D1DPiS_S_iiPiS_S_ii
	.type	_Z36__device_stub__Z10MatAdd2D1DPiS_S_iiPiS_S_ii, @function
_Z36__device_stub__Z10MatAdd2D1DPiS_S_iiPiS_S_ii:
.LFB2062:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	40(%rsp), %rcx
	movl	%r8d, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L42
	pushq	40(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z10MatAdd2D1DPiS_S_ii(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 176
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L42:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L44
	call	__stack_chk_fail@PLT
.L44:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2062:
	.size	_Z36__device_stub__Z10MatAdd2D1DPiS_S_iiPiS_S_ii, .-_Z36__device_stub__Z10MatAdd2D1DPiS_S_iiPiS_S_ii
	.globl	_Z10MatAdd2D1DPiS_S_ii
	.type	_Z10MatAdd2D1DPiS_S_ii, @function
_Z10MatAdd2D1DPiS_S_ii:
.LFB2063:
	.cfi_startproc
	endbr64
	jmp	_Z36__device_stub__Z10MatAdd2D1DPiS_S_iiPiS_S_ii
	.cfi_endproc
.LFE2063:
	.size	_Z10MatAdd2D1DPiS_S_ii, .-_Z10MatAdd2D1DPiS_S_ii
	.section	.rodata.str1.1
.LC3:
	.string	"Started succesfylly\n"
.LC4:
	.string	"MattAdd1D <<<(%d, %d)>>> elapsed %f ms\n"
.LC5:
	.string	"MattAdd2D <<<(%d, %d), (%d, %d)>>> elapsed %f ms\n"
.LC6:
	.string	"MatAdd1D1D <<<(%d, %d), (%d, %d)>>> elapsed %f ms\n"
.LC7:
	.string	"MatAdd2D1D <<<(%d, %d), (%d, %d)>>> elapsed %f ms\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2031:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	$4194304, %edi
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	subq	$104, %rsp
	.cfi_def_cfa_offset 144
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	call	malloc@PLT
	movl	$4194304, %edi
	movq	%rax, %r13
	call	malloc@PLT
	movl	$4194304, %edi
	movq	%rax, %r12
	call	malloc@PLT
	movl	$4194304, %edi
	movq	%rax, %rbx
	call	malloc@PLT
	movl	$1048576, %esi
	movq	%r13, %rdi
	movq	%rax, %rbp
	call	_Z14GenerateMatrixPii
	movl	$1048576, %esi
	movq	%r12, %rdi
	call	_Z14GenerateMatrixPii
	movl	$1024, %ecx
	movq	%rbp, %rdx
	movq	%r12, %rsi
	movl	$1024, %r8d
	movq	%r13, %rdi
	call	_Z15sumMatrixOnHostPiS_S_ii
	leaq	16(%rsp), %rdi
	movl	$4194304, %esi
	call	cudaMalloc@PLT
	leaq	24(%rsp), %rdi
	movl	$4194304, %esi
	call	cudaMalloc@PLT
	movq	16(%rsp), %rdi
	movl	$1, %ecx
	movq	%r13, %rsi
	movl	$4194304, %edx
	call	cudaMemcpy@PLT
	movq	24(%rsp), %rdi
	movl	$1, %ecx
	movq	%r12, %rsi
	movl	$4194304, %edx
	call	cudaMemcpy@PLT
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	32(%rsp), %rdi
	movl	$4194304, %esi
	call	cudaMalloc@PLT
	call	cudaDeviceSynchronize@PLT
	call	_Z9cpuSecondv
	movl	$4194305, %edi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$10, %rdi
	movl	$1, %ecx
	movl	$1, %esi
	movl	$1, 84(%rsp)
	movq	%rdi, %rdx
	movq	%rdi, 76(%rsp)
	movq	%rdi, 64(%rsp)
	movl	$1, 72(%rsp)
	movsd	%xmm0, 8(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L48
	movq	32(%rsp), %rdx
	movq	24(%rsp), %rsi
	movl	$1024, %ecx
	movl	$1024, %r8d
	movq	16(%rsp), %rdi
	call	_Z33__device_stub__Z8MatAdd1DPiS_S_iiPiS_S_ii
.L48:
	call	cudaDeviceSynchronize@PLT
	call	_Z9cpuSecondv
	subsd	8(%rsp), %xmm0
	movb	$1, %al
	movl	$1024, %ecx
	movl	$1024, %edx
	leaq	.LC4(%rip), %rsi
	movl	$2, %edi
	call	__printf_chk@PLT
	movq	32(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbx, %rdi
	movl	$4194304, %edx
	call	cudaMemcpy@PLT
	movl	$1048576, %edx
	movq	%rbx, %rsi
	movq	%rbp, %rdi
	call	_Z11checkResultPiS_i
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	leaq	40(%rsp), %rdi
	movl	$4194304, %esi
	call	cudaMalloc@PLT
	call	cudaDeviceSynchronize@PLT
	call	_Z9cpuSecondv
	movl	$2147483649, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$5, %rdx
	movl	$1, %ecx
	movabsq	$274877906976, %rdi
	movl	$1, %esi
	movq	%rdi, 76(%rsp)
	movl	$1, 84(%rsp)
	movq	%rdx, 64(%rsp)
	movl	$1, 72(%rsp)
	movsd	%xmm0, 8(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L49
	movq	40(%rsp), %rdx
	movq	24(%rsp), %rsi
	movl	$1024, %ecx
	movl	$1024, %r8d
	movq	16(%rsp), %rdi
	call	_Z33__device_stub__Z8MatAdd2DPiS_S_iiPiS_S_ii
.L49:
	call	cudaDeviceSynchronize@PLT
	call	_Z9cpuSecondv
	subsd	8(%rsp), %xmm0
	movl	$16, %r9d
	movl	$32, %r8d
	movl	$64, %ecx
	movl	$32, %edx
	leaq	.LC5(%rip), %rsi
	movb	$1, %al
	movl	$2, %edi
	call	__printf_chk@PLT
	movq	32(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbx, %rdi
	movl	$4194304, %edx
	call	cudaMemcpy@PLT
	movl	$1048576, %edx
	movq	%rbx, %rsi
	movq	%rbp, %rdi
	call	_Z11checkResultPiS_i
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	leaq	48(%rsp), %rdi
	movl	$4194304, %esi
	call	cudaMalloc@PLT
	movl	$33554433, %eax
	salq	$7, %rax
	movq	%rax, 64(%rsp)
	subq	$120, %rax
	movq	%rax, 76(%rsp)
	call	cudaDeviceSynchronize@PLT
	call	_Z9cpuSecondv
	movl	72(%rsp), %ecx
	movl	84(%rsp), %esi
	xorl	%r9d, %r9d
	movq	64(%rsp), %rdx
	movq	76(%rsp), %rdi
	xorl	%r8d, %r8d
	movsd	%xmm0, 8(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L50
	movq	48(%rsp), %rdx
	movq	24(%rsp), %rsi
	movl	$1024, %ecx
	movl	$1024, %r8d
	movq	16(%rsp), %rdi
	call	_Z36__device_stub__Z10MatAdd1D1DPiS_S_iiPiS_S_ii
.L50:
	call	cudaDeviceSynchronize@PLT
	call	_Z9cpuSecondv
	subsd	8(%rsp), %xmm0
	movl	$1, %r9d
	movl	$128, %r8d
	movl	$1, %ecx
	movl	$8, %edx
	leaq	.LC6(%rip), %rsi
	movb	$1, %al
	movl	$2, %edi
	call	__printf_chk@PLT
	movq	48(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbx, %rdi
	movl	$4194304, %edx
	call	cudaMemcpy@PLT
	movl	$1048576, %edx
	movq	%rbx, %rsi
	movq	%rbp, %rdi
	call	_Z11checkResultPiS_i
	movq	48(%rsp), %rdi
	call	cudaFree@PLT
	leaq	56(%rsp), %rdi
	movl	$4194304, %esi
	call	cudaMalloc@PLT
	movl	$256, 64(%rsp)
	movabsq	$4398046511108, %rax
	movq	%rax, 76(%rsp)
	call	cudaDeviceSynchronize@PLT
	call	_Z9cpuSecondv
	movl	72(%rsp), %ecx
	movl	84(%rsp), %esi
	xorl	%r9d, %r9d
	movq	64(%rsp), %rdx
	movq	76(%rsp), %rdi
	xorl	%r8d, %r8d
	movsd	%xmm0, 8(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L51
	movq	56(%rsp), %rdx
	movq	24(%rsp), %rsi
	movl	$1024, %ecx
	movl	$1024, %r8d
	movq	16(%rsp), %rdi
	call	_Z36__device_stub__Z10MatAdd2D1DPiS_S_iiPiS_S_ii
.L51:
	call	cudaDeviceSynchronize@PLT
	call	_Z9cpuSecondv
	subsd	8(%rsp), %xmm0
	movl	$1, %r9d
	movl	$256, %r8d
	movl	$1024, %ecx
	movl	$4, %edx
	leaq	.LC7(%rip), %rsi
	movb	$1, %al
	movl	$2, %edi
	call	__printf_chk@PLT
	movq	56(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbx, %rdi
	movl	$4194304, %edx
	call	cudaMemcpy@PLT
	movl	$1048576, %edx
	movq	%rbx, %rsi
	movq	%rbp, %rdi
	call	_Z11checkResultPiS_i
	movq	56(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	%r13, %rdi
	call	free@PLT
	movq	%r12, %rdi
	call	free@PLT
	movq	%rbx, %rdi
	call	free@PLT
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L52
	call	__stack_chk_fail@PLT
.L52:
	addq	$104, %rsp
	.cfi_def_cfa_offset 40
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2031:
	.size	main, .-main
	.section	.rodata.str1.1
.LC8:
	.string	"_Z10MatAdd2D1DPiS_S_ii"
.LC9:
	.string	"_Z10MatAdd1D1DPiS_S_ii"
.LC10:
	.string	"_Z8MatAdd2DPiS_S_ii"
.LC11:
	.string	"_Z8MatAdd1DPiS_S_ii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2065:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC8(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z10MatAdd2D1DPiS_S_ii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC9(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z10MatAdd1D1DPiS_S_ii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC10(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z8MatAdd2DPiS_S_ii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC11(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z8MatAdd1DPiS_S_ii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2065:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC0:
	.long	-1598689907
	.long	1051772663
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <hip/hip_runtime.h>
#include <stdio.h>
#include <sys/time.h>

double cpuSecond() {
    struct timeval tp;
    gettimeofday(&tp,NULL);
    return ((double)tp.tv_sec + (double)tp.tv_usec*1.e-6);
}

__global__
void MatAdd1D(int* A, int* B, int* C, int nx, int ny)
{
    int ix = threadIdx.x + blockIdx.x * blockDim.x;
    int iy = threadIdx.y + blockIdx.y * blockDim.y;
    int idx = iy * nx + ix;

    C[idx] = A[idx] + B[idx];
}

__global__
void MatAdd2D(int* A, int* B, int* C, int nx, int ny)
{
    int ix = threadIdx.x + blockIdx.x * blockDim.x;
    int iy = threadIdx.y + blockIdx.y * blockDim.y;
    int idx = iy * nx + ix;
    if (ix < nx && iy < ny)
        C[idx] = A[idx] + B[idx];
}

__global__
void MatAdd1D1D(int* A, int* B, int* C, int nx, int ny)
{
    unsigned int ix = threadIdx.x + blockIdx.x * blockDim.x;
    if (ix < nx)
    {
        for (int iy = 0; iy < ny; ++iy)
        {
            int idx = iy * nx + ix;
            C[idx] = A[idx] + B[idx];
        }
    }
}


__global__
void MatAdd2D1D(int* A, int* B, int* C, int nx, int ny)
{
    unsigned int ix = threadIdx.x + blockIdx.x * blockDim.x;
    unsigned int iy = blockIdx.y;

    unsigned int idx = iy*nx + ix;
    if (ix < nx && iy < ny)
        C[idx] = A[idx] + B[idx];
}

void sumMatrixOnHost (int *A, int *B, int *C, const int nx, const int ny)
{
    int *ia = A;
    int *ib = B;
    int *ic = C;
    for (int iy = 0; iy < ny; iy++)
    {
        for (int ix = 0; ix < nx; ix++)
        {
            ic[ix] = ia[ix] + ib[ix];
        }
        ia += nx;
        ib += nx;
        ic += nx;
    }
}

void checkResult(int *hostRef, int *gpuRef, const int N)
{
    double epsilon = 1.0E-8;

    for (int i = 0; i < N; i++)
    {
        if (abs(hostRef[i] - gpuRef[i]) > epsilon)
        {
            printf("host %f gpu %f ", hostRef[i], gpuRef[i]);
            printf("Arrays do not match.\n\n");
            break;
        }
    }
}

void GenerateMatrix(int* m, int size)
{
    for (int i=0; i<size; ++i)
        m[i] = rand()% 10;
}

int main( void ) {

    double time1, time2, time3, time4;

    // size of matrix
    unsigned int nx = 1<<10; // столбцы
    unsigned int ny = 1<<10; // строки
    int size = nx*ny;
    size_t sizeBytes = size * sizeof(int);

    int* h_A = (int*)malloc(sizeBytes);
    int* h_B = (int*)malloc(sizeBytes);
    int* h_C = (int*)malloc(sizeBytes);
    int* cpu_C = (int*)malloc(sizeBytes);

    GenerateMatrix(h_A, size);
    GenerateMatrix(h_B, size);
    sumMatrixOnHost(h_A, h_B, cpu_C, nx, ny);

    int* d_A;
    int* d_B;
    hipMalloc((void**)&d_A, sizeBytes);
    hipMalloc((void**)&d_B, sizeBytes);

    hipMemcpy(d_A, h_A, sizeBytes, hipMemcpyHostToDevice);
    hipMemcpy(d_B, h_B, sizeBytes, hipMemcpyHostToDevice);

    printf("Started succesfylly\n");

    /* Варивант с 1D */

    int* d_C1D;
    hipMalloc((void**)&d_C1D, sizeBytes);

    int BlockPerGrid = ny; // строки
    int ThreadsPerBlock = nx; // столбцы

    hipDeviceSynchronize();
    time1 = cpuSecond();
    MatAdd1D<<< BlockPerGrid, ThreadsPerBlock >>>(d_A, d_B, d_C1D, nx, ny);
    hipDeviceSynchronize();
    time1 = cpuSecond() - time1;
    printf("MattAdd1D <<<(%d, %d)>>> elapsed %f ms\n", BlockPerGrid,
           ThreadsPerBlock, time1);

    hipMemcpy(h_C, d_C1D, sizeBytes, hipMemcpyDeviceToHost);
    checkResult(cpu_C, h_C, size);
    hipFree(d_C1D);

    /* Вариант с 2D */

    int* d_C2D;
    hipMalloc((void**)&d_C2D, sizeBytes);

    int dimx = 32;
    int dimy = 16;
    dim3 block(dimx, dimy);
    dim3 grid((nx + block.x - 1) / block.x, (ny + block.y - 1) / block.y);

    hipDeviceSynchronize();
    time2 = cpuSecond();
    MatAdd2D<<<grid, block>>>(d_A, d_B, d_C2D, nx, ny);
    hipDeviceSynchronize();
    time2 = cpuSecond() - time2;
    printf("MattAdd2D <<<(%d, %d), (%d, %d)>>> elapsed %f ms\n", grid.x,
           grid.y,
           block.x, block.y, time2);

    hipMemcpy(h_C, d_C1D, sizeBytes, hipMemcpyDeviceToHost);
    checkResult(cpu_C, h_C, size);
    hipFree(d_C1D);

    /* Вариант с 1D-сеткой и 1D-блоками */

    int* d_C1D1D;
    hipMalloc((void**)&d_C1D1D, sizeBytes);

    block = dim3{128,1};
    grid = dim3{(nx+block.x-1)/block.x,1};

    hipDeviceSynchronize();
    time3 = cpuSecond();
    MatAdd1D1D <<<grid, block>>> (d_A, d_B, d_C1D1D, nx, ny);
    hipDeviceSynchronize();
    time3 = cpuSecond() - time3;
    printf("MatAdd1D1D <<<(%d, %d), (%d, %d)>>> elapsed %f ms\n", grid.x,
           grid.y,
           block.x, block.y, time3);
    hipMemcpy(h_C, d_C1D1D, sizeBytes, hipMemcpyDeviceToHost);
    checkResult(cpu_C, h_C, size);
    hipFree(d_C1D1D);


    /* Вариант с 2D-сеткой и 1D-блоками */
    int* d_C2D1D;
    hipMalloc((void**)&d_C2D1D, sizeBytes);

    block = dim3{256};
    grid = dim3{(nx + block.x - 1) / block.x,ny};

    hipDeviceSynchronize();
    time4 = cpuSecond();
    MatAdd2D1D <<<grid, block>>> (d_A, d_B, d_C2D1D, nx, ny);
    hipDeviceSynchronize();
    time4 = cpuSecond() - time4;
    printf("MatAdd2D1D <<<(%d, %d), (%d, %d)>>> elapsed %f ms\n", grid.x,
           grid.y,
           block.x, block.y, time4);
    hipMemcpy(h_C, d_C2D1D, sizeBytes, hipMemcpyDeviceToHost);
    checkResult(cpu_C, h_C, size);
    hipFree(d_C2D1D);


    hipFree(d_A);
    hipFree(d_B);

    free(h_A);
    free(h_B);
    free(h_C);

    return 0;
}

	.text
	.file	"Matrix_1.hip"
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z9cpuSecondv
.LCPI0_0:
	.quad	0x3eb0c6f7a0b5ed8d              # double 9.9999999999999995E-7
	.text
	.globl	_Z9cpuSecondv
	.type	_Z9cpuSecondv,@function
_Z9cpuSecondv:                          # @_Z9cpuSecondv
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$16, %rsp
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -16
	movq	%rsp, %rbx
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	cvtsi2sdq	(%rbx), %xmm1
	cvtsi2sdq	8(%rbx), %xmm0
	mulsd	.LCPI0_0(%rip), %xmm0
	addsd	%xmm1, %xmm0
	addq	$16, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z9cpuSecondv, .Lfunc_end0-_Z9cpuSecondv
	.cfi_endproc
                                        # -- End function
	.globl	_Z23__device_stub__MatAdd1DPiS_S_ii # -- Begin function _Z23__device_stub__MatAdd1DPiS_S_ii
	.type	_Z23__device_stub__MatAdd1DPiS_S_ii,@function
_Z23__device_stub__MatAdd1DPiS_S_ii:    # @_Z23__device_stub__MatAdd1DPiS_S_ii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	movq	%rsp, %rcx
	movl	%r8d, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z8MatAdd1DPiS_S_ii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z23__device_stub__MatAdd1DPiS_S_ii, .Lfunc_end1-_Z23__device_stub__MatAdd1DPiS_S_ii
	.cfi_endproc
                                        # -- End function
	.globl	_Z23__device_stub__MatAdd2DPiS_S_ii # -- Begin function _Z23__device_stub__MatAdd2DPiS_S_ii
	.type	_Z23__device_stub__MatAdd2DPiS_S_ii,@function
_Z23__device_stub__MatAdd2DPiS_S_ii:    # @_Z23__device_stub__MatAdd2DPiS_S_ii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	movq	%rsp, %rcx
	movl	%r8d, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z8MatAdd2DPiS_S_ii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z23__device_stub__MatAdd2DPiS_S_ii, .Lfunc_end2-_Z23__device_stub__MatAdd2DPiS_S_ii
	.cfi_endproc
                                        # -- End function
	.globl	_Z25__device_stub__MatAdd1D1DPiS_S_ii # -- Begin function _Z25__device_stub__MatAdd1D1DPiS_S_ii
	.type	_Z25__device_stub__MatAdd1D1DPiS_S_ii,@function
_Z25__device_stub__MatAdd1D1DPiS_S_ii:  # @_Z25__device_stub__MatAdd1D1DPiS_S_ii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	movq	%rsp, %rcx
	movl	%r8d, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10MatAdd1D1DPiS_S_ii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z25__device_stub__MatAdd1D1DPiS_S_ii, .Lfunc_end3-_Z25__device_stub__MatAdd1D1DPiS_S_ii
	.cfi_endproc
                                        # -- End function
	.globl	_Z25__device_stub__MatAdd2D1DPiS_S_ii # -- Begin function _Z25__device_stub__MatAdd2D1DPiS_S_ii
	.type	_Z25__device_stub__MatAdd2D1DPiS_S_ii,@function
_Z25__device_stub__MatAdd2D1DPiS_S_ii:  # @_Z25__device_stub__MatAdd2D1DPiS_S_ii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	movq	%rsp, %rcx
	movl	%r8d, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10MatAdd2D1DPiS_S_ii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z25__device_stub__MatAdd2D1DPiS_S_ii, .Lfunc_end4-_Z25__device_stub__MatAdd2D1DPiS_S_ii
	.cfi_endproc
                                        # -- End function
	.globl	_Z15sumMatrixOnHostPiS_S_ii     # -- Begin function _Z15sumMatrixOnHostPiS_S_ii
	.type	_Z15sumMatrixOnHostPiS_S_ii,@function
_Z15sumMatrixOnHostPiS_S_ii:            # @_Z15sumMatrixOnHostPiS_S_ii
	.cfi_startproc
# %bb.0:
	testl	%r8d, %r8d
	jle	.LBB5_7
# %bb.1:                                # %.preheader.lr.ph
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movslq	%ecx, %rax
	movl	%eax, %r9d
	shlq	$2, %rax
	xorl	%r10d, %r10d
.LBB5_2:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB5_4 Depth 2
	testl	%ecx, %ecx
	jle	.LBB5_5
# %bb.3:                                # %.lr.ph.preheader
                                        #   in Loop: Header=BB5_2 Depth=1
	xorl	%r11d, %r11d
.LBB5_4:                                # %.lr.ph
                                        #   Parent Loop BB5_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	(%rsi,%r11,4), %ebx
	addl	(%rdi,%r11,4), %ebx
	movl	%ebx, (%rdx,%r11,4)
	incq	%r11
	cmpq	%r11, %r9
	jne	.LBB5_4
.LBB5_5:                                # %._crit_edge
                                        #   in Loop: Header=BB5_2 Depth=1
	incl	%r10d
	addq	%rax, %rdx
	addq	%rax, %rsi
	addq	%rax, %rdi
	cmpl	%r8d, %r10d
	jne	.LBB5_2
# %bb.6:
	popq	%rbx
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
.LBB5_7:                                # %._crit_edge30
	retq
.Lfunc_end5:
	.size	_Z15sumMatrixOnHostPiS_S_ii, .Lfunc_end5-_Z15sumMatrixOnHostPiS_S_ii
	.cfi_endproc
                                        # -- End function
	.globl	_Z11checkResultPiS_i            # -- Begin function _Z11checkResultPiS_i
	.type	_Z11checkResultPiS_i,@function
_Z11checkResultPiS_i:                   # @_Z11checkResultPiS_i
	.cfi_startproc
# %bb.0:
	testl	%edx, %edx
	jle	.LBB6_5
# %bb.1:                                # %.lr.ph.preheader
	movl	%edx, %ecx
	xorl	%r8d, %r8d
.LBB6_3:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movl	(%rdi,%r8,4), %eax
	movl	(%rsi,%r8,4), %edx
	cmpl	%edx, %eax
	jne	.LBB6_4
# %bb.2:                                #   in Loop: Header=BB6_3 Depth=1
	incq	%r8
	cmpq	%r8, %rcx
	jne	.LBB6_3
.LBB6_5:                                # %.loopexit
	retq
.LBB6_4:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movl	$.L.str, %edi
	movl	%eax, %esi
	xorl	%eax, %eax
	callq	printf
	movl	$.Lstr, %edi
	popq	%rax
	.cfi_def_cfa_offset 8
	jmp	puts@PLT                        # TAILCALL
.Lfunc_end6:
	.size	_Z11checkResultPiS_i, .Lfunc_end6-_Z11checkResultPiS_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z14GenerateMatrixPii           # -- Begin function _Z14GenerateMatrixPii
	.type	_Z14GenerateMatrixPii,@function
_Z14GenerateMatrixPii:                  # @_Z14GenerateMatrixPii
	.cfi_startproc
# %bb.0:
	testl	%esi, %esi
	jle	.LBB7_4
# %bb.1:                                # %.lr.ph.preheader
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdi, %rbx
	movl	%esi, %r14d
	xorl	%r15d, %r15d
.LBB7_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	cltq
	imulq	$1717986919, %rax, %rcx         # imm = 0x66666667
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$34, %rcx
	addl	%edx, %ecx
	addl	%ecx, %ecx
	leal	(%rcx,%rcx,4), %ecx
	subl	%ecx, %eax
	movl	%eax, (%rbx,%r15,4)
	incq	%r15
	cmpq	%r15, %r14
	jne	.LBB7_2
# %bb.3:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r14
	.cfi_restore %r15
.LBB7_4:                                # %._crit_edge
	retq
.Lfunc_end7:
	.size	_Z14GenerateMatrixPii, .Lfunc_end7-_Z14GenerateMatrixPii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI8_0:
	.quad	0x3eb0c6f7a0b5ed8d              # double 9.9999999999999995E-7
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$4194304, %edi                  # imm = 0x400000
	callq	malloc
	movq	%rax, %rbx
	movl	$4194304, %edi                  # imm = 0x400000
	callq	malloc
	movq	%rax, %r14
	movl	$4194304, %edi                  # imm = 0x400000
	callq	malloc
	movq	%rax, %r15
	movl	$4194304, %edi                  # imm = 0x400000
	callq	malloc
	movq	%rax, %r13
	xorl	%r12d, %r12d
.LBB8_1:                                # %.lr.ph.i
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	cltq
	imulq	$1717986919, %rax, %rcx         # imm = 0x66666667
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$34, %rcx
	addl	%edx, %ecx
	addl	%ecx, %ecx
	leal	(%rcx,%rcx,4), %ecx
	subl	%ecx, %eax
	movl	%eax, (%rbx,%r12,4)
	incq	%r12
	cmpq	$1048576, %r12                  # imm = 0x100000
	jne	.LBB8_1
# %bb.2:                                # %.lr.ph.i106.preheader
	xorl	%r12d, %r12d
.LBB8_3:                                # %.lr.ph.i106
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	cltq
	imulq	$1717986919, %rax, %rcx         # imm = 0x66666667
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$34, %rcx
	addl	%edx, %ecx
	addl	%ecx, %ecx
	leal	(%rcx,%rcx,4), %ecx
	subl	%ecx, %eax
	movl	%eax, (%r14,%r12,4)
	incq	%r12
	cmpq	$1048576, %r12                  # imm = 0x100000
	jne	.LBB8_3
# %bb.4:                                # %.preheader.i.preheader
	xorl	%eax, %eax
	movl	$4096, %ecx                     # imm = 0x1000
	movq	%r13, %rdx
	movq	%r14, %rsi
	movq	%rbx, %rdi
.LBB8_5:                                # %.preheader.i
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB8_6 Depth 2
	xorl	%r8d, %r8d
.LBB8_6:                                # %.lr.ph.i111
                                        #   Parent Loop BB8_5 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	(%rsi,%r8,4), %r9d
	addl	(%rdi,%r8,4), %r9d
	movl	%r9d, (%rdx,%r8,4)
	incq	%r8
	cmpq	$1024, %r8                      # imm = 0x400
	jne	.LBB8_6
# %bb.7:                                # %._crit_edge.i
                                        #   in Loop: Header=BB8_5 Depth=1
	addq	%rcx, %rdi
	addq	%rcx, %rsi
	addq	%rcx, %rdx
	incl	%eax
	cmpl	$1024, %eax                     # imm = 0x400
	jne	.LBB8_5
# %bb.8:                                # %_Z15sumMatrixOnHostPiS_S_ii.exit
	movq	%r13, 72(%rsp)                  # 8-byte Spill
	movabsq	$4294968320, %r13               # imm = 0x100000400
	leaq	32(%rsp), %rbp
	movl	$4194304, %esi                  # imm = 0x400000
	movq	%rbp, %rdi
	callq	hipMalloc
	leaq	24(%rsp), %r12
	movl	$4194304, %esi                  # imm = 0x400000
	movq	%r12, %rdi
	callq	hipMalloc
	movq	(%rbp), %rdi
	movl	$4194304, %edx                  # imm = 0x400000
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r12), %rdi
	movl	$4194304, %edx                  # imm = 0x400000
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	leaq	16(%rsp), %rdi
	movl	$4194304, %esi                  # imm = 0x400000
	callq	hipMalloc
	callq	hipDeviceSynchronize
	leaq	56(%rsp), %r12
	movq	%r12, %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	cvtsi2sdq	(%r12), %xmm0
	cvtsi2sdq	8(%r12), %xmm1
	mulsd	.LCPI8_0(%rip), %xmm1
	addsd	%xmm0, %xmm1
	movsd	%xmm1, 8(%rsp)                  # 8-byte Spill
	movq	%r13, %rdi
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB8_10
# %bb.9:
	movq	32(%rsp), %rdi
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdx
	movl	$1024, %ecx                     # imm = 0x400
	movl	$1024, %r8d                     # imm = 0x400
	callq	_Z23__device_stub__MatAdd1DPiS_S_ii
.LBB8_10:
	callq	hipDeviceSynchronize
	leaq	56(%rsp), %r12
	movq	%r12, %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	xorps	%xmm1, %xmm1
	cvtsi2sdq	(%r12), %xmm1
	xorps	%xmm0, %xmm0
	cvtsi2sdq	8(%r12), %xmm0
	mulsd	.LCPI8_0(%rip), %xmm0
	addsd	%xmm1, %xmm0
	subsd	8(%rsp), %xmm0                  # 8-byte Folded Reload
	movl	$.L.str.3, %edi
	movl	$1024, %esi                     # imm = 0x400
	movl	$1024, %edx                     # imm = 0x400
	movb	$1, %al
	callq	printf
	movq	16(%rsp), %rsi
	movl	$4194304, %edx                  # imm = 0x400000
	movq	%r15, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	72(%rsp), %rbp                  # 8-byte Reload
	movq	%rbp, %rdi
	movq	%r15, %rsi
	movl	$1048576, %edx                  # imm = 0x100000
	callq	_Z11checkResultPiS_i
	movq	16(%rsp), %rdi
	callq	hipFree
	leaq	80(%rsp), %rdi
	movl	$4194304, %esi                  # imm = 0x400000
	callq	hipMalloc
	callq	hipDeviceSynchronize
	leaq	56(%rsp), %r12
	movq	%r12, %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	xorps	%xmm0, %xmm0
	cvtsi2sdq	(%r12), %xmm0
	xorps	%xmm1, %xmm1
	cvtsi2sdq	8(%r12), %xmm1
	mulsd	.LCPI8_0(%rip), %xmm1
	addsd	%xmm0, %xmm1
	movsd	%xmm1, 8(%rsp)                  # 8-byte Spill
	movabsq	$274877906976, %rdi             # imm = 0x4000000020
	movabsq	$68719476768, %rdx              # imm = 0x1000000020
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB8_12
# %bb.11:
	movq	32(%rsp), %rdi
	movq	24(%rsp), %rsi
	movq	80(%rsp), %rdx
	movl	$1024, %ecx                     # imm = 0x400
	movl	$1024, %r8d                     # imm = 0x400
	callq	_Z23__device_stub__MatAdd2DPiS_S_ii
.LBB8_12:
	callq	hipDeviceSynchronize
	leaq	56(%rsp), %r12
	movq	%r12, %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	xorps	%xmm1, %xmm1
	cvtsi2sdq	(%r12), %xmm1
	xorps	%xmm0, %xmm0
	cvtsi2sdq	8(%r12), %xmm0
	movsd	.LCPI8_0(%rip), %xmm2           # xmm2 = mem[0],zero
	mulsd	%xmm2, %xmm0
	addsd	%xmm1, %xmm0
	subsd	8(%rsp), %xmm0                  # 8-byte Folded Reload
	movl	$.L.str.4, %edi
	movl	$32, %esi
	movl	$64, %edx
	movl	$32, %ecx
	movl	$16, %r8d
	movb	$1, %al
	callq	printf
	movq	16(%rsp), %rsi
	movl	$4194304, %edx                  # imm = 0x400000
	movq	%r15, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	%rbp, %rdi
	movq	%r15, %rsi
	movl	$1048576, %edx                  # imm = 0x100000
	callq	_Z11checkResultPiS_i
	movq	16(%rsp), %rdi
	callq	hipFree
	leaq	48(%rsp), %rdi
	movl	$4194304, %esi                  # imm = 0x400000
	callq	hipMalloc
	callq	hipDeviceSynchronize
	leaq	56(%rsp), %r12
	movq	%r12, %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	xorps	%xmm0, %xmm0
	cvtsi2sdq	(%r12), %xmm0
	xorps	%xmm1, %xmm1
	cvtsi2sdq	8(%r12), %xmm1
	mulsd	.LCPI8_0(%rip), %xmm1
	addsd	%xmm0, %xmm1
	movsd	%xmm1, 8(%rsp)                  # 8-byte Spill
	leaq	-1016(%r13), %rdi
	leaq	-896(%r13), %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB8_14
# %bb.13:
	movq	32(%rsp), %rdi
	movq	24(%rsp), %rsi
	movq	48(%rsp), %rdx
	movl	$1024, %ecx                     # imm = 0x400
	movl	$1024, %r8d                     # imm = 0x400
	callq	_Z25__device_stub__MatAdd1D1DPiS_S_ii
.LBB8_14:
	callq	hipDeviceSynchronize
	leaq	56(%rsp), %r12
	movq	%r12, %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	xorps	%xmm1, %xmm1
	cvtsi2sdq	(%r12), %xmm1
	xorps	%xmm0, %xmm0
	cvtsi2sdq	8(%r12), %xmm0
	mulsd	.LCPI8_0(%rip), %xmm0
	addsd	%xmm1, %xmm0
	subsd	8(%rsp), %xmm0                  # 8-byte Folded Reload
	movl	$.L.str.5, %edi
	movl	$8, %esi
	movl	$1, %edx
	movl	$128, %ecx
	movl	$1, %r8d
	movb	$1, %al
	callq	printf
	movq	48(%rsp), %rsi
	movl	$4194304, %edx                  # imm = 0x400000
	movq	%r15, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	%rbp, %rdi
	movq	%r15, %rsi
	movl	$1048576, %edx                  # imm = 0x100000
	callq	_Z11checkResultPiS_i
	movq	48(%rsp), %rdi
	callq	hipFree
	leaq	40(%rsp), %rdi
	movl	$4194304, %esi                  # imm = 0x400000
	callq	hipMalloc
	callq	hipDeviceSynchronize
	leaq	56(%rsp), %r12
	movq	%r12, %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	movq	(%r12), %rbp
	movq	8(%r12), %r12
	addq	$-768, %r13                     # imm = 0xFD00
	movabsq	$4398046511108, %rdi            # imm = 0x40000000004
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB8_16
# %bb.15:
	movq	32(%rsp), %rdi
	movq	24(%rsp), %rsi
	movq	40(%rsp), %rdx
	movl	$1024, %ecx                     # imm = 0x400
	movl	$1024, %r8d                     # imm = 0x400
	callq	_Z25__device_stub__MatAdd2D1DPiS_S_ii
.LBB8_16:
	xorps	%xmm0, %xmm0
	cvtsi2sd	%r12, %xmm0
	movsd	.LCPI8_0(%rip), %xmm1           # xmm1 = mem[0],zero
	mulsd	%xmm1, %xmm0
	xorps	%xmm1, %xmm1
	cvtsi2sd	%rbp, %xmm1
	addsd	%xmm0, %xmm1
	movsd	%xmm1, 8(%rsp)                  # 8-byte Spill
	callq	hipDeviceSynchronize
	leaq	56(%rsp), %r12
	movq	%r12, %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	xorps	%xmm1, %xmm1
	cvtsi2sdq	(%r12), %xmm1
	xorps	%xmm0, %xmm0
	cvtsi2sdq	8(%r12), %xmm0
	mulsd	.LCPI8_0(%rip), %xmm0
	addsd	%xmm1, %xmm0
	subsd	8(%rsp), %xmm0                  # 8-byte Folded Reload
	movl	$.L.str.6, %edi
	movl	$4, %esi
	movl	$1024, %edx                     # imm = 0x400
	movl	$256, %ecx                      # imm = 0x100
	movl	$1, %r8d
	movb	$1, %al
	callq	printf
	movq	40(%rsp), %rsi
	movl	$4194304, %edx                  # imm = 0x400000
	movq	%r15, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	72(%rsp), %rdi                  # 8-byte Reload
	movq	%r15, %rsi
	movl	$1048576, %edx                  # imm = 0x100000
	callq	_Z11checkResultPiS_i
	movq	40(%rsp), %rdi
	callq	hipFree
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	%rbx, %rdi
	callq	free
	movq	%r14, %rdi
	callq	free
	movq	%r15, %rdi
	callq	free
	xorl	%eax, %eax
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end8:
	.size	main, .Lfunc_end8-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB9_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB9_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z8MatAdd1DPiS_S_ii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z8MatAdd2DPiS_S_ii, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10MatAdd1D1DPiS_S_ii, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10MatAdd2D1DPiS_S_ii, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end9:
	.size	__hip_module_ctor, .Lfunc_end9-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB10_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB10_2:
	retq
.Lfunc_end10:
	.size	__hip_module_dtor, .Lfunc_end10-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z8MatAdd1DPiS_S_ii,@object     # @_Z8MatAdd1DPiS_S_ii
	.section	.rodata,"a",@progbits
	.globl	_Z8MatAdd1DPiS_S_ii
	.p2align	3, 0x0
_Z8MatAdd1DPiS_S_ii:
	.quad	_Z23__device_stub__MatAdd1DPiS_S_ii
	.size	_Z8MatAdd1DPiS_S_ii, 8

	.type	_Z8MatAdd2DPiS_S_ii,@object     # @_Z8MatAdd2DPiS_S_ii
	.globl	_Z8MatAdd2DPiS_S_ii
	.p2align	3, 0x0
_Z8MatAdd2DPiS_S_ii:
	.quad	_Z23__device_stub__MatAdd2DPiS_S_ii
	.size	_Z8MatAdd2DPiS_S_ii, 8

	.type	_Z10MatAdd1D1DPiS_S_ii,@object  # @_Z10MatAdd1D1DPiS_S_ii
	.globl	_Z10MatAdd1D1DPiS_S_ii
	.p2align	3, 0x0
_Z10MatAdd1D1DPiS_S_ii:
	.quad	_Z25__device_stub__MatAdd1D1DPiS_S_ii
	.size	_Z10MatAdd1D1DPiS_S_ii, 8

	.type	_Z10MatAdd2D1DPiS_S_ii,@object  # @_Z10MatAdd2D1DPiS_S_ii
	.globl	_Z10MatAdd2D1DPiS_S_ii
	.p2align	3, 0x0
_Z10MatAdd2D1DPiS_S_ii:
	.quad	_Z25__device_stub__MatAdd2D1DPiS_S_ii
	.size	_Z10MatAdd2D1DPiS_S_ii, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"host %f gpu %f "
	.size	.L.str, 16

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"MattAdd1D <<<(%d, %d)>>> elapsed %f ms\n"
	.size	.L.str.3, 40

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"MattAdd2D <<<(%d, %d), (%d, %d)>>> elapsed %f ms\n"
	.size	.L.str.4, 50

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"MatAdd1D1D <<<(%d, %d), (%d, %d)>>> elapsed %f ms\n"
	.size	.L.str.5, 51

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"MatAdd2D1D <<<(%d, %d), (%d, %d)>>> elapsed %f ms\n"
	.size	.L.str.6, 51

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z8MatAdd1DPiS_S_ii"
	.size	.L__unnamed_1, 20

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z8MatAdd2DPiS_S_ii"
	.size	.L__unnamed_2, 20

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z10MatAdd1D1DPiS_S_ii"
	.size	.L__unnamed_3, 23

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"_Z10MatAdd2D1DPiS_S_ii"
	.size	.L__unnamed_4, 23

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"Arrays do not match.\n"
	.size	.Lstr, 22

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"Started succesfylly"
	.size	.Lstr.1, 20

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z23__device_stub__MatAdd1DPiS_S_ii
	.addrsig_sym _Z23__device_stub__MatAdd2DPiS_S_ii
	.addrsig_sym _Z25__device_stub__MatAdd1D1DPiS_S_ii
	.addrsig_sym _Z25__device_stub__MatAdd2D1DPiS_S_ii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z8MatAdd1DPiS_S_ii
	.addrsig_sym _Z8MatAdd2DPiS_S_ii
	.addrsig_sym _Z10MatAdd1D1DPiS_S_ii
	.addrsig_sym _Z10MatAdd2D1DPiS_S_ii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z8MatAdd1DPiS_S_ii     ; -- Begin function _Z8MatAdd1DPiS_S_ii
	.globl	_Z8MatAdd1DPiS_S_ii
	.p2align	8
	.type	_Z8MatAdd1DPiS_S_ii,@function
_Z8MatAdd1DPiS_S_ii:                    ; @_Z8MatAdd1DPiS_S_ii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x18
	v_bfe_u32 v1, v0, 10, 10
	v_and_b32_e32 v0, 0x3ff, v0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s4, s2, 16
	s_and_b32 s2, s2, 0xffff
	v_mad_u64_u32 v[2:3], null, s15, s4, v[1:2]
	s_load_b128 s[4:7], s[0:1], 0x0
	s_mul_i32 s14, s14, s2
	s_load_b64 s[0:1], s[0:1], 0x10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v1, v2, s3
	v_add3_u32 v0, s14, v0, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	global_load_b32 v2, v[2:3], off
	global_load_b32 v3, v[4:5], off
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v2, v3, v2
	global_store_b32 v[0:1], v2, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z8MatAdd1DPiS_S_ii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z8MatAdd1DPiS_S_ii, .Lfunc_end0-_Z8MatAdd1DPiS_S_ii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 204
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z8MatAdd2DPiS_S_ii     ; -- Begin function _Z8MatAdd2DPiS_S_ii
	.globl	_Z8MatAdd2DPiS_S_ii
	.p2align	8
	.type	_Z8MatAdd2DPiS_S_ii,@function
_Z8MatAdd2DPiS_S_ii:                    ; @_Z8MatAdd2DPiS_S_ii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b64 s[4:5], s[0:1], 0x18
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[0:1], null, s14, s2, v[2:3]
	v_mad_u64_u32 v[1:2], null, s15, s3, v[3:4]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e32 vcc_lo, s4, v0
	v_cmp_gt_i32_e64 s2, s5, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, vcc_lo, s2
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB1_2
; %bb.1:
	s_load_b128 s[8:11], s[0:1], 0x0
	v_mad_u64_u32 v[2:3], null, v1, s4, v[0:1]
	s_load_b64 s[0:1], s[0:1], 0x10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[0:1], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s8, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, s9, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s10, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s11, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	global_load_b32 v2, v[2:3], off
	global_load_b32 v3, v[4:5], off
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v2, v3, v2
	global_store_b32 v[0:1], v2, off
.LBB1_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z8MatAdd2DPiS_S_ii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z8MatAdd2DPiS_S_ii, .Lfunc_end1-_Z8MatAdd2DPiS_S_ii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 232
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z10MatAdd1D1DPiS_S_ii  ; -- Begin function _Z10MatAdd1D1DPiS_S_ii
	.globl	_Z10MatAdd1D1DPiS_S_ii
	.p2align	8
	.type	_Z10MatAdd1D1DPiS_S_ii,@function
_Z10MatAdd1D1DPiS_S_ii:                 ; @_Z10MatAdd1D1DPiS_S_ii
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x2c
	s_load_b64 s[2:3], s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_cmp_gt_i32 s3, 0
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	s_cselect_b32 s4, -1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_gt_u32_e32 vcc_lo, s2, v1
	s_and_b32 s4, vcc_lo, s4
	s_and_saveexec_b32 s5, s4
	s_cbranch_execz .LBB2_3
; %bb.1:                                ; %.lr.ph.preheader
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
.LBB2_2:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	v_ashrrev_i32_e32 v2, 31, v1
	s_add_i32 s3, s3, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_cmp_lg_u32 s3, 0
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	v_add_nc_u32_e32 v1, s2, v1
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v4, vcc_lo, s4, v2
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v3, vcc_lo
	v_add_co_u32 v6, vcc_lo, s6, v2
	v_add_co_ci_u32_e32 v7, vcc_lo, s7, v3, vcc_lo
	v_add_co_u32 v2, vcc_lo, s0, v2
	global_load_b32 v0, v[4:5], off
	global_load_b32 v4, v[6:7], off
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v0, v4, v0
	global_store_b32 v[2:3], v0, off
	s_cbranch_scc1 .LBB2_2
.LBB2_3:                                ; %.loopexit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10MatAdd1D1DPiS_S_ii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z10MatAdd1D1DPiS_S_ii, .Lfunc_end2-_Z10MatAdd1D1DPiS_S_ii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 208
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z10MatAdd2D1DPiS_S_ii  ; -- Begin function _Z10MatAdd2D1DPiS_S_ii
	.globl	_Z10MatAdd2D1DPiS_S_ii
	.p2align	8
	.type	_Z10MatAdd2D1DPiS_S_ii,@function
_Z10MatAdd2D1DPiS_S_ii:                 ; @_Z10MatAdd2D1DPiS_S_ii
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x2c
	s_load_b64 s[2:3], s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_cmp_lt_u32 s15, s3
	v_mad_u64_u32 v[1:2], null, s14, s4, v[0:1]
	s_cselect_b32 s3, -1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_gt_u32_e32 vcc_lo, s2, v1
	s_and_b32 s3, s3, vcc_lo
	s_and_saveexec_b32 s4, s3
	s_cbranch_execz .LBB3_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, s15, s2, v[1:2]
	v_mov_b32_e32 v3, 0
	s_load_b64 s[0:1], s[0:1], 0x10
	v_lshlrev_b64 v[0:1], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	global_load_b32 v2, v[2:3], off
	global_load_b32 v3, v[4:5], off
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v2, v3, v2
	global_store_b32 v[0:1], v2, off
.LBB3_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10MatAdd2D1DPiS_S_ii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end3:
	.size	_Z10MatAdd2D1DPiS_S_ii, .Lfunc_end3-_Z10MatAdd2D1DPiS_S_ii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 196
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z8MatAdd1DPiS_S_ii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z8MatAdd1DPiS_S_ii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     6
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z8MatAdd2DPiS_S_ii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z8MatAdd2DPiS_S_ii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     6
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z10MatAdd1D1DPiS_S_ii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z10MatAdd1D1DPiS_S_ii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     8
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z10MatAdd2D1DPiS_S_ii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z10MatAdd2D1DPiS_S_ii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     6
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
