#include <stdlib.h>
#include <stdio.h>


#define TILE_DIM 32 

__global__ void tileMatMul(float* matA, float* matB, float* matC, int aRows,
      int aCols, 
      int bRows, int bCols, int cRows, int cCols)
{
   int Row = blockIdx.y * TILE_DIM + threadIdx.y;
   int Col = blockIdx.x * TILE_DIM + threadIdx.x;

   __shared__ float sharedMatA[TILE_DIM][TILE_DIM];
   __shared__ float sharedMatB[TILE_DIM][TILE_DIM];

   float cResultValue = 0.0;

   for(int i = 0; i < (aCols-1)/TILE_DIM+1; ++i)
   {
      if(Row < aRows && i*TILE_DIM+threadIdx.x < aCols)
      {
         sharedMatA[threadIdx.y][threadIdx.x] = matA[Row*aCols +
            i*TILE_DIM+threadIdx.x];
      }
      else
         sharedMatA[threadIdx.y][threadIdx.x] = 0.0;

      if(Col < bCols && i*TILE_DIM+threadIdx.y < cRows)
         sharedMatB[threadIdx.y][threadIdx.x] =
            matB[(i*TILE_DIM+threadIdx.y)*bCols+Col];
      else
         sharedMatB[threadIdx.y][threadIdx.x] = 0.0;

      __syncthreads();

      for(int j = 0; j < TILE_DIM; ++j)
         cResultValue += sharedMatA[threadIdx.y][j] *
            sharedMatB[j][threadIdx.x];
       
       __syncthreads();
   }

   if(Row < cRows && Col < cCols)
      matC[Row*cCols+Col] = cResultValue;

}


int main()
{
   float *hMatA, *hMatB, *hMatC;
   float *dMatA, *dMatB, *dMatC;

   int aRows = 512;
   int aCols = 512; 
   int bRows = 512;
   int bCols = 512; 
   int cRows, cCols;

   hMatA = (float *) malloc(sizeof(float)*aRows*aCols);
   hMatB = (float *) malloc(sizeof(float)*bRows*bCols);

   for(int i = 0; i < aRows*aCols; ++i)
   {
      hMatA[i] = (float)rand()/(float)(RAND_MAX/1.0);
      hMatB[i] = (float)rand()/(float)(RAND_MAX/1.0);
   }

   cRows = aRows;
   cCols = bCols;

   hMatC = (float *) malloc(sizeof(float)*cRows*cCols);

   cudaMalloc((void**)&dMatA, sizeof(float)*aRows*aCols);
   cudaMalloc((void**)&dMatB, sizeof(float)*bRows*bCols);
   cudaMalloc((void**)&dMatC, sizeof(float)*cRows*cCols);

   cudaMemcpy(dMatA, hMatA, sizeof(float)*aRows*aCols, cudaMemcpyHostToDevice);
   cudaMemcpy(dMatB, hMatB, sizeof(float)*bRows*bCols, cudaMemcpyHostToDevice);

   dim3 dimGrid((cCols - 1)/TILE_DIM+1, (cRows - 1)/TILE_DIM+1, 1);
   dim3 dimBlock(TILE_DIM, TILE_DIM, 1);

   tileMatMul<<<dimGrid,dimBlock>>>(dMatA, dMatB, dMatC, aRows, aCols, bRows,
         bCols, cRows, cCols);

   cudaThreadSynchronize();

   cudaMemcpy(hMatC, dMatC, sizeof(float)*cRows*cCols, cudaMemcpyDeviceToHost);

   for(int q = 0; q < 100; ++q)
   {
      printf("Result matrix #%d: %f\n",q, hMatC[q]);
   }

   cudaFree(dMatA);
   cudaFree(dMatB);
   cudaFree(dMatC);

   free(hMatA);
   free(hMatB);
   free(hMatC);

   return 0;

}

	.file	"tmpxft_002e255b_00000000-6_lab4_3.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2030:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z40__device_stub__Z10tileMatMulPfS_S_iiiiiiPfS_S_iiiiii
	.type	_Z40__device_stub__Z10tileMatMulPfS_S_iiiiiiPfS_S_iiiiii, @function
_Z40__device_stub__Z10tileMatMulPfS_S_iiiiiiPfS_S_iiiiii:
.LFB2052:
	.cfi_startproc
	endbr64
	subq	$200, %rsp
	.cfi_def_cfa_offset 208
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	56(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movl	%r9d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 184(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	208(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	216(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	224(%rsp), %rax
	movq	%rax, 176(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	56(%rsp)
	.cfi_def_cfa_offset 216
	leaq	_Z10tileMatMulPfS_S_iiiiii(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 224
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 216
	popq	%rdx
	.cfi_def_cfa_offset 208
.L2:
	movq	184(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$200, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2052:
	.size	_Z40__device_stub__Z10tileMatMulPfS_S_iiiiiiPfS_S_iiiiii, .-_Z40__device_stub__Z10tileMatMulPfS_S_iiiiiiPfS_S_iiiiii
	.globl	_Z10tileMatMulPfS_S_iiiiii
	.type	_Z10tileMatMulPfS_S_iiiiii, @function
_Z10tileMatMulPfS_S_iiiiii:
.LFB2053:
	.cfi_startproc
	endbr64
	jmp	_Z40__device_stub__Z10tileMatMulPfS_S_iiiiiiPfS_S_iiiiii
	.cfi_endproc
.LFE2053:
	.size	_Z10tileMatMulPfS_S_iiiiii, .-_Z10tileMatMulPfS_S_iiiiii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"Result matrix #%d: %f\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movl	$1048576, %edi
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	xorl	%ebx, %ebx
	subq	$64, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	call	malloc@PLT
	movl	$1048576, %edi
	movq	%rax, %r12
	call	malloc@PLT
	movq	%rax, %rbp
.L9:
	call	rand@PLT
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC0(%rip), %xmm0
	movss	%xmm0, (%r12,%rbx)
	call	rand@PLT
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC0(%rip), %xmm0
	movss	%xmm0, 0(%rbp,%rbx)
	addq	$4, %rbx
	cmpq	$1048576, %rbx
	jne	.L9
	movl	$1048576, %edi
	call	malloc@PLT
	leaq	8(%rsp), %rdi
	movl	$1048576, %esi
	movq	%rax, %rbx
	call	cudaMalloc@PLT
	leaq	16(%rsp), %rdi
	movl	$1048576, %esi
	call	cudaMalloc@PLT
	leaq	24(%rsp), %rdi
	movl	$1048576, %esi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movq	%r12, %rsi
	movl	$1048576, %edx
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	movl	$1048576, %edx
	call	cudaMemcpy@PLT
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	movabsq	$137438953504, %rdx
	movl	$1, %esi
	movabsq	$68719476752, %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L10
	pushq	%rax
	.cfi_def_cfa_offset 120
	movl	$512, %r9d
	movl	$512, %r8d
	movl	$512, %ecx
	pushq	$512
	.cfi_def_cfa_offset 128
	pushq	$512
	.cfi_def_cfa_offset 136
	pushq	$512
	.cfi_def_cfa_offset 144
	movq	56(%rsp), %rdx
	movq	48(%rsp), %rsi
	movq	40(%rsp), %rdi
	call	_Z40__device_stub__Z10tileMatMulPfS_S_iiiiiiPfS_S_iiiiii
	addq	$32, %rsp
	.cfi_def_cfa_offset 112
.L10:
	call	cudaThreadSynchronize@PLT
	movq	24(%rsp), %rsi
	movq	%rbx, %rdi
	xorl	%r13d, %r13d
	movl	$2, %ecx
	movl	$1048576, %edx
	leaq	.LC1(%rip), %r14
	call	cudaMemcpy@PLT
.L11:
	movl	%r13d, %edx
	cvtss2sd	(%rbx,%r13,4), %xmm0
	movq	%r14, %rsi
	movb	$1, %al
	movl	$2, %edi
	incq	%r13
	call	__printf_chk@PLT
	cmpq	$100, %r13
	jne	.L11
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	%r12, %rdi
	call	free@PLT
	movq	%rbp, %rdi
	call	free@PLT
	movq	%rbx, %rdi
	call	free@PLT
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L12
	call	__stack_chk_fail@PLT
.L12:
	addq	$64, %rsp
	.cfi_def_cfa_offset 48
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	main, .-main
	.section	.rodata.str1.1
.LC2:
	.string	"_Z10tileMatMulPfS_S_iiiiii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2055:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC2(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z10tileMatMulPfS_S_iiiiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2055:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC0:
	.long	805306368
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <stdlib.h>
#include <stdio.h>


#define TILE_DIM 32 

__global__ void tileMatMul(float* matA, float* matB, float* matC, int aRows,
      int aCols, 
      int bRows, int bCols, int cRows, int cCols)
{
   int Row = blockIdx.y * TILE_DIM + threadIdx.y;
   int Col = blockIdx.x * TILE_DIM + threadIdx.x;

   __shared__ float sharedMatA[TILE_DIM][TILE_DIM];
   __shared__ float sharedMatB[TILE_DIM][TILE_DIM];

   float cResultValue = 0.0;

   for(int i = 0; i < (aCols-1)/TILE_DIM+1; ++i)
   {
      if(Row < aRows && i*TILE_DIM+threadIdx.x < aCols)
      {
         sharedMatA[threadIdx.y][threadIdx.x] = matA[Row*aCols +
            i*TILE_DIM+threadIdx.x];
      }
      else
         sharedMatA[threadIdx.y][threadIdx.x] = 0.0;

      if(Col < bCols && i*TILE_DIM+threadIdx.y < cRows)
         sharedMatB[threadIdx.y][threadIdx.x] =
            matB[(i*TILE_DIM+threadIdx.y)*bCols+Col];
      else
         sharedMatB[threadIdx.y][threadIdx.x] = 0.0;

      __syncthreads();

      for(int j = 0; j < TILE_DIM; ++j)
         cResultValue += sharedMatA[threadIdx.y][j] *
            sharedMatB[j][threadIdx.x];
       
       __syncthreads();
   }

   if(Row < cRows && Col < cCols)
      matC[Row*cCols+Col] = cResultValue;

}


int main()
{
   float *hMatA, *hMatB, *hMatC;
   float *dMatA, *dMatB, *dMatC;

   int aRows = 512;
   int aCols = 512; 
   int bRows = 512;
   int bCols = 512; 
   int cRows, cCols;

   hMatA = (float *) malloc(sizeof(float)*aRows*aCols);
   hMatB = (float *) malloc(sizeof(float)*bRows*bCols);

   for(int i = 0; i < aRows*aCols; ++i)
   {
      hMatA[i] = (float)rand()/(float)(RAND_MAX/1.0);
      hMatB[i] = (float)rand()/(float)(RAND_MAX/1.0);
   }

   cRows = aRows;
   cCols = bCols;

   hMatC = (float *) malloc(sizeof(float)*cRows*cCols);

   hipMalloc((void**)&dMatA, sizeof(float)*aRows*aCols);
   hipMalloc((void**)&dMatB, sizeof(float)*bRows*bCols);
   hipMalloc((void**)&dMatC, sizeof(float)*cRows*cCols);

   hipMemcpy(dMatA, hMatA, sizeof(float)*aRows*aCols, hipMemcpyHostToDevice);
   hipMemcpy(dMatB, hMatB, sizeof(float)*bRows*bCols, hipMemcpyHostToDevice);

   dim3 dimGrid((cCols - 1)/TILE_DIM+1, (cRows - 1)/TILE_DIM+1, 1);
   dim3 dimBlock(TILE_DIM, TILE_DIM, 1);

   tileMatMul<<<dimGrid,dimBlock>>>(dMatA, dMatB, dMatC, aRows, aCols, bRows,
         bCols, cRows, cCols);

   hipDeviceSynchronize();

   hipMemcpy(hMatC, dMatC, sizeof(float)*cRows*cCols, hipMemcpyDeviceToHost);

   for(int q = 0; q < 100; ++q)
   {
      printf("Result matrix #%d: %f\n",q, hMatC[q]);
   }

   hipFree(dMatA);
   hipFree(dMatB);
   hipFree(dMatC);

   free(hMatA);
   free(hMatB);
   free(hMatC);

   return 0;

}

	.text
	.file	"lab4_3.hip"
	.globl	_Z25__device_stub__tileMatMulPfS_S_iiiiii # -- Begin function _Z25__device_stub__tileMatMulPfS_S_iiiiii
	.type	_Z25__device_stub__tileMatMulPfS_S_iiiiii,@function
_Z25__device_stub__tileMatMulPfS_S_iiiiii: # @_Z25__device_stub__tileMatMulPfS_S_iiiiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$176, %rsp
	.cfi_def_cfa_offset 224
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	20(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	16(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	224(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	232(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	240(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10tileMatMulPfS_S_iiiiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$192, %rsp
	.cfi_adjust_cfa_offset -192
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z25__device_stub__tileMatMulPfS_S_iiiiii, .Lfunc_end0-_Z25__device_stub__tileMatMulPfS_S_iiiiii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI1_0:
	.long	0x30000000                      # float 4.65661287E-10
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$32, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	$1048576, %edi                  # imm = 0x100000
	callq	malloc
	movq	%rax, %rbx
	movl	$1048576, %edi                  # imm = 0x100000
	callq	malloc
	movq	%rax, %r14
	xorl	%r15d, %r15d
.LBB1_1:                                # =>This Inner Loop Header: Depth=1
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	movss	.LCPI1_0(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	mulss	%xmm1, %xmm0
	movss	%xmm0, (%rbx,%r15,4)
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	.LCPI1_0(%rip), %xmm0
	movss	%xmm0, (%r14,%r15,4)
	incq	%r15
	cmpq	$262144, %r15                   # imm = 0x40000
	jne	.LBB1_1
# %bb.2:
	movl	$1048576, %edi                  # imm = 0x100000
	callq	malloc
	movq	%rax, %r15
	leaq	24(%rsp), %r12
	movl	$1048576, %esi                  # imm = 0x100000
	movq	%r12, %rdi
	callq	hipMalloc
	leaq	16(%rsp), %r13
	movl	$1048576, %esi                  # imm = 0x100000
	movq	%r13, %rdi
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	movl	$1048576, %esi                  # imm = 0x100000
	callq	hipMalloc
	movq	(%r12), %rdi
	movl	$1048576, %edx                  # imm = 0x100000
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r13), %rdi
	movl	$1048576, %edx                  # imm = 0x100000
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movabsq	$68719476752, %rdi              # imm = 0x1000000010
	movabsq	$137438953504, %rdx             # imm = 0x2000000020
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_4
# %bb.3:
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movl	$512, %eax                      # imm = 0x200
	movl	$512, %ecx                      # imm = 0x200
	movl	$512, %r8d                      # imm = 0x200
	movl	$512, %r9d                      # imm = 0x200
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	callq	_Z25__device_stub__tileMatMulPfS_S_iiiiii
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
.LBB1_4:
	callq	hipDeviceSynchronize
	movq	8(%rsp), %rsi
	movl	$1048576, %edx                  # imm = 0x100000
	movq	%r15, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	xorl	%r12d, %r12d
.LBB1_5:                                # =>This Inner Loop Header: Depth=1
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r15,%r12,4), %xmm0
	movl	$.L.str, %edi
	movl	%r12d, %esi
	movb	$1, %al
	callq	printf
	incq	%r12
	cmpq	$100, %r12
	jne	.LBB1_5
# %bb.6:
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	%rbx, %rdi
	callq	free
	movq	%r14, %rdi
	callq	free
	movq	%r15, %rdi
	callq	free
	xorl	%eax, %eax
	addq	$32, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10tileMatMulPfS_S_iiiiii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z10tileMatMulPfS_S_iiiiii,@object # @_Z10tileMatMulPfS_S_iiiiii
	.section	.rodata,"a",@progbits
	.globl	_Z10tileMatMulPfS_S_iiiiii
	.p2align	3, 0x0
_Z10tileMatMulPfS_S_iiiiii:
	.quad	_Z25__device_stub__tileMatMulPfS_S_iiiiii
	.size	_Z10tileMatMulPfS_S_iiiiii, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Result matrix #%d: %f\n"
	.size	.L.str, 23

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z10tileMatMulPfS_S_iiiiii"
	.size	.L__unnamed_1, 27

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z25__device_stub__tileMatMulPfS_S_iiiiii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z10tileMatMulPfS_S_iiiiii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z10tileMatMulPfS_S_iiiiii ; -- Begin function _Z10tileMatMulPfS_S_iiiiii
	.globl	_Z10tileMatMulPfS_S_iiiiii
	.p2align	8
	.type	_Z10tileMatMulPfS_S_iiiiii,@function
_Z10tileMatMulPfS_S_iiiiii:             ; @_Z10tileMatMulPfS_S_iiiiii
; %bb.0:
	s_clause 0x2
	s_load_b256 s[4:11], s[0:1], 0x0
	s_load_b64 s[2:3], s[0:1], 0x24
	s_load_b32 s12, s[0:1], 0x2c
	v_bfe_u32 v4, v0, 10, 10
	v_dual_mov_b32 v6, 0 :: v_dual_and_b32 v5, 0x3ff, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshl_add_u32 v3, s15, 5, v4
	v_lshl_add_u32 v0, s14, 5, v5
	s_waitcnt lgkmcnt(0)
	s_cmpk_lt_i32 s11, 0xffe2
	s_cbranch_scc1 .LBB0_14
; %bb.1:                                ; %.lr.ph
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v5
	s_add_i32 s0, s11, -1
	v_dual_mov_b32 v6, 0 :: v_dual_lshlrev_b32 v7, 7, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_or_b32_e32 v8, 0x1000, v1
	s_ashr_i32 s1, s0, 31
	v_mul_lo_u32 v10, v3, s11
	s_lshr_b32 s1, s1, 27
	v_cmp_gt_i32_e32 vcc_lo, s10, v3
	s_add_i32 s1, s0, s1
	v_add_nc_u32_e32 v9, v7, v1
	v_cmp_gt_i32_e64 s0, s2, v0
	v_add_nc_u32_e32 v11, v8, v7
	s_ashr_i32 s10, s1, 5
	s_mov_b32 s13, 0
.LBB0_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_11 Depth 2
	v_mov_b32_e32 v1, 0
	s_and_saveexec_b32 s14, vcc_lo
	s_cbranch_execz .LBB0_6
; %bb.3:                                ;   in Loop: Header=BB0_2 Depth=1
	v_lshl_add_u32 v12, s13, 5, v5
	v_mov_b32_e32 v1, 0
	s_mov_b32 s15, exec_lo
	s_delay_alu instid0(VALU_DEP_2)
	v_cmpx_gt_u32_e64 s11, v12
	s_cbranch_execz .LBB0_5
; %bb.4:                                ;   in Loop: Header=BB0_2 Depth=1
	v_add_nc_u32_e32 v1, v12, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[12:13], 2, v[1:2]
	v_add_co_u32 v12, s1, s4, v12
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v13, s1, s5, v13, s1
	global_load_b32 v1, v[12:13], off
.LBB0_5:                                ; %Flow79
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s15
.LBB0_6:                                ;   in Loop: Header=BB0_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s14
	v_mov_b32_e32 v12, 0
	s_waitcnt vmcnt(0)
	ds_store_b32 v9, v1
	s_and_saveexec_b32 s14, s0
	s_cbranch_execz .LBB0_10
; %bb.7:                                ;   in Loop: Header=BB0_2 Depth=1
	v_lshl_add_u32 v1, s13, 5, v4
	v_mov_b32_e32 v12, 0
	s_mov_b32 s15, exec_lo
	s_delay_alu instid0(VALU_DEP_2)
	v_cmpx_gt_u32_e64 s3, v1
	s_cbranch_execz .LBB0_9
; %bb.8:                                ;   in Loop: Header=BB0_2 Depth=1
	v_mad_u64_u32 v[12:13], null, v1, s2, v[0:1]
	v_mov_b32_e32 v13, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[12:13], 2, v[12:13]
	v_add_co_u32 v12, s1, s6, v12
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v13, s1, s7, v13, s1
	global_load_b32 v12, v[12:13], off
.LBB0_9:                                ; %Flow
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s15
.LBB0_10:                               ;   in Loop: Header=BB0_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s14
	v_mov_b32_e32 v1, v8
	s_mov_b32 s1, 0
	s_waitcnt vmcnt(0)
	ds_store_b32 v11, v12
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB0_11:                               ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_add_nc_u32_e32 v12, s1, v7
	s_add_i32 s1, s1, 4
	ds_load_b32 v13, v1
	ds_load_b32 v12, v12
	v_add_nc_u32_e32 v1, 0x80, v1
	s_cmpk_eq_i32 s1, 0x80
	s_waitcnt lgkmcnt(0)
	v_fmac_f32_e32 v6, v12, v13
	s_cbranch_scc0 .LBB0_11
; %bb.12:                               ;   in Loop: Header=BB0_2 Depth=1
	s_add_i32 s1, s13, 1
	s_cmp_eq_u32 s13, s10
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB0_14
; %bb.13:                               ;   in Loop: Header=BB0_2 Depth=1
	s_mov_b32 s13, s1
	s_branch .LBB0_2
.LBB0_14:                               ; %Flow81
	v_cmp_gt_i32_e32 vcc_lo, s3, v3
	v_cmp_gt_i32_e64 s0, s12, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, vcc_lo, s0
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB0_16
; %bb.15:
	v_mad_u64_u32 v[1:2], null, v3, s12, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v2, 31, v1
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s8, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s9, v1, vcc_lo
	global_store_b32 v[0:1], v6, off
.LBB0_16:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10tileMatMulPfS_S_iiiiii
		.amdhsa_group_segment_fixed_size 8192
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 48
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 14
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z10tileMatMulPfS_S_iiiiii, .Lfunc_end0-_Z10tileMatMulPfS_S_iiiiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 584
; NumSgprs: 18
; NumVgprs: 14
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 8192 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 14
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         36
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     by_value
      - .offset:         44
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 8192
    .kernarg_segment_align: 8
    .kernarg_segment_size: 48
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z10tileMatMulPfS_S_iiiiii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z10tileMatMulPfS_S_iiiiii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     14
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
