/**
 * Simple Linear Regression implementation in CUDA
 *
 * @author: Yvo Elling
 * @date: 08-01-21
 */

#include <iostream>
#include <cuda.h>
#include <cstdint>
#include <array>
#include <initializer_list>
#include <time.h>
#include <chrono>
#include <cmath>
#include <limits>

#include "linear_regression.cuh"

#define INPUT_SIZE 46
#define ERROR_DIMENSIONS 3

void linear_regression_cpu(std::array<float, INPUT_SIZE> x, std::array<float, INPUT_SIZE> y, float bias, float intercept) {
	float j_error = std::numeric_limits<float>::max();
	float learning_rate = 0.01;

	while(j_error > 0.13) {
		//array for storing intermediate error levels
		float errors[3] = {0, 0, 0};

		for (int i = 0; i < INPUT_SIZE; ++i) {
			// Predict output based on current bias and intercept
			float y_pred = bias + intercept * x[i];

			// Calculate J for this specific index and store in errors index 0
			errors[0] += 0.5f * pow((y[i] - y_pred), 2);
			// Calculate bias error for this index and store in errors index
			errors[1] += -(y[i] - y_pred);
			// Calculate intercept error for this index
			errors[2] += -(y[i] - y_pred)*x[i];
		}

		// Update bias and intercept based on errors
		float bias_new = bias - learning_rate * errors[1];
		float intercept_new = intercept - learning_rate * errors[2];

		// Update
		bias = bias_new;
		intercept = intercept_new;
		j_error = errors[0];
	}

	std::cout << "CPU Results: Bias = " << bias << " and Intercept: " << intercept << std::endl;
}

int main(int argc, char **argv)
{
	// Total error
	float j_error = std::numeric_limits<float>::max();

	// Determine size of the x and y arrays
	size_t input_size = INPUT_SIZE * sizeof(float);
	size_t error_size = ERROR_DIMENSIONS * sizeof(float);

	// Define the pointers to the x and y arrays with their respective size reserved
	float* h_x = (float*)malloc(input_size);
	float* h_y = (float*)malloc(input_size);
	float* h_bias = (float*)malloc(sizeof(float));
	float* h_intercept = (float*)malloc(sizeof(float));
	float* h_results = (float*)malloc(error_size);

	// Initial values that are used for the linear regression
	std::array<float, INPUT_SIZE> x = {0.00f, 0.22f, 0.24f, 0.33f, 0.37f, 0.44f, 0.44f, 0.57f, 0.93f, 1.00f};
	std::array<float, INPUT_SIZE> y = {0.00f, 0.22f, 0.58f, 0.20f, 0.55f, 0.39f, 0.54f, 0.53f, 1.00f, 0.61f};

	// Compute random starting bias and intercept
	srand(time(NULL));
	float bias = ((float) rand() / (RAND_MAX));
	float intercept = ((float) rand() / (RAND_MAX));
	float init_bias = bias;
	float init_intercept = intercept;

	// Store the address of the x and y arrays into the pointers h_x and h_y (host_x and host_y)
	h_x = &x[0];
	h_y = &y[0];
	h_bias = &bias;
	h_intercept = &intercept;

	// Allocate memory on GPU for the device_x (d_x) and device_y (d_y) of earlier calculated size
	float* d_x; float* d_y; float* d_bias; float* d_intercept; float* d_results;
	cudaMalloc(&d_x, input_size);
	cudaMalloc(&d_y, input_size);
	cudaMalloc(&d_results, error_size);

	// Copy the values stored in pointer h_x and h_y into d_x and d_y
	// Transfer data from CPU memory to GPU memory.
	cudaMemcpy(d_x, h_x, input_size, cudaMemcpyHostToDevice);
	cudaMemcpy(d_y, h_y, input_size, cudaMemcpyHostToDevice);

	// Define stepsize for updating intercept and bias.
	float learning_rate = 0.01;

	//Start timing the procedure
	auto begin_gpu = std::chrono::high_resolution_clock::now();
	while( j_error > 0.13) {
		// ALlocate memory for the pointers to the bias and intercept
		cudaMalloc(&d_bias, sizeof(float));
		cudaMalloc(&d_intercept, sizeof(float));

		// Copy the local value of the bias and intercept to the device memory.
		cudaMemcpy(d_bias, h_bias, sizeof(float), cudaMemcpyHostToDevice);
		cudaMemcpy(d_intercept, h_intercept, sizeof(float), cudaMemcpyHostToDevice);

		// Launch kernel on GPU with pointers to data in GPU memory
		simple_linear_regression<<<1,INPUT_SIZE>>>(d_x, d_y, d_bias, d_intercept, d_results, INPUT_SIZE);

		// Wait for all threads to return
		cudaDeviceSynchronize();

		// Retrieve the GPU out value and store in host memory
		cudaMemcpy(h_results, d_results, error_size, cudaMemcpyDeviceToHost);

		// Check if a CUDA error has occurred.
		cudaError_t err = cudaGetLastError();
		if (err != cudaSuccess) {
			std::cout << "Error: " << cudaGetErrorString(err) << std::endl;
			break;
		}

		// Free memory, on the next iteration we will allocate this memory again.
		cudaFree(d_bias);
		cudaFree(d_intercept);

		// Update bias and intercept based on errors
		float bias_new = bias - learning_rate * h_results[1];
		float intercept_new = intercept - learning_rate * h_results[2];

		// Update
		bias = bias_new;
		intercept = intercept_new;
		j_error = h_results[0];
	}
	//End timing and compute total execution time
	auto end_gpu = std::chrono::high_resolution_clock::now();
	auto elapsed_gpu = std::chrono::duration_cast<std::chrono::nanoseconds>(end_gpu - begin_gpu);

	// Print out latest values for total error, and bias and intercept respective errors
	std::cout << "GPU Results: Bias = " << bias << " and Intercept: " << intercept << std::endl;
	std::cout << "GPU-implementation execution time(ns): " << elapsed_gpu.count() << std::endl;

	//Start measuring execution time of C tasks
	auto begin = std::chrono::high_resolution_clock::now();
	linear_regression_cpu(x, y, init_bias, init_intercept);
	auto end = std::chrono::high_resolution_clock::now();
	auto elapsed = std::chrono::duration_cast<std::chrono::nanoseconds>(end - begin);
	std::cout << "C-implementation execution time(ns): " << elapsed.count() << std::endl;

	// Free memory on GPU
	cudaFree(d_x);
	cudaFree(d_y);

	return 0;
}

	.file	"tmpxft_00215248_00000000-6_main.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3781:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3781:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.align 2
	.type	_ZNSolsEPFRSoS_E.isra.0, @function
_ZNSolsEPFRSoS_E.isra.0:
.LFB4485:
	.cfi_startproc
	jmp	*%rsi
	.cfi_endproc
.LFE4485:
	.size	_ZNSolsEPFRSoS_E.isra.0, .-_ZNSolsEPFRSoS_E.isra.0
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC6:
	.string	"CPU Results: Bias = "
.LC7:
	.string	" and Intercept: "
	.text
	.globl	_Z21linear_regression_cpuSt5arrayIfLm46EES0_ff
	.type	_Z21linear_regression_cpuSt5arrayIfLm46EES0_ff, @function
_Z21linear_regression_cpuSt5arrayIfLm46EES0_ff:
.LFB3774:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movaps	%xmm0, %xmm2
	movsd	.LC5(%rip), %xmm7
	movss	.LC1(%rip), %xmm0
	movsd	.LC2(%rip), %xmm8
	movss	.LC4(%rip), %xmm6
.L4:
	cvtss2sd	%xmm0, %xmm0
	comisd	%xmm7, %xmm0
	jbe	.L10
	xorps	%xmm5, %xmm5
	xorl	%eax, %eax
	movaps	%xmm5, %xmm9
	movaps	%xmm5, %xmm0
.L5:
	movss	32(%rsp,%rax), %xmm10
	cvtss2sd	%xmm0, %xmm0
	movss	216(%rsp,%rax), %xmm4
	addq	$4, %rax
	movaps	%xmm10, %xmm3
	mulss	%xmm1, %xmm3
	addss	%xmm2, %xmm3
	subss	%xmm3, %xmm4
	cvtss2sd	%xmm4, %xmm3
	mulsd	%xmm3, %xmm3
	subss	%xmm4, %xmm9
	mulss	%xmm10, %xmm4
	mulsd	%xmm8, %xmm3
	subss	%xmm4, %xmm5
	addsd	%xmm3, %xmm0
	cvtsd2ss	%xmm0, %xmm0
	cmpq	$184, %rax
	jne	.L5
	mulss	%xmm6, %xmm9
	mulss	%xmm6, %xmm5
	subss	%xmm9, %xmm2
	subss	%xmm5, %xmm1
	jmp	.L4
.L10:
	leaq	.LC6(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	movss	%xmm1, 12(%rsp)
	movss	%xmm2, 8(%rsp)
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movss	8(%rsp), %xmm2
	movq	%rax, %rdi
	cvtss2sd	%xmm2, %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC7(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movss	12(%rsp), %xmm1
	movq	%rax, %rdi
	cvtss2sd	%xmm1, %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	movq	%rax, %rdi
	jmp	_ZNSolsEPFRSoS_E.isra.0
	.cfi_endproc
.LFE3774:
	.size	_Z21linear_regression_cpuSt5arrayIfLm46EES0_ff, .-_Z21linear_regression_cpuSt5arrayIfLm46EES0_ff
	.globl	_Z53__device_stub__Z24simple_linear_regressionPfS_S_S_S_hPfS_S_S_S_h
	.type	_Z53__device_stub__Z24simple_linear_regressionPfS_S_S_S_hPfS_S_S_S_h, @function
_Z53__device_stub__Z24simple_linear_regressionPfS_S_S_S_hPfS_S_S_S_h:
.LFB3803:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	64(%rsp), %rcx
	movq	%r8, 8(%rsp)
	movb	%r9b, 4(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L11
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z24simple_linear_regressionPfS_S_S_S_h(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L11:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L13
	call	__stack_chk_fail@PLT
.L13:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3803:
	.size	_Z53__device_stub__Z24simple_linear_regressionPfS_S_S_S_hPfS_S_S_S_h, .-_Z53__device_stub__Z24simple_linear_regressionPfS_S_S_S_hPfS_S_S_S_h
	.globl	_Z24simple_linear_regressionPfS_S_S_S_h
	.type	_Z24simple_linear_regressionPfS_S_S_S_h, @function
_Z24simple_linear_regressionPfS_S_S_S_h:
.LFB3804:
	.cfi_startproc
	endbr64
	movzbl	%r9b, %r9d
	jmp	_Z53__device_stub__Z24simple_linear_regressionPfS_S_S_S_hPfS_S_S_S_h
	.cfi_endproc
.LFE3804:
	.size	_Z24simple_linear_regressionPfS_S_S_S_h, .-_Z24simple_linear_regressionPfS_S_S_S_h
	.section	.rodata.str1.1
.LC10:
	.string	"Error: "
.LC11:
	.string	"GPU Results: Bias = "
.LC12:
	.string	"GPU-implementation execution time(ns): "
.LC13:
	.string	"C-implementation execution time(ns): "
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3775:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	$12, %edi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$472, %rsp
	.cfi_def_cfa_offset 528
	movq	%fs:40, %rax
	movq	%rax, 456(%rsp)
	xorl	%eax, %eax
	leaq	88(%rsp), %rbp
	leaq	272(%rsp), %r12
	call	malloc@PLT
	leaq	88(%rsp), %rdi
	movl	$46, %ecx
	movabsq	$4500717323109353390, %rdx
	movq	%rax, %rbx
	xorl	%eax, %eax
	rep stosl
	leaq	272(%rsp), %rdi
	movq	%rdx, 92(%rsp)
	movabsq	$4570613191399304069, %rcx
	movabsq	$4520893451678053827, %rdx
	movq	%rcx, 116(%rsp)
	movl	$46, %ecx
	rep stosl
	movq	%rdx, 100(%rsp)
	xorl	%edi, %edi
	movabsq	$4545393031756466094, %rax
	movq	%rax, 276(%rsp)
	movabsq	$4543231305995570381, %rax
	movabsq	$4530981513816262574, %rdx
	movq	%rax, 284(%rsp)
	movabsq	$4542510730750438932, %rax
	movq	%rax, 292(%rsp)
	movabsq	$4575657222465891860, %rax
	movq	%rdx, 108(%rsp)
	movw	$16256, 126(%rsp)
	movq	%rax, 300(%rsp)
	movl	$0x3f1c28f6, 308(%rsp)
	call	time@PLT
	movl	%eax, %edi
	call	srand@PLT
	call	rand@PLT
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC9(%rip), %xmm0
	movss	%xmm0, 16(%rsp)
	call	rand@PLT
	movss	16(%rsp), %xmm4
	leaq	24(%rsp), %rdi
	movl	$184, %esi
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC9(%rip), %xmm0
	movss	%xmm4, 12(%rsp)
	movd	%xmm0, %r15d
	movss	%xmm0, 20(%rsp)
	call	cudaMalloc@PLT
	leaq	32(%rsp), %rdi
	movl	$184, %esi
	call	cudaMalloc@PLT
	leaq	56(%rsp), %rdi
	movl	$12, %esi
	call	cudaMalloc@PLT
	movq	24(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	movl	$184, %edx
	call	cudaMemcpy@PLT
	movq	32(%rsp), %rdi
	movl	$1, %ecx
	movq	%r12, %rsi
	movl	$184, %edx
	call	cudaMemcpy@PLT
	call	_ZNSt6chrono3_V212system_clock3nowEv@PLT
	movss	.LC1(%rip), %xmm0
	movq	%rax, %r13
.L17:
	cvtss2sd	%xmm0, %xmm0
	comisd	.LC5(%rip), %xmm0
	jbe	.L20
	leaq	40(%rsp), %rdi
	movl	$4, %esi
	call	cudaMalloc@PLT
	leaq	48(%rsp), %rdi
	movl	$4, %esi
	call	cudaMalloc@PLT
	movq	40(%rsp), %rdi
	leaq	16(%rsp), %rsi
	movl	$1, %ecx
	movl	$4, %edx
	call	cudaMemcpy@PLT
	movq	48(%rsp), %rdi
	leaq	20(%rsp), %rsi
	movl	$1, %ecx
	movl	$4, %edx
	call	cudaMemcpy@PLT
	movl	$2147483671, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	addq	%rdx, %rdx
	movl	$1, %ecx
	movabsq	$4294967297, %rdi
	movl	$1, %esi
	movq	%rdx, 76(%rsp)
	movl	$1, 84(%rsp)
	movq	%rdi, 64(%rsp)
	movl	$1, 72(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L18
	movq	56(%rsp), %r8
	movq	48(%rsp), %rcx
	movl	$46, %r9d
	movq	40(%rsp), %rdx
	movq	32(%rsp), %rsi
	movq	24(%rsp), %rdi
	call	_Z53__device_stub__Z24simple_linear_regressionPfS_S_S_S_hPfS_S_S_S_h
.L18:
	call	cudaDeviceSynchronize@PLT
	movq	56(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbx, %rdi
	movl	$12, %edx
	call	cudaMemcpy@PLT
	call	cudaGetLastError@PLT
	movl	%eax, %r14d
	testl	%eax, %eax
	je	.L19
	leaq	.LC10(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%r14d, %edi
	movq	%rax, %rbx
	call	cudaGetErrorString@PLT
	movq	%rbx, %rdi
	movq	%rax, %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	jmp	.L20
.L19:
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	48(%rsp), %rdi
	call	cudaFree@PLT
	movss	8(%rbx), %xmm2
	movss	.LC4(%rip), %xmm0
	movss	20(%rsp), %xmm1
	mulss	%xmm0, %xmm2
	mulss	4(%rbx), %xmm0
	subss	%xmm2, %xmm1
	movss	16(%rsp), %xmm2
	subss	%xmm0, %xmm2
	movss	(%rbx), %xmm0
	movss	%xmm1, 20(%rsp)
	movss	%xmm2, 16(%rsp)
	jmp	.L17
.L20:
	call	_ZNSt6chrono3_V212system_clock3nowEv@PLT
	leaq	.LC11(%rip), %rsi
	subq	%r13, %rax
	leaq	_ZSt4cout(%rip), %r13
	movq	%r13, %rdi
	movq	%rax, %rbx
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	cvtss2sd	16(%rsp), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC7(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	cvtss2sd	20(%rsp), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	leaq	.LC12(%rip), %rsi
	movq	%r13, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rbx, %rsi
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIlEERSoT_@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	call	_ZNSt6chrono3_V212system_clock3nowEv@PLT
	subq	$184, %rsp
	.cfi_def_cfa_offset 712
	movl	$46, %ecx
	movq	%r12, %rsi
	movq	%rsp, %rdi
	subq	$184, %rsp
	.cfi_def_cfa_offset 896
	movd	%r15d, %xmm1
	movq	%rax, %r14
	rep movsl
	movq	%rsp, %rdi
	movl	$46, %ecx
	movq	%rbp, %rsi
	rep movsl
	movss	380(%rsp), %xmm0
	call	_Z21linear_regression_cpuSt5arrayIfLm46EES0_ff
	addq	$368, %rsp
	.cfi_def_cfa_offset 528
	call	_ZNSt6chrono3_V212system_clock3nowEv@PLT
	leaq	.LC13(%rip), %rsi
	movq	%r13, %rdi
	subq	%r14, %rax
	movq	%rax, %rbx
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rbx, %rsi
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIlEERSoT_@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	456(%rsp), %rax
	subq	%fs:40, %rax
	je	.L22
	call	__stack_chk_fail@PLT
.L22:
	addq	$472, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3775:
	.size	main, .-main
	.section	.rodata.str1.1
.LC14:
	.string	"_Z24simple_linear_regressionPfS_S_S_S_h"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3806:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC14(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z24simple_linear_regressionPfS_S_S_S_h(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3806:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC1:
	.long	2139095039
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC2:
	.long	0
	.long	1071644672
	.section	.rodata.cst4
	.align 4
.LC4:
	.long	1008981770
	.section	.rodata.cst8
	.align 8
.LC5:
	.long	171798692
	.long	1069589463
	.section	.rodata.cst4
	.align 4
.LC9:
	.long	805306368
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

/**
 * Simple Linear Regression implementation in CUDA
 *
 * @author: Yvo Elling
 * @date: 08-01-21
 */

#include <iostream>
#include <hip/hip_runtime.h>
#include <cstdint>
#include <array>
#include <initializer_list>
#include <time.h>
#include <chrono>
#include <cmath>
#include <limits>

#include "linear_regression.cuh"

#define INPUT_SIZE 46
#define ERROR_DIMENSIONS 3

void linear_regression_cpu(std::array<float, INPUT_SIZE> x, std::array<float, INPUT_SIZE> y, float bias, float intercept) {
	float j_error = std::numeric_limits<float>::max();
	float learning_rate = 0.01;

	while(j_error > 0.13) {
		//array for storing intermediate error levels
		float errors[3] = {0, 0, 0};

		for (int i = 0; i < INPUT_SIZE; ++i) {
			// Predict output based on current bias and intercept
			float y_pred = bias + intercept * x[i];

			// Calculate J for this specific index and store in errors index 0
			errors[0] += 0.5f * pow((y[i] - y_pred), 2);
			// Calculate bias error for this index and store in errors index
			errors[1] += -(y[i] - y_pred);
			// Calculate intercept error for this index
			errors[2] += -(y[i] - y_pred)*x[i];
		}

		// Update bias and intercept based on errors
		float bias_new = bias - learning_rate * errors[1];
		float intercept_new = intercept - learning_rate * errors[2];

		// Update
		bias = bias_new;
		intercept = intercept_new;
		j_error = errors[0];
	}

	std::cout << "CPU Results: Bias = " << bias << " and Intercept: " << intercept << std::endl;
}

int main(int argc, char **argv)
{
	// Total error
	float j_error = std::numeric_limits<float>::max();

	// Determine size of the x and y arrays
	size_t input_size = INPUT_SIZE * sizeof(float);
	size_t error_size = ERROR_DIMENSIONS * sizeof(float);

	// Define the pointers to the x and y arrays with their respective size reserved
	float* h_x = (float*)malloc(input_size);
	float* h_y = (float*)malloc(input_size);
	float* h_bias = (float*)malloc(sizeof(float));
	float* h_intercept = (float*)malloc(sizeof(float));
	float* h_results = (float*)malloc(error_size);

	// Initial values that are used for the linear regression
	std::array<float, INPUT_SIZE> x = {0.00f, 0.22f, 0.24f, 0.33f, 0.37f, 0.44f, 0.44f, 0.57f, 0.93f, 1.00f};
	std::array<float, INPUT_SIZE> y = {0.00f, 0.22f, 0.58f, 0.20f, 0.55f, 0.39f, 0.54f, 0.53f, 1.00f, 0.61f};

	// Compute random starting bias and intercept
	srand(time(NULL));
	float bias = ((float) rand() / (RAND_MAX));
	float intercept = ((float) rand() / (RAND_MAX));
	float init_bias = bias;
	float init_intercept = intercept;

	// Store the address of the x and y arrays into the pointers h_x and h_y (host_x and host_y)
	h_x = &x[0];
	h_y = &y[0];
	h_bias = &bias;
	h_intercept = &intercept;

	// Allocate memory on GPU for the device_x (d_x) and device_y (d_y) of earlier calculated size
	float* d_x; float* d_y; float* d_bias; float* d_intercept; float* d_results;
	hipMalloc(&d_x, input_size);
	hipMalloc(&d_y, input_size);
	hipMalloc(&d_results, error_size);

	// Copy the values stored in pointer h_x and h_y into d_x and d_y
	// Transfer data from CPU memory to GPU memory.
	hipMemcpy(d_x, h_x, input_size, hipMemcpyHostToDevice);
	hipMemcpy(d_y, h_y, input_size, hipMemcpyHostToDevice);

	// Define stepsize for updating intercept and bias.
	float learning_rate = 0.01;

	//Start timing the procedure
	auto begin_gpu = std::chrono::high_resolution_clock::now();
	while( j_error > 0.13) {
		// ALlocate memory for the pointers to the bias and intercept
		hipMalloc(&d_bias, sizeof(float));
		hipMalloc(&d_intercept, sizeof(float));

		// Copy the local value of the bias and intercept to the device memory.
		hipMemcpy(d_bias, h_bias, sizeof(float), hipMemcpyHostToDevice);
		hipMemcpy(d_intercept, h_intercept, sizeof(float), hipMemcpyHostToDevice);

		// Launch kernel on GPU with pointers to data in GPU memory
		simple_linear_regression<<<1,INPUT_SIZE>>>(d_x, d_y, d_bias, d_intercept, d_results, INPUT_SIZE);

		// Wait for all threads to return
		hipDeviceSynchronize();

		// Retrieve the GPU out value and store in host memory
		hipMemcpy(h_results, d_results, error_size, hipMemcpyDeviceToHost);

		// Check if a CUDA error has occurred.
		hipError_t err = hipGetLastError();
		if (err != hipSuccess) {
			std::cout << "Error: " << hipGetErrorString(err) << std::endl;
			break;
		}

		// Free memory, on the next iteration we will allocate this memory again.
		hipFree(d_bias);
		hipFree(d_intercept);

		// Update bias and intercept based on errors
		float bias_new = bias - learning_rate * h_results[1];
		float intercept_new = intercept - learning_rate * h_results[2];

		// Update
		bias = bias_new;
		intercept = intercept_new;
		j_error = h_results[0];
	}
	//End timing and compute total execution time
	auto end_gpu = std::chrono::high_resolution_clock::now();
	auto elapsed_gpu = std::chrono::duration_cast<std::chrono::nanoseconds>(end_gpu - begin_gpu);

	// Print out latest values for total error, and bias and intercept respective errors
	std::cout << "GPU Results: Bias = " << bias << " and Intercept: " << intercept << std::endl;
	std::cout << "GPU-implementation execution time(ns): " << elapsed_gpu.count() << std::endl;

	//Start measuring execution time of C tasks
	auto begin = std::chrono::high_resolution_clock::now();
	linear_regression_cpu(x, y, init_bias, init_intercept);
	auto end = std::chrono::high_resolution_clock::now();
	auto elapsed = std::chrono::duration_cast<std::chrono::nanoseconds>(end - begin);
	std::cout << "C-implementation execution time(ns): " << elapsed.count() << std::endl;

	// Free memory on GPU
	hipFree(d_x);
	hipFree(d_y);

	return 0;
}

	.text
	.file	"main.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z39__device_stub__simple_linear_regressionPfS_S_S_S_h # -- Begin function _Z39__device_stub__simple_linear_regressionPfS_S_S_S_h
	.type	_Z39__device_stub__simple_linear_regressionPfS_S_S_S_h,@function
_Z39__device_stub__simple_linear_regressionPfS_S_S_S_h: # @_Z39__device_stub__simple_linear_regressionPfS_S_S_S_h
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	7(%rsp), %r8
	movb	%r9b, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z24simple_linear_regressionPfS_S_S_S_h, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z39__device_stub__simple_linear_regressionPfS_S_S_S_h, .Lfunc_end0-_Z39__device_stub__simple_linear_regressionPfS_S_S_S_h
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z21linear_regression_cpuSt5arrayIfLm46EES0_ff
.LCPI1_0:
	.quad	0x3fe0000000000000              # double 0.5
.LCPI1_2:
	.quad	0x3fc0a3d70a3d70a4              # double 0.13
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0
.LCPI1_1:
	.long	0x3c23d70a                      # float 0.00999999977
	.text
	.globl	_Z21linear_regression_cpuSt5arrayIfLm46EES0_ff
	.type	_Z21linear_regression_cpuSt5arrayIfLm46EES0_ff,@function
_Z21linear_regression_cpuSt5arrayIfLm46EES0_ff: # @_Z21linear_regression_cpuSt5arrayIfLm46EES0_ff
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$16, %rsp
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -16
	leaq	216(%rsp), %rax
	leaq	32(%rsp), %rcx
	movsd	.LCPI1_0(%rip), %xmm10          # xmm10 = mem[0],zero
	movss	.LCPI1_1(%rip), %xmm9           # xmm9 = mem[0],zero,zero,zero
	movsd	.LCPI1_2(%rip), %xmm2           # xmm2 = mem[0],zero
.LBB1_1:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_2 Depth 2
	xorps	%xmm3, %xmm3
	xorl	%edx, %edx
	xorps	%xmm5, %xmm5
	xorps	%xmm4, %xmm4
.LBB1_2:                                #   Parent Loop BB1_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movss	(%rcx,%rdx,4), %xmm6            # xmm6 = mem[0],zero,zero,zero
	movaps	%xmm1, %xmm7
	mulss	%xmm6, %xmm7
	addss	%xmm0, %xmm7
	movss	(%rax,%rdx,4), %xmm8            # xmm8 = mem[0],zero,zero,zero
	subss	%xmm7, %xmm8
	xorps	%xmm7, %xmm7
	cvtss2sd	%xmm8, %xmm7
	mulsd	%xmm7, %xmm7
	mulsd	%xmm10, %xmm7
	cvtss2sd	%xmm4, %xmm4
	addsd	%xmm7, %xmm4
	cvtsd2ss	%xmm4, %xmm4
	subss	%xmm8, %xmm5
	mulss	%xmm6, %xmm8
	subss	%xmm8, %xmm3
	incq	%rdx
	cmpq	$46, %rdx
	jne	.LBB1_2
# %bb.3:                                #   in Loop: Header=BB1_1 Depth=1
	mulss	%xmm9, %xmm5
	subss	%xmm5, %xmm0
	mulss	%xmm9, %xmm3
	subss	%xmm3, %xmm1
	xorps	%xmm3, %xmm3
	cvtss2sd	%xmm4, %xmm3
	ucomisd	%xmm2, %xmm3
	ja	.LBB1_1
# %bb.4:
	movl	$_ZSt4cout, %edi
	movl	$.L.str, %esi
	movl	$20, %edx
	movss	%xmm1, 12(%rsp)                 # 4-byte Spill
	movss	%xmm0, 8(%rsp)                  # 4-byte Spill
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	xorps	%xmm0, %xmm0
	cvtss2sd	8(%rsp), %xmm0                  # 4-byte Folded Reload
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbx
	movl	$.L.str.1, %esi
	movl	$16, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	xorps	%xmm0, %xmm0
	cvtss2sd	12(%rsp), %xmm0                 # 4-byte Folded Reload
	movq	%rbx, %rdi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbx
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	addq	$16, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	_ZNSo5flushEv                   # TAILCALL
.Lfunc_end1:
	.size	_Z21linear_regression_cpuSt5arrayIfLm46EES0_ff, .Lfunc_end1-_Z21linear_regression_cpuSt5arrayIfLm46EES0_ff
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI2_0:
	.long	0x30000000                      # float 4.65661287E-10
.LCPI2_1:
	.long	0x3c23d70a                      # float 0.00999999977
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0
.LCPI2_2:
	.quad	0x3fc0a3d70a3d70a4              # double 0.13
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$808, %rsp                      # imm = 0x328
	.cfi_def_cfa_offset 864
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movabsq	$4294967297, %r13               # imm = 0x100000001
	movl	$12, %edi
	callq	malloc
	movq	%rax, %r14
	leaq	624(%rsp), %rbx
	movl	$.L__const.main.x, %esi
	movl	$184, %edx
	movq	%rbx, %rdi
	callq	memcpy@PLT
	leaq	440(%rsp), %r15
	movl	$.L__const.main.y, %esi
	movl	$184, %edx
	movq	%r15, %rdi
	callq	memcpy@PLT
	xorl	%edi, %edi
	callq	time
	movl	%eax, %edi
	callq	srand
	callq	rand
	cvtsi2ss	%eax, %xmm0
	mulss	.LCPI2_0(%rip), %xmm0
	leaq	380(%rsp), %rax
	movss	%xmm0, 404(%rsp)                # 4-byte Spill
	movss	%xmm0, (%rax)
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	.LCPI2_0(%rip), %xmm0
	leaq	376(%rsp), %rax
	movss	%xmm0, 400(%rsp)                # 4-byte Spill
	movss	%xmm0, (%rax)
	leaq	424(%rsp), %r12
	movl	$184, %esi
	movq	%r12, %rdi
	callq	hipMalloc
	leaq	416(%rsp), %rbp
	movl	$184, %esi
	movq	%rbp, %rdi
	callq	hipMalloc
	leaq	408(%rsp), %rdi
	movl	$12, %esi
	callq	hipMalloc
	movq	(%r12), %rdi
	movl	$184, %edx
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%rbp), %rdi
	movl	$184, %edx
	movq	%r15, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	%rax, 432(%rsp)                 # 8-byte Spill
	leaq	392(%rsp), %rbp
	leaq	384(%rsp), %r15
	movq	%r13, %rax
	leaq	45(%r13), %rbx
.LBB2_1:                                # =>This Inner Loop Header: Depth=1
	movl	$4, %esi
	movq	%rbp, %rdi
	callq	hipMalloc
	movl	$4, %esi
	movq	%r15, %rdi
	callq	hipMalloc
	movq	392(%rsp), %rdi
	movl	$4, %edx
	leaq	380(%rsp), %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	384(%rsp), %rdi
	movl	$4, %edx
	leaq	376(%rsp), %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	%r13, %rdi
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_3
# %bb.2:                                #   in Loop: Header=BB2_1 Depth=1
	movq	424(%rsp), %rdi
	movq	416(%rsp), %rsi
	movq	392(%rsp), %rdx
	movq	384(%rsp), %rcx
	movq	408(%rsp), %r8
	movl	$46, %r9d
	callq	_Z39__device_stub__simple_linear_regressionPfS_S_S_S_h
.LBB2_3:                                #   in Loop: Header=BB2_1 Depth=1
	callq	hipDeviceSynchronize
	movq	408(%rsp), %rsi
	movl	$12, %edx
	movq	%r14, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB2_4
# %bb.8:                                #   in Loop: Header=BB2_1 Depth=1
	movq	392(%rsp), %rdi
	callq	hipFree
	movq	384(%rsp), %rdi
	callq	hipFree
	movss	380(%rsp), %xmm0                # xmm0 = mem[0],zero,zero,zero
	movss	4(%r14), %xmm1                  # xmm1 = mem[0],zero,zero,zero
	movss	.LCPI2_1(%rip), %xmm3           # xmm3 = mem[0],zero,zero,zero
	mulss	%xmm3, %xmm1
	subss	%xmm1, %xmm0
	movss	376(%rsp), %xmm1                # xmm1 = mem[0],zero,zero,zero
	movss	8(%r14), %xmm2                  # xmm2 = mem[0],zero,zero,zero
	mulss	%xmm3, %xmm2
	subss	%xmm2, %xmm1
	movss	%xmm0, 380(%rsp)
	movss	%xmm1, 376(%rsp)
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r14), %xmm0
	ucomisd	.LCPI2_2(%rip), %xmm0
	ja	.LBB2_1
	jmp	.LBB2_9
.LBB2_4:
	movl	%eax, %r12d
	movl	$_ZSt4cout, %edi
	movl	$.L.str.2, %esi
	movl	$7, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%r12d, %edi
	callq	hipGetErrorString
	testq	%rax, %rax
	je	.LBB2_5
# %bb.6:
	movq	%rax, %rbx
	movq	%rax, %rdi
	callq	strlen
	movl	$_ZSt4cout, %edi
	movq	%rbx, %rsi
	movq	%rax, %rdx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB2_7
.LBB2_5:
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rax
	leaq	_ZSt4cout(%rax), %rdi
	movl	32(%rdi), %esi
	orl	$1, %esi
	callq	_ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate
.LBB2_7:                                # %.thread
	movq	_ZSt4cout(%rip), %rax
	movl	$_ZSt4cout, %ecx
	movq	-24(%rax), %rdi
	addq	%rcx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.LBB2_9:                                # %.loopexit
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	%rax, %rbx
	subq	432(%rsp), %rbx                 # 8-byte Folded Reload
	movl	$_ZSt4cout, %edi
	movl	$.L.str.3, %esi
	movl	$20, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	xorps	%xmm0, %xmm0
	cvtss2sd	380(%rsp), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r14
	movl	$.L.str.1, %esi
	movl	$16, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	xorps	%xmm0, %xmm0
	cvtss2sd	376(%rsp), %xmm0
	movq	%r14, %rdi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r14
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%r14, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r14, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	$_ZSt4cout, %edi
	movl	$.L.str.4, %esi
	movl	$39, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	%rbx, %rsi
	callq	_ZNSo9_M_insertIlEERSoT_
	movq	%rax, %rbx
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	%rax, %rbx
	leaq	624(%rsp), %rsi
	movl	$23, %ecx
	movq	%rsp, %rdi
	rep;movsq (%rsi), %es:(%rdi)
	leaq	184(%rsp), %rdi
	leaq	440(%rsp), %rsi
	movl	$23, %ecx
	rep;movsq (%rsi), %es:(%rdi)
	movss	404(%rsp), %xmm0                # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	movss	400(%rsp), %xmm1                # 4-byte Reload
                                        # xmm1 = mem[0],zero,zero,zero
	callq	_Z21linear_regression_cpuSt5arrayIfLm46EES0_ff
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	%rax, %r14
	subq	%rbx, %r14
	movl	$_ZSt4cout, %edi
	movl	$.L.str.5, %esi
	movl	$37, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	%r14, %rsi
	callq	_ZNSo9_M_insertIlEERSoT_
	movq	%rax, %rbx
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	424(%rsp), %rdi
	callq	hipFree
	movq	416(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$808, %rsp                      # imm = 0x328
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z24simple_linear_regressionPfS_S_S_S_h, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z24simple_linear_regressionPfS_S_S_S_h,@object # @_Z24simple_linear_regressionPfS_S_S_S_h
	.section	.rodata,"a",@progbits
	.globl	_Z24simple_linear_regressionPfS_S_S_S_h
	.p2align	3, 0x0
_Z24simple_linear_regressionPfS_S_S_S_h:
	.quad	_Z39__device_stub__simple_linear_regressionPfS_S_S_S_h
	.size	_Z24simple_linear_regressionPfS_S_S_S_h, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"CPU Results: Bias = "
	.size	.L.str, 21

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	" and Intercept: "
	.size	.L.str.1, 17

	.type	.L__const.main.x,@object        # @__const.main.x
	.section	.rodata,"a",@progbits
	.p2align	2, 0x0
.L__const.main.x:
	.long	0x00000000                      # float 0
	.long	0x3e6147ae                      # float 0.219999999
	.long	0x3e75c28f                      # float 0.239999995
	.long	0x3ea8f5c3                      # float 0.330000013
	.long	0x3ebd70a4                      # float 0.370000005
	.long	0x3ee147ae                      # float 0.439999998
	.long	0x3ee147ae                      # float 0.439999998
	.long	0x3f11eb85                      # float 0.569999993
	.long	0x3f6e147b                      # float 0.930000007
	.long	0x3f800000                      # float 1
	.zero	144
	.size	.L__const.main.x, 184

	.type	.L__const.main.y,@object        # @__const.main.y
	.p2align	2, 0x0
.L__const.main.y:
	.long	0x00000000                      # float 0
	.long	0x3e6147ae                      # float 0.219999999
	.long	0x3f147ae1                      # float 0.579999983
	.long	0x3e4ccccd                      # float 0.200000003
	.long	0x3f0ccccd                      # float 0.550000012
	.long	0x3ec7ae14                      # float 0.389999986
	.long	0x3f0a3d71                      # float 0.540000021
	.long	0x3f07ae14                      # float 0.529999971
	.long	0x3f800000                      # float 1
	.long	0x3f1c28f6                      # float 0.610000014
	.zero	144
	.size	.L__const.main.y, 184

	.type	.L.str.2,@object                # @.str.2
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.2:
	.asciz	"Error: "
	.size	.L.str.2, 8

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"GPU Results: Bias = "
	.size	.L.str.3, 21

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"GPU-implementation execution time(ns): "
	.size	.L.str.4, 40

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"C-implementation execution time(ns): "
	.size	.L.str.5, 38

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z24simple_linear_regressionPfS_S_S_S_h"
	.size	.L__unnamed_1, 40

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z39__device_stub__simple_linear_regressionPfS_S_S_S_h
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z24simple_linear_regressionPfS_S_S_S_h
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z24simple_linear_regressionPfS_S_S_S_h ; -- Begin function _Z24simple_linear_regressionPfS_S_S_S_h
	.globl	_Z24simple_linear_regressionPfS_S_S_S_h
	.p2align	8
	.type	_Z24simple_linear_regressionPfS_S_S_S_h,@function
_Z24simple_linear_regressionPfS_S_S_S_h: ; @_Z24simple_linear_regressionPfS_S_S_S_h
; %bb.0:
	s_load_b256 s[8:15], s[0:1], 0x0
	v_lshlrev_b32_e32 v2, 2, v0
	s_mov_b32 s4, exec_lo
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b32 v1, v2, s[8:9]
	global_load_b32 v2, v2, s[10:11]
	s_load_b32 s2, s[12:13], 0x0
	s_load_b32 s3, s[14:15], 0x0
	s_waitcnt vmcnt(1) lgkmcnt(0)
	v_fma_f32 v3, s3, v1, s2
	s_mov_b32 s2, 0x3e76c4e1
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v2, v2, v3
	v_frexp_mant_f32_e64 v3, |v2|
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f32_e32 vcc_lo, 0x3f2aaaab, v3
	v_cndmask_b32_e64 v4, 0, 1, vcc_lo
	v_ldexp_f32 v3, v3, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f32_e32 v4, 1.0, v3
	v_add_f32_e32 v6, -1.0, v3
	v_rcp_f32_e32 v5, v4
	s_waitcnt_depctr 0xfff
	v_dual_mul_f32 v7, v6, v5 :: v_dual_add_f32 v8, -1.0, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v9, v4, v7
	v_sub_f32_e32 v3, v3, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v4, v7, v4, -v9
	v_fmac_f32_e32 v4, v7, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v3, v9, v4
	v_dual_sub_f32 v8, v6, v3 :: v_dual_sub_f32 v9, v3, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v4, v9, v4
	v_sub_f32_e32 v6, v6, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v3, v6, v3
	v_add_f32_e32 v3, v4, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v3, v8, v3
	v_mul_f32_e32 v3, v5, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v4, v7, v3
	v_mul_f32_e32 v6, v4, v4
	v_sub_f32_e32 v5, v4, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_f32_e32 v3, v3, v5
	v_fma_f32 v5, v4, v4, -v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v7, v3, v3
	v_fmac_f32_e32 v5, v4, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v7, v6, v5
	v_fmaak_f32 v8, s2, v7, 0x3e91f4c4
	v_sub_f32_e32 v6, v7, v6
	s_load_b64 s[2:3], s[0:1], 0x20
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmaak_f32 v8, v7, v8, 0x3ecccdef :: v_dual_sub_f32 v5, v5, v6
	v_mul_f32_e32 v9, v7, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v6, v7, v8, -v9
	v_fmac_f32_e32 v6, v5, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v8, v9, v6
	v_dual_sub_f32 v9, v8, v9 :: v_dual_add_f32 v10, 0x3f2aaaaa, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mul_f32 v11, v4, v7 :: v_dual_sub_f32 v6, v6, v9
	v_fma_f32 v12, v7, v4, -v11
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f32_e32 v9, 0xbf2aaaaa, v10
	v_add_f32_e32 v6, 0x31739010, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v12, v7, v3
	v_ldexp_f32 v3, v3, 1
	v_fmac_f32_e32 v12, v5, v4
	v_sub_f32_e32 v8, v8, v9
	v_ldexp_f32 v4, v4, 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f32_e32 v7, v11, v12
	v_add_f32_e32 v6, v6, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v5, v10, v6
	v_mul_f32_e32 v9, v7, v5
	v_sub_f32_e32 v8, v10, v5
	v_sub_f32_e32 v10, v7, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f32_e32 v6, v6, v8
	v_fma_f32 v8, v7, v5, -v9
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v10, v12, v10
	v_fmac_f32_e32 v8, v7, v6
	v_frexp_exp_i32_f32_e32 v6, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v8, v10, v5
	v_subrev_co_ci_u32_e32 v5, vcc_lo, 0, v6, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f32_e32 v6, v9, v8
	v_cvt_f32_i32_e32 v5, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v9, v6, v9
	v_dual_mul_f32 v10, 0x3f317218, v5 :: v_dual_add_f32 v7, v4, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v8, v8, v9
	v_fma_f32 v9, 0x3f317218, v5, -v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f32_e32 v3, v3, v8
	v_dual_fmamk_f32 v5, v5, 0xb102e308, v9 :: v_dual_sub_f32 v4, v7, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v4, v6, v4
	v_add_f32_e32 v3, v3, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v6, v7, v3
	v_sub_f32_e32 v7, v6, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v3, v3, v7 :: v_dual_add_f32 v4, v10, v5
	v_add_f32_e32 v8, v4, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v9, v8, v4
	v_sub_f32_e32 v10, v4, v10
	v_sub_f32_e32 v11, v8, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_sub_f32 v5, v5, v10 :: v_dual_sub_f32 v6, v6, v9
	v_sub_f32_e32 v4, v4, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_add_f32 v7, v5, v3 :: v_dual_add_f32 v4, v6, v4
	v_sub_f32_e32 v6, v7, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f32_e32 v4, v7, v4
	v_sub_f32_e32 v7, v7, v6
	v_sub_f32_e32 v3, v3, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_sub_f32_e32 v5, v5, v7
	v_add_f32_e32 v9, v8, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_add_f32 v3, v3, v5 :: v_dual_sub_f32 v6, v9, v8
	v_sub_f32_e32 v4, v4, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v3, v3, v4
	v_add_f32_e32 v4, v9, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_sub_f32_e32 v5, v4, v9
	v_add_f32_e32 v6, v4, v4
	v_mul_f32_e32 v7, 0, v4
	v_sub_f32_e32 v3, v3, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f32 v4, v4, 2.0, -v6
	v_cmp_class_f32_e64 vcc_lo, v6, 0x204
	v_fmac_f32_e32 v7, 2.0, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v3, v4, v7
	v_add_f32_e32 v4, v6, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v5, v4, v6, vcc_lo
	v_cmp_eq_f32_e32 vcc_lo, 0x42b17218, v5
	v_cndmask_b32_e64 v7, 0, 0x37000000, vcc_lo
	v_cmp_neq_f32_e64 vcc_lo, 0x7f800000, |v5|
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v8, v5, v7
	v_mul_f32_e32 v9, 0x3fb8aa3b, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f32 v10, 0x3fb8aa3b, v8, -v9
	v_rndne_f32_e32 v11, v9
	v_dual_fmamk_f32 v10, v8, 0x32a5705f, v10 :: v_dual_sub_f32 v9, v9, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_f32_e32 v9, v9, v10
	v_sub_f32_e32 v4, v4, v6
	v_cvt_i32_f32_e32 v6, v11
	v_exp_f32_e32 v9, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v3, v3, v4
	v_cndmask_b32_e32 v3, 0, v3, vcc_lo
	v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v8
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v4, v9, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_add_f32 v3, v7, v3 :: v_dual_cndmask_b32 v4, 0, v4
	v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v8
	v_cndmask_b32_e32 v4, 0x7f800000, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f32 v3, v4, v3, v4
	v_cmp_eq_f32_e32 vcc_lo, 0x7f800000, v4
	v_cndmask_b32_e32 v3, v3, v4, vcc_lo
	v_cmp_neq_f32_e64 vcc_lo, 0x7f800000, |v2|
	v_bfrev_b32_e32 v4, 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e64 v3, |v3|, 0.5
	v_cndmask_b32_e32 v3, 0x7f800000, v3, vcc_lo
	v_cmp_neq_f32_e32 vcc_lo, 0, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e32 v5, 0, v3, vcc_lo
                                        ; implicit-def: $vgpr3
.LBB0_1:                                ; %ComputeLoop
                                        ; =>This Inner Loop Header: Depth=1
	s_ctz_i32_b32 s5, s4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s6, v4
	v_readlane_b32 s7, v5, s5
	s_lshl_b32 s8, 1, s5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	s_and_not1_b32 s4, s4, s8
	v_writelane_b32 v3, s6, s5
	s_delay_alu instid0(VALU_DEP_2)
	v_add_f32_e32 v4, s7, v4
	s_cmp_lg_u32 s4, 0
	s_cbranch_scc1 .LBB0_1
; %bb.2:                                ; %ComputeEnd
	v_mbcnt_lo_u32_b32 v5, exec_lo, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_eq_u32_e32 vcc_lo, 0, v5
                                        ; implicit-def: $vgpr5
	s_and_saveexec_b32 s4, vcc_lo
	s_xor_b32 s4, exec_lo, s4
	s_cbranch_execz .LBB0_4
; %bb.3:
	v_mov_b32_e32 v5, 0
	ds_add_rtn_f32 v5, v5, v4
.LBB0_4:
	s_or_b32 exec_lo, exec_lo, s4
	s_waitcnt lgkmcnt(0)
	v_readfirstlane_b32 s5, v5
	v_mov_b32_e32 v6, 0
	v_xor_b32_e32 v5, 0x80000000, v2
	s_mov_b32 s4, exec_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_add_f32_e32 v3, s5, v3
	ds_load_b32 v4, v6
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v3, v3, v4
	v_bfrev_b32_e32 v4, 1
	ds_store_b32 v6, v3
                                        ; implicit-def: $vgpr3
.LBB0_5:                                ; %ComputeLoop25
                                        ; =>This Inner Loop Header: Depth=1
	s_ctz_i32_b32 s5, s4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_readfirstlane_b32 s6, v4
	v_readlane_b32 s7, v5, s5
	s_lshl_b32 s8, 1, s5
	s_and_not1_b32 s4, s4, s8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_writelane_b32 v3, s6, s5
	v_add_f32_e32 v4, s7, v4
	s_cmp_lg_u32 s4, 0
	s_cbranch_scc1 .LBB0_5
; %bb.6:                                ; %ComputeEnd26
	v_mbcnt_lo_u32_b32 v5, exec_lo, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_eq_u32_e32 vcc_lo, 0, v5
                                        ; implicit-def: $vgpr5
	s_and_saveexec_b32 s4, vcc_lo
	s_xor_b32 s4, exec_lo, s4
	s_cbranch_execz .LBB0_8
; %bb.7:
	v_mov_b32_e32 v5, 0
	ds_add_rtn_f32 v5, v5, v4 offset:4
.LBB0_8:
	s_or_b32 exec_lo, exec_lo, s4
	s_waitcnt lgkmcnt(0)
	v_readfirstlane_b32 s5, v5
	v_mov_b32_e32 v4, 0
	s_mov_b32 s4, exec_lo
	s_delay_alu instid0(VALU_DEP_2)
	v_add_f32_e32 v3, s5, v3
	ds_load_b32 v6, v4 offset:4
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v5, v3, v6
	v_mul_f32_e64 v3, v1, -v2
	v_bfrev_b32_e32 v1, 1
                                        ; implicit-def: $vgpr2
	ds_store_b32 v4, v5 offset:4
.LBB0_9:                                ; %ComputeLoop30
                                        ; =>This Inner Loop Header: Depth=1
	s_ctz_i32_b32 s5, s4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_readfirstlane_b32 s6, v1
	v_readlane_b32 s7, v3, s5
	s_lshl_b32 s8, 1, s5
	s_and_not1_b32 s4, s4, s8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_writelane_b32 v2, s6, s5
	v_add_f32_e32 v1, s7, v1
	s_cmp_lg_u32 s4, 0
	s_cbranch_scc1 .LBB0_9
; %bb.10:                               ; %ComputeEnd31
	v_mbcnt_lo_u32_b32 v3, exec_lo, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_eq_u32_e32 vcc_lo, 0, v3
                                        ; implicit-def: $vgpr3
	s_and_saveexec_b32 s4, vcc_lo
	s_xor_b32 s4, exec_lo, s4
	s_cbranch_execz .LBB0_12
; %bb.11:
	v_mov_b32_e32 v3, 0
	ds_add_rtn_f32 v3, v3, v1 offset:8
.LBB0_12:
	s_or_b32 exec_lo, exec_lo, s4
	s_load_b32 s0, s[0:1], 0x28
	s_waitcnt lgkmcnt(0)
	v_readfirstlane_b32 s1, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_dual_mov_b32 v1, 0 :: v_dual_add_f32 v2, s1, v2
	ds_load_b32 v4, v1 offset:8
	s_and_b32 s0, s0, 0xff
	s_add_i32 s0, s0, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	v_cmp_eq_u32_e32 vcc_lo, s0, v0
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v2, v2, v4
	ds_store_b32 v1, v2 offset:8
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s0, vcc_lo
	s_cbranch_execz .LBB0_14
; %bb.13:
	ds_load_b96 v[4:6], v1
	v_mov_b32_e32 v2, v1
	v_mov_b32_e32 v3, v1
	ds_store_b96 v1, v[1:3]
	s_waitcnt lgkmcnt(1)
	global_store_b96 v1, v[4:6], s[2:3]
.LBB0_14:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z24simple_linear_regressionPfS_S_S_S_h
		.amdhsa_group_segment_fixed_size 12
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 44
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 13
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z24simple_linear_regressionPfS_S_S_S_h, .Lfunc_end0-_Z24simple_linear_regressionPfS_S_S_S_h
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1580
; NumSgprs: 18
; NumVgprs: 13
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 12 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 13
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .offset:         40
        .size:           1
        .value_kind:     by_value
    .group_segment_fixed_size: 12
    .kernarg_segment_align: 8
    .kernarg_segment_size: 44
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z24simple_linear_regressionPfS_S_S_S_h
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z24simple_linear_regressionPfS_S_S_S_h.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     13
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
