/*
  Sample Implementation of
    Yamazaki and Tanaka (2005).
    Neural Modeling of an Internal Clock.
    Neural Computation 17:1032--1058.
  using only global memory of CUDA.

  Licensed under Creative Commons Attribution License (CC-BY)
    http://creativecommons.org/licenses/by/3.0/
 */

#include<stdio.h>
#include<stdlib.h>
#include<math.h>

#define N 1024 // To be 2^k
#define T 1000
#define Pr 0.1
#define I 1.0
#define Kappa 2.0
#define Tau 100.0

#define BLOCK_SIZE 512

float *z, *u, *result;
int *w;

void initialize()
{
  int i, j, k;

  w = (int *)malloc(N*N*sizeof(int));
  z = (float *)malloc(N*sizeof(float));
  u = (float *)malloc(N*sizeof(float));
  result = (float *)malloc(T*N*sizeof(float));

  for(i = 0; i < N; i++){
    z[i] = 0;
    u[i] = I;
  }

  srand(23);

  for(i = 0; i < N; i++){
    k = 0;
    for(j = 0; j < N; j++){
      if ((float)rand()/(float)RAND_MAX < Pr){
	w[k+N*i] = j;
	k++;
      }
    }
    w[k+N*i] = -1;
  }
}

void finalize()
{
  free(w);
  free(z);
  free(u);
  free(result);
}

__global__ void Kernel(const int *w, float *z, float *u, float *result, const float decay, const int t)
{
  int i = blockIdx.x*BLOCK_SIZE + threadIdx.x;
  int j, k;
  float r;

  r = 0;
  for(k = 0; w[k+N*i] != -1; k++){
    j = w[k+N*i];
    r += z[j];
  }
  u[i] = decay*u[i] + (1 - decay)*I - Kappa*r/N;

  if (u[i] > 0){
    z[i] = u[i];
  }else{
    z[i] = 0;
  }
  result[i+N*t] = z[i];
}

void loop()
{
  float *zd, *ud, *resultd;
  int *wd;
  float decay;
  cudaError_t stat;
  int t;

  decay = exp(-1.0/Tau);

  cudaMalloc((void**)&wd, N*N*sizeof(int));
  cudaMalloc((void**)&zd, N*sizeof(float));
  cudaMalloc((void**)&ud, N*sizeof(float));
  cudaMalloc((void**)&resultd, N*T*sizeof(float));
  cudaMemcpy(wd, w, N*N*sizeof(int), cudaMemcpyHostToDevice);
  cudaMemcpy(zd, z, N*sizeof(float), cudaMemcpyHostToDevice);
  cudaMemcpy(ud, u, N*sizeof(float), cudaMemcpyHostToDevice);

  dim3 dimBlock(BLOCK_SIZE);
  dim3 dimGrid(N/BLOCK_SIZE);

  for(t = 0; t < T; t++){
    Kernel<<<dimGrid,dimBlock>>>(wd, zd, ud, resultd, decay, t);
  }

  stat = cudaMemcpy(result, resultd, N*T*sizeof(float), cudaMemcpyDeviceToHost);
  if (stat != cudaSuccess){
    puts("error");
  }

  cudaFree(wd);
  cudaFree(zd);
  cudaFree(ud);
  cudaFree(resultd);
}

void output(char *prefix)
{
  FILE *f;
  int t, i;
  char fn[1024];

  sprintf(fn, "%s.r", prefix);
  f = fopen(fn, "w");
  for(t = 0; t < T; t++){
    for(i = 0; i < N; i++){
      if (result[i+N*t] > 0){
	fprintf(f, "%d %d\n", t, i);
      }
    }
  }

  fclose(f);
}

int main(int argc, char *argv[])
{
  char *prefix;

  if (argc < 2){
    fprintf(stderr, "%s <prefix>\n", argv[0]);
    exit(1);
  }
  prefix = argv[1];

  initialize();
  loop();
  output(prefix);
  finalize();

  return 0;
}

	.file	"tmpxft_002711a4_00000000-6_ic_sparse_cuda.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2034:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2034:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z10initializev
	.type	_Z10initializev, @function
_Z10initializev:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movl	$4194304, %edi
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	call	malloc@PLT
	movl	$4096, %edi
	movq	%rax, w(%rip)
	call	malloc@PLT
	movl	$4096, %edi
	movq	%rax, %rbx
	movq	%rax, z(%rip)
	call	malloc@PLT
	movl	$4096000, %edi
	movq	%rax, u(%rip)
	movq	%rax, %rbp
	call	malloc@PLT
	movl	$1024, %ecx
	movq	%rbx, %rdi
	xorl	%edx, %edx
	movq	%rax, result(%rip)
	xorl	%eax, %eax
	movss	.LC0(%rip), %xmm0
	rep stosl
.L3:
	movss	%xmm0, 0(%rbp,%rdx,4)
	incq	%rdx
	cmpq	$1024, %rdx
	jne	.L3
	movl	$23, %edi
	xorl	%ebp, %ebp
	call	srand@PLT
.L4:
	xorl	%ebx, %ebx
	xorl	%r12d, %r12d
.L7:
	call	rand@PLT
	movsd	.LC2(%rip), %xmm1
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC1(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	comisd	%xmm0, %xmm1
	jbe	.L5
	leal	0(%rbp,%rbx), %eax
	movq	w(%rip), %rdx
	incl	%ebx
	cltq
	movl	%r12d, (%rdx,%rax,4)
.L5:
	incl	%r12d
	cmpl	$1024, %r12d
	jne	.L7
	addl	%ebp, %ebx
	movq	w(%rip), %rax
	addl	$1024, %ebp
	movslq	%ebx, %rbx
	movl	$-1, (%rax,%rbx,4)
	cmpl	$1048576, %ebp
	jne	.L4
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z10initializev, .-_Z10initializev
	.globl	_Z8finalizev
	.type	_Z8finalizev, @function
_Z8finalizev:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	movq	w(%rip), %rdi
	call	free@PLT
	movq	z(%rip), %rdi
	call	free@PLT
	movq	u(%rip), %rdi
	call	free@PLT
	movq	result(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	free@PLT
	.cfi_endproc
.LFE2028:
	.size	_Z8finalizev, .-_Z8finalizev
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC3:
	.string	"%s.r"
.LC4:
	.string	"w"
.LC6:
	.string	"%d %d\n"
	.text
	.globl	_Z6outputPc
	.type	_Z6outputPc, @function
_Z6outputPc:
.LFB2030:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rdi, %r8
	movl	$1024, %edx
	movl	$2, %esi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	leaq	.LC3(%rip), %rcx
	leaq	.LC6(%rip), %r15
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	xorl	%ebp, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$1048, %rsp
	.cfi_def_cfa_offset 1104
	movq	%fs:40, %rax
	movq	%rax, 1032(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rbx
	movq	%rbx, %rdi
	call	__sprintf_chk@PLT
	leaq	.LC4(%rip), %rsi
	movq	%rbx, %rdi
	call	fopen@PLT
	movq	%rax, %r12
.L17:
	movq	%rbp, %r13
	movl	%ebp, %r14d
	xorl	%ebx, %ebx
	salq	$12, %r13
.L20:
	leaq	0(,%rbx,4), %rax
	addq	result(%rip), %rax
	xorps	%xmm0, %xmm0
	movss	(%rax,%r13), %xmm1
	comiss	%xmm0, %xmm1
	jbe	.L18
	movl	%ebx, %r8d
	movl	%r14d, %ecx
	movq	%r15, %rdx
	movl	$2, %esi
	movq	%r12, %rdi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
.L18:
	incq	%rbx
	cmpq	$1024, %rbx
	jne	.L20
	incq	%rbp
	cmpq	$1000, %rbp
	jne	.L17
	movq	%r12, %rdi
	call	fclose@PLT
	movq	1032(%rsp), %rax
	subq	%fs:40, %rax
	je	.L22
	call	__stack_chk_fail@PLT
.L22:
	addq	$1048, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2030:
	.size	_Z6outputPc, .-_Z6outputPc
	.globl	_Z36__device_stub__Z6KernelPKiPfS1_S1_fiPKiPfS1_S1_fi
	.type	_Z36__device_stub__Z6KernelPKiPfS1_S1_fiPKiPfS1_S1_fi, @function
_Z36__device_stub__Z6KernelPKiPfS1_S1_fiPKiPfS1_S1_fi:
.LFB2056:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 8(%rsp)
	movss	%xmm0, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L26
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z6KernelPKiPfS1_S1_fi(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L26:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L28
	call	__stack_chk_fail@PLT
.L28:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2056:
	.size	_Z36__device_stub__Z6KernelPKiPfS1_S1_fiPKiPfS1_S1_fi, .-_Z36__device_stub__Z6KernelPKiPfS1_S1_fiPKiPfS1_S1_fi
	.globl	_Z6KernelPKiPfS1_S1_fi
	.type	_Z6KernelPKiPfS1_S1_fi, @function
_Z6KernelPKiPfS1_S1_fi:
.LFB2057:
	.cfi_startproc
	endbr64
	jmp	_Z36__device_stub__Z6KernelPKiPfS1_S1_fiPKiPfS1_S1_fi
	.cfi_endproc
.LFE2057:
	.size	_Z6KernelPKiPfS1_S1_fi, .-_Z6KernelPKiPfS1_S1_fi
	.section	.rodata.str1.1
.LC8:
	.string	"error"
	.text
	.globl	_Z4loopv
	.type	_Z4loopv, @function
_Z4loopv:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movl	$4194304, %esi
	xorl	%ebx, %ebx
	subq	$64, %rsp
	.cfi_def_cfa_offset 80
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	%rsp, %rdi
	movl	$4096, %esi
	call	cudaMalloc@PLT
	leaq	8(%rsp), %rdi
	movl	$4096, %esi
	call	cudaMalloc@PLT
	leaq	16(%rsp), %rdi
	movl	$4096000, %esi
	call	cudaMalloc@PLT
	movq	24(%rsp), %rdi
	movl	$1, %ecx
	movq	w(%rip), %rsi
	movl	$4194304, %edx
	call	cudaMemcpy@PLT
	movq	z(%rip), %rsi
	movq	(%rsp), %rdi
	movl	$1, %ecx
	movl	$4096, %edx
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movq	u(%rip), %rsi
	movl	$4096, %edx
	call	cudaMemcpy@PLT
	movl	$8388609, %eax
	movl	$1, 40(%rsp)
	salq	$9, %rax
	movl	$1, 52(%rsp)
	movq	%rax, 32(%rsp)
	subq	$510, %rax
	movq	%rax, 44(%rsp)
.L33:
	movl	40(%rsp), %ecx
	movq	32(%rsp), %rdx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	44(%rsp), %rdi
	movl	52(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L32
	movss	.LC7(%rip), %xmm0
	movq	16(%rsp), %rcx
	movl	%ebx, %r8d
	movq	8(%rsp), %rdx
	movq	(%rsp), %rsi
	movq	24(%rsp), %rdi
	call	_Z36__device_stub__Z6KernelPKiPfS1_S1_fiPKiPfS1_S1_fi
.L32:
	incl	%ebx
	cmpl	$1000, %ebx
	jne	.L33
	movq	16(%rsp), %rsi
	movl	$2, %ecx
	movl	$4096000, %edx
	movq	result(%rip), %rdi
	call	cudaMemcpy@PLT
	testl	%eax, %eax
	je	.L34
	leaq	.LC8(%rip), %rdi
	call	puts@PLT
.L34:
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	(%rsp), %rdi
	call	cudaFree@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L35
	call	__stack_chk_fail@PLT
.L35:
	addq	$64, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2029:
	.size	_Z4loopv, .-_Z4loopv
	.section	.rodata.str1.1
.LC9:
	.string	"%s <prefix>\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2031:
	.cfi_startproc
	endbr64
	decl	%edi
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	jg	.L42
	movq	(%rsi), %rcx
	movq	stderr(%rip), %rdi
	movl	$2, %esi
	xorl	%eax, %eax
	leaq	.LC9(%rip), %rdx
	call	__fprintf_chk@PLT
	movl	$1, %edi
	call	exit@PLT
.L42:
	movq	8(%rsi), %rbx
	call	_Z10initializev
	call	_Z4loopv
	movq	%rbx, %rdi
	call	_Z6outputPc
	call	_Z8finalizev
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2031:
	.size	main, .-main
	.section	.rodata.str1.1
.LC10:
	.string	"_Z6KernelPKiPfS1_S1_fi"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2059:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC10(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z6KernelPKiPfS1_S1_fi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2059:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.globl	w
	.bss
	.align 8
	.type	w, @object
	.size	w, 8
w:
	.zero	8
	.globl	result
	.align 8
	.type	result, @object
	.size	result, 8
result:
	.zero	8
	.globl	u
	.align 8
	.type	u, @object
	.size	u, 8
u:
	.zero	8
	.globl	z
	.align 8
	.type	z, @object
	.size	z, 8
z:
	.zero	8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC0:
	.long	1065353216
	.align 4
.LC1:
	.long	805306368
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC2:
	.long	-1717986918
	.long	1069128089
	.section	.rodata.cst4
	.align 4
.LC7:
	.long	1065186280
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

/*
  Sample Implementation of
    Yamazaki and Tanaka (2005).
    Neural Modeling of an Internal Clock.
    Neural Computation 17:1032--1058.
  using only global memory of CUDA.

  Licensed under Creative Commons Attribution License (CC-BY)
    http://creativecommons.org/licenses/by/3.0/
 */


#include <hip/hip_runtime.h>
#include<stdio.h>
#include<stdlib.h>
#include<math.h>

#define N 1024 // To be 2^k
#define T 1000
#define Pr 0.1
#define I 1.0
#define Kappa 2.0
#define Tau 100.0

#define BLOCK_SIZE 512

float *z, *u, *result;
int *w;

void initialize()
{
  int i, j, k;

  w = (int *)malloc(N*N*sizeof(int));
  z = (float *)malloc(N*sizeof(float));
  u = (float *)malloc(N*sizeof(float));
  result = (float *)malloc(T*N*sizeof(float));

  for(i = 0; i < N; i++){
    z[i] = 0;
    u[i] = I;
  }

  srand(23);

  for(i = 0; i < N; i++){
    k = 0;
    for(j = 0; j < N; j++){
      if ((float)rand()/(float)RAND_MAX < Pr){
	w[k+N*i] = j;
	k++;
      }
    }
    w[k+N*i] = -1;
  }
}

void finalize()
{
  free(w);
  free(z);
  free(u);
  free(result);
}

__global__ void Kernel(const int *w, float *z, float *u, float *result, const float decay, const int t)
{
  int i = blockIdx.x*BLOCK_SIZE + threadIdx.x;
  int j, k;
  float r;

  r = 0;
  for(k = 0; w[k+N*i] != -1; k++){
    j = w[k+N*i];
    r += z[j];
  }
  u[i] = decay*u[i] + (1 - decay)*I - Kappa*r/N;

  if (u[i] > 0){
    z[i] = u[i];
  }else{
    z[i] = 0;
  }
  result[i+N*t] = z[i];
}

void loop()
{
  float *zd, *ud, *resultd;
  int *wd;
  float decay;
  hipError_t stat;
  int t;

  decay = exp(-1.0/Tau);

  hipMalloc((void**)&wd, N*N*sizeof(int));
  hipMalloc((void**)&zd, N*sizeof(float));
  hipMalloc((void**)&ud, N*sizeof(float));
  hipMalloc((void**)&resultd, N*T*sizeof(float));
  hipMemcpy(wd, w, N*N*sizeof(int), hipMemcpyHostToDevice);
  hipMemcpy(zd, z, N*sizeof(float), hipMemcpyHostToDevice);
  hipMemcpy(ud, u, N*sizeof(float), hipMemcpyHostToDevice);

  dim3 dimBlock(BLOCK_SIZE);
  dim3 dimGrid(N/BLOCK_SIZE);

  for(t = 0; t < T; t++){
    Kernel<<<dimGrid,dimBlock>>>(wd, zd, ud, resultd, decay, t);
  }

  stat = hipMemcpy(result, resultd, N*T*sizeof(float), hipMemcpyDeviceToHost);
  if (stat != hipSuccess){
    puts("error");
  }

  hipFree(wd);
  hipFree(zd);
  hipFree(ud);
  hipFree(resultd);
}

void output(char *prefix)
{
  FILE *f;
  int t, i;
  char fn[1024];

  sprintf(fn, "%s.r", prefix);
  f = fopen(fn, "w");
  for(t = 0; t < T; t++){
    for(i = 0; i < N; i++){
      if (result[i+N*t] > 0){
	fprintf(f, "%d %d\n", t, i);
      }
    }
  }

  fclose(f);
}

int main(int argc, char *argv[])
{
  char *prefix;

  if (argc < 2){
    fprintf(stderr, "%s <prefix>\n", argv[0]);
    exit(1);
  }
  prefix = argv[1];

  initialize();
  loop();
  output(prefix);
  finalize();

  return 0;
}

	.text
	.file	"ic_sparse_cuda.hip"
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z10initializev
.LCPI0_0:
	.long	0x30000000                      # float 4.65661287E-10
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0
.LCPI0_1:
	.quad	0x3fb999999999999a              # double 0.10000000000000001
	.text
	.globl	_Z10initializev
	.type	_Z10initializev,@function
_Z10initializev:                        # @_Z10initializev
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$4194304, %edi                  # imm = 0x400000
	callq	malloc
	movq	%rax, w(%rip)
	movl	$1, %edi
	movl	$4096, %esi                     # imm = 0x1000
	callq	calloc@PLT
	movq	%rax, z(%rip)
	movl	$4096, %edi                     # imm = 0x1000
	callq	malloc
	movq	%rax, %rbx
	movq	%rax, u(%rip)
	movl	$4096000, %edi                  # imm = 0x3E8000
	callq	malloc
	movq	%rax, result(%rip)
	xorl	%eax, %eax
.LBB0_1:                                # =>This Inner Loop Header: Depth=1
	movl	$1065353216, (%rbx,%rax,4)      # imm = 0x3F800000
	incq	%rax
	cmpq	$1024, %rax                     # imm = 0x400
	jne	.LBB0_1
# %bb.2:
	movl	$23, %edi
	callq	srand
	xorl	%ebx, %ebx
.LBB0_3:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB0_4 Depth 2
	movl	%ebx, %r14d
	shll	$10, %r14d
	xorl	%r15d, %r15d
	xorl	%ebp, %ebp
.LBB0_4:                                #   Parent Loop BB0_3 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	.LCPI0_0(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	movsd	.LCPI0_1(%rip), %xmm1           # xmm1 = mem[0],zero
	ucomisd	%xmm0, %xmm1
	jbe	.LBB0_6
# %bb.5:                                #   in Loop: Header=BB0_4 Depth=2
	movq	w(%rip), %rax
	leal	(%r15,%r14), %ecx
	movslq	%ecx, %rcx
	movl	%ebp, (%rax,%rcx,4)
	incl	%r15d
.LBB0_6:                                #   in Loop: Header=BB0_4 Depth=2
	incl	%ebp
	cmpl	$1024, %ebp                     # imm = 0x400
	jne	.LBB0_4
# %bb.7:                                #   in Loop: Header=BB0_3 Depth=1
	movq	w(%rip), %rax
	addl	%r14d, %r15d
	movslq	%r15d, %rcx
	movl	$-1, (%rax,%rcx,4)
	incl	%ebx
	cmpl	$1024, %ebx                     # imm = 0x400
	jne	.LBB0_3
# %bb.8:
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z10initializev, .Lfunc_end0-_Z10initializev
	.cfi_endproc
                                        # -- End function
	.globl	_Z8finalizev                    # -- Begin function _Z8finalizev
	.type	_Z8finalizev,@function
_Z8finalizev:                           # @_Z8finalizev
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movq	w(%rip), %rdi
	callq	free
	movq	z(%rip), %rdi
	callq	free
	movq	u(%rip), %rdi
	callq	free
	movq	result(%rip), %rdi
	popq	%rax
	.cfi_def_cfa_offset 8
	jmp	free                            # TAILCALL
.Lfunc_end1:
	.size	_Z8finalizev, .Lfunc_end1-_Z8finalizev
	.cfi_endproc
                                        # -- End function
	.globl	_Z21__device_stub__KernelPKiPfS1_S1_fi # -- Begin function _Z21__device_stub__KernelPKiPfS1_S1_fi
	.type	_Z21__device_stub__KernelPKiPfS1_S1_fi,@function
_Z21__device_stub__KernelPKiPfS1_S1_fi: # @_Z21__device_stub__KernelPKiPfS1_S1_fi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	12(%rsp), %rcx
	movss	%xmm0, (%rcx)
	leaq	8(%rsp), %r9
	movl	%r8d, (%r9)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r9, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z6KernelPKiPfS1_S1_fi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z21__device_stub__KernelPKiPfS1_S1_fi, .Lfunc_end2-_Z21__device_stub__KernelPKiPfS1_S1_fi
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z4loopv
.LCPI3_0:
	.long	0x3f7d73e8                      # float 0.990049839
	.text
	.globl	_Z4loopv
	.type	_Z4loopv,@function
_Z4loopv:                               # @_Z4loopv
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movabsq	$4294967298, %rbx               # imm = 0x100000002
	leaq	16(%rsp), %r12
	movl	$4194304, %esi                  # imm = 0x400000
	movq	%r12, %rdi
	callq	hipMalloc
	leaq	32(%rsp), %r15
	movl	$4096, %esi                     # imm = 0x1000
	movq	%r15, %rdi
	callq	hipMalloc
	leaq	24(%rsp), %r14
	movl	$4096, %esi                     # imm = 0x1000
	movq	%r14, %rdi
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	movl	$4096000, %esi                  # imm = 0x3E8000
	callq	hipMalloc
	movq	(%r12), %rdi
	movq	w(%rip), %rsi
	movl	$4194304, %edx                  # imm = 0x400000
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r15), %rdi
	movq	z(%rip), %rsi
	movl	$4096, %edx                     # imm = 0x1000
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r14), %rdi
	movq	u(%rip), %rsi
	movl	$4096, %edx                     # imm = 0x1000
	movl	$1, %ecx
	callq	hipMemcpy
	xorl	%r14d, %r14d
	leaq	510(%rbx), %r15
.LBB3_1:                                # =>This Inner Loop Header: Depth=1
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_3
# %bb.2:                                #   in Loop: Header=BB3_1 Depth=1
	movq	16(%rsp), %rdi
	movq	32(%rsp), %rsi
	movq	24(%rsp), %rdx
	movq	8(%rsp), %rcx
	movss	.LCPI3_0(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	movl	%r14d, %r8d
	callq	_Z21__device_stub__KernelPKiPfS1_S1_fi
.LBB3_3:                                #   in Loop: Header=BB3_1 Depth=1
	incl	%r14d
	cmpl	$1000, %r14d                    # imm = 0x3E8
	jne	.LBB3_1
# %bb.4:
	movq	result(%rip), %rdi
	movq	8(%rsp), %rsi
	movl	$4096000, %edx                  # imm = 0x3E8000
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	je	.LBB3_6
# %bb.5:
	movl	$.L.str, %edi
	callq	puts
.LBB3_6:
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z4loopv, .Lfunc_end3-_Z4loopv
	.cfi_endproc
                                        # -- End function
	.globl	_Z6outputPc                     # -- Begin function _Z6outputPc
	.type	_Z6outputPc,@function
_Z6outputPc:                            # @_Z6outputPc
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$1032, %rsp                     # imm = 0x408
	.cfi_def_cfa_offset 1072
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdi, %rdx
	movq	%rsp, %rbx
	movl	$.L.str.1, %esi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	sprintf
	movl	$.L.str.2, %esi
	movq	%rbx, %rdi
	callq	fopen
	movq	%rax, %rbx
	movq	result(%rip), %rax
	xorps	%xmm1, %xmm1
	xorl	%r12d, %r12d
	xorl	%r14d, %r14d
.LBB4_1:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB4_2 Depth 2
	xorl	%r15d, %r15d
.LBB4_2:                                #   Parent Loop BB4_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	leaq	(%rax,%r12), %rcx
	movss	(%rcx,%r15,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	ucomiss	%xmm1, %xmm0
	jbe	.LBB4_4
# %bb.3:                                #   in Loop: Header=BB4_2 Depth=2
	movl	$.L.str.3, %esi
	movq	%rbx, %rdi
	movl	%r14d, %edx
	movl	%r15d, %ecx
	xorl	%eax, %eax
	callq	fprintf
	xorps	%xmm1, %xmm1
	movq	result(%rip), %rax
.LBB4_4:                                #   in Loop: Header=BB4_2 Depth=2
	incq	%r15
	cmpq	$1024, %r15                     # imm = 0x400
	jne	.LBB4_2
# %bb.5:                                #   in Loop: Header=BB4_1 Depth=1
	incq	%r14
	addq	$4096, %r12                     # imm = 0x1000
	cmpq	$1000, %r14                     # imm = 0x3E8
	jne	.LBB4_1
# %bb.6:
	movq	%rbx, %rdi
	addq	$1032, %rsp                     # imm = 0x408
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	fclose                          # TAILCALL
.Lfunc_end4:
	.size	_Z6outputPc, .Lfunc_end4-_Z6outputPc
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	cmpl	$1, %edi
	jle	.LBB5_2
# %bb.1:
	movq	8(%rsi), %rbx
	callq	_Z10initializev
	callq	_Z4loopv
	movq	%rbx, %rdi
	callq	_Z6outputPc
	callq	_Z8finalizev
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.LBB5_2:
	.cfi_def_cfa_offset 16
	movq	stderr(%rip), %rdi
	movq	(%rsi), %rdx
	movl	$.L.str.4, %esi
	xorl	%eax, %eax
	callq	fprintf
	movl	$1, %edi
	callq	exit
.Lfunc_end5:
	.size	main, .Lfunc_end5-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB6_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB6_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z6KernelPKiPfS1_S1_fi, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end6:
	.size	__hip_module_ctor, .Lfunc_end6-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB7_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB7_2:
	retq
.Lfunc_end7:
	.size	__hip_module_dtor, .Lfunc_end7-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	z,@object                       # @z
	.bss
	.globl	z
	.p2align	3, 0x0
z:
	.quad	0
	.size	z, 8

	.type	u,@object                       # @u
	.globl	u
	.p2align	3, 0x0
u:
	.quad	0
	.size	u, 8

	.type	result,@object                  # @result
	.globl	result
	.p2align	3, 0x0
result:
	.quad	0
	.size	result, 8

	.type	w,@object                       # @w
	.globl	w
	.p2align	3, 0x0
w:
	.quad	0
	.size	w, 8

	.type	_Z6KernelPKiPfS1_S1_fi,@object  # @_Z6KernelPKiPfS1_S1_fi
	.section	.rodata,"a",@progbits
	.globl	_Z6KernelPKiPfS1_S1_fi
	.p2align	3, 0x0
_Z6KernelPKiPfS1_S1_fi:
	.quad	_Z21__device_stub__KernelPKiPfS1_S1_fi
	.size	_Z6KernelPKiPfS1_S1_fi, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"error"
	.size	.L.str, 6

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"%s.r"
	.size	.L.str.1, 5

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"w"
	.size	.L.str.2, 2

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"%d %d\n"
	.size	.L.str.3, 7

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"%s <prefix>\n"
	.size	.L.str.4, 13

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z6KernelPKiPfS1_S1_fi"
	.size	.L__unnamed_1, 23

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z21__device_stub__KernelPKiPfS1_S1_fi
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z6KernelPKiPfS1_S1_fi
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z6KernelPKiPfS1_S1_fi  ; -- Begin function _Z6KernelPKiPfS1_S1_fi
	.globl	_Z6KernelPKiPfS1_S1_fi
	.p2align	8
	.type	_Z6KernelPKiPfS1_S1_fi,@function
_Z6KernelPKiPfS1_S1_fi:                 ; @_Z6KernelPKiPfS1_S1_fi
; %bb.0:
	v_lshl_add_u32 v0, s15, 9, v0
	s_load_b256 s[4:11], s[0:1], 0x0
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v1, 10, v0
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v4, vcc_lo, s4, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v2, vcc_lo
	v_mov_b32_e32 v2, 0
	v_mov_b32_e32 v3, 0
	global_load_b32 v1, v[4:5], off
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u32_e32 -1, v1
	s_cbranch_execz .LBB0_4
; %bb.1:                                ; %.lr.ph.preheader
	v_add_co_u32 v3, vcc_lo, v4, 4
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v5, vcc_lo
	v_mov_b32_e32 v5, 0
	s_mov_b32 s4, 0
.LBB0_2:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v6, vcc_lo, s6, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v7, vcc_lo, s7, v2, vcc_lo
	global_load_b32 v1, v[3:4], off
	global_load_b32 v2, v[6:7], off
	v_add_co_u32 v3, vcc_lo, v3, 4
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
	s_waitcnt vmcnt(1)
	v_cmp_eq_u32_e64 s2, -1, v1
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v5, v5, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s4, s2, s4
	s_and_not1_b32 exec_lo, exec_lo, s4
	s_cbranch_execnz .LBB0_2
; %bb.3:                                ; %._crit_edge.loopexit
	s_or_b32 exec_lo, exec_lo, s4
	v_cvt_f64_f32_e32 v[1:2], v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[1:2], v[1:2], v[1:2]
	v_ldexp_f64 v[2:3], v[1:2], -10
.LBB0_4:                                ; %Flow
	s_or_b32 exec_lo, exec_lo, s3
	v_ashrrev_i32_e32 v1, 31, v0
	s_load_b64 s[0:1], s[0:1], 0x20
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 2, v[0:1]
	v_add_co_u32 v6, vcc_lo, s8, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v7, vcc_lo, s9, v5, vcc_lo
	global_load_b32 v1, v[6:7], off
	s_waitcnt lgkmcnt(0)
	v_sub_f32_e64 v8, 1.0, s0
	v_lshl_add_u32 v0, s1, 10, v0
	v_cvt_f64_f32_e32 v[8:9], v8
	s_waitcnt vmcnt(0)
	v_mul_f32_e32 v1, s0, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f64_f32_e32 v[10:11], v1
	v_add_f64 v[8:9], v[8:9], v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[1:2], v[8:9], -v[2:3]
	v_cvt_f32_f64_e32 v8, v[1:2]
	v_ashrrev_i32_e32 v1, 31, v0
	v_add_co_u32 v2, vcc_lo, s6, v4
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	v_add_co_u32 v0, vcc_lo, s10, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s11, v1, vcc_lo
	v_max_f32_e32 v4, 0, v8
	global_store_b32 v[6:7], v8, off
	global_store_b32 v[2:3], v4, off
	global_store_b32 v[0:1], v4, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z6KernelPKiPfS1_S1_fi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 40
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 12
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z6KernelPKiPfS1_S1_fi, .Lfunc_end0-_Z6KernelPKiPfS1_S1_fi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 436
; NumSgprs: 18
; NumVgprs: 12
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 12
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         36
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 40
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z6KernelPKiPfS1_S1_fi
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z6KernelPKiPfS1_S1_fi.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     12
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
