#include <stdio.h>
#include <stdlib.h>
#include <cuda_runtime.h>
#include <iostream>
#include <fstream>

int set_grid(int SIZE, int BLOCK_SIZE)
{
  return SIZE/BLOCK_SIZE + ((SIZE % BLOCK_SIZE)? 1 : 0);
}

// Performs one step of the hillis and steele algorithm for integers
__global__ void hs_kernel_global(int *d_out, int *d_in, int step, int SIZE) {
	// setting ID
	int tid = threadIdx.x + blockDim.x * blockIdx.x;
	// checking if out-of-bounds
	if (tid >= SIZE) return;
	// setting itself
	int val = d_in[tid];
	// finding the number to add, checking out-of-bounds
	int toAdd = (((tid - step) < 0) ? 0 : d_in[tid - step]);
	// setting output
	d_out[tid] = val + toAdd;
}

void hs_kernel_wrapper(int * d_out, int * d_in, int SIZE, unsigned int BYTES, int NUM_THREADS) {
	// initializing starting variables
	int NUM_BLOCKS = SIZE/NUM_THREADS + 1;
	// initializing and allocating an "intermediate" value so we don't have to change anything in d_in
	int *d_intermediate;
	cudaMalloc((void **) &d_intermediate, BYTES);
	cudaMemcpy(d_intermediate, d_in, BYTES, cudaMemcpyDeviceToDevice);

  // stops when step is larger than array size, happens at O(log2(SIZE))
  for (int step = 1; step < SIZE; step <<= 1) {
		hs_kernel_global<<<NUM_BLOCKS, NUM_THREADS>>>(d_out, d_intermediate, step, SIZE);
		cudaMemcpy(d_intermediate, d_out, BYTES, cudaMemcpyDeviceToDevice);
	}
	cudaFree(d_intermediate);
}


/* -------- MAIN -------- */
int main(int argc, char **argv)
{
  std::ofstream myfile;
  myfile.open ("par_scan.csv");
  // Setting NUM_THREADS
  const unsigned int times = 10;
  for (unsigned int rounds = 0; rounds<30; rounds++)
  {
//    printf("Round: %d\n", rounds);
    int NUM_THREADS = 1<<10;
    // Making non-bogus data and setting it on the GPU
    int SIZE = 1<<rounds;
    unsigned int BYTES = SIZE * sizeof(int);
    int * d_in;
    int * d_out;
    cudaMalloc(&d_in, sizeof(int)*SIZE);
    cudaMalloc(&d_out, sizeof(int)*SIZE);
    int * h_in = (int *)malloc(SIZE*sizeof(int));
    int * h_out = (int *)malloc(SIZE*sizeof(int));
    for (unsigned int i = 0; i <  SIZE; i++) h_in[i] = 1;
    cudaMemcpy(d_in, h_in, BYTES, cudaMemcpyHostToDevice);

    // Running kernel wrapper
    // setting up time
    cudaEvent_t start, stop;
    cudaEventCreate(&start);
    cudaEventCreate(&stop);

    // kernel time!!!
    cudaEventRecord(start, 0);

    for (unsigned int i = 0; i < times; i++)
    {
      hs_kernel_wrapper(d_out, d_in, SIZE, BYTES, NUM_THREADS);

    }
    cudaEventRecord(stop, 0);
    cudaEventSynchronize(stop);

    // calculating time
    float elapsedTime;
    cudaEventElapsedTime(&elapsedTime, start, stop);    
    elapsedTime = elapsedTime / ((float) times);
    printf("time!: %.5f\n", elapsedTime);
    cudaMemcpy(h_out, d_out, BYTES, cudaMemcpyDeviceToHost);
//    printf("%d \n", h_out);
    myfile << elapsedTime << "," << std::endl;
  }
  myfile.close();
  return 0;

}

	.file	"tmpxft_0022faaf_00000000-6_PARALLEL_hs_scan.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3771:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3771:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z8set_gridii
	.type	_Z8set_gridii, @function
_Z8set_gridii:
.LFB3766:
	.cfi_startproc
	endbr64
	movl	%edi, %eax
	cltd
	idivl	%esi
	cmpl	$1, %edx
	sbbl	$-1, %eax
	ret
	.cfi_endproc
.LFE3766:
	.size	_Z8set_gridii, .-_Z8set_gridii
	.globl	_Z40__device_stub__Z16hs_kernel_globalPiS_iiPiS_ii
	.type	_Z40__device_stub__Z16hs_kernel_globalPiS_iiPiS_ii, @function
_Z40__device_stub__Z16hs_kernel_globalPiS_iiPiS_ii:
.LFB3793:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L3
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z16hs_kernel_globalPiS_ii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L3:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L5
	call	__stack_chk_fail@PLT
.L5:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3793:
	.size	_Z40__device_stub__Z16hs_kernel_globalPiS_iiPiS_ii, .-_Z40__device_stub__Z16hs_kernel_globalPiS_iiPiS_ii
	.globl	_Z16hs_kernel_globalPiS_ii
	.type	_Z16hs_kernel_globalPiS_ii, @function
_Z16hs_kernel_globalPiS_ii:
.LFB3794:
	.cfi_startproc
	endbr64
	jmp	_Z40__device_stub__Z16hs_kernel_globalPiS_iiPiS_ii
	.cfi_endproc
.LFE3794:
	.size	_Z16hs_kernel_globalPiS_ii, .-_Z16hs_kernel_globalPiS_ii
	.globl	_Z17hs_kernel_wrapperPiS_iji
	.type	_Z17hs_kernel_wrapperPiS_iji, @function
_Z17hs_kernel_wrapperPiS_iji:
.LFB3767:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movabsq	$4294967297, %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rdi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rsi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movl	%r8d, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%edx, %ebx
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	movl	%edx, %eax
	leaq	24(%rsp), %rdi
	cltd
	idivl	%r8d
	leal	1(%rax), %r14d
	movl	%ecx, %eax
	movq	%rax, %rsi
	movq	%rax, 8(%rsp)
	call	cudaMalloc@PLT
	movq	8(%rsp), %rdx
	movq	24(%rsp), %rdi
	movq	%r12, %rsi
	movl	$3, %ecx
	movl	$1, %r12d
	call	cudaMemcpy@PLT
.L10:
	cmpl	%ebx, %r12d
	jge	.L15
	movq	%r15, 48(%rsp)
	movl	52(%rsp), %ecx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%r15, 36(%rsp)
	movl	40(%rsp), %esi
	movl	%ebp, 44(%rsp)
	movq	44(%rsp), %rdx
	movl	%r14d, 32(%rsp)
	movq	32(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L11
	movq	24(%rsp), %rsi
	movl	%ebx, %ecx
	movl	%r12d, %edx
	movq	%r13, %rdi
	call	_Z40__device_stub__Z16hs_kernel_globalPiS_iiPiS_ii
.L11:
	movq	8(%rsp), %rdx
	movq	24(%rsp), %rdi
	movq	%r13, %rsi
	addl	%r12d, %r12d
	movl	$3, %ecx
	call	cudaMemcpy@PLT
	jmp	.L10
.L15:
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L13
	call	__stack_chk_fail@PLT
.L13:
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3767:
	.size	_Z17hs_kernel_wrapperPiS_iji, .-_Z17hs_kernel_wrapperPiS_iji
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z16hs_kernel_globalPiS_ii"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3796:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z16hs_kernel_globalPiS_ii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3796:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.rodata.str1.1
.LC1:
	.string	"par_scan.csv"
.LC3:
	.string	"time!: %.5f\n"
.LC4:
	.string	","
	.section	.text.startup
	.globl	main
	.type	main, @function
main:
.LFB3768:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA3768
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$584, %rsp
	.cfi_def_cfa_offset 640
	movq	%fs:40, %rax
	movq	%rax, 568(%rsp)
	xorl	%eax, %eax
	leaq	56(%rsp), %rbx
	movq	%rbx, %rdi
.LEHB0:
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEEC1Ev@PLT
.LEHE0:
	movl	$16, %edx
	leaq	.LC1(%rip), %rsi
	movq	%rbx, %rdi
.LEHB1:
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEE4openEPKcSt13_Ios_Openmode@PLT
	xorl	%ebp, %ebp
.L21:
	movl	%ebp, %ecx
	movl	$1, %r12d
	movl	$4, %r15d
	sall	%cl, %r12d
	leaq	24(%rsp), %rdi
	sall	%cl, %r15d
	movslq	%r12d, %rax
	salq	$2, %rax
	movq	%rax, %rsi
	movq	%rax, 8(%rsp)
	call	cudaMalloc@PLT
	movq	8(%rsp), %rsi
	leaq	32(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rdi
	call	malloc@PLT
	movq	8(%rsp), %rdi
	movq	%rax, %r14
	call	malloc@PLT
	movq	%rax, %r13
	xorl	%eax, %eax
.L19:
	movl	$1, (%r14,%rax,4)
	incq	%rax
	cmpl	%r12d, %eax
	jb	.L19
	movq	8(%rsp), %rdx
	movq	24(%rsp), %rdi
	movl	$1, %ecx
	movq	%r14, %rsi
	call	cudaMemcpy@PLT
	leaq	40(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	48(%rsp), %rdi
	call	cudaEventCreate@PLT
	movq	40(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movl	$10, %r14d
.L20:
	movq	24(%rsp), %rsi
	movq	32(%rsp), %rdi
	movl	%r15d, %ecx
	movl	%r12d, %edx
	movl	$1024, %r8d
	call	_Z17hs_kernel_wrapperPiS_iji
	decl	%r14d
	jne	.L20
	movq	48(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	48(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	48(%rsp), %rdx
	movq	40(%rsp), %rsi
	leaq	20(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	movss	20(%rsp), %xmm0
	divss	.LC2(%rip), %xmm0
	movss	%xmm0, 20(%rsp)
	cvtss2sd	%xmm0, %xmm0
	call	__printf_chk@PLT
	movq	8(%rsp), %rdx
	movq	32(%rsp), %rsi
	movl	$2, %ecx
	movq	%r13, %rdi
	call	cudaMemcpy@PLT
	movq	%rbx, %rdi
	cvtss2sd	20(%rsp), %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%rax, %rdi
	leaq	.LC4(%rip), %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	incl	%ebp
	cmpl	$30, %ebp
	jne	.L21
	movq	%rbx, %rdi
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEE5closeEv@PLT
.LEHE1:
	movq	%rbx, %rdi
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev@PLT
	movq	568(%rsp), %rax
	subq	%fs:40, %rax
	je	.L24
	jmp	.L29
.L25:
	endbr64
	movq	%rax, %rbp
.L22:
	movq	%rbx, %rdi
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev@PLT
	movq	568(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L29
	movq	%rbp, %rdi
.LEHB2:
	call	_Unwind_Resume@PLT
.LEHE2:
.L29:
	call	__stack_chk_fail@PLT
.L24:
	addq	$584, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3768:
	.globl	__gxx_personality_v0
	.section	.gcc_except_table,"a",@progbits
.LLSDA3768:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE3768-.LLSDACSB3768
.LLSDACSB3768:
	.uleb128 .LEHB0-.LFB3768
	.uleb128 .LEHE0-.LEHB0
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB1-.LFB3768
	.uleb128 .LEHE1-.LEHB1
	.uleb128 .L25-.LFB3768
	.uleb128 0
	.uleb128 .LEHB2-.LFB3768
	.uleb128 .LEHE2-.LEHB2
	.uleb128 0
	.uleb128 0
.LLSDACSE3768:
	.section	.text.startup
	.size	main, .-main
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC2:
	.long	1092616192
	.hidden	DW.ref.__gxx_personality_v0
	.weak	DW.ref.__gxx_personality_v0
	.section	.data.rel.local.DW.ref.__gxx_personality_v0,"awG",@progbits,DW.ref.__gxx_personality_v0,comdat
	.align 8
	.type	DW.ref.__gxx_personality_v0, @object
	.size	DW.ref.__gxx_personality_v0, 8
DW.ref.__gxx_personality_v0:
	.quad	__gxx_personality_v0
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <stdio.h>
#include <stdlib.h>
#include <hip/hip_runtime.h>
#include <iostream>
#include <fstream>

int set_grid(int SIZE, int BLOCK_SIZE)
{
  return SIZE/BLOCK_SIZE + ((SIZE % BLOCK_SIZE)? 1 : 0);
}

// Performs one step of the hillis and steele algorithm for integers
__global__ void hs_kernel_global(int *d_out, int *d_in, int step, int SIZE) {
	// setting ID
	int tid = threadIdx.x + blockDim.x * blockIdx.x;
	// checking if out-of-bounds
	if (tid >= SIZE) return;
	// setting itself
	int val = d_in[tid];
	// finding the number to add, checking out-of-bounds
	int toAdd = (((tid - step) < 0) ? 0 : d_in[tid - step]);
	// setting output
	d_out[tid] = val + toAdd;
}

void hs_kernel_wrapper(int * d_out, int * d_in, int SIZE, unsigned int BYTES, int NUM_THREADS) {
	// initializing starting variables
	int NUM_BLOCKS = SIZE/NUM_THREADS + 1;
	// initializing and allocating an "intermediate" value so we don't have to change anything in d_in
	int *d_intermediate;
	hipMalloc((void **) &d_intermediate, BYTES);
	hipMemcpy(d_intermediate, d_in, BYTES, hipMemcpyDeviceToDevice);

  // stops when step is larger than array size, happens at O(log2(SIZE))
  for (int step = 1; step < SIZE; step <<= 1) {
		hs_kernel_global<<<NUM_BLOCKS, NUM_THREADS>>>(d_out, d_intermediate, step, SIZE);
		hipMemcpy(d_intermediate, d_out, BYTES, hipMemcpyDeviceToDevice);
	}
	hipFree(d_intermediate);
}


/* -------- MAIN -------- */
int main(int argc, char **argv)
{
  std::ofstream myfile;
  myfile.open ("par_scan.csv");
  // Setting NUM_THREADS
  const unsigned int times = 10;
  for (unsigned int rounds = 0; rounds<30; rounds++)
  {
//    printf("Round: %d\n", rounds);
    int NUM_THREADS = 1<<10;
    // Making non-bogus data and setting it on the GPU
    int SIZE = 1<<rounds;
    unsigned int BYTES = SIZE * sizeof(int);
    int * d_in;
    int * d_out;
    hipMalloc(&d_in, sizeof(int)*SIZE);
    hipMalloc(&d_out, sizeof(int)*SIZE);
    int * h_in = (int *)malloc(SIZE*sizeof(int));
    int * h_out = (int *)malloc(SIZE*sizeof(int));
    for (unsigned int i = 0; i <  SIZE; i++) h_in[i] = 1;
    hipMemcpy(d_in, h_in, BYTES, hipMemcpyHostToDevice);

    // Running kernel wrapper
    // setting up time
    hipEvent_t start, stop;
    hipEventCreate(&start);
    hipEventCreate(&stop);

    // kernel time!!!
    hipEventRecord(start, 0);

    for (unsigned int i = 0; i < times; i++)
    {
      hs_kernel_wrapper(d_out, d_in, SIZE, BYTES, NUM_THREADS);

    }
    hipEventRecord(stop, 0);
    hipEventSynchronize(stop);

    // calculating time
    float elapsedTime;
    hipEventElapsedTime(&elapsedTime, start, stop);    
    elapsedTime = elapsedTime / ((float) times);
    printf("time!: %.5f\n", elapsedTime);
    hipMemcpy(h_out, d_out, BYTES, hipMemcpyDeviceToHost);
//    printf("%d \n", h_out);
    myfile << elapsedTime << "," << std::endl;
  }
  myfile.close();
  return 0;

}

	.text
	.file	"PARALLEL_hs_scan.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z8set_gridii                   # -- Begin function _Z8set_gridii
	.type	_Z8set_gridii,@function
_Z8set_gridii:                          # @_Z8set_gridii
	.cfi_startproc
# %bb.0:
	movl	%edi, %eax
	cltd
	idivl	%esi
	cmpl	$1, %edx
	sbbl	$-1, %eax
	retq
.Lfunc_end0:
	.size	_Z8set_gridii, .Lfunc_end0-_Z8set_gridii
	.cfi_endproc
                                        # -- End function
	.globl	_Z31__device_stub__hs_kernel_globalPiS_ii # -- Begin function _Z31__device_stub__hs_kernel_globalPiS_ii
	.type	_Z31__device_stub__hs_kernel_globalPiS_ii,@function
_Z31__device_stub__hs_kernel_globalPiS_ii: # @_Z31__device_stub__hs_kernel_globalPiS_ii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16hs_kernel_globalPiS_ii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z31__device_stub__hs_kernel_globalPiS_ii, .Lfunc_end1-_Z31__device_stub__hs_kernel_globalPiS_ii
	.cfi_endproc
                                        # -- End function
	.globl	_Z17hs_kernel_wrapperPiS_iji    # -- Begin function _Z17hs_kernel_wrapperPiS_iji
	.type	_Z17hs_kernel_wrapperPiS_iji,@function
_Z17hs_kernel_wrapperPiS_iji:           # @_Z17hs_kernel_wrapperPiS_iji
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r8d, %ebp
	movl	%edx, %ebx
	movq	%rsi, %r12
	movq	%rdi, %r14
	movl	%ecx, %r15d
	movq	%rsp, %r13
	movq	%r13, %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	movq	(%r13), %rdi
	movq	%r12, %rsi
	movq	%r15, %rdx
	movl	$3, %ecx
	callq	hipMemcpy
	cmpl	$2, %ebx
	jl	.LBB2_5
# %bb.1:                                # %.lr.ph
	movl	%ebx, %eax
	cltd
	idivl	%ebp
	movl	%eax, %r12d
	incl	%r12d
	btsq	$32, %r12
	movl	%ebp, %r13d
	btsq	$32, %r13
	movl	$1, %ebp
.LBB2_2:                                # =>This Inner Loop Header: Depth=1
	movq	%r12, %rdi
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_4
# %bb.3:                                #   in Loop: Header=BB2_2 Depth=1
	movq	(%rsp), %rsi
	movq	%r14, %rdi
	movl	%ebp, %edx
	movl	%ebx, %ecx
	callq	_Z31__device_stub__hs_kernel_globalPiS_ii
.LBB2_4:                                #   in Loop: Header=BB2_2 Depth=1
	movq	(%rsp), %rdi
	movq	%r14, %rsi
	movq	%r15, %rdx
	movl	$3, %ecx
	callq	hipMemcpy
	addl	%ebp, %ebp
	cmpl	%ebx, %ebp
	jl	.LBB2_2
.LBB2_5:                                # %._crit_edge
	movq	(%rsp), %rdi
	callq	hipFree
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z17hs_kernel_wrapperPiS_iji, .Lfunc_end2-_Z17hs_kernel_wrapperPiS_iji
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI3_0:
	.long	0x41200000                      # float 10
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
.Lfunc_begin0:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception0
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$552, %rsp                      # imm = 0x228
	.cfi_def_cfa_offset 608
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	leaq	40(%rsp), %rbx
	movq	%rbx, %rdi
	callq	_ZNSt14basic_ofstreamIcSt11char_traitsIcEEC1Ev
.Ltmp0:
	movl	$.L.str, %esi
	movq	%rbx, %rdi
	movl	$16, %edx
	callq	_ZNSt14basic_ofstreamIcSt11char_traitsIcEE4openEPKcSt13_Ios_Openmode
.Ltmp1:
# %bb.1:                                # %.preheader41.preheader
	xorl	%ebx, %ebx
.LBB3_2:                                # %.preheader41
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_5 Depth 2
                                        #     Child Loop BB3_11 Depth 2
	movl	$1, %r12d
	movl	%ebx, %ecx
	shll	%cl, %r12d
	leaq	(,%r12,4), %r13
.Ltmp3:
	leaq	32(%rsp), %rdi
	movq	%r13, %rsi
	callq	hipMalloc
.Ltmp4:
# %bb.3:                                # %_ZL9hipMallocIiE10hipError_tPPT_m.exit
                                        #   in Loop: Header=BB3_2 Depth=1
.Ltmp5:
	leaq	24(%rsp), %rdi
	movq	%r13, %rsi
	callq	hipMalloc
.Ltmp6:
# %bb.4:                                # %_ZL9hipMallocIiE10hipError_tPPT_m.exit38
                                        #   in Loop: Header=BB3_2 Depth=1
	movq	%r13, %rdi
	callq	malloc
	movq	%rax, %r14
	movq	%r13, %rdi
	callq	malloc
	movq	%rax, %r15
	xorl	%eax, %eax
.LBB3_5:                                #   Parent Loop BB3_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	$1, (%r14,%rax,4)
	incq	%rax
	cmpq	%rax, %r12
	jne	.LBB3_5
# %bb.6:                                #   in Loop: Header=BB3_2 Depth=1
	movq	32(%rsp), %rdi
	movl	%r13d, %ebp
	andl	$-4, %ebp
.Ltmp8:
	movq	%r14, %rsi
	movq	%rbp, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
.Ltmp9:
# %bb.7:                                #   in Loop: Header=BB3_2 Depth=1
.Ltmp11:
	leaq	16(%rsp), %rdi
	callq	hipEventCreate
.Ltmp12:
# %bb.8:                                #   in Loop: Header=BB3_2 Depth=1
.Ltmp13:
	leaq	8(%rsp), %rdi
	callq	hipEventCreate
.Ltmp14:
# %bb.9:                                #   in Loop: Header=BB3_2 Depth=1
	movq	16(%rsp), %rdi
.Ltmp15:
	xorl	%esi, %esi
	callq	hipEventRecord
.Ltmp16:
# %bb.10:                               # %.preheader.preheader
                                        #   in Loop: Header=BB3_2 Depth=1
	movl	$10, %r14d
.LBB3_11:                               # %.preheader
                                        #   Parent Loop BB3_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movq	24(%rsp), %rdi
	movq	32(%rsp), %rsi
.Ltmp17:
	movl	%r12d, %edx
	movl	%r13d, %ecx
	movl	$1024, %r8d                     # imm = 0x400
	callq	_Z17hs_kernel_wrapperPiS_iji
.Ltmp18:
# %bb.12:                               #   in Loop: Header=BB3_11 Depth=2
	decl	%r14d
	jne	.LBB3_11
# %bb.13:                               #   in Loop: Header=BB3_2 Depth=1
	movq	8(%rsp), %rdi
.Ltmp20:
	xorl	%esi, %esi
	callq	hipEventRecord
.Ltmp21:
# %bb.14:                               #   in Loop: Header=BB3_2 Depth=1
	movq	8(%rsp), %rdi
.Ltmp22:
	callq	hipEventSynchronize
.Ltmp23:
# %bb.15:                               #   in Loop: Header=BB3_2 Depth=1
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
.Ltmp25:
	leaq	4(%rsp), %rdi
	callq	hipEventElapsedTime
.Ltmp26:
# %bb.16:                               #   in Loop: Header=BB3_2 Depth=1
	movss	4(%rsp), %xmm0                  # xmm0 = mem[0],zero,zero,zero
	divss	.LCPI3_0(%rip), %xmm0
	movss	%xmm0, 4(%rsp)
	cvtss2sd	%xmm0, %xmm0
	movl	$.L.str.1, %edi
	movb	$1, %al
	callq	printf
	movq	24(%rsp), %rsi
.Ltmp27:
	movq	%r15, %rdi
	movq	%rbp, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
.Ltmp28:
# %bb.17:                               #   in Loop: Header=BB3_2 Depth=1
	xorps	%xmm0, %xmm0
	cvtss2sd	4(%rsp), %xmm0
.Ltmp29:
	leaq	40(%rsp), %rdi
	callq	_ZNSo9_M_insertIdEERSoT_
.Ltmp30:
# %bb.18:                               # %_ZNSolsEf.exit
                                        #   in Loop: Header=BB3_2 Depth=1
.Ltmp31:
	movq	%rax, %r15
	movl	$.L.str.2, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp32:
# %bb.19:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit
                                        #   in Loop: Header=BB3_2 Depth=1
	movq	(%r15), %rax
	movq	-24(%rax), %rdi
	addq	%r15, %rdi
.Ltmp33:
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp34:
# %bb.20:                               # %.noexc
                                        #   in Loop: Header=BB3_2 Depth=1
.Ltmp35:
	movsbl	%al, %esi
	movq	%r15, %rdi
	callq	_ZNSo3putEc
.Ltmp36:
# %bb.21:                               # %.noexc39
                                        #   in Loop: Header=BB3_2 Depth=1
.Ltmp37:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp38:
# %bb.22:                               # %_ZNSolsEPFRSoS_E.exit
                                        #   in Loop: Header=BB3_2 Depth=1
	incl	%ebx
	cmpl	$30, %ebx
	jne	.LBB3_2
# %bb.23:
.Ltmp40:
	leaq	40(%rsp), %rdi
	callq	_ZNSt14basic_ofstreamIcSt11char_traitsIcEE5closeEv
.Ltmp41:
# %bb.24:
	movq	_ZTTSt14basic_ofstreamIcSt11char_traitsIcEE(%rip), %rax
	leaq	48(%rsp), %rdi
	movq	%rax, -8(%rdi)
	movq	_ZTTSt14basic_ofstreamIcSt11char_traitsIcEE+24(%rip), %rcx
	movq	-24(%rax), %rax
	movq	%rcx, 40(%rsp,%rax)
	callq	_ZNSt13basic_filebufIcSt11char_traitsIcEED2Ev
	leaq	288(%rsp), %rdi
	callq	_ZNSt8ios_baseD2Ev
	xorl	%eax, %eax
	addq	$552, %rsp                      # imm = 0x228
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB3_29:
	.cfi_def_cfa_offset 608
.Ltmp42:
	jmp	.LBB3_30
.LBB3_31:
.Ltmp2:
	jmp	.LBB3_30
.LBB3_25:
.Ltmp10:
	jmp	.LBB3_30
.LBB3_32:
.Ltmp7:
	jmp	.LBB3_30
.LBB3_26:
.Ltmp24:
	jmp	.LBB3_30
.LBB3_28:
.Ltmp39:
	jmp	.LBB3_30
.LBB3_27:
.Ltmp19:
.LBB3_30:
	movq	%rax, %rbx
	leaq	40(%rsp), %rdi
	callq	_ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev
	movq	%rbx, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end3:
	.size	main, .Lfunc_end3-main
	.cfi_endproc
	.section	.gcc_except_table,"a",@progbits
	.p2align	2, 0x0
GCC_except_table3:
.Lexception0:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end0-.Lcst_begin0
.Lcst_begin0:
	.uleb128 .Lfunc_begin0-.Lfunc_begin0    # >> Call Site 1 <<
	.uleb128 .Ltmp0-.Lfunc_begin0           #   Call between .Lfunc_begin0 and .Ltmp0
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp0-.Lfunc_begin0           # >> Call Site 2 <<
	.uleb128 .Ltmp1-.Ltmp0                  #   Call between .Ltmp0 and .Ltmp1
	.uleb128 .Ltmp2-.Lfunc_begin0           #     jumps to .Ltmp2
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp3-.Lfunc_begin0           # >> Call Site 3 <<
	.uleb128 .Ltmp6-.Ltmp3                  #   Call between .Ltmp3 and .Ltmp6
	.uleb128 .Ltmp7-.Lfunc_begin0           #     jumps to .Ltmp7
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp8-.Lfunc_begin0           # >> Call Site 4 <<
	.uleb128 .Ltmp9-.Ltmp8                  #   Call between .Ltmp8 and .Ltmp9
	.uleb128 .Ltmp10-.Lfunc_begin0          #     jumps to .Ltmp10
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp11-.Lfunc_begin0          # >> Call Site 5 <<
	.uleb128 .Ltmp16-.Ltmp11                #   Call between .Ltmp11 and .Ltmp16
	.uleb128 .Ltmp24-.Lfunc_begin0          #     jumps to .Ltmp24
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp17-.Lfunc_begin0          # >> Call Site 6 <<
	.uleb128 .Ltmp18-.Ltmp17                #   Call between .Ltmp17 and .Ltmp18
	.uleb128 .Ltmp19-.Lfunc_begin0          #     jumps to .Ltmp19
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp20-.Lfunc_begin0          # >> Call Site 7 <<
	.uleb128 .Ltmp23-.Ltmp20                #   Call between .Ltmp20 and .Ltmp23
	.uleb128 .Ltmp24-.Lfunc_begin0          #     jumps to .Ltmp24
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp25-.Lfunc_begin0          # >> Call Site 8 <<
	.uleb128 .Ltmp38-.Ltmp25                #   Call between .Ltmp25 and .Ltmp38
	.uleb128 .Ltmp39-.Lfunc_begin0          #     jumps to .Ltmp39
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp40-.Lfunc_begin0          # >> Call Site 9 <<
	.uleb128 .Ltmp41-.Ltmp40                #   Call between .Ltmp40 and .Ltmp41
	.uleb128 .Ltmp42-.Lfunc_begin0          #     jumps to .Ltmp42
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp41-.Lfunc_begin0          # >> Call Site 10 <<
	.uleb128 .Lfunc_end3-.Ltmp41            #   Call between .Ltmp41 and .Lfunc_end3
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end0:
	.p2align	2, 0x0
                                        # -- End function
	.text
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB4_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB4_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z16hs_kernel_globalPiS_ii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end4:
	.size	__hip_module_ctor, .Lfunc_end4-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB5_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB5_2:
	retq
.Lfunc_end5:
	.size	__hip_module_dtor, .Lfunc_end5-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z16hs_kernel_globalPiS_ii,@object # @_Z16hs_kernel_globalPiS_ii
	.section	.rodata,"a",@progbits
	.globl	_Z16hs_kernel_globalPiS_ii
	.p2align	3, 0x0
_Z16hs_kernel_globalPiS_ii:
	.quad	_Z31__device_stub__hs_kernel_globalPiS_ii
	.size	_Z16hs_kernel_globalPiS_ii, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"par_scan.csv"
	.size	.L.str, 13

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"time!: %.5f\n"
	.size	.L.str.1, 13

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	","
	.size	.L.str.2, 2

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z16hs_kernel_globalPiS_ii"
	.size	.L__unnamed_1, 27

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z31__device_stub__hs_kernel_globalPiS_ii
	.addrsig_sym __gxx_personality_v0
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Unwind_Resume
	.addrsig_sym _Z16hs_kernel_globalPiS_ii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z16hs_kernel_globalPiS_ii ; -- Begin function _Z16hs_kernel_globalPiS_ii
	.globl	_Z16hs_kernel_globalPiS_ii
	.p2align	8
	.type	_Z16hs_kernel_globalPiS_ii,@function
_Z16hs_kernel_globalPiS_ii:             ; @_Z16hs_kernel_globalPiS_ii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b64 s[4:5], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s5, v2
	s_cbranch_execz .LBB0_4
; %bb.1:
	s_load_b128 s[0:3], s[0:1], 0x0
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[0:1], 2, v[2:3]
	v_subrev_nc_u32_e32 v2, s4, v2
	s_mov_b32 s4, exec_lo
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v3, vcc_lo, s2, v0
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v4, vcc_lo, s3, v1, vcc_lo
	global_load_b32 v4, v[3:4], off
	v_mov_b32_e32 v3, 0
	v_cmpx_lt_i32_e32 -1, v2
	s_cbranch_execz .LBB0_3
; %bb.2:
	v_mov_b32_e32 v3, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	v_add_co_u32 v2, vcc_lo, s2, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
	global_load_b32 v3, v[2:3], off
.LBB0_3:
	s_or_b32 exec_lo, exec_lo, s4
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v2, v3, v4
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB0_4:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16hs_kernel_globalPiS_ii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z16hs_kernel_globalPiS_ii, .Lfunc_end0-_Z16hs_kernel_globalPiS_ii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 216
; NumSgprs: 18
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z16hs_kernel_globalPiS_ii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z16hs_kernel_globalPiS_ii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     5
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
