//Date 1 April 2019
//Program: To multiply two matrices

#include "cuda_runtime.h"
#include "device_launch_parameters.h"


#include <stdio.h>
#include <stdlib.h> //for random numbers

#include <time.h>
#include <sys/time.h>

#define gpuErrchk(ans){ gpuAssert((ans),__FILE__, __LINE__);}


inline void gpuAssert(cudaError_t code, const char *file, int line, bool abort = true)
{
	if(code != cudaSuccess)
	{
		fprintf(stderr, "GPUassert : %s %s %d\n", cudaGetErrorString(code), file, line);
		if(abort) exit(code);
	}
}




__global__ void matrix_multiply(int *A, int *B, int *C, int Am, int An, int Bn)
{
	int i = threadIdx.x;
	int j = threadIdx.y;

	int sum = 0;
	if(i < Am && j < Bn)
	{
		for(int k=0; k<An; ++k)
		{
			sum += A[ i * An + k] * B[k * Bn + j];
		}

		C[i * Bn + j] = sum;
	}

}

int main()
{	
	// host function definition
	int get_random();
	int get_max(int, int);	
	//variable definition
	int *hA, *hB, *hC, *hD, *dA, *dB, *dC;
	int rows_A, columns_A, rows_B, columns_B;
	
	

	
	//define size of array
	do{
		printf("The number of columns of first matrix must \n be equal to number of rows of second matrix!!!\n");
		printf("Enter the rows and columns of A\n");
		scanf("%d",&rows_A);
		scanf("%d",&columns_A);

		printf("Enter the rows and columns of B\n");
		scanf("%d",&rows_B);
		scanf("%d",&columns_B);
	}while(columns_A != rows_B);


	
	dim3 block(get_max(rows_A,rows_B), get_max(columns_A, columns_B));	
	int size = sizeof(int) * get_max(rows_A * columns_A, rows_B * columns_B);

	//memory allocation in host
	hA = (int*)malloc(size);
	hB = (int*)malloc(size);
	hC = (int*)malloc(size);
	hD = (int*)malloc(size);
	
	//memory allocation in device
	gpuErrchk(cudaMalloc((void**)&dA,size));
	gpuErrchk(cudaMalloc((void**)&dB,size));
	gpuErrchk(cudaMalloc((void**)&dC,size));


	//array initilization 
	for(int i=0; i<rows_A; ++i) 
	{
		for(int j=0; j< columns_A; ++j)
		{
			hA[i * columns_A + j] = get_random();

		}
	}
	
	for(int i=0; i<rows_B; ++i) 
	{
		for(int j=0; j< columns_B; ++j)
		{
			hB[i * columns_B + j] = get_random();

		}
	}	


	clock_t host_begin, host_end;
	//record begin of host computation
	host_begin = clock();

	//multiply matrix in host
	for(int i=0; i<rows_A; ++i) 
	{
		for(int j=0; j< columns_B; ++j)
		{
			int sum = 0;
			for(int k=0; k< columns_A; ++k) 
			{
			
				sum += hA[i * columns_A + k] * hB[k * columns_B + j];
				
			}
		
			hC[i * columns_B + j] = sum ;
			
		}
	}	


	//record end of host computation
	host_end = clock();


	
	clock_t device_begin, device_end;
	
	
	//record of device computation
	device_begin = clock();


	//copy host data to memory
	gpuErrchk(cudaMemcpy(dA, hA, size, cudaMemcpyHostToDevice));
	gpuErrchk(cudaMemcpy(dB, hB, size, cudaMemcpyHostToDevice));
	gpuErrchk(cudaMemcpy(dC, hC, size, cudaMemcpyHostToDevice));
	
	//record start of device computation

	// multiply matix in device
	matrix_multiply<<<1, block>>>(dA, dB, dC, rows_A, columns_A, columns_B );




	//copy data from device to host
	gpuErrchk(cudaMemcpy(hD, dC, size, cudaMemcpyDeviceToHost));

	//record end of device computation
	device_end = clock();

	double host_time, device_time;
	host_time = (double)((double)(host_end - host_begin)/(CLOCKS_PER_SEC));
	device_time = (double)((double)(device_end - device_begin)/(CLOCKS_PER_SEC));

	//print the time of host and device computation
	printf("++++++++++++++++++++++++++++++++++++++++++++++++++++++++");
	printf("\n\t\tHost computation time: %f\n",host_time);
	printf("\t\tDevice computation time: %f\n",device_time);
	printf("+++++++++++++++++++++++++++++++++++++++++++++++++++++++++\n");



	//-------------------------------------------------------------------------------
	/*
	// display element of A	
	printf("\n\n Matrix A\n\n");
	for(int i=0; i<rows_A; ++i) 
	{
		for(int j=0; j< columns_A; ++j)
		{
			printf("%d\t",hA[i * columns_A + j]);

		}
		printf("\n");
	}
	
	// display element of B	
	printf("\n\n Matrix B\n\n");
	for(int i=0; i<rows_B; ++i) 
	{
		for(int j=0; j< columns_B; ++j)
		{
			printf("%d\t",hA[i * columns_B + j]);

		}
		printf("\n");
	}
	
	// display element of AB	
	printf("\n\n Matrix AB\n\n");
	for(int i=0; i<rows_A; ++i) 
	{
		for(int j=0; j< columns_B; ++j)
		{
			printf("%d\t",hC[i * columns_B + j]);

		}
		printf("\n");
	}
	*/
	
	//display the devation of device and host result

	//--------------------------------------------------------------------------------------------




	int sum = 0;
	for(int i=0; i< rows_A; ++i) 
	{
		for(int j=0; j< columns_B; ++j)
		{
			sum += hD[i * columns_B + j] - hC[i * columns_B + j];
		}
	}
	printf("\nThe deviation of host and device result is %d\n",sum);

	
	
	//free host memory
	free(hA);
	free(hB);
	free(hC);
	free(hD);

	
	
	//free device memory
	gpuErrchk(cudaFree(dA));
	gpuErrchk(cudaFree(dB));
	gpuErrchk(cudaFree(dC));

	

}

//random number generator
int get_random()
{
	return rand() % 10 + 1;
}


int get_max(int a, int b)
{
	return a >= b ? a : b;
}

	.file	"tmpxft_00259ac8_00000000-6_matrix_multiply.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2033:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2033:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata._Z9gpuAssert9cudaErrorPKcib.str1.1,"aMS",@progbits,1
.LC0:
	.string	"GPUassert : %s %s %d\n"
	.section	.text._Z9gpuAssert9cudaErrorPKcib,"axG",@progbits,_Z9gpuAssert9cudaErrorPKcib,comdat
	.weak	_Z9gpuAssert9cudaErrorPKcib
	.type	_Z9gpuAssert9cudaErrorPKcib, @function
_Z9gpuAssert9cudaErrorPKcib:
.LFB2027:
	.cfi_startproc
	endbr64
	testl	%edi, %edi
	je	.L8
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movl	%ecx, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	movl	%edi, %ebx
	subq	$24, %rsp
	.cfi_def_cfa_offset 48
	movl	%edx, 12(%rsp)
	movq	%rsi, (%rsp)
	call	cudaGetErrorString@PLT
	movl	12(%rsp), %r9d
	movq	(%rsp), %r8
	leaq	.LC0(%rip), %rdx
	movq	stderr(%rip), %rdi
	movq	%rax, %rcx
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	testb	%bpl, %bpl
	je	.L2
	movl	%ebx, %edi
	call	exit@PLT
.L2:
	addq	$24, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
.L8:
	.cfi_restore 3
	.cfi_restore 6
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z9gpuAssert9cudaErrorPKcib, .-_Z9gpuAssert9cudaErrorPKcib
	.text
	.globl	_Z10get_randomv
	.type	_Z10get_randomv, @function
_Z10get_randomv:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	call	rand@PLT
	movl	$10, %ecx
	cltd
	idivl	%ecx
	leal	1(%rdx), %eax
	popq	%rdx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2029:
	.size	_Z10get_randomv, .-_Z10get_randomv
	.globl	_Z7get_maxii
	.type	_Z7get_maxii, @function
_Z7get_maxii:
.LFB2030:
	.cfi_startproc
	endbr64
	cmpl	%esi, %edi
	movl	%esi, %eax
	cmovge	%edi, %eax
	ret
	.cfi_endproc
.LFE2030:
	.size	_Z7get_maxii, .-_Z7get_maxii
	.globl	_Z42__device_stub__Z15matrix_multiplyPiS_S_iiiPiS_S_iii
	.type	_Z42__device_stub__Z15matrix_multiplyPiS_S_iiiPiS_S_iii, @function
_Z42__device_stub__Z15matrix_multiplyPiS_S_iiiPiS_S_iii:
.LFB2055:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movl	%r9d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L15
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z15matrix_multiplyPiS_S_iii(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L15:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L17
	call	__stack_chk_fail@PLT
.L17:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2055:
	.size	_Z42__device_stub__Z15matrix_multiplyPiS_S_iiiPiS_S_iii, .-_Z42__device_stub__Z15matrix_multiplyPiS_S_iiiPiS_S_iii
	.globl	_Z15matrix_multiplyPiS_S_iii
	.type	_Z15matrix_multiplyPiS_S_iii, @function
_Z15matrix_multiplyPiS_S_iii:
.LFB2056:
	.cfi_startproc
	endbr64
	jmp	_Z42__device_stub__Z15matrix_multiplyPiS_S_iiiPiS_S_iii
	.cfi_endproc
.LFE2056:
	.size	_Z15matrix_multiplyPiS_S_iii, .-_Z15matrix_multiplyPiS_S_iii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"The number of columns of first matrix must \n be equal to number of rows of second matrix!!!\n"
.LC2:
	.string	"Enter the rows and columns of A\n"
.LC3:
	.string	"%d"
.LC4:
	.string	"Enter the rows and columns of B\n"
.LC5:
	.string	"/home/ubuntu/Datasets/stackv2/train-structured/Hemanta-Bhattarai/Self_Learning/master/CUDA/vector_operations/matrix_multiply.cu"
.LC7:
	.string	"++++++++++++++++++++++++++++++++++++++++++++++++++++++++"
.LC8:
	.string	"\n\t\tHost computation time: %f\n"
.LC9:
	.string	"\t\tDevice computation time: %f\n"
.LC10:
	.string	"+++++++++++++++++++++++++++++++++++++++++++++++++++++++++\n"
.LC11:
	.string	"\nThe deviation of host and device result is %d\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	leaq	.LC1(%rip), %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$136, %rsp
	.cfi_def_cfa_offset 192
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
.L21:
	movq	%rbp, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC3(%rip), %rbx
	leaq	.LC2(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	leaq	56(%rsp), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	call	__isoc23_scanf@PLT
	leaq	60(%rsp), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	call	__isoc23_scanf@PLT
	leaq	.LC4(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	64(%rsp), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	call	__isoc23_scanf@PLT
	leaq	68(%rsp), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	call	__isoc23_scanf@PLT
	movl	60(%rsp), %edx
	cmpl	64(%rsp), %edx
	jne	.L21
	movl	56(%rsp), %ecx
	movl	68(%rsp), %eax
	movl	$1, 104(%rsp)
	cmpl	%ecx, %edx
	movl	%ecx, %esi
	cmovge	%edx, %esi
	cmpl	%eax, %edx
	movl	%esi, 96(%rsp)
	movl	%eax, %esi
	cmovge	%edx, %esi
	imull	%edx, %eax
	imull	%ecx, %edx
	movl	%esi, 100(%rsp)
	cmpl	%edx, %eax
	cmovl	%edx, %eax
	xorl	%r13d, %r13d
	sall	$2, %eax
	cltq
	movq	%rax, %rdi
	movq	%rax, 8(%rsp)
	call	malloc@PLT
	movq	8(%rsp), %rdi
	movq	%rax, %r12
	call	malloc@PLT
	movq	8(%rsp), %rdi
	movq	%rax, %rbp
	call	malloc@PLT
	movq	8(%rsp), %rdi
	movq	%rax, %rbx
	call	malloc@PLT
	movq	8(%rsp), %rsi
	leaq	72(%rsp), %rdi
	movq	%rax, 16(%rsp)
	call	cudaMalloc@PLT
	movl	$1, %ecx
	movl	$83, %edx
	leaq	.LC5(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	8(%rsp), %rsi
	leaq	80(%rsp), %rdi
	call	cudaMalloc@PLT
	movl	$1, %ecx
	movl	$84, %edx
	leaq	.LC5(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	8(%rsp), %rsi
	leaq	88(%rsp), %rdi
	call	cudaMalloc@PLT
	movl	$1, %ecx
	movl	$85, %edx
	leaq	.LC5(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
.L22:
	cmpl	%r13d, 56(%rsp)
	jle	.L44
	xorl	%r14d, %r14d
.L24:
	movl	60(%rsp), %eax
	cmpl	%r14d, %eax
	jle	.L45
	imull	%r13d, %eax
	addl	%r14d, %eax
	incl	%r14d
	cltq
	leaq	(%r12,%rax,4), %r15
	call	_Z10get_randomv
	movl	%eax, (%r15)
	jmp	.L24
.L45:
	incl	%r13d
	jmp	.L22
.L44:
	xorl	%r13d, %r13d
.L25:
	cmpl	%r13d, 64(%rsp)
	jle	.L46
	xorl	%r14d, %r14d
.L27:
	movl	68(%rsp), %eax
	cmpl	%r14d, %eax
	jle	.L47
	imull	%r13d, %eax
	addl	%r14d, %eax
	incl	%r14d
	cltq
	leaq	0(%rbp,%rax,4), %r15
	call	_Z10get_randomv
	movl	%eax, (%r15)
	jmp	.L27
.L47:
	incl	%r13d
	jmp	.L25
.L46:
	call	clock@PLT
	movl	60(%rsp), %r13d
	xorl	%ecx, %ecx
	xorl	%esi, %esi
	movq	%rax, 32(%rsp)
	movl	56(%rsp), %eax
	xorl	%r8d, %r8d
	movl	%eax, 28(%rsp)
	movslq	68(%rsp), %rax
	movq	%rax, %rdi
	salq	$2, %rax
	movq	%rax, 40(%rsp)
.L28:
	cmpl	%r8d, 28(%rsp)
	jle	.L32
	movslq	%esi, %rax
	leaq	(%rbx,%rax,4), %r15
	movslq	%ecx, %rax
	leaq	(%r12,%rax,4), %r14
	xorl	%eax, %eax
.L33:
	cmpl	%eax, %edi
	jle	.L30
	leaq	0(%rbp,%rax,4), %r10
	xorl	%edx, %edx
	xorl	%r9d, %r9d
.L31:
	cmpl	%edx, %r13d
	jle	.L48
	movl	(%r14,%rdx,4), %r11d
	imull	(%r10), %r11d
	incq	%rdx
	addl	%r11d, %r9d
	movq	40(%rsp), %r11
	addq	%r11, %r10
	jmp	.L31
.L48:
	movl	%r9d, (%r15,%rax,4)
	incq	%rax
	jmp	.L33
.L30:
	incl	%r8d
	addl	%edi, %esi
	addl	%r13d, %ecx
	jmp	.L28
.L32:
	call	clock@PLT
	movq	%rax, %r13
	call	clock@PLT
	movq	8(%rsp), %rdx
	movq	72(%rsp), %rdi
	movq	%r12, %rsi
	movl	$1, %ecx
	movq	%rax, %r14
	call	cudaMemcpy@PLT
	movl	$1, %ecx
	movl	$144, %edx
	leaq	.LC5(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	8(%rsp), %rdx
	movq	80(%rsp), %rdi
	movq	%rbp, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movl	$1, %ecx
	movl	$145, %edx
	leaq	.LC5(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	8(%rsp), %rdx
	movq	88(%rsp), %rdi
	movq	%rbx, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movl	$1, %ecx
	movl	$146, %edx
	leaq	.LC5(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movl	104(%rsp), %ecx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	96(%rsp), %rdx
	movl	$1, %esi
	movabsq	$4294967297, %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L34
	movl	68(%rsp), %r9d
	movl	60(%rsp), %r8d
	movl	56(%rsp), %ecx
	movq	88(%rsp), %rdx
	movq	80(%rsp), %rsi
	movq	72(%rsp), %rdi
	call	_Z42__device_stub__Z15matrix_multiplyPiS_S_iiiPiS_S_iii
.L34:
	movq	8(%rsp), %rdx
	movq	88(%rsp), %rsi
	movl	$2, %ecx
	movq	16(%rsp), %rdi
	call	cudaMemcpy@PLT
	movl	$157, %edx
	movl	$1, %ecx
	leaq	.LC5(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	call	clock@PLT
	movq	32(%rsp), %rcx
	movl	$2, %edi
	movsd	.LC6(%rip), %xmm1
	subq	%r14, %rax
	leaq	.LC7(%rip), %rsi
	subq	%rcx, %r13
	cvtsi2sdq	%rax, %xmm2
	xorl	%eax, %eax
	cvtsi2sdq	%r13, %xmm0
	divsd	%xmm1, %xmm2
	divsd	%xmm1, %xmm0
	movq	%xmm2, %r13
	movsd	%xmm0, 8(%rsp)
	call	__printf_chk@PLT
	movsd	8(%rsp), %xmm0
	leaq	.LC8(%rip), %rsi
	movb	$1, %al
	movl	$2, %edi
	call	__printf_chk@PLT
	movq	%r13, %xmm0
	leaq	.LC9(%rip), %rsi
	movb	$1, %al
	movl	$2, %edi
	call	__printf_chk@PLT
	leaq	.LC10(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	56(%rsp), %r9d
	xorl	%esi, %esi
	xorl	%edi, %edi
	movl	68(%rsp), %r8d
	xorl	%edx, %edx
.L35:
	cmpl	%edi, %r9d
	jle	.L37
	movslq	%esi, %rax
	xorl	%ecx, %ecx
	salq	$2, %rax
.L38:
	cmpl	%ecx, %r8d
	jle	.L49
	movq	16(%rsp), %r10
	incl	%ecx
	addl	(%r10,%rax), %edx
	subl	(%rbx,%rax), %edx
	addq	$4, %rax
	jmp	.L38
.L49:
	incl	%edi
	addl	%r8d, %esi
	jmp	.L35
.L37:
	leaq	.LC11(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	%r12, %rdi
	call	free@PLT
	movq	%rbp, %rdi
	call	free@PLT
	movq	%rbx, %rdi
	call	free@PLT
	movq	16(%rsp), %rdi
	call	free@PLT
	movq	72(%rsp), %rdi
	call	cudaFree@PLT
	movl	$1, %ecx
	movl	$241, %edx
	leaq	.LC5(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	80(%rsp), %rdi
	call	cudaFree@PLT
	movl	$1, %ecx
	movl	$242, %edx
	leaq	.LC5(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	88(%rsp), %rdi
	call	cudaFree@PLT
	movl	$1, %ecx
	movl	$243, %edx
	leaq	.LC5(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L39
	call	__stack_chk_fail@PLT
.L39:
	addq	$136, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	main, .-main
	.section	.rodata.str1.1
.LC12:
	.string	"_Z15matrix_multiplyPiS_S_iii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2058:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC12(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z15matrix_multiplyPiS_S_iii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2058:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC6:
	.long	0
	.long	1093567616
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

//Date 1 April 2019
//Program: To multiply two matrices

#include "hip/hip_runtime.h"



#include <stdio.h>
#include <stdlib.h> //for random numbers

#include <time.h>
#include <sys/time.h>

#define gpuErrchk(ans){ gpuAssert((ans),__FILE__, __LINE__);}


inline void gpuAssert(hipError_t code, const char *file, int line, bool abort = true)
{
	if(code != hipSuccess)
	{
		fprintf(stderr, "GPUassert : %s %s %d\n", hipGetErrorString(code), file, line);
		if(abort) exit(code);
	}
}




__global__ void matrix_multiply(int *A, int *B, int *C, int Am, int An, int Bn)
{
	int i = threadIdx.x;
	int j = threadIdx.y;

	int sum = 0;
	if(i < Am && j < Bn)
	{
		for(int k=0; k<An; ++k)
		{
			sum += A[ i * An + k] * B[k * Bn + j];
		}

		C[i * Bn + j] = sum;
	}

}

int main()
{	
	// host function definition
	int get_random();
	int get_max(int, int);	
	//variable definition
	int *hA, *hB, *hC, *hD, *dA, *dB, *dC;
	int rows_A, columns_A, rows_B, columns_B;
	
	

	
	//define size of array
	do{
		printf("The number of columns of first matrix must \n be equal to number of rows of second matrix!!!\n");
		printf("Enter the rows and columns of A\n");
		scanf("%d",&rows_A);
		scanf("%d",&columns_A);

		printf("Enter the rows and columns of B\n");
		scanf("%d",&rows_B);
		scanf("%d",&columns_B);
	}while(columns_A != rows_B);


	
	dim3 block(get_max(rows_A,rows_B), get_max(columns_A, columns_B));	
	int size = sizeof(int) * get_max(rows_A * columns_A, rows_B * columns_B);

	//memory allocation in host
	hA = (int*)malloc(size);
	hB = (int*)malloc(size);
	hC = (int*)malloc(size);
	hD = (int*)malloc(size);
	
	//memory allocation in device
	gpuErrchk(hipMalloc((void**)&dA,size));
	gpuErrchk(hipMalloc((void**)&dB,size));
	gpuErrchk(hipMalloc((void**)&dC,size));


	//array initilization 
	for(int i=0; i<rows_A; ++i) 
	{
		for(int j=0; j< columns_A; ++j)
		{
			hA[i * columns_A + j] = get_random();

		}
	}
	
	for(int i=0; i<rows_B; ++i) 
	{
		for(int j=0; j< columns_B; ++j)
		{
			hB[i * columns_B + j] = get_random();

		}
	}	


	clock_t host_begin, host_end;
	//record begin of host computation
	host_begin = clock();

	//multiply matrix in host
	for(int i=0; i<rows_A; ++i) 
	{
		for(int j=0; j< columns_B; ++j)
		{
			int sum = 0;
			for(int k=0; k< columns_A; ++k) 
			{
			
				sum += hA[i * columns_A + k] * hB[k * columns_B + j];
				
			}
		
			hC[i * columns_B + j] = sum ;
			
		}
	}	


	//record end of host computation
	host_end = clock();


	
	clock_t device_begin, device_end;
	
	
	//record of device computation
	device_begin = clock();


	//copy host data to memory
	gpuErrchk(hipMemcpy(dA, hA, size, hipMemcpyHostToDevice));
	gpuErrchk(hipMemcpy(dB, hB, size, hipMemcpyHostToDevice));
	gpuErrchk(hipMemcpy(dC, hC, size, hipMemcpyHostToDevice));
	
	//record start of device computation

	// multiply matix in device
	matrix_multiply<<<1, block>>>(dA, dB, dC, rows_A, columns_A, columns_B );




	//copy data from device to host
	gpuErrchk(hipMemcpy(hD, dC, size, hipMemcpyDeviceToHost));

	//record end of device computation
	device_end = clock();

	double host_time, device_time;
	host_time = (double)((double)(host_end - host_begin)/(CLOCKS_PER_SEC));
	device_time = (double)((double)(device_end - device_begin)/(CLOCKS_PER_SEC));

	//print the time of host and device computation
	printf("++++++++++++++++++++++++++++++++++++++++++++++++++++++++");
	printf("\n\t\tHost computation time: %f\n",host_time);
	printf("\t\tDevice computation time: %f\n",device_time);
	printf("+++++++++++++++++++++++++++++++++++++++++++++++++++++++++\n");



	//-------------------------------------------------------------------------------
	/*
	// display element of A	
	printf("\n\n Matrix A\n\n");
	for(int i=0; i<rows_A; ++i) 
	{
		for(int j=0; j< columns_A; ++j)
		{
			printf("%d\t",hA[i * columns_A + j]);

		}
		printf("\n");
	}
	
	// display element of B	
	printf("\n\n Matrix B\n\n");
	for(int i=0; i<rows_B; ++i) 
	{
		for(int j=0; j< columns_B; ++j)
		{
			printf("%d\t",hA[i * columns_B + j]);

		}
		printf("\n");
	}
	
	// display element of AB	
	printf("\n\n Matrix AB\n\n");
	for(int i=0; i<rows_A; ++i) 
	{
		for(int j=0; j< columns_B; ++j)
		{
			printf("%d\t",hC[i * columns_B + j]);

		}
		printf("\n");
	}
	*/
	
	//display the devation of device and host result

	//--------------------------------------------------------------------------------------------




	int sum = 0;
	for(int i=0; i< rows_A; ++i) 
	{
		for(int j=0; j< columns_B; ++j)
		{
			sum += hD[i * columns_B + j] - hC[i * columns_B + j];
		}
	}
	printf("\nThe deviation of host and device result is %d\n",sum);

	
	
	//free host memory
	free(hA);
	free(hB);
	free(hC);
	free(hD);

	
	
	//free device memory
	gpuErrchk(hipFree(dA));
	gpuErrchk(hipFree(dB));
	gpuErrchk(hipFree(dC));

	

}

//random number generator
int get_random()
{
	return rand() % 10 + 1;
}


int get_max(int a, int b)
{
	return a >= b ? a : b;
}

	.text
	.file	"matrix_multiply.hip"
	.globl	_Z30__device_stub__matrix_multiplyPiS_S_iii # -- Begin function _Z30__device_stub__matrix_multiplyPiS_S_iii
	.type	_Z30__device_stub__matrix_multiplyPiS_S_iii,@function
_Z30__device_stub__matrix_multiplyPiS_S_iii: # @_Z30__device_stub__matrix_multiplyPiS_S_iii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	20(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	16(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z15matrix_multiplyPiS_S_iii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z30__device_stub__matrix_multiplyPiS_S_iii, .Lfunc_end0-_Z30__device_stub__matrix_multiplyPiS_S_iii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI1_0:
	.quad	0x412e848000000000              # double 1.0E+6
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$104, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	leaq	4(%rsp), %rbx
	leaq	8(%rsp), %r14
	leaq	12(%rsp), %r15
	movq	%rsp, %r12
.LBB1_1:                                # =>This Inner Loop Header: Depth=1
	movl	$.Lstr, %edi
	callq	puts@PLT
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	movl	$.L.str.2, %edi
	movq	%rbx, %rsi
	xorl	%eax, %eax
	callq	__isoc23_scanf
	movl	$.L.str.2, %edi
	movq	%r14, %rsi
	xorl	%eax, %eax
	callq	__isoc23_scanf
	movl	$.Lstr.2, %edi
	callq	puts@PLT
	movl	$.L.str.2, %edi
	movq	%r15, %rsi
	xorl	%eax, %eax
	callq	__isoc23_scanf
	movl	$.L.str.2, %edi
	movq	%r12, %rsi
	xorl	%eax, %eax
	callq	__isoc23_scanf
	movl	8(%rsp), %eax
	cmpl	12(%rsp), %eax
	jne	.LBB1_1
# %bb.2:
	movl	4(%rsp), %ecx
	cmpl	%eax, %ecx
	movl	%eax, %edx
	cmovgl	%ecx, %edx
	movq	%rdx, 88(%rsp)                  # 8-byte Spill
	movl	(%rsp), %edx
	cmpl	%edx, %eax
	movl	%edx, %esi
	cmovgl	%eax, %esi
	movq	%rsi, 96(%rsp)                  # 8-byte Spill
	imull	%eax, %ecx
	imull	%eax, %edx
	cmpl	%edx, %ecx
	cmovgl	%ecx, %edx
	shll	$2, %edx
	movslq	%edx, %r13
	movq	%r13, %rdi
	callq	malloc
	movq	%rax, %r14
	movq	%r13, %rdi
	callq	malloc
	movq	%rax, %rbx
	movq	%r13, %rdi
	callq	malloc
	movq	%rax, %r15
	movq	%r13, %rdi
	callq	malloc
	movq	%rax, %r12
	leaq	56(%rsp), %rdi
	movq	%r13, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB1_3
# %bb.5:                                # %_Z9gpuAssert10hipError_tPKcib.exit
	leaq	48(%rsp), %rdi
	movq	%r13, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB1_6
# %bb.7:                                # %_Z9gpuAssert10hipError_tPKcib.exit89
	leaq	32(%rsp), %rdi
	movq	%r13, 24(%rsp)                  # 8-byte Spill
	movq	%r13, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB1_57
# %bb.8:                                # %_Z9gpuAssert10hipError_tPKcib.exit91.preheader
	movq	%r15, 64(%rsp)                  # 8-byte Spill
	movl	4(%rsp), %ecx
	testl	%ecx, %ecx
	jle	.LBB1_15
# %bb.9:                                # %.preheader111.preheader
	xorl	%r13d, %r13d
	movl	8(%rsp), %eax
.LBB1_10:                               # %.preheader111
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_12 Depth 2
	testl	%eax, %eax
	jle	.LBB1_14
# %bb.11:                               # %.lr.ph.preheader
                                        #   in Loop: Header=BB1_10 Depth=1
	xorl	%ebp, %ebp
.LBB1_12:                               # %.lr.ph
                                        #   Parent Loop BB1_10 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	callq	rand
	cltq
	imulq	$1717986919, %rax, %rcx         # imm = 0x66666667
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$34, %rcx
	addl	%edx, %ecx
	addl	%ecx, %ecx
	leal	(%rcx,%rcx,4), %ecx
	negl	%ecx
	addl	%eax, %ecx
	incl	%ecx
	movl	8(%rsp), %eax
	movl	%r13d, %edx
	imull	%eax, %edx
	movslq	%edx, %rdx
	addq	%rbp, %rdx
	movl	%ecx, (%r14,%rdx,4)
	incq	%rbp
	cmpl	%eax, %ebp
	jl	.LBB1_12
# %bb.13:                               # %_Z9gpuAssert10hipError_tPKcib.exit91.loopexit
                                        #   in Loop: Header=BB1_10 Depth=1
	movl	4(%rsp), %ecx
.LBB1_14:                               # %_Z9gpuAssert10hipError_tPKcib.exit91
                                        #   in Loop: Header=BB1_10 Depth=1
	incl	%r13d
	cmpl	%ecx, %r13d
	jl	.LBB1_10
.LBB1_15:                               # %.preheader110
	movq	%r14, 40(%rsp)                  # 8-byte Spill
	movl	12(%rsp), %ecx
	testl	%ecx, %ecx
	jle	.LBB1_22
# %bb.16:                               # %.preheader109.preheader
	xorl	%r13d, %r13d
	movl	(%rsp), %eax
.LBB1_17:                               # %.preheader109
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_19 Depth 2
	testl	%eax, %eax
	jle	.LBB1_21
# %bb.18:                               # %.lr.ph116.preheader
                                        #   in Loop: Header=BB1_17 Depth=1
	xorl	%ebp, %ebp
.LBB1_19:                               # %.lr.ph116
                                        #   Parent Loop BB1_17 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	callq	rand
	cltq
	imulq	$1717986919, %rax, %rcx         # imm = 0x66666667
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$34, %rcx
	addl	%edx, %ecx
	addl	%ecx, %ecx
	leal	(%rcx,%rcx,4), %ecx
	negl	%ecx
	addl	%eax, %ecx
	incl	%ecx
	movl	(%rsp), %eax
	movl	%r13d, %edx
	imull	%eax, %edx
	movslq	%edx, %rdx
	addq	%rbp, %rdx
	movl	%ecx, (%rbx,%rdx,4)
	incq	%rbp
	cmpl	%eax, %ebp
	jl	.LBB1_19
# %bb.20:                               # %._crit_edge117.loopexit
                                        #   in Loop: Header=BB1_17 Depth=1
	movl	12(%rsp), %ecx
.LBB1_21:                               # %._crit_edge117
                                        #   in Loop: Header=BB1_17 Depth=1
	incl	%r13d
	cmpl	%ecx, %r13d
	jl	.LBB1_17
.LBB1_22:                               # %._crit_edge119
	movq	%r12, 80(%rsp)                  # 8-byte Spill
	callq	clock
	movq	%rax, 72(%rsp)                  # 8-byte Spill
	movl	4(%rsp), %eax
	testl	%eax, %eax
	jle	.LBB1_30
# %bb.23:                               # %.preheader108.lr.ph
	movl	(%rsp), %ecx
	movl	8(%rsp), %edx
	movslq	%ecx, %rsi
	movq	%rsi, 16(%rsp)                  # 8-byte Spill
	leaq	(,%rsi,4), %rdi
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
.LBB1_24:                               # %.preheader108
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_26 Depth 2
                                        #       Child Loop BB1_38 Depth 3
	testl	%ecx, %ecx
	jle	.LBB1_29
# %bb.25:                               # %.preheader107.lr.ph
                                        #   in Loop: Header=BB1_24 Depth=1
	movl	%r8d, %r10d
	movq	40(%rsp), %rsi                  # 8-byte Reload
	leaq	(%rsi,%r10,4), %r10
	movq	%r9, %r11
	imulq	16(%rsp), %r11                  # 8-byte Folded Reload
	movq	64(%rsp), %rsi                  # 8-byte Reload
	leaq	(%rsi,%r11,4), %r11
	movq	%rbx, %r14
	xorl	%ebp, %ebp
.LBB1_26:                               # %.preheader107
                                        #   Parent Loop BB1_24 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB1_38 Depth 3
	testl	%edx, %edx
	jle	.LBB1_27
# %bb.37:                               # %.lr.ph122.preheader
                                        #   in Loop: Header=BB1_26 Depth=2
	xorl	%r15d, %r15d
	movq	%r14, %r13
	xorl	%r12d, %r12d
.LBB1_38:                               # %.lr.ph122
                                        #   Parent Loop BB1_24 Depth=1
                                        #     Parent Loop BB1_26 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movl	(%r13), %esi
	imull	(%r10,%r15,4), %esi
	addl	%esi, %r12d
	incq	%r15
	addq	%rdi, %r13
	cmpq	%r15, %rdx
	jne	.LBB1_38
	jmp	.LBB1_28
.LBB1_27:                               #   in Loop: Header=BB1_26 Depth=2
	xorl	%r12d, %r12d
.LBB1_28:                               # %._crit_edge123
                                        #   in Loop: Header=BB1_26 Depth=2
	movl	%r12d, (%r11,%rbp,4)
	incq	%rbp
	addq	$4, %r14
	cmpq	%rcx, %rbp
	jne	.LBB1_26
.LBB1_29:                               # %._crit_edge125
                                        #   in Loop: Header=BB1_24 Depth=1
	incq	%r9
	addl	%edx, %r8d
	cmpq	%rax, %r9
	jne	.LBB1_24
.LBB1_30:                               # %._crit_edge127
	callq	clock
	movq	%rax, %rbp
	callq	clock
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movq	56(%rsp), %rdi
	movq	40(%rsp), %rsi                  # 8-byte Reload
	movq	24(%rsp), %r14                  # 8-byte Reload
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB1_31
# %bb.33:                               # %_Z9gpuAssert10hipError_tPKcib.exit93
	movq	48(%rsp), %rdi
	movq	%rbx, %rsi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	movq	64(%rsp), %r15                  # 8-byte Reload
	movq	80(%rsp), %r12                  # 8-byte Reload
	jne	.LBB1_34
# %bb.35:                               # %_Z9gpuAssert10hipError_tPKcib.exit95
	movq	32(%rsp), %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB1_36
# %bb.39:                               # %_Z9gpuAssert10hipError_tPKcib.exit97
	movq	96(%rsp), %rdx                  # 8-byte Reload
	shlq	$32, %rdx
	addq	88(%rsp), %rdx                  # 8-byte Folded Reload
	movabsq	$4294967297, %rdi               # imm = 0x100000001
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_41
# %bb.40:
	movq	56(%rsp), %rdi
	movq	48(%rsp), %rsi
	movq	32(%rsp), %rdx
	movl	4(%rsp), %ecx
	movl	8(%rsp), %r8d
	movl	(%rsp), %r9d
	callq	_Z30__device_stub__matrix_multiplyPiS_S_iii
.LBB1_41:
	movq	32(%rsp), %rsi
	movq	%r12, %rdi
	movq	24(%rsp), %rdx                  # 8-byte Reload
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB1_42
# %bb.43:                               # %_Z9gpuAssert10hipError_tPKcib.exit99
	callq	clock
	subq	72(%rsp), %rbp                  # 8-byte Folded Reload
	cvtsi2sd	%rbp, %xmm1
	movsd	.LCPI1_0(%rip), %xmm0           # xmm0 = mem[0],zero
	divsd	%xmm0, %xmm1
	movsd	%xmm1, 24(%rsp)                 # 8-byte Spill
	subq	16(%rsp), %rax                  # 8-byte Folded Reload
	xorps	%xmm1, %xmm1
	cvtsi2sd	%rax, %xmm1
	divsd	%xmm0, %xmm1
	movsd	%xmm1, 16(%rsp)                 # 8-byte Spill
	xorl	%ebp, %ebp
	movl	$.L.str.5, %edi
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.6, %edi
	movsd	24(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	movb	$1, %al
	callq	printf
	movl	$.L.str.7, %edi
	movsd	16(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	movb	$1, %al
	callq	printf
	movl	$.Lstr.3, %edi
	callq	puts@PLT
	movl	4(%rsp), %eax
	testl	%eax, %eax
	jle	.LBB1_49
# %bb.44:                               # %.preheader.lr.ph
	movl	(%rsp), %ecx
	xorl	%edx, %edx
	xorl	%esi, %esi
	xorl	%ebp, %ebp
.LBB1_45:                               # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_47 Depth 2
	testl	%ecx, %ecx
	jle	.LBB1_48
# %bb.46:                               # %.lr.ph130
                                        #   in Loop: Header=BB1_45 Depth=1
	movl	%edx, %r8d
	leaq	(%r15,%r8,4), %rdi
	leaq	(%r12,%r8,4), %r8
	xorl	%r9d, %r9d
.LBB1_47:                               #   Parent Loop BB1_45 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	addl	(%r8,%r9,4), %ebp
	subl	(%rdi,%r9,4), %ebp
	incq	%r9
	cmpq	%r9, %rcx
	jne	.LBB1_47
.LBB1_48:                               # %._crit_edge131
                                        #   in Loop: Header=BB1_45 Depth=1
	incq	%rsi
	addl	%ecx, %edx
	cmpq	%rax, %rsi
	jne	.LBB1_45
.LBB1_49:                               # %._crit_edge135
	movl	$.L.str.9, %edi
	movl	%ebp, %esi
	xorl	%eax, %eax
	callq	printf
	movq	40(%rsp), %rdi                  # 8-byte Reload
	callq	free
	movq	%rbx, %rdi
	callq	free
	movq	%r15, %rdi
	callq	free
	movq	%r12, %rdi
	callq	free
	movq	56(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB1_50
# %bb.52:                               # %_Z9gpuAssert10hipError_tPKcib.exit101
	movq	48(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB1_53
# %bb.54:                               # %_Z9gpuAssert10hipError_tPKcib.exit103
	movq	32(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB1_55
# %bb.56:                               # %_Z9gpuAssert10hipError_tPKcib.exit105
	xorl	%eax, %eax
	addq	$104, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB1_3:
	.cfi_def_cfa_offset 160
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.10, %esi
	movl	$.L.str.4, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$83, %r8d
	jmp	.LBB1_4
.LBB1_6:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.10, %esi
	movl	$.L.str.4, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$84, %r8d
	jmp	.LBB1_4
.LBB1_57:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.10, %esi
	movl	$.L.str.4, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$85, %r8d
.LBB1_4:
	xorl	%eax, %eax
	callq	fprintf
	movl	%ebp, %edi
	callq	exit
.LBB1_31:
	movl	%eax, %r13d
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.10, %esi
	movl	$.L.str.4, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$144, %r8d
	jmp	.LBB1_32
.LBB1_34:
	movl	%eax, %r13d
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.10, %esi
	movl	$.L.str.4, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$145, %r8d
	jmp	.LBB1_32
.LBB1_36:
	movl	%eax, %r13d
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.10, %esi
	movl	$.L.str.4, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$146, %r8d
	jmp	.LBB1_32
.LBB1_42:
	movl	%eax, %r13d
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.10, %esi
	movl	$.L.str.4, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$157, %r8d
.LBB1_32:
	xorl	%eax, %eax
	callq	fprintf
	movl	%r13d, %edi
	callq	exit
.LBB1_50:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.10, %esi
	movl	$.L.str.4, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$241, %r8d
	jmp	.LBB1_51
.LBB1_53:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.10, %esi
	movl	$.L.str.4, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$242, %r8d
	jmp	.LBB1_51
.LBB1_55:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.10, %esi
	movl	$.L.str.4, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$243, %r8d
.LBB1_51:
	xorl	%eax, %eax
	callq	fprintf
	movl	%ebx, %edi
	callq	exit
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.globl	_Z7get_maxii                    # -- Begin function _Z7get_maxii
	.type	_Z7get_maxii,@function
_Z7get_maxii:                           # @_Z7get_maxii
	.cfi_startproc
# %bb.0:
	movl	%esi, %eax
	cmpl	%esi, %edi
	cmovgl	%edi, %eax
	retq
.Lfunc_end2:
	.size	_Z7get_maxii, .Lfunc_end2-_Z7get_maxii
	.cfi_endproc
                                        # -- End function
	.globl	_Z10get_randomv                 # -- Begin function _Z10get_randomv
	.type	_Z10get_randomv,@function
_Z10get_randomv:                        # @_Z10get_randomv
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	rand
	cltq
	imulq	$1717986919, %rax, %rcx         # imm = 0x66666667
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$34, %rcx
	addl	%edx, %ecx
	addl	%ecx, %ecx
	leal	(%rcx,%rcx,4), %ecx
	negl	%ecx
	addl	%ecx, %eax
	incl	%eax
	popq	%rcx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z10get_randomv, .Lfunc_end3-_Z10get_randomv
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB4_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB4_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z15matrix_multiplyPiS_S_iii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end4:
	.size	__hip_module_ctor, .Lfunc_end4-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB5_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB5_2:
	retq
.Lfunc_end5:
	.size	__hip_module_dtor, .Lfunc_end5-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z15matrix_multiplyPiS_S_iii,@object # @_Z15matrix_multiplyPiS_S_iii
	.section	.rodata,"a",@progbits
	.globl	_Z15matrix_multiplyPiS_S_iii
	.p2align	3, 0x0
_Z15matrix_multiplyPiS_S_iii:
	.quad	_Z30__device_stub__matrix_multiplyPiS_S_iii
	.size	_Z15matrix_multiplyPiS_S_iii, 8

	.type	.L.str.2,@object                # @.str.2
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.2:
	.asciz	"%d"
	.size	.L.str.2, 3

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"/home/ubuntu/Datasets/stackv2/train-structured-repos-hip-sm89/Hemanta-Bhattarai/Self_Learning/master/CUDA/vector_operations/matrix_multiply.hip"
	.size	.L.str.4, 144

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"++++++++++++++++++++++++++++++++++++++++++++++++++++++++"
	.size	.L.str.5, 57

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"\n\t\tHost computation time: %f\n"
	.size	.L.str.6, 30

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"\t\tDevice computation time: %f\n"
	.size	.L.str.7, 31

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"\nThe deviation of host and device result is %d\n"
	.size	.L.str.9, 48

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"GPUassert : %s %s %d\n"
	.size	.L.str.10, 22

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z15matrix_multiplyPiS_S_iii"
	.size	.L__unnamed_1, 29

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"The number of columns of first matrix must \n be equal to number of rows of second matrix!!!"
	.size	.Lstr, 92

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"Enter the rows and columns of A"
	.size	.Lstr.1, 32

	.type	.Lstr.2,@object                 # @str.2
.Lstr.2:
	.asciz	"Enter the rows and columns of B"
	.size	.Lstr.2, 32

	.type	.Lstr.3,@object                 # @str.3
.Lstr.3:
	.asciz	"+++++++++++++++++++++++++++++++++++++++++++++++++++++++++"
	.size	.Lstr.3, 58

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z30__device_stub__matrix_multiplyPiS_S_iii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z15matrix_multiplyPiS_S_iii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z15matrix_multiplyPiS_S_iii ; -- Begin function _Z15matrix_multiplyPiS_S_iii
	.globl	_Z15matrix_multiplyPiS_S_iii
	.p2align	8
	.type	_Z15matrix_multiplyPiS_S_iii,@function
_Z15matrix_multiplyPiS_S_iii:           ; @_Z15matrix_multiplyPiS_S_iii
; %bb.0:
	s_load_b128 s[4:7], s[0:1], 0x18
	v_and_b32_e32 v6, 0x3ff, v0
	v_bfe_u32 v0, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e32 vcc_lo, s4, v6
	v_cmp_gt_i32_e64 s2, s6, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, vcc_lo, s2
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_6
; %bb.1:                                ; %.preheader
	s_clause 0x1
	s_load_b128 s[8:11], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	s_cmp_lt_i32 s5, 1
	s_cbranch_scc1 .LBB0_4
; %bb.2:                                ; %.lr.ph
	v_mul_lo_u32 v7, v6, s5
	v_dual_mov_b32 v8, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	s_ashr_i32 s7, s6, 31
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, s2, s10, v1
	v_lshlrev_b64 v[4:5], 2, v[7:8]
	v_add_co_ci_u32_e64 v3, null, s11, 0, s2
	v_mov_b32_e32 v1, v8
	s_lshl_b64 s[2:3], s[6:7], 2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v4, vcc_lo, s8, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s9, v5, vcc_lo
.LBB0_3:                                ; =>This Inner Loop Header: Depth=1
	global_load_b32 v9, v[4:5], off
	global_load_b32 v10, v[2:3], off
	s_add_i32 s5, s5, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s5, 0
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[7:8], null, v10, v9, v[1:2]
	v_add_co_u32 v2, vcc_lo, v2, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
	v_add_co_u32 v4, vcc_lo, v4, 4
	v_add_co_ci_u32_e32 v5, vcc_lo, 0, v5, vcc_lo
	v_mov_b32_e32 v1, v7
	s_cbranch_scc0 .LBB0_3
	s_branch .LBB0_5
.LBB0_4:
	v_mov_b32_e32 v1, 0
.LBB0_5:                                ; %Flow52
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, v6, s6, v[0:1]
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s0, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
	global_store_b32 v[2:3], v1, off
.LBB0_6:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z15matrix_multiplyPiS_S_iii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 36
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 11
		.amdhsa_next_free_sgpr 12
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z15matrix_multiplyPiS_S_iii, .Lfunc_end0-_Z15matrix_multiplyPiS_S_iii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 312
; NumSgprs: 14
; NumVgprs: 11
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 1
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 14
; NumVGPRsForWavesPerEU: 11
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 36
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z15matrix_multiplyPiS_S_iii
    .private_segment_fixed_size: 0
    .sgpr_count:     14
    .sgpr_spill_count: 0
    .symbol:         _Z15matrix_multiplyPiS_S_iii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     11
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
