// To compile: nvcc hw04.cu -o hw04
#include <sys/time.h>
#include <stdio.h>

#define N  1000000

__global__ void dotProduct(float *a, float *b, float *c){
    unsigned long id = (blockIdx.x*blockDim.x)+threadIdx.x;
    __shared__ float cache[1024];
    cache[threadIdx.x] = 0;

    if(id > N){ return; }

    cache[threadIdx.x] = a[id]*b[id];
    __syncthreads();

    int i = blockDim.x/2;
    while(i != 0){
        if(threadIdx.x < i){ cache[threadIdx.x] += cache[threadIdx.x+i]; }
        __syncthreads();
        i /= 2;
    }

    c[blockIdx.x] = cache[0];
}


void CUDAErrorCheck(const char *message){
  cudaError_t  error;
  error = cudaGetLastError();

  if(error != cudaSuccess){
    printf("\n CUDA ERROR in: %s -> %s\n", message, cudaGetErrorString(error));
    exit(0);
  }
}

int main(){
	float *A_CPU, *B_CPU, *C_CPU; //Pointers for memory on the Host
	long n = N;

	// Your variables start here.
	float *A_GPU, *B_GPU, *C_GPU;
    dim3 gridDim, blockDim;
	// Your variables stop here.

	//Allocating and loading Host (CPU) Memory
	A_CPU = (float*)malloc(n*sizeof(float));
	B_CPU = (float*)malloc(n*sizeof(float));
	C_CPU = (float*)malloc((1+(n-1)/1024)*sizeof(float));
	for(int i = 0; i < n; i++) {
        A_CPU[i] = 2.5;
        B_CPU[i] = 1.0;
    }

	// Your code starts here.
    //gridDim.x = (n < 1024) ? n:1024;
    gridDim.x = 1+(n-1)/1024;
    gridDim.y = 1;
    gridDim.z = 1;

    //blockDim.x = 1+(n-1)/1024;
    blockDim.x = (n < 1024) ? n:1024;
    blockDim.y = 1;
    blockDim.z = 1;

	cudaMalloc(&A_GPU, n*sizeof(float));
    CUDAErrorCheck("a cuda malloc...");
    cudaMalloc(&B_GPU, n*sizeof(float));
    CUDAErrorCheck("b cuda malloc...");
    cudaMalloc(&C_GPU, gridDim.x*sizeof(float));
    CUDAErrorCheck("c cuda malloc...");

    cudaMemcpyAsync(A_GPU, A_CPU, n*sizeof(float), cudaMemcpyHostToDevice);
    CUDAErrorCheck("a cuda memcpy from host...");
    cudaMemcpyAsync(B_GPU, B_CPU, n*sizeof(float), cudaMemcpyHostToDevice);
    CUDAErrorCheck("b cuda memcpy from host...");
    cudaMemcpyAsync(C_GPU, C_CPU, gridDim.x*sizeof(float), cudaMemcpyHostToDevice);
    CUDAErrorCheck("c cuda memcpy from host...");

    free(A_CPU);
    free(B_CPU);

    dotProduct<<<gridDim, blockDim>>>(A_GPU, B_GPU, C_GPU);
    CUDAErrorCheck("kernel...");

    cudaMemcpyAsync(C_CPU, C_GPU, gridDim.x*sizeof(float), cudaMemcpyDeviceToHost);
    CUDAErrorCheck("c cuda memcpy from device..");

    cudaFree(A_GPU);
    CUDAErrorCheck("a cuda free...");
    cudaFree(B_GPU);
    CUDAErrorCheck("b cuda free...");
    cudaFree(C_GPU);
    CUDAErrorCheck("c cuda free...");

    float ans = 0;
    for(int i=0; i<gridDim.x; i++){ ans += C_CPU[i]; }

    free(C_CPU);

    printf("%f\n", ans);
	// Your code stops here.
	return(0);
}

	.file	"tmpxft_003234cc_00000000-6_hw04.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2031:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2031:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"\n CUDA ERROR in: %s -> %s\n"
	.text
	.globl	_Z14CUDAErrorCheckPKc
	.type	_Z14CUDAErrorCheckPKc, @function
_Z14CUDAErrorCheckPKc:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movq	%rdi, %rbx
	call	cudaGetLastError@PLT
	testl	%eax, %eax
	je	.L2
	movl	%eax, %edi
	call	cudaGetErrorString@PLT
	movl	$2, %edi
	movq	%rbx, %rdx
	leaq	.LC0(%rip), %rsi
	movq	%rax, %rcx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	xorl	%edi, %edi
	call	exit@PLT
.L2:
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z14CUDAErrorCheckPKc, .-_Z14CUDAErrorCheckPKc
	.globl	_Z34__device_stub__Z10dotProductPfS_S_PfS_S_
	.type	_Z34__device_stub__Z10dotProductPfS_S_PfS_S_, @function
_Z34__device_stub__Z10dotProductPfS_S_PfS_S_:
.LFB2053:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L6
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z10dotProductPfS_S_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L6:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L8
	call	__stack_chk_fail@PLT
.L8:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2053:
	.size	_Z34__device_stub__Z10dotProductPfS_S_PfS_S_, .-_Z34__device_stub__Z10dotProductPfS_S_PfS_S_
	.globl	_Z10dotProductPfS_S_
	.type	_Z10dotProductPfS_S_, @function
_Z10dotProductPfS_S_:
.LFB2054:
	.cfi_startproc
	endbr64
	jmp	_Z34__device_stub__Z10dotProductPfS_S_PfS_S_
	.cfi_endproc
.LFE2054:
	.size	_Z10dotProductPfS_S_, .-_Z10dotProductPfS_S_
	.section	.rodata.str1.1
.LC4:
	.string	"a cuda malloc..."
.LC5:
	.string	"b cuda malloc..."
.LC6:
	.string	"c cuda malloc..."
.LC7:
	.string	"a cuda memcpy from host..."
.LC8:
	.string	"b cuda memcpy from host..."
.LC9:
	.string	"c cuda memcpy from host..."
.LC10:
	.string	"kernel..."
.LC11:
	.string	"c cuda memcpy from device.."
.LC12:
	.string	"a cuda free..."
.LC13:
	.string	"b cuda free..."
.LC14:
	.string	"c cuda free..."
.LC15:
	.string	"%f\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movl	$4000000, %edi
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	subq	$80, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 52(%rsp)
	movq	%rax, 64(%rsp)
	call	malloc@PLT
	movl	$4000000, %edi
	movq	%rax, %r12
	call	malloc@PLT
	movl	$3908, %edi
	movq	%rax, %rbp
	call	malloc@PLT
	movss	.LC2(%rip), %xmm1
	movss	.LC3(%rip), %xmm0
	movq	%rax, %rbx
	xorl	%eax, %eax
.L12:
	movss	%xmm1, (%r12,%rax)
	movss	%xmm0, 0(%rbp,%rax)
	addq	$4, %rax
	cmpq	$4000000, %rax
	jne	.L12
	movl	$4000000, %esi
	leaq	24(%rsp), %rdi
	movl	$1024, 60(%rsp)
	call	cudaMalloc@PLT
	leaq	.LC4(%rip), %rdi
	call	_Z14CUDAErrorCheckPKc
	movl	$4000000, %esi
	leaq	32(%rsp), %rdi
	call	cudaMalloc@PLT
	leaq	.LC5(%rip), %rdi
	call	_Z14CUDAErrorCheckPKc
	movl	$3908, %esi
	leaq	40(%rsp), %rdi
	call	cudaMalloc@PLT
	leaq	.LC6(%rip), %rdi
	call	_Z14CUDAErrorCheckPKc
	movq	24(%rsp), %rdi
	xorl	%r8d, %r8d
	movq	%r12, %rsi
	movl	$1, %ecx
	movl	$4000000, %edx
	call	cudaMemcpyAsync@PLT
	leaq	.LC7(%rip), %rdi
	call	_Z14CUDAErrorCheckPKc
	movq	32(%rsp), %rdi
	xorl	%r8d, %r8d
	movq	%rbp, %rsi
	movl	$1, %ecx
	movl	$4000000, %edx
	call	cudaMemcpyAsync@PLT
	leaq	.LC8(%rip), %rdi
	call	_Z14CUDAErrorCheckPKc
	movq	40(%rsp), %rdi
	xorl	%r8d, %r8d
	movq	%rbx, %rsi
	movl	$1, %ecx
	movl	$3908, %edx
	call	cudaMemcpyAsync@PLT
	leaq	.LC9(%rip), %rdi
	call	_Z14CUDAErrorCheckPKc
	movq	%r12, %rdi
	call	free@PLT
	movq	%rbp, %rdi
	call	free@PLT
	movl	68(%rsp), %ecx
	movl	56(%rsp), %esi
	xorl	%r9d, %r9d
	movl	$977, 48(%rsp)
	movq	60(%rsp), %rdx
	xorl	%r8d, %r8d
	movq	48(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L13
	movq	40(%rsp), %rdx
	movq	32(%rsp), %rsi
	movq	24(%rsp), %rdi
	call	_Z34__device_stub__Z10dotProductPfS_S_PfS_S_
.L13:
	leaq	.LC10(%rip), %rdi
	call	_Z14CUDAErrorCheckPKc
	movq	40(%rsp), %rsi
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movl	$2, %ecx
	movl	$3908, %edx
	call	cudaMemcpyAsync@PLT
	leaq	.LC11(%rip), %rdi
	call	_Z14CUDAErrorCheckPKc
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	leaq	.LC12(%rip), %rdi
	call	_Z14CUDAErrorCheckPKc
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	leaq	.LC13(%rip), %rdi
	call	_Z14CUDAErrorCheckPKc
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	leaq	.LC14(%rip), %rdi
	call	_Z14CUDAErrorCheckPKc
	xorl	%eax, %eax
	xorps	%xmm0, %xmm0
.L14:
	addss	(%rbx,%rax,4), %xmm0
	incq	%rax
	cmpq	$977, %rax
	jne	.L14
	movq	%rbx, %rdi
	movss	%xmm0, 12(%rsp)
	call	free@PLT
	movss	12(%rsp), %xmm0
	leaq	.LC15(%rip), %rsi
	movb	$1, %al
	movl	$2, %edi
	cvtss2sd	%xmm0, %xmm0
	call	__printf_chk@PLT
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L15
	call	__stack_chk_fail@PLT
.L15:
	addq	$80, %rsp
	.cfi_def_cfa_offset 32
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	main, .-main
	.section	.rodata.str1.1
.LC16:
	.string	"_Z10dotProductPfS_S_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2056:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC16(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z10dotProductPfS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2056:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC2:
	.long	1075838976
	.align 4
.LC3:
	.long	1065353216
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

// To compile: nvcc hw04.cu -o hw04

#include <hip/hip_runtime.h>
#include <sys/time.h>
#include <stdio.h>

#define N  1000000

__global__ void dotProduct(float *a, float *b, float *c){
    unsigned long id = (blockIdx.x*blockDim.x)+threadIdx.x;
    __shared__ float cache[1024];
    cache[threadIdx.x] = 0;

    if(id > N){ return; }

    cache[threadIdx.x] = a[id]*b[id];
    __syncthreads();

    int i = blockDim.x/2;
    while(i != 0){
        if(threadIdx.x < i){ cache[threadIdx.x] += cache[threadIdx.x+i]; }
        __syncthreads();
        i /= 2;
    }

    c[blockIdx.x] = cache[0];
}


void CUDAErrorCheck(const char *message){
  hipError_t  error;
  error = hipGetLastError();

  if(error != hipSuccess){
    printf("\n CUDA ERROR in: %s -> %s\n", message, hipGetErrorString(error));
    exit(0);
  }
}

int main(){
	float *A_CPU, *B_CPU, *C_CPU; //Pointers for memory on the Host
	long n = N;

	// Your variables start here.
	float *A_GPU, *B_GPU, *C_GPU;
    dim3 gridDim, blockDim;
	// Your variables stop here.

	//Allocating and loading Host (CPU) Memory
	A_CPU = (float*)malloc(n*sizeof(float));
	B_CPU = (float*)malloc(n*sizeof(float));
	C_CPU = (float*)malloc((1+(n-1)/1024)*sizeof(float));
	for(int i = 0; i < n; i++) {
        A_CPU[i] = 2.5;
        B_CPU[i] = 1.0;
    }

	// Your code starts here.
    //gridDim.x = (n < 1024) ? n:1024;
    gridDim.x = 1+(n-1)/1024;
    gridDim.y = 1;
    gridDim.z = 1;

    //blockDim.x = 1+(n-1)/1024;
    blockDim.x = (n < 1024) ? n:1024;
    blockDim.y = 1;
    blockDim.z = 1;

	hipMalloc(&A_GPU, n*sizeof(float));
    CUDAErrorCheck("a cuda malloc...");
    hipMalloc(&B_GPU, n*sizeof(float));
    CUDAErrorCheck("b cuda malloc...");
    hipMalloc(&C_GPU, gridDim.x*sizeof(float));
    CUDAErrorCheck("c cuda malloc...");

    hipMemcpyAsync(A_GPU, A_CPU, n*sizeof(float), hipMemcpyHostToDevice);
    CUDAErrorCheck("a cuda memcpy from host...");
    hipMemcpyAsync(B_GPU, B_CPU, n*sizeof(float), hipMemcpyHostToDevice);
    CUDAErrorCheck("b cuda memcpy from host...");
    hipMemcpyAsync(C_GPU, C_CPU, gridDim.x*sizeof(float), hipMemcpyHostToDevice);
    CUDAErrorCheck("c cuda memcpy from host...");

    free(A_CPU);
    free(B_CPU);

    dotProduct<<<gridDim, blockDim>>>(A_GPU, B_GPU, C_GPU);
    CUDAErrorCheck("kernel...");

    hipMemcpyAsync(C_CPU, C_GPU, gridDim.x*sizeof(float), hipMemcpyDeviceToHost);
    CUDAErrorCheck("c cuda memcpy from device..");

    hipFree(A_GPU);
    CUDAErrorCheck("a cuda free...");
    hipFree(B_GPU);
    CUDAErrorCheck("b cuda free...");
    hipFree(C_GPU);
    CUDAErrorCheck("c cuda free...");

    float ans = 0;
    for(int i=0; i<gridDim.x; i++){ ans += C_CPU[i]; }

    free(C_CPU);

    printf("%f\n", ans);
	// Your code stops here.
	return(0);
}

	.text
	.file	"hw04.hip"
	.globl	_Z25__device_stub__dotProductPfS_S_ # -- Begin function _Z25__device_stub__dotProductPfS_S_
	.type	_Z25__device_stub__dotProductPfS_S_,@function
_Z25__device_stub__dotProductPfS_S_:    # @_Z25__device_stub__dotProductPfS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10dotProductPfS_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z25__device_stub__dotProductPfS_S_, .Lfunc_end0-_Z25__device_stub__dotProductPfS_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z14CUDAErrorCheckPKc           # -- Begin function _Z14CUDAErrorCheckPKc
	.type	_Z14CUDAErrorCheckPKc,@function
_Z14CUDAErrorCheckPKc:                  # @_Z14CUDAErrorCheckPKc
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movq	%rdi, %rbx
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB1_2
# %bb.1:
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.LBB1_2:
	.cfi_def_cfa_offset 16
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %edi
	movq	%rbx, %rsi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	printf
	xorl	%edi, %edi
	callq	exit
.Lfunc_end1:
	.size	_Z14CUDAErrorCheckPKc, .Lfunc_end1-_Z14CUDAErrorCheckPKc
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$4000000, %edi                  # imm = 0x3D0900
	callq	malloc
	movq	%rax, %r14
	movl	$4000000, %edi                  # imm = 0x3D0900
	callq	malloc
	movq	%rax, %r15
	movl	$3908, %edi                     # imm = 0xF44
	callq	malloc
	movq	%rax, %rbx
	xorl	%eax, %eax
.LBB2_1:                                # =>This Inner Loop Header: Depth=1
	movl	$1075838976, (%r14,%rax,4)      # imm = 0x40200000
	movl	$1065353216, (%r15,%rax,4)      # imm = 0x3F800000
	incq	%rax
	cmpq	$1000000, %rax                  # imm = 0xF4240
	jne	.LBB2_1
# %bb.2:
	leaq	32(%rsp), %rbp
	movl	$4000000, %esi                  # imm = 0x3D0900
	movq	%rbp, %rdi
	callq	hipMalloc
	movl	$.L.str.1, %edi
	callq	_Z14CUDAErrorCheckPKc
	leaq	24(%rsp), %r13
	movl	$4000000, %esi                  # imm = 0x3D0900
	movq	%r13, %rdi
	callq	hipMalloc
	movl	$.L.str.2, %edi
	callq	_Z14CUDAErrorCheckPKc
	leaq	8(%rsp), %r12
	movl	$3908, %esi                     # imm = 0xF44
	movq	%r12, %rdi
	callq	hipMalloc
	movl	$.L.str.3, %edi
	callq	_Z14CUDAErrorCheckPKc
	movq	(%rbp), %rdi
	movl	$4000000, %edx                  # imm = 0x3D0900
	movq	%r14, %rsi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	hipMemcpyAsync
	movl	$.L.str.4, %edi
	callq	_Z14CUDAErrorCheckPKc
	movq	(%r13), %rdi
	movl	$4000000, %edx                  # imm = 0x3D0900
	movq	%r15, %rsi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	hipMemcpyAsync
	movl	$.L.str.5, %edi
	callq	_Z14CUDAErrorCheckPKc
	movq	(%r12), %rdi
	movl	$3908, %edx                     # imm = 0xF44
	movq	%rbx, %rsi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	hipMemcpyAsync
	movl	$.L.str.6, %edi
	callq	_Z14CUDAErrorCheckPKc
	movq	%r14, %rdi
	callq	free
	movq	%r15, %rdi
	callq	free
	movabsq	$4294968273, %rdi               # imm = 0x1000003D1
	leaq	47(%rdi), %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_4
# %bb.3:
	movq	32(%rsp), %rdi
	movq	24(%rsp), %rsi
	movq	8(%rsp), %rdx
	callq	_Z25__device_stub__dotProductPfS_S_
.LBB2_4:
	movl	$.L.str.7, %edi
	callq	_Z14CUDAErrorCheckPKc
	movq	8(%rsp), %rsi
	xorl	%r14d, %r14d
	movl	$3908, %edx                     # imm = 0xF44
	movq	%rbx, %rdi
	movl	$2, %ecx
	xorl	%r8d, %r8d
	callq	hipMemcpyAsync
	movl	$.L.str.8, %edi
	callq	_Z14CUDAErrorCheckPKc
	movq	32(%rsp), %rdi
	callq	hipFree
	movl	$.L.str.9, %edi
	callq	_Z14CUDAErrorCheckPKc
	movq	24(%rsp), %rdi
	callq	hipFree
	movl	$.L.str.10, %edi
	callq	_Z14CUDAErrorCheckPKc
	movq	8(%rsp), %rdi
	callq	hipFree
	movl	$.L.str.11, %edi
	callq	_Z14CUDAErrorCheckPKc
	xorps	%xmm0, %xmm0
.LBB2_5:                                # =>This Inner Loop Header: Depth=1
	addss	(%rbx,%r14,4), %xmm0
	incq	%r14
	cmpq	$977, %r14                      # imm = 0x3D1
	jne	.LBB2_5
# %bb.6:
	movq	%rbx, %rdi
	movss	%xmm0, 20(%rsp)                 # 4-byte Spill
	callq	free
	xorps	%xmm0, %xmm0
	cvtss2sd	20(%rsp), %xmm0                 # 4-byte Folded Reload
	movl	$.L.str.12, %edi
	movb	$1, %al
	callq	printf
	xorl	%eax, %eax
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10dotProductPfS_S_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z10dotProductPfS_S_,@object    # @_Z10dotProductPfS_S_
	.section	.rodata,"a",@progbits
	.globl	_Z10dotProductPfS_S_
	.p2align	3, 0x0
_Z10dotProductPfS_S_:
	.quad	_Z25__device_stub__dotProductPfS_S_
	.size	_Z10dotProductPfS_S_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"\n CUDA ERROR in: %s -> %s\n"
	.size	.L.str, 27

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"a cuda malloc..."
	.size	.L.str.1, 17

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"b cuda malloc..."
	.size	.L.str.2, 17

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"c cuda malloc..."
	.size	.L.str.3, 17

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"a cuda memcpy from host..."
	.size	.L.str.4, 27

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"b cuda memcpy from host..."
	.size	.L.str.5, 27

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"c cuda memcpy from host..."
	.size	.L.str.6, 27

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"kernel..."
	.size	.L.str.7, 10

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"c cuda memcpy from device.."
	.size	.L.str.8, 28

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"a cuda free..."
	.size	.L.str.9, 15

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"b cuda free..."
	.size	.L.str.10, 15

	.type	.L.str.11,@object               # @.str.11
.L.str.11:
	.asciz	"c cuda free..."
	.size	.L.str.11, 15

	.type	.L.str.12,@object               # @.str.12
.L.str.12:
	.asciz	"%f\n"
	.size	.L.str.12, 4

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z10dotProductPfS_S_"
	.size	.L__unnamed_1, 21

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z25__device_stub__dotProductPfS_S_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z10dotProductPfS_S_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z10dotProductPfS_S_    ; -- Begin function _Z10dotProductPfS_S_
	.globl	_Z10dotProductPfS_S_
	.p2align	8
	.type	_Z10dotProductPfS_S_,@function
_Z10dotProductPfS_S_:                   ; @_Z10dotProductPfS_S_
; %bb.0:
	s_load_b32 s3, s[0:1], 0x24
	s_mov_b32 s2, s15
	v_lshlrev_b32_e32 v3, 2, v0
	s_mov_b32 s4, exec_lo
	s_waitcnt lgkmcnt(0)
	s_and_b32 s3, s3, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mad_u64_u32 v[1:2], null, s2, s3, v[0:1]
	v_mov_b32_e32 v2, 0
	ds_store_b32 v3, v2
	v_cmpx_gt_u32_e32 0xf4241, v1
	s_cbranch_execz .LBB0_6
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	s_load_b64 s[0:1], s[0:1], 0x10
	s_cmp_lt_u32 s3, 2
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, s4, v1
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v2, vcc_lo
	v_add_co_u32 v1, vcc_lo, s6, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s7, v2, vcc_lo
	global_load_b32 v4, v[4:5], off
	global_load_b32 v1, v[1:2], off
	s_waitcnt vmcnt(0)
	v_mul_f32_e32 v1, v4, v1
	ds_store_b32 v3, v1
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB0_5
.LBB0_2:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_lshr_b32 s4, s3, 1
	s_mov_b32 s5, exec_lo
	v_cmpx_gt_u32_e64 s4, v0
	s_cbranch_execz .LBB0_4
; %bb.3:                                ;   in Loop: Header=BB0_2 Depth=1
	v_lshl_add_u32 v1, s4, 2, v3
	ds_load_b32 v1, v1
	ds_load_b32 v2, v3
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v1, v1, v2
	ds_store_b32 v3, v1
.LBB0_4:                                ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	s_cmp_gt_u32 s3, 3
	s_mov_b32 s3, s4
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB0_2
.LBB0_5:                                ; %._crit_edge
	v_mov_b32_e32 v0, 0
	s_mov_b32 s3, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[2:3], s[2:3], 2
	s_add_u32 s0, s0, s2
	ds_load_b32 v1, v0
	s_addc_u32 s1, s1, s3
	s_waitcnt lgkmcnt(0)
	global_store_b32 v0, v1, s[0:1]
.LBB0_6:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10dotProductPfS_S_
		.amdhsa_group_segment_fixed_size 4096
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z10dotProductPfS_S_, .Lfunc_end0-_Z10dotProductPfS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 328
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 4096 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 4096
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z10dotProductPfS_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z10dotProductPfS_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     6
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
