/*
 * Multiplying a 2D matrix using CUDA 
 */

#include<stdio.h>
#include<stdlib.h>
#include<assert.h>

#define BLOCK_SIZE 16

__global__ void gpu_matrix_mul( int *a, int *b, int *c, int m, int n, int k){
  int row = blockIdx.y + blockDim.y * threadIdx.y;
  int col = blockIdx.x + blockDim.x * threadIdx.x;
  int sum = 0;

  if(col < k && row < m){
    for(int i = 0; i < n; i++){
      sum += a[row*n + i] * b[i*k + col];
    }
    c[row * k + col] = sum;
  }
}

void cpu_matrix_mult(int *h_a, int *h_b, int *h_result, int m, int n, int k) {
  for (int i = 0; i < m; ++i) 
  {
    for (int j = 0; j < k; ++j) 
    {
      int tmp = 0.0;
      for (int h = 0; h < n; ++h) 
      {
        tmp += h_a[i * n + h] * h_b[h * k + j];
      }
      h_result[i * k + j] = tmp;
    }
  }
}

int main(){
  int m,n,k; // m=rows of 1st , n= cols of 1st and rows of 2nd , k = cols of 2nd
  srand(3333);

  m = 1024;
  n = 1024;
  k = 1024;

  //Allocate memory in host RAM, h_cc is used to store CPU results
  int *h_a, *h_b, *h_c , *h_cc;

  cudaMallocHost((void **) &h_a , sizeof(int)*m*n);
  cudaMallocHost((void **) &h_b , sizeof(int)*n*k);
  cudaMallocHost((void **) &h_c , sizeof(int)*m*k);
  cudaMallocHost((void **) &h_cc , sizeof(int)*m*k);

  //random initialie matrix A

  for(int i= 0; i < m; ++i){
    for(int j=0; j < n; ++j){
      h_a[i*n + j ] = rand() %1024;
    }
  }

  //Random intialize B
  for( int i = 0; i<n; ++i){
    for( int j = 0; j < n; j++){
      h_b[i*k + j] = rand()%1024;
    }
  }
  
  float gpu_elapsed_time_ms;

  cudaEvent_t start, stop;
  cudaEventCreate(&start);
  cudaEventCreate(&stop);

  cudaEventRecord(start, 0);
  
  //Allocate Memory on the device
  int *d_a, *d_b, *d_c;
  cudaMalloc((void **) &d_a, sizeof(int)*m*n);
  cudaMalloc((void **) &d_b, sizeof(int)*n*k);
  cudaMalloc((void **) &d_c, sizeof(int)*m*k);
 
  //Copy matrix A and B from host to device memory
  cudaMemcpy(d_a, h_a, sizeof(int)*m*n, cudaMemcpyHostToDevice);
  cudaMemcpy(d_b, h_b, sizeof(int)*n*k, cudaMemcpyHostToDevice);

  unsigned int grid_rows = (m + BLOCK_SIZE -1 ) / BLOCK_SIZE;
  unsigned int grid_cols = (k + BLOCK_SIZE -1 )/ BLOCK_SIZE;

  dim3 dimGrid(grid_cols, grid_rows);
  dim3 dimBlock( BLOCK_SIZE, BLOCK_SIZE);

  gpu_matrix_mul<<<dimGrid, dimBlock>>>(
        d_a, d_b, d_c, m, n, k 
    );
  cudaMemcpy(h_c, d_c, sizeof(int)*m*k, cudaMemcpyDeviceToHost);
  cudaThreadSynchronize();
  cudaEventRecord(stop,0);
  cudaEventSynchronize(stop);
  
  cudaEventElapsedTime(&gpu_elapsed_time_ms, start, stop);
  printf("Time Elapsed on matrix multiplication of %dx%d . %dx%d on GPU : %fms.\n\n", m,n,n,n,k, gpu_elapsed_time_ms);

  float cpu_elapsed_time_ms;

  cudaEventRecord(start, 0);

  cpu_matrix_mult(h_a, h_b, h_cc, m, n, k);

  cudaEventRecord(stop, 0);
  cudaEventSynchronize(stop);
  cudaEventElapsedTime(&cpu_elapsed_time_ms, start, stop);
  printf("Time elapsed on matrix multiplication of %dx%d . %dx%d on CPU: %f ms.\n\n", m, n, n, k, cpu_elapsed_time_ms);

}

	.file	"tmpxft_0034c02f_00000000-6_matrix_mul_cuda_2d.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2031:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2031:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z15cpu_matrix_multPiS_S_iii
	.type	_Z15cpu_matrix_multPiS_S_iii, @function
_Z15cpu_matrix_multPiS_S_iii:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movslq	%r9d, %rax
	movq	%rsi, %r11
	xorl	%r10d, %r10d
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	salq	$2, %rax
	xorl	%esi, %esi
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%ecx, %ebx
	xorl	%ecx, %ecx
	movq	%rdx, -8(%rsp)
	movq	%rax, -16(%rsp)
.L3:
	cmpl	%ebx, %r10d
	jge	.L2
	movq	-8(%rsp), %rdx
	movslq	%esi, %rax
	leaq	(%rdx,%rax,4), %r15
	movslq	%ecx, %rax
	leaq	(%rdi,%rax,4), %r14
	xorl	%eax, %eax
.L8:
	cmpl	%eax, %r9d
	jle	.L5
	leaq	(%r11,%rax,4), %r12
	xorl	%edx, %edx
	xorl	%ebp, %ebp
.L6:
	cmpl	%edx, %r8d
	jle	.L11
	movl	(%r14,%rdx,4), %r13d
	imull	(%r12), %r13d
	incq	%rdx
	addl	%r13d, %ebp
	movq	-16(%rsp), %r13
	addq	%r13, %r12
	jmp	.L6
.L11:
	movl	%ebp, (%r15,%rax,4)
	incq	%rax
	jmp	.L8
.L5:
	incl	%r10d
	addl	%r9d, %esi
	addl	%r8d, %ecx
	jmp	.L3
.L2:
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z15cpu_matrix_multPiS_S_iii, .-_Z15cpu_matrix_multPiS_S_iii
	.globl	_Z41__device_stub__Z14gpu_matrix_mulPiS_S_iiiPiS_S_iii
	.type	_Z41__device_stub__Z14gpu_matrix_mulPiS_S_iiiPiS_S_iii, @function
_Z41__device_stub__Z14gpu_matrix_mulPiS_S_iiiPiS_S_iii:
.LFB2053:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movl	%r9d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L12
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z14gpu_matrix_mulPiS_S_iii(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L12:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L14
	call	__stack_chk_fail@PLT
.L14:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2053:
	.size	_Z41__device_stub__Z14gpu_matrix_mulPiS_S_iiiPiS_S_iii, .-_Z41__device_stub__Z14gpu_matrix_mulPiS_S_iiiPiS_S_iii
	.globl	_Z14gpu_matrix_mulPiS_S_iii
	.type	_Z14gpu_matrix_mulPiS_S_iii, @function
_Z14gpu_matrix_mulPiS_S_iii:
.LFB2054:
	.cfi_startproc
	endbr64
	jmp	_Z41__device_stub__Z14gpu_matrix_mulPiS_S_iiiPiS_S_iii
	.cfi_endproc
.LFE2054:
	.size	_Z14gpu_matrix_mulPiS_S_iii, .-_Z14gpu_matrix_mulPiS_S_iii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"Time Elapsed on matrix multiplication of %dx%d . %dx%d on GPU : %fms.\n\n"
.LC1:
	.string	"Time elapsed on matrix multiplication of %dx%d . %dx%d on CPU: %f ms.\n\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movl	$3333, %edi
	movl	$1024, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	xorl	%ebp, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	subq	$112, %rsp
	.cfi_def_cfa_offset 144
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	call	srand@PLT
	leaq	8(%rsp), %rdi
	movl	$4194304, %esi
	call	cudaMallocHost@PLT
	leaq	16(%rsp), %rdi
	movl	$4194304, %esi
	call	cudaMallocHost@PLT
	leaq	24(%rsp), %rdi
	movl	$4194304, %esi
	call	cudaMallocHost@PLT
	leaq	32(%rsp), %rdi
	movl	$4194304, %esi
	call	cudaMallocHost@PLT
.L18:
	xorl	%ebx, %ebx
.L19:
	call	rand@PLT
	leaq	0(,%rbx,4), %rcx
	incq	%rbx
	addq	8(%rsp), %rcx
	cltd
	idivl	%r12d
	movl	%edx, (%rcx,%rbp)
	cmpq	$1024, %rbx
	jne	.L19
	addq	$4096, %rbp
	cmpq	$4194304, %rbp
	jne	.L18
	xorl	%ebp, %ebp
	movl	$1024, %r12d
.L20:
	xorl	%ebx, %ebx
.L21:
	call	rand@PLT
	leaq	0(,%rbx,4), %rcx
	incq	%rbx
	addq	16(%rsp), %rcx
	cltd
	idivl	%r12d
	movl	%edx, (%rcx,%rbp)
	cmpq	$1024, %rbx
	jne	.L21
	addq	$4096, %rbp
	cmpq	$4194304, %rbp
	jne	.L20
	leaq	40(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	48(%rsp), %rdi
	call	cudaEventCreate@PLT
	movq	40(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	leaq	56(%rsp), %rdi
	movl	$4194304, %esi
	call	cudaMalloc@PLT
	leaq	64(%rsp), %rdi
	movl	$4194304, %esi
	call	cudaMalloc@PLT
	leaq	72(%rsp), %rdi
	movl	$4194304, %esi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rsi
	movq	56(%rsp), %rdi
	movl	$1, %ecx
	movl	$4194304, %edx
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rsi
	movq	64(%rsp), %rdi
	movl	$1, %ecx
	movl	$4194304, %edx
	call	cudaMemcpy@PLT
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	movabsq	$68719476752, %rdx
	movl	$1, %esi
	movabsq	$274877907008, %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L23
	movq	72(%rsp), %rdx
	movq	64(%rsp), %rsi
	movl	$1024, %r9d
	movl	$1024, %r8d
	movq	56(%rsp), %rdi
	movl	$1024, %ecx
	call	_Z41__device_stub__Z14gpu_matrix_mulPiS_S_iiiPiS_S_iii
.L23:
	movq	72(%rsp), %rsi
	movq	24(%rsp), %rdi
	movl	$2, %ecx
	movl	$4194304, %edx
	call	cudaMemcpy@PLT
	call	cudaThreadSynchronize@PLT
	movq	48(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	48(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	48(%rsp), %rdx
	movq	40(%rsp), %rsi
	movq	%rsp, %rdi
	call	cudaEventElapsedTime@PLT
	cvtss2sd	(%rsp), %xmm0
	movl	$1024, %r9d
	movl	$1024, %r8d
	pushq	%rax
	.cfi_def_cfa_offset 152
	movl	$1024, %ecx
	movl	$1024, %edx
	movl	$2, %edi
	pushq	$1024
	.cfi_def_cfa_offset 160
	leaq	.LC0(%rip), %rsi
	movb	$1, %al
	call	__printf_chk@PLT
	popq	%rdx
	.cfi_def_cfa_offset 152
	popq	%rcx
	.cfi_def_cfa_offset 144
	xorl	%esi, %esi
	movq	40(%rsp), %rdi
	call	cudaEventRecord@PLT
	movq	32(%rsp), %rdx
	movq	16(%rsp), %rsi
	movl	$1024, %r9d
	movq	8(%rsp), %rdi
	movl	$1024, %r8d
	movl	$1024, %ecx
	call	_Z15cpu_matrix_multPiS_S_iii
	movq	48(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	48(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	48(%rsp), %rdx
	movq	40(%rsp), %rsi
	leaq	4(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	movl	$1024, %r9d
	movl	$1024, %r8d
	movl	$1024, %ecx
	movl	$1024, %edx
	leaq	.LC1(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	4(%rsp), %xmm0
	call	__printf_chk@PLT
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L24
	call	__stack_chk_fail@PLT
.L24:
	addq	$112, %rsp
	.cfi_def_cfa_offset 32
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	main, .-main
	.section	.rodata.str1.1
.LC2:
	.string	"_Z14gpu_matrix_mulPiS_S_iii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2056:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC2(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z14gpu_matrix_mulPiS_S_iii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2056:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

/*
 * Multiplying a 2D matrix using CUDA 
 */


#include <hip/hip_runtime.h>
#include<stdio.h>
#include<stdlib.h>
#include<assert.h>

#define BLOCK_SIZE 16

__global__ void gpu_matrix_mul( int *a, int *b, int *c, int m, int n, int k){
  int row = blockIdx.y + blockDim.y * threadIdx.y;
  int col = blockIdx.x + blockDim.x * threadIdx.x;
  int sum = 0;

  if(col < k && row < m){
    for(int i = 0; i < n; i++){
      sum += a[row*n + i] * b[i*k + col];
    }
    c[row * k + col] = sum;
  }
}

void cpu_matrix_mult(int *h_a, int *h_b, int *h_result, int m, int n, int k) {
  for (int i = 0; i < m; ++i) 
  {
    for (int j = 0; j < k; ++j) 
    {
      int tmp = 0.0;
      for (int h = 0; h < n; ++h) 
      {
        tmp += h_a[i * n + h] * h_b[h * k + j];
      }
      h_result[i * k + j] = tmp;
    }
  }
}

int main(){
  int m,n,k; // m=rows of 1st , n= cols of 1st and rows of 2nd , k = cols of 2nd
  srand(3333);

  m = 1024;
  n = 1024;
  k = 1024;

  //Allocate memory in host RAM, h_cc is used to store CPU results
  int *h_a, *h_b, *h_c , *h_cc;

  hipHostMalloc((void **) &h_a , sizeof(int)*m*n, hipHostMallocDefault);
  hipHostMalloc((void **) &h_b , sizeof(int)*n*k, hipHostMallocDefault);
  hipHostMalloc((void **) &h_c , sizeof(int)*m*k, hipHostMallocDefault);
  hipHostMalloc((void **) &h_cc , sizeof(int)*m*k, hipHostMallocDefault);

  //random initialie matrix A

  for(int i= 0; i < m; ++i){
    for(int j=0; j < n; ++j){
      h_a[i*n + j ] = rand() %1024;
    }
  }

  //Random intialize B
  for( int i = 0; i<n; ++i){
    for( int j = 0; j < n; j++){
      h_b[i*k + j] = rand()%1024;
    }
  }
  
  float gpu_elapsed_time_ms;

  hipEvent_t start, stop;
  hipEventCreate(&start);
  hipEventCreate(&stop);

  hipEventRecord(start, 0);
  
  //Allocate Memory on the device
  int *d_a, *d_b, *d_c;
  hipMalloc((void **) &d_a, sizeof(int)*m*n);
  hipMalloc((void **) &d_b, sizeof(int)*n*k);
  hipMalloc((void **) &d_c, sizeof(int)*m*k);
 
  //Copy matrix A and B from host to device memory
  hipMemcpy(d_a, h_a, sizeof(int)*m*n, hipMemcpyHostToDevice);
  hipMemcpy(d_b, h_b, sizeof(int)*n*k, hipMemcpyHostToDevice);

  unsigned int grid_rows = (m + BLOCK_SIZE -1 ) / BLOCK_SIZE;
  unsigned int grid_cols = (k + BLOCK_SIZE -1 )/ BLOCK_SIZE;

  dim3 dimGrid(grid_cols, grid_rows);
  dim3 dimBlock( BLOCK_SIZE, BLOCK_SIZE);

  gpu_matrix_mul<<<dimGrid, dimBlock>>>(
        d_a, d_b, d_c, m, n, k 
    );
  hipMemcpy(h_c, d_c, sizeof(int)*m*k, hipMemcpyDeviceToHost);
  hipDeviceSynchronize();
  hipEventRecord(stop,0);
  hipEventSynchronize(stop);
  
  hipEventElapsedTime(&gpu_elapsed_time_ms, start, stop);
  printf("Time Elapsed on matrix multiplication of %dx%d . %dx%d on GPU : %fms.\n\n", m,n,n,n,k, gpu_elapsed_time_ms);

  float cpu_elapsed_time_ms;

  hipEventRecord(start, 0);

  cpu_matrix_mult(h_a, h_b, h_cc, m, n, k);

  hipEventRecord(stop, 0);
  hipEventSynchronize(stop);
  hipEventElapsedTime(&cpu_elapsed_time_ms, start, stop);
  printf("Time elapsed on matrix multiplication of %dx%d . %dx%d on CPU: %f ms.\n\n", m, n, n, k, cpu_elapsed_time_ms);

}

	.text
	.file	"matrix_mul_cuda_2d.hip"
	.globl	_Z29__device_stub__gpu_matrix_mulPiS_S_iii # -- Begin function _Z29__device_stub__gpu_matrix_mulPiS_S_iii
	.type	_Z29__device_stub__gpu_matrix_mulPiS_S_iii,@function
_Z29__device_stub__gpu_matrix_mulPiS_S_iii: # @_Z29__device_stub__gpu_matrix_mulPiS_S_iii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	20(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	16(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z14gpu_matrix_mulPiS_S_iii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z29__device_stub__gpu_matrix_mulPiS_S_iii, .Lfunc_end0-_Z29__device_stub__gpu_matrix_mulPiS_S_iii
	.cfi_endproc
                                        # -- End function
	.globl	_Z15cpu_matrix_multPiS_S_iii    # -- Begin function _Z15cpu_matrix_multPiS_S_iii
	.type	_Z15cpu_matrix_multPiS_S_iii,@function
_Z15cpu_matrix_multPiS_S_iii:           # @_Z15cpu_matrix_multPiS_S_iii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r9d, -36(%rsp)                 # 4-byte Spill
	movq	%rdx, -8(%rsp)                  # 8-byte Spill
	movq	%rsi, -16(%rsp)                 # 8-byte Spill
	movq	%rdi, -24(%rsp)                 # 8-byte Spill
	testl	%ecx, %ecx
	jle	.LBB1_7
# %bb.1:                                # %.preheader27.lr.ph
	movslq	-36(%rsp), %rax                 # 4-byte Folded Reload
	movl	%ecx, %r9d
	movl	%eax, %r10d
	movl	%r8d, %r11d
	movq	%rax, -32(%rsp)                 # 8-byte Spill
	leaq	(,%rax,4), %rbx
	xorl	%r14d, %r14d
	xorl	%r15d, %r15d
.LBB1_2:                                # %.preheader27
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_4 Depth 2
                                        #       Child Loop BB1_9 Depth 3
	cmpl	$0, -36(%rsp)                   # 4-byte Folded Reload
	jle	.LBB1_6
# %bb.3:                                # %.preheader.lr.ph
                                        #   in Loop: Header=BB1_2 Depth=1
	movl	%r14d, %eax
	movq	-24(%rsp), %rcx                 # 8-byte Reload
	leaq	(%rcx,%rax,4), %r12
	movq	%r15, %rax
	imulq	-32(%rsp), %rax                 # 8-byte Folded Reload
	movq	-8(%rsp), %rcx                  # 8-byte Reload
	leaq	(%rcx,%rax,4), %r13
	movq	-16(%rsp), %rdi                 # 8-byte Reload
	xorl	%eax, %eax
.LBB1_4:                                # %.preheader
                                        #   Parent Loop BB1_2 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB1_9 Depth 3
	testl	%r8d, %r8d
	jle	.LBB1_5
# %bb.8:                                # %.lr.ph.preheader
                                        #   in Loop: Header=BB1_4 Depth=2
	xorl	%esi, %esi
	movq	%rdi, %rbp
	xorl	%edx, %edx
.LBB1_9:                                # %.lr.ph
                                        #   Parent Loop BB1_2 Depth=1
                                        #     Parent Loop BB1_4 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movl	(%rbp), %ecx
	imull	(%r12,%rsi,4), %ecx
	addl	%ecx, %edx
	incq	%rsi
	addq	%rbx, %rbp
	cmpq	%rsi, %r11
	jne	.LBB1_9
	jmp	.LBB1_10
.LBB1_5:                                #   in Loop: Header=BB1_4 Depth=2
	xorl	%edx, %edx
.LBB1_10:                               # %._crit_edge
                                        #   in Loop: Header=BB1_4 Depth=2
	movl	%edx, (%r13,%rax,4)
	incq	%rax
	addq	$4, %rdi
	cmpq	%r10, %rax
	jne	.LBB1_4
.LBB1_6:                                # %._crit_edge31
                                        #   in Loop: Header=BB1_2 Depth=1
	incq	%r15
	addl	%r8d, %r14d
	cmpq	%r9, %r15
	jne	.LBB1_2
.LBB1_7:                                # %._crit_edge33
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z15cpu_matrix_multPiS_S_iii, .Lfunc_end1-_Z15cpu_matrix_multPiS_S_iii
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$80, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	$3333, %edi                     # imm = 0xD05
	callq	srand
	leaq	24(%rsp), %rdi
	xorl	%ebx, %ebx
	movl	$4194304, %esi                  # imm = 0x400000
	xorl	%edx, %edx
	callq	hipHostMalloc
	leaq	16(%rsp), %rdi
	movl	$4194304, %esi                  # imm = 0x400000
	xorl	%edx, %edx
	callq	hipHostMalloc
	leaq	64(%rsp), %rdi
	movl	$4194304, %esi                  # imm = 0x400000
	xorl	%edx, %edx
	callq	hipHostMalloc
	leaq	56(%rsp), %rdi
	movl	$4194304, %esi                  # imm = 0x400000
	xorl	%edx, %edx
	callq	hipHostMalloc
	xorl	%r14d, %r14d
.LBB2_1:                                # %.preheader70
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_2 Depth 2
	xorl	%r15d, %r15d
.LBB2_2:                                #   Parent Loop BB2_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	callq	rand
                                        # kill: def $eax killed $eax def $rax
	leal	1023(%rax), %ecx
	testl	%eax, %eax
	cmovnsl	%eax, %ecx
	andl	$-1024, %ecx                    # imm = 0xFC00
	subl	%ecx, %eax
	movq	24(%rsp), %rcx
	addq	%rbx, %rcx
	movl	%eax, (%rcx,%r15,4)
	incq	%r15
	cmpq	$1024, %r15                     # imm = 0x400
	jne	.LBB2_2
# %bb.3:                                #   in Loop: Header=BB2_1 Depth=1
	incq	%r14
	addq	$4096, %rbx                     # imm = 0x1000
	cmpq	$1024, %r14                     # imm = 0x400
	jne	.LBB2_1
# %bb.4:                                # %.preheader.preheader
	xorl	%ebx, %ebx
	xorl	%r14d, %r14d
.LBB2_5:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_6 Depth 2
	xorl	%r15d, %r15d
.LBB2_6:                                #   Parent Loop BB2_5 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	callq	rand
                                        # kill: def $eax killed $eax def $rax
	leal	1023(%rax), %ecx
	testl	%eax, %eax
	cmovnsl	%eax, %ecx
	andl	$-1024, %ecx                    # imm = 0xFC00
	subl	%ecx, %eax
	movq	16(%rsp), %rcx
	addq	%rbx, %rcx
	movl	%eax, (%rcx,%r15,4)
	incq	%r15
	cmpq	$1024, %r15                     # imm = 0x400
	jne	.LBB2_6
# %bb.7:                                #   in Loop: Header=BB2_5 Depth=1
	incq	%r14
	addq	$4096, %rbx                     # imm = 0x1000
	cmpq	$1024, %r14                     # imm = 0x400
	jne	.LBB2_5
# %bb.8:
	leaq	8(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipEventCreate
	movq	%rsp, %rdi
	callq	hipEventCreate
	movq	(%rbx), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	leaq	48(%rsp), %rbx
	movl	$4194304, %esi                  # imm = 0x400000
	movq	%rbx, %rdi
	callq	hipMalloc
	leaq	40(%rsp), %r14
	movl	$4194304, %esi                  # imm = 0x400000
	movq	%r14, %rdi
	callq	hipMalloc
	leaq	32(%rsp), %rdi
	movl	$4194304, %esi                  # imm = 0x400000
	callq	hipMalloc
	movq	(%rbx), %rdi
	movq	24(%rsp), %rsi
	movl	$4194304, %edx                  # imm = 0x400000
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r14), %rdi
	movq	16(%rsp), %rsi
	movl	$4194304, %edx                  # imm = 0x400000
	movl	$1, %ecx
	callq	hipMemcpy
	movabsq	$274877907008, %rdi             # imm = 0x4000000040
	movabsq	$68719476752, %rdx              # imm = 0x1000000010
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_10
# %bb.9:
	movq	48(%rsp), %rdi
	movq	40(%rsp), %rsi
	movq	32(%rsp), %rdx
	movl	$1024, %ecx                     # imm = 0x400
	movl	$1024, %r8d                     # imm = 0x400
	movl	$1024, %r9d                     # imm = 0x400
	callq	_Z29__device_stub__gpu_matrix_mulPiS_S_iii
.LBB2_10:
	movq	64(%rsp), %rdi
	movq	32(%rsp), %rsi
	movl	$4194304, %edx                  # imm = 0x400000
	movl	$2, %ecx
	callq	hipMemcpy
	callq	hipDeviceSynchronize
	movq	(%rsp), %rdi
	xorl	%r14d, %r14d
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	(%rsp), %rdi
	callq	hipEventSynchronize
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdx
	leaq	76(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipEventElapsedTime
	cvtss2sd	(%rbx), %xmm0
	movl	$.L.str, %edi
	movl	$1024, %esi                     # imm = 0x400
	movl	$1024, %edx                     # imm = 0x400
	movl	$1024, %ecx                     # imm = 0x400
	movl	$1024, %r8d                     # imm = 0x400
	movl	$1024, %r9d                     # imm = 0x400
	movb	$1, %al
	callq	printf
	movq	8(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	24(%rsp), %rax
	movq	16(%rsp), %rcx
	movq	56(%rsp), %rdx
.LBB2_11:                               # %.preheader27.i
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_12 Depth 2
                                        #       Child Loop BB2_13 Depth 3
	movq	%r14, %rsi
	shlq	$12, %rsi
	addq	%rdx, %rsi
	movq	%rcx, %rdi
	xorl	%r8d, %r8d
.LBB2_12:                               # %.preheader.i
                                        #   Parent Loop BB2_11 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB2_13 Depth 3
	xorl	%r9d, %r9d
	movq	%rdi, %r10
	xorl	%r11d, %r11d
.LBB2_13:                               # %.lr.ph.i
                                        #   Parent Loop BB2_11 Depth=1
                                        #     Parent Loop BB2_12 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movl	(%r10), %ebx
	imull	(%rax,%r9,4), %ebx
	addl	%ebx, %r11d
	incq	%r9
	addq	$4096, %r10                     # imm = 0x1000
	cmpq	$1024, %r9                      # imm = 0x400
	jne	.LBB2_13
# %bb.14:                               # %._crit_edge.i
                                        #   in Loop: Header=BB2_12 Depth=2
	movl	%r11d, (%rsi,%r8,4)
	incq	%r8
	addq	$4, %rdi
	cmpq	$1024, %r8                      # imm = 0x400
	jne	.LBB2_12
# %bb.15:                               # %._crit_edge31.i
                                        #   in Loop: Header=BB2_11 Depth=1
	incq	%r14
	addq	$4096, %rax                     # imm = 0x1000
	cmpq	$1024, %r14                     # imm = 0x400
	jne	.LBB2_11
# %bb.16:                               # %_Z15cpu_matrix_multPiS_S_iii.exit
	movq	(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	(%rsp), %rdi
	callq	hipEventSynchronize
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdx
	leaq	72(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipEventElapsedTime
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rbx), %xmm0
	movl	$.L.str.1, %edi
	movl	$1024, %esi                     # imm = 0x400
	movl	$1024, %edx                     # imm = 0x400
	movl	$1024, %ecx                     # imm = 0x400
	movl	$1024, %r8d                     # imm = 0x400
	movb	$1, %al
	callq	printf
	xorl	%eax, %eax
	addq	$80, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z14gpu_matrix_mulPiS_S_iii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z14gpu_matrix_mulPiS_S_iii,@object # @_Z14gpu_matrix_mulPiS_S_iii
	.section	.rodata,"a",@progbits
	.globl	_Z14gpu_matrix_mulPiS_S_iii
	.p2align	3, 0x0
_Z14gpu_matrix_mulPiS_S_iii:
	.quad	_Z29__device_stub__gpu_matrix_mulPiS_S_iii
	.size	_Z14gpu_matrix_mulPiS_S_iii, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Time Elapsed on matrix multiplication of %dx%d . %dx%d on GPU : %fms.\n\n"
	.size	.L.str, 72

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"Time elapsed on matrix multiplication of %dx%d . %dx%d on CPU: %f ms.\n\n"
	.size	.L.str.1, 72

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z14gpu_matrix_mulPiS_S_iii"
	.size	.L__unnamed_1, 28

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z29__device_stub__gpu_matrix_mulPiS_S_iii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z14gpu_matrix_mulPiS_S_iii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z14gpu_matrix_mulPiS_S_iii ; -- Begin function _Z14gpu_matrix_mulPiS_S_iii
	.globl	_Z14gpu_matrix_mulPiS_S_iii
	.p2align	8
	.type	_Z14gpu_matrix_mulPiS_S_iii,@function
_Z14gpu_matrix_mulPiS_S_iii:            ; @_Z14gpu_matrix_mulPiS_S_iii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x34
	s_load_b128 s[4:7], s[0:1], 0x18
	v_and_b32_e32 v1, 0x3ff, v0
	v_bfe_u32 v2, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s3, s2, 0xffff
	s_lshr_b32 s2, s2, 16
	v_mad_u32_u24 v0, v1, s3, s14
	v_mad_u32_u24 v6, v2, s2, s15
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e32 vcc_lo, s6, v0
	v_cmp_gt_i32_e64 s2, s4, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, vcc_lo, s2
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_6
; %bb.1:                                ; %.preheader
	s_clause 0x1
	s_load_b128 s[8:11], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	s_cmp_lt_i32 s5, 1
	s_cbranch_scc1 .LBB0_4
; %bb.2:                                ; %.lr.ph
	v_mul_lo_u32 v1, v6, s5
	v_mov_b32_e32 v4, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v2, 31, v1
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	v_mov_b32_e32 v1, 0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v2, vcc_lo, s8, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s9, v3, vcc_lo
.LBB0_3:                                ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_ashrrev_i32_e32 v5, 31, v4
	s_add_i32 s5, s5, -1
	s_cmp_eq_u32 s5, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[7:8], 2, v[4:5]
	v_add_co_u32 v7, vcc_lo, s10, v7
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v8, vcc_lo, s11, v8, vcc_lo
	global_load_b32 v5, v[2:3], off
	global_load_b32 v9, v[7:8], off
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[7:8], null, v9, v5, v[1:2]
	v_add_co_u32 v2, vcc_lo, v2, 4
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_dual_mov_b32 v1, v7 :: v_dual_add_nc_u32 v4, s6, v4
	s_cbranch_scc0 .LBB0_3
	s_branch .LBB0_5
.LBB0_4:
	v_mov_b32_e32 v1, 0
.LBB0_5:                                ; %Flow54
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, v6, s6, v[0:1]
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s0, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
	global_store_b32 v[2:3], v1, off
.LBB0_6:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z14gpu_matrix_mulPiS_S_iii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z14gpu_matrix_mulPiS_S_iii, .Lfunc_end0-_Z14gpu_matrix_mulPiS_S_iii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 356
; NumSgprs: 18
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         44
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         52
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         54
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         56
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         58
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         60
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         62
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         104
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 296
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z14gpu_matrix_mulPiS_S_iii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z14gpu_matrix_mulPiS_S_iii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     10
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
