//
// Created by igor on 11.05.2021.
//

#include "ConvMask.cuh"

__device__ __host__ double* ConvMask::operator[](std::size_t at){
    return data[at];
}
__device__ __host__ ConvMask::ConvMask(std::initializer_list<double> list) noexcept : data() {
    int i = 0;
    double sum = 0;
    for(double d: list){
        data[0][i] = d;
        sum += d;
        ++i;
    }

    for (int j = 0; j < 9; ++j){
        data[0][j] /= sum;
    }
}


	.file	"tmpxft_00263e95_00000000-6_ConvMask.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2014:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2014:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.align 2
	.globl	_ZN8ConvMaskixEm
	.type	_ZN8ConvMaskixEm, @function
_ZN8ConvMaskixEm:
.LFB2008:
	.cfi_startproc
	endbr64
	imulq	$24, %rsi, %rsi
	leaq	(%rdi,%rsi), %rax
	ret
	.cfi_endproc
.LFE2008:
	.size	_ZN8ConvMaskixEm, .-_ZN8ConvMaskixEm
	.align 2
	.globl	_ZN8ConvMaskC2ESt16initializer_listIdE
	.type	_ZN8ConvMaskC2ESt16initializer_listIdE, @function
_ZN8ConvMaskC2ESt16initializer_listIdE:
.LFB2010:
	.cfi_startproc
	endbr64
	movq	$0x000000000, (%rdi)
	salq	$3, %rdx
	xorl	%eax, %eax
	xorps	%xmm1, %xmm1
	movq	$0x000000000, 8(%rdi)
	movq	$0x000000000, 16(%rdi)
	movq	$0x000000000, 24(%rdi)
	movq	$0x000000000, 32(%rdi)
	movq	$0x000000000, 40(%rdi)
	movq	$0x000000000, 48(%rdi)
	movq	$0x000000000, 56(%rdi)
	movq	$0x000000000, 64(%rdi)
.L4:
	cmpq	%rax, %rdx
	je	.L9
	movsd	(%rsi,%rax), %xmm0
	movsd	%xmm0, (%rdi,%rax)
	addsd	%xmm0, %xmm1
	addq	$8, %rax
	jmp	.L4
.L9:
	xorl	%eax, %eax
.L6:
	movsd	(%rdi,%rax,8), %xmm0
	divsd	%xmm1, %xmm0
	movsd	%xmm0, (%rdi,%rax,8)
	incq	%rax
	cmpq	$9, %rax
	jne	.L6
	ret
	.cfi_endproc
.LFE2010:
	.size	_ZN8ConvMaskC2ESt16initializer_listIdE, .-_ZN8ConvMaskC2ESt16initializer_listIdE
	.globl	_ZN8ConvMaskC1ESt16initializer_listIdE
	.set	_ZN8ConvMaskC1ESt16initializer_listIdE,_ZN8ConvMaskC2ESt16initializer_listIdE
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2037:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	movq	%rax, %rdi
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2037:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

//
// Created by igor on 11.05.2021.
//

#ifndef CUDATEST_CONVMASK_CUH
#define CUDATEST_CONVMASK_CUH


#include <initializer_list>

class ConvMask {
public:
    double data[3][3];
    __device__ __host__ double*  operator[](std::size_t at);
    __device__ __host__ ConvMask(std::initializer_list<double> data) noexcept;
};


#endif //CUDATEST_CONVMASK_CUH

	.text
	.file	"ConvMask.hip"
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_

	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.amdgpu_metadata
---
amdhsa.kernels:  []
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
