/*
 * std_page.cu
 * 
 * examine paging with kernel launch
 */
 


#include <stdio.h>
#include <math.h>
#include <cuda.h>

#define NL printf("\n")

// Standard Page based on a memory allocation of approx 1.6GiB
#define StdPageX 1024
#define StdPageY 200000
#define Elements StdPageX*StdPageY

//----------------------------------------------------------------------
__global__ void set_squares(long *d_squares, long n_squares) {
	long i = threadIdx.x + (blockIdx.x * blockDim.x);
	if(i < n_squares) d_squares[i] = (i+1)*(i+1);
}

//----------------------------------------------------------------------
__global__ void func_g(long *managed_sums, long N, long* d_squares, long nSquares, int pageidx) {

	long i = threadIdx.x + (blockDim.x * blockIdx.x);
	if((i == 0)||(i > N)) {
		return;
	}else if(i < 4) {
		managed_sums[i] = 1;
		return;
	} else {
		// search for largest square which divides i
		for(int d = nSquares-1; d >= 0; --d) {
			if((i % d_squares[d]) == 0) {
				managed_sums[i] = d_squares[d];
				return;
			} // if...
		} //for d...
	} // else...
}
//----------------------------------------------------------------------
int main(int argc, char **argv) {
	
	const long MaxN = 1e14 + 1;
	cudaError_t error_id;
	long *d_squares = NULL;
	
	// extract target N
	long x = 0;
	if(argc == 2) {
		x = atol(argv[1]);
	} else {
		printf("usage: stdp N\n");
		exit(1);
	}	
	const long N = x;
	if(N > MaxN) {
		printf("target: %ld exceeds program limitations %ld\n", N, MaxN);
		exit(2);
	}
	
	// determine the standard page count nPages for N
	const int nPages = (N / (StdPageX * StdPageY)) + 1;
		
	// determine array dimensions for squares
	const long nSquares = (long)(sqrt(N+1));	// defines size of array	

	printf("target: %ld	nSquares: %ld\n", N, nSquares);
	printf("nPages: %d\n", nPages);
	
	// Allocate space on device for squares array
	error_id = cudaMalloc(&d_squares, sizeof(long)*nSquares);
	if(error_id != cudaSuccess) {
		printf("cudaMalloc squares failed with %d\n", error_id);
		exit(1);
	}
	
	// launch the generator on kernel
	printf("Generating squares array...");
	cudaGetLastError(); // set cuda success to 1
	set_squares<<< ((nSquares/1024)+1), 1024 >>>(d_squares, nSquares);
	error_id = cudaPeekAtLastError();
	if(error_id != cudaSuccess) {
		printf("set_squares failed with %s\n", cudaGetErrorString(error_id));
		exit(1);
	}
	printf("done.\n");
	
	// Allocate managed memory for standard page
	cudaDeviceSynchronize();		
	long* managed_sums = NULL;
	error_id = cudaMallocManaged(&managed_sums, sizeof(long)*Elements);
	if(error_id != cudaSuccess) {
		printf("cudaMallocManaged sums failed with %d\n", error_id);
		exit(1);
	}
	printf("Allocated Managed memory: %d blocks of %d threads.\n", StdPageY, StdPageX);
	
	// Now dp nPages of kernel launches
	for(int pageidx = 0; pageidx < nPages; ++pageidx) {
		printf("page:%d\n", pageidx);
		// launch a kernel using calculated configuration
		func_g<<<StdPageY, StdPageX>>>(managed_sums, N, d_squares, nSquares, pageidx);
		cudaDeviceSynchronize();		
	}
	// Clean up code
	NL;
	cudaFree(managed_sums);
	cudaFree(d_squares);
	
}


	.file	"tmpxft_003a9d0b_00000000-6_std_page.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2030:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z32__device_stub__Z11set_squaresPllPll
	.type	_Z32__device_stub__Z11set_squaresPllPll, @function
_Z32__device_stub__Z11set_squaresPllPll:
.LFB2052:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z11set_squaresPll(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L2:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2052:
	.size	_Z32__device_stub__Z11set_squaresPllPll, .-_Z32__device_stub__Z11set_squaresPllPll
	.globl	_Z11set_squaresPll
	.type	_Z11set_squaresPll, @function
_Z11set_squaresPll:
.LFB2053:
	.cfi_startproc
	endbr64
	jmp	_Z32__device_stub__Z11set_squaresPllPll
	.cfi_endproc
.LFE2053:
	.size	_Z11set_squaresPll, .-_Z11set_squaresPll
	.globl	_Z30__device_stub__Z6func_gPllS_liPllS_li
	.type	_Z30__device_stub__Z6func_gPllS_liPllS_li, @function
_Z30__device_stub__Z6func_gPllS_liPllS_li:
.LFB2054:
	.cfi_startproc
	endbr64
	subq	$168, %rsp
	.cfi_def_cfa_offset 176
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	56(%rsp), %rcx
	movl	%r8d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 144(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	pushq	56(%rsp)
	.cfi_def_cfa_offset 184
	leaq	_Z6func_gPllS_li(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 192
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L8:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$168, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2054:
	.size	_Z30__device_stub__Z6func_gPllS_liPllS_li, .-_Z30__device_stub__Z6func_gPllS_liPllS_li
	.globl	_Z6func_gPllS_li
	.type	_Z6func_gPllS_li, @function
_Z6func_gPllS_li:
.LFB2055:
	.cfi_startproc
	endbr64
	jmp	_Z30__device_stub__Z6func_gPllS_liPllS_li
	.cfi_endproc
.LFE2055:
	.size	_Z6func_gPllS_li, .-_Z6func_gPllS_li
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"usage: stdp N\n"
.LC1:
	.string	"target: %ld exceeds program limitations %ld\n"
.LC2:
	.string	"target: %ld\tnSquares: %ld\n"
.LC3:
	.string	"nPages: %d\n"
.LC4:
	.string	"cudaMalloc squares failed with %d\n"
.LC5:
	.string	"Generating squares array..."
.LC6:
	.string	"set_squares failed with %s\n"
.LC7:
	.string	"done.\n"
.LC8:
	.string	"cudaMallocManaged sums failed with %d\n"
.LC9:
	.string	"Allocated Managed memory: %d blocks of %d threads.\n"
.LC10:
	.string	"page:%d\n"
.LC11:
	.string	"\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	xorl	%edx, %edx
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	subq	$48, %rsp
	.cfi_def_cfa_offset 96
	movq	%fs:40, %rax
	movq	%rax, 40(%rsp)
	xorl	%eax, %eax
	movq	%rdx, (%rsp)
	cmpl	$2, %edi
	jne	.L14
	movq	8(%rsi), %rdi
	call	atol@PLT
	movabsq	$100000000000001, %rcx
	movq	%rax, %rbx
	cmpq	%rcx, %rax
	jle	.L25
	movq	%rax, %rdx
	movl	$2, %edi
	leaq	.LC1(%rip), %rsi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$2, %edi
	jmp	.L27
.L14:
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	jmp	.L28
.L25:
	movl	$204800000, %ecx
	cqto
	idivq	%rcx
	leal	1(%rax), %r13d
	leaq	1(%rbx), %rax
	cvtsi2sdq	%rax, %xmm0
	call	sqrt@PLT
	movq	%rbx, %rdx
	movl	$2, %edi
	xorl	%eax, %eax
	cvttsd2siq	%xmm0, %rbp
	leaq	.LC2(%rip), %rsi
	movq	%rbp, %rcx
	call	__printf_chk@PLT
	movl	%r13d, %edx
	movl	$2, %edi
	xorl	%eax, %eax
	leaq	.LC3(%rip), %rsi
	call	__printf_chk@PLT
	leaq	0(,%rbp,8), %rsi
	movq	%rsp, %rdi
	call	cudaMalloc@PLT
	movl	%eax, %edx
	testl	%eax, %eax
	je	.L17
	leaq	.LC4(%rip), %rsi
.L29:
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L28:
	movl	$1, %edi
.L27:
	call	exit@PLT
.L17:
	leaq	.LC5(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	call	cudaGetLastError@PLT
	movq	%rbp, %rax
	movl	$1024, %esi
	xorl	%r9d, %r9d
	cqto
	movl	$4194305, %ecx
	xorl	%r8d, %r8d
	movl	$1, 36(%rsp)
	idivq	%rsi
	salq	$10, %rcx
	movq	%rcx, 28(%rsp)
	movq	%rcx, %rdx
	movl	$1, %ecx
	incl	%eax
	movl	%eax, 16(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 20(%rsp)
	movq	16(%rsp), %rdi
	movl	24(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L18
	movq	(%rsp), %rdi
	movq	%rbp, %rsi
	call	_Z32__device_stub__Z11set_squaresPllPll
.L18:
	call	cudaPeekAtLastError@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L19
	call	cudaGetErrorString@PLT
	leaq	.LC6(%rip), %rsi
	movl	$2, %edi
	movq	%rax, %rdx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	jmp	.L28
.L19:
	leaq	.LC7(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	call	cudaDeviceSynchronize@PLT
	xorl	%eax, %eax
	movl	$1, %edx
	movl	$1638400000, %esi
	leaq	8(%rsp), %rdi
	movq	%rax, 8(%rsp)
	call	cudaMallocManaged@PLT
	leaq	.LC8(%rip), %rsi
	movl	%eax, %edx
	testl	%eax, %eax
	jne	.L29
	movl	$1024, %ecx
	movl	$200000, %edx
	xorl	%eax, %eax
	xorl	%r12d, %r12d
	leaq	.LC9(%rip), %rsi
	movl	$2, %edi
	leaq	.LC10(%rip), %r14
	call	__printf_chk@PLT
.L21:
	cmpl	%r13d, %r12d
	jge	.L30
	movl	%r12d, %edx
	movq	%r14, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$4194305, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$67111989, %edi
	salq	$10, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	salq	$6, %rdi
	movq	%rdx, 28(%rsp)
	movl	$1, 36(%rsp)
	movq	%rdi, 16(%rsp)
	movl	$1, 24(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L22
	movq	(%rsp), %rdx
	movq	8(%rsp), %rdi
	movl	%r12d, %r8d
	movq	%rbp, %rcx
	movq	%rbx, %rsi
	call	_Z30__device_stub__Z6func_gPllS_liPllS_li
.L22:
	call	cudaDeviceSynchronize@PLT
	incl	%r12d
	jmp	.L21
.L30:
	leaq	.LC11(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rax
	subq	%fs:40, %rax
	je	.L24
	call	__stack_chk_fail@PLT
.L24:
	addq	$48, %rsp
	.cfi_def_cfa_offset 48
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	main, .-main
	.section	.rodata.str1.1
.LC12:
	.string	"_Z6func_gPllS_li"
.LC13:
	.string	"_Z11set_squaresPll"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2057:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC12(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z6func_gPllS_li(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC13(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z11set_squaresPll(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2057:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

/*
 * std_page.cu
 * 
 * examine paging with kernel launch
 */
 


#include <stdio.h>
#include <math.h>
#include <hip/hip_runtime.h>

#define NL printf("\n")

// Standard Page based on a memory allocation of approx 1.6GiB
#define StdPageX 1024
#define StdPageY 200000
#define Elements StdPageX*StdPageY

//----------------------------------------------------------------------
__global__ void set_squares(long *d_squares, long n_squares) {
	long i = threadIdx.x + (blockIdx.x * blockDim.x);
	if(i < n_squares) d_squares[i] = (i+1)*(i+1);
}

//----------------------------------------------------------------------
__global__ void func_g(long *managed_sums, long N, long* d_squares, long nSquares, int pageidx) {

	long i = threadIdx.x + (blockDim.x * blockIdx.x);
	if((i == 0)||(i > N)) {
		return;
	}else if(i < 4) {
		managed_sums[i] = 1;
		return;
	} else {
		// search for largest square which divides i
		for(int d = nSquares-1; d >= 0; --d) {
			if((i % d_squares[d]) == 0) {
				managed_sums[i] = d_squares[d];
				return;
			} // if...
		} //for d...
	} // else...
}
//----------------------------------------------------------------------
int main(int argc, char **argv) {
	
	const long MaxN = 1e14 + 1;
	hipError_t error_id;
	long *d_squares = NULL;
	
	// extract target N
	long x = 0;
	if(argc == 2) {
		x = atol(argv[1]);
	} else {
		printf("usage: stdp N\n");
		exit(1);
	}	
	const long N = x;
	if(N > MaxN) {
		printf("target: %ld exceeds program limitations %ld\n", N, MaxN);
		exit(2);
	}
	
	// determine the standard page count nPages for N
	const int nPages = (N / (StdPageX * StdPageY)) + 1;
		
	// determine array dimensions for squares
	const long nSquares = (long)(sqrt(N+1));	// defines size of array	

	printf("target: %ld	nSquares: %ld\n", N, nSquares);
	printf("nPages: %d\n", nPages);
	
	// Allocate space on device for squares array
	error_id = hipMalloc(&d_squares, sizeof(long)*nSquares);
	if(error_id != hipSuccess) {
		printf("hipMalloc squares failed with %d\n", error_id);
		exit(1);
	}
	
	// launch the generator on kernel
	printf("Generating squares array...");
	hipGetLastError(); // set cuda success to 1
	set_squares<<< ((nSquares/1024)+1), 1024 >>>(d_squares, nSquares);
	error_id = hipPeekAtLastError();
	if(error_id != hipSuccess) {
		printf("set_squares failed with %s\n", hipGetErrorString(error_id));
		exit(1);
	}
	printf("done.\n");
	
	// Allocate managed memory for standard page
	hipDeviceSynchronize();		
	long* managed_sums = NULL;
	error_id = hipMallocManaged(&managed_sums, sizeof(long)*Elements);
	if(error_id != hipSuccess) {
		printf("hipMallocManaged sums failed with %d\n", error_id);
		exit(1);
	}
	printf("Allocated Managed memory: %d blocks of %d threads.\n", StdPageY, StdPageX);
	
	// Now dp nPages of kernel launches
	for(int pageidx = 0; pageidx < nPages; ++pageidx) {
		printf("page:%d\n", pageidx);
		// launch a kernel using calculated configuration
		func_g<<<StdPageY, StdPageX>>>(managed_sums, N, d_squares, nSquares, pageidx);
		hipDeviceSynchronize();		
	}
	// Clean up code
	NL;
	hipFree(managed_sums);
	hipFree(d_squares);
	
}


	.text
	.file	"std_page.hip"
	.globl	_Z26__device_stub__set_squaresPll # -- Begin function _Z26__device_stub__set_squaresPll
	.type	_Z26__device_stub__set_squaresPll,@function
_Z26__device_stub__set_squaresPll:      # @_Z26__device_stub__set_squaresPll
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11set_squaresPll, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z26__device_stub__set_squaresPll, .Lfunc_end0-_Z26__device_stub__set_squaresPll
	.cfi_endproc
                                        # -- End function
	.globl	_Z21__device_stub__func_gPllS_li # -- Begin function _Z21__device_stub__func_gPllS_li
	.type	_Z21__device_stub__func_gPllS_li,@function
_Z21__device_stub__func_gPllS_li:       # @_Z21__device_stub__func_gPllS_li
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	12(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z6func_gPllS_li, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z21__device_stub__func_gPllS_li, .Lfunc_end1-_Z21__device_stub__func_gPllS_li
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	$0, 8(%rsp)
	cmpl	$2, %edi
	jne	.LBB2_16
# %bb.1:
	movabsq	$100000000000001, %r14          # imm = 0x5AF3107A4001
	movq	8(%rsi), %rdi
	callq	atol
	movq	%rax, %rbx
	cmpq	%r14, %rax
	jg	.LBB2_18
# %bb.2:
	movabsq	$3022314549036572937, %rcx      # imm = 0x29F16B11C6D1E109
	movq	%rbx, %rax
	imulq	%rcx
	movq	%rdx, %r14
	movq	%rdx, %r13
	shrq	$63, %r13
	shrq	$25, %r14
	movq	%rbx, %rax
	incq	%rax
	cvtsi2sd	%rax, %xmm0
	leal	(%r14,%r13), %ebp
	incl	%ebp
	xorpd	%xmm1, %xmm1
	ucomisd	%xmm1, %xmm0
	jb	.LBB2_4
# %bb.3:
	sqrtsd	%xmm0, %xmm0
	jmp	.LBB2_5
.LBB2_4:                                # %call.sqrt
	callq	sqrt
.LBB2_5:                                # %.split
	cvttsd2si	%xmm0, %r15
	movl	$.L.str.2, %edi
	movq	%rbx, %rsi
	movq	%r15, %rdx
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.3, %edi
	movl	%ebp, %esi
	xorl	%eax, %eax
	callq	printf
	leaq	(,%r15,8), %rsi
	leaq	8(%rsp), %rdi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB2_19
# %bb.6:
	movabsq	$4294968320, %r12               # imm = 0x100000400
	movl	$.L.str.5, %edi
	xorl	%eax, %eax
	callq	printf
	callq	hipGetLastError
	leaq	1023(%r15), %rax
	testq	%r15, %r15
	cmovnsq	%r15, %rax
	shrq	$10, %rax
	incl	%eax
	leaq	(%rax,%r12), %rdi
	addq	$-1024, %rdi                    # imm = 0xFC00
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_8
# %bb.7:
	movq	8(%rsp), %rdi
	movq	%r15, %rsi
	callq	_Z26__device_stub__set_squaresPll
.LBB2_8:
	callq	hipPeekAtLastError
	testl	%eax, %eax
	jne	.LBB2_20
# %bb.9:
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	callq	hipDeviceSynchronize
	leaq	16(%rsp), %rdi
	movq	$0, (%rdi)
	movl	$1638400000, %esi               # imm = 0x61A80000
	movl	$1, %edx
	callq	hipMallocManaged
	testl	%eax, %eax
	jne	.LBB2_21
# %bb.10:
	addl	%r13d, %r14d
	movl	$.L.str.9, %edi
	movl	$200000, %esi                   # imm = 0x30D40
	movl	$1024, %edx                     # imm = 0x400
	xorl	%eax, %eax
	callq	printf
	cmpl	$2147483646, %r14d              # imm = 0x7FFFFFFE
	ja	.LBB2_15
# %bb.11:                               # %.lr.ph.preheader
	incl	%r14d
	leaq	198976(%r12), %r13
	xorl	%ebp, %ebp
.LBB2_12:                               # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movl	$.L.str.10, %edi
	movl	%ebp, %esi
	xorl	%eax, %eax
	callq	printf
	movq	%r13, %rdi
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_14
# %bb.13:                               #   in Loop: Header=BB2_12 Depth=1
	movq	16(%rsp), %rdi
	movq	8(%rsp), %rdx
	movq	%rbx, %rsi
	movq	%r15, %rcx
	movl	%ebp, %r8d
	callq	_Z21__device_stub__func_gPllS_li
.LBB2_14:                               #   in Loop: Header=BB2_12 Depth=1
	callq	hipDeviceSynchronize
	incl	%ebp
	cmpl	%ebp, %r14d
	jne	.LBB2_12
.LBB2_15:                               # %._crit_edge
	movl	$10, %edi
	callq	putchar@PLT
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB2_16:
	.cfi_def_cfa_offset 80
	movl	$.Lstr, %edi
	callq	puts@PLT
	jmp	.LBB2_17
.LBB2_18:
	movl	$.L.str.1, %edi
	movq	%rbx, %rsi
	movq	%r14, %rdx
	xorl	%eax, %eax
	callq	printf
	movl	$2, %edi
	callq	exit
.LBB2_19:
	movl	$.L.str.4, %edi
	jmp	.LBB2_22
.LBB2_20:
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.6, %edi
	movq	%rax, %rsi
	xorl	%eax, %eax
	callq	printf
	jmp	.LBB2_17
.LBB2_21:
	movl	$.L.str.8, %edi
.LBB2_22:
	movl	%eax, %esi
	xorl	%eax, %eax
	callq	printf
.LBB2_17:
	movl	$1, %edi
	callq	exit
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11set_squaresPll, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z6func_gPllS_li, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z11set_squaresPll,@object      # @_Z11set_squaresPll
	.section	.rodata,"a",@progbits
	.globl	_Z11set_squaresPll
	.p2align	3, 0x0
_Z11set_squaresPll:
	.quad	_Z26__device_stub__set_squaresPll
	.size	_Z11set_squaresPll, 8

	.type	_Z6func_gPllS_li,@object        # @_Z6func_gPllS_li
	.globl	_Z6func_gPllS_li
	.p2align	3, 0x0
_Z6func_gPllS_li:
	.quad	_Z21__device_stub__func_gPllS_li
	.size	_Z6func_gPllS_li, 8

	.type	.L.str.1,@object                # @.str.1
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.1:
	.asciz	"target: %ld exceeds program limitations %ld\n"
	.size	.L.str.1, 45

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"target: %ld\tnSquares: %ld\n"
	.size	.L.str.2, 27

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"nPages: %d\n"
	.size	.L.str.3, 12

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"hipMalloc squares failed with %d\n"
	.size	.L.str.4, 34

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"Generating squares array..."
	.size	.L.str.5, 28

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"set_squares failed with %s\n"
	.size	.L.str.6, 28

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"hipMallocManaged sums failed with %d\n"
	.size	.L.str.8, 38

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"Allocated Managed memory: %d blocks of %d threads.\n"
	.size	.L.str.9, 52

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"page:%d\n"
	.size	.L.str.10, 9

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z11set_squaresPll"
	.size	.L__unnamed_1, 19

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z6func_gPllS_li"
	.size	.L__unnamed_2, 17

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"usage: stdp N"
	.size	.Lstr, 14

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"done."
	.size	.Lstr.1, 6

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z26__device_stub__set_squaresPll
	.addrsig_sym _Z21__device_stub__func_gPllS_li
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z11set_squaresPll
	.addrsig_sym _Z6func_gPllS_li
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z11set_squaresPll      ; -- Begin function _Z11set_squaresPll
	.globl	_Z11set_squaresPll
	.p2align	8
	.type	_Z11set_squaresPll,@function
_Z11set_squaresPll:                     ; @_Z11set_squaresPll
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x1c
	s_load_b128 s[0:3], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	v_mov_b32_e32 v2, 0
	v_cmp_gt_i64_e32 vcc_lo, s[2:3], v[1:2]
	s_and_saveexec_b32 s2, vcc_lo
	s_cbranch_execz .LBB0_2
; %bb.1:
	v_add_co_u32 v3, s2, v1, 1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, null, 0, 0, s2
	v_mad_u64_u32 v[5:6], null, v3, v1, v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_e32 v0, v6
	v_mad_u64_u32 v[6:7], null, v4, v1, v[0:1]
	v_lshlrev_b64 v[0:1], 3, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b64 v[0:1], v[5:6], off
.LBB0_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11set_squaresPll
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z11set_squaresPll, .Lfunc_end0-_Z11set_squaresPll
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 148
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z6func_gPllS_li        ; -- Begin function _Z6func_gPllS_li
	.globl	_Z6func_gPllS_li
	.p2align	8
	.type	_Z6func_gPllS_li,@function
_Z6func_gPllS_li:                       ; @_Z6func_gPllS_li
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x34
	s_load_b256 s[4:11], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s0, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s0, v[0:1]
	v_mov_b32_e32 v2, 0
	v_cmp_ge_i64_e32 vcc_lo, s[6:7], v[1:2]
	v_cmp_ne_u32_e64 s0, 0, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, s0, vcc_lo
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_10
; %bb.1:
	v_mov_b32_e32 v3, 1
	v_mov_b32_e32 v4, 0
	s_mov_b32 s0, -1
	s_mov_b32 s1, exec_lo
	v_cmpx_lt_u32_e32 3, v1
	s_cbranch_execz .LBB1_8
; %bb.2:
	s_add_i32 s2, s10, -1
	s_mov_b32 s12, 0
                                        ; implicit-def: $sgpr13
                                        ; implicit-def: $sgpr14
.LBB1_3:                                ; =>This Inner Loop Header: Depth=1
	s_or_b32 s14, s14, exec_lo
	s_cmp_lt_i32 s2, 0
	s_cbranch_scc1 .LBB1_5
; %bb.4:                                ;   in Loop: Header=BB1_3 Depth=1
	s_mov_b32 s3, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[6:7], s[2:3], 3
	s_add_u32 s6, s8, s6
	s_addc_u32 s7, s9, s7
	s_load_b64 s[6:7], s[6:7], 0x0
	s_waitcnt lgkmcnt(0)
	s_ashr_i32 s10, s7, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_add_u32 s16, s6, s10
	s_mov_b32 s11, s10
	s_addc_u32 s17, s7, s10
	s_xor_b64 s[10:11], s[16:17], s[10:11]
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_cvt_f32_u32_e32 v0, s10
	v_cvt_f32_u32_e32 v3, s11
	s_sub_u32 s0, 0, s10
	s_subb_u32 s15, 0, s11
	s_add_i32 s2, s2, -1
	v_fmac_f32_e32 v0, 0x4f800000, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v0, v0
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v0, 0x5f7ffffc, v0
	v_mul_f32_e32 v3, 0x2f800000, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_trunc_f32_e32 v3, v3
	v_fmac_f32_e32 v0, 0xcf800000, v3
	v_cvt_u32_f32_e32 v3, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_u32_f32_e32 v0, v0
	v_mul_lo_u32 v4, s0, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v5, s0, v0
	v_mul_lo_u32 v6, s15, v0
	v_add_nc_u32_e32 v4, v5, v4
	v_mul_lo_u32 v5, s0, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v4, v4, v6
	v_mul_hi_u32 v6, v0, v5
	s_delay_alu instid0(VALU_DEP_2)
	v_mul_lo_u32 v7, v0, v4
	v_mul_hi_u32 v8, v0, v4
	v_mul_hi_u32 v9, v3, v5
	v_mul_lo_u32 v5, v3, v5
	v_mul_hi_u32 v10, v3, v4
	v_mul_lo_u32 v4, v3, v4
	v_add_co_u32 v6, vcc_lo, v6, v7
	v_add_co_ci_u32_e32 v7, vcc_lo, 0, v8, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v5, vcc_lo, v6, v5
	v_add_co_ci_u32_e32 v5, vcc_lo, v7, v9, vcc_lo
	v_add_co_ci_u32_e32 v6, vcc_lo, 0, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, v5, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, 0, v6, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, v4
	v_add_co_ci_u32_e32 v3, vcc_lo, v3, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mul_hi_u32 v4, s0, v0
	v_mul_lo_u32 v6, s15, v0
	v_mul_lo_u32 v5, s0, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v4, v4, v5
	v_mul_lo_u32 v5, s0, v0
	v_add_nc_u32_e32 v4, v4, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v6, v0, v5
	v_mul_lo_u32 v7, v0, v4
	v_mul_hi_u32 v8, v0, v4
	v_mul_hi_u32 v9, v3, v5
	v_mul_lo_u32 v5, v3, v5
	v_mul_hi_u32 v10, v3, v4
	v_mul_lo_u32 v4, v3, v4
	v_add_co_u32 v6, vcc_lo, v6, v7
	v_add_co_ci_u32_e32 v7, vcc_lo, 0, v8, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v5, vcc_lo, v6, v5
	v_add_co_ci_u32_e32 v5, vcc_lo, v7, v9, vcc_lo
	v_add_co_ci_u32_e32 v6, vcc_lo, 0, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, v5, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, 0, v6, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, v4
	v_add_co_ci_u32_e32 v9, vcc_lo, v3, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mul_hi_u32 v10, v1, v0
	v_mad_u64_u32 v[5:6], null, 0, v0, 0
	v_mad_u64_u32 v[3:4], null, v1, v9, 0
	v_mad_u64_u32 v[7:8], null, 0, v9, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v0, vcc_lo, v10, v3
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, v5
	v_add_co_ci_u32_e32 v0, vcc_lo, v3, v6, vcc_lo
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v8, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, v7
	v_add_co_ci_u32_e32 v5, vcc_lo, 0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mul_lo_u32 v6, s11, v0
	v_mad_u64_u32 v[3:4], null, s10, v0, 0
	v_mul_lo_u32 v0, s10, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_co_u32 v3, vcc_lo, v1, v3
	v_add3_u32 v0, v4, v0, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v4, 0, v0
	v_subrev_co_ci_u32_e64 v4, s0, s11, v4, vcc_lo
	v_sub_co_ci_u32_e32 v0, vcc_lo, 0, v0, vcc_lo
	v_sub_co_u32 v5, vcc_lo, v3, s10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_subrev_co_ci_u32_e64 v6, s0, 0, v4, vcc_lo
	v_cmp_le_u32_e64 s0, s10, v3
	v_subrev_co_ci_u32_e32 v4, vcc_lo, s11, v4, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s11, v0
	v_cndmask_b32_e64 v7, 0, -1, s0
	v_cmp_le_u32_e64 s0, s10, v5
	v_cndmask_b32_e64 v10, 0, -1, vcc_lo
	v_cmp_eq_u32_e32 vcc_lo, s11, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v8, 0, -1, s0
	v_cmp_le_u32_e64 s0, s11, v6
	v_cndmask_b32_e64 v9, 0, -1, s0
	v_cmp_eq_u32_e64 s0, s11, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v8, v9, v8, vcc_lo
	v_sub_co_u32 v9, vcc_lo, v5, s10
	v_subrev_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
	v_cmp_ne_u32_e32 vcc_lo, 0, v8
	v_cndmask_b32_e64 v7, v10, v7, s0
	s_and_not1_b32 s0, s14, exec_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v4, v6, v4 :: v_dual_cndmask_b32 v5, v5, v9
	v_cmp_ne_u32_e32 vcc_lo, 0, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v3, v3, v5 :: v_dual_cndmask_b32 v0, v0, v4
	v_sub_co_u32 v3, vcc_lo, v3, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_subrev_co_ci_u32_e32 v4, vcc_lo, 0, v0, vcc_lo
	v_cmp_eq_u64_e32 vcc_lo, 0, v[3:4]
	s_and_b32 s10, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s14, s0, s10
	s_branch .LBB1_6
.LBB1_5:                                ;   in Loop: Header=BB1_3 Depth=1
	s_mov_b32 s3, -1
                                        ; implicit-def: $sgpr6_sgpr7
.LBB1_6:                                ; %Flow
                                        ;   in Loop: Header=BB1_3 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s0, s3, -1
	s_and_b32 s3, exec_lo, s14
	v_dual_mov_b32 v3, s6 :: v_dual_mov_b32 v4, s7
	s_or_b32 s12, s3, s12
	s_and_not1_b32 s3, s13, exec_lo
	s_and_b32 s0, s0, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s13, s3, s0
	s_and_not1_b32 exec_lo, exec_lo, s12
	s_cbranch_execnz .LBB1_3
; %bb.7:                                ; %loop.exit.guard
	s_or_b32 exec_lo, exec_lo, s12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_not1_b32 s0, s13, exec_lo
.LBB1_8:                                ; %Flow32
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB1_10
; %bb.9:                                ; %.loopexit.sink.split
	v_lshlrev_b64 v[0:1], 3, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
	global_store_b64 v[0:1], v[3:4], off
.LBB1_10:                               ; %.loopexit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z6func_gPllS_li
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 11
		.amdhsa_next_free_sgpr 18
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z6func_gPllS_li, .Lfunc_end1-_Z6func_gPllS_li
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1088
; NumSgprs: 20
; NumVgprs: 11
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 20
; NumVGPRsForWavesPerEU: 11
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           8
        .value_kind:     by_value
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z11set_squaresPll
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z11set_squaresPll.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     8
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           8
        .value_kind:     by_value
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           8
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         44
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         52
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         54
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         56
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         58
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         60
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         62
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         104
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 296
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z6func_gPllS_li
    .private_segment_fixed_size: 0
    .sgpr_count:     20
    .sgpr_spill_count: 0
    .symbol:         _Z6func_gPllS_li.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     11
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
