// sudo apt install nvidia-cuda-toolkit
// nvcc -O3 -std=c++11 es_thrust.cu -o es_thrust
//
#include <thrust/iterator/counting_iterator.h>
#include <thrust/functional.h>
#include <thrust/transform_reduce.h>
#include <iostream>
#include <iomanip>
#include <cmath>
#include <chrono>

const unsigned power_of_4 = 8;
const unsigned numGroups = 1 << 2 * power_of_4;

__constant__ uint64_t g_seed[1];

__device__
unsigned hash(unsigned a)
{
  a = (a+0x7ed55d16) + (a<<12);
  a = (a^0xc761c23c) ^ (a>>19);
  a = (a+0x165667b1) + (a<<5);
  a = (a+0xd3a2646c) ^ (a<<9);
  a = (a+0xfd7046c5) + (a<<3);
  a = (a^0xb55a4f09) ^ (a>>16);
  return a;
}

// Adopted from http://prng.di.unimi.it/xoshiro256plus.c
__device__
double xoshiro256plus(uint64_t s[4]) {
  const uint64_t result = s[0] + s[3];
  const uint64_t t = s[1] << 17;
  s[2] ^= s[0];
  s[3] ^= s[1];
  s[1] ^= s[2];
  s[0] ^= s[3];
  s[2] ^= t;
  s[3] = (s[3] << 45) | (s[3] >> (64 - 45));
  // random_real53() from http://mumble.net/~campbell/tmp/random_real.c
  return (double)(result >> 11) / (1ULL << 53);
}

struct estimate_es : public thrust::unary_function<unsigned, double>
{
  __device__
  double operator()(unsigned thread_id)
  {
    __uint64_t prng_state[4];
    __uint64_t mask = hash(thread_id);
    for (unsigned i = 0; i < 4; i++) {
      mask = (mask << 32) | hash(mask);
      mask = (mask << 32) | hash(mask);
      prng_state[i] = g_seed[0] ^ mask;
    }
    double sum = 0;
    for (unsigned group = 0; group < numGroups; group++) {
      double x[5]; double y[5];
      for (unsigned shot = 0; shot < 5; shot++) {
        auto u = xoshiro256plus(prng_state);
        auto v = xoshiro256plus(prng_state);
        
        // Box-Muller transform
        auto r = sqrt(-2 * log(u));
        auto theta = 2 * M_PI * v;
        x[shot] = r * cos(theta);
        y[shot] = r * sin(theta);
      }
      double es2 = 0;
      for (unsigned i = 0; i < 4; i++) {
        for (unsigned j = i + 1; j < 5; j++) {
          double dx = x[i] - x[j];
          double dy = y[i] - y[j];
          double d2 = dx * dx + dy * dy;
          if (es2 < d2) {
            es2 = d2;
          }
        }
      }
      sum += sqrt(es2);
    }
    return sum / numGroups;
  }
};

int main(void)
{
  auto start_time = std::chrono::system_clock::now();
  __uint128_t mcg128_state = ((__uint128_t)time(NULL) << 1) | 1;
  double avg = 0, min = 100, max = 0;
  const unsigned nt = 12;
  for (unsigned j = 0; j < nt; j++) {
    // MCG 128 PRNG from http://www.pcg-random.org/posts/on-vignas-pcg-critique.html
    mcg128_state *= 0xda942042e4dd58b5ULL;
    uint64_t seed[1] = {(uint64_t)(mcg128_state >> 64)};
    cudaMemcpyToSymbol(g_seed, seed, sizeof(uint64_t));
    double r = thrust::transform_reduce(thrust::counting_iterator<unsigned>(0),
                                        thrust::counting_iterator<unsigned>(numGroups),
                                        estimate_es(),
                                        double(0),
                                        thrust::plus<double>());
    avg += r / numGroups;
    min = fmin(r / numGroups, min);
    max = fmax(r / numGroups, max);
  }
  avg /= nt;
  auto end_time = std::chrono::system_clock::now();
  std::chrono::duration<double> seconds = end_time - start_time;
  std::cout.precision(14);
  std::cout << "code,threads,power_of_4,min,avg,max,time\n";
  std::cout << "CUDA thrust," << nt << "," << power_of_4 << "," << min << "," << avg << "," << max << "," << seconds.count() << "\n";
  return 0;
}

	.file	"tmpxft_0027c133_00000000-6_es_thrust.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	nvtxDomainRangePop, @function
nvtxDomainRangePop:
.LFB7480:
	.cfi_startproc
	movq	424+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L2
	jmp	*%rax
.L2:
	movl	$-2, %eax
	ret
	.cfi_endproc
.LFE7480:
	.size	nvtxDomainRangePop, .-nvtxDomainRangePop
	.section	.text.nvtxEtiGetModuleFunctionTable_v3,"axG",@progbits,nvtxEtiGetModuleFunctionTable_v3,comdat
	.weak	nvtxEtiGetModuleFunctionTable_v3
	.hidden	nvtxEtiGetModuleFunctionTable_v3
	.type	nvtxEtiGetModuleFunctionTable_v3, @function
nvtxEtiGetModuleFunctionTable_v3:
.LFB7491:
	.cfi_startproc
	endbr64
	decl	%edi
	xorl	%eax, %eax
	cmpl	$5, %edi
	ja	.L4
	leaq	.L7(%rip), %rcx
	movslq	(%rcx,%rdi,4), %rax
	addq	%rcx, %rax
	notrack jmp	*%rax
	.section	.rodata.nvtxEtiGetModuleFunctionTable_v3,"aG",@progbits,nvtxEtiGetModuleFunctionTable_v3,comdat
	.align 4
	.align 4
.L7:
	.long	.L12-.L7
	.long	.L17-.L7
	.long	.L10-.L7
	.long	.L9-.L7
	.long	.L8-.L7
	.long	.L6-.L7
	.section	.text.nvtxEtiGetModuleFunctionTable_v3,"axG",@progbits,nvtxEtiGetModuleFunctionTable_v3,comdat
.L12:
	leaq	560+nvtxGlobals_v3(%rip), %rcx
	jmp	.L21
.L10:
	leaq	776+nvtxGlobals_v3(%rip), %rcx
	movl	$128, %eax
	jmp	.L11
.L9:
	leaq	904+nvtxGlobals_v3(%rip), %rcx
	jmp	.L22
.L8:
	leaq	968+nvtxGlobals_v3(%rip), %rcx
.L21:
	movl	$136, %eax
	jmp	.L11
.L6:
	leaq	1104+nvtxGlobals_v3(%rip), %rcx
.L22:
	movl	$64, %eax
	jmp	.L11
.L17:
	leaq	696+nvtxGlobals_v3(%rip), %rcx
	movl	$80, %eax
.L11:
	testq	%rdx, %rdx
	je	.L13
	shrl	$3, %eax
	decl	%eax
	movl	%eax, (%rdx)
.L13:
	testq	%rsi, %rsi
	jne	.L14
.L15:
	movl	$1, %eax
	ret
.L14:
	movq	%rcx, (%rsi)
	jmp	.L15
.L4:
	ret
	.cfi_endproc
.LFE7491:
	.size	nvtxEtiGetModuleFunctionTable_v3, .-nvtxEtiGetModuleFunctionTable_v3
	.section	.text.nvtxGetExportTable_v3,"axG",@progbits,nvtxGetExportTable_v3,comdat
	.weak	nvtxGetExportTable_v3
	.hidden	nvtxGetExportTable_v3
	.type	nvtxGetExportTable_v3, @function
nvtxGetExportTable_v3:
.LFB7492:
	.cfi_startproc
	endbr64
	leaq	8+nvtxGlobals_v3(%rip), %rax
	cmpl	$1, %edi
	je	.L23
	cmpl	$3, %edi
	leaq	16(%rax), %rax
	movl	$0, %edx
	cmovne	%rdx, %rax
.L23:
	ret
	.cfi_endproc
.LFE7492:
	.size	nvtxGetExportTable_v3, .-nvtxGetExportTable_v3
	.section	.text.nvtxEtiSetInjectionNvtxVersion_v3,"axG",@progbits,nvtxEtiSetInjectionNvtxVersion_v3,comdat
	.weak	nvtxEtiSetInjectionNvtxVersion_v3
	.hidden	nvtxEtiSetInjectionNvtxVersion_v3
	.type	nvtxEtiSetInjectionNvtxVersion_v3, @function
nvtxEtiSetInjectionNvtxVersion_v3:
.LFB7493:
	.cfi_startproc
	endbr64
	ret
	.cfi_endproc
.LFE7493:
	.size	nvtxEtiSetInjectionNvtxVersion_v3, .-nvtxEtiSetInjectionNvtxVersion_v3
	.section	.text._ZNK6thrust20THRUST_200700_890_NS6system14error_category23default_error_conditionEi,"axG",@progbits,_ZNK6thrust20THRUST_200700_890_NS6system14error_category23default_error_conditionEi,comdat
	.align 2
	.weak	_ZNK6thrust20THRUST_200700_890_NS6system14error_category23default_error_conditionEi
	.type	_ZNK6thrust20THRUST_200700_890_NS6system14error_category23default_error_conditionEi, @function
_ZNK6thrust20THRUST_200700_890_NS6system14error_category23default_error_conditionEi:
.LFB9765:
	.cfi_startproc
	endbr64
	movq	%rdi, %rdx
	movl	%esi, %eax
	ret
	.cfi_endproc
.LFE9765:
	.size	_ZNK6thrust20THRUST_200700_890_NS6system14error_category23default_error_conditionEi, .-_ZNK6thrust20THRUST_200700_890_NS6system14error_category23default_error_conditionEi
	.section	.text._ZNK6thrust20THRUST_200700_890_NS6system14error_category10equivalentERKNS1_10error_codeEi,"axG",@progbits,_ZNK6thrust20THRUST_200700_890_NS6system14error_category10equivalentERKNS1_10error_codeEi,comdat
	.align 2
	.weak	_ZNK6thrust20THRUST_200700_890_NS6system14error_category10equivalentERKNS1_10error_codeEi
	.type	_ZNK6thrust20THRUST_200700_890_NS6system14error_category10equivalentERKNS1_10error_codeEi, @function
_ZNK6thrust20THRUST_200700_890_NS6system14error_category10equivalentERKNS1_10error_codeEi:
.LFB9767:
	.cfi_startproc
	endbr64
	xorl	%eax, %eax
	cmpq	%rdi, 8(%rsi)
	jne	.L30
	cmpl	%edx, (%rsi)
	sete	%al
.L30:
	ret
	.cfi_endproc
.LFE9767:
	.size	_ZNK6thrust20THRUST_200700_890_NS6system14error_category10equivalentERKNS1_10error_codeEi, .-_ZNK6thrust20THRUST_200700_890_NS6system14error_category10equivalentERKNS1_10error_codeEi
	.section	.rodata._ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category4nameEv.str1.1,"aMS",@progbits,1
.LC1:
	.string	"generic"
	.section	.text._ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category4nameEv,"axG",@progbits,_ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category4nameEv,comdat
	.align 2
	.weak	_ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category4nameEv
	.type	_ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category4nameEv, @function
_ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category4nameEv:
.LFB9777:
	.cfi_startproc
	endbr64
	leaq	.LC1(%rip), %rax
	ret
	.cfi_endproc
.LFE9777:
	.size	_ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category4nameEv, .-_ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category4nameEv
	.section	.rodata._ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category4nameEv.str1.1,"aMS",@progbits,1
.LC2:
	.string	"system"
	.section	.text._ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category4nameEv,"axG",@progbits,_ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category4nameEv,comdat
	.align 2
	.weak	_ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category4nameEv
	.type	_ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category4nameEv, @function
_ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category4nameEv:
.LFB9782:
	.cfi_startproc
	endbr64
	leaq	.LC2(%rip), %rax
	ret
	.cfi_endproc
.LFE9782:
	.size	_ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category4nameEv, .-_ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category4nameEv
	.section	.text._ZN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryD2Ev,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryD5Ev,comdat
	.align 2
	.weak	_ZN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryD2Ev
	.type	_ZN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryD2Ev, @function
_ZN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryD2Ev:
.LFB9787:
	.cfi_startproc
	endbr64
	ret
	.cfi_endproc
.LFE9787:
	.size	_ZN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryD2Ev, .-_ZN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryD2Ev
	.weak	_ZN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryD1Ev
	.set	_ZN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryD1Ev,_ZN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryD2Ev
	.section	.text._ZN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryD2Ev,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryD5Ev,comdat
	.align 2
	.weak	_ZN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryD2Ev
	.type	_ZN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryD2Ev, @function
_ZN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryD2Ev:
.LFB9792:
	.cfi_startproc
	endbr64
	ret
	.cfi_endproc
.LFE9792:
	.size	_ZN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryD2Ev, .-_ZN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryD2Ev
	.weak	_ZN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryD1Ev
	.set	_ZN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryD1Ev,_ZN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryD2Ev
	.section	.text._ZNK6thrust20THRUST_200700_890_NS6system14error_category10equivalentEiRKNS1_15error_conditionE,"axG",@progbits,_ZNK6thrust20THRUST_200700_890_NS6system14error_category10equivalentEiRKNS1_15error_conditionE,comdat
	.align 2
	.weak	_ZNK6thrust20THRUST_200700_890_NS6system14error_category10equivalentEiRKNS1_15error_conditionE
	.type	_ZNK6thrust20THRUST_200700_890_NS6system14error_category10equivalentEiRKNS1_15error_conditionE, @function
_ZNK6thrust20THRUST_200700_890_NS6system14error_category10equivalentEiRKNS1_15error_conditionE:
.LFB9766:
	.cfi_startproc
	endbr64
	movq	(%rdi), %rax
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movq	%rdx, %rbx
	call	*24(%rax)
	movq	%rdx, %rcx
	xorl	%edx, %edx
	cmpq	%rcx, 8(%rbx)
	jne	.L38
	cmpl	%eax, (%rbx)
	sete	%dl
.L38:
	movl	%edx, %eax
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE9766:
	.size	_ZNK6thrust20THRUST_200700_890_NS6system14error_category10equivalentEiRKNS1_15error_conditionE, .-_ZNK6thrust20THRUST_200700_890_NS6system14error_category10equivalentEiRKNS1_15error_conditionE
	.section	.rodata._ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category4nameEv.str1.1,"aMS",@progbits,1
.LC3:
	.string	"cuda"
	.section	.text._ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category4nameEv,"axG",@progbits,_ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category4nameEv,comdat
	.align 2
	.weak	_ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category4nameEv
	.type	_ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category4nameEv, @function
_ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category4nameEv:
.LFB9842:
	.cfi_startproc
	endbr64
	leaq	.LC3(%rip), %rax
	ret
	.cfi_endproc
.LFE9842:
	.size	_ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category4nameEv, .-_ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category4nameEv
	.section	.text._ZN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryD2Ev,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryD5Ev,comdat
	.align 2
	.weak	_ZN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryD2Ev
	.type	_ZN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryD2Ev, @function
_ZN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryD2Ev:
.LFB9847:
	.cfi_startproc
	endbr64
	ret
	.cfi_endproc
.LFE9847:
	.size	_ZN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryD2Ev, .-_ZN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryD2Ev
	.weak	_ZN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryD1Ev
	.set	_ZN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryD1Ev,_ZN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryD2Ev
	.section	.text._ZNK6thrust20THRUST_200700_890_NS6system6detail9bad_alloc4whatEv,"axG",@progbits,_ZNK6thrust20THRUST_200700_890_NS6system6detail9bad_alloc4whatEv,comdat
	.align 2
	.weak	_ZNK6thrust20THRUST_200700_890_NS6system6detail9bad_alloc4whatEv
	.type	_ZNK6thrust20THRUST_200700_890_NS6system6detail9bad_alloc4whatEv, @function
_ZNK6thrust20THRUST_200700_890_NS6system6detail9bad_alloc4whatEv:
.LFB10185:
	.cfi_startproc
	endbr64
	movq	8(%rdi), %rax
	ret
	.cfi_endproc
.LFE10185:
	.size	_ZNK6thrust20THRUST_200700_890_NS6system6detail9bad_alloc4whatEv, .-_ZNK6thrust20THRUST_200700_890_NS6system6detail9bad_alloc4whatEv
	.section	.text._ZN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryD0Ev,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryD5Ev,comdat
	.align 2
	.weak	_ZN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryD0Ev
	.type	_ZN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryD0Ev, @function
_ZN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryD0Ev:
.LFB9789:
	.cfi_startproc
	endbr64
	movl	$8, %esi
	jmp	_ZdlPvm@PLT
	.cfi_endproc
.LFE9789:
	.size	_ZN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryD0Ev, .-_ZN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryD0Ev
	.section	.text._ZN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryD0Ev,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryD5Ev,comdat
	.align 2
	.weak	_ZN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryD0Ev
	.type	_ZN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryD0Ev, @function
_ZN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryD0Ev:
.LFB9794:
	.cfi_startproc
	endbr64
	movl	$8, %esi
	jmp	_ZdlPvm@PLT
	.cfi_endproc
.LFE9794:
	.size	_ZN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryD0Ev, .-_ZN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryD0Ev
	.section	.text._ZN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryD0Ev,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryD5Ev,comdat
	.align 2
	.weak	_ZN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryD0Ev
	.type	_ZN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryD0Ev, @function
_ZN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryD0Ev:
.LFB9849:
	.cfi_startproc
	endbr64
	movl	$8, %esi
	jmp	_ZdlPvm@PLT
	.cfi_endproc
.LFE9849:
	.size	_ZN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryD0Ev, .-_ZN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryD0Ev
	.section	.text._ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD2Ev,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD5Ev,comdat
	.align 2
	.weak	_ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD2Ev
	.type	_ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD2Ev, @function
_ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD2Ev:
.LFB10182:
	.cfi_startproc
	endbr64
	leaq	16+_ZTVN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE(%rip), %rax
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movq	%rdi, %rbx
	leaq	8(%rdi), %rdi
	movq	%rax, -8(%rdi)
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	movq	%rbx, %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	_ZNSt9bad_allocD2Ev@PLT
	.cfi_endproc
.LFE10182:
	.size	_ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD2Ev, .-_ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD2Ev
	.weak	_ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD1Ev
	.set	_ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD1Ev,_ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD2Ev
	.section	.text._ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD0Ev,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD5Ev,comdat
	.align 2
	.weak	_ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD0Ev
	.type	_ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD0Ev, @function
_ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD0Ev:
.LFB10184:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	_ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD1Ev
	movq	8(%rsp), %rdi
	movl	$40, %esi
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	jmp	_ZdlPvm@PLT
	.cfi_endproc
.LFE10184:
	.size	_ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD0Ev, .-_ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD0Ev
	.section	.text._ZN4cuda3__410cuda_errorD2Ev,"axG",@progbits,_ZN4cuda3__410cuda_errorD5Ev,comdat
	.align 2
	.weak	_ZN4cuda3__410cuda_errorD2Ev
	.type	_ZN4cuda3__410cuda_errorD2Ev, @function
_ZN4cuda3__410cuda_errorD2Ev:
.LFB9025:
	.cfi_startproc
	endbr64
	leaq	16+_ZTVN4cuda3__410cuda_errorE(%rip), %rax
	movq	%rax, (%rdi)
	jmp	_ZNSt13runtime_errorD2Ev@PLT
	.cfi_endproc
.LFE9025:
	.size	_ZN4cuda3__410cuda_errorD2Ev, .-_ZN4cuda3__410cuda_errorD2Ev
	.weak	_ZN4cuda3__410cuda_errorD1Ev
	.set	_ZN4cuda3__410cuda_errorD1Ev,_ZN4cuda3__410cuda_errorD2Ev
	.section	.text._ZN4cuda3__410cuda_errorD0Ev,"axG",@progbits,_ZN4cuda3__410cuda_errorD5Ev,comdat
	.align 2
	.weak	_ZN4cuda3__410cuda_errorD0Ev
	.type	_ZN4cuda3__410cuda_errorD0Ev, @function
_ZN4cuda3__410cuda_errorD0Ev:
.LFB9027:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	_ZN4cuda3__410cuda_errorD1Ev
	movq	8(%rsp), %rdi
	movl	$16, %esi
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	jmp	_ZdlPvm@PLT
	.cfi_endproc
.LFE9027:
	.size	_ZN4cuda3__410cuda_errorD0Ev, .-_ZN4cuda3__410cuda_errorD0Ev
	.section	.text._ZN6thrust20THRUST_200700_890_NS6system12system_errorD2Ev,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6system12system_errorD5Ev,comdat
	.align 2
	.weak	_ZN6thrust20THRUST_200700_890_NS6system12system_errorD2Ev
	.type	_ZN6thrust20THRUST_200700_890_NS6system12system_errorD2Ev, @function
_ZN6thrust20THRUST_200700_890_NS6system12system_errorD2Ev:
.LFB9851:
	.cfi_startproc
	endbr64
	leaq	16+_ZTVN6thrust20THRUST_200700_890_NS6system12system_errorE(%rip), %rax
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movq	%rdi, %rbx
	leaq	32(%rdi), %rdi
	movq	%rax, -32(%rdi)
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	movq	%rbx, %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	_ZNSt13runtime_errorD2Ev@PLT
	.cfi_endproc
.LFE9851:
	.size	_ZN6thrust20THRUST_200700_890_NS6system12system_errorD2Ev, .-_ZN6thrust20THRUST_200700_890_NS6system12system_errorD2Ev
	.weak	_ZN6thrust20THRUST_200700_890_NS6system12system_errorD1Ev
	.set	_ZN6thrust20THRUST_200700_890_NS6system12system_errorD1Ev,_ZN6thrust20THRUST_200700_890_NS6system12system_errorD2Ev
	.section	.text._ZN6thrust20THRUST_200700_890_NS6system12system_errorD0Ev,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6system12system_errorD5Ev,comdat
	.align 2
	.weak	_ZN6thrust20THRUST_200700_890_NS6system12system_errorD0Ev
	.type	_ZN6thrust20THRUST_200700_890_NS6system12system_errorD0Ev, @function
_ZN6thrust20THRUST_200700_890_NS6system12system_errorD0Ev:
.LFB9853:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	_ZN6thrust20THRUST_200700_890_NS6system12system_errorD1Ev
	movq	8(%rsp), %rdi
	movl	$64, %esi
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	jmp	_ZdlPvm@PLT
	.cfi_endproc
.LFE9853:
	.size	_ZN6thrust20THRUST_200700_890_NS6system12system_errorD0Ev, .-_ZN6thrust20THRUST_200700_890_NS6system12system_errorD0Ev
	.text
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB11104:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE11104:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.align 2
	.type	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvNS0_17counting_iteratorIjNS0_11use_defaultES6_S6_EEPdyN3cub17CUB_200700_890_NS13GridEvenShareIyEENS0_4plusIdEE11estimate_esEJS7_S8_ySC_SE_SF_EEE9cudaErrorT_DpRKT0_.isra.0, @function
_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvNS0_17counting_iteratorIjNS0_11use_defaultES6_S6_EEPdyN3cub17CUB_200700_890_NS13GridEvenShareIyEENS0_4plusIdEE11estimate_esEJS7_S8_ySC_SE_SF_EEE9cudaErrorT_DpRKT0_.isra.0:
.LFB12375:
	.cfi_startproc
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movq	%rdi, %rax
	movq	%r8, %r14
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	movq	%rcx, %r13
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	movq	%rdx, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	movq	%rsi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	movq	%r9, %rbx
	movq	12(%rdi), %rdx
	movl	20(%rdi), %ecx
	movl	8(%rax), %esi
	movq	(%rdi), %rdi
	movq	32(%rax), %r9
	movq	24(%rax), %r8
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L61
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	movl	$18, %ecx
	movq	%rbx, %rsi
	movq	%rsp, %rdi
	rep movsl
	movq	(%r14), %rdx
	movq	0(%r13), %rsi
	movl	(%r12), %edi
	call	*%rbp
	addq	$80, %rsp
	.cfi_def_cfa_offset 48
.L61:
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	jmp	cudaPeekAtLastError@PLT
	.cfi_endproc
.LFE12375:
	.size	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvNS0_17counting_iteratorIjNS0_11use_defaultES6_S6_EEPdyN3cub17CUB_200700_890_NS13GridEvenShareIyEENS0_4plusIdEE11estimate_esEJS7_S8_ySC_SE_SF_EEE9cudaErrorT_DpRKT0_.isra.0, .-_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvNS0_17counting_iteratorIjNS0_11use_defaultES6_S6_EEPdyN3cub17CUB_200700_890_NS13GridEvenShareIyEENS0_4plusIdEE11estimate_esEJS7_S8_ySC_SE_SF_EEE9cudaErrorT_DpRKT0_.isra.0
	.align 2
	.type	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvNS0_17counting_iteratorIjNS0_11use_defaultES6_S6_EEPdyNS0_4plusIdEEd11estimate_esEJS7_S8_ySA_dSB_EEE9cudaErrorT_DpRKT0_.isra.0, @function
_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvNS0_17counting_iteratorIjNS0_11use_defaultES6_S6_EEPdyNS0_4plusIdEEd11estimate_esEJS7_S8_ySA_dSB_EEE9cudaErrorT_DpRKT0_.isra.0:
.LFB12376:
	.cfi_startproc
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movq	%rdi, %rax
	movq	%r9, %r14
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	movq	%r8, %r13
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	movq	%rcx, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	movq	%rdx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	movq	%rsi, %rbx
	movq	12(%rdi), %rdx
	movl	20(%rdi), %ecx
	movl	8(%rax), %esi
	movq	(%rdi), %rdi
	movq	32(%rax), %r9
	movq	24(%rax), %r8
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L64
	movsd	(%r14), %xmm0
	movq	0(%r13), %rdx
	movq	(%r12), %rsi
	movl	0(%rbp), %edi
	call	*%rbx
.L64:
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	jmp	cudaPeekAtLastError@PLT
	.cfi_endproc
.LFE12376:
	.size	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvNS0_17counting_iteratorIjNS0_11use_defaultES6_S6_EEPdyNS0_4plusIdEEd11estimate_esEJS7_S8_ySA_dSB_EEE9cudaErrorT_DpRKT0_.isra.0, .-_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvNS0_17counting_iteratorIjNS0_11use_defaultES6_S6_EEPdyNS0_4plusIdEEd11estimate_esEJS7_S8_ySA_dSB_EEE9cudaErrorT_DpRKT0_.isra.0
	.align 2
	.type	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPdS5_iNS0_4plusIdEEdN4cuda3std3__410__identityEEJS5_S5_iS7_dSB_EEE9cudaErrorT_DpRKT0_.isra.0, @function
_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPdS5_iNS0_4plusIdEEdN4cuda3std3__410__identityEEJS5_S5_iS7_dSB_EEE9cudaErrorT_DpRKT0_.isra.0:
.LFB12377:
	.cfi_startproc
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movq	%rdi, %rax
	movq	%r9, %r14
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	movq	%r8, %r13
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	movq	%rcx, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	movq	%rdx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	movq	%rsi, %rbx
	movq	12(%rdi), %rdx
	movl	20(%rdi), %ecx
	movl	8(%rax), %esi
	movq	(%rdi), %rdi
	movq	32(%rax), %r9
	movq	24(%rax), %r8
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L67
	movsd	(%r14), %xmm0
	movl	0(%r13), %edx
	movq	(%r12), %rsi
	movq	0(%rbp), %rdi
	call	*%rbx
.L67:
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	jmp	cudaPeekAtLastError@PLT
	.cfi_endproc
.LFE12377:
	.size	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPdS5_iNS0_4plusIdEEdN4cuda3std3__410__identityEEJS5_S5_iS7_dSB_EEE9cudaErrorT_DpRKT0_.isra.0, .-_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPdS5_iNS0_4plusIdEEdN4cuda3std3__410__identityEEJS5_S5_iS7_dSB_EEE9cudaErrorT_DpRKT0_.isra.0
	.align 2
	.type	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvNS0_17counting_iteratorIjNS0_11use_defaultES6_S6_EEPdjN3cub17CUB_200700_890_NS13GridEvenShareIjEENS0_4plusIdEE11estimate_esEJS7_S8_jSC_SE_SF_EEE9cudaErrorT_DpRKT0_.isra.0, @function
_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvNS0_17counting_iteratorIjNS0_11use_defaultES6_S6_EEPdjN3cub17CUB_200700_890_NS13GridEvenShareIjEENS0_4plusIdEE11estimate_esEJS7_S8_jSC_SE_SF_EEE9cudaErrorT_DpRKT0_.isra.0:
.LFB12378:
	.cfi_startproc
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movq	%rdi, %rax
	movq	%r8, %r14
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	movq	%rcx, %r13
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	movq	%rdx, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	movq	%rsi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	movq	%r9, %rbx
	movq	12(%rdi), %rdx
	movl	20(%rdi), %ecx
	movl	8(%rax), %esi
	movq	(%rdi), %rdi
	movq	32(%rax), %r9
	movq	24(%rax), %r8
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L70
	subq	$48, %rsp
	.cfi_def_cfa_offset 96
	movl	$10, %ecx
	movq	%rbx, %rsi
	movq	%rsp, %rdi
	rep movsl
	movl	(%r14), %edx
	movq	0(%r13), %rsi
	movl	(%r12), %edi
	call	*%rbp
	addq	$48, %rsp
	.cfi_def_cfa_offset 48
.L70:
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	jmp	cudaPeekAtLastError@PLT
	.cfi_endproc
.LFE12378:
	.size	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvNS0_17counting_iteratorIjNS0_11use_defaultES6_S6_EEPdjN3cub17CUB_200700_890_NS13GridEvenShareIjEENS0_4plusIdEE11estimate_esEJS7_S8_jSC_SE_SF_EEE9cudaErrorT_DpRKT0_.isra.0, .-_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvNS0_17counting_iteratorIjNS0_11use_defaultES6_S6_EEPdjN3cub17CUB_200700_890_NS13GridEvenShareIjEENS0_4plusIdEE11estimate_esEJS7_S8_jSC_SE_SF_EEE9cudaErrorT_DpRKT0_.isra.0
	.align 2
	.type	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvNS0_17counting_iteratorIjNS0_11use_defaultES6_S6_EEPdjNS0_4plusIdEEd11estimate_esEJS7_S8_jSA_dSB_EEE9cudaErrorT_DpRKT0_.isra.0, @function
_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvNS0_17counting_iteratorIjNS0_11use_defaultES6_S6_EEPdjNS0_4plusIdEEd11estimate_esEJS7_S8_jSA_dSB_EEE9cudaErrorT_DpRKT0_.isra.0:
.LFB12379:
	.cfi_startproc
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movq	%rdi, %rax
	movq	%r9, %r14
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	movq	%r8, %r13
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	movq	%rcx, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	movq	%rdx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	movq	%rsi, %rbx
	movq	12(%rdi), %rdx
	movl	20(%rdi), %ecx
	movl	8(%rax), %esi
	movq	(%rdi), %rdi
	movq	32(%rax), %r9
	movq	24(%rax), %r8
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L73
	movsd	(%r14), %xmm0
	movl	0(%r13), %edx
	movq	(%r12), %rsi
	movl	0(%rbp), %edi
	call	*%rbx
.L73:
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	jmp	cudaPeekAtLastError@PLT
	.cfi_endproc
.LFE12379:
	.size	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvNS0_17counting_iteratorIjNS0_11use_defaultES6_S6_EEPdjNS0_4plusIdEEd11estimate_esEJS7_S8_jSA_dSB_EEE9cudaErrorT_DpRKT0_.isra.0, .-_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvNS0_17counting_iteratorIjNS0_11use_defaultES6_S6_EEPdjNS0_4plusIdEEd11estimate_esEJS7_S8_jSA_dSB_EEE9cudaErrorT_DpRKT0_.isra.0
	.section	.text._ZN3cub17CUB_200700_890_NS28DeviceReduceSingleTileKernelINS0_18DeviceReducePolicyIdyN6thrust20THRUST_200700_890_NS4plusIdEEE9Policy600ENS4_17counting_iteratorIjNS4_11use_defaultESA_SA_EEPdyS6_dd11estimate_esEEvT0_T1_T2_T3_T4_T6_,"axG",@progbits,_ZN3cub17CUB_200700_890_NS28DeviceReduceSingleTileKernelINS0_18DeviceReducePolicyIdyN6thrust20THRUST_200700_890_NS4plusIdEEE9Policy600ENS4_17counting_iteratorIjNS4_11use_defaultESA_SA_EEPdyS6_dd11estimate_esEEvT0_T1_T2_T3_T4_T6_,comdat
	.weak	_ZN3cub17CUB_200700_890_NS28DeviceReduceSingleTileKernelINS0_18DeviceReducePolicyIdyN6thrust20THRUST_200700_890_NS4plusIdEEE9Policy600ENS4_17counting_iteratorIjNS4_11use_defaultESA_SA_EEPdyS6_dd11estimate_esEEvT0_T1_T2_T3_T4_T6_
	.hidden	_ZN3cub17CUB_200700_890_NS28DeviceReduceSingleTileKernelINS0_18DeviceReducePolicyIdyN6thrust20THRUST_200700_890_NS4plusIdEEE9Policy600ENS4_17counting_iteratorIjNS4_11use_defaultESA_SA_EEPdyS6_dd11estimate_esEEvT0_T1_T2_T3_T4_T6_
	.type	_ZN3cub17CUB_200700_890_NS28DeviceReduceSingleTileKernelINS0_18DeviceReducePolicyIdyN6thrust20THRUST_200700_890_NS4plusIdEEE9Policy600ENS4_17counting_iteratorIjNS4_11use_defaultESA_SA_EEPdyS6_dd11estimate_esEEvT0_T1_T2_T3_T4_T6_, @function
_ZN3cub17CUB_200700_890_NS28DeviceReduceSingleTileKernelINS0_18DeviceReducePolicyIdyN6thrust20THRUST_200700_890_NS4plusIdEEE9Policy600ENS4_17counting_iteratorIjNS4_11use_defaultESA_SA_EEPdyS6_dd11estimate_esEEvT0_T1_T2_T3_T4_T6_:
.LFB11628:
	.cfi_startproc
	endbr64
	subq	$168, %rsp
	.cfi_def_cfa_offset 176
	movl	%edi, 12(%rsp)
	leaq	48(%rsp), %rcx
	leaq	56(%rsp), %rdi
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	12(%rsp), %rax
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	11(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	10(%rsp), %rax
	movq	%rdx, 24(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rax, 144(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movl	$1, 64(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	movsd	%xmm0, 32(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L75
	pushq	48(%rsp)
	.cfi_def_cfa_offset 184
	leaq	_ZN3cub17CUB_200700_890_NS28DeviceReduceSingleTileKernelINS0_18DeviceReducePolicyIdyN6thrust20THRUST_200700_890_NS4plusIdEEE9Policy600ENS4_17counting_iteratorIjNS4_11use_defaultESA_SA_EEPdyS6_dd11estimate_esEEvT0_T1_T2_T3_T4_T6_(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 192
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L75:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L77
	call	__stack_chk_fail@PLT
.L77:
	addq	$168, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE11628:
	.size	_ZN3cub17CUB_200700_890_NS28DeviceReduceSingleTileKernelINS0_18DeviceReducePolicyIdyN6thrust20THRUST_200700_890_NS4plusIdEEE9Policy600ENS4_17counting_iteratorIjNS4_11use_defaultESA_SA_EEPdyS6_dd11estimate_esEEvT0_T1_T2_T3_T4_T6_, .-_ZN3cub17CUB_200700_890_NS28DeviceReduceSingleTileKernelINS0_18DeviceReducePolicyIdyN6thrust20THRUST_200700_890_NS4plusIdEEE9Policy600ENS4_17counting_iteratorIjNS4_11use_defaultESA_SA_EEPdyS6_dd11estimate_esEEvT0_T1_T2_T3_T4_T6_
	.section	.rodata._ZNK6thrust20THRUST_200700_890_NS6system12system_error4whatEv.str1.1,"aMS",@progbits,1
.LC4:
	.string	": "
.LC5:
	.string	"basic_string::append"
	.section	.text._ZNK6thrust20THRUST_200700_890_NS6system12system_error4whatEv,"axG",@progbits,_ZNK6thrust20THRUST_200700_890_NS6system12system_error4whatEv,comdat
	.align 2
	.weak	_ZNK6thrust20THRUST_200700_890_NS6system12system_error4whatEv
	.type	_ZNK6thrust20THRUST_200700_890_NS6system12system_error4whatEv, @function
_ZNK6thrust20THRUST_200700_890_NS6system12system_error4whatEv:
.LFB9874:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA9874
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rdi, %rbx
	subq	$56, %rsp
	.cfi_def_cfa_offset 96
	movq	%fs:40, %rax
	movq	%rax, 40(%rsp)
	xorl	%eax, %eax
	cmpq	$0, 40(%rdi)
	jne	.L81
	call	_ZNKSt13runtime_error4whatEv@PLT
	leaq	32(%rbx), %r13
	movq	%rax, %rdi
	movq	%rax, %rbp
	call	strlen@PLT
	movq	40(%rbx), %rdx
	movq	%rbp, %rcx
	xorl	%esi, %esi
	movq	%rax, %r8
	movq	%r13, %rdi
.LEHB0:
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_replaceEmmPKcm@PLT
	cmpl	$0, 16(%rbx)
	je	.L81
	cmpq	$0, 40(%rbx)
	jne	.L83
.L85:
	movq	24(%rbx), %rsi
	leaq	8(%rsp), %r12
	movl	16(%rbx), %edx
	movq	%r12, %rdi
	movq	(%rsi), %rax
	call	*48(%rax)
	jmp	.L97
.L83:
	leaq	.LC4(%rip), %rsi
	movq	%r13, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6appendEPKc@PLT
.LEHE0:
	jmp	.L85
.L97:
	movq	16(%rsp), %rdx
	movq	8(%rsp), %rsi
	movabsq	$4611686018427387903, %rax
	subq	40(%rbx), %rax
	cmpq	%rdx, %rax
	jnb	.L86
	movq	40(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L96
	leaq	.LC5(%rip), %rdi
.LEHB1:
	call	_ZSt20__throw_length_errorPKc@PLT
.L86:
	movq	%r13, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE9_M_appendEPKcm@PLT
.LEHE1:
	movq	%r12, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
.L81:
	movq	32(%rbx), %rbx
	jmp	.L79
.L93:
	endbr64
	movq	%rax, %rbp
.L88:
	movq	%r12, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	movq	%rbp, %rdi
	jmp	.L89
.L92:
	endbr64
	movq	%rax, %rdi
.L89:
	call	__cxa_begin_catch@PLT
	movq	%rbx, %rdi
	call	_ZNKSt13runtime_error4whatEv@PLT
	movq	%rax, %rbx
	call	__cxa_end_catch@PLT
.L79:
	movq	40(%rsp), %rax
	subq	%fs:40, %rax
	je	.L91
.L96:
	call	__stack_chk_fail@PLT
.L91:
	addq	$56, %rsp
	.cfi_def_cfa_offset 40
	movq	%rbx, %rax
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE9874:
	.globl	__gxx_personality_v0
	.section	.gcc_except_table._ZNK6thrust20THRUST_200700_890_NS6system12system_error4whatEv,"aG",@progbits,_ZNK6thrust20THRUST_200700_890_NS6system12system_error4whatEv,comdat
	.align 4
.LLSDA9874:
	.byte	0xff
	.byte	0x9b
	.uleb128 .LLSDATT9874-.LLSDATTD9874
.LLSDATTD9874:
	.byte	0x1
	.uleb128 .LLSDACSE9874-.LLSDACSB9874
.LLSDACSB9874:
	.uleb128 .LEHB0-.LFB9874
	.uleb128 .LEHE0-.LEHB0
	.uleb128 .L92-.LFB9874
	.uleb128 0x1
	.uleb128 .LEHB1-.LFB9874
	.uleb128 .LEHE1-.LEHB1
	.uleb128 .L93-.LFB9874
	.uleb128 0x3
.LLSDACSE9874:
	.byte	0x1
	.byte	0
	.byte	0
	.byte	0x7d
	.align 4
	.long	0

.LLSDATT9874:
	.section	.text._ZNK6thrust20THRUST_200700_890_NS6system12system_error4whatEv,"axG",@progbits,_ZNK6thrust20THRUST_200700_890_NS6system12system_error4whatEv,comdat
	.size	_ZNK6thrust20THRUST_200700_890_NS6system12system_error4whatEv, .-_ZNK6thrust20THRUST_200700_890_NS6system12system_error4whatEv
	.section	.text._ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv,"axG",@progbits,_ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv,comdat
	.weak	_ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv
	.hidden	_ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv
	.type	_ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv, @function
_ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv:
.LFB11536:
	.cfi_startproc
	endbr64
	subq	$88, %rsp
	.cfi_def_cfa_offset 96
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	movabsq	$4294967297, %rax
	leaq	8(%rsp), %rcx
	movq	%rsp, %rdx
	leaq	28(%rsp), %rsi
	leaq	16(%rsp), %rdi
	movl	$1, 24(%rsp)
	movl	$1, 36(%rsp)
	movq	%rax, 16(%rsp)
	movq	%rax, 28(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L98
	pushq	8(%rsp)
	.cfi_def_cfa_offset 104
	leaq	_ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv(%rip), %rdi
	pushq	8(%rsp)
	.cfi_def_cfa_offset 112
	movq	44(%rsp), %rcx
	movl	52(%rsp), %r8d
	movq	32(%rsp), %rsi
	movl	40(%rsp), %edx
	leaq	80(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 104
	popq	%rdx
	.cfi_def_cfa_offset 96
.L98:
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L100
	call	__stack_chk_fail@PLT
.L100:
	addq	$88, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE11536:
	.size	_ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv, .-_ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv
	.section	.text._ZN3cub17CUB_200700_890_NS28DeviceReduceSingleTileKernelINS0_18DeviceReducePolicyIdjN6thrust20THRUST_200700_890_NS4plusIdEEE9Policy600EPdS9_iS6_ddN4cuda3std3__410__identityEEEvT0_T1_T2_T3_T4_T6_,"axG",@progbits,_ZN3cub17CUB_200700_890_NS28DeviceReduceSingleTileKernelINS0_18DeviceReducePolicyIdjN6thrust20THRUST_200700_890_NS4plusIdEEE9Policy600EPdS9_iS6_ddN4cuda3std3__410__identityEEEvT0_T1_T2_T3_T4_T6_,comdat
	.weak	_ZN3cub17CUB_200700_890_NS28DeviceReduceSingleTileKernelINS0_18DeviceReducePolicyIdjN6thrust20THRUST_200700_890_NS4plusIdEEE9Policy600EPdS9_iS6_ddN4cuda3std3__410__identityEEEvT0_T1_T2_T3_T4_T6_
	.hidden	_ZN3cub17CUB_200700_890_NS28DeviceReduceSingleTileKernelINS0_18DeviceReducePolicyIdjN6thrust20THRUST_200700_890_NS4plusIdEEE9Policy600EPdS9_iS6_ddN4cuda3std3__410__identityEEEvT0_T1_T2_T3_T4_T6_
	.type	_ZN3cub17CUB_200700_890_NS28DeviceReduceSingleTileKernelINS0_18DeviceReducePolicyIdjN6thrust20THRUST_200700_890_NS4plusIdEEE9Policy600EPdS9_iS6_ddN4cuda3std3__410__identityEEEvT0_T1_T2_T3_T4_T6_, @function
_ZN3cub17CUB_200700_890_NS28DeviceReduceSingleTileKernelINS0_18DeviceReducePolicyIdjN6thrust20THRUST_200700_890_NS4plusIdEEE9Policy600EPdS9_iS6_ddN4cuda3std3__410__identityEEEvT0_T1_T2_T3_T4_T6_:
.LFB11627:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	32(%rsp), %rax
	movl	%edx, 28(%rsp)
	leaq	64(%rsp), %rcx
	movq	%rax, 120(%rsp)
	leaq	40(%rsp), %rax
	leaq	56(%rsp), %rdx
	movq	%rax, 128(%rsp)
	leaq	28(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	15(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	14(%rsp), %rax
	movq	%rdi, 32(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 40(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movl	$1, 80(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	movsd	%xmm0, 48(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L102
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_ZN3cub17CUB_200700_890_NS28DeviceReduceSingleTileKernelINS0_18DeviceReducePolicyIdjN6thrust20THRUST_200700_890_NS4plusIdEEE9Policy600EPdS9_iS6_ddN4cuda3std3__410__identityEEEvT0_T1_T2_T3_T4_T6_(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L102:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L104
	call	__stack_chk_fail@PLT
.L104:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE11627:
	.size	_ZN3cub17CUB_200700_890_NS28DeviceReduceSingleTileKernelINS0_18DeviceReducePolicyIdjN6thrust20THRUST_200700_890_NS4plusIdEEE9Policy600EPdS9_iS6_ddN4cuda3std3__410__identityEEEvT0_T1_T2_T3_T4_T6_, .-_ZN3cub17CUB_200700_890_NS28DeviceReduceSingleTileKernelINS0_18DeviceReducePolicyIdjN6thrust20THRUST_200700_890_NS4plusIdEEE9Policy600EPdS9_iS6_ddN4cuda3std3__410__identityEEEvT0_T1_T2_T3_T4_T6_
	.section	.text._ZN3cub17CUB_200700_890_NS18DeviceReduceKernelINS0_18DeviceReducePolicyIdjN6thrust20THRUST_200700_890_NS4plusIdEEE9Policy600ENS4_17counting_iteratorIjNS4_11use_defaultESA_SA_EEjS6_d11estimate_esEEvT0_PT3_T1_NS0_13GridEvenShareISG_EET2_T4_,"axG",@progbits,_ZN3cub17CUB_200700_890_NS18DeviceReduceKernelINS0_18DeviceReducePolicyIdjN6thrust20THRUST_200700_890_NS4plusIdEEE9Policy600ENS4_17counting_iteratorIjNS4_11use_defaultESA_SA_EEjS6_d11estimate_esEEvT0_PT3_T1_NS0_13GridEvenShareISG_EET2_T4_,comdat
	.weak	_ZN3cub17CUB_200700_890_NS18DeviceReduceKernelINS0_18DeviceReducePolicyIdjN6thrust20THRUST_200700_890_NS4plusIdEEE9Policy600ENS4_17counting_iteratorIjNS4_11use_defaultESA_SA_EEjS6_d11estimate_esEEvT0_PT3_T1_NS0_13GridEvenShareISG_EET2_T4_
	.hidden	_ZN3cub17CUB_200700_890_NS18DeviceReduceKernelINS0_18DeviceReducePolicyIdjN6thrust20THRUST_200700_890_NS4plusIdEEE9Policy600ENS4_17counting_iteratorIjNS4_11use_defaultESA_SA_EEjS6_d11estimate_esEEvT0_PT3_T1_NS0_13GridEvenShareISG_EET2_T4_
	.type	_ZN3cub17CUB_200700_890_NS18DeviceReduceKernelINS0_18DeviceReducePolicyIdjN6thrust20THRUST_200700_890_NS4plusIdEEE9Policy600ENS4_17counting_iteratorIjNS4_11use_defaultESA_SA_EEjS6_d11estimate_esEEvT0_PT3_T1_NS0_13GridEvenShareISG_EET2_T4_, @function
_ZN3cub17CUB_200700_890_NS18DeviceReduceKernelINS0_18DeviceReducePolicyIdjN6thrust20THRUST_200700_890_NS4plusIdEEE9Policy600ENS4_17counting_iteratorIjNS4_11use_defaultESA_SA_EEjS6_d11estimate_esEEvT0_PT3_T1_NS0_13GridEvenShareISG_EET2_T4_:
.LFB11625:
	.cfi_startproc
	endbr64
	subq	$168, %rsp
	.cfi_def_cfa_offset 176
	movl	%edi, 12(%rsp)
	leaq	48(%rsp), %rcx
	leaq	56(%rsp), %rdi
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	12(%rsp), %rax
	movq	%rsi, 32(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rax, 104(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	28(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	176(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	11(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	10(%rsp), %rax
	movl	%edx, 28(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rax, 144(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movl	$1, 64(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L106
	pushq	48(%rsp)
	.cfi_def_cfa_offset 184
	leaq	_ZN3cub17CUB_200700_890_NS18DeviceReduceKernelINS0_18DeviceReducePolicyIdjN6thrust20THRUST_200700_890_NS4plusIdEEE9Policy600ENS4_17counting_iteratorIjNS4_11use_defaultESA_SA_EEjS6_d11estimate_esEEvT0_PT3_T1_NS0_13GridEvenShareISG_EET2_T4_(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 192
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L106:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L108
	call	__stack_chk_fail@PLT
.L108:
	addq	$168, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE11625:
	.size	_ZN3cub17CUB_200700_890_NS18DeviceReduceKernelINS0_18DeviceReducePolicyIdjN6thrust20THRUST_200700_890_NS4plusIdEEE9Policy600ENS4_17counting_iteratorIjNS4_11use_defaultESA_SA_EEjS6_d11estimate_esEEvT0_PT3_T1_NS0_13GridEvenShareISG_EET2_T4_, .-_ZN3cub17CUB_200700_890_NS18DeviceReduceKernelINS0_18DeviceReducePolicyIdjN6thrust20THRUST_200700_890_NS4plusIdEEE9Policy600ENS4_17counting_iteratorIjNS4_11use_defaultESA_SA_EEjS6_d11estimate_esEEvT0_PT3_T1_NS0_13GridEvenShareISG_EET2_T4_
	.section	.text._ZN3cub17CUB_200700_890_NS28DeviceReduceSingleTileKernelINS0_18DeviceReducePolicyIdjN6thrust20THRUST_200700_890_NS4plusIdEEE9Policy600ENS4_17counting_iteratorIjNS4_11use_defaultESA_SA_EEPdjS6_dd11estimate_esEEvT0_T1_T2_T3_T4_T6_,"axG",@progbits,_ZN3cub17CUB_200700_890_NS28DeviceReduceSingleTileKernelINS0_18DeviceReducePolicyIdjN6thrust20THRUST_200700_890_NS4plusIdEEE9Policy600ENS4_17counting_iteratorIjNS4_11use_defaultESA_SA_EEPdjS6_dd11estimate_esEEvT0_T1_T2_T3_T4_T6_,comdat
	.weak	_ZN3cub17CUB_200700_890_NS28DeviceReduceSingleTileKernelINS0_18DeviceReducePolicyIdjN6thrust20THRUST_200700_890_NS4plusIdEEE9Policy600ENS4_17counting_iteratorIjNS4_11use_defaultESA_SA_EEPdjS6_dd11estimate_esEEvT0_T1_T2_T3_T4_T6_
	.hidden	_ZN3cub17CUB_200700_890_NS28DeviceReduceSingleTileKernelINS0_18DeviceReducePolicyIdjN6thrust20THRUST_200700_890_NS4plusIdEEE9Policy600ENS4_17counting_iteratorIjNS4_11use_defaultESA_SA_EEPdjS6_dd11estimate_esEEvT0_T1_T2_T3_T4_T6_
	.type	_ZN3cub17CUB_200700_890_NS28DeviceReduceSingleTileKernelINS0_18DeviceReducePolicyIdjN6thrust20THRUST_200700_890_NS4plusIdEEE9Policy600ENS4_17counting_iteratorIjNS4_11use_defaultESA_SA_EEPdjS6_dd11estimate_esEEvT0_T1_T2_T3_T4_T6_, @function
_ZN3cub17CUB_200700_890_NS28DeviceReduceSingleTileKernelINS0_18DeviceReducePolicyIdjN6thrust20THRUST_200700_890_NS4plusIdEEE9Policy600ENS4_17counting_iteratorIjNS4_11use_defaultESA_SA_EEPdjS6_dd11estimate_esEEvT0_T1_T2_T3_T4_T6_:
.LFB11623:
	.cfi_startproc
	endbr64
	subq	$168, %rsp
	.cfi_def_cfa_offset 176
	movl	%edi, 12(%rsp)
	leaq	48(%rsp), %rcx
	leaq	56(%rsp), %rdi
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	12(%rsp), %rax
	movq	%rsi, 24(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rax, 104(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	11(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	10(%rsp), %rax
	movl	%edx, 20(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rax, 144(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movl	$1, 64(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	movsd	%xmm0, 32(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L110
	pushq	48(%rsp)
	.cfi_def_cfa_offset 184
	leaq	_ZN3cub17CUB_200700_890_NS28DeviceReduceSingleTileKernelINS0_18DeviceReducePolicyIdjN6thrust20THRUST_200700_890_NS4plusIdEEE9Policy600ENS4_17counting_iteratorIjNS4_11use_defaultESA_SA_EEPdjS6_dd11estimate_esEEvT0_T1_T2_T3_T4_T6_(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 192
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L110:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L112
	call	__stack_chk_fail@PLT
.L112:
	addq	$168, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE11623:
	.size	_ZN3cub17CUB_200700_890_NS28DeviceReduceSingleTileKernelINS0_18DeviceReducePolicyIdjN6thrust20THRUST_200700_890_NS4plusIdEEE9Policy600ENS4_17counting_iteratorIjNS4_11use_defaultESA_SA_EEPdjS6_dd11estimate_esEEvT0_T1_T2_T3_T4_T6_, .-_ZN3cub17CUB_200700_890_NS28DeviceReduceSingleTileKernelINS0_18DeviceReducePolicyIdjN6thrust20THRUST_200700_890_NS4plusIdEEE9Policy600ENS4_17counting_iteratorIjNS4_11use_defaultESA_SA_EEPdjS6_dd11estimate_esEEvT0_T1_T2_T3_T4_T6_
	.section	.text._ZN3cub17CUB_200700_890_NS28DeviceReduceSingleTileKernelINS0_18DeviceReducePolicyIdyN6thrust20THRUST_200700_890_NS4plusIdEEE9Policy600EPdS9_iS6_ddN4cuda3std3__410__identityEEEvT0_T1_T2_T3_T4_T6_,"axG",@progbits,_ZN3cub17CUB_200700_890_NS28DeviceReduceSingleTileKernelINS0_18DeviceReducePolicyIdyN6thrust20THRUST_200700_890_NS4plusIdEEE9Policy600EPdS9_iS6_ddN4cuda3std3__410__identityEEEvT0_T1_T2_T3_T4_T6_,comdat
	.weak	_ZN3cub17CUB_200700_890_NS28DeviceReduceSingleTileKernelINS0_18DeviceReducePolicyIdyN6thrust20THRUST_200700_890_NS4plusIdEEE9Policy600EPdS9_iS6_ddN4cuda3std3__410__identityEEEvT0_T1_T2_T3_T4_T6_
	.hidden	_ZN3cub17CUB_200700_890_NS28DeviceReduceSingleTileKernelINS0_18DeviceReducePolicyIdyN6thrust20THRUST_200700_890_NS4plusIdEEE9Policy600EPdS9_iS6_ddN4cuda3std3__410__identityEEEvT0_T1_T2_T3_T4_T6_
	.type	_ZN3cub17CUB_200700_890_NS28DeviceReduceSingleTileKernelINS0_18DeviceReducePolicyIdyN6thrust20THRUST_200700_890_NS4plusIdEEE9Policy600EPdS9_iS6_ddN4cuda3std3__410__identityEEEvT0_T1_T2_T3_T4_T6_, @function
_ZN3cub17CUB_200700_890_NS28DeviceReduceSingleTileKernelINS0_18DeviceReducePolicyIdyN6thrust20THRUST_200700_890_NS4plusIdEEE9Policy600EPdS9_iS6_ddN4cuda3std3__410__identityEEEvT0_T1_T2_T3_T4_T6_:
.LFB11631:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	32(%rsp), %rax
	movl	%edx, 28(%rsp)
	leaq	64(%rsp), %rcx
	movq	%rax, 120(%rsp)
	leaq	40(%rsp), %rax
	leaq	56(%rsp), %rdx
	movq	%rax, 128(%rsp)
	leaq	28(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	15(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	14(%rsp), %rax
	movq	%rdi, 32(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 40(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movl	$1, 80(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	movsd	%xmm0, 48(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L114
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_ZN3cub17CUB_200700_890_NS28DeviceReduceSingleTileKernelINS0_18DeviceReducePolicyIdyN6thrust20THRUST_200700_890_NS4plusIdEEE9Policy600EPdS9_iS6_ddN4cuda3std3__410__identityEEEvT0_T1_T2_T3_T4_T6_(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L114:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L116
	call	__stack_chk_fail@PLT
.L116:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE11631:
	.size	_ZN3cub17CUB_200700_890_NS28DeviceReduceSingleTileKernelINS0_18DeviceReducePolicyIdyN6thrust20THRUST_200700_890_NS4plusIdEEE9Policy600EPdS9_iS6_ddN4cuda3std3__410__identityEEEvT0_T1_T2_T3_T4_T6_, .-_ZN3cub17CUB_200700_890_NS28DeviceReduceSingleTileKernelINS0_18DeviceReducePolicyIdyN6thrust20THRUST_200700_890_NS4plusIdEEE9Policy600EPdS9_iS6_ddN4cuda3std3__410__identityEEEvT0_T1_T2_T3_T4_T6_
	.section	.text._ZN3cub17CUB_200700_890_NS18DeviceReduceKernelINS0_18DeviceReducePolicyIdyN6thrust20THRUST_200700_890_NS4plusIdEEE9Policy600ENS4_17counting_iteratorIjNS4_11use_defaultESA_SA_EEyS6_d11estimate_esEEvT0_PT3_T1_NS0_13GridEvenShareISG_EET2_T4_,"axG",@progbits,_ZN3cub17CUB_200700_890_NS18DeviceReduceKernelINS0_18DeviceReducePolicyIdyN6thrust20THRUST_200700_890_NS4plusIdEEE9Policy600ENS4_17counting_iteratorIjNS4_11use_defaultESA_SA_EEyS6_d11estimate_esEEvT0_PT3_T1_NS0_13GridEvenShareISG_EET2_T4_,comdat
	.weak	_ZN3cub17CUB_200700_890_NS18DeviceReduceKernelINS0_18DeviceReducePolicyIdyN6thrust20THRUST_200700_890_NS4plusIdEEE9Policy600ENS4_17counting_iteratorIjNS4_11use_defaultESA_SA_EEyS6_d11estimate_esEEvT0_PT3_T1_NS0_13GridEvenShareISG_EET2_T4_
	.hidden	_ZN3cub17CUB_200700_890_NS18DeviceReduceKernelINS0_18DeviceReducePolicyIdyN6thrust20THRUST_200700_890_NS4plusIdEEE9Policy600ENS4_17counting_iteratorIjNS4_11use_defaultESA_SA_EEyS6_d11estimate_esEEvT0_PT3_T1_NS0_13GridEvenShareISG_EET2_T4_
	.type	_ZN3cub17CUB_200700_890_NS18DeviceReduceKernelINS0_18DeviceReducePolicyIdyN6thrust20THRUST_200700_890_NS4plusIdEEE9Policy600ENS4_17counting_iteratorIjNS4_11use_defaultESA_SA_EEyS6_d11estimate_esEEvT0_PT3_T1_NS0_13GridEvenShareISG_EET2_T4_, @function
_ZN3cub17CUB_200700_890_NS18DeviceReduceKernelINS0_18DeviceReducePolicyIdyN6thrust20THRUST_200700_890_NS4plusIdEEE9Policy600ENS4_17counting_iteratorIjNS4_11use_defaultESA_SA_EEyS6_d11estimate_esEEvT0_PT3_T1_NS0_13GridEvenShareISG_EET2_T4_:
.LFB11630:
	.cfi_startproc
	endbr64
	subq	$168, %rsp
	.cfi_def_cfa_offset 176
	movl	%edi, 12(%rsp)
	leaq	48(%rsp), %rcx
	leaq	56(%rsp), %rdi
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	12(%rsp), %rax
	movq	%rsi, 24(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rax, 104(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	176(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	11(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	10(%rsp), %rax
	movq	%rdx, 32(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rax, 144(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movl	$1, 64(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L118
	pushq	48(%rsp)
	.cfi_def_cfa_offset 184
	leaq	_ZN3cub17CUB_200700_890_NS18DeviceReduceKernelINS0_18DeviceReducePolicyIdyN6thrust20THRUST_200700_890_NS4plusIdEEE9Policy600ENS4_17counting_iteratorIjNS4_11use_defaultESA_SA_EEyS6_d11estimate_esEEvT0_PT3_T1_NS0_13GridEvenShareISG_EET2_T4_(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 192
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L118:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L120
	call	__stack_chk_fail@PLT
.L120:
	addq	$168, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE11630:
	.size	_ZN3cub17CUB_200700_890_NS18DeviceReduceKernelINS0_18DeviceReducePolicyIdyN6thrust20THRUST_200700_890_NS4plusIdEEE9Policy600ENS4_17counting_iteratorIjNS4_11use_defaultESA_SA_EEyS6_d11estimate_esEEvT0_PT3_T1_NS0_13GridEvenShareISG_EET2_T4_, .-_ZN3cub17CUB_200700_890_NS18DeviceReduceKernelINS0_18DeviceReducePolicyIdyN6thrust20THRUST_200700_890_NS4plusIdEEE9Policy600ENS4_17counting_iteratorIjNS4_11use_defaultESA_SA_EEyS6_d11estimate_esEEvT0_PT3_T1_NS0_13GridEvenShareISG_EET2_T4_
	.section	.text.nvtxSetInitFunctionsToNoops_v3,"axG",@progbits,nvtxSetInitFunctionsToNoops_v3,comdat
	.weak	nvtxSetInitFunctionsToNoops_v3
	.hidden	nvtxSetInitFunctionsToNoops_v3
	.type	nvtxSetInitFunctionsToNoops_v3, @function
nvtxSetInitFunctionsToNoops_v3:
.LFB7558:
	.cfi_startproc
	endbr64
	testl	%edi, %edi
	leaq	nvtxMarkEx_impl_init_v3(%rip), %rdx
	setne	%al
	cmpq	%rdx, 48+nvtxGlobals_v3(%rip)
	je	.L251
	testb	%al, %al
	je	.L123
.L251:
	xorl	%r10d, %r10d
	movq	%r10, 48+nvtxGlobals_v3(%rip)
.L123:
	leaq	nvtxMarkA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 56+nvtxGlobals_v3(%rip)
	je	.L252
	testb	%al, %al
	je	.L125
.L252:
	xorl	%r9d, %r9d
	movq	%r9, 56+nvtxGlobals_v3(%rip)
.L125:
	leaq	nvtxMarkW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 64+nvtxGlobals_v3(%rip)
	je	.L253
	testb	%al, %al
	je	.L127
.L253:
	xorl	%r8d, %r8d
	movq	%r8, 64+nvtxGlobals_v3(%rip)
.L127:
	leaq	nvtxRangeStartEx_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 72+nvtxGlobals_v3(%rip)
	je	.L254
	testb	%al, %al
	je	.L129
.L254:
	xorl	%edi, %edi
	movq	%rdi, 72+nvtxGlobals_v3(%rip)
.L129:
	leaq	nvtxRangeStartA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 80+nvtxGlobals_v3(%rip)
	je	.L255
	testb	%al, %al
	je	.L131
.L255:
	xorl	%esi, %esi
	movq	%rsi, 80+nvtxGlobals_v3(%rip)
.L131:
	leaq	nvtxRangeStartW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 88+nvtxGlobals_v3(%rip)
	je	.L256
	testb	%al, %al
	je	.L133
.L256:
	xorl	%ecx, %ecx
	movq	%rcx, 88+nvtxGlobals_v3(%rip)
.L133:
	leaq	nvtxRangeEnd_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 96+nvtxGlobals_v3(%rip)
	je	.L257
	testb	%al, %al
	je	.L135
.L257:
	xorl	%edx, %edx
	movq	%rdx, 96+nvtxGlobals_v3(%rip)
.L135:
	leaq	nvtxRangePushEx_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 104+nvtxGlobals_v3(%rip)
	je	.L258
	testb	%al, %al
	je	.L137
.L258:
	xorl	%r11d, %r11d
	movq	%r11, 104+nvtxGlobals_v3(%rip)
.L137:
	leaq	nvtxRangePushA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 112+nvtxGlobals_v3(%rip)
	je	.L259
	testb	%al, %al
	je	.L139
.L259:
	xorl	%r10d, %r10d
	movq	%r10, 112+nvtxGlobals_v3(%rip)
.L139:
	leaq	nvtxRangePushW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 120+nvtxGlobals_v3(%rip)
	je	.L260
	testb	%al, %al
	je	.L141
.L260:
	xorl	%r9d, %r9d
	movq	%r9, 120+nvtxGlobals_v3(%rip)
.L141:
	leaq	nvtxRangePop_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 128+nvtxGlobals_v3(%rip)
	je	.L261
	testb	%al, %al
	je	.L143
.L261:
	xorl	%r8d, %r8d
	movq	%r8, 128+nvtxGlobals_v3(%rip)
.L143:
	leaq	nvtxNameCategoryA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 136+nvtxGlobals_v3(%rip)
	je	.L262
	testb	%al, %al
	je	.L145
.L262:
	xorl	%edi, %edi
	movq	%rdi, 136+nvtxGlobals_v3(%rip)
.L145:
	leaq	nvtxNameCategoryW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 144+nvtxGlobals_v3(%rip)
	je	.L263
	testb	%al, %al
	je	.L147
.L263:
	xorl	%esi, %esi
	movq	%rsi, 144+nvtxGlobals_v3(%rip)
.L147:
	leaq	nvtxNameOsThreadA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 152+nvtxGlobals_v3(%rip)
	je	.L264
	testb	%al, %al
	je	.L149
.L264:
	xorl	%ecx, %ecx
	movq	%rcx, 152+nvtxGlobals_v3(%rip)
.L149:
	leaq	nvtxNameOsThreadW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 160+nvtxGlobals_v3(%rip)
	je	.L265
	testb	%al, %al
	je	.L151
.L265:
	xorl	%edx, %edx
	movq	%rdx, 160+nvtxGlobals_v3(%rip)
.L151:
	leaq	nvtxNameCuDeviceA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 168+nvtxGlobals_v3(%rip)
	je	.L266
	testb	%al, %al
	je	.L153
.L266:
	xorl	%r11d, %r11d
	movq	%r11, 168+nvtxGlobals_v3(%rip)
.L153:
	leaq	nvtxNameCuDeviceW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 176+nvtxGlobals_v3(%rip)
	je	.L267
	testb	%al, %al
	je	.L155
.L267:
	xorl	%r10d, %r10d
	movq	%r10, 176+nvtxGlobals_v3(%rip)
.L155:
	leaq	nvtxNameCuContextA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 184+nvtxGlobals_v3(%rip)
	je	.L268
	testb	%al, %al
	je	.L157
.L268:
	xorl	%r9d, %r9d
	movq	%r9, 184+nvtxGlobals_v3(%rip)
.L157:
	leaq	nvtxNameCuContextW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 192+nvtxGlobals_v3(%rip)
	je	.L269
	testb	%al, %al
	je	.L159
.L269:
	xorl	%r8d, %r8d
	movq	%r8, 192+nvtxGlobals_v3(%rip)
.L159:
	leaq	nvtxNameCuStreamA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 200+nvtxGlobals_v3(%rip)
	je	.L270
	testb	%al, %al
	je	.L161
.L270:
	xorl	%edi, %edi
	movq	%rdi, 200+nvtxGlobals_v3(%rip)
.L161:
	leaq	nvtxNameCuStreamW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 208+nvtxGlobals_v3(%rip)
	je	.L271
	testb	%al, %al
	je	.L163
.L271:
	xorl	%esi, %esi
	movq	%rsi, 208+nvtxGlobals_v3(%rip)
.L163:
	leaq	nvtxNameCuEventA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 216+nvtxGlobals_v3(%rip)
	je	.L272
	testb	%al, %al
	je	.L165
.L272:
	xorl	%ecx, %ecx
	movq	%rcx, 216+nvtxGlobals_v3(%rip)
.L165:
	leaq	nvtxNameCuEventW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 224+nvtxGlobals_v3(%rip)
	je	.L273
	testb	%al, %al
	je	.L167
.L273:
	xorl	%edx, %edx
	movq	%rdx, 224+nvtxGlobals_v3(%rip)
.L167:
	leaq	nvtxNameClDeviceA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 232+nvtxGlobals_v3(%rip)
	je	.L274
	testb	%al, %al
	je	.L169
.L274:
	xorl	%r11d, %r11d
	movq	%r11, 232+nvtxGlobals_v3(%rip)
.L169:
	leaq	nvtxNameClDeviceW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 240+nvtxGlobals_v3(%rip)
	je	.L275
	testb	%al, %al
	je	.L171
.L275:
	xorl	%r10d, %r10d
	movq	%r10, 240+nvtxGlobals_v3(%rip)
.L171:
	leaq	nvtxNameClContextA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 248+nvtxGlobals_v3(%rip)
	je	.L276
	testb	%al, %al
	je	.L173
.L276:
	xorl	%r9d, %r9d
	movq	%r9, 248+nvtxGlobals_v3(%rip)
.L173:
	leaq	nvtxNameClContextW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 256+nvtxGlobals_v3(%rip)
	je	.L277
	testb	%al, %al
	je	.L175
.L277:
	xorl	%r8d, %r8d
	movq	%r8, 256+nvtxGlobals_v3(%rip)
.L175:
	leaq	nvtxNameClCommandQueueA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 264+nvtxGlobals_v3(%rip)
	je	.L278
	testb	%al, %al
	je	.L177
.L278:
	xorl	%edi, %edi
	movq	%rdi, 264+nvtxGlobals_v3(%rip)
.L177:
	leaq	nvtxNameClCommandQueueW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 272+nvtxGlobals_v3(%rip)
	je	.L279
	testb	%al, %al
	je	.L179
.L279:
	xorl	%esi, %esi
	movq	%rsi, 272+nvtxGlobals_v3(%rip)
.L179:
	leaq	nvtxNameClMemObjectA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 280+nvtxGlobals_v3(%rip)
	je	.L280
	testb	%al, %al
	je	.L181
.L280:
	xorl	%ecx, %ecx
	movq	%rcx, 280+nvtxGlobals_v3(%rip)
.L181:
	leaq	nvtxNameClMemObjectW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 288+nvtxGlobals_v3(%rip)
	je	.L281
	testb	%al, %al
	je	.L183
.L281:
	xorl	%edx, %edx
	movq	%rdx, 288+nvtxGlobals_v3(%rip)
.L183:
	leaq	nvtxNameClSamplerA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 296+nvtxGlobals_v3(%rip)
	je	.L282
	testb	%al, %al
	je	.L185
.L282:
	xorl	%r11d, %r11d
	movq	%r11, 296+nvtxGlobals_v3(%rip)
.L185:
	leaq	nvtxNameClSamplerW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 304+nvtxGlobals_v3(%rip)
	je	.L283
	testb	%al, %al
	je	.L187
.L283:
	xorl	%r10d, %r10d
	movq	%r10, 304+nvtxGlobals_v3(%rip)
.L187:
	leaq	nvtxNameClProgramA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 312+nvtxGlobals_v3(%rip)
	je	.L284
	testb	%al, %al
	je	.L189
.L284:
	xorl	%r9d, %r9d
	movq	%r9, 312+nvtxGlobals_v3(%rip)
.L189:
	leaq	nvtxNameClProgramW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 320+nvtxGlobals_v3(%rip)
	je	.L285
	testb	%al, %al
	je	.L191
.L285:
	xorl	%r8d, %r8d
	movq	%r8, 320+nvtxGlobals_v3(%rip)
.L191:
	leaq	nvtxNameClEventA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 328+nvtxGlobals_v3(%rip)
	je	.L286
	testb	%al, %al
	je	.L193
.L286:
	xorl	%edi, %edi
	movq	%rdi, 328+nvtxGlobals_v3(%rip)
.L193:
	leaq	nvtxNameClEventW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 336+nvtxGlobals_v3(%rip)
	je	.L287
	testb	%al, %al
	je	.L195
.L287:
	xorl	%esi, %esi
	movq	%rsi, 336+nvtxGlobals_v3(%rip)
.L195:
	leaq	nvtxNameCudaDeviceA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 344+nvtxGlobals_v3(%rip)
	je	.L288
	testb	%al, %al
	je	.L197
.L288:
	xorl	%ecx, %ecx
	movq	%rcx, 344+nvtxGlobals_v3(%rip)
.L197:
	leaq	nvtxNameCudaDeviceW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 352+nvtxGlobals_v3(%rip)
	je	.L289
	testb	%al, %al
	je	.L199
.L289:
	xorl	%edx, %edx
	movq	%rdx, 352+nvtxGlobals_v3(%rip)
.L199:
	leaq	nvtxNameCudaStreamA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 360+nvtxGlobals_v3(%rip)
	je	.L290
	testb	%al, %al
	je	.L201
.L290:
	xorl	%r11d, %r11d
	movq	%r11, 360+nvtxGlobals_v3(%rip)
.L201:
	leaq	nvtxNameCudaStreamW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 368+nvtxGlobals_v3(%rip)
	je	.L291
	testb	%al, %al
	je	.L203
.L291:
	xorl	%r10d, %r10d
	movq	%r10, 368+nvtxGlobals_v3(%rip)
.L203:
	leaq	nvtxNameCudaEventA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 376+nvtxGlobals_v3(%rip)
	je	.L292
	testb	%al, %al
	je	.L205
.L292:
	xorl	%r9d, %r9d
	movq	%r9, 376+nvtxGlobals_v3(%rip)
.L205:
	leaq	nvtxNameCudaEventW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 384+nvtxGlobals_v3(%rip)
	je	.L293
	testb	%al, %al
	je	.L207
.L293:
	xorl	%r8d, %r8d
	movq	%r8, 384+nvtxGlobals_v3(%rip)
.L207:
	leaq	nvtxDomainMarkEx_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 392+nvtxGlobals_v3(%rip)
	je	.L294
	testb	%al, %al
	je	.L209
.L294:
	xorl	%edi, %edi
	movq	%rdi, 392+nvtxGlobals_v3(%rip)
.L209:
	leaq	nvtxDomainRangeStartEx_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 400+nvtxGlobals_v3(%rip)
	je	.L295
	testb	%al, %al
	je	.L211
.L295:
	xorl	%esi, %esi
	movq	%rsi, 400+nvtxGlobals_v3(%rip)
.L211:
	leaq	nvtxDomainRangeEnd_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 408+nvtxGlobals_v3(%rip)
	je	.L296
	testb	%al, %al
	je	.L213
.L296:
	xorl	%ecx, %ecx
	movq	%rcx, 408+nvtxGlobals_v3(%rip)
.L213:
	leaq	nvtxDomainRangePushEx_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 416+nvtxGlobals_v3(%rip)
	je	.L297
	testb	%al, %al
	je	.L215
.L297:
	xorl	%edx, %edx
	movq	%rdx, 416+nvtxGlobals_v3(%rip)
.L215:
	leaq	nvtxDomainRangePop_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 424+nvtxGlobals_v3(%rip)
	je	.L298
	testb	%al, %al
	je	.L217
.L298:
	xorl	%r11d, %r11d
	movq	%r11, 424+nvtxGlobals_v3(%rip)
.L217:
	leaq	nvtxDomainResourceCreate_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 432+nvtxGlobals_v3(%rip)
	je	.L299
	testb	%al, %al
	je	.L219
.L299:
	xorl	%r10d, %r10d
	movq	%r10, 432+nvtxGlobals_v3(%rip)
.L219:
	leaq	nvtxDomainResourceDestroy_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 440+nvtxGlobals_v3(%rip)
	je	.L300
	testb	%al, %al
	je	.L221
.L300:
	xorl	%r9d, %r9d
	movq	%r9, 440+nvtxGlobals_v3(%rip)
.L221:
	leaq	nvtxDomainNameCategoryA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 448+nvtxGlobals_v3(%rip)
	je	.L301
	testb	%al, %al
	je	.L223
.L301:
	xorl	%r8d, %r8d
	movq	%r8, 448+nvtxGlobals_v3(%rip)
.L223:
	leaq	nvtxDomainNameCategoryW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 456+nvtxGlobals_v3(%rip)
	je	.L302
	testb	%al, %al
	je	.L225
.L302:
	xorl	%edi, %edi
	movq	%rdi, 456+nvtxGlobals_v3(%rip)
.L225:
	leaq	nvtxDomainRegisterStringA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 464+nvtxGlobals_v3(%rip)
	je	.L303
	testb	%al, %al
	je	.L227
.L303:
	xorl	%esi, %esi
	movq	%rsi, 464+nvtxGlobals_v3(%rip)
.L227:
	leaq	nvtxDomainRegisterStringW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 472+nvtxGlobals_v3(%rip)
	je	.L304
	testb	%al, %al
	je	.L229
.L304:
	xorl	%ecx, %ecx
	movq	%rcx, 472+nvtxGlobals_v3(%rip)
.L229:
	leaq	nvtxDomainCreateA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 480+nvtxGlobals_v3(%rip)
	je	.L305
	testb	%al, %al
	je	.L231
.L305:
	xorl	%edx, %edx
	movq	%rdx, 480+nvtxGlobals_v3(%rip)
.L231:
	leaq	nvtxDomainCreateW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 488+nvtxGlobals_v3(%rip)
	je	.L306
	testb	%al, %al
	je	.L233
.L306:
	xorl	%r11d, %r11d
	movq	%r11, 488+nvtxGlobals_v3(%rip)
.L233:
	leaq	nvtxDomainDestroy_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 496+nvtxGlobals_v3(%rip)
	je	.L307
	testb	%al, %al
	je	.L235
.L307:
	xorl	%r10d, %r10d
	movq	%r10, 496+nvtxGlobals_v3(%rip)
.L235:
	leaq	nvtxInitialize_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 504+nvtxGlobals_v3(%rip)
	je	.L308
	testb	%al, %al
	je	.L237
.L308:
	xorl	%r9d, %r9d
	movq	%r9, 504+nvtxGlobals_v3(%rip)
.L237:
	leaq	nvtxDomainSyncUserCreate_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 512+nvtxGlobals_v3(%rip)
	je	.L309
	testb	%al, %al
	je	.L239
.L309:
	xorl	%r8d, %r8d
	movq	%r8, 512+nvtxGlobals_v3(%rip)
.L239:
	leaq	nvtxDomainSyncUserDestroy_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 520+nvtxGlobals_v3(%rip)
	je	.L310
	testb	%al, %al
	je	.L241
.L310:
	xorl	%edi, %edi
	movq	%rdi, 520+nvtxGlobals_v3(%rip)
.L241:
	leaq	nvtxDomainSyncUserAcquireStart_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 528+nvtxGlobals_v3(%rip)
	je	.L311
	testb	%al, %al
	je	.L243
.L311:
	xorl	%esi, %esi
	movq	%rsi, 528+nvtxGlobals_v3(%rip)
.L243:
	leaq	nvtxDomainSyncUserAcquireFailed_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 536+nvtxGlobals_v3(%rip)
	je	.L312
	testb	%al, %al
	je	.L245
.L312:
	xorl	%ecx, %ecx
	movq	%rcx, 536+nvtxGlobals_v3(%rip)
.L245:
	leaq	nvtxDomainSyncUserAcquireSuccess_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 544+nvtxGlobals_v3(%rip)
	je	.L313
	testb	%al, %al
	je	.L247
.L313:
	xorl	%edx, %edx
	movq	%rdx, 544+nvtxGlobals_v3(%rip)
.L247:
	leaq	nvtxDomainSyncUserReleasing_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 552+nvtxGlobals_v3(%rip)
	je	.L314
	testb	%al, %al
	je	.L122
.L314:
	xorl	%eax, %eax
	movq	%rax, 552+nvtxGlobals_v3(%rip)
.L122:
	ret
	.cfi_endproc
.LFE7558:
	.size	nvtxSetInitFunctionsToNoops_v3, .-nvtxSetInitFunctionsToNoops_v3
	.section	.rodata.nvtxInitializeInjectionLibrary_v3.str1.1,"aMS",@progbits,1
.LC6:
	.string	"NVTX_INJECTION64_PATH"
.LC7:
	.string	"InitializeInjectionNvtx2"
	.section	.text.nvtxInitializeInjectionLibrary_v3,"axG",@progbits,nvtxInitializeInjectionLibrary_v3,comdat
	.weak	nvtxInitializeInjectionLibrary_v3
	.hidden	nvtxInitializeInjectionLibrary_v3
	.type	nvtxInitializeInjectionLibrary_v3, @function
nvtxInitializeInjectionLibrary_v3:
.LFB7559:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	.LC6(%rip), %rdi
	call	getenv@PLT
	movq	%rax, %rbx
	testq	%rax, %rax
	je	.L508
	movl	$1, %esi
	movq	%rax, %rdi
	call	dlopen@PLT
	movl	$4, %edx
	movq	%rax, %rbx
	testq	%rax, %rax
	je	.L507
	leaq	.LC7(%rip), %rsi
	movq	%rax, %rdi
	call	dlsym@PLT
	testq	%rax, %rax
	jne	.L510
	movq	%rbx, %rdi
	call	dlclose@PLT
	movl	$5, %edx
	jmp	.L507
.L508:
	movq	InitializeInjectionNvtx2_fnptr(%rip), %rax
	movl	$7, %edx
	testq	%rax, %rax
	je	.L507
.L510:
	leaq	nvtxGetExportTable_v3(%rip), %rdi
	call	*%rax
	xorl	%edx, %edx
	testl	%eax, %eax
	jne	.L507
	testq	%rbx, %rbx
	je	.L511
	movq	%rbx, %rdi
	call	dlclose@PLT
.L511:
	movl	$6, %edx
.L507:
	movl	%edx, %eax
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE7559:
	.size	nvtxInitializeInjectionLibrary_v3, .-nvtxInitializeInjectionLibrary_v3
	.section	.text.nvtxInitOnce_v3,"axG",@progbits,nvtxInitOnce_v3,comdat
	.weak	nvtxInitOnce_v3
	.hidden	nvtxInitOnce_v3
	.type	nvtxInitOnce_v3, @function
nvtxInitOnce_v3:
.LFB7560:
	.cfi_startproc
	endbr64
	movl	nvtxGlobals_v3(%rip), %eax
	cmpl	$2, %eax
	je	.L527
	pushq	%rdx
	.cfi_def_cfa_offset 16
	movl	$1, %eax
	xorl	%edx, %edx
	mfence
	lock cmpxchgl	%edx, nvtxGlobals_v3(%rip)
	testl	%eax, %eax
	jne	.L530
	call	nvtxInitializeInjectionLibrary_v3
	xorl	%edi, %edi
	testl	%eax, %eax
	setne	%dil
	call	nvtxSetInitFunctionsToNoops_v3
	movl	$2, %eax
	mfence
	xchgl	nvtxGlobals_v3(%rip), %eax
	jmp	.L519
.L530:
	mfence
	movl	nvtxGlobals_v3(%rip), %eax
	cmpl	$2, %eax
	je	.L519
	call	sched_yield@PLT
	jmp	.L530
.L519:
	popq	%rax
	.cfi_def_cfa_offset 8
	ret
.L527:
	ret
	.cfi_endproc
.LFE7560:
	.size	nvtxInitOnce_v3, .-nvtxInitOnce_v3
	.section	.text.nvtxDomainSyncUserReleasing_impl_init_v3,"axG",@progbits,nvtxDomainSyncUserReleasing_impl_init_v3,comdat
	.weak	nvtxDomainSyncUserReleasing_impl_init_v3
	.hidden	nvtxDomainSyncUserReleasing_impl_init_v3
	.type	nvtxDomainSyncUserReleasing_impl_init_v3, @function
nvtxDomainSyncUserReleasing_impl_init_v3:
.LFB7557:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	552+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L531
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L531:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE7557:
	.size	nvtxDomainSyncUserReleasing_impl_init_v3, .-nvtxDomainSyncUserReleasing_impl_init_v3
	.section	.text.nvtxDomainSyncUserAcquireSuccess_impl_init_v3,"axG",@progbits,nvtxDomainSyncUserAcquireSuccess_impl_init_v3,comdat
	.weak	nvtxDomainSyncUserAcquireSuccess_impl_init_v3
	.hidden	nvtxDomainSyncUserAcquireSuccess_impl_init_v3
	.type	nvtxDomainSyncUserAcquireSuccess_impl_init_v3, @function
nvtxDomainSyncUserAcquireSuccess_impl_init_v3:
.LFB7556:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	544+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L534
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L534:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE7556:
	.size	nvtxDomainSyncUserAcquireSuccess_impl_init_v3, .-nvtxDomainSyncUserAcquireSuccess_impl_init_v3
	.section	.text.nvtxDomainSyncUserAcquireFailed_impl_init_v3,"axG",@progbits,nvtxDomainSyncUserAcquireFailed_impl_init_v3,comdat
	.weak	nvtxDomainSyncUserAcquireFailed_impl_init_v3
	.hidden	nvtxDomainSyncUserAcquireFailed_impl_init_v3
	.type	nvtxDomainSyncUserAcquireFailed_impl_init_v3, @function
nvtxDomainSyncUserAcquireFailed_impl_init_v3:
.LFB7555:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	536+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L537
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L537:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE7555:
	.size	nvtxDomainSyncUserAcquireFailed_impl_init_v3, .-nvtxDomainSyncUserAcquireFailed_impl_init_v3
	.section	.text.nvtxDomainSyncUserAcquireStart_impl_init_v3,"axG",@progbits,nvtxDomainSyncUserAcquireStart_impl_init_v3,comdat
	.weak	nvtxDomainSyncUserAcquireStart_impl_init_v3
	.hidden	nvtxDomainSyncUserAcquireStart_impl_init_v3
	.type	nvtxDomainSyncUserAcquireStart_impl_init_v3, @function
nvtxDomainSyncUserAcquireStart_impl_init_v3:
.LFB7554:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	528+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L540
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L540:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE7554:
	.size	nvtxDomainSyncUserAcquireStart_impl_init_v3, .-nvtxDomainSyncUserAcquireStart_impl_init_v3
	.section	.text.nvtxDomainSyncUserDestroy_impl_init_v3,"axG",@progbits,nvtxDomainSyncUserDestroy_impl_init_v3,comdat
	.weak	nvtxDomainSyncUserDestroy_impl_init_v3
	.hidden	nvtxDomainSyncUserDestroy_impl_init_v3
	.type	nvtxDomainSyncUserDestroy_impl_init_v3, @function
nvtxDomainSyncUserDestroy_impl_init_v3:
.LFB7553:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	520+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L543
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L543:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE7553:
	.size	nvtxDomainSyncUserDestroy_impl_init_v3, .-nvtxDomainSyncUserDestroy_impl_init_v3
	.section	.text.nvtxDomainSyncUserCreate_impl_init_v3,"axG",@progbits,nvtxDomainSyncUserCreate_impl_init_v3,comdat
	.weak	nvtxDomainSyncUserCreate_impl_init_v3
	.hidden	nvtxDomainSyncUserCreate_impl_init_v3
	.type	nvtxDomainSyncUserCreate_impl_init_v3, @function
nvtxDomainSyncUserCreate_impl_init_v3:
.LFB7552:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	512+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L547
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L547:
	.cfi_restore_state
	xorl	%eax, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE7552:
	.size	nvtxDomainSyncUserCreate_impl_init_v3, .-nvtxDomainSyncUserCreate_impl_init_v3
	.section	.text.nvtxInitialize_impl_init_v3,"axG",@progbits,nvtxInitialize_impl_init_v3,comdat
	.weak	nvtxInitialize_impl_init_v3
	.hidden	nvtxInitialize_impl_init_v3
	.type	nvtxInitialize_impl_init_v3, @function
nvtxInitialize_impl_init_v3:
.LFB7523:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	504+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L549
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L549:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE7523:
	.size	nvtxInitialize_impl_init_v3, .-nvtxInitialize_impl_init_v3
	.section	.text.nvtxDomainDestroy_impl_init_v3,"axG",@progbits,nvtxDomainDestroy_impl_init_v3,comdat
	.weak	nvtxDomainDestroy_impl_init_v3
	.hidden	nvtxDomainDestroy_impl_init_v3
	.type	nvtxDomainDestroy_impl_init_v3, @function
nvtxDomainDestroy_impl_init_v3:
.LFB7522:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	496+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L552
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L552:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE7522:
	.size	nvtxDomainDestroy_impl_init_v3, .-nvtxDomainDestroy_impl_init_v3
	.section	.text.nvtxDomainCreateW_impl_init_v3,"axG",@progbits,nvtxDomainCreateW_impl_init_v3,comdat
	.weak	nvtxDomainCreateW_impl_init_v3
	.hidden	nvtxDomainCreateW_impl_init_v3
	.type	nvtxDomainCreateW_impl_init_v3, @function
nvtxDomainCreateW_impl_init_v3:
.LFB7521:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	488+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L556
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L556:
	.cfi_restore_state
	xorl	%eax, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE7521:
	.size	nvtxDomainCreateW_impl_init_v3, .-nvtxDomainCreateW_impl_init_v3
	.section	.text.nvtxDomainCreateA_impl_init_v3,"axG",@progbits,nvtxDomainCreateA_impl_init_v3,comdat
	.weak	nvtxDomainCreateA_impl_init_v3
	.hidden	nvtxDomainCreateA_impl_init_v3
	.type	nvtxDomainCreateA_impl_init_v3, @function
nvtxDomainCreateA_impl_init_v3:
.LFB7520:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	480+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L559
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L559:
	.cfi_restore_state
	xorl	%eax, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE7520:
	.size	nvtxDomainCreateA_impl_init_v3, .-nvtxDomainCreateA_impl_init_v3
	.section	.text.nvtxDomainRegisterStringW_impl_init_v3,"axG",@progbits,nvtxDomainRegisterStringW_impl_init_v3,comdat
	.weak	nvtxDomainRegisterStringW_impl_init_v3
	.hidden	nvtxDomainRegisterStringW_impl_init_v3
	.type	nvtxDomainRegisterStringW_impl_init_v3, @function
nvtxDomainRegisterStringW_impl_init_v3:
.LFB7519:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	472+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L562
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L562:
	.cfi_restore_state
	xorl	%eax, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE7519:
	.size	nvtxDomainRegisterStringW_impl_init_v3, .-nvtxDomainRegisterStringW_impl_init_v3
	.section	.text.nvtxDomainRegisterStringA_impl_init_v3,"axG",@progbits,nvtxDomainRegisterStringA_impl_init_v3,comdat
	.weak	nvtxDomainRegisterStringA_impl_init_v3
	.hidden	nvtxDomainRegisterStringA_impl_init_v3
	.type	nvtxDomainRegisterStringA_impl_init_v3, @function
nvtxDomainRegisterStringA_impl_init_v3:
.LFB7518:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	464+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L565
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L565:
	.cfi_restore_state
	xorl	%eax, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE7518:
	.size	nvtxDomainRegisterStringA_impl_init_v3, .-nvtxDomainRegisterStringA_impl_init_v3
	.section	.text.nvtxDomainNameCategoryW_impl_init_v3,"axG",@progbits,nvtxDomainNameCategoryW_impl_init_v3,comdat
	.weak	nvtxDomainNameCategoryW_impl_init_v3
	.hidden	nvtxDomainNameCategoryW_impl_init_v3
	.type	nvtxDomainNameCategoryW_impl_init_v3, @function
nvtxDomainNameCategoryW_impl_init_v3:
.LFB7517:
	.cfi_startproc
	endbr64
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	%rdi, 24(%rsp)
	movl	%esi, 20(%rsp)
	movq	%rdx, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	456+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L567
	movq	8(%rsp), %rdx
	movl	20(%rsp), %esi
	movq	24(%rsp), %rdi
	addq	$40, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L567:
	.cfi_restore_state
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE7517:
	.size	nvtxDomainNameCategoryW_impl_init_v3, .-nvtxDomainNameCategoryW_impl_init_v3
	.section	.text.nvtxDomainNameCategoryA_impl_init_v3,"axG",@progbits,nvtxDomainNameCategoryA_impl_init_v3,comdat
	.weak	nvtxDomainNameCategoryA_impl_init_v3
	.hidden	nvtxDomainNameCategoryA_impl_init_v3
	.type	nvtxDomainNameCategoryA_impl_init_v3, @function
nvtxDomainNameCategoryA_impl_init_v3:
.LFB7516:
	.cfi_startproc
	endbr64
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	%rdi, 24(%rsp)
	movl	%esi, 20(%rsp)
	movq	%rdx, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	448+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L570
	movq	8(%rsp), %rdx
	movl	20(%rsp), %esi
	movq	24(%rsp), %rdi
	addq	$40, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L570:
	.cfi_restore_state
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE7516:
	.size	nvtxDomainNameCategoryA_impl_init_v3, .-nvtxDomainNameCategoryA_impl_init_v3
	.section	.text.nvtxDomainResourceDestroy_impl_init_v3,"axG",@progbits,nvtxDomainResourceDestroy_impl_init_v3,comdat
	.weak	nvtxDomainResourceDestroy_impl_init_v3
	.hidden	nvtxDomainResourceDestroy_impl_init_v3
	.type	nvtxDomainResourceDestroy_impl_init_v3, @function
nvtxDomainResourceDestroy_impl_init_v3:
.LFB7515:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	440+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L573
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L573:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE7515:
	.size	nvtxDomainResourceDestroy_impl_init_v3, .-nvtxDomainResourceDestroy_impl_init_v3
	.section	.text.nvtxDomainResourceCreate_impl_init_v3,"axG",@progbits,nvtxDomainResourceCreate_impl_init_v3,comdat
	.weak	nvtxDomainResourceCreate_impl_init_v3
	.hidden	nvtxDomainResourceCreate_impl_init_v3
	.type	nvtxDomainResourceCreate_impl_init_v3, @function
nvtxDomainResourceCreate_impl_init_v3:
.LFB7514:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	432+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L577
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L577:
	.cfi_restore_state
	xorl	%eax, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE7514:
	.size	nvtxDomainResourceCreate_impl_init_v3, .-nvtxDomainResourceCreate_impl_init_v3
	.section	.text.nvtxDomainRangePop_impl_init_v3,"axG",@progbits,nvtxDomainRangePop_impl_init_v3,comdat
	.weak	nvtxDomainRangePop_impl_init_v3
	.hidden	nvtxDomainRangePop_impl_init_v3
	.type	nvtxDomainRangePop_impl_init_v3, @function
nvtxDomainRangePop_impl_init_v3:
.LFB7513:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	jmp	nvtxDomainRangePop
	.cfi_endproc
.LFE7513:
	.size	nvtxDomainRangePop_impl_init_v3, .-nvtxDomainRangePop_impl_init_v3
	.section	.text.nvtxDomainRangePushEx_impl_init_v3,"axG",@progbits,nvtxDomainRangePushEx_impl_init_v3,comdat
	.weak	nvtxDomainRangePushEx_impl_init_v3
	.hidden	nvtxDomainRangePushEx_impl_init_v3
	.type	nvtxDomainRangePushEx_impl_init_v3, @function
nvtxDomainRangePushEx_impl_init_v3:
.LFB7512:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	416+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L582
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L582:
	.cfi_restore_state
	movl	$-2, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE7512:
	.size	nvtxDomainRangePushEx_impl_init_v3, .-nvtxDomainRangePushEx_impl_init_v3
	.section	.text.nvtxDomainRangeEnd_impl_init_v3,"axG",@progbits,nvtxDomainRangeEnd_impl_init_v3,comdat
	.weak	nvtxDomainRangeEnd_impl_init_v3
	.hidden	nvtxDomainRangeEnd_impl_init_v3
	.type	nvtxDomainRangeEnd_impl_init_v3, @function
nvtxDomainRangeEnd_impl_init_v3:
.LFB7511:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	408+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L584
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L584:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE7511:
	.size	nvtxDomainRangeEnd_impl_init_v3, .-nvtxDomainRangeEnd_impl_init_v3
	.section	.text.nvtxDomainRangeStartEx_impl_init_v3,"axG",@progbits,nvtxDomainRangeStartEx_impl_init_v3,comdat
	.weak	nvtxDomainRangeStartEx_impl_init_v3
	.hidden	nvtxDomainRangeStartEx_impl_init_v3
	.type	nvtxDomainRangeStartEx_impl_init_v3, @function
nvtxDomainRangeStartEx_impl_init_v3:
.LFB7510:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	400+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L588
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L588:
	.cfi_restore_state
	xorl	%eax, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE7510:
	.size	nvtxDomainRangeStartEx_impl_init_v3, .-nvtxDomainRangeStartEx_impl_init_v3
	.section	.text.nvtxDomainMarkEx_impl_init_v3,"axG",@progbits,nvtxDomainMarkEx_impl_init_v3,comdat
	.weak	nvtxDomainMarkEx_impl_init_v3
	.hidden	nvtxDomainMarkEx_impl_init_v3
	.type	nvtxDomainMarkEx_impl_init_v3, @function
nvtxDomainMarkEx_impl_init_v3:
.LFB7509:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	392+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L590
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L590:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE7509:
	.size	nvtxDomainMarkEx_impl_init_v3, .-nvtxDomainMarkEx_impl_init_v3
	.section	.text.nvtxNameCudaEventW_impl_init_v3,"axG",@progbits,nvtxNameCudaEventW_impl_init_v3,comdat
	.weak	nvtxNameCudaEventW_impl_init_v3
	.hidden	nvtxNameCudaEventW_impl_init_v3
	.type	nvtxNameCudaEventW_impl_init_v3, @function
nvtxNameCudaEventW_impl_init_v3:
.LFB7537:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	384+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L593
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L593:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE7537:
	.size	nvtxNameCudaEventW_impl_init_v3, .-nvtxNameCudaEventW_impl_init_v3
	.section	.text.nvtxNameCudaEventA_impl_init_v3,"axG",@progbits,nvtxNameCudaEventA_impl_init_v3,comdat
	.weak	nvtxNameCudaEventA_impl_init_v3
	.hidden	nvtxNameCudaEventA_impl_init_v3
	.type	nvtxNameCudaEventA_impl_init_v3, @function
nvtxNameCudaEventA_impl_init_v3:
.LFB7536:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	376+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L596
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L596:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE7536:
	.size	nvtxNameCudaEventA_impl_init_v3, .-nvtxNameCudaEventA_impl_init_v3
	.section	.text.nvtxNameCudaStreamW_impl_init_v3,"axG",@progbits,nvtxNameCudaStreamW_impl_init_v3,comdat
	.weak	nvtxNameCudaStreamW_impl_init_v3
	.hidden	nvtxNameCudaStreamW_impl_init_v3
	.type	nvtxNameCudaStreamW_impl_init_v3, @function
nvtxNameCudaStreamW_impl_init_v3:
.LFB7535:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	368+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L599
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L599:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE7535:
	.size	nvtxNameCudaStreamW_impl_init_v3, .-nvtxNameCudaStreamW_impl_init_v3
	.section	.text.nvtxNameCudaStreamA_impl_init_v3,"axG",@progbits,nvtxNameCudaStreamA_impl_init_v3,comdat
	.weak	nvtxNameCudaStreamA_impl_init_v3
	.hidden	nvtxNameCudaStreamA_impl_init_v3
	.type	nvtxNameCudaStreamA_impl_init_v3, @function
nvtxNameCudaStreamA_impl_init_v3:
.LFB7534:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	360+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L602
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L602:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE7534:
	.size	nvtxNameCudaStreamA_impl_init_v3, .-nvtxNameCudaStreamA_impl_init_v3
	.section	.text.nvtxNameCudaDeviceW_impl_init_v3,"axG",@progbits,nvtxNameCudaDeviceW_impl_init_v3,comdat
	.weak	nvtxNameCudaDeviceW_impl_init_v3
	.hidden	nvtxNameCudaDeviceW_impl_init_v3
	.type	nvtxNameCudaDeviceW_impl_init_v3, @function
nvtxNameCudaDeviceW_impl_init_v3:
.LFB7533:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	%edi, 12(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	352+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L605
	movq	(%rsp), %rsi
	movl	12(%rsp), %edi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L605:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE7533:
	.size	nvtxNameCudaDeviceW_impl_init_v3, .-nvtxNameCudaDeviceW_impl_init_v3
	.section	.text.nvtxNameCudaDeviceA_impl_init_v3,"axG",@progbits,nvtxNameCudaDeviceA_impl_init_v3,comdat
	.weak	nvtxNameCudaDeviceA_impl_init_v3
	.hidden	nvtxNameCudaDeviceA_impl_init_v3
	.type	nvtxNameCudaDeviceA_impl_init_v3, @function
nvtxNameCudaDeviceA_impl_init_v3:
.LFB7532:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	%edi, 12(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	344+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L608
	movq	(%rsp), %rsi
	movl	12(%rsp), %edi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L608:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE7532:
	.size	nvtxNameCudaDeviceA_impl_init_v3, .-nvtxNameCudaDeviceA_impl_init_v3
	.section	.text.nvtxNameClEventW_impl_init_v3,"axG",@progbits,nvtxNameClEventW_impl_init_v3,comdat
	.weak	nvtxNameClEventW_impl_init_v3
	.hidden	nvtxNameClEventW_impl_init_v3
	.type	nvtxNameClEventW_impl_init_v3, @function
nvtxNameClEventW_impl_init_v3:
.LFB7551:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	336+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L611
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L611:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE7551:
	.size	nvtxNameClEventW_impl_init_v3, .-nvtxNameClEventW_impl_init_v3
	.section	.text.nvtxNameClEventA_impl_init_v3,"axG",@progbits,nvtxNameClEventA_impl_init_v3,comdat
	.weak	nvtxNameClEventA_impl_init_v3
	.hidden	nvtxNameClEventA_impl_init_v3
	.type	nvtxNameClEventA_impl_init_v3, @function
nvtxNameClEventA_impl_init_v3:
.LFB7550:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	328+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L614
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L614:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE7550:
	.size	nvtxNameClEventA_impl_init_v3, .-nvtxNameClEventA_impl_init_v3
	.section	.text.nvtxNameClProgramW_impl_init_v3,"axG",@progbits,nvtxNameClProgramW_impl_init_v3,comdat
	.weak	nvtxNameClProgramW_impl_init_v3
	.hidden	nvtxNameClProgramW_impl_init_v3
	.type	nvtxNameClProgramW_impl_init_v3, @function
nvtxNameClProgramW_impl_init_v3:
.LFB7549:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	320+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L617
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L617:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE7549:
	.size	nvtxNameClProgramW_impl_init_v3, .-nvtxNameClProgramW_impl_init_v3
	.section	.text.nvtxNameClProgramA_impl_init_v3,"axG",@progbits,nvtxNameClProgramA_impl_init_v3,comdat
	.weak	nvtxNameClProgramA_impl_init_v3
	.hidden	nvtxNameClProgramA_impl_init_v3
	.type	nvtxNameClProgramA_impl_init_v3, @function
nvtxNameClProgramA_impl_init_v3:
.LFB7548:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	312+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L620
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L620:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE7548:
	.size	nvtxNameClProgramA_impl_init_v3, .-nvtxNameClProgramA_impl_init_v3
	.section	.text.nvtxNameClSamplerW_impl_init_v3,"axG",@progbits,nvtxNameClSamplerW_impl_init_v3,comdat
	.weak	nvtxNameClSamplerW_impl_init_v3
	.hidden	nvtxNameClSamplerW_impl_init_v3
	.type	nvtxNameClSamplerW_impl_init_v3, @function
nvtxNameClSamplerW_impl_init_v3:
.LFB7547:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	304+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L623
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L623:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE7547:
	.size	nvtxNameClSamplerW_impl_init_v3, .-nvtxNameClSamplerW_impl_init_v3
	.section	.text.nvtxNameClSamplerA_impl_init_v3,"axG",@progbits,nvtxNameClSamplerA_impl_init_v3,comdat
	.weak	nvtxNameClSamplerA_impl_init_v3
	.hidden	nvtxNameClSamplerA_impl_init_v3
	.type	nvtxNameClSamplerA_impl_init_v3, @function
nvtxNameClSamplerA_impl_init_v3:
.LFB7546:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	296+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L626
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L626:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE7546:
	.size	nvtxNameClSamplerA_impl_init_v3, .-nvtxNameClSamplerA_impl_init_v3
	.section	.text.nvtxNameClMemObjectW_impl_init_v3,"axG",@progbits,nvtxNameClMemObjectW_impl_init_v3,comdat
	.weak	nvtxNameClMemObjectW_impl_init_v3
	.hidden	nvtxNameClMemObjectW_impl_init_v3
	.type	nvtxNameClMemObjectW_impl_init_v3, @function
nvtxNameClMemObjectW_impl_init_v3:
.LFB7545:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	288+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L629
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L629:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE7545:
	.size	nvtxNameClMemObjectW_impl_init_v3, .-nvtxNameClMemObjectW_impl_init_v3
	.section	.text.nvtxNameClMemObjectA_impl_init_v3,"axG",@progbits,nvtxNameClMemObjectA_impl_init_v3,comdat
	.weak	nvtxNameClMemObjectA_impl_init_v3
	.hidden	nvtxNameClMemObjectA_impl_init_v3
	.type	nvtxNameClMemObjectA_impl_init_v3, @function
nvtxNameClMemObjectA_impl_init_v3:
.LFB7544:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	280+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L632
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L632:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE7544:
	.size	nvtxNameClMemObjectA_impl_init_v3, .-nvtxNameClMemObjectA_impl_init_v3
	.section	.text.nvtxNameClCommandQueueW_impl_init_v3,"axG",@progbits,nvtxNameClCommandQueueW_impl_init_v3,comdat
	.weak	nvtxNameClCommandQueueW_impl_init_v3
	.hidden	nvtxNameClCommandQueueW_impl_init_v3
	.type	nvtxNameClCommandQueueW_impl_init_v3, @function
nvtxNameClCommandQueueW_impl_init_v3:
.LFB7543:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	272+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L635
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L635:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE7543:
	.size	nvtxNameClCommandQueueW_impl_init_v3, .-nvtxNameClCommandQueueW_impl_init_v3
	.section	.text.nvtxNameClCommandQueueA_impl_init_v3,"axG",@progbits,nvtxNameClCommandQueueA_impl_init_v3,comdat
	.weak	nvtxNameClCommandQueueA_impl_init_v3
	.hidden	nvtxNameClCommandQueueA_impl_init_v3
	.type	nvtxNameClCommandQueueA_impl_init_v3, @function
nvtxNameClCommandQueueA_impl_init_v3:
.LFB7542:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	264+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L638
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L638:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE7542:
	.size	nvtxNameClCommandQueueA_impl_init_v3, .-nvtxNameClCommandQueueA_impl_init_v3
	.section	.text.nvtxNameClContextW_impl_init_v3,"axG",@progbits,nvtxNameClContextW_impl_init_v3,comdat
	.weak	nvtxNameClContextW_impl_init_v3
	.hidden	nvtxNameClContextW_impl_init_v3
	.type	nvtxNameClContextW_impl_init_v3, @function
nvtxNameClContextW_impl_init_v3:
.LFB7541:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	256+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L641
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L641:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE7541:
	.size	nvtxNameClContextW_impl_init_v3, .-nvtxNameClContextW_impl_init_v3
	.section	.text.nvtxNameClContextA_impl_init_v3,"axG",@progbits,nvtxNameClContextA_impl_init_v3,comdat
	.weak	nvtxNameClContextA_impl_init_v3
	.hidden	nvtxNameClContextA_impl_init_v3
	.type	nvtxNameClContextA_impl_init_v3, @function
nvtxNameClContextA_impl_init_v3:
.LFB7540:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	248+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L644
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L644:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE7540:
	.size	nvtxNameClContextA_impl_init_v3, .-nvtxNameClContextA_impl_init_v3
	.section	.text.nvtxNameClDeviceW_impl_init_v3,"axG",@progbits,nvtxNameClDeviceW_impl_init_v3,comdat
	.weak	nvtxNameClDeviceW_impl_init_v3
	.hidden	nvtxNameClDeviceW_impl_init_v3
	.type	nvtxNameClDeviceW_impl_init_v3, @function
nvtxNameClDeviceW_impl_init_v3:
.LFB7539:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	240+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L647
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L647:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE7539:
	.size	nvtxNameClDeviceW_impl_init_v3, .-nvtxNameClDeviceW_impl_init_v3
	.section	.text.nvtxNameClDeviceA_impl_init_v3,"axG",@progbits,nvtxNameClDeviceA_impl_init_v3,comdat
	.weak	nvtxNameClDeviceA_impl_init_v3
	.hidden	nvtxNameClDeviceA_impl_init_v3
	.type	nvtxNameClDeviceA_impl_init_v3, @function
nvtxNameClDeviceA_impl_init_v3:
.LFB7538:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	232+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L650
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L650:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE7538:
	.size	nvtxNameClDeviceA_impl_init_v3, .-nvtxNameClDeviceA_impl_init_v3
	.section	.text.nvtxNameCuEventW_impl_init_v3,"axG",@progbits,nvtxNameCuEventW_impl_init_v3,comdat
	.weak	nvtxNameCuEventW_impl_init_v3
	.hidden	nvtxNameCuEventW_impl_init_v3
	.type	nvtxNameCuEventW_impl_init_v3, @function
nvtxNameCuEventW_impl_init_v3:
.LFB7531:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	224+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L653
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L653:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE7531:
	.size	nvtxNameCuEventW_impl_init_v3, .-nvtxNameCuEventW_impl_init_v3
	.section	.text.nvtxNameCuEventA_impl_init_v3,"axG",@progbits,nvtxNameCuEventA_impl_init_v3,comdat
	.weak	nvtxNameCuEventA_impl_init_v3
	.hidden	nvtxNameCuEventA_impl_init_v3
	.type	nvtxNameCuEventA_impl_init_v3, @function
nvtxNameCuEventA_impl_init_v3:
.LFB7530:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	216+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L656
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L656:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE7530:
	.size	nvtxNameCuEventA_impl_init_v3, .-nvtxNameCuEventA_impl_init_v3
	.section	.text.nvtxNameCuStreamW_impl_init_v3,"axG",@progbits,nvtxNameCuStreamW_impl_init_v3,comdat
	.weak	nvtxNameCuStreamW_impl_init_v3
	.hidden	nvtxNameCuStreamW_impl_init_v3
	.type	nvtxNameCuStreamW_impl_init_v3, @function
nvtxNameCuStreamW_impl_init_v3:
.LFB7529:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	208+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L659
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L659:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE7529:
	.size	nvtxNameCuStreamW_impl_init_v3, .-nvtxNameCuStreamW_impl_init_v3
	.section	.text.nvtxNameCuStreamA_impl_init_v3,"axG",@progbits,nvtxNameCuStreamA_impl_init_v3,comdat
	.weak	nvtxNameCuStreamA_impl_init_v3
	.hidden	nvtxNameCuStreamA_impl_init_v3
	.type	nvtxNameCuStreamA_impl_init_v3, @function
nvtxNameCuStreamA_impl_init_v3:
.LFB7528:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	200+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L662
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L662:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE7528:
	.size	nvtxNameCuStreamA_impl_init_v3, .-nvtxNameCuStreamA_impl_init_v3
	.section	.text.nvtxNameCuContextW_impl_init_v3,"axG",@progbits,nvtxNameCuContextW_impl_init_v3,comdat
	.weak	nvtxNameCuContextW_impl_init_v3
	.hidden	nvtxNameCuContextW_impl_init_v3
	.type	nvtxNameCuContextW_impl_init_v3, @function
nvtxNameCuContextW_impl_init_v3:
.LFB7527:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	192+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L665
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L665:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE7527:
	.size	nvtxNameCuContextW_impl_init_v3, .-nvtxNameCuContextW_impl_init_v3
	.section	.text.nvtxNameCuContextA_impl_init_v3,"axG",@progbits,nvtxNameCuContextA_impl_init_v3,comdat
	.weak	nvtxNameCuContextA_impl_init_v3
	.hidden	nvtxNameCuContextA_impl_init_v3
	.type	nvtxNameCuContextA_impl_init_v3, @function
nvtxNameCuContextA_impl_init_v3:
.LFB7526:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	184+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L668
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L668:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE7526:
	.size	nvtxNameCuContextA_impl_init_v3, .-nvtxNameCuContextA_impl_init_v3
	.section	.text.nvtxNameCuDeviceW_impl_init_v3,"axG",@progbits,nvtxNameCuDeviceW_impl_init_v3,comdat
	.weak	nvtxNameCuDeviceW_impl_init_v3
	.hidden	nvtxNameCuDeviceW_impl_init_v3
	.type	nvtxNameCuDeviceW_impl_init_v3, @function
nvtxNameCuDeviceW_impl_init_v3:
.LFB7525:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	%edi, 12(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	176+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L671
	movq	(%rsp), %rsi
	movl	12(%rsp), %edi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L671:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE7525:
	.size	nvtxNameCuDeviceW_impl_init_v3, .-nvtxNameCuDeviceW_impl_init_v3
	.section	.text.nvtxNameCuDeviceA_impl_init_v3,"axG",@progbits,nvtxNameCuDeviceA_impl_init_v3,comdat
	.weak	nvtxNameCuDeviceA_impl_init_v3
	.hidden	nvtxNameCuDeviceA_impl_init_v3
	.type	nvtxNameCuDeviceA_impl_init_v3, @function
nvtxNameCuDeviceA_impl_init_v3:
.LFB7524:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	%edi, 12(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	168+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L674
	movq	(%rsp), %rsi
	movl	12(%rsp), %edi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L674:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE7524:
	.size	nvtxNameCuDeviceA_impl_init_v3, .-nvtxNameCuDeviceA_impl_init_v3
	.section	.text.nvtxNameOsThreadW_impl_init_v3,"axG",@progbits,nvtxNameOsThreadW_impl_init_v3,comdat
	.weak	nvtxNameOsThreadW_impl_init_v3
	.hidden	nvtxNameOsThreadW_impl_init_v3
	.type	nvtxNameOsThreadW_impl_init_v3, @function
nvtxNameOsThreadW_impl_init_v3:
.LFB7508:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	%edi, 12(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	160+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L677
	movq	(%rsp), %rsi
	movl	12(%rsp), %edi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L677:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE7508:
	.size	nvtxNameOsThreadW_impl_init_v3, .-nvtxNameOsThreadW_impl_init_v3
	.section	.text.nvtxNameOsThreadA_impl_init_v3,"axG",@progbits,nvtxNameOsThreadA_impl_init_v3,comdat
	.weak	nvtxNameOsThreadA_impl_init_v3
	.hidden	nvtxNameOsThreadA_impl_init_v3
	.type	nvtxNameOsThreadA_impl_init_v3, @function
nvtxNameOsThreadA_impl_init_v3:
.LFB7507:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	%edi, 12(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	152+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L680
	movq	(%rsp), %rsi
	movl	12(%rsp), %edi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L680:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE7507:
	.size	nvtxNameOsThreadA_impl_init_v3, .-nvtxNameOsThreadA_impl_init_v3
	.section	.text.nvtxNameCategoryW_impl_init_v3,"axG",@progbits,nvtxNameCategoryW_impl_init_v3,comdat
	.weak	nvtxNameCategoryW_impl_init_v3
	.hidden	nvtxNameCategoryW_impl_init_v3
	.type	nvtxNameCategoryW_impl_init_v3, @function
nvtxNameCategoryW_impl_init_v3:
.LFB7506:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	%edi, 12(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	144+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L683
	movq	(%rsp), %rsi
	movl	12(%rsp), %edi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L683:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE7506:
	.size	nvtxNameCategoryW_impl_init_v3, .-nvtxNameCategoryW_impl_init_v3
	.section	.text.nvtxNameCategoryA_impl_init_v3,"axG",@progbits,nvtxNameCategoryA_impl_init_v3,comdat
	.weak	nvtxNameCategoryA_impl_init_v3
	.hidden	nvtxNameCategoryA_impl_init_v3
	.type	nvtxNameCategoryA_impl_init_v3, @function
nvtxNameCategoryA_impl_init_v3:
.LFB7505:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	%edi, 12(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	136+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L686
	movq	(%rsp), %rsi
	movl	12(%rsp), %edi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L686:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE7505:
	.size	nvtxNameCategoryA_impl_init_v3, .-nvtxNameCategoryA_impl_init_v3
	.section	.text.nvtxRangePop_impl_init_v3,"axG",@progbits,nvtxRangePop_impl_init_v3,comdat
	.weak	nvtxRangePop_impl_init_v3
	.hidden	nvtxRangePop_impl_init_v3
	.type	nvtxRangePop_impl_init_v3, @function
nvtxRangePop_impl_init_v3:
.LFB7504:
	.cfi_startproc
	endbr64
	pushq	%rsi
	.cfi_def_cfa_offset 16
	call	nvtxInitOnce_v3
	movq	128+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L690
	popq	%rcx
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L690:
	.cfi_restore_state
	movl	$-2, %eax
	popq	%rdx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE7504:
	.size	nvtxRangePop_impl_init_v3, .-nvtxRangePop_impl_init_v3
	.section	.text.nvtxRangePushW_impl_init_v3,"axG",@progbits,nvtxRangePushW_impl_init_v3,comdat
	.weak	nvtxRangePushW_impl_init_v3
	.hidden	nvtxRangePushW_impl_init_v3
	.type	nvtxRangePushW_impl_init_v3, @function
nvtxRangePushW_impl_init_v3:
.LFB7503:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	120+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L693
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L693:
	.cfi_restore_state
	movl	$-2, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE7503:
	.size	nvtxRangePushW_impl_init_v3, .-nvtxRangePushW_impl_init_v3
	.section	.text.nvtxRangePushA_impl_init_v3,"axG",@progbits,nvtxRangePushA_impl_init_v3,comdat
	.weak	nvtxRangePushA_impl_init_v3
	.hidden	nvtxRangePushA_impl_init_v3
	.type	nvtxRangePushA_impl_init_v3, @function
nvtxRangePushA_impl_init_v3:
.LFB7502:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	112+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L696
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L696:
	.cfi_restore_state
	movl	$-2, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE7502:
	.size	nvtxRangePushA_impl_init_v3, .-nvtxRangePushA_impl_init_v3
	.section	.text.nvtxRangePushEx_impl_init_v3,"axG",@progbits,nvtxRangePushEx_impl_init_v3,comdat
	.weak	nvtxRangePushEx_impl_init_v3
	.hidden	nvtxRangePushEx_impl_init_v3
	.type	nvtxRangePushEx_impl_init_v3, @function
nvtxRangePushEx_impl_init_v3:
.LFB7501:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	104+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L699
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L699:
	.cfi_restore_state
	movl	$-2, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE7501:
	.size	nvtxRangePushEx_impl_init_v3, .-nvtxRangePushEx_impl_init_v3
	.section	.text.nvtxRangeEnd_impl_init_v3,"axG",@progbits,nvtxRangeEnd_impl_init_v3,comdat
	.weak	nvtxRangeEnd_impl_init_v3
	.hidden	nvtxRangeEnd_impl_init_v3
	.type	nvtxRangeEnd_impl_init_v3, @function
nvtxRangeEnd_impl_init_v3:
.LFB7500:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	96+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L701
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L701:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE7500:
	.size	nvtxRangeEnd_impl_init_v3, .-nvtxRangeEnd_impl_init_v3
	.section	.text.nvtxRangeStartW_impl_init_v3,"axG",@progbits,nvtxRangeStartW_impl_init_v3,comdat
	.weak	nvtxRangeStartW_impl_init_v3
	.hidden	nvtxRangeStartW_impl_init_v3
	.type	nvtxRangeStartW_impl_init_v3, @function
nvtxRangeStartW_impl_init_v3:
.LFB7499:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	88+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L705
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L705:
	.cfi_restore_state
	xorl	%eax, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE7499:
	.size	nvtxRangeStartW_impl_init_v3, .-nvtxRangeStartW_impl_init_v3
	.section	.text.nvtxRangeStartA_impl_init_v3,"axG",@progbits,nvtxRangeStartA_impl_init_v3,comdat
	.weak	nvtxRangeStartA_impl_init_v3
	.hidden	nvtxRangeStartA_impl_init_v3
	.type	nvtxRangeStartA_impl_init_v3, @function
nvtxRangeStartA_impl_init_v3:
.LFB7498:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	80+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L708
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L708:
	.cfi_restore_state
	xorl	%eax, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE7498:
	.size	nvtxRangeStartA_impl_init_v3, .-nvtxRangeStartA_impl_init_v3
	.section	.text.nvtxRangeStartEx_impl_init_v3,"axG",@progbits,nvtxRangeStartEx_impl_init_v3,comdat
	.weak	nvtxRangeStartEx_impl_init_v3
	.hidden	nvtxRangeStartEx_impl_init_v3
	.type	nvtxRangeStartEx_impl_init_v3, @function
nvtxRangeStartEx_impl_init_v3:
.LFB7497:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	72+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L711
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L711:
	.cfi_restore_state
	xorl	%eax, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE7497:
	.size	nvtxRangeStartEx_impl_init_v3, .-nvtxRangeStartEx_impl_init_v3
	.section	.text.nvtxMarkW_impl_init_v3,"axG",@progbits,nvtxMarkW_impl_init_v3,comdat
	.weak	nvtxMarkW_impl_init_v3
	.hidden	nvtxMarkW_impl_init_v3
	.type	nvtxMarkW_impl_init_v3, @function
nvtxMarkW_impl_init_v3:
.LFB7496:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	64+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L713
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L713:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE7496:
	.size	nvtxMarkW_impl_init_v3, .-nvtxMarkW_impl_init_v3
	.section	.text.nvtxMarkA_impl_init_v3,"axG",@progbits,nvtxMarkA_impl_init_v3,comdat
	.weak	nvtxMarkA_impl_init_v3
	.hidden	nvtxMarkA_impl_init_v3
	.type	nvtxMarkA_impl_init_v3, @function
nvtxMarkA_impl_init_v3:
.LFB7495:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	56+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L716
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L716:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE7495:
	.size	nvtxMarkA_impl_init_v3, .-nvtxMarkA_impl_init_v3
	.section	.text.nvtxMarkEx_impl_init_v3,"axG",@progbits,nvtxMarkEx_impl_init_v3,comdat
	.weak	nvtxMarkEx_impl_init_v3
	.hidden	nvtxMarkEx_impl_init_v3
	.type	nvtxMarkEx_impl_init_v3, @function
nvtxMarkEx_impl_init_v3:
.LFB7494:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	48+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L719
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L719:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE7494:
	.size	nvtxMarkEx_impl_init_v3, .-nvtxMarkEx_impl_init_v3
	.section	.rodata._ZN4cuda3__418__throw_cuda_errorE9cudaErrorPKc.str1.1,"aMS",@progbits,1
.LC8:
	.string	"cudaError %d: %s"
	.section	.text.unlikely._ZN4cuda3__418__throw_cuda_errorE9cudaErrorPKc,"axG",@progbits,_ZN4cuda3__418__throw_cuda_errorE9cudaErrorPKc,comdat
	.weak	_ZN4cuda3__418__throw_cuda_errorE9cudaErrorPKc
	.hidden	_ZN4cuda3__418__throw_cuda_errorE9cudaErrorPKc
	.type	_ZN4cuda3__418__throw_cuda_errorE9cudaErrorPKc, @function
_ZN4cuda3__418__throw_cuda_errorE9cudaErrorPKc:
.LFB9023:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA9023
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rsi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	subq	$288, %rsp
	.cfi_def_cfa_offset 320
	movl	%edi, 12(%rsp)
	movl	$16, %edi
	leaq	24(%rsp), %r12
	movq	%fs:40, %rax
	movq	%rax, 280(%rsp)
	xorl	%eax, %eax
	call	__cxa_allocate_exception@PLT
	leaq	24(%rsp), %rdi
	movl	$64, %ecx
	leaq	.LC8(%rip), %r8
	movq	%rax, %rbx
	xorl	%eax, %eax
	movl	$256, %esi
	rep stosl
	pushq	%rdx
	.cfi_def_cfa_offset 328
	movl	$256, %ecx
	movl	$2, %edx
	pushq	%rbp
	.cfi_def_cfa_offset 336
	movl	28(%rsp), %r9d
	movq	%r12, %rdi
	call	__snprintf_chk@PLT
	popq	%rcx
	.cfi_def_cfa_offset 328
	movq	%rbx, %rdi
	popq	%rsi
	.cfi_def_cfa_offset 320
	movq	%r12, %rsi
	call	_ZNSt13runtime_errorC2EPKc@PLT
	leaq	16+_ZTVN4cuda3__410cuda_errorE(%rip), %rax
	movq	%rax, (%rbx)
	movq	280(%rsp), %rax
	subq	%fs:40, %rax
	je	.L723
	call	__stack_chk_fail@PLT
.L723:
	leaq	_ZN4cuda3__410cuda_errorD1Ev(%rip), %rdx
	leaq	_ZTIN4cuda3__410cuda_errorE(%rip), %rsi
	movq	%rbx, %rdi
.LEHB2:
	call	__cxa_throw@PLT
.LEHE2:
	.cfi_endproc
.LFE9023:
	.section	.gcc_except_table._ZN4cuda3__418__throw_cuda_errorE9cudaErrorPKc,"aG",@progbits,_ZN4cuda3__418__throw_cuda_errorE9cudaErrorPKc,comdat
.LLSDA9023:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE9023-.LLSDACSB9023
.LLSDACSB9023:
	.uleb128 .LEHB2-.LFB9023
	.uleb128 .LEHE2-.LEHB2
	.uleb128 0
	.uleb128 0
.LLSDACSE9023:
	.section	.text.unlikely._ZN4cuda3__418__throw_cuda_errorE9cudaErrorPKc,"axG",@progbits,_ZN4cuda3__418__throw_cuda_errorE9cudaErrorPKc,comdat
	.size	_ZN4cuda3__418__throw_cuda_errorE9cudaErrorPKc, .-_ZN4cuda3__418__throw_cuda_errorE9cudaErrorPKc
	.section	.rodata._ZN4cuda3__423__ensure_current_deviceD2Ev.str1.1,"aMS",@progbits,1
.LC9:
	.string	"Failed to set device"
	.section	.text._ZN4cuda3__423__ensure_current_deviceD2Ev,"axG",@progbits,_ZN4cuda3__423__ensure_current_deviceD5Ev,comdat
	.align 2
	.weak	_ZN4cuda3__423__ensure_current_deviceD2Ev
	.type	_ZN4cuda3__423__ensure_current_deviceD2Ev, @function
_ZN4cuda3__423__ensure_current_deviceD2Ev:
.LFB9032:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA9032
	endbr64
	movl	4(%rdi), %eax
	cmpl	(%rdi), %eax
	je	.L732
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movl	%eax, %edi
	call	cudaSetDevice@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	je	.L726
	call	cudaGetLastError@PLT
	leaq	.LC9(%rip), %rsi
	movl	%ebx, %edi
	call	_ZN4cuda3__418__throw_cuda_errorE9cudaErrorPKc
.L726:
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
.L732:
	.cfi_restore 3
	ret
	.cfi_endproc
.LFE9032:
	.section	.gcc_except_table._ZN4cuda3__423__ensure_current_deviceD2Ev,"aG",@progbits,_ZN4cuda3__423__ensure_current_deviceD5Ev,comdat
.LLSDA9032:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE9032-.LLSDACSB9032
.LLSDACSB9032:
.LLSDACSE9032:
	.section	.text._ZN4cuda3__423__ensure_current_deviceD2Ev,"axG",@progbits,_ZN4cuda3__423__ensure_current_deviceD5Ev,comdat
	.size	_ZN4cuda3__423__ensure_current_deviceD2Ev, .-_ZN4cuda3__423__ensure_current_deviceD2Ev
	.weak	_ZN4cuda3__423__ensure_current_deviceD1Ev
	.set	_ZN4cuda3__423__ensure_current_deviceD1Ev,_ZN4cuda3__423__ensure_current_deviceD2Ev
	.section	.text._ZN6thrust20THRUST_200700_890_NS6system16generic_categoryEv,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6system16generic_categoryEv,comdat
	.weak	_ZN6thrust20THRUST_200700_890_NS6system16generic_categoryEv
	.type	_ZN6thrust20THRUST_200700_890_NS6system16generic_categoryEv, @function
_ZN6thrust20THRUST_200700_890_NS6system16generic_categoryEv:
.LFB9785:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	leaq	_ZZN6thrust20THRUST_200700_890_NS6system16generic_categoryEvE6result(%rip), %rbx
	pushq	%rcx
	.cfi_def_cfa_offset 32
	movb	_ZGVZN6thrust20THRUST_200700_890_NS6system16generic_categoryEvE6result(%rip), %al
	testb	%al, %al
	jne	.L737
	leaq	_ZGVZN6thrust20THRUST_200700_890_NS6system16generic_categoryEvE6result(%rip), %rbp
	movq	%rbp, %rdi
	call	__cxa_guard_acquire@PLT
	testl	%eax, %eax
	je	.L737
	leaq	16+_ZTVN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE(%rip), %rax
	leaq	_ZN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryD1Ev(%rip), %rdi
	movq	%rbx, %rsi
	leaq	__dso_handle(%rip), %rdx
	movq	%rax, _ZZN6thrust20THRUST_200700_890_NS6system16generic_categoryEvE6result(%rip)
	call	__cxa_atexit@PLT
	movq	%rbp, %rdi
	call	__cxa_guard_release@PLT
.L737:
	movq	%rbx, %rax
	popq	%rdx
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE9785:
	.size	_ZN6thrust20THRUST_200700_890_NS6system16generic_categoryEv, .-_ZN6thrust20THRUST_200700_890_NS6system16generic_categoryEv
	.section	.text._ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category7messageB5cxx11Ei,"axG",@progbits,_ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category7messageB5cxx11Ei,comdat
	.align 2
	.weak	_ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category7messageB5cxx11Ei
	.type	_ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category7messageB5cxx11Ei, @function
_ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category7messageB5cxx11Ei:
.LFB9783:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movq	%rdi, %rbx
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	movl	%edx, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 24(%rsp)
	xorl	%eax, %eax
	call	_ZN6thrust20THRUST_200700_890_NS6system16generic_categoryEv
	movl	12(%rsp), %edx
	movq	%rbx, %rdi
	movq	%rax, %rsi
	movq	(%rax), %rax
	call	*48(%rax)
	movq	24(%rsp), %rax
	subq	%fs:40, %rax
	je	.L744
	call	__stack_chk_fail@PLT
.L744:
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rax
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE9783:
	.size	_ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category7messageB5cxx11Ei, .-_ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category7messageB5cxx11Ei
	.section	.text._ZN6thrust20THRUST_200700_890_NS6system15system_categoryEv,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6system15system_categoryEv,comdat
	.weak	_ZN6thrust20THRUST_200700_890_NS6system15system_categoryEv
	.type	_ZN6thrust20THRUST_200700_890_NS6system15system_categoryEv, @function
_ZN6thrust20THRUST_200700_890_NS6system15system_categoryEv:
.LFB9790:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	leaq	_ZZN6thrust20THRUST_200700_890_NS6system15system_categoryEvE6result(%rip), %rbx
	pushq	%rcx
	.cfi_def_cfa_offset 32
	movb	_ZGVZN6thrust20THRUST_200700_890_NS6system15system_categoryEvE6result(%rip), %al
	testb	%al, %al
	jne	.L748
	leaq	_ZGVZN6thrust20THRUST_200700_890_NS6system15system_categoryEvE6result(%rip), %rbp
	movq	%rbp, %rdi
	call	__cxa_guard_acquire@PLT
	testl	%eax, %eax
	je	.L748
	leaq	16+_ZTVN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE(%rip), %rax
	leaq	_ZN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryD1Ev(%rip), %rdi
	movq	%rbx, %rsi
	leaq	__dso_handle(%rip), %rdx
	movq	%rax, _ZZN6thrust20THRUST_200700_890_NS6system15system_categoryEvE6result(%rip)
	call	__cxa_atexit@PLT
	movq	%rbp, %rdi
	call	__cxa_guard_release@PLT
.L748:
	movq	%rbx, %rax
	popq	%rdx
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE9790:
	.size	_ZN6thrust20THRUST_200700_890_NS6system15system_categoryEv, .-_ZN6thrust20THRUST_200700_890_NS6system15system_categoryEv
	.section	.text._ZN6thrust20THRUST_200700_890_NS6system20make_error_conditionENS1_4errc6errc_tE,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6system20make_error_conditionENS1_4errc6errc_tE,comdat
	.weak	_ZN6thrust20THRUST_200700_890_NS6system20make_error_conditionENS1_4errc6errc_tE
	.type	_ZN6thrust20THRUST_200700_890_NS6system20make_error_conditionENS1_4errc6errc_tE, @function
_ZN6thrust20THRUST_200700_890_NS6system20make_error_conditionENS1_4errc6errc_tE:
.LFB9835:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movl	%edi, %ebx
	call	_ZN6thrust20THRUST_200700_890_NS6system16generic_categoryEv
	movq	%rax, %rdx
	movl	%ebx, %eax
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE9835:
	.size	_ZN6thrust20THRUST_200700_890_NS6system20make_error_conditionENS1_4errc6errc_tE, .-_ZN6thrust20THRUST_200700_890_NS6system20make_error_conditionENS1_4errc6errc_tE
	.section	.text._ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category23default_error_conditionEi,"axG",@progbits,_ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category23default_error_conditionEi,comdat
	.align 2
	.weak	_ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category23default_error_conditionEi
	.type	_ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category23default_error_conditionEi, @function
_ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category23default_error_conditionEi:
.LFB9784:
	.cfi_startproc
	endbr64
	leal	-9901(%rsi), %eax
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movl	%esi, %ebx
	cmpl	$78, %eax
	ja	.L757
	leaq	.L759(%rip), %rdx
	movslq	(%rdx,%rax,4), %rax
	addq	%rdx, %rax
	notrack jmp	*%rax
	.section	.rodata._ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category23default_error_conditionEi,"aG",@progbits,_ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category23default_error_conditionEi,comdat
	.align 4
	.align 4
.L759:
	.long	.L836-.L759
	.long	.L835-.L759
	.long	.L834-.L759
	.long	.L833-.L759
	.long	.L832-.L759
	.long	.L831-.L759
	.long	.L830-.L759
	.long	.L829-.L759
	.long	.L828-.L759
	.long	.L827-.L759
	.long	.L826-.L759
	.long	.L825-.L759
	.long	.L824-.L759
	.long	.L823-.L759
	.long	.L822-.L759
	.long	.L821-.L759
	.long	.L820-.L759
	.long	.L819-.L759
	.long	.L818-.L759
	.long	.L817-.L759
	.long	.L816-.L759
	.long	.L815-.L759
	.long	.L814-.L759
	.long	.L813-.L759
	.long	.L812-.L759
	.long	.L811-.L759
	.long	.L810-.L759
	.long	.L809-.L759
	.long	.L808-.L759
	.long	.L807-.L759
	.long	.L806-.L759
	.long	.L805-.L759
	.long	.L804-.L759
	.long	.L803-.L759
	.long	.L802-.L759
	.long	.L801-.L759
	.long	.L757-.L759
	.long	.L800-.L759
	.long	.L799-.L759
	.long	.L798-.L759
	.long	.L797-.L759
	.long	.L796-.L759
	.long	.L795-.L759
	.long	.L794-.L759
	.long	.L793-.L759
	.long	.L792-.L759
	.long	.L791-.L759
	.long	.L790-.L759
	.long	.L789-.L759
	.long	.L788-.L759
	.long	.L787-.L759
	.long	.L786-.L759
	.long	.L785-.L759
	.long	.L784-.L759
	.long	.L783-.L759
	.long	.L782-.L759
	.long	.L781-.L759
	.long	.L780-.L759
	.long	.L779-.L759
	.long	.L778-.L759
	.long	.L777-.L759
	.long	.L776-.L759
	.long	.L775-.L759
	.long	.L774-.L759
	.long	.L773-.L759
	.long	.L772-.L759
	.long	.L771-.L759
	.long	.L770-.L759
	.long	.L769-.L759
	.long	.L768-.L759
	.long	.L767-.L759
	.long	.L766-.L759
	.long	.L765-.L759
	.long	.L764-.L759
	.long	.L763-.L759
	.long	.L762-.L759
	.long	.L761-.L759
	.long	.L760-.L759
	.long	.L758-.L759
	.section	.text._ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category23default_error_conditionEi,"axG",@progbits,_ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category23default_error_conditionEi,comdat
.L836:
	movl	$9901, %edi
	jmp	.L838
.L835:
	movl	$9902, %edi
	jmp	.L838
.L834:
	movl	$9903, %edi
	jmp	.L838
.L833:
	movl	$9904, %edi
	jmp	.L838
.L792:
	movl	$9946, %edi
	jmp	.L838
.L791:
	movl	$9947, %edi
	jmp	.L838
.L790:
	movl	$9948, %edi
	jmp	.L838
.L789:
	movl	$9949, %edi
	jmp	.L838
.L832:
	movl	$9905, %edi
	jmp	.L838
.L788:
	movl	$9950, %edi
	jmp	.L838
.L831:
	movl	$9906, %edi
	jmp	.L838
.L830:
	movl	$9907, %edi
	jmp	.L838
.L829:
	movl	$9908, %edi
	jmp	.L838
.L828:
	movl	$9909, %edi
	jmp	.L838
.L787:
	movl	$9951, %edi
	jmp	.L838
.L827:
	movl	$9910, %edi
	jmp	.L838
.L786:
	movl	$9952, %edi
	jmp	.L838
.L785:
	movl	$9953, %edi
	jmp	.L838
.L784:
	movl	$9954, %edi
	jmp	.L838
.L783:
	movl	$9955, %edi
	jmp	.L838
.L782:
	movl	$9956, %edi
	jmp	.L838
.L781:
	movl	$9957, %edi
	jmp	.L838
.L796:
	movl	$9942, %edi
	jmp	.L838
.L826:
	movl	$9911, %edi
	jmp	.L838
.L825:
	movl	$9912, %edi
	jmp	.L838
.L793:
	movl	$9945, %edi
	jmp	.L838
.L780:
	movl	$9958, %edi
	jmp	.L838
.L779:
	movl	$9959, %edi
	jmp	.L838
.L795:
	movl	$9943, %edi
	jmp	.L838
.L778:
	movl	$9960, %edi
	jmp	.L838
.L777:
	movl	$9961, %edi
	jmp	.L838
.L776:
	movl	$9962, %edi
	jmp	.L838
.L824:
	movl	$9913, %edi
	jmp	.L838
.L823:
	movl	$9914, %edi
	jmp	.L838
.L822:
	movl	$9915, %edi
	jmp	.L838
.L821:
	movl	$9916, %edi
	jmp	.L838
.L820:
	movl	$9917, %edi
	jmp	.L838
.L775:
	movl	$9963, %edi
	jmp	.L838
.L819:
	movl	$9918, %edi
	jmp	.L838
.L774:
	movl	$9964, %edi
	jmp	.L838
.L818:
	movl	$9919, %edi
	jmp	.L838
.L817:
	movl	$9920, %edi
	jmp	.L838
.L816:
	movl	$9921, %edi
	jmp	.L838
.L773:
	movl	$9965, %edi
	jmp	.L838
.L815:
	movl	$9922, %edi
	jmp	.L838
.L772:
	movl	$9966, %edi
	jmp	.L838
.L771:
	movl	$9967, %edi
	jmp	.L838
.L770:
	movl	$9968, %edi
	jmp	.L838
.L769:
	movl	$9969, %edi
	jmp	.L838
.L768:
	movl	$9970, %edi
	jmp	.L838
.L814:
	movl	$9923, %edi
	jmp	.L838
.L813:
	movl	$9924, %edi
	jmp	.L838
.L812:
	movl	$9925, %edi
	jmp	.L838
.L767:
	movl	$9971, %edi
	jmp	.L838
.L811:
	movl	$9926, %edi
	jmp	.L838
.L810:
	movl	$9927, %edi
	jmp	.L838
.L809:
	movl	$9928, %edi
	jmp	.L838
.L766:
	movl	$9972, %edi
	jmp	.L838
.L808:
	movl	$9929, %edi
	jmp	.L838
.L807:
	movl	$9930, %edi
	jmp	.L838
.L806:
	movl	$9931, %edi
	jmp	.L838
.L765:
	movl	$9973, %edi
	jmp	.L838
.L805:
	movl	$9932, %edi
	jmp	.L838
.L804:
	movl	$9933, %edi
	jmp	.L838
.L764:
	movl	$9974, %edi
	jmp	.L838
.L763:
	movl	$9975, %edi
	jmp	.L838
.L762:
	movl	$9976, %edi
	jmp	.L838
.L794:
	movl	$9944, %edi
	jmp	.L838
.L803:
	movl	$9934, %edi
	jmp	.L838
.L802:
	movl	$9935, %edi
	jmp	.L838
.L801:
	movl	$9936, %edi
	jmp	.L838
.L800:
	movl	$9938, %edi
	jmp	.L838
.L761:
	movl	$9977, %edi
	jmp	.L838
.L760:
	movl	$9978, %edi
	jmp	.L838
.L758:
	movl	$9979, %edi
	jmp	.L838
.L799:
	movl	$9939, %edi
	jmp	.L838
.L798:
	movl	$9940, %edi
	jmp	.L838
.L797:
	movl	$9941, %edi
.L838:
	popq	%rbx
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	_ZN6thrust20THRUST_200700_890_NS6system20make_error_conditionENS1_4errc6errc_tE
.L757:
	.cfi_restore_state
	call	_ZN6thrust20THRUST_200700_890_NS6system15system_categoryEv
	movq	%rax, %rdx
	movl	%ebx, %eax
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE9784:
	.size	_ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category23default_error_conditionEi, .-_ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category23default_error_conditionEi
	.section	.text._ZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEv,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEv,comdat
	.weak	_ZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEv
	.type	_ZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEv, @function
_ZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEv:
.LFB9845:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	leaq	_ZZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEvE6result(%rip), %rbx
	pushq	%rcx
	.cfi_def_cfa_offset 32
	movb	_ZGVZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEvE6result(%rip), %al
	testb	%al, %al
	jne	.L841
	leaq	_ZGVZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEvE6result(%rip), %rbp
	movq	%rbp, %rdi
	call	__cxa_guard_acquire@PLT
	testl	%eax, %eax
	je	.L841
	leaq	16+_ZTVN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE(%rip), %rax
	leaq	_ZN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryD1Ev(%rip), %rdi
	movq	%rbx, %rsi
	leaq	__dso_handle(%rip), %rdx
	movq	%rax, _ZZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEvE6result(%rip)
	call	__cxa_atexit@PLT
	movq	%rbp, %rdi
	call	__cxa_guard_release@PLT
.L841:
	movq	%rbx, %rax
	popq	%rdx
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE9845:
	.size	_ZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEv, .-_ZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEv
	.section	.text._ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category23default_error_conditionEi,"axG",@progbits,_ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category23default_error_conditionEi,comdat
	.align 2
	.weak	_ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category23default_error_conditionEi
	.type	_ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category23default_error_conditionEi, @function
_ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category23default_error_conditionEi:
.LFB9844:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movl	%esi, %ebx
	cmpl	$998, %esi
	jg	.L848
	call	_ZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEv
	movq	%rax, %rdx
	movl	%ebx, %eax
	popq	%rbx
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	ret
.L848:
	.cfi_restore_state
	call	_ZN6thrust20THRUST_200700_890_NS6system15system_categoryEv
	movl	%ebx, %esi
	popq	%rbx
	.cfi_def_cfa_offset 8
	movq	%rax, %rdi
	movq	(%rax), %rax
	movq	24(%rax), %rax
	jmp	*%rax
	.cfi_endproc
.LFE9844:
	.size	_ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category23default_error_conditionEi, .-_ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category23default_error_conditionEi
	.section	.text._ZN6thrust20THRUST_200700_890_NS8cuda_cub14throw_on_errorE9cudaErrorPKc,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS8cuda_cub14throw_on_errorE9cudaErrorPKc,comdat
	.weak	_ZN6thrust20THRUST_200700_890_NS8cuda_cub14throw_on_errorE9cudaErrorPKc
	.type	_ZN6thrust20THRUST_200700_890_NS8cuda_cub14throw_on_errorE9cudaErrorPKc, @function
_ZN6thrust20THRUST_200700_890_NS8cuda_cub14throw_on_errorE9cudaErrorPKc:
.LFB9889:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA9889
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movq	%rsi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movl	%edi, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	pushq	%rcx
	.cfi_def_cfa_offset 48
.LEHB3:
	call	cudaGetLastError@PLT
.LEHE3:
	testl	%ebp, %ebp
	je	.L852
	movl	$64, %edi
	call	__cxa_allocate_exception@PLT
	movq	%rax, %rbx
	call	_ZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEv
	movq	%r13, %rsi
	movq	%rbx, %rdi
	movq	%rax, %r12
.LEHB4:
	call	_ZNSt13runtime_errorC2EPKc@PLT
.LEHE4:
	leaq	16+_ZTVN6thrust20THRUST_200700_890_NS6system12system_errorE(%rip), %rax
	xorl	%edx, %edx
	movl	%ebp, 16(%rbx)
	movq	%rbx, %rdi
	movq	%rax, (%rbx)
	leaq	48(%rbx), %rax
	leaq	_ZTIN6thrust20THRUST_200700_890_NS6system12system_errorE(%rip), %rsi
	movq	%rdx, 40(%rbx)
	leaq	_ZN6thrust20THRUST_200700_890_NS6system12system_errorD1Ev(%rip), %rdx
	movq	%r12, 24(%rbx)
	movq	%rax, 32(%rbx)
	movb	$0, 48(%rbx)
.LEHB5:
	call	__cxa_throw@PLT
.L855:
	endbr64
	movq	%rax, %rbp
.L854:
	movq	%rbx, %rdi
	call	__cxa_free_exception@PLT
	movq	%rbp, %rdi
	call	_Unwind_Resume@PLT
.LEHE5:
.L852:
	popq	%rax
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE9889:
	.section	.gcc_except_table._ZN6thrust20THRUST_200700_890_NS8cuda_cub14throw_on_errorE9cudaErrorPKc,"aG",@progbits,_ZN6thrust20THRUST_200700_890_NS8cuda_cub14throw_on_errorE9cudaErrorPKc,comdat
.LLSDA9889:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE9889-.LLSDACSB9889
.LLSDACSB9889:
	.uleb128 .LEHB3-.LFB9889
	.uleb128 .LEHE3-.LEHB3
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB4-.LFB9889
	.uleb128 .LEHE4-.LEHB4
	.uleb128 .L855-.LFB9889
	.uleb128 0
	.uleb128 .LEHB5-.LFB9889
	.uleb128 .LEHE5-.LEHB5
	.uleb128 0
	.uleb128 0
.LLSDACSE9889:
	.section	.text._ZN6thrust20THRUST_200700_890_NS8cuda_cub14throw_on_errorE9cudaErrorPKc,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS8cuda_cub14throw_on_errorE9cudaErrorPKc,comdat
	.size	_ZN6thrust20THRUST_200700_890_NS8cuda_cub14throw_on_errorE9cudaErrorPKc, .-_ZN6thrust20THRUST_200700_890_NS8cuda_cub14throw_on_errorE9cudaErrorPKc
	.section	.text._ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocC5ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE,comdat
	.align 2
	.weak	_ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE
	.type	_ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE, @function
_ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE:
.LFB10179:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA10179
	endbr64
	leaq	16+_ZTVN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE(%rip), %rax
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	xorl	%ecx, %ecx
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%rsi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	leaq	8(%rdi), %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rdi, %rbx
	pushq	%rdx
	.cfi_def_cfa_offset 48
	movq	%rax, (%rdi)
	leaq	24(%rdi), %rax
	movq	%rcx, 16(%rdi)
	movq	%rax, 8(%rdi)
	movb	$0, 24(%rdi)
	call	_ZNKSt9bad_alloc4whatEv@PLT
	movq	%rax, %rdi
	movq	%rax, %r13
	call	strlen@PLT
	movq	16(%rbx), %rdx
	movq	%r13, %rcx
	xorl	%esi, %esi
	movq	%rax, %r8
	movq	%rbp, %rdi
.LEHB6:
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_replaceEmmPKcm@PLT
	leaq	.LC4(%rip), %rsi
	movq	%rbp, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6appendEPKc@PLT
	movq	8(%r12), %rdx
	movq	(%r12), %rsi
	movabsq	$4611686018427387903, %rax
	subq	16(%rbx), %rax
	cmpq	%rdx, %rax
	jnb	.L858
	leaq	.LC5(%rip), %rdi
	call	_ZSt20__throw_length_errorPKc@PLT
.L858:
	movq	%rbp, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE9_M_appendEPKcm@PLT
.LEHE6:
	popq	%rax
	.cfi_remember_state
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
.L860:
	.cfi_restore_state
	endbr64
	movq	%rax, %r12
.L859:
	movq	%rbp, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	movq	%rbx, %rdi
	call	_ZNSt9bad_allocD2Ev@PLT
	movq	%r12, %rdi
.LEHB7:
	call	_Unwind_Resume@PLT
.LEHE7:
	.cfi_endproc
.LFE10179:
	.section	.gcc_except_table._ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE,"aG",@progbits,_ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocC5ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE,comdat
.LLSDA10179:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE10179-.LLSDACSB10179
.LLSDACSB10179:
	.uleb128 .LEHB6-.LFB10179
	.uleb128 .LEHE6-.LEHB6
	.uleb128 .L860-.LFB10179
	.uleb128 0
	.uleb128 .LEHB7-.LFB10179
	.uleb128 .LEHE7-.LEHB7
	.uleb128 0
	.uleb128 0
.LLSDACSE10179:
	.section	.text._ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocC5ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE,comdat
	.size	_ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE, .-_ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE
	.weak	_ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocC1ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE
	.set	_ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocC1ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE,_ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE
	.text
	.globl	_Z4hashj
	.type	_Z4hashj, @function
_Z4hashj:
.LFB11094:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE11094:
	.size	_Z4hashj, .-_Z4hashj
	.globl	_Z14xoshiro256plusPm
	.type	_Z14xoshiro256plusPm, @function
_Z14xoshiro256plusPm:
.LFB11095:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE11095:
	.size	_Z14xoshiro256plusPm, .-_Z14xoshiro256plusPm
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC10:
	.string	"_ZN3cub17CUB_200700_890_NS28DeviceReduceSingleTileKernelINS0_18DeviceReducePolicyIdyN6thrust20THRUST_200700_890_NS4plusIdEEE9Policy600EPdS9_iS6_ddN4cuda3std3__410__identityEEEvT0_T1_T2_T3_T4_T6_"
.LC11:
	.string	"_ZN3cub17CUB_200700_890_NS18DeviceReduceKernelINS0_18DeviceReducePolicyIdyN6thrust20THRUST_200700_890_NS4plusIdEEE9Policy600ENS4_17counting_iteratorIjNS4_11use_defaultESA_SA_EEyS6_d11estimate_esEEvT0_PT3_T1_NS0_13GridEvenShareISG_EET2_T4_"
.LC12:
	.string	"_ZN3cub17CUB_200700_890_NS28DeviceReduceSingleTileKernelINS0_18DeviceReducePolicyIdyN6thrust20THRUST_200700_890_NS4plusIdEEE9Policy600ENS4_17counting_iteratorIjNS4_11use_defaultESA_SA_EEPdyS6_dd11estimate_esEEvT0_T1_T2_T3_T4_T6_"
.LC13:
	.string	"_ZN3cub17CUB_200700_890_NS28DeviceReduceSingleTileKernelINS0_18DeviceReducePolicyIdjN6thrust20THRUST_200700_890_NS4plusIdEEE9Policy600EPdS9_iS6_ddN4cuda3std3__410__identityEEEvT0_T1_T2_T3_T4_T6_"
.LC14:
	.string	"_ZN3cub17CUB_200700_890_NS18DeviceReduceKernelINS0_18DeviceReducePolicyIdjN6thrust20THRUST_200700_890_NS4plusIdEEE9Policy600ENS4_17counting_iteratorIjNS4_11use_defaultESA_SA_EEjS6_d11estimate_esEEvT0_PT3_T1_NS0_13GridEvenShareISG_EET2_T4_"
.LC15:
	.string	"_ZN3cub17CUB_200700_890_NS28DeviceReduceSingleTileKernelINS0_18DeviceReducePolicyIdjN6thrust20THRUST_200700_890_NS4plusIdEEE9Policy600ENS4_17counting_iteratorIjNS4_11use_defaultESA_SA_EEPdjS6_dd11estimate_esEEvT0_T1_T2_T3_T4_T6_"
.LC16:
	.string	"_ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv"
.LC17:
	.string	"g_seed"
.LC18:
	.string	"_ZN43_INTERNAL_da32596e_12_es_thrust_cu__Z4hashj4cuda3std3__45__cpo5beginE"
.LC19:
	.string	"_ZN43_INTERNAL_da32596e_12_es_thrust_cu__Z4hashj4cuda3std3__45__cpo3endE"
.LC20:
	.string	"_ZN43_INTERNAL_da32596e_12_es_thrust_cu__Z4hashj4cuda3std3__45__cpo6cbeginE"
.LC21:
	.string	"_ZN43_INTERNAL_da32596e_12_es_thrust_cu__Z4hashj4cuda3std3__45__cpo4cendE"
.LC22:
	.string	"_ZN43_INTERNAL_da32596e_12_es_thrust_cu__Z4hashj4cuda3std3__45__cpo6rbeginE"
.LC23:
	.string	"_ZN43_INTERNAL_da32596e_12_es_thrust_cu__Z4hashj4cuda3std3__45__cpo4rendE"
.LC24:
	.string	"_ZN43_INTERNAL_da32596e_12_es_thrust_cu__Z4hashj4cuda3std3__45__cpo7crbeginE"
.LC25:
	.string	"_ZN43_INTERNAL_da32596e_12_es_thrust_cu__Z4hashj4cuda3std3__45__cpo5crendE"
.LC26:
	.string	"_ZN43_INTERNAL_da32596e_12_es_thrust_cu__Z4hashj4cuda3std3__445_GLOBAL__N__da32596e_12_es_thrust_cu__Z4hashj6ignoreE"
.LC27:
	.string	"_ZN43_INTERNAL_da32596e_12_es_thrust_cu__Z4hashj4cuda3std3__419piecewise_constructE"
.LC28:
	.string	"_ZN43_INTERNAL_da32596e_12_es_thrust_cu__Z4hashj4cuda3std3__48in_placeE"
.LC29:
	.string	"_ZN43_INTERNAL_da32596e_12_es_thrust_cu__Z4hashj4cuda3std3__420unreachable_sentinelE"
.LC30:
	.string	"_ZN43_INTERNAL_da32596e_12_es_thrust_cu__Z4hashj4cuda3std3__47nulloptE"
.LC31:
	.string	"_ZN43_INTERNAL_da32596e_12_es_thrust_cu__Z4hashj4cuda3std6ranges3__45__cpo4swapE"
.LC32:
	.string	"_ZN43_INTERNAL_da32596e_12_es_thrust_cu__Z4hashj4cuda3std6ranges3__45__cpo9iter_moveE"
.LC33:
	.string	"_ZN43_INTERNAL_da32596e_12_es_thrust_cu__Z4hashj4cuda3std6ranges3__45__cpo7advanceE"
.LC34:
	.string	"_ZN43_INTERNAL_da32596e_12_es_thrust_cu__Z4hashj4cuda3std6ranges3__45__cpo5beginE"
.LC35:
	.string	"_ZN43_INTERNAL_da32596e_12_es_thrust_cu__Z4hashj4cuda3std6ranges3__45__cpo3endE"
.LC36:
	.string	"_ZN43_INTERNAL_da32596e_12_es_thrust_cu__Z4hashj4cuda3std6ranges3__45__cpo6cbeginE"
.LC37:
	.string	"_ZN43_INTERNAL_da32596e_12_es_thrust_cu__Z4hashj4cuda3std6ranges3__45__cpo4cendE"
.LC38:
	.string	"_ZN43_INTERNAL_da32596e_12_es_thrust_cu__Z4hashj4cuda3std6ranges3__45__cpo9iter_swapE"
.LC39:
	.string	"_ZN43_INTERNAL_da32596e_12_es_thrust_cu__Z4hashj4cuda3std6ranges3__45__cpo4nextE"
.LC40:
	.string	"_ZN43_INTERNAL_da32596e_12_es_thrust_cu__Z4hashj4cuda3std6ranges3__45__cpo4prevE"
.LC41:
	.string	"_ZN43_INTERNAL_da32596e_12_es_thrust_cu__Z4hashj4cuda3std6ranges3__45__cpo4dataE"
.LC42:
	.string	"_ZN43_INTERNAL_da32596e_12_es_thrust_cu__Z4hashj4cuda3std6ranges3__45__cpo5cdataE"
.LC43:
	.string	"_ZN43_INTERNAL_da32596e_12_es_thrust_cu__Z4hashj4cuda3std6ranges3__45__cpo4sizeE"
.LC44:
	.string	"_ZN43_INTERNAL_da32596e_12_es_thrust_cu__Z4hashj4cuda3std6ranges3__45__cpo5ssizeE"
.LC45:
	.string	"_ZN43_INTERNAL_da32596e_12_es_thrust_cu__Z4hashj4cuda3std6ranges3__45__cpo8distanceE"
.LC46:
	.string	"_ZN43_INTERNAL_da32596e_12_es_thrust_cu__Z4hashj6thrust20THRUST_200700_890_NS8cuda_cub3parE"
.LC47:
	.string	"_ZN43_INTERNAL_da32596e_12_es_thrust_cu__Z4hashj6thrust20THRUST_200700_890_NS8cuda_cub10par_nosyncE"
.LC48:
	.string	"_ZN43_INTERNAL_da32596e_12_es_thrust_cu__Z4hashj6thrust20THRUST_200700_890_NS6system6detail10sequential3seqE"
.LC49:
	.string	"_ZN43_INTERNAL_da32596e_12_es_thrust_cu__Z4hashj6thrust20THRUST_200700_890_NS12placeholders2_1E"
.LC50:
	.string	"_ZN43_INTERNAL_da32596e_12_es_thrust_cu__Z4hashj6thrust20THRUST_200700_890_NS12placeholders2_2E"
.LC51:
	.string	"_ZN43_INTERNAL_da32596e_12_es_thrust_cu__Z4hashj6thrust20THRUST_200700_890_NS12placeholders2_3E"
.LC52:
	.string	"_ZN43_INTERNAL_da32596e_12_es_thrust_cu__Z4hashj6thrust20THRUST_200700_890_NS12placeholders2_4E"
.LC53:
	.string	"_ZN43_INTERNAL_da32596e_12_es_thrust_cu__Z4hashj6thrust20THRUST_200700_890_NS12placeholders2_5E"
.LC54:
	.string	"_ZN43_INTERNAL_da32596e_12_es_thrust_cu__Z4hashj6thrust20THRUST_200700_890_NS12placeholders2_6E"
.LC55:
	.string	"_ZN43_INTERNAL_da32596e_12_es_thrust_cu__Z4hashj6thrust20THRUST_200700_890_NS12placeholders2_7E"
.LC56:
	.string	"_ZN43_INTERNAL_da32596e_12_es_thrust_cu__Z4hashj6thrust20THRUST_200700_890_NS12placeholders2_8E"
.LC57:
	.string	"_ZN43_INTERNAL_da32596e_12_es_thrust_cu__Z4hashj6thrust20THRUST_200700_890_NS12placeholders2_9E"
.LC58:
	.string	"_ZN43_INTERNAL_da32596e_12_es_thrust_cu__Z4hashj6thrust20THRUST_200700_890_NS12placeholders3_10E"
.LC59:
	.string	"_ZN43_INTERNAL_da32596e_12_es_thrust_cu__Z4hashj6thrust20THRUST_200700_890_NS3seqE"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB11141:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC10(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_ZN3cub17CUB_200700_890_NS28DeviceReduceSingleTileKernelINS0_18DeviceReducePolicyIdyN6thrust20THRUST_200700_890_NS4plusIdEEE9Policy600EPdS9_iS6_ddN4cuda3std3__410__identityEEEvT0_T1_T2_T3_T4_T6_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC11(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_ZN3cub17CUB_200700_890_NS18DeviceReduceKernelINS0_18DeviceReducePolicyIdyN6thrust20THRUST_200700_890_NS4plusIdEEE9Policy600ENS4_17counting_iteratorIjNS4_11use_defaultESA_SA_EEyS6_d11estimate_esEEvT0_PT3_T1_NS0_13GridEvenShareISG_EET2_T4_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC12(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_ZN3cub17CUB_200700_890_NS28DeviceReduceSingleTileKernelINS0_18DeviceReducePolicyIdyN6thrust20THRUST_200700_890_NS4plusIdEEE9Policy600ENS4_17counting_iteratorIjNS4_11use_defaultESA_SA_EEPdyS6_dd11estimate_esEEvT0_T1_T2_T3_T4_T6_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC13(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_ZN3cub17CUB_200700_890_NS28DeviceReduceSingleTileKernelINS0_18DeviceReducePolicyIdjN6thrust20THRUST_200700_890_NS4plusIdEEE9Policy600EPdS9_iS6_ddN4cuda3std3__410__identityEEEvT0_T1_T2_T3_T4_T6_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC14(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_ZN3cub17CUB_200700_890_NS18DeviceReduceKernelINS0_18DeviceReducePolicyIdjN6thrust20THRUST_200700_890_NS4plusIdEEE9Policy600ENS4_17counting_iteratorIjNS4_11use_defaultESA_SA_EEjS6_d11estimate_esEEvT0_PT3_T1_NS0_13GridEvenShareISG_EET2_T4_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC15(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_ZN3cub17CUB_200700_890_NS28DeviceReduceSingleTileKernelINS0_18DeviceReducePolicyIdjN6thrust20THRUST_200700_890_NS4plusIdEEE9Policy600ENS4_17counting_iteratorIjNS4_11use_defaultESA_SA_EEPdjS6_dd11estimate_esEEvT0_T1_T2_T3_T4_T6_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC16(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC17(%rip), %rdx
	movl	$8, %r9d
	leaq	_ZL6g_seed(%rip), %rsi
	pushq	$1
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC18(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__45__cpo5beginE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC19(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__45__cpo3endE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC20(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__45__cpo6cbeginE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC21(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__45__cpo4cendE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r11
	.cfi_def_cfa_offset 24
	popq	%rax
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC22(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__45__cpo6rbeginE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC23(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__45__cpo4rendE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC24(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__45__cpo7crbeginE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC25(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__45__cpo5crendE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC26(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__445_GLOBAL__N__da32596e_12_es_thrust_cu__Z4hashj6ignoreE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r11
	.cfi_def_cfa_offset 24
	popq	%rax
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC27(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__419piecewise_constructE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC28(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__48in_placeE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC29(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__420unreachable_sentinelE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC30(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__47nulloptE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC31(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo4swapE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r11
	.cfi_def_cfa_offset 24
	popq	%rax
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC32(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo9iter_moveE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC33(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo7advanceE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC34(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo5beginE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC35(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo3endE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC36(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo6cbeginE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r11
	.cfi_def_cfa_offset 24
	popq	%rax
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC37(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo4cendE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC38(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo9iter_swapE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC39(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo4nextE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC40(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo4prevE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC41(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo4dataE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r11
	.cfi_def_cfa_offset 24
	popq	%rax
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC42(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo5cdataE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC43(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo4sizeE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC44(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo5ssizeE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC45(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo8distanceE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC46(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN6thrust20THRUST_200700_890_NS8cuda_cubL3parE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r11
	.cfi_def_cfa_offset 24
	popq	%rax
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC47(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN6thrust20THRUST_200700_890_NS8cuda_cubL10par_nosyncE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC48(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN6thrust20THRUST_200700_890_NS6system6detail10sequentialL3seqE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC49(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_1E(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC50(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_2E(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC51(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_3E(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r11
	.cfi_def_cfa_offset 24
	popq	%rax
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC52(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_4E(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC53(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_5E(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC54(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_6E(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC55(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_7E(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC56(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_8E(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r11
	.cfi_def_cfa_offset 24
	popq	%rax
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC57(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_9E(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC58(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN6thrust20THRUST_200700_890_NS12placeholdersL3_10E(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC59(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movl	$1, %r9d
	movq	%rdx, %rcx
	leaq	_ZN6thrust20THRUST_200700_890_NSL3seqE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	popq	%r8
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE11141:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.rodata._ZN3cub17CUB_200700_890_NS23PerDeviceAttributeCacheclIZNS0_10PtxVersionERiiEUlS3_E_EENS1_13DevicePayloadEOT_i.str1.1,"aMS",@progbits,1
.LC60:
	.string	"Failed to query current device"
	.section	.text._ZN3cub17CUB_200700_890_NS23PerDeviceAttributeCacheclIZNS0_10PtxVersionERiiEUlS3_E_EENS1_13DevicePayloadEOT_i,"axG",@progbits,_ZN3cub17CUB_200700_890_NS23PerDeviceAttributeCacheclIZNS0_10PtxVersionERiiEUlS3_E_EENS1_13DevicePayloadEOT_i,comdat
	.align 2
	.weak	_ZN3cub17CUB_200700_890_NS23PerDeviceAttributeCacheclIZNS0_10PtxVersionERiiEUlS3_E_EENS1_13DevicePayloadEOT_i
	.type	_ZN3cub17CUB_200700_890_NS23PerDeviceAttributeCacheclIZNS0_10PtxVersionERiiEUlS3_E_EENS1_13DevicePayloadEOT_i, @function
_ZN3cub17CUB_200700_890_NS23PerDeviceAttributeCacheclIZNS0_10PtxVersionERiiEUlS3_E_EENS1_13DevicePayloadEOT_i:
.LFB11539:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA11539
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rdi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rsi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movslq	%edx, %rbx
	subq	$168, %rsp
	.cfi_def_cfa_offset 224
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	movb	_ZGVZN3cub17CUB_200700_890_NS22DeviceCountCachedValueEvE5count(%rip), %al
	testb	%al, %al
	jne	.L871
	leaq	_ZGVZN3cub17CUB_200700_890_NS22DeviceCountCachedValueEvE5count(%rip), %r14
	movq	%r14, %rdi
	call	__cxa_guard_acquire@PLT
	testl	%eax, %eax
	je	.L871
	movq	%rsp, %rdi
	movl	$-1, (%rsp)
.LEHB8:
	call	cudaGetDeviceCount@PLT
	movl	%eax, %ebp
	call	cudaGetLastError@PLT
.LEHE8:
	testl	%ebp, %ebp
	sete	%dl
	testl	%eax, %eax
	setne	%al
	testb	%al, %dl
	jne	.L898
	testl	%ebp, %ebp
	je	.L873
.L898:
	movl	$-1, (%rsp)
.L873:
	movl	(%rsp), %eax
	movq	%r14, %rdi
	movl	%eax, _ZZN3cub17CUB_200700_890_NS22DeviceCountCachedValueEvE5count(%rip)
	call	__cxa_guard_release@PLT
.L871:
	cmpl	_ZZN3cub17CUB_200700_890_NS22DeviceCountCachedValueEvE5count(%rip), %ebx
	jge	.L875
	testl	%ebx, %ebx
	js	.L875
	jmp	.L919
.L896:
	endbr64
	movq	%rax, %rbx
.L877:
	movq	%r14, %rdi
	call	__cxa_guard_abort@PLT
	jmp	.L918
.L919:
	imulq	$12, %rbx, %rbp
	addq	%r13, %rbp
	movl	0(%rbp), %eax
	cmpl	$2, %eax
	je	.L893
	jmp	.L920
.L875:
	movl	$101, %eax
	salq	$32, %rax
	jmp	.L881
.L920:
	xorl	%eax, %eax
	movl	$1, %edx
	lock cmpxchgl	%edx, 0(%rbp)
	jne	.L882
	movl	(%r12), %eax
	leaq	4(%rsp), %rdi
	movl	%eax, (%rsp)
	xorl	%eax, %eax
	movl	%eax, 4(%rsp)
.LEHB9:
	call	cudaGetDevice@PLT
	movl	%eax, %r12d
	testl	%eax, %eax
	je	.L883
	call	cudaGetLastError@PLT
	leaq	.LC60(%rip), %rsi
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L917
	jmp	.L916
.L883:
	movl	(%rsp), %edi
	cmpl	%edi, 4(%rsp)
	je	.L885
	call	cudaSetDevice@PLT
	movl	%eax, %r12d
	testl	%eax, %eax
	je	.L885
	call	cudaGetLastError@PLT
	leaq	.LC9(%rip), %rsi
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L916
.L917:
	movl	%r12d, %edi
	call	_ZN4cuda3__418__throw_cuda_errorE9cudaErrorPKc
.LEHE9:
.L885:
	leaq	8(%rsp), %rdi
	leaq	_ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv(%rip), %rsi
	movq	%rsp, %r15
.LEHB10:
	call	cudaFuncGetAttributes@PLT
	movl	%eax, %r14d
	call	cudaGetLastError@PLT
.LEHE10:
	movl	%eax, %r12d
	testl	%r14d, %r14d
	jne	.L899
	testl	%eax, %eax
	jne	.L887
.L899:
	movl	%r14d, %r12d
.L887:
	imull	$10, 40(%rsp), %eax
	movq	%r15, %rdi
	movl	%eax, 4(%rbp)
	call	_ZN4cuda3__423__ensure_current_deviceD1Ev
	movl	%r12d, 8(%rbp)
	testl	%r12d, %r12d
	je	.L890
.LEHB11:
	call	cudaGetLastError@PLT
	jmp	.L890
.L897:
	endbr64
	movq	%rax, %rbx
.L891:
	movq	%r15, %rdi
	call	_ZN4cuda3__423__ensure_current_deviceD1Ev
.L918:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L916
	movq	%rbx, %rdi
	call	_Unwind_Resume@PLT
.LEHE11:
.L890:
	movl	$2, 0(%rbp)
	jmp	.L893
.L882:
	decl	%eax
	jne	.L893
.L894:
	movl	0(%rbp), %eax
	cmpl	$2, %eax
	jne	.L894
.L893:
	imulq	$12, %rbx, %rbx
	movq	4(%r13,%rbx), %rax
.L881:
	movq	152(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L895
.L916:
	call	__stack_chk_fail@PLT
.L895:
	addq	$168, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE11539:
	.section	.gcc_except_table._ZN3cub17CUB_200700_890_NS23PerDeviceAttributeCacheclIZNS0_10PtxVersionERiiEUlS3_E_EENS1_13DevicePayloadEOT_i,"aG",@progbits,_ZN3cub17CUB_200700_890_NS23PerDeviceAttributeCacheclIZNS0_10PtxVersionERiiEUlS3_E_EENS1_13DevicePayloadEOT_i,comdat
.LLSDA11539:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE11539-.LLSDACSB11539
.LLSDACSB11539:
	.uleb128 .LEHB8-.LFB11539
	.uleb128 .LEHE8-.LEHB8
	.uleb128 .L896-.LFB11539
	.uleb128 0
	.uleb128 .LEHB9-.LFB11539
	.uleb128 .LEHE9-.LEHB9
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB10-.LFB11539
	.uleb128 .LEHE10-.LEHB10
	.uleb128 .L897-.LFB11539
	.uleb128 0
	.uleb128 .LEHB11-.LFB11539
	.uleb128 .LEHE11-.LEHB11
	.uleb128 0
	.uleb128 0
.LLSDACSE11539:
	.section	.text._ZN3cub17CUB_200700_890_NS23PerDeviceAttributeCacheclIZNS0_10PtxVersionERiiEUlS3_E_EENS1_13DevicePayloadEOT_i,"axG",@progbits,_ZN3cub17CUB_200700_890_NS23PerDeviceAttributeCacheclIZNS0_10PtxVersionERiiEUlS3_E_EENS1_13DevicePayloadEOT_i,comdat
	.size	_ZN3cub17CUB_200700_890_NS23PerDeviceAttributeCacheclIZNS0_10PtxVersionERiiEUlS3_E_EENS1_13DevicePayloadEOT_i, .-_ZN3cub17CUB_200700_890_NS23PerDeviceAttributeCacheclIZNS0_10PtxVersionERiiEUlS3_E_EENS1_13DevicePayloadEOT_i
	.section	.text._ZN3cub17CUB_200700_890_NS10PtxVersionERi,"axG",@progbits,_ZN3cub17CUB_200700_890_NS10PtxVersionERi,comdat
	.weak	_ZN3cub17CUB_200700_890_NS10PtxVersionERi
	.type	_ZN3cub17CUB_200700_890_NS10PtxVersionERi, @function
_ZN3cub17CUB_200700_890_NS10PtxVersionERi:
.LFB9225:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	movq	%rdi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	subq	$16, %rsp
	.cfi_def_cfa_offset 64
	movq	%fs:40, %rax
	movq	%rax, 8(%rsp)
	xorl	%eax, %eax
	leaq	4(%rsp), %r13
	movl	$-1, 4(%rsp)
	movq	%r13, %rdi
	call	cudaGetDevice@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	testl	%ebx, %ebx
	sete	%dl
	testl	%eax, %eax
	setne	%al
	testb	%al, %dl
	jne	.L928
	testl	%ebx, %ebx
	jne	.L928
	movl	4(%rsp), %r12d
	jmp	.L922
.L928:
	orl	$-1, %r12d
.L922:
	movb	_ZGVZN3cub17CUB_200700_890_NS26GetPerDeviceAttributeCacheINS0_18PtxVersionCacheTagEEERNS0_23PerDeviceAttributeCacheEvE5cache(%rip), %al
	leaq	_ZZN3cub17CUB_200700_890_NS26GetPerDeviceAttributeCacheINS0_18PtxVersionCacheTagEEERNS0_23PerDeviceAttributeCacheEvE5cache(%rip), %rbx
	testb	%al, %al
	jne	.L924
	leaq	_ZGVZN3cub17CUB_200700_890_NS26GetPerDeviceAttributeCacheINS0_18PtxVersionCacheTagEEERNS0_23PerDeviceAttributeCacheEvE5cache(%rip), %r14
	movq	%r14, %rdi
	call	__cxa_guard_acquire@PLT
	testl	%eax, %eax
	je	.L924
	movl	$384, %ecx
	xorl	%eax, %eax
	movq	%rbx, %rdi
	rep stosl
	movq	%r14, %rdi
	call	__cxa_guard_release@PLT
.L924:
	movl	%r12d, %edx
	movq	%r13, %rsi
	movq	%rbx, %rdi
	movl	%r12d, 4(%rsp)
	call	_ZN3cub17CUB_200700_890_NS23PerDeviceAttributeCacheclIZNS0_10PtxVersionERiiEUlS3_E_EENS1_13DevicePayloadEOT_i
	movq	%rax, %r12
	movq	%rax, %rbx
	call	cudaGetLastError@PLT
	shrq	$32, %r12
	orl	%r12d, %eax
	movl	%r12d, %r13d
	jne	.L921
	movl	%ebx, 0(%rbp)
.L921:
	movq	8(%rsp), %rax
	subq	%fs:40, %rax
	je	.L927
	call	__stack_chk_fail@PLT
.L927:
	addq	$16, %rsp
	.cfi_def_cfa_offset 48
	movl	%r13d, %eax
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE9225:
	.size	_ZN3cub17CUB_200700_890_NS10PtxVersionERi, .-_ZN3cub17CUB_200700_890_NS10PtxVersionERi
	.section	.rodata._ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_.str1.1,"aMS",@progbits,1
.LC61:
	.string	"basic_string: construction from null is not valid"
	.section	.text._ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_,"axG",@progbits,_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC5IS3_EEPKcRKS3_,comdat
	.align 2
	.weak	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_
	.type	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_, @function
_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_:
.LFB11544:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	subq	$16, %rsp
	.cfi_def_cfa_offset 48
	movq	%fs:40, %rax
	movq	%rax, 8(%rsp)
	xorl	%eax, %eax
	leaq	16(%rdi), %rax
	movq	%rax, (%rdi)
	testq	%rsi, %rsi
	jne	.L934
	movq	8(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L939
	leaq	.LC61(%rip), %rdi
	call	_ZSt19__throw_logic_errorPKc@PLT
.L934:
	movq	%rdi, %rbx
	movq	%rsi, %rdi
	movq	%rsi, %rbp
	call	strlen@PLT
	movq	%rax, (%rsp)
	leaq	0(%rbp,%rax), %r12
	cmpq	$15, %rax
	jbe	.L936
	movq	%rsp, %rsi
	xorl	%edx, %edx
	movq	%rbx, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE9_M_createERmm@PLT
	movq	%rax, (%rbx)
	movq	(%rsp), %rax
	movq	%rax, 16(%rbx)
.L936:
	movq	(%rbx), %rdi
	movq	%r12, %rdx
	movq	%rbp, %rsi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE13_S_copy_charsEPcPKcS7_@PLT
	movq	(%rsp), %rax
	movq	(%rbx), %rdx
	movq	%rax, 8(%rbx)
	movb	$0, (%rdx,%rax)
	movq	8(%rsp), %rax
	subq	%fs:40, %rax
	je	.L937
.L939:
	call	__stack_chk_fail@PLT
.L937:
	addq	$16, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE11544:
	.size	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_, .-_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_
	.weak	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1IS3_EEPKcRKS3_
	.set	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1IS3_EEPKcRKS3_,_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_
	.section	.rodata._ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11Ei.str1.1,"aMS",@progbits,1
.LC62:
	.string	"Unknown error"
	.section	.text._ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11Ei,"axG",@progbits,_ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11Ei,comdat
	.align 2
	.weak	_ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11Ei
	.type	_ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11Ei, @function
_ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11Ei:
.LFB9778:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA9778
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movl	%edx, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rdi, %rbx
	subq	$24, %rsp
	.cfi_def_cfa_offset 64
	movq	%fs:40, %rax
	movq	%rax, 8(%rsp)
	xorl	%eax, %eax
	movb	_ZGVZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11EiE11unknown_err(%rip), %al
	testb	%al, %al
	jne	.L942
	leaq	_ZGVZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11EiE11unknown_err(%rip), %rbp
	movq	%rbp, %rdi
	call	__cxa_guard_acquire@PLT
	testl	%eax, %eax
	je	.L942
	leaq	_ZZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11EiE11unknown_err(%rip), %r13
	leaq	7(%rsp), %rdx
	leaq	.LC62(%rip), %rsi
	movq	%r13, %rdi
.LEHB12:
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1IS3_EEPKcRKS3_
.LEHE12:
	movq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED1Ev@GOTPCREL(%rip), %rdi
	leaq	__dso_handle(%rip), %rdx
	movq	%r13, %rsi
	call	__cxa_atexit@PLT
	movq	%rbp, %rdi
	call	__cxa_guard_release@PLT
.L942:
	movl	%r12d, %edi
	call	strerror@PLT
	movq	%rax, %rsi
	testq	%rax, %rax
	je	.L944
	leaq	7(%rsp), %rdx
	movq	%rbx, %rdi
.LEHB13:
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1IS3_EEPKcRKS3_
	jmp	.L940
.L944:
	leaq	_ZZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11EiE11unknown_err(%rip), %rsi
	movq	%rbx, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1ERKS4_@PLT
	jmp	.L940
.L949:
	endbr64
	movq	%rax, %rbx
.L946:
	movq	%rbp, %rdi
	call	__cxa_guard_abort@PLT
	movq	8(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L954
	movq	%rbx, %rdi
	call	_Unwind_Resume@PLT
.LEHE13:
.L940:
	movq	8(%rsp), %rax
	subq	%fs:40, %rax
	je	.L948
.L954:
	call	__stack_chk_fail@PLT
.L948:
	addq	$24, %rsp
	.cfi_def_cfa_offset 40
	movq	%rbx, %rax
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE9778:
	.section	.gcc_except_table._ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11Ei,"aG",@progbits,_ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11Ei,comdat
.LLSDA9778:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE9778-.LLSDACSB9778
.LLSDACSB9778:
	.uleb128 .LEHB12-.LFB9778
	.uleb128 .LEHE12-.LEHB12
	.uleb128 .L949-.LFB9778
	.uleb128 0
	.uleb128 .LEHB13-.LFB9778
	.uleb128 .LEHE13-.LEHB13
	.uleb128 0
	.uleb128 0
.LLSDACSE9778:
	.section	.text._ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11Ei,"axG",@progbits,_ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11Ei,comdat
	.size	_ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11Ei, .-_ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11Ei
	.section	.rodata._ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category7messageB5cxx11Ei.str1.1,"aMS",@progbits,1
.LC63:
	.string	"unknown error"
.LC64:
	.string	"cudaErrorUnknown"
	.section	.text._ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category7messageB5cxx11Ei,"axG",@progbits,_ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category7messageB5cxx11Ei,comdat
	.align 2
	.weak	_ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category7messageB5cxx11Ei
	.type	_ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category7messageB5cxx11Ei, @function
_ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category7messageB5cxx11Ei:
.LFB9843:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA9843
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%rdi, %r12
	movl	%edx, %edi
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movl	%edx, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	subq	$88, %rsp
	.cfi_def_cfa_offset 128
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
.LEHB14:
	call	cudaGetErrorString@PLT
	movl	%ebp, %edi
	movq	%rax, %rbx
	call	cudaGetErrorName@PLT
	movq	%rax, %rsi
	testq	%rbx, %rbx
	jne	.L956
	leaq	.LC63(%rip), %rbx
.L956:
	testq	%rsi, %rsi
	jne	.L957
	leaq	.LC64(%rip), %rsi
.L957:
	leaq	8(%rsp), %rbp
	leaq	7(%rsp), %rdx
	movq	%rbp, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1IS3_EEPKcRKS3_
.LEHE14:
	leaq	.LC4(%rip), %rsi
	movq	%rbp, %rdi
.LEHB15:
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6appendEPKc@PLT
.LEHE15:
	leaq	40(%rsp), %r13
	movq	%rax, %rsi
	movq	%r13, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1EOS4_@PLT
	movq	%rbx, %rsi
	movq	%r13, %rdi
.LEHB16:
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6appendEPKc@PLT
.LEHE16:
	movq	%rax, %rsi
	movq	%r12, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1EOS4_@PLT
	movq	%r13, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	movq	%rbp, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L961
	jmp	.L966
.L965:
	endbr64
	movq	%rax, %rbx
.L958:
	movq	%r13, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	jmp	.L959
.L964:
	endbr64
	movq	%rax, %rbx
.L959:
	movq	%rbp, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L966
	movq	%rbx, %rdi
.LEHB17:
	call	_Unwind_Resume@PLT
.LEHE17:
.L966:
	call	__stack_chk_fail@PLT
.L961:
	addq	$88, %rsp
	.cfi_def_cfa_offset 40
	movq	%r12, %rax
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE9843:
	.section	.gcc_except_table._ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category7messageB5cxx11Ei,"aG",@progbits,_ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category7messageB5cxx11Ei,comdat
.LLSDA9843:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE9843-.LLSDACSB9843
.LLSDACSB9843:
	.uleb128 .LEHB14-.LFB9843
	.uleb128 .LEHE14-.LEHB14
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB15-.LFB9843
	.uleb128 .LEHE15-.LEHB15
	.uleb128 .L964-.LFB9843
	.uleb128 0
	.uleb128 .LEHB16-.LFB9843
	.uleb128 .LEHE16-.LEHB16
	.uleb128 .L965-.LFB9843
	.uleb128 0
	.uleb128 .LEHB17-.LFB9843
	.uleb128 .LEHE17-.LEHB17
	.uleb128 0
	.uleb128 0
.LLSDACSE9843:
	.section	.text._ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category7messageB5cxx11Ei,"axG",@progbits,_ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category7messageB5cxx11Ei,comdat
	.size	_ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category7messageB5cxx11Ei, .-_ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category7messageB5cxx11Ei
	.section	.rodata
	.align 32
.LC0:
	.value	3
	.value	48
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.quad	0
	.long	0
	.zero	4
	.quad	0
	.section	.text._ZN5nvtx32v116event_attributesC2IJEEERKNS0_7messageEDpRKT_,"axG",@progbits,_ZN5nvtx32v116event_attributesC5IJEEERKNS0_7messageEDpRKT_,comdat
	.align 2
	.weak	_ZN5nvtx32v116event_attributesC2IJEEERKNS0_7messageEDpRKT_
	.type	_ZN5nvtx32v116event_attributesC2IJEEERKNS0_7messageEDpRKT_, @function
_ZN5nvtx32v116event_attributesC2IJEEERKNS0_7messageEDpRKT_:
.LFB12072:
	.cfi_startproc
	endbr64
	movq	%rsi, %rdx
	movq	%rdi, %rax
	movl	$12, %ecx
	leaq	.LC0(%rip), %rsi
	rep movsl
	movq	8(%rdx), %rcx
	movl	(%rdx), %edx
	movq	%rcx, 40(%rax)
	movl	%edx, 32(%rax)
	ret
	.cfi_endproc
.LFE12072:
	.size	_ZN5nvtx32v116event_attributesC2IJEEERKNS0_7messageEDpRKT_, .-_ZN5nvtx32v116event_attributesC2IJEEERKNS0_7messageEDpRKT_
	.weak	_ZN5nvtx32v116event_attributesC1IJEEERKNS0_7messageEDpRKT_
	.set	_ZN5nvtx32v116event_attributesC1IJEEERKNS0_7messageEDpRKT_,_ZN5nvtx32v116event_attributesC2IJEEERKNS0_7messageEDpRKT_
	.section	.text._ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIhNS1_18no_throw_allocatorINS1_19temporary_allocatorIhNS0_8cuda_cub3tagEEEEEE4dataEv,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIhNS1_18no_throw_allocatorINS1_19temporary_allocatorIhNS0_8cuda_cub3tagEEEEEE4dataEv,comdat
	.align 2
	.weak	_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIhNS1_18no_throw_allocatorINS1_19temporary_allocatorIhNS0_8cuda_cub3tagEEEEEE4dataEv
	.type	_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIhNS1_18no_throw_allocatorINS1_19temporary_allocatorIhNS0_8cuda_cub3tagEEEEEE4dataEv, @function
_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIhNS1_18no_throw_allocatorINS1_19temporary_allocatorIhNS0_8cuda_cub3tagEEEEEE4dataEv:
.LFB12091:
	.cfi_startproc
	endbr64
	movq	8(%rdi), %rax
	ret
	.cfi_endproc
.LFE12091:
	.size	_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIhNS1_18no_throw_allocatorINS1_19temporary_allocatorIhNS0_8cuda_cub3tagEEEEEE4dataEv, .-_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIhNS1_18no_throw_allocatorINS1_19temporary_allocatorIhNS0_8cuda_cub3tagEEEEEE4dataEv
	.section	.rodata._ZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_v.str1.1,"aMS",@progbits,1
.LC65:
	.string	"CCCL"
	.section	.text._ZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_v,"axG",@progbits,_ZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_v,comdat
	.weak	_ZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_v
	.type	_ZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_v, @function
_ZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_v:
.LFB12161:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA12161
	endbr64
	movb	_ZGVZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_vE1d(%rip), %al
	testb	%al, %al
	jne	.L980
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZGVZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_vE1d(%rip), %rbx
	movq	%rbx, %rdi
	call	__cxa_guard_acquire@PLT
	testl	%eax, %eax
	je	.L972
	movq	480+nvtxGlobals_v3(%rip), %rdx
	xorl	%eax, %eax
	testq	%rdx, %rdx
	je	.L974
	leaq	.LC65(%rip), %rdi
	call	*%rdx
.L974:
	movq	%rbx, %rdi
	movq	%rax, _ZZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_vE1d(%rip)
	call	__cxa_guard_release@PLT
.L972:
	leaq	_ZZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_vE1d(%rip), %rax
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
.L980:
	.cfi_restore 3
	leaq	_ZZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_vE1d(%rip), %rax
	ret
	.cfi_endproc
.LFE12161:
	.section	.gcc_except_table._ZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_v,"aG",@progbits,_ZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_v,comdat
.LLSDA12161:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE12161-.LLSDACSB12161
.LLSDACSB12161:
.LLSDACSE12161:
	.section	.text._ZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_v,"axG",@progbits,_ZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_v,comdat
	.size	_ZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_v, .-_ZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_v
	.section	.text._ZN5nvtx32v120registered_string_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEC2EPKc,"axG",@progbits,_ZN5nvtx32v120registered_string_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEC5EPKc,comdat
	.align 2
	.weak	_ZN5nvtx32v120registered_string_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEC2EPKc
	.type	_ZN5nvtx32v120registered_string_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEC2EPKc, @function
_ZN5nvtx32v120registered_string_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEC2EPKc:
.LFB12112:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA12112
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movq	%rdi, %rbx
	subq	$16, %rsp
	.cfi_def_cfa_offset 32
	movq	%rsi, 8(%rsp)
	call	_ZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_v
	movq	464+nvtxGlobals_v3(%rip), %rdx
	movq	(%rax), %rdi
	xorl	%eax, %eax
	testq	%rdx, %rdx
	je	.L984
	movq	8(%rsp), %rsi
	call	*%rdx
.L984:
	movq	%rax, (%rbx)
	addq	$16, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE12112:
	.section	.gcc_except_table._ZN5nvtx32v120registered_string_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEC2EPKc,"aG",@progbits,_ZN5nvtx32v120registered_string_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEC5EPKc,comdat
.LLSDA12112:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE12112-.LLSDACSB12112
.LLSDACSB12112:
.LLSDACSE12112:
	.section	.text._ZN5nvtx32v120registered_string_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEC2EPKc,"axG",@progbits,_ZN5nvtx32v120registered_string_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEC5EPKc,comdat
	.size	_ZN5nvtx32v120registered_string_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEC2EPKc, .-_ZN5nvtx32v120registered_string_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEC2EPKc
	.weak	_ZN5nvtx32v120registered_string_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEC1EPKc
	.set	_ZN5nvtx32v120registered_string_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEC1EPKc,_ZN5nvtx32v120registered_string_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEC2EPKc
	.text
	.align 2
	.type	_ZN4cuda3std3__48optionalIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEEE7emplaceIJRKNS4_16event_attributesEELi0EEERSA_DpOT_.isra.0, @function
_ZN4cuda3std3__48optionalIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEEE7emplaceIJRKNS4_16event_attributesEELi0EEERSA_DpOT_.isra.0:
.LFB12398:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA12398
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movq	%rsi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	movq	%rdi, %rbx
	pushq	%rdx
	.cfi_def_cfa_offset 32
	cmpb	$0, 1(%rdi)
	je	.L989
	call	_ZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_v
	movq	(%rax), %rdi
	call	nvtxDomainRangePop
	movb	$0, 1(%rbx)
.L989:
	call	_ZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_v
	movq	(%rax), %rdi
	movq	416+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L990
	movq	%rbp, %rsi
	call	*%rax
.L990:
	movb	$1, 1(%rbx)
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE12398:
	.section	.gcc_except_table,"a",@progbits
.LLSDA12398:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE12398-.LLSDACSB12398
.LLSDACSB12398:
.LLSDACSE12398:
	.text
	.size	_ZN4cuda3std3__48optionalIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEEE7emplaceIJRKNS4_16event_attributesEELi0EEERSA_DpOT_.isra.0, .-_ZN4cuda3std3__48optionalIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEEE7emplaceIJRKNS4_16event_attributesEELi0EEERSA_DpOT_.isra.0
	.section	.text._ZN4cuda3std3__424__optional_destruct_baseIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEELb0EED2Ev,"axG",@progbits,_ZN4cuda3std3__424__optional_destruct_baseIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEELb0EED5Ev,comdat
	.align 2
	.weak	_ZN4cuda3std3__424__optional_destruct_baseIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEELb0EED2Ev
	.hidden	_ZN4cuda3std3__424__optional_destruct_baseIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEELb0EED2Ev
	.type	_ZN4cuda3std3__424__optional_destruct_baseIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEELb0EED2Ev, @function
_ZN4cuda3std3__424__optional_destruct_baseIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEELb0EED2Ev:
.LFB12109:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA12109
	endbr64
	cmpb	$0, 1(%rdi)
	je	.L998
	pushq	%rax
	.cfi_def_cfa_offset 16
	call	_ZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_v
	movq	(%rax), %rdi
	call	nvtxDomainRangePop
	popq	%rdx
	.cfi_def_cfa_offset 8
	ret
.L998:
	ret
	.cfi_endproc
.LFE12109:
	.section	.gcc_except_table
.LLSDA12109:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE12109-.LLSDACSB12109
.LLSDACSB12109:
.LLSDACSE12109:
	.section	.text._ZN4cuda3std3__424__optional_destruct_baseIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEELb0EED2Ev,"axG",@progbits,_ZN4cuda3std3__424__optional_destruct_baseIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEELb0EED5Ev,comdat
	.size	_ZN4cuda3std3__424__optional_destruct_baseIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEELb0EED2Ev, .-_ZN4cuda3std3__424__optional_destruct_baseIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEELb0EED2Ev
	.weak	_ZN4cuda3std3__424__optional_destruct_baseIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEELb0EED1Ev
	.hidden	_ZN4cuda3std3__424__optional_destruct_baseIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEELb0EED1Ev
	.set	_ZN4cuda3std3__424__optional_destruct_baseIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEELb0EED1Ev,_ZN4cuda3std3__424__optional_destruct_baseIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEELb0EED2Ev
	.section	.rodata._ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIhNS1_18no_throw_allocatorINS1_19temporary_allocatorIhNS0_8cuda_cub3tagEEEEEE10deallocateEv.str1.1,"aMS",@progbits,1
.LC66:
	.string	"device free failed"
	.section	.text._ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIhNS1_18no_throw_allocatorINS1_19temporary_allocatorIhNS0_8cuda_cub3tagEEEEEE10deallocateEv,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIhNS1_18no_throw_allocatorINS1_19temporary_allocatorIhNS0_8cuda_cub3tagEEEEEE10deallocateEv,comdat
	.align 2
	.weak	_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIhNS1_18no_throw_allocatorINS1_19temporary_allocatorIhNS0_8cuda_cub3tagEEEEEE10deallocateEv
	.type	_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIhNS1_18no_throw_allocatorINS1_19temporary_allocatorIhNS0_8cuda_cub3tagEEEEEE10deallocateEv, @function
_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIhNS1_18no_throw_allocatorINS1_19temporary_allocatorIhNS0_8cuda_cub3tagEEEEEE10deallocateEv:
.LFB12187:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA12187
	endbr64
	cmpq	$0, 16(%rdi)
	je	.L1004
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movq	%rdi, %rbx
	movq	8(%rdi), %rdi
	call	cudaFree@PLT
	leaq	.LC66(%rip), %rsi
	movl	%eax, %edi
	call	_ZN6thrust20THRUST_200700_890_NS8cuda_cub14throw_on_errorE9cudaErrorPKc
	xorl	%eax, %eax
	movq	%rax, 8(%rbx)
	movq	%rax, 16(%rbx)
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
.L1004:
	.cfi_restore 3
	ret
	.cfi_endproc
.LFE12187:
	.section	.gcc_except_table
.LLSDA12187:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE12187-.LLSDACSB12187
.LLSDACSB12187:
.LLSDACSE12187:
	.section	.text._ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIhNS1_18no_throw_allocatorINS1_19temporary_allocatorIhNS0_8cuda_cub3tagEEEEEE10deallocateEv,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIhNS1_18no_throw_allocatorINS1_19temporary_allocatorIhNS0_8cuda_cub3tagEEEEEE10deallocateEv,comdat
	.size	_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIhNS1_18no_throw_allocatorINS1_19temporary_allocatorIhNS0_8cuda_cub3tagEEEEEE10deallocateEv, .-_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIhNS1_18no_throw_allocatorINS1_19temporary_allocatorIhNS0_8cuda_cub3tagEEEEEE10deallocateEv
	.section	.text._ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvN6thrust20THRUST_200700_890_NS17counting_iteratorIjNS3_11use_defaultES5_S5_EEPdjNS0_13GridEvenShareIjEENS3_4plusIdEE11estimate_esEEE9cudaErrorRiT_ii,"axG",@progbits,_ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvN6thrust20THRUST_200700_890_NS17counting_iteratorIjNS3_11use_defaultES5_S5_EEPdjNS0_13GridEvenShareIjEENS3_4plusIdEE11estimate_esEEE9cudaErrorRiT_ii,comdat
	.weak	_ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvN6thrust20THRUST_200700_890_NS17counting_iteratorIjNS3_11use_defaultES5_S5_EEPdjNS0_13GridEvenShareIjEENS3_4plusIdEE11estimate_esEEE9cudaErrorRiT_ii
	.hidden	_ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvN6thrust20THRUST_200700_890_NS17counting_iteratorIjNS3_11use_defaultES5_S5_EEPdjNS0_13GridEvenShareIjEENS3_4plusIdEE11estimate_esEEE9cudaErrorRiT_ii
	.type	_ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvN6thrust20THRUST_200700_890_NS17counting_iteratorIjNS3_11use_defaultES5_S5_EEPdjNS0_13GridEvenShareIjEENS3_4plusIdEE11estimate_esEEE9cudaErrorRiT_ii, @function
_ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvN6thrust20THRUST_200700_890_NS17counting_iteratorIjNS3_11use_defaultES5_S5_EEPdjNS0_13GridEvenShareIjEENS3_4plusIdEE11estimate_esEEE9cudaErrorRiT_ii:
.LFB12289:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	xorl	%r8d, %r8d
	movslq	%ecx, %rcx
	call	cudaOccupancyMaxActiveBlocksPerMultiprocessorWithFlags@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	testl	%ebx, %ebx
	jne	.L1010
	testl	%eax, %eax
	jne	.L1007
.L1010:
	movl	%ebx, %eax
.L1007:
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE12289:
	.size	_ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvN6thrust20THRUST_200700_890_NS17counting_iteratorIjNS3_11use_defaultES5_S5_EEPdjNS0_13GridEvenShareIjEENS3_4plusIdEE11estimate_esEEE9cudaErrorRiT_ii, .-_ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvN6thrust20THRUST_200700_890_NS17counting_iteratorIjNS3_11use_defaultES5_S5_EEPdjNS0_13GridEvenShareIjEENS3_4plusIdEE11estimate_esEEE9cudaErrorRiT_ii
	.section	.rodata.str1.1
.LC67:
	.string	"cub::DeviceReduce::TransformReduce"
	.text
	.type	_ZN3cub17CUB_200700_890_NS12DeviceReduce15TransformReduceIN6thrust20THRUST_200700_890_NS17counting_iteratorIjNS4_11use_defaultES6_S6_EEPdNS4_4plusIdEE11estimate_esdiEE9cudaErrorPvRmT_T0_T4_T1_T2_T3_P11CUstream_st.isra.0, @function
_ZN3cub17CUB_200700_890_NS12DeviceReduce15TransformReduceIN6thrust20THRUST_200700_890_NS17counting_iteratorIjNS4_11use_defaultES6_S6_EEPdNS4_4plusIdEE11estimate_esdiEE9cudaErrorPvRmT_T0_T4_T1_T2_T3_P11CUstream_st.isra.0:
.LFB12404:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA12404
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	%edx, %r15d
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rsi, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%r9, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rdi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%r8d, %ebx
	subq	$488, %rsp
	.cfi_def_cfa_offset 544
	movq	%rcx, 16(%rsp)
	movsd	%xmm0, 24(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 472(%rsp)
	xorl	%eax, %eax
	movw	$0, 42(%rsp)
	movb	_ZGVZN3cub17CUB_200700_890_NS12DeviceReduce15TransformReduceIN6thrust20THRUST_200700_890_NS17counting_iteratorIjNS4_11use_defaultES6_S6_EEPdNS4_4plusIdEE11estimate_esdiEE9cudaErrorPvRmT_T0_T4_T1_T2_T3_P11CUstream_stE21__cub_nvtx3_func_name(%rip), %al
	testb	%al, %al
	jne	.L1017
	leaq	_ZGVZN3cub17CUB_200700_890_NS12DeviceReduce15TransformReduceIN6thrust20THRUST_200700_890_NS17counting_iteratorIjNS4_11use_defaultES6_S6_EEPdNS4_4plusIdEE11estimate_esdiEE9cudaErrorPvRmT_T0_T4_T1_T2_T3_P11CUstream_stE21__cub_nvtx3_func_name(%rip), %rbp
	movq	%rbp, %rdi
	call	__cxa_guard_acquire@PLT
	testl	%eax, %eax
	je	.L1017
	leaq	_ZZN3cub17CUB_200700_890_NS12DeviceReduce15TransformReduceIN6thrust20THRUST_200700_890_NS17counting_iteratorIjNS4_11use_defaultES6_S6_EEPdNS4_4plusIdEE11estimate_esdiEE9cudaErrorPvRmT_T0_T4_T1_T2_T3_P11CUstream_stE21__cub_nvtx3_func_name(%rip), %rdi
	leaq	.LC67(%rip), %rsi
	call	_ZN5nvtx32v120registered_string_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEC1EPKc
	movq	%rbp, %rdi
	call	__cxa_guard_release@PLT
.L1017:
	movb	_ZGVZN3cub17CUB_200700_890_NS12DeviceReduce15TransformReduceIN6thrust20THRUST_200700_890_NS17counting_iteratorIjNS4_11use_defaultES6_S6_EEPdNS4_4plusIdEE11estimate_esdiEE9cudaErrorPvRmT_T0_T4_T1_T2_T3_P11CUstream_stE21__cub_nvtx3_func_attr(%rip), %al
	testb	%al, %al
	jne	.L1020
	leaq	_ZGVZN3cub17CUB_200700_890_NS12DeviceReduce15TransformReduceIN6thrust20THRUST_200700_890_NS17counting_iteratorIjNS4_11use_defaultES6_S6_EEPdNS4_4plusIdEE11estimate_esdiEE9cudaErrorPvRmT_T0_T4_T1_T2_T3_P11CUstream_stE21__cub_nvtx3_func_attr(%rip), %rbp
	movq	%rbp, %rdi
	call	__cxa_guard_acquire@PLT
	testl	%eax, %eax
	je	.L1020
	movq	_ZZN3cub17CUB_200700_890_NS12DeviceReduce15TransformReduceIN6thrust20THRUST_200700_890_NS17counting_iteratorIjNS4_11use_defaultES6_S6_EEPdNS4_4plusIdEE11estimate_esdiEE9cudaErrorPvRmT_T0_T4_T1_T2_T3_P11CUstream_stE21__cub_nvtx3_func_name(%rip), %rax
	leaq	_ZZN3cub17CUB_200700_890_NS12DeviceReduce15TransformReduceIN6thrust20THRUST_200700_890_NS17counting_iteratorIjNS4_11use_defaultES6_S6_EEPdNS4_4plusIdEE11estimate_esdiEE9cudaErrorPvRmT_T0_T4_T1_T2_T3_P11CUstream_stE21__cub_nvtx3_func_attr(%rip), %rdi
	leaq	408(%rsp), %rsi
	movl	$3, 408(%rsp)
	movq	%rax, 416(%rsp)
	call	_ZN5nvtx32v116event_attributesC1IJEEERKNS0_7messageEDpRKT_
	movq	%rbp, %rdi
	call	__cxa_guard_release@PLT
.L1020:
	leaq	42(%rsp), %rax
	testq	%r12, %r12
	movq	%rax, 8(%rsp)
	je	.L1022
	leaq	_ZZN3cub17CUB_200700_890_NS12DeviceReduce15TransformReduceIN6thrust20THRUST_200700_890_NS17counting_iteratorIjNS4_11use_defaultES6_S6_EEPdNS4_4plusIdEE11estimate_esdiEE9cudaErrorPvRmT_T0_T4_T1_T2_T3_P11CUstream_stE21__cub_nvtx3_func_attr(%rip), %rsi
	movq	%rax, %rdi
	call	_ZN4cuda3std3__48optionalIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEEE7emplaceIJRKNS4_16event_attributesEELi0EEERSA_DpOT_.isra.0
.L1022:
	xorl	%eax, %eax
	leaq	44(%rsp), %rdi
	movl	%eax, 44(%rsp)
.LEHB18:
	call	_ZN3cub17CUB_200700_890_NS10PtxVersionERi
	movl	%eax, %ebp
	call	cudaGetLastError@PLT
	testl	%ebp, %ebp
	jne	.L1078
	testl	%eax, %eax
	jne	.L1023
	testl	%ebp, %ebp
	jne	.L1078
	movl	44(%rsp), %eax
	movq	16(%rsp), %rdx
	movq	%r12, 408(%rsp)
	movsd	24(%rsp), %xmm1
	movq	%r14, 416(%rsp)
	movl	%r15d, 424(%rsp)
	movq	%rdx, 432(%rsp)
	movl	%ebx, 440(%rsp)
	movq	%r13, 456(%rsp)
	movl	%eax, 464(%rsp)
	movsd	%xmm1, 448(%rsp)
	cmpl	$599, %eax
	jg	.L1025
	cmpl	$349, %eax
	jg	.L1026
	cmpl	$2560, %ebx
	ja	.L1027
	testq	%r12, %r12
	jne	.L1028
.L1045:
	movq	$1, (%r14)
	jmp	.L1030
.L1028:
	movq	%r13, 200(%rsp)
	leaq	432(%rsp), %rcx
	movabsq	$4294967297, %rax
	movabsq	$1099511627777, %rdx
	movq	%rax, 168(%rsp)
	leaq	168(%rsp), %rdi
	movq	%rax, 184(%rsp)
	xorl	%eax, %eax
	movq	%rdx, 176(%rsp)
	leaq	424(%rsp), %rdx
	movq	%rax, 192(%rsp)
	jmp	.L1261
.L1027:
	leaq	88(%rsp), %rdi
	call	cudaGetDevice@PLT
	movl	%eax, %r15d
	call	cudaGetLastError@PLT
	testl	%r15d, %r15d
	jne	.L1106
	testl	%eax, %eax
	jne	.L1061
.L1106:
	movl	%r15d, %eax
	testl	%r15d, %r15d
	jne	.L1061
	movl	88(%rsp), %edx
	leaq	128(%rsp), %rdi
	movl	$16, %esi
	call	cudaDeviceGetAttribute@PLT
	movl	%eax, %r15d
	call	cudaGetLastError@PLT
	testl	%r15d, %r15d
	jne	.L1107
	testl	%eax, %eax
	jne	.L1061
.L1107:
	movl	%r15d, %eax
	testl	%r15d, %r15d
	jne	.L1061
	movl	$167772161, %eax
	leaq	340(%rsp), %rdi
	xorl	%ecx, %ecx
	movl	$256, %edx
	salq	$8, %rax
	leaq	_ZN3cub17CUB_200700_890_NS18DeviceReduceKernelINS0_18DeviceReducePolicyIdjN6thrust20THRUST_200700_890_NS4plusIdEEE9Policy600ENS4_17counting_iteratorIjNS4_11use_defaultESA_SA_EEjS6_d11estimate_esEEvT0_PT3_T1_NS0_13GridEvenShareISG_EET2_T4_(%rip), %rsi
	movq	$2560, 336(%rsp)
	movq	%rax, 328(%rsp)
	call	_ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvN6thrust20THRUST_200700_890_NS17counting_iteratorIjNS3_11use_defaultES5_S5_EEPdjNS0_13GridEvenShareIjEENS3_4plusIdEE11estimate_esEEE9cudaErrorRiT_ii
	movl	%eax, %r15d
	call	cudaGetLastError@PLT
	testl	%r15d, %r15d
	jne	.L1100
	testl	%eax, %eax
	jne	.L1061
	testl	%r15d, %r15d
	jne	.L1100
	movl	336(%rsp), %esi
	xorl	%eax, %eax
	xorl	%edx, %edx
	movl	340(%rsp), %ecx
	movl	%eax, 404(%rsp)
	movl	%ebx, %eax
	imull	128(%rsp), %ecx
	divl	%esi
	movl	%ebx, 396(%rsp)
	movl	%ebx, 400(%rsp)
	movl	%ebx, 388(%rsp)
	leal	(%rcx,%rcx,4), %ecx
	cmpl	$1, %edx
	sbbl	$-1, %eax
	cmpl	%eax, %ecx
	movl	%eax, %ebx
	movl	%eax, 368(%rsp)
	cmovle	%ecx, %ebx
	cltd
	movslq	%ecx, %rcx
	idivl	%ebx
	movl	%ebx, 392(%rsp)
	imull	%esi, %eax
	movl	%edx, 372(%rsp)
	imull	%esi, %edx
	movl	%eax, 380(%rsp)
	addl	%eax, %esi
	leaq	255(,%rcx,8), %rax
	movl	%edx, 384(%rsp)
	orb	$-1, %al
	movl	%esi, 376(%rsp)
	testq	%r12, %r12
	jne	.L1036
	movq	%rax, (%r14)
	xorl	%r14d, %r14d
	jmp	.L1037
.L1036:
	cmpq	%rax, (%r14)
	jnb	.L1038
	call	cudaGetLastError@PLT
	xorl	%r14d, %r14d
	movl	$1, %r15d
	jmp	.L1037
.L1038:
	leaq	255(%r12), %r14
	xorb	%r14b, %r14b
.L1037:
	call	cudaGetLastError@PLT
	testl	$1, %r15d
	jne	.L1109
	testl	%eax, %eax
	jne	.L1061
.L1109:
	testl	%r15d, %r15d
	jne	.L1100
	testq	%r12, %r12
	je	.L1030
	movl	%ebx, 168(%rsp)
	leaq	424(%rsp), %rdx
	movabsq	$1099511627777, %rax
	leaq	248(%rsp), %rdi
	movl	%ebx, 248(%rsp)
	leaq	288(%rsp), %rbx
	leaq	368(%rsp), %r9
	movq	%r14, 288(%rsp)
	movq	%rbx, %rcx
	xorl	%r14d, %r14d
	leaq	_ZN3cub17CUB_200700_890_NS18DeviceReduceKernelINS0_18DeviceReducePolicyIdjN6thrust20THRUST_200700_890_NS4plusIdEEE9Policy600ENS4_17counting_iteratorIjNS4_11use_defaultESA_SA_EEjS6_d11estimate_esEEvT0_PT3_T1_NS0_13GridEvenShareISG_EET2_T4_(%rip), %rsi
	movq	%rax, 256(%rsp)
	leaq	440(%rsp), %r8
	movabsq	$4294967297, %rax
	movl	$1, 252(%rsp)
	movq	%rax, 264(%rsp)
	movq	%r14, 272(%rsp)
	movq	%r13, 280(%rsp)
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvNS0_17counting_iteratorIjNS0_11use_defaultES6_S6_EEPdjN3cub17CUB_200700_890_NS13GridEvenShareIjEENS0_4plusIdEE11estimate_esEJS7_S8_jSC_SE_SF_EEE9cudaErrorT_DpRKT0_.isra.0
	call	cudaPeekAtLastError@PLT
	movl	%eax, %r12d
	call	cudaGetLastError@PLT
	testl	%r12d, %r12d
	jne	.L1110
	testl	%eax, %eax
	jne	.L1061
.L1110:
	movl	%r12d, %eax
	testl	%r12d, %r12d
	jne	.L1061
	call	cudaGetLastError@PLT
	testl	%eax, %eax
	jne	.L1061
	movabsq	$4294967297, %rax
	xorl	%r12d, %r12d
	movabsq	$1099511627777, %rdx
	movq	%r13, 240(%rsp)
	movq	%rax, 208(%rsp)
	leaq	432(%rsp), %rcx
	leaq	208(%rsp), %rdi
	movq	%rdx, 216(%rsp)
	movq	%rax, 224(%rsp)
	movq	%r12, 232(%rsp)
	jmp	.L1266
.L1026:
	cmpl	$2560, %ebx
	ja	.L1044
	testq	%r12, %r12
	je	.L1045
	movabsq	$4294967297, %rax
	xorl	%r11d, %r11d
	movabsq	$1099511627777, %rsi
	movq	%r13, 400(%rsp)
	movq	%rax, 368(%rsp)
	leaq	432(%rsp), %rcx
	leaq	424(%rsp), %rdx
	movq	%rsi, 376(%rsp)
	leaq	368(%rsp), %rdi
	movq	%rax, 384(%rsp)
	movq	%r11, 392(%rsp)
	jmp	.L1261
.L1044:
	leaq	88(%rsp), %rdi
	call	cudaGetDevice@PLT
	movl	%eax, %r15d
	call	cudaGetLastError@PLT
	testl	%r15d, %r15d
	jne	.L1113
	testl	%eax, %eax
	jne	.L1061
.L1113:
	movl	%r15d, %eax
	testl	%r15d, %r15d
	jne	.L1061
	movl	88(%rsp), %edx
	leaq	128(%rsp), %rdi
	movl	$16, %esi
	call	cudaDeviceGetAttribute@PLT
	movl	%eax, %r15d
	call	cudaGetLastError@PLT
	testl	%r15d, %r15d
	jne	.L1114
	testl	%eax, %eax
	jne	.L1061
.L1114:
	movl	%r15d, %eax
	testl	%r15d, %r15d
	jne	.L1061
	movl	$167772161, %eax
	leaq	260(%rsp), %rdi
	xorl	%ecx, %ecx
	movl	$256, %edx
	salq	$8, %rax
	leaq	_ZN3cub17CUB_200700_890_NS18DeviceReduceKernelINS0_18DeviceReducePolicyIdjN6thrust20THRUST_200700_890_NS4plusIdEEE9Policy600ENS4_17counting_iteratorIjNS4_11use_defaultESA_SA_EEjS6_d11estimate_esEEvT0_PT3_T1_NS0_13GridEvenShareISG_EET2_T4_(%rip), %rsi
	movq	$2560, 256(%rsp)
	movq	%rax, 248(%rsp)
	call	_ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvN6thrust20THRUST_200700_890_NS17counting_iteratorIjNS3_11use_defaultES5_S5_EEPdjNS0_13GridEvenShareIjEENS3_4plusIdEE11estimate_esEEE9cudaErrorRiT_ii
	movl	%eax, %r15d
	call	cudaGetLastError@PLT
	testl	%r15d, %r15d
	jne	.L1100
	testl	%eax, %eax
	jne	.L1061
	testl	%r15d, %r15d
	jne	.L1100
	movl	256(%rsp), %esi
	movl	%ebx, %eax
	xorl	%edx, %edx
	xorl	%r10d, %r10d
	movl	260(%rsp), %ecx
	imull	128(%rsp), %ecx
	movl	%ebx, 396(%rsp)
	divl	%esi
	movl	%ebx, 400(%rsp)
	movl	%ebx, 388(%rsp)
	movl	%r10d, 404(%rsp)
	leal	(%rcx,%rcx,4), %ecx
	cmpl	$1, %edx
	sbbl	$-1, %eax
	cmpl	%eax, %ecx
	movl	%eax, %ebx
	movl	%eax, 368(%rsp)
	cmovle	%ecx, %ebx
	cltd
	movslq	%ecx, %rcx
	idivl	%ebx
	movl	%ebx, 392(%rsp)
	imull	%esi, %eax
	movl	%edx, 372(%rsp)
	imull	%esi, %edx
	movl	%eax, 380(%rsp)
	addl	%esi, %eax
	movl	%eax, 376(%rsp)
	leaq	255(,%rcx,8), %rax
	movl	%edx, 384(%rsp)
	orb	$-1, %al
	testq	%r12, %r12
	jne	.L1051
	movq	%rax, (%r14)
	xorl	%r14d, %r14d
	jmp	.L1052
.L1051:
	cmpq	%rax, (%r14)
	jnb	.L1053
	call	cudaGetLastError@PLT
	xorl	%r14d, %r14d
	movl	$1, %r15d
	jmp	.L1052
.L1053:
	leaq	255(%r12), %r14
	xorb	%r14b, %r14b
.L1052:
	call	cudaGetLastError@PLT
	testl	$1, %r15d
	jne	.L1116
	testl	%eax, %eax
	jne	.L1061
.L1116:
	testl	%r15d, %r15d
	jne	.L1100
	testq	%r12, %r12
	je	.L1030
	movabsq	$1099511627777, %rax
	xorl	%r9d, %r9d
	movl	%ebx, 168(%rsp)
	leaq	424(%rsp), %rdx
	movl	%ebx, 288(%rsp)
	leaq	208(%rsp), %rbx
	leaq	288(%rsp), %rdi
	movq	%rax, 296(%rsp)
	leaq	440(%rsp), %r8
	movq	%rbx, %rcx
	movabsq	$4294967297, %rax
	movq	%r9, 312(%rsp)
	leaq	_ZN3cub17CUB_200700_890_NS18DeviceReduceKernelINS0_18DeviceReducePolicyIdjN6thrust20THRUST_200700_890_NS4plusIdEEE9Policy600ENS4_17counting_iteratorIjNS4_11use_defaultESA_SA_EEjS6_d11estimate_esEEvT0_PT3_T1_NS0_13GridEvenShareISG_EET2_T4_(%rip), %rsi
	leaq	368(%rsp), %r9
	movq	%r14, 208(%rsp)
	movl	$1, 292(%rsp)
	movq	%rax, 304(%rsp)
	movq	%r13, 320(%rsp)
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvNS0_17counting_iteratorIjNS0_11use_defaultES6_S6_EEPdjN3cub17CUB_200700_890_NS13GridEvenShareIjEENS0_4plusIdEE11estimate_esEJS7_S8_jSC_SE_SF_EEE9cudaErrorT_DpRKT0_.isra.0
	call	cudaPeekAtLastError@PLT
	movl	%eax, %r12d
	call	cudaGetLastError@PLT
	testl	%r12d, %r12d
	jne	.L1117
	testl	%eax, %eax
	jne	.L1061
.L1117:
	movl	%r12d, %eax
	testl	%r12d, %r12d
	jne	.L1061
	call	cudaGetLastError@PLT
	testl	%eax, %eax
	jne	.L1061
	movabsq	$4294967297, %rax
	xorl	%r8d, %r8d
	movabsq	$1099511627777, %rdx
	movq	%r13, 360(%rsp)
	movq	%rax, 328(%rsp)
	leaq	432(%rsp), %rcx
	leaq	328(%rsp), %rdi
	movq	%rdx, 336(%rsp)
	movq	%rax, 344(%rsp)
	movq	%r8, 352(%rsp)
.L1266:
	leaq	448(%rsp), %r9
	leaq	168(%rsp), %r8
	jmp	.L1264
.L1025:
	cmpl	$2048, %ebx
	ja	.L1059
	testq	%r12, %r12
	je	.L1045
	movq	%r13, 80(%rsp)
	xorl	%edi, %edi
	leaq	424(%rsp), %rdx
	movabsq	$4294967297, %rax
	movabsq	$1099511627777, %rcx
	movq	%rax, 48(%rsp)
	movq	%rax, 64(%rsp)
	movq	%rcx, 56(%rsp)
	leaq	432(%rsp), %rcx
	movq	%rdi, 72(%rsp)
	leaq	48(%rsp), %rdi
.L1261:
	leaq	448(%rsp), %r9
	leaq	440(%rsp), %r8
	leaq	_ZN3cub17CUB_200700_890_NS28DeviceReduceSingleTileKernelINS0_18DeviceReducePolicyIdjN6thrust20THRUST_200700_890_NS4plusIdEEE9Policy600ENS4_17counting_iteratorIjNS4_11use_defaultESA_SA_EEPdjS6_dd11estimate_esEEvT0_T1_T2_T3_T4_T6_(%rip), %rsi
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvNS0_17counting_iteratorIjNS0_11use_defaultES6_S6_EEPdjNS0_4plusIdEEd11estimate_esEJS7_S8_jSA_dSB_EEE9cudaErrorT_DpRKT0_.isra.0
	call	cudaPeekAtLastError@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, %ebp
	testl	%ebx, %ebx
	jne	.L1119
	testl	%eax, %eax
	jne	.L1030
.L1119:
	movl	%ebx, %ebp
	testl	%ebx, %ebx
	jne	.L1030
	call	cudaGetLastError@PLT
	jmp	.L1061
.L1059:
	leaq	168(%rsp), %rdi
	call	cudaGetDevice@PLT
	movl	%eax, %r15d
	call	cudaGetLastError@PLT
	testl	%r15d, %r15d
	jne	.L1120
	testl	%eax, %eax
	jne	.L1061
.L1120:
	movl	%r15d, %eax
	testl	%r15d, %r15d
	jne	.L1061
	movl	168(%rsp), %edx
	leaq	208(%rsp), %rdi
	movl	$16, %esi
	call	cudaDeviceGetAttribute@PLT
	movl	%eax, %r15d
	call	cudaGetLastError@PLT
	testl	%r15d, %r15d
	jne	.L1121
	testl	%eax, %eax
	jne	.L1061
.L1121:
	movl	%r15d, %eax
	testl	%r15d, %r15d
	jne	.L1061
	movl	$134217729, %eax
	leaq	340(%rsp), %rdi
	xorl	%ecx, %ecx
	movl	$256, %edx
	salq	$8, %rax
	leaq	_ZN3cub17CUB_200700_890_NS18DeviceReduceKernelINS0_18DeviceReducePolicyIdjN6thrust20THRUST_200700_890_NS4plusIdEEE9Policy600ENS4_17counting_iteratorIjNS4_11use_defaultESA_SA_EEjS6_d11estimate_esEEvT0_PT3_T1_NS0_13GridEvenShareISG_EET2_T4_(%rip), %rsi
	movq	$2048, 336(%rsp)
	movq	%rax, 328(%rsp)
	call	_ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvN6thrust20THRUST_200700_890_NS17counting_iteratorIjNS3_11use_defaultES5_S5_EEPdjNS0_13GridEvenShareIjEENS3_4plusIdEE11estimate_esEEE9cudaErrorRiT_ii
	movl	%eax, %r15d
	call	cudaGetLastError@PLT
	testl	%r15d, %r15d
	jne	.L1100
	testl	%eax, %eax
	jne	.L1061
	testl	%r15d, %r15d
	jne	.L1100
	xorl	%esi, %esi
	movl	%ebx, %eax
	xorl	%edx, %edx
	movl	340(%rsp), %ecx
	movl	%esi, 404(%rsp)
	movl	336(%rsp), %esi
	imull	208(%rsp), %ecx
	movl	%ebx, 396(%rsp)
	divl	%esi
	movl	%ebx, 400(%rsp)
	movl	%ebx, 388(%rsp)
	leal	(%rcx,%rcx,4), %ecx
	cmpl	$1, %edx
	sbbl	$-1, %eax
	cmpl	%eax, %ecx
	movl	%eax, %ebx
	movl	%eax, 368(%rsp)
	cmovle	%ecx, %ebx
	cltd
	movslq	%ecx, %rcx
	idivl	%ebx
	movl	%ebx, 392(%rsp)
	imull	%esi, %eax
	movl	%edx, 372(%rsp)
	imull	%esi, %edx
	movl	%eax, 380(%rsp)
	addl	%esi, %eax
	movl	%eax, 376(%rsp)
	leaq	255(,%rcx,8), %rax
	movl	%edx, 384(%rsp)
	orb	$-1, %al
	testq	%r12, %r12
	jne	.L1065
	movq	%rax, (%r14)
	xorl	%r14d, %r14d
	jmp	.L1066
.L1065:
	cmpq	%rax, (%r14)
	jnb	.L1067
	call	cudaGetLastError@PLT
	xorl	%r14d, %r14d
	movl	$1, %r15d
	jmp	.L1066
.L1067:
	leaq	255(%r12), %r14
	xorb	%r14b, %r14b
.L1066:
	call	cudaGetLastError@PLT
	testl	$1, %r15d
	jne	.L1123
	testl	%eax, %eax
	jne	.L1061
.L1123:
	testl	%r15d, %r15d
	jne	.L1100
	testq	%r12, %r12
	je	.L1030
	xorl	%edx, %edx
	movl	%ebx, 248(%rsp)
	movabsq	$1099511627777, %rax
	leaq	128(%rsp), %rdi
	movl	%ebx, 128(%rsp)
	leaq	288(%rsp), %rbx
	leaq	368(%rsp), %r9
	movq	%rax, 136(%rsp)
	leaq	440(%rsp), %r8
	movq	%rbx, %rcx
	movabsq	$4294967297, %rax
	movq	%rdx, 152(%rsp)
	leaq	_ZN3cub17CUB_200700_890_NS18DeviceReduceKernelINS0_18DeviceReducePolicyIdjN6thrust20THRUST_200700_890_NS4plusIdEEE9Policy600ENS4_17counting_iteratorIjNS4_11use_defaultESA_SA_EEjS6_d11estimate_esEEvT0_PT3_T1_NS0_13GridEvenShareISG_EET2_T4_(%rip), %rsi
	leaq	424(%rsp), %rdx
	movq	%r14, 288(%rsp)
	movl	$1, 132(%rsp)
	movq	%rax, 144(%rsp)
	movq	%r13, 160(%rsp)
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvNS0_17counting_iteratorIjNS0_11use_defaultES6_S6_EEPdjN3cub17CUB_200700_890_NS13GridEvenShareIjEENS0_4plusIdEE11estimate_esEJS7_S8_jSC_SE_SF_EEE9cudaErrorT_DpRKT0_.isra.0
	call	cudaPeekAtLastError@PLT
	movl	%eax, %r12d
	call	cudaGetLastError@PLT
	testl	%r12d, %r12d
	jne	.L1124
	testl	%eax, %eax
	jne	.L1061
.L1124:
	movl	%r12d, %eax
	testl	%r12d, %r12d
	jne	.L1061
	call	cudaGetLastError@PLT
	testl	%eax, %eax
	jne	.L1061
	movabsq	$4294967297, %rax
	movq	%r13, 120(%rsp)
	movabsq	$1099511627777, %rsi
	leaq	432(%rsp), %rcx
	movq	%rax, 88(%rsp)
	leaq	88(%rsp), %rdi
	leaq	448(%rsp), %r9
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	248(%rsp), %r8
	movq	%rsi, 96(%rsp)
	movq	%rax, 112(%rsp)
.L1264:
	movq	%rbx, %rdx
	leaq	_ZN3cub17CUB_200700_890_NS28DeviceReduceSingleTileKernelINS0_18DeviceReducePolicyIdjN6thrust20THRUST_200700_890_NS4plusIdEEE9Policy600EPdS9_iS6_ddN4cuda3std3__410__identityEEEvT0_T1_T2_T3_T4_T6_(%rip), %rsi
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPdS5_iNS0_4plusIdEEdN4cuda3std3__410__identityEEJS5_S5_iS7_dSB_EEE9cudaErrorT_DpRKT0_.isra.0
	call	cudaPeekAtLastError@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	testl	%ebx, %ebx
	jne	.L1125
	testl	%eax, %eax
	jne	.L1061
.L1125:
	movl	%ebx, %eax
	testl	%ebx, %ebx
	jne	.L1061
	call	cudaGetLastError@PLT
	testl	%eax, %eax
	je	.L1030
	jmp	.L1061
.L1100:
	movl	%r15d, %eax
.L1061:
	movl	%eax, %ebp
.L1030:
	call	cudaGetLastError@PLT
.LEHE18:
	testl	%ebp, %ebp
	jne	.L1078
	testl	%eax, %eax
	jne	.L1023
	testl	%ebp, %ebp
	je	.L1074
.L1078:
	movl	%ebp, %eax
.L1023:
	movl	%eax, %ebp
.L1074:
	movq	8(%rsp), %rdi
	call	_ZN4cuda3std3__424__optional_destruct_baseIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEELb0EED2Ev
	movq	472(%rsp), %rax
	subq	%fs:40, %rax
	je	.L1077
	jmp	.L1227
.L1103:
	endbr64
	movq	%rax, %rbx
.L1075:
	movq	8(%rsp), %rdi
	call	_ZN4cuda3std3__424__optional_destruct_baseIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEELb0EED2Ev
	movq	472(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L1227
	movq	%rbx, %rdi
.LEHB19:
	call	_Unwind_Resume@PLT
.LEHE19:
.L1227:
	call	__stack_chk_fail@PLT
.L1077:
	addq	$488, %rsp
	.cfi_def_cfa_offset 56
	movl	%ebp, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE12404:
	.section	.gcc_except_table
.LLSDA12404:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE12404-.LLSDACSB12404
.LLSDACSB12404:
	.uleb128 .LEHB18-.LFB12404
	.uleb128 .LEHE18-.LEHB18
	.uleb128 .L1103-.LFB12404
	.uleb128 0
	.uleb128 .LEHB19-.LFB12404
	.uleb128 .LEHE19-.LEHB19
	.uleb128 0
	.uleb128 0
.LLSDACSE12404:
	.text
	.size	_ZN3cub17CUB_200700_890_NS12DeviceReduce15TransformReduceIN6thrust20THRUST_200700_890_NS17counting_iteratorIjNS4_11use_defaultES6_S6_EEPdNS4_4plusIdEE11estimate_esdiEE9cudaErrorPvRmT_T0_T4_T1_T2_T3_P11CUstream_st.isra.0, .-_ZN3cub17CUB_200700_890_NS12DeviceReduce15TransformReduceIN6thrust20THRUST_200700_890_NS17counting_iteratorIjNS4_11use_defaultES6_S6_EEPdNS4_4plusIdEE11estimate_esdiEE9cudaErrorPvRmT_T0_T4_T1_T2_T3_P11CUstream_st.isra.0
	.section	.text._ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvN6thrust20THRUST_200700_890_NS17counting_iteratorIjNS3_11use_defaultES5_S5_EEPdyNS0_13GridEvenShareIyEENS3_4plusIdEE11estimate_esEEE9cudaErrorRiT_ii,"axG",@progbits,_ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvN6thrust20THRUST_200700_890_NS17counting_iteratorIjNS3_11use_defaultES5_S5_EEPdyNS0_13GridEvenShareIyEENS3_4plusIdEE11estimate_esEEE9cudaErrorRiT_ii,comdat
	.weak	_ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvN6thrust20THRUST_200700_890_NS17counting_iteratorIjNS3_11use_defaultES5_S5_EEPdyNS0_13GridEvenShareIyEENS3_4plusIdEE11estimate_esEEE9cudaErrorRiT_ii
	.hidden	_ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvN6thrust20THRUST_200700_890_NS17counting_iteratorIjNS3_11use_defaultES5_S5_EEPdyNS0_13GridEvenShareIyEENS3_4plusIdEE11estimate_esEEE9cudaErrorRiT_ii
	.type	_ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvN6thrust20THRUST_200700_890_NS17counting_iteratorIjNS3_11use_defaultES5_S5_EEPdyNS0_13GridEvenShareIyEENS3_4plusIdEE11estimate_esEEE9cudaErrorRiT_ii, @function
_ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvN6thrust20THRUST_200700_890_NS17counting_iteratorIjNS3_11use_defaultES5_S5_EEPdyNS0_13GridEvenShareIyEENS3_4plusIdEE11estimate_esEEE9cudaErrorRiT_ii:
.LFB12297:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	xorl	%r8d, %r8d
	movslq	%ecx, %rcx
	call	cudaOccupancyMaxActiveBlocksPerMultiprocessorWithFlags@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	testl	%ebx, %ebx
	jne	.L1270
	testl	%eax, %eax
	jne	.L1267
.L1270:
	movl	%ebx, %eax
.L1267:
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE12297:
	.size	_ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvN6thrust20THRUST_200700_890_NS17counting_iteratorIjNS3_11use_defaultES5_S5_EEPdyNS0_13GridEvenShareIyEENS3_4plusIdEE11estimate_esEEE9cudaErrorRiT_ii, .-_ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvN6thrust20THRUST_200700_890_NS17counting_iteratorIjNS3_11use_defaultES5_S5_EEPdyNS0_13GridEvenShareIyEENS3_4plusIdEE11estimate_esEEE9cudaErrorRiT_ii
	.text
	.type	_ZN3cub17CUB_200700_890_NS12DeviceReduce15TransformReduceIN6thrust20THRUST_200700_890_NS17counting_iteratorIjNS4_11use_defaultES6_S6_EEPdNS4_4plusIdEE11estimate_esdlEE9cudaErrorPvRmT_T0_T4_T1_T2_T3_P11CUstream_st.isra.0, @function
_ZN3cub17CUB_200700_890_NS12DeviceReduce15TransformReduceIN6thrust20THRUST_200700_890_NS17counting_iteratorIjNS4_11use_defaultES6_S6_EEPdNS4_4plusIdEE11estimate_esdlEE9cudaErrorPvRmT_T0_T4_T1_T2_T3_P11CUstream_st.isra.0:
.LFB12405:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA12405
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	%edx, %r15d
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rsi, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%r9, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rdi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%r8, %rbx
	subq	$520, %rsp
	.cfi_def_cfa_offset 576
	movq	%rcx, 16(%rsp)
	movsd	%xmm0, 24(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 504(%rsp)
	xorl	%eax, %eax
	movw	$0, 34(%rsp)
	movb	_ZGVZN3cub17CUB_200700_890_NS12DeviceReduce15TransformReduceIN6thrust20THRUST_200700_890_NS17counting_iteratorIjNS4_11use_defaultES6_S6_EEPdNS4_4plusIdEE11estimate_esdlEE9cudaErrorPvRmT_T0_T4_T1_T2_T3_P11CUstream_stE21__cub_nvtx3_func_name(%rip), %al
	testb	%al, %al
	jne	.L1277
	leaq	_ZGVZN3cub17CUB_200700_890_NS12DeviceReduce15TransformReduceIN6thrust20THRUST_200700_890_NS17counting_iteratorIjNS4_11use_defaultES6_S6_EEPdNS4_4plusIdEE11estimate_esdlEE9cudaErrorPvRmT_T0_T4_T1_T2_T3_P11CUstream_stE21__cub_nvtx3_func_name(%rip), %rbp
	movq	%rbp, %rdi
	call	__cxa_guard_acquire@PLT
	testl	%eax, %eax
	je	.L1277
	leaq	_ZZN3cub17CUB_200700_890_NS12DeviceReduce15TransformReduceIN6thrust20THRUST_200700_890_NS17counting_iteratorIjNS4_11use_defaultES6_S6_EEPdNS4_4plusIdEE11estimate_esdlEE9cudaErrorPvRmT_T0_T4_T1_T2_T3_P11CUstream_stE21__cub_nvtx3_func_name(%rip), %rdi
	leaq	.LC67(%rip), %rsi
	call	_ZN5nvtx32v120registered_string_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEC1EPKc
	movq	%rbp, %rdi
	call	__cxa_guard_release@PLT
.L1277:
	movb	_ZGVZN3cub17CUB_200700_890_NS12DeviceReduce15TransformReduceIN6thrust20THRUST_200700_890_NS17counting_iteratorIjNS4_11use_defaultES6_S6_EEPdNS4_4plusIdEE11estimate_esdlEE9cudaErrorPvRmT_T0_T4_T1_T2_T3_P11CUstream_stE21__cub_nvtx3_func_attr(%rip), %al
	testb	%al, %al
	jne	.L1280
	leaq	_ZGVZN3cub17CUB_200700_890_NS12DeviceReduce15TransformReduceIN6thrust20THRUST_200700_890_NS17counting_iteratorIjNS4_11use_defaultES6_S6_EEPdNS4_4plusIdEE11estimate_esdlEE9cudaErrorPvRmT_T0_T4_T1_T2_T3_P11CUstream_stE21__cub_nvtx3_func_attr(%rip), %rbp
	movq	%rbp, %rdi
	call	__cxa_guard_acquire@PLT
	testl	%eax, %eax
	je	.L1280
	movq	_ZZN3cub17CUB_200700_890_NS12DeviceReduce15TransformReduceIN6thrust20THRUST_200700_890_NS17counting_iteratorIjNS4_11use_defaultES6_S6_EEPdNS4_4plusIdEE11estimate_esdlEE9cudaErrorPvRmT_T0_T4_T1_T2_T3_P11CUstream_stE21__cub_nvtx3_func_name(%rip), %rax
	leaq	_ZZN3cub17CUB_200700_890_NS12DeviceReduce15TransformReduceIN6thrust20THRUST_200700_890_NS17counting_iteratorIjNS4_11use_defaultES6_S6_EEPdNS4_4plusIdEE11estimate_esdlEE9cudaErrorPvRmT_T0_T4_T1_T2_T3_P11CUstream_stE21__cub_nvtx3_func_attr(%rip), %rdi
	leaq	432(%rsp), %rsi
	movl	$3, 432(%rsp)
	movq	%rax, 440(%rsp)
	call	_ZN5nvtx32v116event_attributesC1IJEEERKNS0_7messageEDpRKT_
	movq	%rbp, %rdi
	call	__cxa_guard_release@PLT
.L1280:
	leaq	34(%rsp), %rax
	testq	%r12, %r12
	movq	%rax, 8(%rsp)
	je	.L1282
	leaq	_ZZN3cub17CUB_200700_890_NS12DeviceReduce15TransformReduceIN6thrust20THRUST_200700_890_NS17counting_iteratorIjNS4_11use_defaultES6_S6_EEPdNS4_4plusIdEE11estimate_esdlEE9cudaErrorPvRmT_T0_T4_T1_T2_T3_P11CUstream_stE21__cub_nvtx3_func_attr(%rip), %rsi
	movq	%rax, %rdi
	call	_ZN4cuda3std3__48optionalIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEEE7emplaceIJRKNS4_16event_attributesEELi0EEERSA_DpOT_.isra.0
.L1282:
	xorl	%eax, %eax
	leaq	36(%rsp), %rdi
	movl	%eax, 36(%rsp)
.LEHB20:
	call	_ZN3cub17CUB_200700_890_NS10PtxVersionERi
	movl	%eax, %ebp
	call	cudaGetLastError@PLT
	testl	%ebp, %ebp
	jne	.L1338
	testl	%eax, %eax
	jne	.L1283
	testl	%ebp, %ebp
	jne	.L1338
	movl	36(%rsp), %eax
	movq	16(%rsp), %rdx
	movq	%r12, 360(%rsp)
	movsd	24(%rsp), %xmm1
	movq	%r14, 368(%rsp)
	movl	%r15d, 376(%rsp)
	movq	%rdx, 384(%rsp)
	movq	%rbx, 392(%rsp)
	movq	%r13, 416(%rsp)
	movl	%eax, 424(%rsp)
	movsd	%xmm1, 408(%rsp)
	cmpl	$599, %eax
	jg	.L1285
	cmpl	$349, %eax
	jg	.L1286
	cmpq	$2560, %rbx
	ja	.L1287
	testq	%r12, %r12
	jne	.L1288
.L1305:
	movq	$1, (%r14)
	jmp	.L1290
.L1288:
	movq	%r13, 192(%rsp)
	leaq	384(%rsp), %rcx
	movabsq	$4294967297, %rax
	movabsq	$1099511627777, %rdx
	movq	%rax, 160(%rsp)
	leaq	160(%rsp), %rdi
	movq	%rax, 176(%rsp)
	xorl	%eax, %eax
	movq	%rdx, 168(%rsp)
	leaq	376(%rsp), %rdx
	movq	%rax, 184(%rsp)
	jmp	.L1521
.L1287:
	leaq	80(%rsp), %rdi
	call	cudaGetDevice@PLT
	movl	%eax, %r15d
	call	cudaGetLastError@PLT
	testl	%r15d, %r15d
	jne	.L1366
	testl	%eax, %eax
	jne	.L1321
.L1366:
	movl	%r15d, %eax
	testl	%r15d, %r15d
	jne	.L1321
	movl	80(%rsp), %edx
	leaq	120(%rsp), %rdi
	movl	$16, %esi
	call	cudaDeviceGetAttribute@PLT
	movl	%eax, %r15d
	call	cudaGetLastError@PLT
	testl	%r15d, %r15d
	jne	.L1367
	testl	%eax, %eax
	jne	.L1321
.L1367:
	movl	%r15d, %eax
	testl	%r15d, %r15d
	jne	.L1321
	movl	$167772161, %eax
	leaq	332(%rsp), %rdi
	xorl	%ecx, %ecx
	movl	$256, %edx
	salq	$8, %rax
	leaq	_ZN3cub17CUB_200700_890_NS18DeviceReduceKernelINS0_18DeviceReducePolicyIdyN6thrust20THRUST_200700_890_NS4plusIdEEE9Policy600ENS4_17counting_iteratorIjNS4_11use_defaultESA_SA_EEyS6_d11estimate_esEEvT0_PT3_T1_NS0_13GridEvenShareISG_EET2_T4_(%rip), %rsi
	movq	$2560, 328(%rsp)
	movq	%rax, 320(%rsp)
	call	_ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvN6thrust20THRUST_200700_890_NS17counting_iteratorIjNS3_11use_defaultES5_S5_EEPdyNS0_13GridEvenShareIyEENS3_4plusIdEE11estimate_esEEE9cudaErrorRiT_ii
	movl	%eax, %r15d
	call	cudaGetLastError@PLT
	testl	%r15d, %r15d
	jne	.L1360
	testl	%eax, %eax
	jne	.L1321
	testl	%r15d, %r15d
	jne	.L1360
	movslq	328(%rsp), %rdi
	xorl	%eax, %eax
	xorl	%edx, %edx
	movl	332(%rsp), %ecx
	movq	%rax, 496(%rsp)
	movq	%rbx, %rax
	imull	120(%rsp), %ecx
	divq	%rdi
	movq	%rbx, 480(%rsp)
	movq	%rbx, 488(%rsp)
	movq	%rbx, 464(%rsp)
	leal	(%rcx,%rcx,4), %ecx
	movq	%rdi, %rsi
	cmpq	$1, %rdx
	sbbq	$-1, %rax
	cmpl	%eax, %ecx
	movl	%eax, %ebx
	movl	%eax, 432(%rsp)
	cmovle	%ecx, %ebx
	cltd
	movslq	%ecx, %rcx
	idivl	%ebx
	movl	%ebx, 472(%rsp)
	imull	%edi, %eax
	movl	%edx, 436(%rsp)
	imull	%edx, %esi
	cltq
	addq	%rax, %rdi
	movq	%rax, 448(%rsp)
	movslq	%esi, %rsi
	leaq	255(,%rcx,8), %rax
	movq	%rsi, 456(%rsp)
	orb	$-1, %al
	movq	%rdi, 440(%rsp)
	testq	%r12, %r12
	jne	.L1296
	movq	%rax, (%r14)
	xorl	%r14d, %r14d
	jmp	.L1297
.L1296:
	cmpq	%rax, (%r14)
	jnb	.L1298
	call	cudaGetLastError@PLT
	xorl	%r14d, %r14d
	movl	$1, %r15d
	jmp	.L1297
.L1298:
	leaq	255(%r12), %r14
	xorb	%r14b, %r14b
.L1297:
	call	cudaGetLastError@PLT
	testl	$1, %r15d
	jne	.L1369
	testl	%eax, %eax
	jne	.L1321
.L1369:
	testl	%r15d, %r15d
	jne	.L1360
	testq	%r12, %r12
	je	.L1290
	movl	%ebx, 160(%rsp)
	leaq	376(%rsp), %rdx
	movabsq	$1099511627777, %rax
	leaq	240(%rsp), %rdi
	movl	%ebx, 240(%rsp)
	leaq	280(%rsp), %rbx
	leaq	432(%rsp), %r9
	movq	%r14, 280(%rsp)
	movq	%rbx, %rcx
	xorl	%r14d, %r14d
	leaq	_ZN3cub17CUB_200700_890_NS18DeviceReduceKernelINS0_18DeviceReducePolicyIdyN6thrust20THRUST_200700_890_NS4plusIdEEE9Policy600ENS4_17counting_iteratorIjNS4_11use_defaultESA_SA_EEyS6_d11estimate_esEEvT0_PT3_T1_NS0_13GridEvenShareISG_EET2_T4_(%rip), %rsi
	movq	%rax, 248(%rsp)
	leaq	392(%rsp), %r8
	movabsq	$4294967297, %rax
	movl	$1, 244(%rsp)
	movq	%rax, 256(%rsp)
	movq	%r14, 264(%rsp)
	movq	%r13, 272(%rsp)
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvNS0_17counting_iteratorIjNS0_11use_defaultES6_S6_EEPdyN3cub17CUB_200700_890_NS13GridEvenShareIyEENS0_4plusIdEE11estimate_esEJS7_S8_ySC_SE_SF_EEE9cudaErrorT_DpRKT0_.isra.0
	call	cudaPeekAtLastError@PLT
	movl	%eax, %r12d
	call	cudaGetLastError@PLT
	testl	%r12d, %r12d
	jne	.L1370
	testl	%eax, %eax
	jne	.L1321
.L1370:
	movl	%r12d, %eax
	testl	%r12d, %r12d
	jne	.L1321
	call	cudaGetLastError@PLT
	testl	%eax, %eax
	jne	.L1321
	movabsq	$4294967297, %rax
	xorl	%r12d, %r12d
	movabsq	$1099511627777, %rdx
	movq	%r13, 232(%rsp)
	movq	%rax, 200(%rsp)
	leaq	384(%rsp), %rcx
	leaq	200(%rsp), %rdi
	movq	%rdx, 208(%rsp)
	movq	%rax, 216(%rsp)
	movq	%r12, 224(%rsp)
	jmp	.L1526
.L1286:
	cmpq	$2560, %rbx
	ja	.L1304
	testq	%r12, %r12
	je	.L1305
	movabsq	$4294967297, %rax
	xorl	%r11d, %r11d
	movabsq	$1099511627777, %rdx
	movq	%r13, 464(%rsp)
	movq	%rdx, 440(%rsp)
	leaq	384(%rsp), %rcx
	leaq	376(%rsp), %rdx
	movq	%rax, 432(%rsp)
	leaq	432(%rsp), %rdi
	movq	%rax, 448(%rsp)
	movq	%r11, 456(%rsp)
	jmp	.L1521
.L1304:
	leaq	80(%rsp), %rdi
	call	cudaGetDevice@PLT
	movl	%eax, %r15d
	call	cudaGetLastError@PLT
	testl	%r15d, %r15d
	jne	.L1373
	testl	%eax, %eax
	jne	.L1321
.L1373:
	movl	%r15d, %eax
	testl	%r15d, %r15d
	jne	.L1321
	movl	80(%rsp), %edx
	leaq	120(%rsp), %rdi
	movl	$16, %esi
	call	cudaDeviceGetAttribute@PLT
	movl	%eax, %r15d
	call	cudaGetLastError@PLT
	testl	%r15d, %r15d
	jne	.L1374
	testl	%eax, %eax
	jne	.L1321
.L1374:
	movl	%r15d, %eax
	testl	%r15d, %r15d
	jne	.L1321
	movl	$167772161, %eax
	leaq	252(%rsp), %rdi
	xorl	%ecx, %ecx
	movl	$256, %edx
	salq	$8, %rax
	leaq	_ZN3cub17CUB_200700_890_NS18DeviceReduceKernelINS0_18DeviceReducePolicyIdyN6thrust20THRUST_200700_890_NS4plusIdEEE9Policy600ENS4_17counting_iteratorIjNS4_11use_defaultESA_SA_EEyS6_d11estimate_esEEvT0_PT3_T1_NS0_13GridEvenShareISG_EET2_T4_(%rip), %rsi
	movq	$2560, 248(%rsp)
	movq	%rax, 240(%rsp)
	call	_ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvN6thrust20THRUST_200700_890_NS17counting_iteratorIjNS3_11use_defaultES5_S5_EEPdyNS0_13GridEvenShareIyEENS3_4plusIdEE11estimate_esEEE9cudaErrorRiT_ii
	movl	%eax, %r15d
	call	cudaGetLastError@PLT
	testl	%r15d, %r15d
	jne	.L1360
	testl	%eax, %eax
	jne	.L1321
	testl	%r15d, %r15d
	jne	.L1360
	movslq	248(%rsp), %rdi
	movq	%rbx, %rax
	xorl	%edx, %edx
	xorl	%r10d, %r10d
	movl	252(%rsp), %ecx
	imull	120(%rsp), %ecx
	movq	%rbx, 480(%rsp)
	divq	%rdi
	movq	%rbx, 488(%rsp)
	movq	%rbx, 464(%rsp)
	movq	%r10, 496(%rsp)
	leal	(%rcx,%rcx,4), %ecx
	movq	%rdi, %rsi
	cmpq	$1, %rdx
	sbbq	$-1, %rax
	cmpl	%eax, %ecx
	movl	%eax, %ebx
	movl	%eax, 432(%rsp)
	cmovle	%ecx, %ebx
	cltd
	movslq	%ecx, %rcx
	idivl	%ebx
	movl	%ebx, 472(%rsp)
	imull	%edi, %eax
	movl	%edx, 436(%rsp)
	imull	%edx, %esi
	cltq
	addq	%rax, %rdi
	movq	%rax, 448(%rsp)
	movslq	%esi, %rsi
	leaq	255(,%rcx,8), %rax
	movq	%rsi, 456(%rsp)
	orb	$-1, %al
	movq	%rdi, 440(%rsp)
	testq	%r12, %r12
	jne	.L1311
	movq	%rax, (%r14)
	xorl	%r14d, %r14d
	jmp	.L1312
.L1311:
	cmpq	%rax, (%r14)
	jnb	.L1313
	call	cudaGetLastError@PLT
	xorl	%r14d, %r14d
	movl	$1, %r15d
	jmp	.L1312
.L1313:
	leaq	255(%r12), %r14
	xorb	%r14b, %r14b
.L1312:
	call	cudaGetLastError@PLT
	testl	$1, %r15d
	jne	.L1376
	testl	%eax, %eax
	jne	.L1321
.L1376:
	testl	%r15d, %r15d
	jne	.L1360
	testq	%r12, %r12
	je	.L1290
	movabsq	$1099511627777, %rax
	xorl	%r9d, %r9d
	movl	%ebx, 160(%rsp)
	leaq	376(%rsp), %rdx
	movl	%ebx, 280(%rsp)
	leaq	200(%rsp), %rbx
	leaq	280(%rsp), %rdi
	movq	%rax, 288(%rsp)
	leaq	392(%rsp), %r8
	movq	%rbx, %rcx
	movabsq	$4294967297, %rax
	movq	%r9, 304(%rsp)
	leaq	_ZN3cub17CUB_200700_890_NS18DeviceReduceKernelINS0_18DeviceReducePolicyIdyN6thrust20THRUST_200700_890_NS4plusIdEEE9Policy600ENS4_17counting_iteratorIjNS4_11use_defaultESA_SA_EEyS6_d11estimate_esEEvT0_PT3_T1_NS0_13GridEvenShareISG_EET2_T4_(%rip), %rsi
	leaq	432(%rsp), %r9
	movq	%r14, 200(%rsp)
	movl	$1, 284(%rsp)
	movq	%rax, 296(%rsp)
	movq	%r13, 312(%rsp)
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvNS0_17counting_iteratorIjNS0_11use_defaultES6_S6_EEPdyN3cub17CUB_200700_890_NS13GridEvenShareIyEENS0_4plusIdEE11estimate_esEJS7_S8_ySC_SE_SF_EEE9cudaErrorT_DpRKT0_.isra.0
	call	cudaPeekAtLastError@PLT
	movl	%eax, %r12d
	call	cudaGetLastError@PLT
	testl	%r12d, %r12d
	jne	.L1377
	testl	%eax, %eax
	jne	.L1321
.L1377:
	movl	%r12d, %eax
	testl	%r12d, %r12d
	jne	.L1321
	call	cudaGetLastError@PLT
	testl	%eax, %eax
	jne	.L1321
	movabsq	$4294967297, %rax
	xorl	%r8d, %r8d
	movabsq	$1099511627777, %rdx
	movq	%r13, 352(%rsp)
	movq	%rax, 320(%rsp)
	leaq	384(%rsp), %rcx
	leaq	320(%rsp), %rdi
	movq	%rdx, 328(%rsp)
	movq	%rax, 336(%rsp)
	movq	%r8, 344(%rsp)
.L1526:
	leaq	408(%rsp), %r9
	leaq	160(%rsp), %r8
	jmp	.L1524
.L1285:
	cmpq	$2048, %rbx
	ja	.L1319
	testq	%r12, %r12
	je	.L1305
	movq	%r13, 72(%rsp)
	xorl	%edi, %edi
	leaq	384(%rsp), %rcx
	movabsq	$4294967297, %rax
	movabsq	$1099511627777, %rdx
	movq	%rax, 40(%rsp)
	movq	%rax, 56(%rsp)
	movq	%rdx, 48(%rsp)
	leaq	376(%rsp), %rdx
	movq	%rdi, 64(%rsp)
	leaq	40(%rsp), %rdi
.L1521:
	leaq	408(%rsp), %r9
	leaq	392(%rsp), %r8
	leaq	_ZN3cub17CUB_200700_890_NS28DeviceReduceSingleTileKernelINS0_18DeviceReducePolicyIdyN6thrust20THRUST_200700_890_NS4plusIdEEE9Policy600ENS4_17counting_iteratorIjNS4_11use_defaultESA_SA_EEPdyS6_dd11estimate_esEEvT0_T1_T2_T3_T4_T6_(%rip), %rsi
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvNS0_17counting_iteratorIjNS0_11use_defaultES6_S6_EEPdyNS0_4plusIdEEd11estimate_esEJS7_S8_ySA_dSB_EEE9cudaErrorT_DpRKT0_.isra.0
	call	cudaPeekAtLastError@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, %ebp
	testl	%ebx, %ebx
	jne	.L1379
	testl	%eax, %eax
	jne	.L1290
.L1379:
	movl	%ebx, %ebp
	testl	%ebx, %ebx
	jne	.L1290
	call	cudaGetLastError@PLT
	jmp	.L1321
.L1319:
	leaq	160(%rsp), %rdi
	call	cudaGetDevice@PLT
	movl	%eax, %r15d
	call	cudaGetLastError@PLT
	testl	%r15d, %r15d
	jne	.L1380
	testl	%eax, %eax
	jne	.L1321
.L1380:
	movl	%r15d, %eax
	testl	%r15d, %r15d
	jne	.L1321
	movl	160(%rsp), %edx
	leaq	200(%rsp), %rdi
	movl	$16, %esi
	call	cudaDeviceGetAttribute@PLT
	movl	%eax, %r15d
	call	cudaGetLastError@PLT
	testl	%r15d, %r15d
	jne	.L1381
	testl	%eax, %eax
	jne	.L1321
.L1381:
	movl	%r15d, %eax
	testl	%r15d, %r15d
	jne	.L1321
	movl	$134217729, %eax
	leaq	332(%rsp), %rdi
	xorl	%ecx, %ecx
	movl	$256, %edx
	salq	$8, %rax
	leaq	_ZN3cub17CUB_200700_890_NS18DeviceReduceKernelINS0_18DeviceReducePolicyIdyN6thrust20THRUST_200700_890_NS4plusIdEEE9Policy600ENS4_17counting_iteratorIjNS4_11use_defaultESA_SA_EEyS6_d11estimate_esEEvT0_PT3_T1_NS0_13GridEvenShareISG_EET2_T4_(%rip), %rsi
	movq	$2048, 328(%rsp)
	movq	%rax, 320(%rsp)
	call	_ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvN6thrust20THRUST_200700_890_NS17counting_iteratorIjNS3_11use_defaultES5_S5_EEPdyNS0_13GridEvenShareIyEENS3_4plusIdEE11estimate_esEEE9cudaErrorRiT_ii
	movl	%eax, %r15d
	call	cudaGetLastError@PLT
	testl	%r15d, %r15d
	jne	.L1360
	testl	%eax, %eax
	jne	.L1321
	testl	%r15d, %r15d
	jne	.L1360
	movslq	328(%rsp), %rdi
	movq	%rbx, %rax
	xorl	%edx, %edx
	xorl	%esi, %esi
	movl	332(%rsp), %ecx
	imull	200(%rsp), %ecx
	movq	%rbx, 480(%rsp)
	divq	%rdi
	movq	%rbx, 488(%rsp)
	movq	%rbx, 464(%rsp)
	movq	%rsi, 496(%rsp)
	leal	(%rcx,%rcx,4), %ecx
	movq	%rdi, %rsi
	cmpq	$1, %rdx
	sbbq	$-1, %rax
	cmpl	%eax, %ecx
	movl	%eax, %ebx
	movl	%eax, 432(%rsp)
	cmovle	%ecx, %ebx
	cltd
	movslq	%ecx, %rcx
	idivl	%ebx
	movl	%ebx, 472(%rsp)
	imull	%edi, %eax
	movl	%edx, 436(%rsp)
	imull	%edx, %esi
	cltq
	addq	%rax, %rdi
	movq	%rax, 448(%rsp)
	movslq	%esi, %rsi
	leaq	255(,%rcx,8), %rax
	movq	%rsi, 456(%rsp)
	orb	$-1, %al
	movq	%rdi, 440(%rsp)
	testq	%r12, %r12
	jne	.L1325
	movq	%rax, (%r14)
	xorl	%r14d, %r14d
	jmp	.L1326
.L1325:
	cmpq	%rax, (%r14)
	jnb	.L1327
	call	cudaGetLastError@PLT
	xorl	%r14d, %r14d
	movl	$1, %r15d
	jmp	.L1326
.L1327:
	leaq	255(%r12), %r14
	xorb	%r14b, %r14b
.L1326:
	call	cudaGetLastError@PLT
	testl	$1, %r15d
	jne	.L1383
	testl	%eax, %eax
	jne	.L1321
.L1383:
	testl	%r15d, %r15d
	jne	.L1360
	testq	%r12, %r12
	je	.L1290
	movabsq	$1099511627777, %rax
	xorl	%edx, %edx
	movl	%ebx, 120(%rsp)
	leaq	120(%rsp), %rdi
	movl	%ebx, 240(%rsp)
	leaq	280(%rsp), %rbx
	leaq	432(%rsp), %r9
	movq	%rax, 128(%rsp)
	leaq	392(%rsp), %r8
	movq	%rbx, %rcx
	movabsq	$4294967297, %rax
	movq	%rdx, 144(%rsp)
	leaq	_ZN3cub17CUB_200700_890_NS18DeviceReduceKernelINS0_18DeviceReducePolicyIdyN6thrust20THRUST_200700_890_NS4plusIdEEE9Policy600ENS4_17counting_iteratorIjNS4_11use_defaultESA_SA_EEyS6_d11estimate_esEEvT0_PT3_T1_NS0_13GridEvenShareISG_EET2_T4_(%rip), %rsi
	leaq	376(%rsp), %rdx
	movq	%r14, 280(%rsp)
	movl	$1, 124(%rsp)
	movq	%rax, 136(%rsp)
	movq	%r13, 152(%rsp)
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvNS0_17counting_iteratorIjNS0_11use_defaultES6_S6_EEPdyN3cub17CUB_200700_890_NS13GridEvenShareIyEENS0_4plusIdEE11estimate_esEJS7_S8_ySC_SE_SF_EEE9cudaErrorT_DpRKT0_.isra.0
	call	cudaPeekAtLastError@PLT
	movl	%eax, %r12d
	call	cudaGetLastError@PLT
	testl	%r12d, %r12d
	jne	.L1384
	testl	%eax, %eax
	jne	.L1321
.L1384:
	movl	%r12d, %eax
	testl	%r12d, %r12d
	jne	.L1321
	call	cudaGetLastError@PLT
	testl	%eax, %eax
	jne	.L1321
	movabsq	$4294967297, %rax
	movq	%r13, 112(%rsp)
	movabsq	$1099511627777, %rdx
	leaq	384(%rsp), %rcx
	movq	%rax, 80(%rsp)
	leaq	80(%rsp), %rdi
	leaq	408(%rsp), %r9
	movq	%rax, 96(%rsp)
	xorl	%eax, %eax
	leaq	240(%rsp), %r8
	movq	%rdx, 88(%rsp)
	movq	%rax, 104(%rsp)
.L1524:
	movq	%rbx, %rdx
	leaq	_ZN3cub17CUB_200700_890_NS28DeviceReduceSingleTileKernelINS0_18DeviceReducePolicyIdyN6thrust20THRUST_200700_890_NS4plusIdEEE9Policy600EPdS9_iS6_ddN4cuda3std3__410__identityEEEvT0_T1_T2_T3_T4_T6_(%rip), %rsi
	call	_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPdS5_iNS0_4plusIdEEdN4cuda3std3__410__identityEEJS5_S5_iS7_dSB_EEE9cudaErrorT_DpRKT0_.isra.0
	call	cudaPeekAtLastError@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	testl	%ebx, %ebx
	jne	.L1385
	testl	%eax, %eax
	jne	.L1321
.L1385:
	movl	%ebx, %eax
	testl	%ebx, %ebx
	jne	.L1321
	call	cudaGetLastError@PLT
	testl	%eax, %eax
	je	.L1290
	jmp	.L1321
.L1360:
	movl	%r15d, %eax
.L1321:
	movl	%eax, %ebp
.L1290:
	call	cudaGetLastError@PLT
.LEHE20:
	testl	%ebp, %ebp
	jne	.L1338
	testl	%eax, %eax
	jne	.L1283
	testl	%ebp, %ebp
	je	.L1334
.L1338:
	movl	%ebp, %eax
.L1283:
	movl	%eax, %ebp
.L1334:
	movq	8(%rsp), %rdi
	call	_ZN4cuda3std3__424__optional_destruct_baseIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEELb0EED2Ev
	movq	504(%rsp), %rax
	subq	%fs:40, %rax
	je	.L1337
	jmp	.L1487
.L1363:
	endbr64
	movq	%rax, %rbx
.L1335:
	movq	8(%rsp), %rdi
	call	_ZN4cuda3std3__424__optional_destruct_baseIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEELb0EED2Ev
	movq	504(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L1487
	movq	%rbx, %rdi
.LEHB21:
	call	_Unwind_Resume@PLT
.LEHE21:
.L1487:
	call	__stack_chk_fail@PLT
.L1337:
	addq	$520, %rsp
	.cfi_def_cfa_offset 56
	movl	%ebp, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE12405:
	.section	.gcc_except_table
.LLSDA12405:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE12405-.LLSDACSB12405
.LLSDACSB12405:
	.uleb128 .LEHB20-.LFB12405
	.uleb128 .LEHE20-.LEHB20
	.uleb128 .L1363-.LFB12405
	.uleb128 0
	.uleb128 .LEHB21-.LFB12405
	.uleb128 .LEHE21-.LEHB21
	.uleb128 0
	.uleb128 0
.LLSDACSE12405:
	.text
	.size	_ZN3cub17CUB_200700_890_NS12DeviceReduce15TransformReduceIN6thrust20THRUST_200700_890_NS17counting_iteratorIjNS4_11use_defaultES6_S6_EEPdNS4_4plusIdEE11estimate_esdlEE9cudaErrorPvRmT_T0_T4_T1_T2_T3_P11CUstream_st.isra.0, .-_ZN3cub17CUB_200700_890_NS12DeviceReduce15TransformReduceIN6thrust20THRUST_200700_890_NS17counting_iteratorIjNS4_11use_defaultES6_S6_EEPdNS4_4plusIdEE11estimate_esdlEE9cudaErrorPvRmT_T0_T4_T1_T2_T3_P11CUstream_st.isra.0
	.section	.rodata.str1.1
.LC70:
	.string	"after reduction step 1"
.LC71:
	.string	"temporary_buffer::allocate: get_temporary_buffer failed"
.LC72:
	.string	"after reduction step 2"
.LC73:
	.string	"reduce failed to synchronize"
.LC74:
	.string	"trivial_device_copy D->H failed"
.LC78:
	.string	"code,threads,power_of_4,min,avg,max,time\n"
.LC79:
	.string	"CUDA thrust,"
.LC80:
	.string	","
.LC81:
	.string	"\n"
	.section	.text.startup
	.globl	main
	.type	main, @function
main:
.LFB11097:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA11097
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movabsq	$-2696494805208442699, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	$12, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$200, %rsp
	.cfi_def_cfa_offset 256
	movq	%fs:40, %rax
	movq	%rax, 184(%rsp)
	xorl	%eax, %eax
	call	_ZNSt6chrono3_V212system_clock3nowEv@PLT
	xorl	%edi, %edi
	movq	%rax, %rbp
	call	time@PLT
	movsd	.LC69(%rip), %xmm5
	movq	$0x000000000, 32(%rsp)
	movq	$0x000000000, 16(%rsp)
	cqto
	addq	%rax, %rax
	adcq	%rdx, %rdx
	orq	$1, %rax
	movsd	%xmm5, 24(%rsp)
	movq	%rax, %r14
	movq	%rdx, %r15
.L1545:
	movq	%r15, %rcx
	movq	%r14, %rax
	leaq	112(%rsp), %rsi
	movl	$1, %r8d
	mulq	%r13
	leaq	_ZL6g_seed(%rip), %rdi
	imulq	%r13, %rcx
	movq	%rax, %r14
	leaq	(%rcx,%rdx), %rax
	xorl	%ecx, %ecx
	movl	$8, %edx
	movq	%rax, 112(%rsp)
	movq	%rax, %r15
.LEHB22:
	call	cudaMemcpyToSymbol@PLT
	xorl	%ecx, %ecx
	leaq	72(%rsp), %rax
	xorl	%edx, %edx
	xorl	%edi, %edi
	movq	%rcx, 72(%rsp)
	movl	$1, %r9d
	xorl	%ecx, %ecx
	xorps	%xmm0, %xmm0
	movl	$65536, %r8d
	movq	%rax, %rsi
	movq	%rax, 48(%rsp)
	call	_ZN3cub17CUB_200700_890_NS12DeviceReduce15TransformReduceIN6thrust20THRUST_200700_890_NS17counting_iteratorIjNS4_11use_defaultES6_S6_EEPdNS4_4plusIdEE11estimate_esdiEE9cudaErrorPvRmT_T0_T4_T1_T2_T3_P11CUstream_st.isra.0
	leaq	.LC70(%rip), %rsi
	movl	%eax, %edi
	call	_ZN6thrust20THRUST_200700_890_NS8cuda_cub14throw_on_errorE9cudaErrorPKc
	movq	72(%rsp), %rbx
	leaq	70(%rsp), %rax
	xorl	%esi, %esi
	movq	%rax, 88(%rsp)
	leaq	80(%rsp), %rax
	addq	$8, %rbx
	movq	%rsi, 96(%rsp)
	movq	%rsi, 104(%rsp)
	movq	%rax, 40(%rsp)
	je	.L1528
	xorl	%edx, %edx
	movq	%rbx, %rsi
	movq	%rax, %rdi
	movq	%rdx, 80(%rsp)
	call	cudaMalloc@PLT
	testl	%eax, %eax
	je	.L1529
	movl	%eax, 8(%rsp)
	leaq	152(%rsp), %r12
	call	cudaGetLastError@PLT
.LEHE22:
	movl	$40, %edi
	call	__cxa_allocate_exception@PLT
	movq	%rax, %rbp
	call	_ZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEv
	movl	8(%rsp), %edx
	movq	%r12, %rdi
	movq	%rax, %rsi
	movq	(%rax), %rax
.LEHB23:
	call	*48(%rax)
.LEHE23:
	leaq	120(%rsp), %r13
	movq	152(%rsp), %rsi
	leaq	71(%rsp), %rdx
	movq	%r13, %rdi
.LEHB24:
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1IS3_EEPKcRKS3_
.LEHE24:
	movq	%r13, %rsi
	movq	%rbp, %rdi
.LEHB25:
	call	_ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocC1ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE
.LEHE25:
	movq	%r13, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	jmp	.L1566
.L1529:
	movq	80(%rsp), %rdi
	xorl	%eax, %eax
	testq	%rdi, %rdi
	cmovne	%rbx, %rax
	cmpq	%rbx, %rax
	jnb	.L1537
	jmp	.L1570
.L1555:
	endbr64
	movq	%rax, %rbx
.L1533:
	movq	%r13, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	jmp	.L1540
.L1554:
	endbr64
	jmp	.L1569
.L1553:
	endbr64
	jmp	.L1568
.L1570:
	call	cudaFree@PLT
	leaq	.LC66(%rip), %rsi
	leaq	152(%rsp), %r12
	movl	%eax, %edi
	call	_ZN6thrust20THRUST_200700_890_NS8cuda_cub14throw_on_errorE9cudaErrorPKc
	movl	$40, %edi
	call	__cxa_allocate_exception@PLT
	movq	40(%rsp), %rdx
	leaq	.LC71(%rip), %rsi
	movq	%r12, %rdi
	movq	%rax, %rbp
.LEHB26:
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1IS3_EEPKcRKS3_
.LEHE26:
	movq	%r12, %rsi
	movq	%rbp, %rdi
.LEHB27:
	call	_ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocC1ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE
.LEHE27:
.L1566:
	movq	%r12, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	movq	184(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L1565
	leaq	_ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD1Ev(%rip), %rdx
	leaq	_ZTIN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE(%rip), %rsi
	movq	%rbp, %rdi
.LEHB28:
	call	__cxa_throw@PLT
.LEHE28:
.L1537:
	movq	%rdi, 96(%rsp)
	movq	%rbx, 104(%rsp)
	jmp	.L1539
.L1552:
	endbr64
.L1569:
	movq	%rax, %rbx
.L1540:
	movq	%r12, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	jmp	.L1541
.L1551:
	endbr64
.L1568:
	movq	%rax, %rbx
.L1541:
	movq	%rbp, %rdi
	call	__cxa_free_exception@PLT
	jmp	.L1567
.L1528:
	xorl	%eax, %eax
	movq	%rax, 96(%rsp)
.L1539:
	leaq	88(%rsp), %rax
	movq	%rax, %rdi
	movq	%rax, 8(%rsp)
	call	_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIhNS1_18no_throw_allocatorINS1_19temporary_allocatorIhNS0_8cuda_cub3tagEEEEEE4dataEv
	movq	8(%rsp), %rdi
	movq	%rax, 56(%rsp)
	call	_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIhNS1_18no_throw_allocatorINS1_19temporary_allocatorIhNS0_8cuda_cub3tagEEEEEE4dataEv
	movq	56(%rsp), %rcx
	xorps	%xmm0, %xmm0
	xorl	%edx, %edx
	movq	48(%rsp), %rsi
	leaq	8(%rax), %rdi
	movl	$1, %r9d
	movl	$65536, %r8d
.LEHB29:
	call	_ZN3cub17CUB_200700_890_NS12DeviceReduce15TransformReduceIN6thrust20THRUST_200700_890_NS17counting_iteratorIjNS4_11use_defaultES6_S6_EEPdNS4_4plusIdEE11estimate_esdiEE9cudaErrorPvRmT_T0_T4_T1_T2_T3_P11CUstream_st.isra.0
	movl	%eax, %edi
	leaq	.LC72(%rip), %rsi
	call	_ZN6thrust20THRUST_200700_890_NS8cuda_cub14throw_on_errorE9cudaErrorPKc
	movl	$1, %edi
	call	cudaStreamSynchronize@PLT
	movl	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	testl	%ebx, %ebx
	jne	.L1556
	testl	%eax, %eax
	jne	.L1543
.L1556:
	movl	%ebx, %edi
.L1543:
	leaq	.LC73(%rip), %rsi
	call	_ZN6thrust20THRUST_200700_890_NS8cuda_cub14throw_on_errorE9cudaErrorPKc
	movq	8(%rsp), %rdi
	call	_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIhNS1_18no_throw_allocatorINS1_19temporary_allocatorIhNS0_8cuda_cub3tagEEEEEE4dataEv
	movq	40(%rsp), %rdi
	movl	$1, %r8d
	movl	$2, %ecx
	movq	%rax, %rsi
	movl	$8, %edx
	call	cudaMemcpyAsync@PLT
	movl	$1, %edi
	movl	%eax, %ebx
	call	cudaStreamSynchronize@PLT
	leaq	.LC74(%rip), %rsi
	movl	%ebx, %edi
	call	_ZN6thrust20THRUST_200700_890_NS8cuda_cub14throw_on_errorE9cudaErrorPKc
.LEHE29:
	movq	8(%rsp), %rdi
	movq	80(%rsp), %rbx
	call	_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIhNS1_18no_throw_allocatorINS1_19temporary_allocatorIhNS0_8cuda_cub3tagEEEEEE10deallocateEv
	movq	%rbx, %xmm2
	movsd	16(%rsp), %xmm3
	movsd	24(%rsp), %xmm1
	mulsd	.LC75(%rip), %xmm2
	addsd	%xmm2, %xmm3
	movaps	%xmm2, %xmm0
	movsd	%xmm2, 8(%rsp)
	movsd	%xmm3, 16(%rsp)
	call	fmin@PLT
	movsd	32(%rsp), %xmm1
	movsd	%xmm0, 24(%rsp)
	movsd	8(%rsp), %xmm0
	call	fmax@PLT
	movsd	%xmm0, 32(%rsp)
	decl	%r12d
	jne	.L1545
	jmp	.L1571
.L1550:
	endbr64
	movq	%rax, %rbx
.L1547:
	movq	8(%rsp), %rdi
	call	_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIhNS1_18no_throw_allocatorINS1_19temporary_allocatorIhNS0_8cuda_cub3tagEEEEEE10deallocateEv
.L1567:
	movq	184(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L1565
	movq	%rbx, %rdi
.LEHB30:
	call	_Unwind_Resume@PLT
.L1571:
	leaq	_ZSt4cout(%rip), %rbx
	movsd	16(%rsp), %xmm4
	divsd	.LC76(%rip), %xmm4
	movq	%xmm4, %r12
	call	_ZNSt6chrono3_V212system_clock3nowEv@PLT
	movq	%rbx, %rdi
	leaq	.LC78(%rip), %rsi
	movq	$14, 16+_ZSt4cout(%rip)
	subq	%rbp, %rax
	cvtsi2sdq	%rax, %xmm0
	divsd	.LC77(%rip), %xmm0
	movq	%xmm0, %rbp
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rbx, %rdi
	leaq	.LC79(%rip), %rsi
	leaq	.LC80(%rip), %rbx
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	$12, %esi
	movq	%rax, %rdi
	call	_ZNSo9_M_insertImEERSoT_@PLT
	movq	%rbx, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	$8, %esi
	movq	%rax, %rdi
	call	_ZNSo9_M_insertImEERSoT_@PLT
	movq	%rbx, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	24(%rsp), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%rbx, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%r12, %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%rbx, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	32(%rsp), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%rbx, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rbp, %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC81(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
.LEHE30:
	movq	184(%rsp), %rax
	subq	%fs:40, %rax
	je	.L1549
.L1565:
	call	__stack_chk_fail@PLT
.L1549:
	addq	$200, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE11097:
	.section	.gcc_except_table
.LLSDA11097:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE11097-.LLSDACSB11097
.LLSDACSB11097:
	.uleb128 .LEHB22-.LFB11097
	.uleb128 .LEHE22-.LEHB22
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB23-.LFB11097
	.uleb128 .LEHE23-.LEHB23
	.uleb128 .L1553-.LFB11097
	.uleb128 0
	.uleb128 .LEHB24-.LFB11097
	.uleb128 .LEHE24-.LEHB24
	.uleb128 .L1554-.LFB11097
	.uleb128 0
	.uleb128 .LEHB25-.LFB11097
	.uleb128 .LEHE25-.LEHB25
	.uleb128 .L1555-.LFB11097
	.uleb128 0
	.uleb128 .LEHB26-.LFB11097
	.uleb128 .LEHE26-.LEHB26
	.uleb128 .L1551-.LFB11097
	.uleb128 0
	.uleb128 .LEHB27-.LFB11097
	.uleb128 .LEHE27-.LEHB27
	.uleb128 .L1552-.LFB11097
	.uleb128 0
	.uleb128 .LEHB28-.LFB11097
	.uleb128 .LEHE28-.LEHB28
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB29-.LFB11097
	.uleb128 .LEHE29-.LEHB29
	.uleb128 .L1550-.LFB11097
	.uleb128 0
	.uleb128 .LEHB30-.LFB11097
	.uleb128 .LEHE30-.LEHB30
	.uleb128 0
	.uleb128 0
.LLSDACSE11097:
	.section	.text.startup
	.size	main, .-main
	.weak	_ZTSN4cuda3__410cuda_errorE
	.section	.rodata._ZTSN4cuda3__410cuda_errorE,"aG",@progbits,_ZTSN4cuda3__410cuda_errorE,comdat
	.align 16
	.type	_ZTSN4cuda3__410cuda_errorE, @object
	.size	_ZTSN4cuda3__410cuda_errorE, 24
_ZTSN4cuda3__410cuda_errorE:
	.string	"N4cuda3__410cuda_errorE"
	.weak	_ZTIN4cuda3__410cuda_errorE
	.section	.data.rel.ro._ZTIN4cuda3__410cuda_errorE,"awG",@progbits,_ZTIN4cuda3__410cuda_errorE,comdat
	.align 8
	.type	_ZTIN4cuda3__410cuda_errorE, @object
	.size	_ZTIN4cuda3__410cuda_errorE, 24
_ZTIN4cuda3__410cuda_errorE:
	.quad	_ZTVN10__cxxabiv120__si_class_type_infoE+16
	.quad	_ZTSN4cuda3__410cuda_errorE
	.quad	_ZTISt13runtime_error
	.weak	_ZTSN6thrust20THRUST_200700_890_NS6system14error_categoryE
	.section	.rodata._ZTSN6thrust20THRUST_200700_890_NS6system14error_categoryE,"aG",@progbits,_ZTSN6thrust20THRUST_200700_890_NS6system14error_categoryE,comdat
	.align 32
	.type	_ZTSN6thrust20THRUST_200700_890_NS6system14error_categoryE, @object
	.size	_ZTSN6thrust20THRUST_200700_890_NS6system14error_categoryE, 55
_ZTSN6thrust20THRUST_200700_890_NS6system14error_categoryE:
	.string	"N6thrust20THRUST_200700_890_NS6system14error_categoryE"
	.weak	_ZTIN6thrust20THRUST_200700_890_NS6system14error_categoryE
	.section	.data.rel.ro._ZTIN6thrust20THRUST_200700_890_NS6system14error_categoryE,"awG",@progbits,_ZTIN6thrust20THRUST_200700_890_NS6system14error_categoryE,comdat
	.align 8
	.type	_ZTIN6thrust20THRUST_200700_890_NS6system14error_categoryE, @object
	.size	_ZTIN6thrust20THRUST_200700_890_NS6system14error_categoryE, 16
_ZTIN6thrust20THRUST_200700_890_NS6system14error_categoryE:
	.quad	_ZTVN10__cxxabiv117__class_type_infoE+16
	.quad	_ZTSN6thrust20THRUST_200700_890_NS6system14error_categoryE
	.weak	_ZTSN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE
	.section	.rodata._ZTSN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE,"aG",@progbits,_ZTSN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE,comdat
	.align 32
	.type	_ZTSN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE, @object
	.size	_ZTSN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE, 70
_ZTSN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE:
	.string	"N6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE"
	.weak	_ZTIN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE
	.section	.data.rel.ro._ZTIN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE,"awG",@progbits,_ZTIN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE,comdat
	.align 8
	.type	_ZTIN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE, @object
	.size	_ZTIN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE, 24
_ZTIN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE:
	.quad	_ZTVN10__cxxabiv120__si_class_type_infoE+16
	.quad	_ZTSN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE
	.quad	_ZTIN6thrust20THRUST_200700_890_NS6system14error_categoryE
	.weak	_ZTSN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE
	.section	.rodata._ZTSN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE,"aG",@progbits,_ZTSN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE,comdat
	.align 32
	.type	_ZTSN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE, @object
	.size	_ZTSN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE, 69
_ZTSN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE:
	.string	"N6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE"
	.weak	_ZTIN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE
	.section	.data.rel.ro._ZTIN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE,"awG",@progbits,_ZTIN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE,comdat
	.align 8
	.type	_ZTIN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE, @object
	.size	_ZTIN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE, 24
_ZTIN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE:
	.quad	_ZTVN10__cxxabiv120__si_class_type_infoE+16
	.quad	_ZTSN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE
	.quad	_ZTIN6thrust20THRUST_200700_890_NS6system14error_categoryE
	.weak	_ZTSN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE
	.section	.rodata._ZTSN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE,"aG",@progbits,_ZTSN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE,comdat
	.align 32
	.type	_ZTSN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE, @object
	.size	_ZTSN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE, 76
_ZTSN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE:
	.string	"N6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE"
	.weak	_ZTIN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE
	.section	.data.rel.ro._ZTIN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE,"awG",@progbits,_ZTIN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE,comdat
	.align 8
	.type	_ZTIN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE, @object
	.size	_ZTIN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE, 24
_ZTIN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE:
	.quad	_ZTVN10__cxxabiv120__si_class_type_infoE+16
	.quad	_ZTSN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE
	.quad	_ZTIN6thrust20THRUST_200700_890_NS6system14error_categoryE
	.weak	_ZTSN6thrust20THRUST_200700_890_NS6system12system_errorE
	.section	.rodata._ZTSN6thrust20THRUST_200700_890_NS6system12system_errorE,"aG",@progbits,_ZTSN6thrust20THRUST_200700_890_NS6system12system_errorE,comdat
	.align 32
	.type	_ZTSN6thrust20THRUST_200700_890_NS6system12system_errorE, @object
	.size	_ZTSN6thrust20THRUST_200700_890_NS6system12system_errorE, 53
_ZTSN6thrust20THRUST_200700_890_NS6system12system_errorE:
	.string	"N6thrust20THRUST_200700_890_NS6system12system_errorE"
	.weak	_ZTIN6thrust20THRUST_200700_890_NS6system12system_errorE
	.section	.data.rel.ro._ZTIN6thrust20THRUST_200700_890_NS6system12system_errorE,"awG",@progbits,_ZTIN6thrust20THRUST_200700_890_NS6system12system_errorE,comdat
	.align 8
	.type	_ZTIN6thrust20THRUST_200700_890_NS6system12system_errorE, @object
	.size	_ZTIN6thrust20THRUST_200700_890_NS6system12system_errorE, 24
_ZTIN6thrust20THRUST_200700_890_NS6system12system_errorE:
	.quad	_ZTVN10__cxxabiv120__si_class_type_infoE+16
	.quad	_ZTSN6thrust20THRUST_200700_890_NS6system12system_errorE
	.quad	_ZTISt13runtime_error
	.weak	_ZTSN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE
	.section	.rodata._ZTSN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE,"aG",@progbits,_ZTSN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE,comdat
	.align 32
	.type	_ZTSN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE, @object
	.size	_ZTSN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE, 56
_ZTSN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE:
	.string	"N6thrust20THRUST_200700_890_NS6system6detail9bad_allocE"
	.weak	_ZTIN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE
	.section	.data.rel.ro._ZTIN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE,"awG",@progbits,_ZTIN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE,comdat
	.align 8
	.type	_ZTIN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE, @object
	.size	_ZTIN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE, 24
_ZTIN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE:
	.quad	_ZTVN10__cxxabiv120__si_class_type_infoE+16
	.quad	_ZTSN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE
	.quad	_ZTISt9bad_alloc
	.weak	_ZTVN4cuda3__410cuda_errorE
	.section	.data.rel.ro._ZTVN4cuda3__410cuda_errorE,"awG",@progbits,_ZTVN4cuda3__410cuda_errorE,comdat
	.align 8
	.type	_ZTVN4cuda3__410cuda_errorE, @object
	.size	_ZTVN4cuda3__410cuda_errorE, 40
_ZTVN4cuda3__410cuda_errorE:
	.quad	0
	.quad	_ZTIN4cuda3__410cuda_errorE
	.quad	_ZN4cuda3__410cuda_errorD1Ev
	.quad	_ZN4cuda3__410cuda_errorD0Ev
	.quad	_ZNKSt13runtime_error4whatEv
	.weak	_ZTVN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE
	.section	.data.rel.ro.local._ZTVN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE,"awG",@progbits,_ZTVN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE,comdat
	.align 8
	.type	_ZTVN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE, @object
	.size	_ZTVN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE, 72
_ZTVN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE:
	.quad	0
	.quad	_ZTIN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE
	.quad	_ZN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryD1Ev
	.quad	_ZN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryD0Ev
	.quad	_ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category4nameEv
	.quad	_ZNK6thrust20THRUST_200700_890_NS6system14error_category23default_error_conditionEi
	.quad	_ZNK6thrust20THRUST_200700_890_NS6system14error_category10equivalentEiRKNS1_15error_conditionE
	.quad	_ZNK6thrust20THRUST_200700_890_NS6system14error_category10equivalentERKNS1_10error_codeEi
	.quad	_ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11Ei
	.weak	_ZTVN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE
	.section	.data.rel.ro.local._ZTVN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE,"awG",@progbits,_ZTVN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE,comdat
	.align 8
	.type	_ZTVN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE, @object
	.size	_ZTVN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE, 72
_ZTVN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE:
	.quad	0
	.quad	_ZTIN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE
	.quad	_ZN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryD1Ev
	.quad	_ZN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryD0Ev
	.quad	_ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category4nameEv
	.quad	_ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category23default_error_conditionEi
	.quad	_ZNK6thrust20THRUST_200700_890_NS6system14error_category10equivalentEiRKNS1_15error_conditionE
	.quad	_ZNK6thrust20THRUST_200700_890_NS6system14error_category10equivalentERKNS1_10error_codeEi
	.quad	_ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category7messageB5cxx11Ei
	.weak	_ZTVN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE
	.section	.data.rel.ro.local._ZTVN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE,"awG",@progbits,_ZTVN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE,comdat
	.align 8
	.type	_ZTVN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE, @object
	.size	_ZTVN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE, 72
_ZTVN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE:
	.quad	0
	.quad	_ZTIN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE
	.quad	_ZN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryD1Ev
	.quad	_ZN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryD0Ev
	.quad	_ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category4nameEv
	.quad	_ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category23default_error_conditionEi
	.quad	_ZNK6thrust20THRUST_200700_890_NS6system14error_category10equivalentEiRKNS1_15error_conditionE
	.quad	_ZNK6thrust20THRUST_200700_890_NS6system14error_category10equivalentERKNS1_10error_codeEi
	.quad	_ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category7messageB5cxx11Ei
	.weak	_ZTVN6thrust20THRUST_200700_890_NS6system12system_errorE
	.section	.data.rel.ro.local._ZTVN6thrust20THRUST_200700_890_NS6system12system_errorE,"awG",@progbits,_ZTVN6thrust20THRUST_200700_890_NS6system12system_errorE,comdat
	.align 8
	.type	_ZTVN6thrust20THRUST_200700_890_NS6system12system_errorE, @object
	.size	_ZTVN6thrust20THRUST_200700_890_NS6system12system_errorE, 40
_ZTVN6thrust20THRUST_200700_890_NS6system12system_errorE:
	.quad	0
	.quad	_ZTIN6thrust20THRUST_200700_890_NS6system12system_errorE
	.quad	_ZN6thrust20THRUST_200700_890_NS6system12system_errorD1Ev
	.quad	_ZN6thrust20THRUST_200700_890_NS6system12system_errorD0Ev
	.quad	_ZNK6thrust20THRUST_200700_890_NS6system12system_error4whatEv
	.weak	_ZTVN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE
	.section	.data.rel.ro.local._ZTVN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE,"awG",@progbits,_ZTVN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE,comdat
	.align 8
	.type	_ZTVN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE, @object
	.size	_ZTVN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE, 40
_ZTVN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE:
	.quad	0
	.quad	_ZTIN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE
	.quad	_ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD1Ev
	.quad	_ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD0Ev
	.quad	_ZNK6thrust20THRUST_200700_890_NS6system6detail9bad_alloc4whatEv
	.weak	_ZGVZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_vE1d
	.section	.bss._ZGVZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_vE1d,"awG",@nobits,_ZGVZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_vE1d,comdat
	.align 8
	.type	_ZGVZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_vE1d, @gnu_unique_object
	.size	_ZGVZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_vE1d, 8
_ZGVZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_vE1d:
	.zero	8
	.weak	_ZZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_vE1d
	.section	.bss._ZZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_vE1d,"awG",@nobits,_ZZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_vE1d,comdat
	.align 8
	.type	_ZZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_vE1d, @gnu_unique_object
	.size	_ZZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_vE1d, 8
_ZZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_vE1d:
	.zero	8
	.weak	_ZGVZN3cub17CUB_200700_890_NS12DeviceReduce15TransformReduceIN6thrust20THRUST_200700_890_NS17counting_iteratorIjNS4_11use_defaultES6_S6_EEPdNS4_4plusIdEE11estimate_esdlEE9cudaErrorPvRmT_T0_T4_T1_T2_T3_P11CUstream_stE21__cub_nvtx3_func_attr
	.section	.bss._ZGVZN3cub17CUB_200700_890_NS12DeviceReduce15TransformReduceIN6thrust20THRUST_200700_890_NS17counting_iteratorIjNS4_11use_defaultES6_S6_EEPdNS4_4plusIdEE11estimate_esdlEE9cudaErrorPvRmT_T0_T4_T1_T2_T3_P11CUstream_stE21__cub_nvtx3_func_attr,"awG",@nobits,_ZGVZN3cub17CUB_200700_890_NS12DeviceReduce15TransformReduceIN6thrust20THRUST_200700_890_NS17counting_iteratorIjNS4_11use_defaultES6_S6_EEPdNS4_4plusIdEE11estimate_esdlEE9cudaErrorPvRmT_T0_T4_T1_T2_T3_P11CUstream_stE21__cub_nvtx3_func_attr,comdat
	.align 8
	.type	_ZGVZN3cub17CUB_200700_890_NS12DeviceReduce15TransformReduceIN6thrust20THRUST_200700_890_NS17counting_iteratorIjNS4_11use_defaultES6_S6_EEPdNS4_4plusIdEE11estimate_esdlEE9cudaErrorPvRmT_T0_T4_T1_T2_T3_P11CUstream_stE21__cub_nvtx3_func_attr, @gnu_unique_object
	.size	_ZGVZN3cub17CUB_200700_890_NS12DeviceReduce15TransformReduceIN6thrust20THRUST_200700_890_NS17counting_iteratorIjNS4_11use_defaultES6_S6_EEPdNS4_4plusIdEE11estimate_esdlEE9cudaErrorPvRmT_T0_T4_T1_T2_T3_P11CUstream_stE21__cub_nvtx3_func_attr, 8
_ZGVZN3cub17CUB_200700_890_NS12DeviceReduce15TransformReduceIN6thrust20THRUST_200700_890_NS17counting_iteratorIjNS4_11use_defaultES6_S6_EEPdNS4_4plusIdEE11estimate_esdlEE9cudaErrorPvRmT_T0_T4_T1_T2_T3_P11CUstream_stE21__cub_nvtx3_func_attr:
	.zero	8
	.weak	_ZZN3cub17CUB_200700_890_NS12DeviceReduce15TransformReduceIN6thrust20THRUST_200700_890_NS17counting_iteratorIjNS4_11use_defaultES6_S6_EEPdNS4_4plusIdEE11estimate_esdlEE9cudaErrorPvRmT_T0_T4_T1_T2_T3_P11CUstream_stE21__cub_nvtx3_func_attr
	.section	.bss._ZZN3cub17CUB_200700_890_NS12DeviceReduce15TransformReduceIN6thrust20THRUST_200700_890_NS17counting_iteratorIjNS4_11use_defaultES6_S6_EEPdNS4_4plusIdEE11estimate_esdlEE9cudaErrorPvRmT_T0_T4_T1_T2_T3_P11CUstream_stE21__cub_nvtx3_func_attr,"awG",@nobits,_ZZN3cub17CUB_200700_890_NS12DeviceReduce15TransformReduceIN6thrust20THRUST_200700_890_NS17counting_iteratorIjNS4_11use_defaultES6_S6_EEPdNS4_4plusIdEE11estimate_esdlEE9cudaErrorPvRmT_T0_T4_T1_T2_T3_P11CUstream_stE21__cub_nvtx3_func_attr,comdat
	.align 32
	.type	_ZZN3cub17CUB_200700_890_NS12DeviceReduce15TransformReduceIN6thrust20THRUST_200700_890_NS17counting_iteratorIjNS4_11use_defaultES6_S6_EEPdNS4_4plusIdEE11estimate_esdlEE9cudaErrorPvRmT_T0_T4_T1_T2_T3_P11CUstream_stE21__cub_nvtx3_func_attr, @gnu_unique_object
	.size	_ZZN3cub17CUB_200700_890_NS12DeviceReduce15TransformReduceIN6thrust20THRUST_200700_890_NS17counting_iteratorIjNS4_11use_defaultES6_S6_EEPdNS4_4plusIdEE11estimate_esdlEE9cudaErrorPvRmT_T0_T4_T1_T2_T3_P11CUstream_stE21__cub_nvtx3_func_attr, 48
_ZZN3cub17CUB_200700_890_NS12DeviceReduce15TransformReduceIN6thrust20THRUST_200700_890_NS17counting_iteratorIjNS4_11use_defaultES6_S6_EEPdNS4_4plusIdEE11estimate_esdlEE9cudaErrorPvRmT_T0_T4_T1_T2_T3_P11CUstream_stE21__cub_nvtx3_func_attr:
	.zero	48
	.weak	_ZGVZN3cub17CUB_200700_890_NS12DeviceReduce15TransformReduceIN6thrust20THRUST_200700_890_NS17counting_iteratorIjNS4_11use_defaultES6_S6_EEPdNS4_4plusIdEE11estimate_esdlEE9cudaErrorPvRmT_T0_T4_T1_T2_T3_P11CUstream_stE21__cub_nvtx3_func_name
	.section	.bss._ZGVZN3cub17CUB_200700_890_NS12DeviceReduce15TransformReduceIN6thrust20THRUST_200700_890_NS17counting_iteratorIjNS4_11use_defaultES6_S6_EEPdNS4_4plusIdEE11estimate_esdlEE9cudaErrorPvRmT_T0_T4_T1_T2_T3_P11CUstream_stE21__cub_nvtx3_func_name,"awG",@nobits,_ZGVZN3cub17CUB_200700_890_NS12DeviceReduce15TransformReduceIN6thrust20THRUST_200700_890_NS17counting_iteratorIjNS4_11use_defaultES6_S6_EEPdNS4_4plusIdEE11estimate_esdlEE9cudaErrorPvRmT_T0_T4_T1_T2_T3_P11CUstream_stE21__cub_nvtx3_func_name,comdat
	.align 8
	.type	_ZGVZN3cub17CUB_200700_890_NS12DeviceReduce15TransformReduceIN6thrust20THRUST_200700_890_NS17counting_iteratorIjNS4_11use_defaultES6_S6_EEPdNS4_4plusIdEE11estimate_esdlEE9cudaErrorPvRmT_T0_T4_T1_T2_T3_P11CUstream_stE21__cub_nvtx3_func_name, @gnu_unique_object
	.size	_ZGVZN3cub17CUB_200700_890_NS12DeviceReduce15TransformReduceIN6thrust20THRUST_200700_890_NS17counting_iteratorIjNS4_11use_defaultES6_S6_EEPdNS4_4plusIdEE11estimate_esdlEE9cudaErrorPvRmT_T0_T4_T1_T2_T3_P11CUstream_stE21__cub_nvtx3_func_name, 8
_ZGVZN3cub17CUB_200700_890_NS12DeviceReduce15TransformReduceIN6thrust20THRUST_200700_890_NS17counting_iteratorIjNS4_11use_defaultES6_S6_EEPdNS4_4plusIdEE11estimate_esdlEE9cudaErrorPvRmT_T0_T4_T1_T2_T3_P11CUstream_stE21__cub_nvtx3_func_name:
	.zero	8
	.weak	_ZZN3cub17CUB_200700_890_NS12DeviceReduce15TransformReduceIN6thrust20THRUST_200700_890_NS17counting_iteratorIjNS4_11use_defaultES6_S6_EEPdNS4_4plusIdEE11estimate_esdlEE9cudaErrorPvRmT_T0_T4_T1_T2_T3_P11CUstream_stE21__cub_nvtx3_func_name
	.section	.bss._ZZN3cub17CUB_200700_890_NS12DeviceReduce15TransformReduceIN6thrust20THRUST_200700_890_NS17counting_iteratorIjNS4_11use_defaultES6_S6_EEPdNS4_4plusIdEE11estimate_esdlEE9cudaErrorPvRmT_T0_T4_T1_T2_T3_P11CUstream_stE21__cub_nvtx3_func_name,"awG",@nobits,_ZZN3cub17CUB_200700_890_NS12DeviceReduce15TransformReduceIN6thrust20THRUST_200700_890_NS17counting_iteratorIjNS4_11use_defaultES6_S6_EEPdNS4_4plusIdEE11estimate_esdlEE9cudaErrorPvRmT_T0_T4_T1_T2_T3_P11CUstream_stE21__cub_nvtx3_func_name,comdat
	.align 8
	.type	_ZZN3cub17CUB_200700_890_NS12DeviceReduce15TransformReduceIN6thrust20THRUST_200700_890_NS17counting_iteratorIjNS4_11use_defaultES6_S6_EEPdNS4_4plusIdEE11estimate_esdlEE9cudaErrorPvRmT_T0_T4_T1_T2_T3_P11CUstream_stE21__cub_nvtx3_func_name, @gnu_unique_object
	.size	_ZZN3cub17CUB_200700_890_NS12DeviceReduce15TransformReduceIN6thrust20THRUST_200700_890_NS17counting_iteratorIjNS4_11use_defaultES6_S6_EEPdNS4_4plusIdEE11estimate_esdlEE9cudaErrorPvRmT_T0_T4_T1_T2_T3_P11CUstream_stE21__cub_nvtx3_func_name, 8
_ZZN3cub17CUB_200700_890_NS12DeviceReduce15TransformReduceIN6thrust20THRUST_200700_890_NS17counting_iteratorIjNS4_11use_defaultES6_S6_EEPdNS4_4plusIdEE11estimate_esdlEE9cudaErrorPvRmT_T0_T4_T1_T2_T3_P11CUstream_stE21__cub_nvtx3_func_name:
	.zero	8
	.weak	_ZGVZN3cub17CUB_200700_890_NS12DeviceReduce15TransformReduceIN6thrust20THRUST_200700_890_NS17counting_iteratorIjNS4_11use_defaultES6_S6_EEPdNS4_4plusIdEE11estimate_esdiEE9cudaErrorPvRmT_T0_T4_T1_T2_T3_P11CUstream_stE21__cub_nvtx3_func_attr
	.section	.bss._ZGVZN3cub17CUB_200700_890_NS12DeviceReduce15TransformReduceIN6thrust20THRUST_200700_890_NS17counting_iteratorIjNS4_11use_defaultES6_S6_EEPdNS4_4plusIdEE11estimate_esdiEE9cudaErrorPvRmT_T0_T4_T1_T2_T3_P11CUstream_stE21__cub_nvtx3_func_attr,"awG",@nobits,_ZGVZN3cub17CUB_200700_890_NS12DeviceReduce15TransformReduceIN6thrust20THRUST_200700_890_NS17counting_iteratorIjNS4_11use_defaultES6_S6_EEPdNS4_4plusIdEE11estimate_esdiEE9cudaErrorPvRmT_T0_T4_T1_T2_T3_P11CUstream_stE21__cub_nvtx3_func_attr,comdat
	.align 8
	.type	_ZGVZN3cub17CUB_200700_890_NS12DeviceReduce15TransformReduceIN6thrust20THRUST_200700_890_NS17counting_iteratorIjNS4_11use_defaultES6_S6_EEPdNS4_4plusIdEE11estimate_esdiEE9cudaErrorPvRmT_T0_T4_T1_T2_T3_P11CUstream_stE21__cub_nvtx3_func_attr, @gnu_unique_object
	.size	_ZGVZN3cub17CUB_200700_890_NS12DeviceReduce15TransformReduceIN6thrust20THRUST_200700_890_NS17counting_iteratorIjNS4_11use_defaultES6_S6_EEPdNS4_4plusIdEE11estimate_esdiEE9cudaErrorPvRmT_T0_T4_T1_T2_T3_P11CUstream_stE21__cub_nvtx3_func_attr, 8
_ZGVZN3cub17CUB_200700_890_NS12DeviceReduce15TransformReduceIN6thrust20THRUST_200700_890_NS17counting_iteratorIjNS4_11use_defaultES6_S6_EEPdNS4_4plusIdEE11estimate_esdiEE9cudaErrorPvRmT_T0_T4_T1_T2_T3_P11CUstream_stE21__cub_nvtx3_func_attr:
	.zero	8
	.weak	_ZZN3cub17CUB_200700_890_NS12DeviceReduce15TransformReduceIN6thrust20THRUST_200700_890_NS17counting_iteratorIjNS4_11use_defaultES6_S6_EEPdNS4_4plusIdEE11estimate_esdiEE9cudaErrorPvRmT_T0_T4_T1_T2_T3_P11CUstream_stE21__cub_nvtx3_func_attr
	.section	.bss._ZZN3cub17CUB_200700_890_NS12DeviceReduce15TransformReduceIN6thrust20THRUST_200700_890_NS17counting_iteratorIjNS4_11use_defaultES6_S6_EEPdNS4_4plusIdEE11estimate_esdiEE9cudaErrorPvRmT_T0_T4_T1_T2_T3_P11CUstream_stE21__cub_nvtx3_func_attr,"awG",@nobits,_ZZN3cub17CUB_200700_890_NS12DeviceReduce15TransformReduceIN6thrust20THRUST_200700_890_NS17counting_iteratorIjNS4_11use_defaultES6_S6_EEPdNS4_4plusIdEE11estimate_esdiEE9cudaErrorPvRmT_T0_T4_T1_T2_T3_P11CUstream_stE21__cub_nvtx3_func_attr,comdat
	.align 32
	.type	_ZZN3cub17CUB_200700_890_NS12DeviceReduce15TransformReduceIN6thrust20THRUST_200700_890_NS17counting_iteratorIjNS4_11use_defaultES6_S6_EEPdNS4_4plusIdEE11estimate_esdiEE9cudaErrorPvRmT_T0_T4_T1_T2_T3_P11CUstream_stE21__cub_nvtx3_func_attr, @gnu_unique_object
	.size	_ZZN3cub17CUB_200700_890_NS12DeviceReduce15TransformReduceIN6thrust20THRUST_200700_890_NS17counting_iteratorIjNS4_11use_defaultES6_S6_EEPdNS4_4plusIdEE11estimate_esdiEE9cudaErrorPvRmT_T0_T4_T1_T2_T3_P11CUstream_stE21__cub_nvtx3_func_attr, 48
_ZZN3cub17CUB_200700_890_NS12DeviceReduce15TransformReduceIN6thrust20THRUST_200700_890_NS17counting_iteratorIjNS4_11use_defaultES6_S6_EEPdNS4_4plusIdEE11estimate_esdiEE9cudaErrorPvRmT_T0_T4_T1_T2_T3_P11CUstream_stE21__cub_nvtx3_func_attr:
	.zero	48
	.weak	_ZGVZN3cub17CUB_200700_890_NS12DeviceReduce15TransformReduceIN6thrust20THRUST_200700_890_NS17counting_iteratorIjNS4_11use_defaultES6_S6_EEPdNS4_4plusIdEE11estimate_esdiEE9cudaErrorPvRmT_T0_T4_T1_T2_T3_P11CUstream_stE21__cub_nvtx3_func_name
	.section	.bss._ZGVZN3cub17CUB_200700_890_NS12DeviceReduce15TransformReduceIN6thrust20THRUST_200700_890_NS17counting_iteratorIjNS4_11use_defaultES6_S6_EEPdNS4_4plusIdEE11estimate_esdiEE9cudaErrorPvRmT_T0_T4_T1_T2_T3_P11CUstream_stE21__cub_nvtx3_func_name,"awG",@nobits,_ZGVZN3cub17CUB_200700_890_NS12DeviceReduce15TransformReduceIN6thrust20THRUST_200700_890_NS17counting_iteratorIjNS4_11use_defaultES6_S6_EEPdNS4_4plusIdEE11estimate_esdiEE9cudaErrorPvRmT_T0_T4_T1_T2_T3_P11CUstream_stE21__cub_nvtx3_func_name,comdat
	.align 8
	.type	_ZGVZN3cub17CUB_200700_890_NS12DeviceReduce15TransformReduceIN6thrust20THRUST_200700_890_NS17counting_iteratorIjNS4_11use_defaultES6_S6_EEPdNS4_4plusIdEE11estimate_esdiEE9cudaErrorPvRmT_T0_T4_T1_T2_T3_P11CUstream_stE21__cub_nvtx3_func_name, @gnu_unique_object
	.size	_ZGVZN3cub17CUB_200700_890_NS12DeviceReduce15TransformReduceIN6thrust20THRUST_200700_890_NS17counting_iteratorIjNS4_11use_defaultES6_S6_EEPdNS4_4plusIdEE11estimate_esdiEE9cudaErrorPvRmT_T0_T4_T1_T2_T3_P11CUstream_stE21__cub_nvtx3_func_name, 8
_ZGVZN3cub17CUB_200700_890_NS12DeviceReduce15TransformReduceIN6thrust20THRUST_200700_890_NS17counting_iteratorIjNS4_11use_defaultES6_S6_EEPdNS4_4plusIdEE11estimate_esdiEE9cudaErrorPvRmT_T0_T4_T1_T2_T3_P11CUstream_stE21__cub_nvtx3_func_name:
	.zero	8
	.weak	_ZZN3cub17CUB_200700_890_NS12DeviceReduce15TransformReduceIN6thrust20THRUST_200700_890_NS17counting_iteratorIjNS4_11use_defaultES6_S6_EEPdNS4_4plusIdEE11estimate_esdiEE9cudaErrorPvRmT_T0_T4_T1_T2_T3_P11CUstream_stE21__cub_nvtx3_func_name
	.section	.bss._ZZN3cub17CUB_200700_890_NS12DeviceReduce15TransformReduceIN6thrust20THRUST_200700_890_NS17counting_iteratorIjNS4_11use_defaultES6_S6_EEPdNS4_4plusIdEE11estimate_esdiEE9cudaErrorPvRmT_T0_T4_T1_T2_T3_P11CUstream_stE21__cub_nvtx3_func_name,"awG",@nobits,_ZZN3cub17CUB_200700_890_NS12DeviceReduce15TransformReduceIN6thrust20THRUST_200700_890_NS17counting_iteratorIjNS4_11use_defaultES6_S6_EEPdNS4_4plusIdEE11estimate_esdiEE9cudaErrorPvRmT_T0_T4_T1_T2_T3_P11CUstream_stE21__cub_nvtx3_func_name,comdat
	.align 8
	.type	_ZZN3cub17CUB_200700_890_NS12DeviceReduce15TransformReduceIN6thrust20THRUST_200700_890_NS17counting_iteratorIjNS4_11use_defaultES6_S6_EEPdNS4_4plusIdEE11estimate_esdiEE9cudaErrorPvRmT_T0_T4_T1_T2_T3_P11CUstream_stE21__cub_nvtx3_func_name, @gnu_unique_object
	.size	_ZZN3cub17CUB_200700_890_NS12DeviceReduce15TransformReduceIN6thrust20THRUST_200700_890_NS17counting_iteratorIjNS4_11use_defaultES6_S6_EEPdNS4_4plusIdEE11estimate_esdiEE9cudaErrorPvRmT_T0_T4_T1_T2_T3_P11CUstream_stE21__cub_nvtx3_func_name, 8
_ZZN3cub17CUB_200700_890_NS12DeviceReduce15TransformReduceIN6thrust20THRUST_200700_890_NS17counting_iteratorIjNS4_11use_defaultES6_S6_EEPdNS4_4plusIdEE11estimate_esdiEE9cudaErrorPvRmT_T0_T4_T1_T2_T3_P11CUstream_stE21__cub_nvtx3_func_name:
	.zero	8
	.weak	_ZGVZN3cub17CUB_200700_890_NS26GetPerDeviceAttributeCacheINS0_18PtxVersionCacheTagEEERNS0_23PerDeviceAttributeCacheEvE5cache
	.section	.bss._ZGVZN3cub17CUB_200700_890_NS26GetPerDeviceAttributeCacheINS0_18PtxVersionCacheTagEEERNS0_23PerDeviceAttributeCacheEvE5cache,"awG",@nobits,_ZGVZN3cub17CUB_200700_890_NS26GetPerDeviceAttributeCacheINS0_18PtxVersionCacheTagEEERNS0_23PerDeviceAttributeCacheEvE5cache,comdat
	.align 8
	.type	_ZGVZN3cub17CUB_200700_890_NS26GetPerDeviceAttributeCacheINS0_18PtxVersionCacheTagEEERNS0_23PerDeviceAttributeCacheEvE5cache, @gnu_unique_object
	.size	_ZGVZN3cub17CUB_200700_890_NS26GetPerDeviceAttributeCacheINS0_18PtxVersionCacheTagEEERNS0_23PerDeviceAttributeCacheEvE5cache, 8
_ZGVZN3cub17CUB_200700_890_NS26GetPerDeviceAttributeCacheINS0_18PtxVersionCacheTagEEERNS0_23PerDeviceAttributeCacheEvE5cache:
	.zero	8
	.weak	_ZZN3cub17CUB_200700_890_NS26GetPerDeviceAttributeCacheINS0_18PtxVersionCacheTagEEERNS0_23PerDeviceAttributeCacheEvE5cache
	.section	.bss._ZZN3cub17CUB_200700_890_NS26GetPerDeviceAttributeCacheINS0_18PtxVersionCacheTagEEERNS0_23PerDeviceAttributeCacheEvE5cache,"awG",@nobits,_ZZN3cub17CUB_200700_890_NS26GetPerDeviceAttributeCacheINS0_18PtxVersionCacheTagEEERNS0_23PerDeviceAttributeCacheEvE5cache,comdat
	.align 32
	.type	_ZZN3cub17CUB_200700_890_NS26GetPerDeviceAttributeCacheINS0_18PtxVersionCacheTagEEERNS0_23PerDeviceAttributeCacheEvE5cache, @gnu_unique_object
	.size	_ZZN3cub17CUB_200700_890_NS26GetPerDeviceAttributeCacheINS0_18PtxVersionCacheTagEEERNS0_23PerDeviceAttributeCacheEvE5cache, 1536
_ZZN3cub17CUB_200700_890_NS26GetPerDeviceAttributeCacheINS0_18PtxVersionCacheTagEEERNS0_23PerDeviceAttributeCacheEvE5cache:
	.zero	1536
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.local	_ZL6g_seed
	.comm	_ZL6g_seed,8,8
	.section	.rodata
	.type	_ZN6thrust20THRUST_200700_890_NS8cuda_cubL10par_nosyncE, @object
	.size	_ZN6thrust20THRUST_200700_890_NS8cuda_cubL10par_nosyncE, 1
_ZN6thrust20THRUST_200700_890_NS8cuda_cubL10par_nosyncE:
	.zero	1
	.type	_ZN6thrust20THRUST_200700_890_NS8cuda_cubL3parE, @object
	.size	_ZN6thrust20THRUST_200700_890_NS8cuda_cubL3parE, 1
_ZN6thrust20THRUST_200700_890_NS8cuda_cubL3parE:
	.zero	1
	.type	_ZN6thrust20THRUST_200700_890_NSL3seqE, @object
	.size	_ZN6thrust20THRUST_200700_890_NSL3seqE, 1
_ZN6thrust20THRUST_200700_890_NSL3seqE:
	.zero	1
	.weak	_ZGVZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEvE6result
	.section	.bss._ZGVZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEvE6result,"awG",@nobits,_ZGVZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEvE6result,comdat
	.align 8
	.type	_ZGVZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEvE6result, @gnu_unique_object
	.size	_ZGVZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEvE6result, 8
_ZGVZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEvE6result:
	.zero	8
	.weak	_ZZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEvE6result
	.section	.bss._ZZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEvE6result,"awG",@nobits,_ZZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEvE6result,comdat
	.align 8
	.type	_ZZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEvE6result, @gnu_unique_object
	.size	_ZZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEvE6result, 8
_ZZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEvE6result:
	.zero	8
	.weak	_ZGVZN6thrust20THRUST_200700_890_NS6system15system_categoryEvE6result
	.section	.bss._ZGVZN6thrust20THRUST_200700_890_NS6system15system_categoryEvE6result,"awG",@nobits,_ZGVZN6thrust20THRUST_200700_890_NS6system15system_categoryEvE6result,comdat
	.align 8
	.type	_ZGVZN6thrust20THRUST_200700_890_NS6system15system_categoryEvE6result, @gnu_unique_object
	.size	_ZGVZN6thrust20THRUST_200700_890_NS6system15system_categoryEvE6result, 8
_ZGVZN6thrust20THRUST_200700_890_NS6system15system_categoryEvE6result:
	.zero	8
	.weak	_ZZN6thrust20THRUST_200700_890_NS6system15system_categoryEvE6result
	.section	.bss._ZZN6thrust20THRUST_200700_890_NS6system15system_categoryEvE6result,"awG",@nobits,_ZZN6thrust20THRUST_200700_890_NS6system15system_categoryEvE6result,comdat
	.align 8
	.type	_ZZN6thrust20THRUST_200700_890_NS6system15system_categoryEvE6result, @gnu_unique_object
	.size	_ZZN6thrust20THRUST_200700_890_NS6system15system_categoryEvE6result, 8
_ZZN6thrust20THRUST_200700_890_NS6system15system_categoryEvE6result:
	.zero	8
	.weak	_ZGVZN6thrust20THRUST_200700_890_NS6system16generic_categoryEvE6result
	.section	.bss._ZGVZN6thrust20THRUST_200700_890_NS6system16generic_categoryEvE6result,"awG",@nobits,_ZGVZN6thrust20THRUST_200700_890_NS6system16generic_categoryEvE6result,comdat
	.align 8
	.type	_ZGVZN6thrust20THRUST_200700_890_NS6system16generic_categoryEvE6result, @gnu_unique_object
	.size	_ZGVZN6thrust20THRUST_200700_890_NS6system16generic_categoryEvE6result, 8
_ZGVZN6thrust20THRUST_200700_890_NS6system16generic_categoryEvE6result:
	.zero	8
	.weak	_ZZN6thrust20THRUST_200700_890_NS6system16generic_categoryEvE6result
	.section	.bss._ZZN6thrust20THRUST_200700_890_NS6system16generic_categoryEvE6result,"awG",@nobits,_ZZN6thrust20THRUST_200700_890_NS6system16generic_categoryEvE6result,comdat
	.align 8
	.type	_ZZN6thrust20THRUST_200700_890_NS6system16generic_categoryEvE6result, @gnu_unique_object
	.size	_ZZN6thrust20THRUST_200700_890_NS6system16generic_categoryEvE6result, 8
_ZZN6thrust20THRUST_200700_890_NS6system16generic_categoryEvE6result:
	.zero	8
	.weak	_ZGVZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11EiE11unknown_err
	.section	.bss._ZGVZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11EiE11unknown_err,"awG",@nobits,_ZGVZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11EiE11unknown_err,comdat
	.align 8
	.type	_ZGVZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11EiE11unknown_err, @gnu_unique_object
	.size	_ZGVZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11EiE11unknown_err, 8
_ZGVZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11EiE11unknown_err:
	.zero	8
	.weak	_ZZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11EiE11unknown_err
	.section	.bss._ZZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11EiE11unknown_err,"awG",@nobits,_ZZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11EiE11unknown_err,comdat
	.align 32
	.type	_ZZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11EiE11unknown_err, @gnu_unique_object
	.size	_ZZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11EiE11unknown_err, 32
_ZZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11EiE11unknown_err:
	.zero	32
	.weak	_ZGVZN3cub17CUB_200700_890_NS22DeviceCountCachedValueEvE5count
	.section	.bss._ZGVZN3cub17CUB_200700_890_NS22DeviceCountCachedValueEvE5count,"awG",@nobits,_ZGVZN3cub17CUB_200700_890_NS22DeviceCountCachedValueEvE5count,comdat
	.align 8
	.type	_ZGVZN3cub17CUB_200700_890_NS22DeviceCountCachedValueEvE5count, @gnu_unique_object
	.size	_ZGVZN3cub17CUB_200700_890_NS22DeviceCountCachedValueEvE5count, 8
_ZGVZN3cub17CUB_200700_890_NS22DeviceCountCachedValueEvE5count:
	.zero	8
	.weak	_ZZN3cub17CUB_200700_890_NS22DeviceCountCachedValueEvE5count
	.section	.bss._ZZN3cub17CUB_200700_890_NS22DeviceCountCachedValueEvE5count,"awG",@nobits,_ZZN3cub17CUB_200700_890_NS22DeviceCountCachedValueEvE5count,comdat
	.align 4
	.type	_ZZN3cub17CUB_200700_890_NS22DeviceCountCachedValueEvE5count, @gnu_unique_object
	.size	_ZZN3cub17CUB_200700_890_NS22DeviceCountCachedValueEvE5count, 4
_ZZN3cub17CUB_200700_890_NS22DeviceCountCachedValueEvE5count:
	.zero	4
	.weak	_ZN4cuda3std3__47nulloptE
	.section	.rodata._ZN4cuda3std3__47nulloptE,"aG",@progbits,_ZN4cuda3std3__47nulloptE,comdat
	.type	_ZN4cuda3std3__47nulloptE, @gnu_unique_object
	.size	_ZN4cuda3std3__47nulloptE, 1
_ZN4cuda3std3__47nulloptE:
	.zero	1
	.hidden	InitializeInjectionNvtx2_fnptr
	.weak	InitializeInjectionNvtx2_fnptr
	.bss
	.align 8
	.type	InitializeInjectionNvtx2_fnptr, @object
	.size	InitializeInjectionNvtx2_fnptr, 8
InitializeInjectionNvtx2_fnptr:
	.zero	8
	.hidden	nvtxGlobals_v3
	.weak	nvtxGlobals_v3
	.section	.data.rel.local,"aw"
	.align 32
	.type	nvtxGlobals_v3, @object
	.size	nvtxGlobals_v3, 1168
nvtxGlobals_v3:
	.long	0
	.zero	4
	.quad	16
	.quad	nvtxEtiGetModuleFunctionTable_v3
	.quad	24
	.long	3
	.long	0
	.quad	nvtxEtiSetInjectionNvtxVersion_v3
	.quad	nvtxMarkEx_impl_init_v3
	.quad	nvtxMarkA_impl_init_v3
	.quad	nvtxMarkW_impl_init_v3
	.quad	nvtxRangeStartEx_impl_init_v3
	.quad	nvtxRangeStartA_impl_init_v3
	.quad	nvtxRangeStartW_impl_init_v3
	.quad	nvtxRangeEnd_impl_init_v3
	.quad	nvtxRangePushEx_impl_init_v3
	.quad	nvtxRangePushA_impl_init_v3
	.quad	nvtxRangePushW_impl_init_v3
	.quad	nvtxRangePop_impl_init_v3
	.quad	nvtxNameCategoryA_impl_init_v3
	.quad	nvtxNameCategoryW_impl_init_v3
	.quad	nvtxNameOsThreadA_impl_init_v3
	.quad	nvtxNameOsThreadW_impl_init_v3
	.quad	nvtxNameCuDeviceA_impl_init_v3
	.quad	nvtxNameCuDeviceW_impl_init_v3
	.quad	nvtxNameCuContextA_impl_init_v3
	.quad	nvtxNameCuContextW_impl_init_v3
	.quad	nvtxNameCuStreamA_impl_init_v3
	.quad	nvtxNameCuStreamW_impl_init_v3
	.quad	nvtxNameCuEventA_impl_init_v3
	.quad	nvtxNameCuEventW_impl_init_v3
	.quad	nvtxNameClDeviceA_impl_init_v3
	.quad	nvtxNameClDeviceW_impl_init_v3
	.quad	nvtxNameClContextA_impl_init_v3
	.quad	nvtxNameClContextW_impl_init_v3
	.quad	nvtxNameClCommandQueueA_impl_init_v3
	.quad	nvtxNameClCommandQueueW_impl_init_v3
	.quad	nvtxNameClMemObjectA_impl_init_v3
	.quad	nvtxNameClMemObjectW_impl_init_v3
	.quad	nvtxNameClSamplerA_impl_init_v3
	.quad	nvtxNameClSamplerW_impl_init_v3
	.quad	nvtxNameClProgramA_impl_init_v3
	.quad	nvtxNameClProgramW_impl_init_v3
	.quad	nvtxNameClEventA_impl_init_v3
	.quad	nvtxNameClEventW_impl_init_v3
	.quad	nvtxNameCudaDeviceA_impl_init_v3
	.quad	nvtxNameCudaDeviceW_impl_init_v3
	.quad	nvtxNameCudaStreamA_impl_init_v3
	.quad	nvtxNameCudaStreamW_impl_init_v3
	.quad	nvtxNameCudaEventA_impl_init_v3
	.quad	nvtxNameCudaEventW_impl_init_v3
	.quad	nvtxDomainMarkEx_impl_init_v3
	.quad	nvtxDomainRangeStartEx_impl_init_v3
	.quad	nvtxDomainRangeEnd_impl_init_v3
	.quad	nvtxDomainRangePushEx_impl_init_v3
	.quad	nvtxDomainRangePop_impl_init_v3
	.quad	nvtxDomainResourceCreate_impl_init_v3
	.quad	nvtxDomainResourceDestroy_impl_init_v3
	.quad	nvtxDomainNameCategoryA_impl_init_v3
	.quad	nvtxDomainNameCategoryW_impl_init_v3
	.quad	nvtxDomainRegisterStringA_impl_init_v3
	.quad	nvtxDomainRegisterStringW_impl_init_v3
	.quad	nvtxDomainCreateA_impl_init_v3
	.quad	nvtxDomainCreateW_impl_init_v3
	.quad	nvtxDomainDestroy_impl_init_v3
	.quad	nvtxInitialize_impl_init_v3
	.quad	nvtxDomainSyncUserCreate_impl_init_v3
	.quad	nvtxDomainSyncUserDestroy_impl_init_v3
	.quad	nvtxDomainSyncUserAcquireStart_impl_init_v3
	.quad	nvtxDomainSyncUserAcquireFailed_impl_init_v3
	.quad	nvtxDomainSyncUserAcquireSuccess_impl_init_v3
	.quad	nvtxDomainSyncUserReleasing_impl_init_v3
	.quad	0
	.quad	nvtxGlobals_v3+48
	.quad	nvtxGlobals_v3+56
	.quad	nvtxGlobals_v3+64
	.quad	nvtxGlobals_v3+72
	.quad	nvtxGlobals_v3+80
	.quad	nvtxGlobals_v3+88
	.quad	nvtxGlobals_v3+96
	.quad	nvtxGlobals_v3+104
	.quad	nvtxGlobals_v3+112
	.quad	nvtxGlobals_v3+120
	.quad	nvtxGlobals_v3+128
	.quad	nvtxGlobals_v3+136
	.quad	nvtxGlobals_v3+144
	.quad	nvtxGlobals_v3+152
	.quad	nvtxGlobals_v3+160
	.quad	0
	.quad	0
	.quad	nvtxGlobals_v3+168
	.quad	nvtxGlobals_v3+176
	.quad	nvtxGlobals_v3+184
	.quad	nvtxGlobals_v3+192
	.quad	nvtxGlobals_v3+200
	.quad	nvtxGlobals_v3+208
	.quad	nvtxGlobals_v3+216
	.quad	nvtxGlobals_v3+224
	.quad	0
	.quad	0
	.quad	nvtxGlobals_v3+232
	.quad	nvtxGlobals_v3+240
	.quad	nvtxGlobals_v3+248
	.quad	nvtxGlobals_v3+256
	.quad	nvtxGlobals_v3+264
	.quad	nvtxGlobals_v3+272
	.quad	nvtxGlobals_v3+280
	.quad	nvtxGlobals_v3+288
	.quad	nvtxGlobals_v3+296
	.quad	nvtxGlobals_v3+304
	.quad	nvtxGlobals_v3+312
	.quad	nvtxGlobals_v3+320
	.quad	nvtxGlobals_v3+328
	.quad	nvtxGlobals_v3+336
	.quad	0
	.quad	0
	.quad	nvtxGlobals_v3+344
	.quad	nvtxGlobals_v3+352
	.quad	nvtxGlobals_v3+360
	.quad	nvtxGlobals_v3+368
	.quad	nvtxGlobals_v3+376
	.quad	nvtxGlobals_v3+384
	.quad	0
	.quad	0
	.quad	nvtxGlobals_v3+392
	.quad	nvtxGlobals_v3+400
	.quad	nvtxGlobals_v3+408
	.quad	nvtxGlobals_v3+416
	.quad	nvtxGlobals_v3+424
	.quad	nvtxGlobals_v3+432
	.quad	nvtxGlobals_v3+440
	.quad	nvtxGlobals_v3+448
	.quad	nvtxGlobals_v3+456
	.quad	nvtxGlobals_v3+464
	.quad	nvtxGlobals_v3+472
	.quad	nvtxGlobals_v3+480
	.quad	nvtxGlobals_v3+488
	.quad	nvtxGlobals_v3+496
	.quad	nvtxGlobals_v3+504
	.quad	0
	.quad	0
	.quad	nvtxGlobals_v3+512
	.quad	nvtxGlobals_v3+520
	.quad	nvtxGlobals_v3+528
	.quad	nvtxGlobals_v3+536
	.quad	nvtxGlobals_v3+544
	.quad	nvtxGlobals_v3+552
	.quad	0
	.weak	_ZN4cuda3std3__420unreachable_sentinelE
	.section	.rodata._ZN4cuda3std3__420unreachable_sentinelE,"aG",@progbits,_ZN4cuda3std3__420unreachable_sentinelE,comdat
	.type	_ZN4cuda3std3__420unreachable_sentinelE, @gnu_unique_object
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_ZN4cuda3std3__420unreachable_sentinelE:
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_ZN4cuda3std3__45__cpo5crendE:
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	.type	_ZN4cuda3std3__45__cpo7crbeginE, @gnu_unique_object
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_ZN4cuda3std3__45__cpo7crbeginE:
	.zero	1
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_ZN4cuda3std3__45__cpo4rendE:
	.zero	1
	.weak	_ZN4cuda3std3__45__cpo6rbeginE
	.section	.rodata._ZN4cuda3std3__45__cpo6rbeginE,"aG",@progbits,_ZN4cuda3std3__45__cpo6rbeginE,comdat
	.type	_ZN4cuda3std3__45__cpo6rbeginE, @gnu_unique_object
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_ZN4cuda3std3__45__cpo6rbeginE:
	.zero	1
	.weak	_ZN4cuda3std6ranges3__45__cpo8distanceE
	.section	.rodata._ZN4cuda3std6ranges3__45__cpo8distanceE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo8distanceE,comdat
	.type	_ZN4cuda3std6ranges3__45__cpo8distanceE, @gnu_unique_object
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_ZN4cuda3std6ranges3__45__cpo8distanceE:
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	.section	.rodata._ZN4cuda3std6ranges3__45__cpo5ssizeE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo5ssizeE,comdat
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_ZN4cuda3std6ranges3__45__cpo5ssizeE:
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	.section	.rodata._ZN4cuda3std6ranges3__45__cpo4sizeE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo4sizeE,comdat
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_ZN4cuda3std6ranges3__45__cpo4sizeE:
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	.section	.rodata._ZN4cuda3std6ranges3__45__cpo5cdataE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo5cdataE,comdat
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_ZN4cuda3std6ranges3__45__cpo5cdataE:
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	.weak	_ZN4cuda3std6ranges3__45__cpo4dataE
	.section	.rodata._ZN4cuda3std6ranges3__45__cpo4dataE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo4dataE,comdat
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_ZN4cuda3std6ranges3__45__cpo4dataE:
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	.weak	_ZN4cuda3std6ranges3__45__cpo4prevE
	.section	.rodata._ZN4cuda3std6ranges3__45__cpo4prevE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo4prevE,comdat
	.type	_ZN4cuda3std6ranges3__45__cpo4prevE, @gnu_unique_object
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_ZN4cuda3std6ranges3__45__cpo4prevE:
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	.weak	_ZN4cuda3std6ranges3__45__cpo4nextE
	.section	.rodata._ZN4cuda3std6ranges3__45__cpo4nextE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo4nextE,comdat
	.type	_ZN4cuda3std6ranges3__45__cpo4nextE, @gnu_unique_object
	.size	_ZN4cuda3std6ranges3__45__cpo4nextE, 1
_ZN4cuda3std6ranges3__45__cpo4nextE:
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	.section	.rodata._ZN4cuda3std6ranges3__45__cpo9iter_swapE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo9iter_swapE,comdat
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_ZN4cuda3std6ranges3__45__cpo9iter_swapE:
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	.section	.rodata._ZN4cuda3std6ranges3__45__cpo4cendE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo4cendE,comdat
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_ZN4cuda3std6ranges3__45__cpo4cendE:
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	.section	.rodata._ZN4cuda3std6ranges3__45__cpo6cbeginE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo6cbeginE,comdat
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_ZN4cuda3std6ranges3__45__cpo6cbeginE:
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	.section	.rodata._ZN4cuda3std6ranges3__45__cpo3endE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo3endE,comdat
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_ZN4cuda3std6ranges3__45__cpo3endE:
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_ZN4cuda3std6ranges3__45__cpo5beginE:
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	.section	.rodata
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_ZN6thrust20THRUST_200700_890_NS12placeholdersL3_10E:
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_ZN6thrust20THRUST_200700_890_NS6system6detail10sequentialL3seqE:
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	.section	.rodata._ZN4cuda3std6ranges3__45__cpo7advanceE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo7advanceE,comdat
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_ZN4cuda3std6ranges3__45__cpo7advanceE:
	.zero	1
	.hidden	_ZN4cuda3std3__445_GLOBAL__N__da32596e_12_es_thrust_cu__Z4hashj6ignoreE
	.weak	_ZN4cuda3std3__445_GLOBAL__N__da32596e_12_es_thrust_cu__Z4hashj6ignoreE
	.section	.rodata._ZN4cuda3std3__445_GLOBAL__N__da32596e_12_es_thrust_cu__Z4hashj6ignoreE,"aG",@progbits,_ZN4cuda3std3__445_GLOBAL__N__da32596e_12_es_thrust_cu__Z4hashj6ignoreE,comdat
	.type	_ZN4cuda3std3__445_GLOBAL__N__da32596e_12_es_thrust_cu__Z4hashj6ignoreE, @gnu_unique_object
	.size	_ZN4cuda3std3__445_GLOBAL__N__da32596e_12_es_thrust_cu__Z4hashj6ignoreE, 1
_ZN4cuda3std3__445_GLOBAL__N__da32596e_12_es_thrust_cu__Z4hashj6ignoreE:
	.zero	1
	.weak	_ZN4cuda3std3__48in_placeE
	.section	.rodata._ZN4cuda3std3__48in_placeE,"aG",@progbits,_ZN4cuda3std3__48in_placeE,comdat
	.type	_ZN4cuda3std3__48in_placeE, @gnu_unique_object
	.size	_ZN4cuda3std3__48in_placeE, 1
_ZN4cuda3std3__48in_placeE:
	.zero	1
	.weak	_ZN4cuda3std3__45__cpo4cendE
	.section	.rodata._ZN4cuda3std3__45__cpo4cendE,"aG",@progbits,_ZN4cuda3std3__45__cpo4cendE,comdat
	.type	_ZN4cuda3std3__45__cpo4cendE, @gnu_unique_object
	.size	_ZN4cuda3std3__45__cpo4cendE, 1
_ZN4cuda3std3__45__cpo4cendE:
	.zero	1
	.weak	_ZN4cuda3std3__45__cpo6cbeginE
	.section	.rodata._ZN4cuda3std3__45__cpo6cbeginE,"aG",@progbits,_ZN4cuda3std3__45__cpo6cbeginE,comdat
	.type	_ZN4cuda3std3__45__cpo6cbeginE, @gnu_unique_object
	.size	_ZN4cuda3std3__45__cpo6cbeginE, 1
_ZN4cuda3std3__45__cpo6cbeginE:
	.zero	1
	.weak	_ZN4cuda3std3__45__cpo3endE
	.section	.rodata._ZN4cuda3std3__45__cpo3endE,"aG",@progbits,_ZN4cuda3std3__45__cpo3endE,comdat
	.type	_ZN4cuda3std3__45__cpo3endE, @gnu_unique_object
	.size	_ZN4cuda3std3__45__cpo3endE, 1
_ZN4cuda3std3__45__cpo3endE:
	.zero	1
	.weak	_ZN4cuda3std3__45__cpo5beginE
	.section	.rodata._ZN4cuda3std3__45__cpo5beginE,"aG",@progbits,_ZN4cuda3std3__45__cpo5beginE,comdat
	.type	_ZN4cuda3std3__45__cpo5beginE, @gnu_unique_object
	.size	_ZN4cuda3std3__45__cpo5beginE, 1
_ZN4cuda3std3__45__cpo5beginE:
	.zero	1
	.weak	_ZN4cuda3std3__419piecewise_constructE
	.section	.rodata._ZN4cuda3std3__419piecewise_constructE,"aG",@progbits,_ZN4cuda3std3__419piecewise_constructE,comdat
	.type	_ZN4cuda3std3__419piecewise_constructE, @gnu_unique_object
	.size	_ZN4cuda3std3__419piecewise_constructE, 1
_ZN4cuda3std3__419piecewise_constructE:
	.zero	1
	.weak	_ZN4cuda3std6ranges3__45__cpo9iter_moveE
	.section	.rodata._ZN4cuda3std6ranges3__45__cpo9iter_moveE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo9iter_moveE,comdat
	.type	_ZN4cuda3std6ranges3__45__cpo9iter_moveE, @gnu_unique_object
	.size	_ZN4cuda3std6ranges3__45__cpo9iter_moveE, 1
_ZN4cuda3std6ranges3__45__cpo9iter_moveE:
	.zero	1
	.weak	_ZN4cuda3std6ranges3__45__cpo4swapE
	.section	.rodata._ZN4cuda3std6ranges3__45__cpo4swapE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo4swapE,comdat
	.type	_ZN4cuda3std6ranges3__45__cpo4swapE, @gnu_unique_object
	.size	_ZN4cuda3std6ranges3__45__cpo4swapE, 1
_ZN4cuda3std6ranges3__45__cpo4swapE:
	.zero	1
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC69:
	.long	0
	.long	1079574528
	.align 8
.LC75:
	.long	0
	.long	1055916032
	.align 8
.LC76:
	.long	0
	.long	1076363264
	.align 8
.LC77:
	.long	0
	.long	1104006501
	.hidden	DW.ref.__gxx_personality_v0
	.weak	DW.ref.__gxx_personality_v0
	.section	.data.rel.local.DW.ref.__gxx_personality_v0,"awG",@progbits,DW.ref.__gxx_personality_v0,comdat
	.align 8
	.type	DW.ref.__gxx_personality_v0, @object
	.size	DW.ref.__gxx_personality_v0, 8
DW.ref.__gxx_personality_v0:
	.quad	__gxx_personality_v0
	.hidden	__dso_handle
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

// sudo apt install nvidia-cuda-toolkit
// nvcc -O3 -std=c++11 es_thrust.cu -o es_thrust
//

#include <hip/hip_runtime.h>
#include <thrust/iterator/counting_iterator.h>
#include <thrust/functional.h>
#include <thrust/transform_reduce.h>
#include <iostream>
#include <iomanip>
#include <cmath>
#include <chrono>

const unsigned power_of_4 = 8;
const unsigned numGroups = 1 << 2 * power_of_4;

__constant__ uint64_t g_seed[1];

__device__
unsigned hash(unsigned a)
{
  a = (a+0x7ed55d16) + (a<<12);
  a = (a^0xc761c23c) ^ (a>>19);
  a = (a+0x165667b1) + (a<<5);
  a = (a+0xd3a2646c) ^ (a<<9);
  a = (a+0xfd7046c5) + (a<<3);
  a = (a^0xb55a4f09) ^ (a>>16);
  return a;
}

// Adopted from http://prng.di.unimi.it/xoshiro256plus.c
__device__
double xoshiro256plus(uint64_t s[4]) {
  const uint64_t result = s[0] + s[3];
  const uint64_t t = s[1] << 17;
  s[2] ^= s[0];
  s[3] ^= s[1];
  s[1] ^= s[2];
  s[0] ^= s[3];
  s[2] ^= t;
  s[3] = (s[3] << 45) | (s[3] >> (64 - 45));
  // random_real53() from http://mumble.net/~campbell/tmp/random_real.c
  return (double)(result >> 11) / (1ULL << 53);
}

struct estimate_es : public thrust::unary_function<unsigned, double>
{
  __device__
  double operator()(unsigned thread_id)
  {
    __uint64_t prng_state[4];
    __uint64_t mask = hash(thread_id);
    for (unsigned i = 0; i < 4; i++) {
      mask = (mask << 32) | hash(mask);
      mask = (mask << 32) | hash(mask);
      prng_state[i] = g_seed[0] ^ mask;
    }
    double sum = 0;
    for (unsigned group = 0; group < numGroups; group++) {
      double x[5]; double y[5];
      for (unsigned shot = 0; shot < 5; shot++) {
        auto u = xoshiro256plus(prng_state);
        auto v = xoshiro256plus(prng_state);
        
        // Box-Muller transform
        auto r = sqrt(-2 * log(u));
        auto theta = 2 * M_PI * v;
        x[shot] = r * cos(theta);
        y[shot] = r * sin(theta);
      }
      double es2 = 0;
      for (unsigned i = 0; i < 4; i++) {
        for (unsigned j = i + 1; j < 5; j++) {
          double dx = x[i] - x[j];
          double dy = y[i] - y[j];
          double d2 = dx * dx + dy * dy;
          if (es2 < d2) {
            es2 = d2;
          }
        }
      }
      sum += sqrt(es2);
    }
    return sum / numGroups;
  }
};

int main(void)
{
  auto start_time = std::chrono::system_clock::now();
  __uint128_t mcg128_state = ((__uint128_t)time(NULL) << 1) | 1;
  double avg = 0, min = 100, max = 0;
  const unsigned nt = 12;
  for (unsigned j = 0; j < nt; j++) {
    // MCG 128 PRNG from http://www.pcg-random.org/posts/on-vignas-pcg-critique.html
    mcg128_state *= 0xda942042e4dd58b5ULL;
    uint64_t seed[1] = {(uint64_t)(mcg128_state >> 64)};
    hipMemcpyToSymbol(HIP_SYMBOL(g_seed), seed, sizeof(uint64_t));
    double r = thrust::transform_reduce(thrust::counting_iterator<unsigned>(0),
                                        thrust::counting_iterator<unsigned>(numGroups),
                                        estimate_es(),
                                        double(0),
                                        thrust::plus<double>());
    avg += r / numGroups;
    min = fmin(r / numGroups, min);
    max = fmax(r / numGroups, max);
  }
  avg /= nt;
  auto end_time = std::chrono::system_clock::now();
  std::chrono::duration<double> seconds = end_time - start_time;
  std::cout.precision(14);
  std::cout << "code,threads,power_of_4,min,avg,max,time\n";
  std::cout << "CUDA thrust," << nt << "," << power_of_4 << "," << min << "," << avg << "," << max << "," << seconds.count() << "\n";
  return 0;
}

	.text
	.file	"es_thrust.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI0_0:
	.quad	0x4059000000000000              # double 100
.LCPI0_1:
	.quad	0x3ef0000000000000              # double 1.52587890625E-5
.LCPI0_2:
	.quad	0x4028000000000000              # double 12
.LCPI0_3:
	.quad	0x41cdcd6500000000              # double 1.0E+9
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	xorl	%edi, %edi
	callq	time
	movq	%rax, %rbp
	sarq	$63, %rbp
	shldq	$1, %rax, %rbp
	leaq	1(,%rax,2), %r13
	movsd	.LCPI0_0(%rip), %xmm0           # xmm0 = mem[0],zero
	movapd	%xmm0, 32(%rsp)                 # 16-byte Spill
	xorpd	%xmm3, %xmm3
	movl	$12, %ebx
	movabsq	$-2696494805208442699, %r14     # imm = 0xDA942042E4DD58B5
	leaq	7(%rsp), %r15
	leaq	64(%rsp), %r12
	xorpd	%xmm0, %xmm0
	movsd	%xmm0, 24(%rsp)                 # 8-byte Spill
.LBB0_1:                                # =>This Inner Loop Header: Depth=1
	movsd	%xmm3, 8(%rsp)                  # 8-byte Spill
	movq	%r13, %rax
	mulq	%r14
	imulq	%r14, %rbp
	addq	%rdx, %rbp
	movq	%rbp, 56(%rsp)
	movq	%rax, %r13
	movl	$g_seed, %edi
	movl	$8, %edx
	leaq	56(%rsp), %rsi
	xorl	%ecx, %ecx
	movl	$1, %r8d
	callq	hipMemcpyToSymbol
	movl	$0, 64(%rsp)
	movl	$65536, %edx                    # imm = 0x10000
	xorpd	%xmm0, %xmm0
	movq	%r15, %rdi
	movq	%r12, %rsi
	callq	_ZZN6thrust11hip_rocprim8reduce_nINS0_3tagENS0_26transform_input_iterator_tIdNS_17counting_iteratorIjNS_11use_defaultES5_S5_EE11estimate_esEEldNS_4plusIdEEEET2_RNS0_16execution_policyIT_EET0_T1_SB_T3_EN10workaround3parERNSC_IS2_EES8_ldSA_
	mulsd	.LCPI0_1(%rip), %xmm0
	ucomisd	%xmm0, %xmm0
	jp	.LBB0_3
# %bb.2:                                #   in Loop: Header=BB0_1 Depth=1
	movsd	24(%rsp), %xmm1                 # 8-byte Reload
                                        # xmm1 = mem[0],zero
	maxsd	%xmm0, %xmm1
	movsd	%xmm1, 24(%rsp)                 # 8-byte Spill
.LBB0_3:                                #   in Loop: Header=BB0_1 Depth=1
	movsd	8(%rsp), %xmm3                  # 8-byte Reload
                                        # xmm3 = mem[0],zero
	addsd	%xmm0, %xmm3
	movapd	32(%rsp), %xmm4                 # 16-byte Reload
	movapd	%xmm4, %xmm1
	minsd	%xmm0, %xmm1
	cmpunordsd	%xmm0, %xmm0
	movapd	%xmm0, %xmm2
	andnpd	%xmm1, %xmm2
	andpd	%xmm4, %xmm0
	orpd	%xmm2, %xmm0
	movapd	%xmm0, 32(%rsp)                 # 16-byte Spill
	decl	%ebx
	jne	.LBB0_1
# %bb.4:
	divsd	.LCPI0_2(%rip), %xmm3
	movsd	%xmm3, 8(%rsp)                  # 8-byte Spill
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	subq	16(%rsp), %rax                  # 8-byte Folded Reload
	xorps	%xmm0, %xmm0
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI0_3(%rip), %xmm0
	movsd	%xmm0, 16(%rsp)                 # 8-byte Spill
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rax
	movq	$14, _ZSt4cout+8(%rax)
	movl	$_ZSt4cout, %edi
	movl	$.L.str, %esi
	movl	$41, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.1, %esi
	movl	$12, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$12, %esi
	callq	_ZNSo9_M_insertImEERSoT_
	movq	%rax, %rbx
	movl	$.L.str.2, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$8, %esi
	movq	%rbx, %rdi
	callq	_ZNSo9_M_insertImEERSoT_
	movq	%rax, %rbx
	movl	$.L.str.2, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%rbx, %rdi
	movaps	32(%rsp), %xmm0                 # 16-byte Reload
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbx
	movl	$.L.str.2, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%rbx, %rdi
	movsd	8(%rsp), %xmm0                  # 8-byte Reload
                                        # xmm0 = mem[0],zero
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbx
	movl	$.L.str.2, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%rbx, %rdi
	movsd	24(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbx
	movl	$.L.str.2, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%rbx, %rdi
	movsd	16(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	callq	_ZNSo9_M_insertIdEERSoT_
	movl	$.L.str.3, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	xorl	%eax, %eax
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	main, .Lfunc_end0-main
	.cfi_endproc
                                        # -- End function
	.section	.text._ZZN6thrust11hip_rocprim8reduce_nINS0_3tagENS0_26transform_input_iterator_tIdNS_17counting_iteratorIjNS_11use_defaultES5_S5_EE11estimate_esEEldNS_4plusIdEEEET2_RNS0_16execution_policyIT_EET0_T1_SB_T3_EN10workaround3parERNSC_IS2_EES8_ldSA_,"axG",@progbits,_ZZN6thrust11hip_rocprim8reduce_nINS0_3tagENS0_26transform_input_iterator_tIdNS_17counting_iteratorIjNS_11use_defaultES5_S5_EE11estimate_esEEldNS_4plusIdEEEET2_RNS0_16execution_policyIT_EET0_T1_SB_T3_EN10workaround3parERNSC_IS2_EES8_ldSA_,comdat
	.weak	_ZZN6thrust11hip_rocprim8reduce_nINS0_3tagENS0_26transform_input_iterator_tIdNS_17counting_iteratorIjNS_11use_defaultES5_S5_EE11estimate_esEEldNS_4plusIdEEEET2_RNS0_16execution_policyIT_EET0_T1_SB_T3_EN10workaround3parERNSC_IS2_EES8_ldSA_ # -- Begin function _ZZN6thrust11hip_rocprim8reduce_nINS0_3tagENS0_26transform_input_iterator_tIdNS_17counting_iteratorIjNS_11use_defaultES5_S5_EE11estimate_esEEldNS_4plusIdEEEET2_RNS0_16execution_policyIT_EET0_T1_SB_T3_EN10workaround3parERNSC_IS2_EES8_ldSA_
	.p2align	1, 0x90
	.type	_ZZN6thrust11hip_rocprim8reduce_nINS0_3tagENS0_26transform_input_iterator_tIdNS_17counting_iteratorIjNS_11use_defaultES5_S5_EE11estimate_esEEldNS_4plusIdEEEET2_RNS0_16execution_policyIT_EET0_T1_SB_T3_EN10workaround3parERNSC_IS2_EES8_ldSA_,@function
_ZZN6thrust11hip_rocprim8reduce_nINS0_3tagENS0_26transform_input_iterator_tIdNS_17counting_iteratorIjNS_11use_defaultES5_S5_EE11estimate_esEEldNS_4plusIdEEEET2_RNS0_16execution_policyIT_EET0_T1_SB_T3_EN10workaround3parERNSC_IS2_EES8_ldSA_: # @_ZZN6thrust11hip_rocprim8reduce_nINS0_3tagENS0_26transform_input_iterator_tIdNS_17counting_iteratorIjNS_11use_defaultES5_S5_EE11estimate_esEEldNS_4plusIdEEEET2_RNS0_16execution_policyIT_EET0_T1_SB_T3_EN10workaround3parERNSC_IS2_EES8_ldSA_
.Lfunc_begin0:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception0
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	testq	%rdx, %rdx
	je	.LBB1_18
# %bb.1:
	movq	%rdx, %r14
	movq	%rdi, %r12
	movl	(%rsi), %ebx
	leaq	24(%rsp), %rsi
	movq	$0, (%rsi)
	leaq	48(%rsp), %rdx
	movl	%ebx, (%rdx)
	movl	$0, (%rsp)
	xorl	%edi, %edi
	xorl	%ecx, %ecx
	movsd	%xmm0, 16(%rsp)                 # 8-byte Spill
	movq	%r14, %r8
	xorl	%r9d, %r9d
	callq	_ZN7rocprim6detail11reduce_implILb1ENS_14default_configEN6thrust11hip_rocprim26transform_input_iterator_tIdNS3_17counting_iteratorIjNS3_11use_defaultES7_S7_EE11estimate_esEEPddNS3_4plusIdEEEE10hipError_tPvRmT1_T2_T3_mT4_P12ihipStream_tb
	movl	%eax, %ebp
	callq	hipGetLastError
	testl	%ebp, %ebp
	jne	.LBB1_2
# %bb.7:                                # %.noexc.i
	movq	24(%rsp), %rax
	xorl	%ecx, %ecx
	testb	$7, %al
	setne	%cl
	leaq	(%rax,%rcx,8), %r15
	andq	$-8, %r15
	leaq	8(%r15), %rax
	cmpq	$5, %rax
	movl	$4, %r13d
	cmovaeq	%rax, %r13
	callq	hipGetLastError
	leaq	48(%rsp), %rbp
	movq	%r12, 40(%rsp)                  # 8-byte Spill
	movq	%r12, (%rbp)
	xorps	%xmm0, %xmm0
	movups	%xmm0, 8(%rbp)
	movq	%rbp, %rdi
	movq	%r13, %rsi
	callq	_ZN6thrust6detail19temporary_allocatorIhNS_11hip_rocprim3tagEE8allocateEm
	movq	%rax, %r12
	movq	%rax, 8(%rbp)
	movq	%r13, 16(%rbp)
.Ltmp5:
	callq	hipGetLastError
.Ltmp6:
# %bb.8:                                # %.noexc25.i
	addq	%r12, %r15
	leaq	32(%rsp), %rdx
	movl	%ebx, (%rdx)
.Ltmp7:
	movl	$0, (%rsp)
	leaq	24(%rsp), %rsi
	movq	%r12, %rdi
	movq	%r15, %rcx
	movsd	16(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	movq	%r14, %r8
	xorl	%r9d, %r9d
	callq	_ZN7rocprim6detail11reduce_implILb1ENS_14default_configEN6thrust11hip_rocprim26transform_input_iterator_tIdNS3_17counting_iteratorIjNS3_11use_defaultES7_S7_EE11estimate_esEEPddNS3_4plusIdEEEE10hipError_tPvRmT1_T2_T3_mT4_P12ihipStream_tb
.Ltmp8:
# %bb.9:
.Ltmp9:
	movl	%eax, %ebp
	callq	hipGetLastError
.Ltmp10:
# %bb.10:                               # %.noexc29.i
	testl	%ebp, %ebp
	jne	.LBB1_11
# %bb.16:                               # %_ZN6thrust11hip_rocprim14throw_on_errorE10hipError_tPKc.exit33.i
.Ltmp19:
	leaq	15(%rsp), %rsi
	leaq	32(%rsp), %r8
	movl	$1, %ecx
	movq	40(%rsp), %rdi                  # 8-byte Reload
	movq	%r15, %rdx
	callq	_ZN6thrust11hip_rocprim6__copy19cross_system_copy_nINS0_3tagENS_6system3cpp6detail3tagEPdmS8_EET3_RNS_16execution_policyIT_EERNSA_IT0_EET1_T2_S9_NS_6detail17integral_constantIbLb1EEE
.Ltmp20:
# %bb.17:
	movsd	32(%rsp), %xmm0                 # xmm0 = mem[0],zero
	movsd	%xmm0, 16(%rsp)                 # 8-byte Spill
	leaq	48(%rsp), %rdi
	callq	_ZN6thrust6detail18contiguous_storageIhNS0_18no_throw_allocatorINS0_19temporary_allocatorIhNS_11hip_rocprim3tagEEEEEED2Ev
	movsd	16(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
.LBB1_18:                               # %_ZN6thrust11hip_rocprim8__reduce6reduceINS0_3tagENS0_26transform_input_iterator_tIdNS_17counting_iteratorIjNS_11use_defaultES6_S6_EE11estimate_esEEldNS_4plusIdEEEET2_RNS0_16execution_policyIT_EET0_T1_SC_T3_.exit
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB1_2:
	.cfi_def_cfa_offset 128
	movl	$64, %edi
	callq	__cxa_allocate_exception
	movq	%rax, %rbx
.Ltmp0:
	callq	_ZN6thrust6system12hip_categoryEv
.Ltmp1:
# %bb.3:
.Ltmp2:
	movl	$.L.str.4, %ecx
	movq	%rbx, %rdi
	movl	%ebp, %esi
	movq	%rax, %rdx
	callq	_ZN6thrust6system12system_errorC2EiRKNS0_14error_categoryEPKc
.Ltmp3:
# %bb.4:
	movl	$_ZTIN6thrust6system12system_errorE, %esi
	movl	$_ZN6thrust6system12system_errorD2Ev, %edx
	movq	%rbx, %rdi
	callq	__cxa_throw
.LBB1_11:
	movl	$64, %edi
	callq	__cxa_allocate_exception
	movq	%rax, %rbx
.Ltmp11:
	callq	_ZN6thrust6system12hip_categoryEv
.Ltmp12:
# %bb.12:
.Ltmp13:
	movq	%rax, %r14
	movl	$.L.str.5, %esi
	movq	%rbx, %rdi
	callq	_ZNSt13runtime_errorC2EPKc
.Ltmp14:
# %bb.13:
	movq	$_ZTVN6thrust6system12system_errorE+16, (%rbx)
	movl	%ebp, 16(%rbx)
	movq	%r14, 24(%rbx)
	movq	%rbx, %rax
	addq	$48, %rax
	movq	%rax, 32(%rbx)
	movq	$0, 40(%rbx)
	movb	$0, 48(%rbx)
.Ltmp16:
	movl	$_ZTIN6thrust6system12system_errorE, %esi
	movl	$_ZN6thrust6system12system_errorD2Ev, %edx
	movq	%rbx, %rdi
	callq	__cxa_throw
.Ltmp17:
# %bb.14:                               # %.noexc30.i
.LBB1_15:
.Ltmp15:
	movq	%rax, %r14
	movq	%rbx, %rdi
	callq	__cxa_free_exception
	jmp	.LBB1_22
.LBB1_5:
.Ltmp4:
	movq	%rax, %r14
	movq	%rbx, %rdi
	callq	__cxa_free_exception
	jmp	.LBB1_6
.LBB1_20:
.Ltmp21:
	jmp	.LBB1_21
.LBB1_19:
.Ltmp18:
.LBB1_21:                               # %.body.i
	movq	%rax, %r14
.LBB1_22:                               # %.body.i
	leaq	48(%rsp), %rdi
	callq	_ZN6thrust6detail18contiguous_storageIhNS0_18no_throw_allocatorINS0_19temporary_allocatorIhNS_11hip_rocprim3tagEEEEEED2Ev
.LBB1_6:                                # %common.resume.i
	movq	%r14, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end1:
	.size	_ZZN6thrust11hip_rocprim8reduce_nINS0_3tagENS0_26transform_input_iterator_tIdNS_17counting_iteratorIjNS_11use_defaultES5_S5_EE11estimate_esEEldNS_4plusIdEEEET2_RNS0_16execution_policyIT_EET0_T1_SB_T3_EN10workaround3parERNSC_IS2_EES8_ldSA_, .Lfunc_end1-_ZZN6thrust11hip_rocprim8reduce_nINS0_3tagENS0_26transform_input_iterator_tIdNS_17counting_iteratorIjNS_11use_defaultES5_S5_EE11estimate_esEEldNS_4plusIdEEEET2_RNS0_16execution_policyIT_EET0_T1_SB_T3_EN10workaround3parERNSC_IS2_EES8_ldSA_
	.cfi_endproc
	.section	.gcc_except_table._ZZN6thrust11hip_rocprim8reduce_nINS0_3tagENS0_26transform_input_iterator_tIdNS_17counting_iteratorIjNS_11use_defaultES5_S5_EE11estimate_esEEldNS_4plusIdEEEET2_RNS0_16execution_policyIT_EET0_T1_SB_T3_EN10workaround3parERNSC_IS2_EES8_ldSA_,"aG",@progbits,_ZZN6thrust11hip_rocprim8reduce_nINS0_3tagENS0_26transform_input_iterator_tIdNS_17counting_iteratorIjNS_11use_defaultES5_S5_EE11estimate_esEEldNS_4plusIdEEEET2_RNS0_16execution_policyIT_EET0_T1_SB_T3_EN10workaround3parERNSC_IS2_EES8_ldSA_,comdat
	.p2align	2, 0x0
GCC_except_table1:
.Lexception0:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end0-.Lcst_begin0
.Lcst_begin0:
	.uleb128 .Lfunc_begin0-.Lfunc_begin0    # >> Call Site 1 <<
	.uleb128 .Ltmp5-.Lfunc_begin0           #   Call between .Lfunc_begin0 and .Ltmp5
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp5-.Lfunc_begin0           # >> Call Site 2 <<
	.uleb128 .Ltmp10-.Ltmp5                 #   Call between .Ltmp5 and .Ltmp10
	.uleb128 .Ltmp18-.Lfunc_begin0          #     jumps to .Ltmp18
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp19-.Lfunc_begin0          # >> Call Site 3 <<
	.uleb128 .Ltmp20-.Ltmp19                #   Call between .Ltmp19 and .Ltmp20
	.uleb128 .Ltmp21-.Lfunc_begin0          #     jumps to .Ltmp21
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp20-.Lfunc_begin0          # >> Call Site 4 <<
	.uleb128 .Ltmp0-.Ltmp20                 #   Call between .Ltmp20 and .Ltmp0
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp0-.Lfunc_begin0           # >> Call Site 5 <<
	.uleb128 .Ltmp3-.Ltmp0                  #   Call between .Ltmp0 and .Ltmp3
	.uleb128 .Ltmp4-.Lfunc_begin0           #     jumps to .Ltmp4
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp3-.Lfunc_begin0           # >> Call Site 6 <<
	.uleb128 .Ltmp11-.Ltmp3                 #   Call between .Ltmp3 and .Ltmp11
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp11-.Lfunc_begin0          # >> Call Site 7 <<
	.uleb128 .Ltmp14-.Ltmp11                #   Call between .Ltmp11 and .Ltmp14
	.uleb128 .Ltmp15-.Lfunc_begin0          #     jumps to .Ltmp15
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp16-.Lfunc_begin0          # >> Call Site 8 <<
	.uleb128 .Ltmp17-.Ltmp16                #   Call between .Ltmp16 and .Ltmp17
	.uleb128 .Ltmp18-.Lfunc_begin0          #     jumps to .Ltmp18
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp17-.Lfunc_begin0          # >> Call Site 9 <<
	.uleb128 .Lfunc_end1-.Ltmp17            #   Call between .Ltmp17 and .Lfunc_end1
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end0:
	.p2align	2, 0x0
                                        # -- End function
	.section	.text._ZN6thrust6system12hip_categoryEv,"axG",@progbits,_ZN6thrust6system12hip_categoryEv,comdat
	.weak	_ZN6thrust6system12hip_categoryEv # -- Begin function _ZN6thrust6system12hip_categoryEv
	.type	_ZN6thrust6system12hip_categoryEv,@function
_ZN6thrust6system12hip_categoryEv:      # @_ZN6thrust6system12hip_categoryEv
	.cfi_startproc
# %bb.0:
	movb	_ZGVZN6thrust6system12hip_categoryEvE6result(%rip), %al
	testb	%al, %al
	je	.LBB2_1
.LBB2_4:
	movl	$_ZZN6thrust6system12hip_categoryEvE6result, %eax
	retq
.LBB2_1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movl	$_ZGVZN6thrust6system12hip_categoryEvE6result, %edi
	callq	__cxa_guard_acquire
	testl	%eax, %eax
	je	.LBB2_3
# %bb.2:
	movq	$_ZTVN6thrust6system11hip_rocprim6detail18hip_error_categoryE+16, _ZZN6thrust6system12hip_categoryEvE6result(%rip)
	movl	$_ZN6thrust6system14error_categoryD2Ev, %edi
	movl	$_ZZN6thrust6system12hip_categoryEvE6result, %esi
	movl	$__dso_handle, %edx
	callq	__cxa_atexit
	movl	$_ZGVZN6thrust6system12hip_categoryEvE6result, %edi
	callq	__cxa_guard_release
.LBB2_3:
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
	jmp	.LBB2_4
.Lfunc_end2:
	.size	_ZN6thrust6system12hip_categoryEv, .Lfunc_end2-_ZN6thrust6system12hip_categoryEv
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN6thrust6system12system_errorC2EiRKNS0_14error_categoryEPKc,"axG",@progbits,_ZN6thrust6system12system_errorC2EiRKNS0_14error_categoryEPKc,comdat
	.weak	_ZN6thrust6system12system_errorC2EiRKNS0_14error_categoryEPKc # -- Begin function _ZN6thrust6system12system_errorC2EiRKNS0_14error_categoryEPKc
	.p2align	1, 0x90
	.type	_ZN6thrust6system12system_errorC2EiRKNS0_14error_categoryEPKc,@function
_ZN6thrust6system12system_errorC2EiRKNS0_14error_categoryEPKc: # @_ZN6thrust6system12system_errorC2EiRKNS0_14error_categoryEPKc
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %rbp, -16
	movq	%rdx, %rbx
	movl	%esi, %ebp
	movq	%rdi, %r14
	movq	%rcx, %rsi
	callq	_ZNSt13runtime_errorC2EPKc
	movq	$_ZTVN6thrust6system12system_errorE+16, (%r14)
	movl	%ebp, 16(%r14)
	movq	%rbx, 24(%r14)
	leaq	48(%r14), %rax
	movq	%rax, 32(%r14)
	movq	$0, 40(%r14)
	movb	$0, 48(%r14)
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_ZN6thrust6system12system_errorC2EiRKNS0_14error_categoryEPKc, .Lfunc_end3-_ZN6thrust6system12system_errorC2EiRKNS0_14error_categoryEPKc
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN6thrust6system12system_errorD2Ev,"axG",@progbits,_ZN6thrust6system12system_errorD2Ev,comdat
	.weak	_ZN6thrust6system12system_errorD2Ev # -- Begin function _ZN6thrust6system12system_errorD2Ev
	.p2align	1, 0x90
	.type	_ZN6thrust6system12system_errorD2Ev,@function
_ZN6thrust6system12system_errorD2Ev:    # @_ZN6thrust6system12system_errorD2Ev
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movq	%rdi, %rbx
	movq	$_ZTVN6thrust6system12system_errorE+16, (%rdi)
	movq	32(%rdi), %rdi
	leaq	48(%rbx), %rax
	cmpq	%rax, %rdi
	je	.LBB4_2
# %bb.1:                                # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i
	callq	_ZdlPv
.LBB4_2:                                # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit
	movq	%rbx, %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	_ZNSt13runtime_errorD2Ev        # TAILCALL
.Lfunc_end4:
	.size	_ZN6thrust6system12system_errorD2Ev, .Lfunc_end4-_ZN6thrust6system12system_errorD2Ev
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN6thrust6system14error_categoryD2Ev,"axG",@progbits,_ZN6thrust6system14error_categoryD2Ev,comdat
	.weak	_ZN6thrust6system14error_categoryD2Ev # -- Begin function _ZN6thrust6system14error_categoryD2Ev
	.p2align	1, 0x90
	.type	_ZN6thrust6system14error_categoryD2Ev,@function
_ZN6thrust6system14error_categoryD2Ev:  # @_ZN6thrust6system14error_categoryD2Ev
	.cfi_startproc
# %bb.0:
	movq	$_ZTVN6thrust6system14error_categoryE+16, (%rdi)
	retq
.Lfunc_end5:
	.size	_ZN6thrust6system14error_categoryD2Ev, .Lfunc_end5-_ZN6thrust6system14error_categoryD2Ev
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN6thrust6system11hip_rocprim6detail18hip_error_categoryD0Ev,"axG",@progbits,_ZN6thrust6system11hip_rocprim6detail18hip_error_categoryD0Ev,comdat
	.weak	_ZN6thrust6system11hip_rocprim6detail18hip_error_categoryD0Ev # -- Begin function _ZN6thrust6system11hip_rocprim6detail18hip_error_categoryD0Ev
	.p2align	1, 0x90
	.type	_ZN6thrust6system11hip_rocprim6detail18hip_error_categoryD0Ev,@function
_ZN6thrust6system11hip_rocprim6detail18hip_error_categoryD0Ev: # @_ZN6thrust6system11hip_rocprim6detail18hip_error_categoryD0Ev
	.cfi_startproc
# %bb.0:
	jmp	_ZdlPv                          # TAILCALL
.Lfunc_end6:
	.size	_ZN6thrust6system11hip_rocprim6detail18hip_error_categoryD0Ev, .Lfunc_end6-_ZN6thrust6system11hip_rocprim6detail18hip_error_categoryD0Ev
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNK6thrust6system11hip_rocprim6detail18hip_error_category4nameEv,"axG",@progbits,_ZNK6thrust6system11hip_rocprim6detail18hip_error_category4nameEv,comdat
	.weak	_ZNK6thrust6system11hip_rocprim6detail18hip_error_category4nameEv # -- Begin function _ZNK6thrust6system11hip_rocprim6detail18hip_error_category4nameEv
	.p2align	1, 0x90
	.type	_ZNK6thrust6system11hip_rocprim6detail18hip_error_category4nameEv,@function
_ZNK6thrust6system11hip_rocprim6detail18hip_error_category4nameEv: # @_ZNK6thrust6system11hip_rocprim6detail18hip_error_category4nameEv
	.cfi_startproc
# %bb.0:
	movl	$.L.str.6, %eax
	retq
.Lfunc_end7:
	.size	_ZNK6thrust6system11hip_rocprim6detail18hip_error_category4nameEv, .Lfunc_end7-_ZNK6thrust6system11hip_rocprim6detail18hip_error_category4nameEv
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNK6thrust6system11hip_rocprim6detail18hip_error_category23default_error_conditionEi,"axG",@progbits,_ZNK6thrust6system11hip_rocprim6detail18hip_error_category23default_error_conditionEi,comdat
	.weak	_ZNK6thrust6system11hip_rocprim6detail18hip_error_category23default_error_conditionEi # -- Begin function _ZNK6thrust6system11hip_rocprim6detail18hip_error_category23default_error_conditionEi
	.p2align	1, 0x90
	.type	_ZNK6thrust6system11hip_rocprim6detail18hip_error_category23default_error_conditionEi,@function
_ZNK6thrust6system11hip_rocprim6detail18hip_error_category23default_error_conditionEi: # @_ZNK6thrust6system11hip_rocprim6detail18hip_error_category23default_error_conditionEi
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movl	%esi, %ebx
	cmpl	$50, %esi
	jg	.LBB8_5
# %bb.1:
	movb	_ZGVZN6thrust6system12hip_categoryEvE6result(%rip), %al
	testb	%al, %al
	je	.LBB8_2
.LBB8_4:                                # %_ZN6thrust6system20make_error_conditionENS0_11hip_rocprim4errc6errc_tE.exit
	movl	$_ZZN6thrust6system12hip_categoryEvE6result, %edx
	movl	%ebx, %eax
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.LBB8_5:
	.cfi_def_cfa_offset 16
	movb	_ZGVZN6thrust6system15system_categoryEvE6result(%rip), %al
	testb	%al, %al
	je	.LBB8_6
.LBB8_8:                                # %_ZN6thrust6system15system_categoryEv.exit
	movq	_ZZN6thrust6system15system_categoryEvE6result(%rip), %rax
	movq	24(%rax), %rax
	movl	$_ZZN6thrust6system15system_categoryEvE6result, %edi
	movl	%ebx, %esi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmpq	*%rax                           # TAILCALL
.LBB8_2:
	.cfi_def_cfa_offset 16
	movl	$_ZGVZN6thrust6system12hip_categoryEvE6result, %edi
	callq	__cxa_guard_acquire
	testl	%eax, %eax
	je	.LBB8_4
# %bb.3:
	movq	$_ZTVN6thrust6system11hip_rocprim6detail18hip_error_categoryE+16, _ZZN6thrust6system12hip_categoryEvE6result(%rip)
	movl	$_ZN6thrust6system14error_categoryD2Ev, %edi
	movl	$_ZZN6thrust6system12hip_categoryEvE6result, %esi
	movl	$__dso_handle, %edx
	callq	__cxa_atexit
	movl	$_ZGVZN6thrust6system12hip_categoryEvE6result, %edi
	callq	__cxa_guard_release
	jmp	.LBB8_4
.LBB8_6:
	movl	$_ZGVZN6thrust6system15system_categoryEvE6result, %edi
	callq	__cxa_guard_acquire
	testl	%eax, %eax
	je	.LBB8_8
# %bb.7:
	movq	$_ZTVN6thrust6system6detail21system_error_categoryE+16, _ZZN6thrust6system15system_categoryEvE6result(%rip)
	movl	$_ZN6thrust6system14error_categoryD2Ev, %edi
	movl	$_ZZN6thrust6system15system_categoryEvE6result, %esi
	movl	$__dso_handle, %edx
	callq	__cxa_atexit
	movl	$_ZGVZN6thrust6system15system_categoryEvE6result, %edi
	callq	__cxa_guard_release
	jmp	.LBB8_8
.Lfunc_end8:
	.size	_ZNK6thrust6system11hip_rocprim6detail18hip_error_category23default_error_conditionEi, .Lfunc_end8-_ZNK6thrust6system11hip_rocprim6detail18hip_error_category23default_error_conditionEi
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNK6thrust6system14error_category10equivalentEiRKNS0_15error_conditionE,"axG",@progbits,_ZNK6thrust6system14error_category10equivalentEiRKNS0_15error_conditionE,comdat
	.weak	_ZNK6thrust6system14error_category10equivalentEiRKNS0_15error_conditionE # -- Begin function _ZNK6thrust6system14error_category10equivalentEiRKNS0_15error_conditionE
	.p2align	1, 0x90
	.type	_ZNK6thrust6system14error_category10equivalentEiRKNS0_15error_conditionE,@function
_ZNK6thrust6system14error_category10equivalentEiRKNS0_15error_conditionE: # @_ZNK6thrust6system14error_category10equivalentEiRKNS0_15error_conditionE
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movq	%rdx, %rbx
	movq	(%rdi), %rax
	callq	*24(%rax)
	cmpq	8(%rbx), %rdx
	sete	%cl
	cmpl	(%rbx), %eax
	sete	%al
	andb	%cl, %al
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end9:
	.size	_ZNK6thrust6system14error_category10equivalentEiRKNS0_15error_conditionE, .Lfunc_end9-_ZNK6thrust6system14error_category10equivalentEiRKNS0_15error_conditionE
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNK6thrust6system14error_category10equivalentERKNS0_10error_codeEi,"axG",@progbits,_ZNK6thrust6system14error_category10equivalentERKNS0_10error_codeEi,comdat
	.weak	_ZNK6thrust6system14error_category10equivalentERKNS0_10error_codeEi # -- Begin function _ZNK6thrust6system14error_category10equivalentERKNS0_10error_codeEi
	.p2align	1, 0x90
	.type	_ZNK6thrust6system14error_category10equivalentERKNS0_10error_codeEi,@function
_ZNK6thrust6system14error_category10equivalentERKNS0_10error_codeEi: # @_ZNK6thrust6system14error_category10equivalentERKNS0_10error_codeEi
	.cfi_startproc
# %bb.0:
	cmpq	%rdi, 8(%rsi)
	sete	%cl
	cmpl	%edx, (%rsi)
	sete	%al
	andb	%cl, %al
	retq
.Lfunc_end10:
	.size	_ZNK6thrust6system14error_category10equivalentERKNS0_10error_codeEi, .Lfunc_end10-_ZNK6thrust6system14error_category10equivalentERKNS0_10error_codeEi
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNK6thrust6system11hip_rocprim6detail18hip_error_category7messageB5cxx11Ei,"axG",@progbits,_ZNK6thrust6system11hip_rocprim6detail18hip_error_category7messageB5cxx11Ei,comdat
	.weak	_ZNK6thrust6system11hip_rocprim6detail18hip_error_category7messageB5cxx11Ei # -- Begin function _ZNK6thrust6system11hip_rocprim6detail18hip_error_category7messageB5cxx11Ei
	.p2align	1, 0x90
	.type	_ZNK6thrust6system11hip_rocprim6detail18hip_error_category7messageB5cxx11Ei,@function
_ZNK6thrust6system11hip_rocprim6detail18hip_error_category7messageB5cxx11Ei: # @_ZNK6thrust6system11hip_rocprim6detail18hip_error_category7messageB5cxx11Ei
.Lfunc_begin1:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception1
# %bb.0:                                # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_.exit
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%edx, %ebp
	movq	%rdi, %rbx
	movl	%edx, %edi
	callq	hipGetErrorString
	movq	%rax, %r15
	movl	%ebp, %edi
	callq	hipGetErrorName
	testq	%rax, %rax
	movl	$.L.str.12, %r14d
	cmovneq	%rax, %r14
	leaq	24(%rsp), %rax
	movq	%rax, -16(%rax)
	movq	%r14, %rdi
	callq	strlen
	leaq	(%rax,%r14), %rdx
	leaq	8(%rsp), %r12
	movq	%r12, %rdi
	movq	%r14, %rsi
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag
.Ltmp22:
	movl	$.L.str.13, %esi
	movq	%r12, %rdi
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6appendEPKc
.Ltmp23:
# %bb.1:                                # %.noexc
	movq	%rax, %r12
	leaq	56(%rsp), %r14
	movq	%r14, -16(%r14)
	movq	(%rax), %rsi
	movq	%rax, %rbp
	addq	$16, %rbp
	cmpq	%rbp, %rsi
	je	.LBB11_2
# %bb.3:                                # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i
	movq	%rsi, 40(%rsp)
	movq	16(%r12), %rax
	movq	%rax, 56(%rsp)
	movq	8(%r12), %r13
	jmp	.LBB11_4
.LBB11_2:
	movq	8(%r12), %r13
	leaq	1(%r13), %rdx
	movq	%r14, %rdi
	callq	memcpy@PLT
.LBB11_4:
	leaq	40(%rsp), %rdi
	movq	%r13, 8(%rdi)
	movq	%rbp, (%r12)
	movq	$0, 8(%r12)
	movb	$0, 16(%r12)
	testq	%r15, %r15
	movl	$.L.str.11, %esi
	cmovneq	%r15, %rsi
.Ltmp25:
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6appendEPKc
.Ltmp26:
# %bb.5:                                # %.noexc16
	movq	%rax, %r15
	leaq	16(%rbx), %rdi
	movq	%rdi, (%rbx)
	movq	(%rax), %rsi
	movq	%rax, %r12
	addq	$16, %r12
	cmpq	%r12, %rsi
	je	.LBB11_6
# %bb.7:                                # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i13
	movq	%rsi, (%rbx)
	movq	16(%r15), %rax
	movq	%rax, 16(%rbx)
	movq	8(%r15), %r13
	jmp	.LBB11_8
.LBB11_6:
	movq	8(%r15), %r13
	leaq	1(%r13), %rdx
	callq	memcpy@PLT
.LBB11_8:
	movq	%r13, 8(%rbx)
	movq	%r12, (%r15)
	movq	$0, 8(%r15)
	movb	$0, 16(%r15)
	movq	40(%rsp), %rdi
	cmpq	%r14, %rdi
	je	.LBB11_10
# %bb.9:                                # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i18
	callq	_ZdlPv
.LBB11_10:                              # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit
	movq	8(%rsp), %rdi
	leaq	24(%rsp), %rax
	cmpq	%rax, %rdi
	je	.LBB11_12
# %bb.11:                               # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i19
	callq	_ZdlPv
.LBB11_12:                              # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit21
	movq	%rbx, %rax
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB11_14:
	.cfi_def_cfa_offset 128
.Ltmp27:
	movq	%rax, %rbx
	movq	40(%rsp), %rdi
	cmpq	%r14, %rdi
	je	.LBB11_16
# %bb.15:                               # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i22
	callq	_ZdlPv
	jmp	.LBB11_16
.LBB11_13:
.Ltmp24:
	movq	%rax, %rbx
.LBB11_16:                              # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit24
	movq	8(%rsp), %rdi
	leaq	24(%rsp), %rax
	cmpq	%rax, %rdi
	je	.LBB11_18
# %bb.17:                               # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i25
	callq	_ZdlPv
.LBB11_18:                              # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit27
	movq	%rbx, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end11:
	.size	_ZNK6thrust6system11hip_rocprim6detail18hip_error_category7messageB5cxx11Ei, .Lfunc_end11-_ZNK6thrust6system11hip_rocprim6detail18hip_error_category7messageB5cxx11Ei
	.cfi_endproc
	.section	.gcc_except_table._ZNK6thrust6system11hip_rocprim6detail18hip_error_category7messageB5cxx11Ei,"aG",@progbits,_ZNK6thrust6system11hip_rocprim6detail18hip_error_category7messageB5cxx11Ei,comdat
	.p2align	2, 0x0
GCC_except_table11:
.Lexception1:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end1-.Lcst_begin1
.Lcst_begin1:
	.uleb128 .Lfunc_begin1-.Lfunc_begin1    # >> Call Site 1 <<
	.uleb128 .Ltmp22-.Lfunc_begin1          #   Call between .Lfunc_begin1 and .Ltmp22
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp22-.Lfunc_begin1          # >> Call Site 2 <<
	.uleb128 .Ltmp23-.Ltmp22                #   Call between .Ltmp22 and .Ltmp23
	.uleb128 .Ltmp24-.Lfunc_begin1          #     jumps to .Ltmp24
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp23-.Lfunc_begin1          # >> Call Site 3 <<
	.uleb128 .Ltmp25-.Ltmp23                #   Call between .Ltmp23 and .Ltmp25
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp25-.Lfunc_begin1          # >> Call Site 4 <<
	.uleb128 .Ltmp26-.Ltmp25                #   Call between .Ltmp25 and .Ltmp26
	.uleb128 .Ltmp27-.Lfunc_begin1          #     jumps to .Ltmp27
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp26-.Lfunc_begin1          # >> Call Site 5 <<
	.uleb128 .Lfunc_end11-.Ltmp26           #   Call between .Ltmp26 and .Lfunc_end11
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end1:
	.p2align	2, 0x0
                                        # -- End function
	.section	.text._ZN6thrust6system14error_categoryD0Ev,"axG",@progbits,_ZN6thrust6system14error_categoryD0Ev,comdat
	.weak	_ZN6thrust6system14error_categoryD0Ev # -- Begin function _ZN6thrust6system14error_categoryD0Ev
	.p2align	1, 0x90
	.type	_ZN6thrust6system14error_categoryD0Ev,@function
_ZN6thrust6system14error_categoryD0Ev:  # @_ZN6thrust6system14error_categoryD0Ev
	.cfi_startproc
# %bb.0:
	ud2
.Lfunc_end12:
	.size	_ZN6thrust6system14error_categoryD0Ev, .Lfunc_end12-_ZN6thrust6system14error_categoryD0Ev
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNK6thrust6system14error_category23default_error_conditionEi,"axG",@progbits,_ZNK6thrust6system14error_category23default_error_conditionEi,comdat
	.weak	_ZNK6thrust6system14error_category23default_error_conditionEi # -- Begin function _ZNK6thrust6system14error_category23default_error_conditionEi
	.p2align	1, 0x90
	.type	_ZNK6thrust6system14error_category23default_error_conditionEi,@function
_ZNK6thrust6system14error_category23default_error_conditionEi: # @_ZNK6thrust6system14error_category23default_error_conditionEi
	.cfi_startproc
# %bb.0:
	movl	%esi, %eax
	movq	%rdi, %rdx
	retq
.Lfunc_end13:
	.size	_ZNK6thrust6system14error_category23default_error_conditionEi, .Lfunc_end13-_ZNK6thrust6system14error_category23default_error_conditionEi
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN6thrust6system15system_categoryEv,"axG",@progbits,_ZN6thrust6system15system_categoryEv,comdat
	.weak	_ZN6thrust6system15system_categoryEv # -- Begin function _ZN6thrust6system15system_categoryEv
	.type	_ZN6thrust6system15system_categoryEv,@function
_ZN6thrust6system15system_categoryEv:   # @_ZN6thrust6system15system_categoryEv
	.cfi_startproc
# %bb.0:
	movb	_ZGVZN6thrust6system15system_categoryEvE6result(%rip), %al
	testb	%al, %al
	je	.LBB14_1
.LBB14_4:
	movl	$_ZZN6thrust6system15system_categoryEvE6result, %eax
	retq
.LBB14_1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movl	$_ZGVZN6thrust6system15system_categoryEvE6result, %edi
	callq	__cxa_guard_acquire
	testl	%eax, %eax
	je	.LBB14_3
# %bb.2:
	movq	$_ZTVN6thrust6system6detail21system_error_categoryE+16, _ZZN6thrust6system15system_categoryEvE6result(%rip)
	movl	$_ZN6thrust6system14error_categoryD2Ev, %edi
	movl	$_ZZN6thrust6system15system_categoryEvE6result, %esi
	movl	$__dso_handle, %edx
	callq	__cxa_atexit
	movl	$_ZGVZN6thrust6system15system_categoryEvE6result, %edi
	callq	__cxa_guard_release
.LBB14_3:
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
	jmp	.LBB14_4
.Lfunc_end14:
	.size	_ZN6thrust6system15system_categoryEv, .Lfunc_end14-_ZN6thrust6system15system_categoryEv
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN6thrust6system6detail21system_error_categoryD0Ev,"axG",@progbits,_ZN6thrust6system6detail21system_error_categoryD0Ev,comdat
	.weak	_ZN6thrust6system6detail21system_error_categoryD0Ev # -- Begin function _ZN6thrust6system6detail21system_error_categoryD0Ev
	.p2align	1, 0x90
	.type	_ZN6thrust6system6detail21system_error_categoryD0Ev,@function
_ZN6thrust6system6detail21system_error_categoryD0Ev: # @_ZN6thrust6system6detail21system_error_categoryD0Ev
	.cfi_startproc
# %bb.0:
	jmp	_ZdlPv                          # TAILCALL
.Lfunc_end15:
	.size	_ZN6thrust6system6detail21system_error_categoryD0Ev, .Lfunc_end15-_ZN6thrust6system6detail21system_error_categoryD0Ev
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNK6thrust6system6detail21system_error_category4nameEv,"axG",@progbits,_ZNK6thrust6system6detail21system_error_category4nameEv,comdat
	.weak	_ZNK6thrust6system6detail21system_error_category4nameEv # -- Begin function _ZNK6thrust6system6detail21system_error_category4nameEv
	.p2align	1, 0x90
	.type	_ZNK6thrust6system6detail21system_error_category4nameEv,@function
_ZNK6thrust6system6detail21system_error_category4nameEv: # @_ZNK6thrust6system6detail21system_error_category4nameEv
	.cfi_startproc
# %bb.0:
	movl	$.L.str.7, %eax
	retq
.Lfunc_end16:
	.size	_ZNK6thrust6system6detail21system_error_category4nameEv, .Lfunc_end16-_ZNK6thrust6system6detail21system_error_category4nameEv
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNK6thrust6system6detail21system_error_category23default_error_conditionEi,"axG",@progbits,_ZNK6thrust6system6detail21system_error_category23default_error_conditionEi,comdat
	.weak	_ZNK6thrust6system6detail21system_error_category23default_error_conditionEi # -- Begin function _ZNK6thrust6system6detail21system_error_category23default_error_conditionEi
	.p2align	1, 0x90
	.type	_ZNK6thrust6system6detail21system_error_category23default_error_conditionEi,@function
_ZNK6thrust6system6detail21system_error_category23default_error_conditionEi: # @_ZNK6thrust6system6detail21system_error_category23default_error_conditionEi
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movl	%esi, %ebx
	leal	-9901(%rbx), %eax
	cmpl	$78, %eax
	ja	.LBB17_81
# %bb.1:
	jmpq	*.LJTI17_0(,%rax,8)
.LBB17_2:
	movl	$9901, %edi                     # imm = 0x26AD
	jmp	.LBB17_3
.LBB17_77:
	movl	$9979, %edi                     # imm = 0x26FB
	jmp	.LBB17_3
.LBB17_33:
	movl	$9961, %edi                     # imm = 0x26E9
	jmp	.LBB17_3
.LBB17_50:
	movl	$9968, %edi                     # imm = 0x26F0
	jmp	.LBB17_3
.LBB17_67:
	movl	$9974, %edi                     # imm = 0x26F6
	jmp	.LBB17_3
.LBB17_75:
	movl	$9977, %edi                     # imm = 0x26F9
	jmp	.LBB17_3
.LBB17_28:
	movl	$9945, %edi                     # imm = 0x26D9
	jmp	.LBB17_3
.LBB17_19:
	movl	$9952, %edi                     # imm = 0x26E0
	jmp	.LBB17_3
.LBB17_29:
	movl	$9958, %edi                     # imm = 0x26E6
	jmp	.LBB17_3
.LBB17_22:
	movl	$9955, %edi                     # imm = 0x26E3
	jmp	.LBB17_3
.LBB17_17:
	movl	$9951, %edi                     # imm = 0x26DF
	jmp	.LBB17_3
.LBB17_66:
	movl	$9933, %edi                     # imm = 0x26CD
	jmp	.LBB17_3
.LBB17_80:
	movl	$9941, %edi                     # imm = 0x26D5
	jmp	.LBB17_3
.LBB17_59:
	movl	$9928, %edi                     # imm = 0x26C8
	jmp	.LBB17_3
.LBB17_79:
	movl	$9940, %edi                     # imm = 0x26D4
	jmp	.LBB17_3
.LBB17_74:
	movl	$9938, %edi                     # imm = 0x26D2
	jmp	.LBB17_3
.LBB17_58:
	movl	$9927, %edi                     # imm = 0x26C7
	jmp	.LBB17_3
.LBB17_45:
	movl	$9921, %edi                     # imm = 0x26C1
	jmp	.LBB17_3
.LBB17_68:
	movl	$9975, %edi                     # imm = 0x26F7
	jmp	.LBB17_3
.LBB17_7:
	movl	$9946, %edi                     # imm = 0x26DA
	jmp	.LBB17_3
.LBB17_39:
	movl	$9917, %edi                     # imm = 0x26BD
	jmp	.LBB17_3
.LBB17_48:
	movl	$9966, %edi                     # imm = 0x26EE
	jmp	.LBB17_3
.LBB17_71:
	movl	$9934, %edi                     # imm = 0x26CE
	jmp	.LBB17_3
.LBB17_13:
	movl	$9906, %edi                     # imm = 0x26B2
	jmp	.LBB17_3
.LBB17_43:
	movl	$9919, %edi                     # imm = 0x26BF
	jmp	.LBB17_3
.LBB17_47:
	movl	$9922, %edi                     # imm = 0x26C2
	jmp	.LBB17_3
.LBB17_25:
	movl	$9942, %edi                     # imm = 0x26D6
	jmp	.LBB17_3
.LBB17_57:
	movl	$9926, %edi                     # imm = 0x26C6
	jmp	.LBB17_3
.LBB17_61:
	movl	$9929, %edi                     # imm = 0x26C9
	jmp	.LBB17_3
.LBB17_4:
	movl	$9902, %edi                     # imm = 0x26AE
	jmp	.LBB17_3
.LBB17_54:
	movl	$9924, %edi                     # imm = 0x26C4
	jmp	.LBB17_3
.LBB17_18:
	movl	$9910, %edi                     # imm = 0x26B6
	jmp	.LBB17_3
.LBB17_56:
	movl	$9971, %edi                     # imm = 0x26F3
	jmp	.LBB17_3
.LBB17_5:
	movl	$9903, %edi                     # imm = 0x26AF
	jmp	.LBB17_3
.LBB17_11:
	movl	$9905, %edi                     # imm = 0x26B1
	jmp	.LBB17_3
.LBB17_36:
	movl	$9914, %edi                     # imm = 0x26BA
	jmp	.LBB17_3
.LBB17_62:
	movl	$9930, %edi                     # imm = 0x26CA
	jmp	.LBB17_3
.LBB17_65:
	movl	$9932, %edi                     # imm = 0x26CC
	jmp	.LBB17_3
.LBB17_15:
	movl	$9908, %edi                     # imm = 0x26B4
	jmp	.LBB17_3
.LBB17_6:
	movl	$9904, %edi                     # imm = 0x26B0
	jmp	.LBB17_3
.LBB17_26:
	movl	$9911, %edi                     # imm = 0x26B7
	jmp	.LBB17_3
.LBB17_31:
	movl	$9943, %edi                     # imm = 0x26D7
	jmp	.LBB17_3
.LBB17_53:
	movl	$9923, %edi                     # imm = 0x26C3
	jmp	.LBB17_3
.LBB17_16:
	movl	$9909, %edi                     # imm = 0x26B5
	jmp	.LBB17_3
.LBB17_8:
	movl	$9947, %edi                     # imm = 0x26DB
	jmp	.LBB17_3
.LBB17_12:
	movl	$9950, %edi                     # imm = 0x26DE
	jmp	.LBB17_3
.LBB17_14:
	movl	$9907, %edi                     # imm = 0x26B3
	jmp	.LBB17_3
.LBB17_44:
	movl	$9920, %edi                     # imm = 0x26C0
	jmp	.LBB17_3
.LBB17_69:
	movl	$9976, %edi                     # imm = 0x26F8
	jmp	.LBB17_3
.LBB17_9:
	movl	$9948, %edi                     # imm = 0x26DC
	jmp	.LBB17_3
.LBB17_78:
	movl	$9939, %edi                     # imm = 0x26D3
	jmp	.LBB17_3
.LBB17_35:
	movl	$9913, %edi                     # imm = 0x26B9
	jmp	.LBB17_3
.LBB17_23:
	movl	$9956, %edi                     # imm = 0x26E4
	jmp	.LBB17_3
.LBB17_55:
	movl	$9925, %edi                     # imm = 0x26C5
	jmp	.LBB17_3
.LBB17_63:
	movl	$9931, %edi                     # imm = 0x26CB
	jmp	.LBB17_3
.LBB17_27:
	movl	$9912, %edi                     # imm = 0x26B8
	jmp	.LBB17_3
.LBB17_72:
	movl	$9935, %edi                     # imm = 0x26CF
	jmp	.LBB17_3
.LBB17_37:
	movl	$9915, %edi                     # imm = 0x26BB
	jmp	.LBB17_3
.LBB17_38:
	movl	$9916, %edi                     # imm = 0x26BC
	jmp	.LBB17_3
.LBB17_24:
	movl	$9957, %edi                     # imm = 0x26E5
	jmp	.LBB17_3
.LBB17_70:
	movl	$9944, %edi                     # imm = 0x26D8
	jmp	.LBB17_3
.LBB17_41:
	movl	$9918, %edi                     # imm = 0x26BE
	jmp	.LBB17_3
.LBB17_42:
	movl	$9964, %edi                     # imm = 0x26EC
	jmp	.LBB17_3
.LBB17_46:
	movl	$9965, %edi                     # imm = 0x26ED
	jmp	.LBB17_3
.LBB17_32:
	movl	$9960, %edi                     # imm = 0x26E8
	jmp	.LBB17_3
.LBB17_64:
	movl	$9973, %edi                     # imm = 0x26F5
	jmp	.LBB17_3
.LBB17_30:
	movl	$9959, %edi                     # imm = 0x26E7
	jmp	.LBB17_3
.LBB17_49:
	movl	$9967, %edi                     # imm = 0x26EF
	jmp	.LBB17_3
.LBB17_21:
	movl	$9954, %edi                     # imm = 0x26E2
	jmp	.LBB17_3
.LBB17_73:
	movl	$9936, %edi                     # imm = 0x26D0
	jmp	.LBB17_3
.LBB17_51:
	movl	$9969, %edi                     # imm = 0x26F1
	jmp	.LBB17_3
.LBB17_10:
	movl	$9949, %edi                     # imm = 0x26DD
	jmp	.LBB17_3
.LBB17_34:
	movl	$9962, %edi                     # imm = 0x26EA
	jmp	.LBB17_3
.LBB17_52:
	movl	$9970, %edi                     # imm = 0x26F2
	jmp	.LBB17_3
.LBB17_20:
	movl	$9953, %edi                     # imm = 0x26E1
	jmp	.LBB17_3
.LBB17_40:
	movl	$9963, %edi                     # imm = 0x26EB
	jmp	.LBB17_3
.LBB17_60:
	movl	$9972, %edi                     # imm = 0x26F4
	jmp	.LBB17_3
.LBB17_76:
	movl	$9978, %edi                     # imm = 0x26FA
.LBB17_3:
	callq	_ZN6thrust6system20make_error_conditionENS0_4errc6errc_tE
	movl	%eax, %ebx
.LBB17_82:
	movl	%ebx, %eax
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.LBB17_81:
	.cfi_def_cfa_offset 16
	callq	_ZN6thrust6system15system_categoryEv
	movq	%rax, %rdx
	jmp	.LBB17_82
.Lfunc_end17:
	.size	_ZNK6thrust6system6detail21system_error_category23default_error_conditionEi, .Lfunc_end17-_ZNK6thrust6system6detail21system_error_category23default_error_conditionEi
	.cfi_endproc
	.section	.rodata._ZNK6thrust6system6detail21system_error_category23default_error_conditionEi,"aG",@progbits,_ZNK6thrust6system6detail21system_error_category23default_error_conditionEi,comdat
	.p2align	3, 0x0
.LJTI17_0:
	.quad	.LBB17_2
	.quad	.LBB17_4
	.quad	.LBB17_5
	.quad	.LBB17_6
	.quad	.LBB17_11
	.quad	.LBB17_13
	.quad	.LBB17_14
	.quad	.LBB17_15
	.quad	.LBB17_16
	.quad	.LBB17_18
	.quad	.LBB17_26
	.quad	.LBB17_27
	.quad	.LBB17_35
	.quad	.LBB17_36
	.quad	.LBB17_37
	.quad	.LBB17_38
	.quad	.LBB17_39
	.quad	.LBB17_41
	.quad	.LBB17_43
	.quad	.LBB17_44
	.quad	.LBB17_45
	.quad	.LBB17_47
	.quad	.LBB17_53
	.quad	.LBB17_54
	.quad	.LBB17_55
	.quad	.LBB17_57
	.quad	.LBB17_58
	.quad	.LBB17_59
	.quad	.LBB17_61
	.quad	.LBB17_62
	.quad	.LBB17_63
	.quad	.LBB17_65
	.quad	.LBB17_66
	.quad	.LBB17_71
	.quad	.LBB17_72
	.quad	.LBB17_73
	.quad	.LBB17_81
	.quad	.LBB17_74
	.quad	.LBB17_78
	.quad	.LBB17_79
	.quad	.LBB17_80
	.quad	.LBB17_25
	.quad	.LBB17_31
	.quad	.LBB17_70
	.quad	.LBB17_28
	.quad	.LBB17_7
	.quad	.LBB17_8
	.quad	.LBB17_9
	.quad	.LBB17_10
	.quad	.LBB17_12
	.quad	.LBB17_17
	.quad	.LBB17_19
	.quad	.LBB17_20
	.quad	.LBB17_21
	.quad	.LBB17_22
	.quad	.LBB17_23
	.quad	.LBB17_24
	.quad	.LBB17_29
	.quad	.LBB17_30
	.quad	.LBB17_32
	.quad	.LBB17_33
	.quad	.LBB17_34
	.quad	.LBB17_40
	.quad	.LBB17_42
	.quad	.LBB17_46
	.quad	.LBB17_48
	.quad	.LBB17_49
	.quad	.LBB17_50
	.quad	.LBB17_51
	.quad	.LBB17_52
	.quad	.LBB17_56
	.quad	.LBB17_60
	.quad	.LBB17_64
	.quad	.LBB17_67
	.quad	.LBB17_68
	.quad	.LBB17_69
	.quad	.LBB17_75
	.quad	.LBB17_76
	.quad	.LBB17_77
                                        # -- End function
	.section	.text._ZNK6thrust6system6detail21system_error_category7messageB5cxx11Ei,"axG",@progbits,_ZNK6thrust6system6detail21system_error_category7messageB5cxx11Ei,comdat
	.weak	_ZNK6thrust6system6detail21system_error_category7messageB5cxx11Ei # -- Begin function _ZNK6thrust6system6detail21system_error_category7messageB5cxx11Ei
	.p2align	1, 0x90
	.type	_ZNK6thrust6system6detail21system_error_category7messageB5cxx11Ei,@function
_ZNK6thrust6system6detail21system_error_category7messageB5cxx11Ei: # @_ZNK6thrust6system6detail21system_error_category7messageB5cxx11Ei
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	pushq	%rax
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -24
	.cfi_offset %rbp, -16
	movl	%edx, %ebp
	movq	%rdi, %rbx
	movb	_ZGVZN6thrust6system16generic_categoryEvE6result(%rip), %al
	testb	%al, %al
	je	.LBB18_1
.LBB18_3:                               # %_ZN6thrust6system16generic_categoryEv.exit
	movq	_ZZN6thrust6system16generic_categoryEvE6result(%rip), %rax
	movl	$_ZZN6thrust6system16generic_categoryEvE6result, %esi
	movq	%rbx, %rdi
	movl	%ebp, %edx
	callq	*48(%rax)
	movq	%rbx, %rax
	addq	$8, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB18_1:
	.cfi_def_cfa_offset 32
	movl	$_ZGVZN6thrust6system16generic_categoryEvE6result, %edi
	callq	__cxa_guard_acquire
	testl	%eax, %eax
	je	.LBB18_3
# %bb.2:
	movq	$_ZTVN6thrust6system6detail22generic_error_categoryE+16, _ZZN6thrust6system16generic_categoryEvE6result(%rip)
	movl	$_ZN6thrust6system14error_categoryD2Ev, %edi
	movl	$_ZZN6thrust6system16generic_categoryEvE6result, %esi
	movl	$__dso_handle, %edx
	callq	__cxa_atexit
	movl	$_ZGVZN6thrust6system16generic_categoryEvE6result, %edi
	callq	__cxa_guard_release
	jmp	.LBB18_3
.Lfunc_end18:
	.size	_ZNK6thrust6system6detail21system_error_category7messageB5cxx11Ei, .Lfunc_end18-_ZNK6thrust6system6detail21system_error_category7messageB5cxx11Ei
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN6thrust6system20make_error_conditionENS0_4errc6errc_tE,"axG",@progbits,_ZN6thrust6system20make_error_conditionENS0_4errc6errc_tE,comdat
	.weak	_ZN6thrust6system20make_error_conditionENS0_4errc6errc_tE # -- Begin function _ZN6thrust6system20make_error_conditionENS0_4errc6errc_tE
	.type	_ZN6thrust6system20make_error_conditionENS0_4errc6errc_tE,@function
_ZN6thrust6system20make_error_conditionENS0_4errc6errc_tE: # @_ZN6thrust6system20make_error_conditionENS0_4errc6errc_tE
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movl	%edi, %ebx
	movb	_ZGVZN6thrust6system16generic_categoryEvE6result(%rip), %al
	testb	%al, %al
	je	.LBB19_1
.LBB19_3:                               # %_ZN6thrust6system16generic_categoryEv.exit
	movl	$_ZZN6thrust6system16generic_categoryEvE6result, %edx
	movl	%ebx, %eax
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.LBB19_1:
	.cfi_def_cfa_offset 16
	movl	$_ZGVZN6thrust6system16generic_categoryEvE6result, %edi
	callq	__cxa_guard_acquire
	testl	%eax, %eax
	je	.LBB19_3
# %bb.2:
	movq	$_ZTVN6thrust6system6detail22generic_error_categoryE+16, _ZZN6thrust6system16generic_categoryEvE6result(%rip)
	movl	$_ZN6thrust6system14error_categoryD2Ev, %edi
	movl	$_ZZN6thrust6system16generic_categoryEvE6result, %esi
	movl	$__dso_handle, %edx
	callq	__cxa_atexit
	movl	$_ZGVZN6thrust6system16generic_categoryEvE6result, %edi
	callq	__cxa_guard_release
	jmp	.LBB19_3
.Lfunc_end19:
	.size	_ZN6thrust6system20make_error_conditionENS0_4errc6errc_tE, .Lfunc_end19-_ZN6thrust6system20make_error_conditionENS0_4errc6errc_tE
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN6thrust6system6detail22generic_error_categoryD0Ev,"axG",@progbits,_ZN6thrust6system6detail22generic_error_categoryD0Ev,comdat
	.weak	_ZN6thrust6system6detail22generic_error_categoryD0Ev # -- Begin function _ZN6thrust6system6detail22generic_error_categoryD0Ev
	.p2align	1, 0x90
	.type	_ZN6thrust6system6detail22generic_error_categoryD0Ev,@function
_ZN6thrust6system6detail22generic_error_categoryD0Ev: # @_ZN6thrust6system6detail22generic_error_categoryD0Ev
	.cfi_startproc
# %bb.0:
	jmp	_ZdlPv                          # TAILCALL
.Lfunc_end20:
	.size	_ZN6thrust6system6detail22generic_error_categoryD0Ev, .Lfunc_end20-_ZN6thrust6system6detail22generic_error_categoryD0Ev
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNK6thrust6system6detail22generic_error_category4nameEv,"axG",@progbits,_ZNK6thrust6system6detail22generic_error_category4nameEv,comdat
	.weak	_ZNK6thrust6system6detail22generic_error_category4nameEv # -- Begin function _ZNK6thrust6system6detail22generic_error_category4nameEv
	.p2align	1, 0x90
	.type	_ZNK6thrust6system6detail22generic_error_category4nameEv,@function
_ZNK6thrust6system6detail22generic_error_category4nameEv: # @_ZNK6thrust6system6detail22generic_error_category4nameEv
	.cfi_startproc
# %bb.0:
	movl	$.L.str.8, %eax
	retq
.Lfunc_end21:
	.size	_ZNK6thrust6system6detail22generic_error_category4nameEv, .Lfunc_end21-_ZNK6thrust6system6detail22generic_error_category4nameEv
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNK6thrust6system6detail22generic_error_category7messageB5cxx11Ei,"axG",@progbits,_ZNK6thrust6system6detail22generic_error_category7messageB5cxx11Ei,comdat
	.weak	_ZNK6thrust6system6detail22generic_error_category7messageB5cxx11Ei # -- Begin function _ZNK6thrust6system6detail22generic_error_category7messageB5cxx11Ei
	.p2align	1, 0x90
	.type	_ZNK6thrust6system6detail22generic_error_category7messageB5cxx11Ei,@function
_ZNK6thrust6system6detail22generic_error_category7messageB5cxx11Ei: # @_ZNK6thrust6system6detail22generic_error_category7messageB5cxx11Ei
.Lfunc_begin2:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception2
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %rbp, -16
	movl	%edx, %ebp
	movq	%rdi, %rbx
	movb	_ZGVZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11(%rip), %al
	testb	%al, %al
	je	.LBB22_1
.LBB22_4:
	movl	%ebp, %edi
	callq	strerror
	movq	%rax, %r14
	leaq	16(%rbx), %rax
	movq	%rax, (%rbx)
	testq	%r14, %r14
	je	.LBB22_6
# %bb.5:
	movq	%r14, %rdi
	callq	strlen
	movq	%r14, %rdx
	addq	%rax, %rdx
	movq	%rbx, %rdi
	movq	%r14, %rsi
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag
	jmp	.LBB22_7
.LBB22_6:
	movq	_ZZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11(%rip), %rsi
	movq	_ZZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11+8(%rip), %rdx
	addq	%rsi, %rdx
	movq	%rbx, %rdi
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPcEEvT_S7_St20forward_iterator_tag
.LBB22_7:
	movq	%rbx, %rax
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB22_1:
	.cfi_def_cfa_offset 32
	movl	$_ZGVZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11, %edi
	callq	__cxa_guard_acquire
	testl	%eax, %eax
	je	.LBB22_4
# %bb.2:
	movq	$_ZZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11+16, _ZZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11(%rip)
.Ltmp28:
	movl	$_ZZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11, %edi
	movl	$.L.str.9, %esi
	movl	$.L.str.9+13, %edx
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag
.Ltmp29:
# %bb.3:                                # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_.exit
	movl	$_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev, %edi
	movl	$_ZZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11, %esi
	movl	$__dso_handle, %edx
	callq	__cxa_atexit
	movl	$_ZGVZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11, %edi
	callq	__cxa_guard_release
	jmp	.LBB22_4
.LBB22_8:                               # %.critedge17
.Ltmp30:
	movq	%rax, %rbx
	movl	$_ZGVZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11, %edi
	callq	__cxa_guard_abort
	movq	%rbx, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end22:
	.size	_ZNK6thrust6system6detail22generic_error_category7messageB5cxx11Ei, .Lfunc_end22-_ZNK6thrust6system6detail22generic_error_category7messageB5cxx11Ei
	.cfi_endproc
	.section	.gcc_except_table._ZNK6thrust6system6detail22generic_error_category7messageB5cxx11Ei,"aG",@progbits,_ZNK6thrust6system6detail22generic_error_category7messageB5cxx11Ei,comdat
	.p2align	2, 0x0
GCC_except_table22:
.Lexception2:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end2-.Lcst_begin2
.Lcst_begin2:
	.uleb128 .Lfunc_begin2-.Lfunc_begin2    # >> Call Site 1 <<
	.uleb128 .Ltmp28-.Lfunc_begin2          #   Call between .Lfunc_begin2 and .Ltmp28
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp28-.Lfunc_begin2          # >> Call Site 2 <<
	.uleb128 .Ltmp29-.Ltmp28                #   Call between .Ltmp28 and .Ltmp29
	.uleb128 .Ltmp30-.Lfunc_begin2          #     jumps to .Ltmp30
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp29-.Lfunc_begin2          # >> Call Site 3 <<
	.uleb128 .Lfunc_end22-.Ltmp29           #   Call between .Ltmp29 and .Lfunc_end22
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end2:
	.p2align	2, 0x0
                                        # -- End function
	.section	.text._ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_,"axG",@progbits,_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_,comdat
	.weak	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_ # -- Begin function _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_
	.p2align	1, 0x90
	.type	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_,@function
_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_: # @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	pushq	%rax
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	leaq	16(%rdi), %rax
	movq	%rax, (%rdi)
	testq	%rsi, %rsi
	je	.LBB23_1
# %bb.2:
	movq	%rsi, %rbx
	movq	%rdi, %r14
	movq	%rsi, %rdi
	callq	strlen
	leaq	(%rax,%rbx), %rdx
	movq	%r14, %rdi
	movq	%rbx, %rsi
	addq	$8, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	jmp	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag # TAILCALL
.LBB23_1:
	.cfi_def_cfa_offset 32
	movl	$.L.str.10, %edi
	callq	_ZSt19__throw_logic_errorPKc
.Lfunc_end23:
	.size	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_, .Lfunc_end23-_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag,"axG",@progbits,_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag,comdat
	.weak	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag # -- Begin function _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag
	.p2align	1, 0x90
	.type	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag,@function
_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag: # @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdx, %r14
	movq	%rsi, %r15
	movq	%rdi, %rbx
	subq	%rsi, %r14
	movq	%r14, (%rsp)
	cmpq	$15, %r14
	jbe	.LBB24_1
# %bb.2:
	movq	%rsp, %r12
	movq	%rbx, %rdi
	movq	%r12, %rsi
	xorl	%edx, %edx
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE9_M_createERmm
	movq	%rax, (%rbx)
	movq	(%r12), %rcx
	movq	%rcx, 16(%rbx)
	jmp	.LBB24_3
.LBB24_1:                               # %._crit_edge
	movq	(%rbx), %rax
.LBB24_3:
	testq	%r14, %r14
	je	.LBB24_7
# %bb.4:
	cmpq	$1, %r14
	jne	.LBB24_6
# %bb.5:
	movb	(%r15), %cl
	movb	%cl, (%rax)
	jmp	.LBB24_7
.LBB24_6:
	movq	%rax, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	callq	memcpy@PLT
.LBB24_7:                               # %_ZZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tagEN6_GuardD2Ev.exit
	movq	(%rsp), %rax
	movq	%rax, 8(%rbx)
	movq	(%rbx), %rcx
	movb	$0, (%rcx,%rax)
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end24:
	.size	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag, .Lfunc_end24-_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag
	.cfi_endproc
                                        # -- End function
	.section	.text.__clang_call_terminate,"axG",@progbits,__clang_call_terminate,comdat
	.hidden	__clang_call_terminate          # -- Begin function __clang_call_terminate
	.weak	__clang_call_terminate
	.type	__clang_call_terminate,@function
__clang_call_terminate:                 # @__clang_call_terminate
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__cxa_begin_catch
	callq	_ZSt9terminatev
.Lfunc_end25:
	.size	__clang_call_terminate, .Lfunc_end25-__clang_call_terminate
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPcEEvT_S7_St20forward_iterator_tag,"axG",@progbits,_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPcEEvT_S7_St20forward_iterator_tag,comdat
	.weak	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPcEEvT_S7_St20forward_iterator_tag # -- Begin function _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPcEEvT_S7_St20forward_iterator_tag
	.p2align	1, 0x90
	.type	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPcEEvT_S7_St20forward_iterator_tag,@function
_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPcEEvT_S7_St20forward_iterator_tag: # @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPcEEvT_S7_St20forward_iterator_tag
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdx, %r14
	movq	%rsi, %r15
	movq	%rdi, %rbx
	subq	%rsi, %r14
	movq	%r14, (%rsp)
	cmpq	$15, %r14
	jbe	.LBB26_1
# %bb.2:
	movq	%rsp, %r12
	movq	%rbx, %rdi
	movq	%r12, %rsi
	xorl	%edx, %edx
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE9_M_createERmm
	movq	%rax, (%rbx)
	movq	(%r12), %rcx
	movq	%rcx, 16(%rbx)
	jmp	.LBB26_3
.LBB26_1:                               # %._crit_edge
	movq	(%rbx), %rax
.LBB26_3:
	testq	%r14, %r14
	je	.LBB26_7
# %bb.4:
	cmpq	$1, %r14
	jne	.LBB26_6
# %bb.5:
	movb	(%r15), %cl
	movb	%cl, (%rax)
	jmp	.LBB26_7
.LBB26_6:
	movq	%rax, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	callq	memcpy@PLT
.LBB26_7:                               # %_ZZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPcEEvT_S7_St20forward_iterator_tagEN6_GuardD2Ev.exit
	movq	(%rsp), %rax
	movq	%rax, 8(%rbx)
	movq	(%rbx), %rcx
	movb	$0, (%rcx,%rax)
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end26:
	.size	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPcEEvT_S7_St20forward_iterator_tag, .Lfunc_end26-_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPcEEvT_S7_St20forward_iterator_tag
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN6thrust6system12system_errorD0Ev,"axG",@progbits,_ZN6thrust6system12system_errorD0Ev,comdat
	.weak	_ZN6thrust6system12system_errorD0Ev # -- Begin function _ZN6thrust6system12system_errorD0Ev
	.p2align	1, 0x90
	.type	_ZN6thrust6system12system_errorD0Ev,@function
_ZN6thrust6system12system_errorD0Ev:    # @_ZN6thrust6system12system_errorD0Ev
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movq	%rdi, %rbx
	movq	$_ZTVN6thrust6system12system_errorE+16, (%rdi)
	movq	32(%rdi), %rdi
	leaq	48(%rbx), %rax
	cmpq	%rax, %rdi
	je	.LBB27_2
# %bb.1:                                # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i.i
	callq	_ZdlPv
.LBB27_2:                               # %_ZN6thrust6system12system_errorD2Ev.exit
	movq	%rbx, %rdi
	callq	_ZNSt13runtime_errorD2Ev
	movq	%rbx, %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	_ZdlPv                          # TAILCALL
.Lfunc_end27:
	.size	_ZN6thrust6system12system_errorD0Ev, .Lfunc_end27-_ZN6thrust6system12system_errorD0Ev
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNK6thrust6system12system_error4whatEv,"axG",@progbits,_ZNK6thrust6system12system_error4whatEv,comdat
	.weak	_ZNK6thrust6system12system_error4whatEv # -- Begin function _ZNK6thrust6system12system_error4whatEv
	.p2align	1, 0x90
	.type	_ZNK6thrust6system12system_error4whatEv,@function
_ZNK6thrust6system12system_error4whatEv: # @_ZNK6thrust6system12system_error4whatEv
.Lfunc_begin3:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception3
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	32(%rdi), %r14
	cmpq	$0, 40(%rdi)
	je	.LBB28_3
.LBB28_1:
	movq	(%r14), %rbx
.LBB28_2:
	movq	%rbx, %rax
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.LBB28_3:
	.cfi_def_cfa_offset 80
	movq	%rdi, %rbx
	callq	_ZNKSt13runtime_error4whatEv
	movq	%rax, %r15
	movq	40(%rbx), %r12
	movq	%rax, %rdi
	callq	strlen
.Ltmp31:
	movq	%r14, %rdi
	xorl	%esi, %esi
	movq	%r12, %rdx
	movq	%r15, %rcx
	movq	%rax, %r8
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_replaceEmmPKcm
.Ltmp32:
# %bb.4:                                # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEaSEPKc.exit
	movl	16(%rbx), %edx
	testl	%edx, %edx
	je	.LBB28_1
# %bb.5:
	cmpq	$0, 40(%rbx)
	je	.LBB28_8
# %bb.6:
.Ltmp33:
	movl	$.L.str.13, %esi
	movq	%r14, %rdi
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6appendEPKc
.Ltmp34:
# %bb.7:                                # %._ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEpLEPKc.exit_crit_edge
	movl	16(%rbx), %edx
.LBB28_8:                               # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEpLEPKc.exit
	movq	24(%rbx), %rsi
	movq	(%rsi), %rax
.Ltmp36:
	leaq	8(%rsp), %rdi
	callq	*48(%rax)
.Ltmp37:
# %bb.9:                                # %_ZNK6thrust6system10error_code7messageB5cxx11Ev.exit
	movq	8(%rsp), %rsi
	movq	16(%rsp), %rdx
.Ltmp39:
	movq	%r14, %rdi
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6appendEPKcm
.Ltmp40:
# %bb.10:                               # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEpLERKS4_.exit
	leaq	24(%rsp), %rax
	movq	-16(%rax), %rdi
	cmpq	%rax, %rdi
	je	.LBB28_1
# %bb.11:                               # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i
	callq	_ZdlPv
	jmp	.LBB28_1
.LBB28_12:
.Ltmp41:
	movq	%rax, %r14
	leaq	24(%rsp), %rax
	movq	-16(%rax), %rdi
	cmpq	%rax, %rdi
	je	.LBB28_17
# %bb.13:                               # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i4
	callq	_ZdlPv
	jmp	.LBB28_17
.LBB28_14:
.Ltmp38:
	jmp	.LBB28_16
.LBB28_15:
.Ltmp35:
.LBB28_16:
	movq	%rax, %r14
.LBB28_17:
	movq	%r14, %rdi
	callq	__cxa_begin_catch
	movq	%rbx, %rdi
	callq	_ZNKSt13runtime_error4whatEv
	movq	%rax, %rbx
.Ltmp42:
	callq	__cxa_end_catch
.Ltmp43:
	jmp	.LBB28_2
.LBB28_18:
.Ltmp44:
	movq	%rax, %rdi
	callq	__clang_call_terminate
.Lfunc_end28:
	.size	_ZNK6thrust6system12system_error4whatEv, .Lfunc_end28-_ZNK6thrust6system12system_error4whatEv
	.cfi_endproc
	.section	.gcc_except_table._ZNK6thrust6system12system_error4whatEv,"aG",@progbits,_ZNK6thrust6system12system_error4whatEv,comdat
	.p2align	2, 0x0
GCC_except_table28:
.Lexception3:
	.byte	255                             # @LPStart Encoding = omit
	.byte	3                               # @TType Encoding = udata4
	.uleb128 .Lttbase0-.Lttbaseref0
.Lttbaseref0:
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end3-.Lcst_begin3
.Lcst_begin3:
	.uleb128 .Ltmp31-.Lfunc_begin3          # >> Call Site 1 <<
	.uleb128 .Ltmp34-.Ltmp31                #   Call between .Ltmp31 and .Ltmp34
	.uleb128 .Ltmp35-.Lfunc_begin3          #     jumps to .Ltmp35
	.byte	1                               #   On action: 1
	.uleb128 .Ltmp36-.Lfunc_begin3          # >> Call Site 2 <<
	.uleb128 .Ltmp37-.Ltmp36                #   Call between .Ltmp36 and .Ltmp37
	.uleb128 .Ltmp38-.Lfunc_begin3          #     jumps to .Ltmp38
	.byte	1                               #   On action: 1
	.uleb128 .Ltmp39-.Lfunc_begin3          # >> Call Site 3 <<
	.uleb128 .Ltmp40-.Ltmp39                #   Call between .Ltmp39 and .Ltmp40
	.uleb128 .Ltmp41-.Lfunc_begin3          #     jumps to .Ltmp41
	.byte	1                               #   On action: 1
	.uleb128 .Ltmp40-.Lfunc_begin3          # >> Call Site 4 <<
	.uleb128 .Ltmp42-.Ltmp40                #   Call between .Ltmp40 and .Ltmp42
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp42-.Lfunc_begin3          # >> Call Site 5 <<
	.uleb128 .Ltmp43-.Ltmp42                #   Call between .Ltmp42 and .Ltmp43
	.uleb128 .Ltmp44-.Lfunc_begin3          #     jumps to .Ltmp44
	.byte	1                               #   On action: 1
.Lcst_end3:
	.byte	1                               # >> Action Record 1 <<
                                        #   Catch TypeInfo 1
	.byte	0                               #   No further actions
	.p2align	2, 0x0
                                        # >> Catch TypeInfos <<
	.long	0                               # TypeInfo 1
.Lttbase0:
	.p2align	2, 0x0
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _ZN7rocprim6detail11reduce_implILb1ENS_14default_configEN6thrust11hip_rocprim26transform_input_iterator_tIdNS3_17counting_iteratorIjNS3_11use_defaultES7_S7_EE11estimate_esEEPddNS3_4plusIdEEEE10hipError_tPvRmT1_T2_T3_mT4_P12ihipStream_tb
.LCPI29_0:
	.quad	0x41cdcd6500000000              # double 1.0E+9
.LCPI29_1:
	.quad	0x408f400000000000              # double 1000
	.section	.text._ZN7rocprim6detail11reduce_implILb1ENS_14default_configEN6thrust11hip_rocprim26transform_input_iterator_tIdNS3_17counting_iteratorIjNS3_11use_defaultES7_S7_EE11estimate_esEEPddNS3_4plusIdEEEE10hipError_tPvRmT1_T2_T3_mT4_P12ihipStream_tb,"axG",@progbits,_ZN7rocprim6detail11reduce_implILb1ENS_14default_configEN6thrust11hip_rocprim26transform_input_iterator_tIdNS3_17counting_iteratorIjNS3_11use_defaultES7_S7_EE11estimate_esEEPddNS3_4plusIdEEEE10hipError_tPvRmT1_T2_T3_mT4_P12ihipStream_tb,comdat
	.weak	_ZN7rocprim6detail11reduce_implILb1ENS_14default_configEN6thrust11hip_rocprim26transform_input_iterator_tIdNS3_17counting_iteratorIjNS3_11use_defaultES7_S7_EE11estimate_esEEPddNS3_4plusIdEEEE10hipError_tPvRmT1_T2_T3_mT4_P12ihipStream_tb
	.type	_ZN7rocprim6detail11reduce_implILb1ENS_14default_configEN6thrust11hip_rocprim26transform_input_iterator_tIdNS3_17counting_iteratorIjNS3_11use_defaultES7_S7_EE11estimate_esEEPddNS3_4plusIdEEEE10hipError_tPvRmT1_T2_T3_mT4_P12ihipStream_tb,@function
_ZN7rocprim6detail11reduce_implILb1ENS_14default_configEN6thrust11hip_rocprim26transform_input_iterator_tIdNS3_17counting_iteratorIjNS3_11use_defaultES7_S7_EE11estimate_esEEPddNS3_4plusIdEEEE10hipError_tPvRmT1_T2_T3_mT4_P12ihipStream_tb: # @_ZN7rocprim6detail11reduce_implILb1ENS_14default_configEN6thrust11hip_rocprim26transform_input_iterator_tIdNS3_17counting_iteratorIjNS3_11use_defaultES7_S7_EE11estimate_esEEPddNS3_4plusIdEEEE10hipError_tPvRmT1_T2_T3_mT4_P12ihipStream_tb
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$1704, %rsp                     # imm = 0x6A8
	.cfi_def_cfa_offset 1760
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, %rbx
	movq	%r8, %rbp
	movsd	%xmm0, 64(%rsp)                 # 8-byte Spill
	movq	%rcx, %r13
	movq	%rdx, %r14
	movq	%rsi, %r12
	movq	%rdi, %r15
	testq	$-3, %r9
	jne	.LBB29_1
# %bb.3:                                # %_ZN7rocprim6detail22get_device_from_streamEP12ihipStream_tRi.exit.i
	leaq	96(%rsp), %rdi
	callq	hipGetDevice
	testl	%eax, %eax
	jne	.LBB29_59
# %bb.4:                                # %thread-pre-split.i
	movl	96(%rsp), %esi
	jmp	.LBB29_5
.LBB29_1:
	movq	%rbx, %rdi
	callq	hipGetStreamDeviceId
	movl	%eax, %esi
	movl	%eax, 96(%rsp)
	testl	%eax, %eax
	js	.LBB29_2
.LBB29_5:                               # %_ZN7rocprim6detail22get_device_from_streamEP12ihipStream_tRi.exit.thread.i
	movl	$999, %eax                      # imm = 0x3E7
	cmpl	$511, %esi                      # imm = 0x1FF
	ja	.LBB29_59
# %bb.6:
	movq	%r14, 128(%rsp)                 # 8-byte Spill
	movl	%esi, %r14d
	movl	_ZZN7rocprim6detail15get_device_archEiRNS0_11target_archEE10arch_cache(,%r14,4), %edi
	testl	%edi, %edi
	je	.LBB29_8
# %bb.7:                                # %_ZN7rocprim6detail16host_target_archEP12ihipStream_tRNS0_11target_archE.exit.thread217
	movq	%r13, 88(%rsp)                  # 8-byte Spill
.LBB29_10:
	movb	1760(%rsp), %r14b
	callq	_ZN7rocprim6detail20dispatch_target_archINS0_21wrapped_reduce_configINS_14default_configEdEEEEDaNS0_11target_archE
	movq	%rdx, %r13
	movq	%rax, %rsi
	shrq	$32, %rsi
	movq	%rax, 80(%rsp)                  # 8-byte Spill
	imull	%eax, %esi
	leaq	(%rsi,%rbp), %rax
	decq	%rax
	xorl	%ecx, %ecx
	xorl	%edx, %edx
	divq	%rsi
	movq	%rcx, 232(%rsp)
	movq	%rcx, 96(%rsp)
	movq	%rcx, 120(%rsp)
	cmpq	$2, %rax
	movq	%rsi, 104(%rsp)                 # 8-byte Spill
	jb	.LBB29_13
# %bb.11:
	movzbl	%r14b, %ecx
	movl	%ecx, (%rsp)
	leaq	120(%rsp), %rsi
	xorl	%edi, %edi
	xorl	%edx, %edx
	movq	88(%rsp), %rcx                  # 8-byte Reload
	movsd	64(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	movq	%rax, %r14
	movq	%rax, %r8
	movq	%rbx, %r9
	callq	_ZN7rocprim6detail11reduce_implILb1ENS_14default_configEPdS3_dN6thrust4plusIdEEEE10hipError_tPvRmT1_T2_T3_mT4_P12ihipStream_tb
	testl	%eax, %eax
	jne	.LBB29_59
# %bb.12:                               # %._crit_edge258
	movq	120(%rsp), %rcx
	movq	%r14, %rax
	movq	104(%rsp), %rsi                 # 8-byte Reload
	movb	1760(%rsp), %r14b
.LBB29_13:
	movq	%rax, 72(%rsp)                  # 8-byte Spill
	leaq	(,%rax,8), %rax
	xorl	%edx, %edx
	cmpq	%rbp, %rsi
	cmovbq	%rax, %rdx
	leaq	232(%rsp), %rax
	movq	%rax, 176(%rsp)
	movq	%rdx, 184(%rsp)
	movl	$8, %eax
	movq	%rax, 192(%rsp)
	leaq	96(%rsp), %rdx
	movq	%rdx, 200(%rsp)
	movq	%rcx, 208(%rsp)
	movq	%rax, 216(%rsp)
	movupd	176(%rsp), %xmm0
	movups	192(%rsp), %xmm1
	movups	208(%rsp), %xmm2
	movups	%xmm2, 32(%rsp)
	movups	%xmm1, 16(%rsp)
	movupd	%xmm0, (%rsp)
	movq	%r15, %rdi
	movq	%r12, %rsi
	callq	_ZN7rocprim6detail12temp_storage9partitionINS1_16linear_partitionIJNS1_16simple_partitionIdEENS4_IvEEEEEEE10hipError_tPvRmT_
	testq	%r15, %r15
	je	.LBB29_59
# %bb.14:
	testl	%eax, %eax
	jne	.LBB29_59
# %bb.15:
	movl	%r14d, %ecx
	movl	%r13d, %eax
	xorl	%edx, %edx
	movq	104(%rsp), %r14                 # 8-byte Reload
	divl	%r14d
                                        # kill: def $eax killed $eax def $rax
	cmpl	$1, %eax
	adcl	$0, %eax
	movq	%rax, 112(%rsp)                 # 8-byte Spill
	testb	%cl, %cl
	je	.LBB29_40
# %bb.16:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.15, %esi
	movl	$11, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	80(%rsp), %r15d                 # 4-byte Reload
	movl	$_ZSt4cout, %edi
	movq	%r15, %rsi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 55(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB29_18
# %bb.17:
	leaq	55(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB29_19
.LBB29_2:
	movl	$400, %eax                      # imm = 0x190
	jmp	.LBB29_59
.LBB29_8:
	leaq	232(%rsp), %rdi
	callq	hipGetDevicePropertiesR0600
	testl	%eax, %eax
	jne	.LBB29_59
# %bb.9:                                # %_ZN7rocprim6detail16host_target_archEP12ihipStream_tRNS0_11target_archE.exit.thread222
	movq	%r13, 88(%rsp)                  # 8-byte Spill
	leaq	1392(%rsp), %r13
	leaq	1648(%rsp), %rsi
	movq	%r13, %rdi
	callq	_ZSt9__find_ifIPKcN9__gnu_cxx5__ops10_Iter_predIZN7rocprim6detail14parse_gcn_archES1_EUlRS0_E_EEET_SA_SA_T0_St26random_access_iterator_tag
	subq	%r13, %rax
	movq	%r13, %rdi
	movq	%rax, %rsi
	callq	_ZN7rocprim6detail25get_target_arch_from_nameEPKcm
	movl	%eax, %edi
	xchgl	%eax, _ZZN7rocprim6detail15get_device_archEiRNS0_11target_archEE10arch_cache(,%r14,4)
	jmp	.LBB29_10
.LBB29_40:                              # %.thread241
	cmpq	$1, 72(%rsp)                    # 8-byte Folded Reload
	ja	.LBB29_29
# %bb.41:                               # %.thread241..thread242_crit_edge
	movl	80(%rsp), %r15d                 # 4-byte Reload
	xorl	%eax, %eax
	jmp	.LBB29_51
.LBB29_18:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB29_19:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit
	movl	$_ZSt4cout, %edi
	movl	$.L.str.16, %esi
	movl	$17, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	72(%rsp), %rsi                  # 8-byte Reload
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 55(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB29_21
# %bb.20:
	leaq	55(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB29_22
.LBB29_21:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB29_22:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit161
	movl	$_ZSt4cout, %edi
	movl	$.L.str.17, %esi
	movl	$23, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	112(%rsp), %rsi                 # 8-byte Reload
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 55(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB29_24
# %bb.23:
	leaq	55(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB29_25
.LBB29_24:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB29_25:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit164
	movl	$_ZSt4cout, %edi
	movl	$.L.str.18, %esi
	movl	$16, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	%r14, %rsi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 55(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB29_27
# %bb.26:
	leaq	55(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB29_28
.LBB29_27:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB29_28:
	cmpq	$1, 72(%rsp)                    # 8-byte Folded Reload
	jbe	.LBB29_50
.LBB29_29:
	movq	%rbp, 160(%rsp)                 # 8-byte Spill
	leaq	-1(%rbp), %rcx
	movq	112(%rsp), %r13                 # 8-byte Reload
	imulq	%r14, %r13
	leaq	(%rcx,%r13), %rax
	xorl	%edx, %edx
	movq	%rdx, 56(%rsp)                  # 8-byte Spill
	xorl	%edx, %edx
	divq	%r13
	movq	%rax, 152(%rsp)                 # 8-byte Spill
	addq	%r13, %rcx
	jb	.LBB29_45
# %bb.30:                               # %.lr.ph
	movq	104(%rsp), %rax                 # 8-byte Reload
	decq	%rax
	movq	%rax, 144(%rsp)                 # 8-byte Spill
	movl	80(%rsp), %eax                  # 4-byte Reload
	btsq	$32, %rax
	movq	%rax, 80(%rsp)                  # 8-byte Spill
	xorl	%r14d, %r14d
	xorl	%ebp, %ebp
	xorl	%eax, %eax
	movq	%rax, 56(%rsp)                  # 8-byte Spill
.LBB29_31:                              # =>This Inner Loop Header: Depth=1
	movq	160(%rsp), %r15                 # 8-byte Reload
	subq	%rbp, %r15
	cmpq	%r13, %r15
	cmovaeq	%r13, %r15
	movq	144(%rsp), %rax                 # 8-byte Reload
	addq	%r15, %rax
	xorl	%edx, %edx
	divq	104(%rsp)                       # 8-byte Folded Reload
	movq	%rax, %r12
	cmpb	$0, 1760(%rsp)
	je	.LBB29_33
# %bb.32:                               #   in Loop: Header=BB29_31 Depth=1
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	%rax, 56(%rsp)                  # 8-byte Spill
.LBB29_33:                              #   in Loop: Header=BB29_31 Depth=1
	movl	%r12d, %edi
	movabsq	$4294967296, %rax               # imm = 0x100000000
	orq	%rax, %rdi
	movl	$1, %esi
	movq	80(%rsp), %rdx                  # 8-byte Reload
	movl	$1, %ecx
	xorl	%r8d, %r8d
	movq	%rbx, %r9
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB29_35
# %bb.34:                               #   in Loop: Header=BB29_31 Depth=1
	movq	128(%rsp), %rax                 # 8-byte Reload
	movl	(%rax), %eax
	addl	%ebp, %eax
	movl	%eax, 168(%rsp)
	movq	%r14, %rdx
	imulq	112(%rsp), %rdx                 # 8-byte Folded Reload
	shlq	$3, %rdx
	addq	232(%rsp), %rdx
	leaq	168(%rsp), %rdi
	movq	%r15, %rsi
	movsd	64(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	callq	_ZN7rocprim6detail34__device_stub__block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEdEEdN6thrust11hip_rocprim26transform_input_iterator_tIdNS5_17counting_iteratorIjNS5_11use_defaultES9_S9_EE11estimate_esEEPddNS5_4plusIdEEEEvT2_mT3_T4_T5_
.LBB29_35:                              #   in Loop: Header=BB29_31 Depth=1
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB29_42
# %bb.36:                               #   in Loop: Header=BB29_31 Depth=1
	cmpb	$0, 1760(%rsp)
	je	.LBB29_42
# %bb.37:                               #   in Loop: Header=BB29_31 Depth=1
	movl	$_ZSt4cout, %edi
	movl	$.L.str.19, %esi
	movl	$19, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.20, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	%r15, %rsi
	callq	_ZNSo9_M_insertImEERSoT_
	movl	$.L.str.21, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%rbx, %rdi
	callq	hipStreamSynchronize
	testl	%eax, %eax
	jne	.LBB29_59
# %bb.38:                               #   in Loop: Header=BB29_31 Depth=1
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	subq	56(%rsp), %rax                  # 8-byte Folded Reload
	xorps	%xmm0, %xmm0
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI29_0(%rip), %xmm0
	movsd	%xmm0, 136(%rsp)                # 8-byte Spill
	movl	$_ZSt4cout, %edi
	movl	$.L.str.22, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	136(%rsp), %xmm0                # 8-byte Reload
                                        # xmm0 = mem[0],zero
	mulsd	.LCPI29_1(%rip), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r15
	movl	$.L.str.23, %esi
	movl	$3, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movb	$10, 55(%rsp)
	movq	(%r15), %rax
	movq	-24(%rax), %rax
	cmpq	$0, 16(%r15,%rax)
	je	.LBB29_43
# %bb.39:                               #   in Loop: Header=BB29_31 Depth=1
	movl	$1, %edx
	movq	%r15, %rdi
	leaq	55(%rsp), %rsi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB29_44
.LBB29_42:                              #   in Loop: Header=BB29_31 Depth=1
	testl	%eax, %eax
	je	.LBB29_44
	jmp	.LBB29_59
.LBB29_43:                              #   in Loop: Header=BB29_31 Depth=1
	movq	%r15, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB29_44:                              #   in Loop: Header=BB29_31 Depth=1
	incq	%r14
	addq	%r13, %rbp
	cmpq	152(%rsp), %r14                 # 8-byte Folded Reload
	jb	.LBB29_31
.LBB29_45:                              # %._crit_edge
	movb	1760(%rsp), %bpl
	testb	%bpl, %bpl
	je	.LBB29_47
# %bb.46:
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	%rax, 56(%rsp)                  # 8-byte Spill
.LBB29_47:
	movq	96(%rsp), %rdi
	movq	232(%rsp), %rdx
	movzbl	%bpl, %eax
	movl	%eax, (%rsp)
	leaq	120(%rsp), %rsi
	movq	88(%rsp), %rcx                  # 8-byte Reload
	movsd	64(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	movq	72(%rsp), %r8                   # 8-byte Reload
	movq	%rbx, %r9
	callq	_ZN7rocprim6detail11reduce_implILb1ENS_14default_configEPdS3_dN6thrust4plusIdEEEE10hipError_tPvRmT1_T2_T3_mT4_P12ihipStream_tb
	testl	%eax, %eax
	jne	.LBB29_60
# %bb.48:
	testb	%bpl, %bpl
	je	.LBB29_60
# %bb.49:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.24, %esi
	movl	$20, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.20, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	72(%rsp), %rsi                  # 8-byte Reload
	jmp	.LBB29_56
.LBB29_50:
	callq	_ZNSt6chrono3_V212system_clock3nowEv
.LBB29_51:                              # %.thread242
	movq	%rax, 56(%rsp)                  # 8-byte Spill
	movq	88(%rsp), %r14                  # 8-byte Reload
	btsq	$32, %r15
	movabsq	$4294967296, %rdi               # imm = 0x100000000
	orq	$1, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	movq	%rbx, %r9
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB29_53
# %bb.52:
	movq	128(%rsp), %rax                 # 8-byte Reload
	movl	(%rax), %eax
	leaq	224(%rsp), %rdi
	movl	%eax, (%rdi)
	movq	%rbp, %rsi
	movq	%r14, %rdx
	movsd	64(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	callq	_ZN7rocprim6detail34__device_stub__block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEdEEdN6thrust11hip_rocprim26transform_input_iterator_tIdNS5_17counting_iteratorIjNS5_11use_defaultES9_S9_EE11estimate_esEEPddNS5_4plusIdEEEEvT2_mT3_T4_T5_
.LBB29_53:
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB29_60
# %bb.54:
	cmpb	$0, 1760(%rsp)
	je	.LBB29_60
# %bb.55:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.19, %esi
	movl	$19, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.20, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	%rbp, %rsi
.LBB29_56:
	callq	_ZNSo9_M_insertImEERSoT_
	movl	$.L.str.21, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%rbx, %rdi
	callq	hipStreamSynchronize
	testl	%eax, %eax
	jne	.LBB29_59
# %bb.57:                               # %.sink.split
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	subq	56(%rsp), %rax                  # 8-byte Folded Reload
	xorps	%xmm0, %xmm0
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI29_0(%rip), %xmm0
	movsd	%xmm0, 64(%rsp)                 # 8-byte Spill
	movl	$_ZSt4cout, %edi
	movl	$.L.str.22, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	64(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	mulsd	.LCPI29_1(%rip), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbx
	movl	$.L.str.23, %esi
	movl	$3, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c
	jmp	.LBB29_58
.LBB29_60:
	testl	%eax, %eax
	jne	.LBB29_59
.LBB29_58:
	xorl	%eax, %eax
.LBB29_59:
	addq	$1704, %rsp                     # imm = 0x6A8
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end29:
	.size	_ZN7rocprim6detail11reduce_implILb1ENS_14default_configEN6thrust11hip_rocprim26transform_input_iterator_tIdNS3_17counting_iteratorIjNS3_11use_defaultES7_S7_EE11estimate_esEEPddNS3_4plusIdEEEE10hipError_tPvRmT1_T2_T3_mT4_P12ihipStream_tb, .Lfunc_end29-_ZN7rocprim6detail11reduce_implILb1ENS_14default_configEN6thrust11hip_rocprim26transform_input_iterator_tIdNS3_17counting_iteratorIjNS3_11use_defaultES7_S7_EE11estimate_esEEPddNS3_4plusIdEEEE10hipError_tPvRmT1_T2_T3_mT4_P12ihipStream_tb
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN7rocprim6detail16host_target_archEP12ihipStream_tRNS0_11target_archE,"axG",@progbits,_ZN7rocprim6detail16host_target_archEP12ihipStream_tRNS0_11target_archE,comdat
	.weak	_ZN7rocprim6detail16host_target_archEP12ihipStream_tRNS0_11target_archE # -- Begin function _ZN7rocprim6detail16host_target_archEP12ihipStream_tRNS0_11target_archE
	.type	_ZN7rocprim6detail16host_target_archEP12ihipStream_tRNS0_11target_archE,@function
_ZN7rocprim6detail16host_target_archEP12ihipStream_tRNS0_11target_archE: # @_ZN7rocprim6detail16host_target_archEP12ihipStream_tRNS0_11target_archE
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$1480, %rsp                     # imm = 0x5C8
	.cfi_def_cfa_offset 1520
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %rbx
	testq	$-3, %rdi
	jne	.LBB30_1
# %bb.3:                                # %_ZN7rocprim6detail22get_device_from_streamEP12ihipStream_tRi.exit
	leaq	4(%rsp), %rdi
	callq	hipGetDevice
	movl	%eax, %ebp
	testl	%eax, %eax
	jne	.LBB30_9
# %bb.4:                                # %thread-pre-split
	movl	4(%rsp), %eax
	jmp	.LBB30_5
.LBB30_1:
	callq	hipGetStreamDeviceId
	movl	%eax, 4(%rsp)
	testl	%eax, %eax
	js	.LBB30_2
.LBB30_5:                               # %_ZN7rocprim6detail22get_device_from_streamEP12ihipStream_tRi.exit.thread
	movl	$999, %ebp                      # imm = 0x3E7
	cmpl	$511, %eax                      # imm = 0x1FF
	ja	.LBB30_9
# %bb.6:
	movl	%eax, %r15d
	movl	_ZZN7rocprim6detail15get_device_archEiRNS0_11target_archEE10arch_cache(,%r15,4), %ecx
	movl	%ecx, (%rbx)
	xorl	%ebp, %ebp
	testl	%ecx, %ecx
	jne	.LBB30_9
# %bb.7:
	leaq	8(%rsp), %rdi
	movl	%eax, %esi
	callq	hipGetDevicePropertiesR0600
	movl	%eax, %ebp
	testl	%eax, %eax
	jne	.LBB30_9
# %bb.8:
	leaq	1168(%rsp), %r14
	leaq	1424(%rsp), %rsi
	movq	%r14, %rdi
	callq	_ZSt9__find_ifIPKcN9__gnu_cxx5__ops10_Iter_predIZN7rocprim6detail14parse_gcn_archES1_EUlRS0_E_EEET_SA_SA_T0_St26random_access_iterator_tag
	subq	%r14, %rax
	movq	%r14, %rdi
	movq	%rax, %rsi
	callq	_ZN7rocprim6detail25get_target_arch_from_nameEPKcm
	movl	%eax, (%rbx)
	xchgl	%eax, _ZZN7rocprim6detail15get_device_archEiRNS0_11target_archEE10arch_cache(,%r15,4)
	jmp	.LBB30_9
.LBB30_2:
	movl	$400, %ebp                      # imm = 0x190
.LBB30_9:                               # %_ZN7rocprim6detail15get_device_archEiRNS0_11target_archE.exit
	movl	%ebp, %eax
	addq	$1480, %rsp                     # imm = 0x5C8
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end30:
	.size	_ZN7rocprim6detail16host_target_archEP12ihipStream_tRNS0_11target_archE, .Lfunc_end30-_ZN7rocprim6detail16host_target_archEP12ihipStream_tRNS0_11target_archE
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN7rocprim6detail20dispatch_target_archINS0_21wrapped_reduce_configINS_14default_configEdEEEEDaNS0_11target_archE,"axG",@progbits,_ZN7rocprim6detail20dispatch_target_archINS0_21wrapped_reduce_configINS_14default_configEdEEEEDaNS0_11target_archE,comdat
	.weak	_ZN7rocprim6detail20dispatch_target_archINS0_21wrapped_reduce_configINS_14default_configEdEEEEDaNS0_11target_archE # -- Begin function _ZN7rocprim6detail20dispatch_target_archINS0_21wrapped_reduce_configINS_14default_configEdEEEEDaNS0_11target_archE
	.type	_ZN7rocprim6detail20dispatch_target_archINS0_21wrapped_reduce_configINS_14default_configEdEEEEDaNS0_11target_archE,@function
_ZN7rocprim6detail20dispatch_target_archINS0_21wrapped_reduce_configINS_14default_configEdEEEEDaNS0_11target_archE: # @_ZN7rocprim6detail20dispatch_target_archINS0_21wrapped_reduce_configINS_14default_configEdEEEEDaNS0_11target_archE
	.cfi_startproc
# %bb.0:
	movabsq	$68719476992, %rax              # imm = 0x1000000100
	cmpl	$1029, %edi                     # imm = 0x405
	jg	.LBB31_5
# %bb.1:
	cmpl	$803, %edi                      # imm = 0x323
	je	.LBB31_8
# %bb.2:
	cmpl	$900, %edi                      # imm = 0x384
	je	.LBB31_4
# %bb.3:
	cmpl	$906, %edi                      # imm = 0x38A
	jne	.LBB31_9
.LBB31_4:
	movabsq	$17179869312, %rax              # imm = 0x400000080
	jmp	.LBB31_9
.LBB31_5:
	cmpl	$1030, %edi                     # imm = 0x406
	je	.LBB31_8
# %bb.6:
	cmpl	$1100, %edi                     # imm = 0x44C
	je	.LBB31_8
# %bb.7:
	cmpl	$1102, %edi                     # imm = 0x44E
	jne	.LBB31_9
.LBB31_8:
	movabsq	$34359738624, %rax              # imm = 0x800000100
.LBB31_9:
	movl	$4294967295, %edx               # imm = 0xFFFFFFFF
	retq
.Lfunc_end31:
	.size	_ZN7rocprim6detail20dispatch_target_archINS0_21wrapped_reduce_configINS_14default_configEdEEEEDaNS0_11target_archE, .Lfunc_end31-_ZN7rocprim6detail20dispatch_target_archINS0_21wrapped_reduce_configINS_14default_configEdEEEEDaNS0_11target_archE
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _ZN7rocprim6detail11reduce_implILb1ENS_14default_configEPdS3_dN6thrust4plusIdEEEE10hipError_tPvRmT1_T2_T3_mT4_P12ihipStream_tb
.LCPI32_0:
	.quad	0x41cdcd6500000000              # double 1.0E+9
.LCPI32_1:
	.quad	0x408f400000000000              # double 1000
	.section	.text._ZN7rocprim6detail11reduce_implILb1ENS_14default_configEPdS3_dN6thrust4plusIdEEEE10hipError_tPvRmT1_T2_T3_mT4_P12ihipStream_tb,"axG",@progbits,_ZN7rocprim6detail11reduce_implILb1ENS_14default_configEPdS3_dN6thrust4plusIdEEEE10hipError_tPvRmT1_T2_T3_mT4_P12ihipStream_tb,comdat
	.weak	_ZN7rocprim6detail11reduce_implILb1ENS_14default_configEPdS3_dN6thrust4plusIdEEEE10hipError_tPvRmT1_T2_T3_mT4_P12ihipStream_tb
	.type	_ZN7rocprim6detail11reduce_implILb1ENS_14default_configEPdS3_dN6thrust4plusIdEEEE10hipError_tPvRmT1_T2_T3_mT4_P12ihipStream_tb,@function
_ZN7rocprim6detail11reduce_implILb1ENS_14default_configEPdS3_dN6thrust4plusIdEEEE10hipError_tPvRmT1_T2_T3_mT4_P12ihipStream_tb: # @_ZN7rocprim6detail11reduce_implILb1ENS_14default_configEPdS3_dN6thrust4plusIdEEEE10hipError_tPvRmT1_T2_T3_mT4_P12ihipStream_tb
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$232, %rsp
	.cfi_def_cfa_offset 288
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, %rbx
	movq	%r8, %r14
	movsd	%xmm0, 64(%rsp)                 # 8-byte Spill
	movq	%rcx, %r15
	movq	%rdx, %rbp
	movq	%rsi, %r13
	movq	%rdi, %r12
	leaq	140(%rsp), %rsi
	movq	%r9, %rdi
	callq	_ZN7rocprim6detail16host_target_archEP12ihipStream_tRNS0_11target_archE
	testl	%eax, %eax
	je	.LBB32_1
.LBB32_51:
	addq	$232, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB32_1:
	.cfi_def_cfa_offset 288
	movq	%rbp, 144(%rsp)                 # 8-byte Spill
	movq	%r15, 88(%rsp)                  # 8-byte Spill
	movl	140(%rsp), %edi
	callq	_ZN7rocprim6detail20dispatch_target_archINS0_21wrapped_reduce_configINS_14default_configEdEEEEDaNS0_11target_archE
	movq	%r14, %rsi
	movq	%rdx, %r14
	movq	%rax, %rbp
	shrq	$32, %rbp
	movq	%rax, 80(%rsp)                  # 8-byte Spill
	imull	%eax, %ebp
	leaq	(%rsi,%rbp), %rax
	decq	%rax
	xorl	%ecx, %ecx
	xorl	%edx, %edx
	divq	%rbp
	movq	%rcx, 128(%rsp)
	movq	%rcx, 152(%rsp)
	movq	%rcx, 120(%rsp)
	cmpq	$2, %rax
	movq	%rsi, 96(%rsp)                  # 8-byte Spill
	jb	.LBB32_4
# %bb.2:
	movzbl	288(%rsp), %ecx
	movl	%ecx, (%rsp)
	leaq	120(%rsp), %rsi
	xorl	%edi, %edi
	xorl	%edx, %edx
	movq	88(%rsp), %rcx                  # 8-byte Reload
	movsd	64(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	movq	%rax, %r15
	movq	%rax, %r8
	movq	%rbx, %r9
	callq	_ZN7rocprim6detail11reduce_implILb1ENS_14default_configEPdS3_dN6thrust4plusIdEEEE10hipError_tPvRmT1_T2_T3_mT4_P12ihipStream_tb
	testl	%eax, %eax
	jne	.LBB32_51
# %bb.3:                                # %._crit_edge245
	movq	120(%rsp), %rcx
	movq	96(%rsp), %rsi                  # 8-byte Reload
	movq	%r15, %rax
.LBB32_4:
	movq	%rax, 72(%rsp)                  # 8-byte Spill
	leaq	(,%rax,8), %rax
	xorl	%edx, %edx
	cmpq	%rsi, %rbp
	cmovbq	%rax, %rdx
	leaq	128(%rsp), %rax
	movq	%rax, 184(%rsp)
	movq	%rdx, 192(%rsp)
	movl	$8, %eax
	movq	%rax, 200(%rsp)
	leaq	152(%rsp), %rdx
	movq	%rdx, 208(%rsp)
	movq	%rcx, 216(%rsp)
	movq	%rax, 224(%rsp)
	movupd	184(%rsp), %xmm0
	movups	200(%rsp), %xmm1
	movups	216(%rsp), %xmm2
	movups	%xmm2, 32(%rsp)
	movups	%xmm1, 16(%rsp)
	movupd	%xmm0, (%rsp)
	movq	%r12, %rdi
	movq	%r13, %rsi
	callq	_ZN7rocprim6detail12temp_storage9partitionINS1_16linear_partitionIJNS1_16simple_partitionIdEENS4_IvEEEEEEE10hipError_tPvRmT_
	testq	%r12, %r12
	je	.LBB32_51
# %bb.5:
	testl	%eax, %eax
	jne	.LBB32_51
# %bb.6:
	movl	%r14d, %eax
	xorl	%edx, %edx
	divl	%ebp
                                        # kill: def $eax killed $eax def $rax
	cmpl	$1, %eax
	adcl	$0, %eax
	movq	%rax, 104(%rsp)                 # 8-byte Spill
	cmpb	$0, 288(%rsp)
	je	.LBB32_31
# %bb.7:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.15, %esi
	movl	$11, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	80(%rsp), %r12d                 # 4-byte Reload
	movl	$_ZSt4cout, %edi
	movq	%r12, %rsi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 55(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	movq	96(%rsp), %r14                  # 8-byte Reload
	je	.LBB32_9
# %bb.8:
	leaq	55(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB32_10
.LBB32_31:                              # %.thread228
	cmpq	$1, 72(%rsp)                    # 8-byte Folded Reload
	movq	96(%rsp), %r14                  # 8-byte Reload
	ja	.LBB32_20
# %bb.32:                               # %.thread228..thread229_crit_edge
	movl	80(%rsp), %r12d                 # 4-byte Reload
	xorl	%eax, %eax
	jmp	.LBB32_43
.LBB32_9:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB32_10:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit
	movl	$_ZSt4cout, %edi
	movl	$.L.str.16, %esi
	movl	$17, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	72(%rsp), %rsi                  # 8-byte Reload
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 55(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB32_12
# %bb.11:
	leaq	55(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB32_13
.LBB32_12:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB32_13:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit161
	movl	$_ZSt4cout, %edi
	movl	$.L.str.17, %esi
	movl	$23, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	104(%rsp), %rsi                 # 8-byte Reload
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 55(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB32_15
# %bb.14:
	leaq	55(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB32_16
.LBB32_15:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB32_16:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit164
	movl	$_ZSt4cout, %edi
	movl	$.L.str.18, %esi
	movl	$16, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	%rbp, %rsi
	callq	_ZNSo9_M_insertImEERSoT_
	movb	$10, 55(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB32_18
# %bb.17:
	leaq	55(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB32_19
.LBB32_18:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB32_19:
	cmpq	$1, 72(%rsp)                    # 8-byte Folded Reload
	jbe	.LBB32_42
.LBB32_20:
	movq	%rbx, 112(%rsp)                 # 8-byte Spill
	leaq	-1(%r14), %rcx
	movq	104(%rsp), %r12                 # 8-byte Reload
	imulq	%rbp, %r12
	leaq	(%rcx,%r12), %rax
	xorl	%edx, %edx
	movq	%rdx, 56(%rsp)                  # 8-byte Spill
	xorl	%edx, %edx
	divq	%r12
	movq	%rax, 176(%rsp)                 # 8-byte Spill
	addq	%r12, %rcx
	movb	288(%rsp), %cl
	jb	.LBB32_37
# %bb.21:                               # %.lr.ph
	leaq	-1(%rbp), %rax
	movq	%rax, 168(%rsp)                 # 8-byte Spill
	movl	80(%rsp), %eax                  # 4-byte Reload
	btsq	$32, %rax
	movq	%rax, 80(%rsp)                  # 8-byte Spill
	xorl	%r15d, %r15d
	xorl	%ebx, %ebx
	xorl	%eax, %eax
	movq	%rax, 56(%rsp)                  # 8-byte Spill
.LBB32_22:                              # =>This Inner Loop Header: Depth=1
	subq	%rbx, %r14
	cmpq	%r12, %r14
	cmovaeq	%r12, %r14
	movq	168(%rsp), %rax                 # 8-byte Reload
	addq	%r14, %rax
	xorl	%edx, %edx
	divq	%rbp
	movq	%rax, %r13
	testb	%cl, %cl
	je	.LBB32_24
# %bb.23:                               #   in Loop: Header=BB32_22 Depth=1
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	%rax, 56(%rsp)                  # 8-byte Spill
.LBB32_24:                              #   in Loop: Header=BB32_22 Depth=1
	movl	%r13d, %edi
	movabsq	$4294967296, %rax               # imm = 0x100000000
	orq	%rax, %rdi
	movl	$1, %esi
	movq	80(%rsp), %rdx                  # 8-byte Reload
	movl	$1, %ecx
	xorl	%r8d, %r8d
	movq	112(%rsp), %r9                  # 8-byte Reload
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB32_26
# %bb.25:                               #   in Loop: Header=BB32_22 Depth=1
	movq	144(%rsp), %rax                 # 8-byte Reload
	leaq	(%rax,%rbx,8), %rdi
	movq	%r15, %rdx
	imulq	104(%rsp), %rdx                 # 8-byte Folded Reload
	shlq	$3, %rdx
	addq	128(%rsp), %rdx
	movq	%r14, %rsi
	movsd	64(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	callq	_ZN7rocprim6detail34__device_stub__block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEdEEdPdS5_dN6thrust4plusIdEEEEvT2_mT3_T4_T5_
.LBB32_26:                              #   in Loop: Header=BB32_22 Depth=1
	callq	hipGetLastError
	testl	%eax, %eax
	movb	288(%rsp), %cl
	jne	.LBB32_33
# %bb.27:                               #   in Loop: Header=BB32_22 Depth=1
	testb	%cl, %cl
	je	.LBB32_33
# %bb.28:                               #   in Loop: Header=BB32_22 Depth=1
	movl	$_ZSt4cout, %edi
	movl	$.L.str.19, %esi
	movl	$19, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.20, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	%r14, %rsi
	callq	_ZNSo9_M_insertImEERSoT_
	movl	$.L.str.21, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	112(%rsp), %rdi                 # 8-byte Reload
	callq	hipStreamSynchronize
	testl	%eax, %eax
	jne	.LBB32_51
# %bb.29:                               #   in Loop: Header=BB32_22 Depth=1
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	subq	56(%rsp), %rax                  # 8-byte Folded Reload
	xorps	%xmm0, %xmm0
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI32_0(%rip), %xmm0
	movsd	%xmm0, 160(%rsp)                # 8-byte Spill
	movl	$_ZSt4cout, %edi
	movl	$.L.str.22, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	160(%rsp), %xmm0                # 8-byte Reload
                                        # xmm0 = mem[0],zero
	mulsd	.LCPI32_1(%rip), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r14
	movl	$.L.str.23, %esi
	movl	$3, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movb	$10, 55(%rsp)
	movq	(%r14), %rax
	movq	-24(%rax), %rax
	cmpq	$0, 16(%r14,%rax)
	je	.LBB32_34
# %bb.30:                               #   in Loop: Header=BB32_22 Depth=1
	movl	$1, %edx
	movq	%r14, %rdi
	leaq	55(%rsp), %rsi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB32_35
.LBB32_33:                              #   in Loop: Header=BB32_22 Depth=1
	testl	%eax, %eax
	je	.LBB32_36
	jmp	.LBB32_51
.LBB32_34:                              #   in Loop: Header=BB32_22 Depth=1
	movq	%r14, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB32_35:                              #   in Loop: Header=BB32_22 Depth=1
	movb	288(%rsp), %cl
.LBB32_36:                              #   in Loop: Header=BB32_22 Depth=1
	incq	%r15
	addq	%r12, %rbx
	cmpq	176(%rsp), %r15                 # 8-byte Folded Reload
	movq	96(%rsp), %r14                  # 8-byte Reload
	jb	.LBB32_22
.LBB32_37:                              # %._crit_edge
	testb	%cl, %cl
	je	.LBB32_39
# %bb.38:
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movb	288(%rsp), %cl
	movq	%rax, 56(%rsp)                  # 8-byte Spill
.LBB32_39:
	movq	152(%rsp), %rdi
	movq	128(%rsp), %rdx
	movzbl	%cl, %eax
	movl	%eax, (%rsp)
	leaq	120(%rsp), %rsi
	movl	%ecx, %ebp
	movq	88(%rsp), %rcx                  # 8-byte Reload
	movsd	64(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	movq	72(%rsp), %r8                   # 8-byte Reload
	movq	112(%rsp), %rbx                 # 8-byte Reload
	movq	%rbx, %r9
	callq	_ZN7rocprim6detail11reduce_implILb1ENS_14default_configEPdS3_dN6thrust4plusIdEEEE10hipError_tPvRmT1_T2_T3_mT4_P12ihipStream_tb
	testl	%eax, %eax
	jne	.LBB32_52
# %bb.40:
	testb	%bpl, %bpl
	je	.LBB32_52
# %bb.41:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.24, %esi
	movl	$20, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.20, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	72(%rsp), %rsi                  # 8-byte Reload
	jmp	.LBB32_48
.LBB32_42:
	callq	_ZNSt6chrono3_V212system_clock3nowEv
.LBB32_43:                              # %.thread229
	movq	%rax, 56(%rsp)                  # 8-byte Spill
	movq	88(%rsp), %r15                  # 8-byte Reload
	btsq	$32, %r12
	movabsq	$4294967296, %rdi               # imm = 0x100000000
	orq	$1, %rdi
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	movq	%rbx, %r9
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	movq	144(%rsp), %rdi                 # 8-byte Reload
	jne	.LBB32_45
# %bb.44:
	movq	%r14, %rsi
	movq	%r15, %rdx
	movsd	64(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	callq	_ZN7rocprim6detail34__device_stub__block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEdEEdPdS5_dN6thrust4plusIdEEEEvT2_mT3_T4_T5_
.LBB32_45:
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB32_52
# %bb.46:
	cmpb	$0, 288(%rsp)
	je	.LBB32_52
# %bb.47:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.19, %esi
	movl	$19, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.20, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	%r14, %rsi
.LBB32_48:
	callq	_ZNSo9_M_insertImEERSoT_
	movl	$.L.str.21, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%rbx, %rdi
	callq	hipStreamSynchronize
	testl	%eax, %eax
	jne	.LBB32_51
# %bb.49:                               # %.sink.split
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	subq	56(%rsp), %rax                  # 8-byte Folded Reload
	xorps	%xmm0, %xmm0
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI32_0(%rip), %xmm0
	movsd	%xmm0, 64(%rsp)                 # 8-byte Spill
	movl	$_ZSt4cout, %edi
	movl	$.L.str.22, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	64(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	mulsd	.LCPI32_1(%rip), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbx
	movl	$.L.str.23, %esi
	movl	$3, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c
	jmp	.LBB32_50
.LBB32_52:
	testl	%eax, %eax
	jne	.LBB32_51
.LBB32_50:
	xorl	%eax, %eax
	jmp	.LBB32_51
.Lfunc_end32:
	.size	_ZN7rocprim6detail11reduce_implILb1ENS_14default_configEPdS3_dN6thrust4plusIdEEEE10hipError_tPvRmT1_T2_T3_mT4_P12ihipStream_tb, .Lfunc_end32-_ZN7rocprim6detail11reduce_implILb1ENS_14default_configEPdS3_dN6thrust4plusIdEEEE10hipError_tPvRmT1_T2_T3_mT4_P12ihipStream_tb
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN7rocprim6detail12temp_storage9partitionINS1_16linear_partitionIJNS1_16simple_partitionIdEENS4_IvEEEEEEE10hipError_tPvRmT_,"axG",@progbits,_ZN7rocprim6detail12temp_storage9partitionINS1_16linear_partitionIJNS1_16simple_partitionIdEENS4_IvEEEEEEE10hipError_tPvRmT_,comdat
	.weak	_ZN7rocprim6detail12temp_storage9partitionINS1_16linear_partitionIJNS1_16simple_partitionIdEENS4_IvEEEEEEE10hipError_tPvRmT_ # -- Begin function _ZN7rocprim6detail12temp_storage9partitionINS1_16linear_partitionIJNS1_16simple_partitionIdEENS4_IvEEEEEEE10hipError_tPvRmT_
	.type	_ZN7rocprim6detail12temp_storage9partitionINS1_16linear_partitionIJNS1_16simple_partitionIdEENS4_IvEEEEEEE10hipError_tPvRmT_,@function
_ZN7rocprim6detail12temp_storage9partitionINS1_16linear_partitionIJNS1_16simple_partitionIdEENS4_IvEEEEEEE10hipError_tPvRmT_: # @_ZN7rocprim6detail12temp_storage9partitionINS1_16linear_partitionIJNS1_16simple_partitionIdEENS4_IvEEEEEEE10hipError_tPvRmT_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rsi, %r15
	movq	%rdi, %r14
	leaq	32(%rsp), %rbx
	movq	%rbx, %rdi
	callq	_ZNK7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIdEENS3_IvEEEE10get_layoutEv
	cmpq	$5, %rax
	movl	$4, %edx
	cmovaeq	%rax, %rdx
	testq	%r14, %r14
	je	.LBB33_1
# %bb.2:
	movl	$1, %ecx
	cmpq	%rdx, (%r15)
	jb	.LBB33_7
# %bb.3:
	movq	(%rbx), %rcx
	movq	8(%rbx), %rax
	testq	%rax, %rax
	movq	%r14, %rdx
	cmoveq	%rax, %rdx
	movq	%rdx, (%rcx)
	xorl	%ecx, %ecx
	cmpq	$0, 32(%rbx)
	je	.LBB33_4
# %bb.5:
	movq	40(%rbx), %rsi
	xorl	%edx, %edx
	divq	%rsi
	cmpq	$1, %rdx
	sbbq	$-1, %rax
	imulq	%rsi, %rax
	addq	%rax, %r14
	jmp	.LBB33_6
.LBB33_1:
	movq	%rdx, (%r15)
	xorl	%ecx, %ecx
	jmp	.LBB33_7
.LBB33_4:
	xorl	%r14d, %r14d
.LBB33_6:                               # %_ZN7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIdEENS3_IvEEEE11set_storageEPv.exit
	movq	24(%rbx), %rax
	movq	%r14, (%rax)
.LBB33_7:
	movl	%ecx, %eax
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end33:
	.size	_ZN7rocprim6detail12temp_storage9partitionINS1_16linear_partitionIJNS1_16simple_partitionIdEENS4_IvEEEEEEE10hipError_tPvRmT_, .Lfunc_end33-_ZN7rocprim6detail12temp_storage9partitionINS1_16linear_partitionIJNS1_16simple_partitionIdEENS4_IvEEEEEEE10hipError_tPvRmT_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN7rocprim6detail34__device_stub__block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEdEEdN6thrust11hip_rocprim26transform_input_iterator_tIdNS5_17counting_iteratorIjNS5_11use_defaultES9_S9_EE11estimate_esEEPddNS5_4plusIdEEEEvT2_mT3_T4_T5_,"axG",@progbits,_ZN7rocprim6detail34__device_stub__block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEdEEdN6thrust11hip_rocprim26transform_input_iterator_tIdNS5_17counting_iteratorIjNS5_11use_defaultES9_S9_EE11estimate_esEEPddNS5_4plusIdEEEEvT2_mT3_T4_T5_,comdat
	.weak	_ZN7rocprim6detail34__device_stub__block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEdEEdN6thrust11hip_rocprim26transform_input_iterator_tIdNS5_17counting_iteratorIjNS5_11use_defaultES9_S9_EE11estimate_esEEPddNS5_4plusIdEEEEvT2_mT3_T4_T5_ # -- Begin function _ZN7rocprim6detail34__device_stub__block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEdEEdN6thrust11hip_rocprim26transform_input_iterator_tIdNS5_17counting_iteratorIjNS5_11use_defaultES9_S9_EE11estimate_esEEPddNS5_4plusIdEEEEvT2_mT3_T4_T5_
	.type	_ZN7rocprim6detail34__device_stub__block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEdEEdN6thrust11hip_rocprim26transform_input_iterator_tIdNS5_17counting_iteratorIjNS5_11use_defaultES9_S9_EE11estimate_esEEPddNS5_4plusIdEEEEvT2_mT3_T4_T5_,@function
_ZN7rocprim6detail34__device_stub__block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEdEEdN6thrust11hip_rocprim26transform_input_iterator_tIdNS5_17counting_iteratorIjNS5_11use_defaultES9_S9_EE11estimate_esEEPddNS5_4plusIdEEEEvT2_mT3_T4_T5_: # @_ZN7rocprim6detail34__device_stub__block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEdEEdN6thrust11hip_rocprim26transform_input_iterator_tIdNS5_17counting_iteratorIjNS5_11use_defaultES9_S9_EE11estimate_esEEPddNS5_4plusIdEEEEvT2_mT3_T4_T5_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rsi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rdx, (%rcx)
	leaq	24(%rsp), %rdx
	movsd	%xmm0, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rdi, (%rbx)
	movq	%rax, 8(%rbx)
	movq	%rcx, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	7(%rsp), %rax
	movq	%rax, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_ZN7rocprim6detail19block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEdEEdN6thrust11hip_rocprim26transform_input_iterator_tIdNS5_17counting_iteratorIjNS5_11use_defaultES9_S9_EE11estimate_esEEPddNS5_4plusIdEEEEvT2_mT3_T4_T5_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end34:
	.size	_ZN7rocprim6detail34__device_stub__block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEdEEdN6thrust11hip_rocprim26transform_input_iterator_tIdNS5_17counting_iteratorIjNS5_11use_defaultES9_S9_EE11estimate_esEEPddNS5_4plusIdEEEEvT2_mT3_T4_T5_, .Lfunc_end34-_ZN7rocprim6detail34__device_stub__block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEdEEdN6thrust11hip_rocprim26transform_input_iterator_tIdNS5_17counting_iteratorIjNS5_11use_defaultES9_S9_EE11estimate_esEEPddNS5_4plusIdEEEEvT2_mT3_T4_T5_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN7rocprim6detail34__device_stub__block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEdEEdN6thrust11hip_rocprim26transform_input_iterator_tIdNS5_17counting_iteratorIjNS5_11use_defaultES9_S9_EE11estimate_esEEPddNS5_4plusIdEEEEvT2_mT3_T4_T5_,"axG",@progbits,_ZN7rocprim6detail34__device_stub__block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEdEEdN6thrust11hip_rocprim26transform_input_iterator_tIdNS5_17counting_iteratorIjNS5_11use_defaultES9_S9_EE11estimate_esEEPddNS5_4plusIdEEEEvT2_mT3_T4_T5_,comdat
	.weak	_ZN7rocprim6detail34__device_stub__block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEdEEdN6thrust11hip_rocprim26transform_input_iterator_tIdNS5_17counting_iteratorIjNS5_11use_defaultES9_S9_EE11estimate_esEEPddNS5_4plusIdEEEEvT2_mT3_T4_T5_ # -- Begin function _ZN7rocprim6detail34__device_stub__block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEdEEdN6thrust11hip_rocprim26transform_input_iterator_tIdNS5_17counting_iteratorIjNS5_11use_defaultES9_S9_EE11estimate_esEEPddNS5_4plusIdEEEEvT2_mT3_T4_T5_
	.type	_ZN7rocprim6detail34__device_stub__block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEdEEdN6thrust11hip_rocprim26transform_input_iterator_tIdNS5_17counting_iteratorIjNS5_11use_defaultES9_S9_EE11estimate_esEEPddNS5_4plusIdEEEEvT2_mT3_T4_T5_,@function
_ZN7rocprim6detail34__device_stub__block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEdEEdN6thrust11hip_rocprim26transform_input_iterator_tIdNS5_17counting_iteratorIjNS5_11use_defaultES9_S9_EE11estimate_esEEPddNS5_4plusIdEEEEvT2_mT3_T4_T5_: # @_ZN7rocprim6detail34__device_stub__block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEdEEdN6thrust11hip_rocprim26transform_input_iterator_tIdNS5_17counting_iteratorIjNS5_11use_defaultES9_S9_EE11estimate_esEEPddNS5_4plusIdEEEEvT2_mT3_T4_T5_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rsi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rdx, (%rcx)
	leaq	24(%rsp), %rdx
	movsd	%xmm0, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rdi, (%rbx)
	movq	%rax, 8(%rbx)
	movq	%rcx, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	7(%rsp), %rax
	movq	%rax, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_ZN7rocprim6detail19block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEdEEdN6thrust11hip_rocprim26transform_input_iterator_tIdNS5_17counting_iteratorIjNS5_11use_defaultES9_S9_EE11estimate_esEEPddNS5_4plusIdEEEEvT2_mT3_T4_T5_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end35:
	.size	_ZN7rocprim6detail34__device_stub__block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEdEEdN6thrust11hip_rocprim26transform_input_iterator_tIdNS5_17counting_iteratorIjNS5_11use_defaultES9_S9_EE11estimate_esEEPddNS5_4plusIdEEEEvT2_mT3_T4_T5_, .Lfunc_end35-_ZN7rocprim6detail34__device_stub__block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEdEEdN6thrust11hip_rocprim26transform_input_iterator_tIdNS5_17counting_iteratorIjNS5_11use_defaultES9_S9_EE11estimate_esEEPddNS5_4plusIdEEEEvT2_mT3_T4_T5_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0                          # -- Begin function _ZN7rocprim6detail25get_target_arch_from_nameEPKcm
.LCPI36_0:
	.long	803                             # 0x323
	.long	900                             # 0x384
	.long	906                             # 0x38a
	.long	908                             # 0x38c
.LCPI36_1:
	.long	910                             # 0x38e
	.long	1030                            # 0x406
	.long	1100                            # 0x44c
	.long	1102                            # 0x44e
	.section	.text._ZN7rocprim6detail25get_target_arch_from_nameEPKcm,"axG",@progbits,_ZN7rocprim6detail25get_target_arch_from_nameEPKcm,comdat
	.weak	_ZN7rocprim6detail25get_target_arch_from_nameEPKcm
	.type	_ZN7rocprim6detail25get_target_arch_from_nameEPKcm,@function
_ZN7rocprim6detail25get_target_arch_from_nameEPKcm: # @_ZN7rocprim6detail25get_target_arch_from_nameEPKcm
	.cfi_startproc
# %bb.0:
	movq	$.L.str.25, -104(%rsp)
	movq	$.L.str.26, -96(%rsp)
	movq	$.L.str.27, -88(%rsp)
	movq	$.L.str.28, -80(%rsp)
	movq	$.L.str.29, -72(%rsp)
	movq	$.L.str.30, -64(%rsp)
	movq	$.L.str.31, -56(%rsp)
	movq	$.L.str.32, -48(%rsp)
	movaps	.LCPI36_0(%rip), %xmm0          # xmm0 = [803,900,906,908]
	movaps	%xmm0, -40(%rsp)
	movaps	.LCPI36_1(%rip), %xmm0          # xmm0 = [910,1030,1100,1102]
	movaps	%xmm0, -24(%rsp)
	xorl	%eax, %eax
.LBB36_1:                               # =>This Loop Header: Depth=1
                                        #     Child Loop BB36_4 Depth 2
	movq	-104(%rsp,%rax,8), %rcx
	testq	%rsi, %rsi
	je	.LBB36_2
# %bb.3:                                # %.lr.ph.preheader.i
                                        #   in Loop: Header=BB36_1 Depth=1
	leaq	(%rcx,%rsi), %r8
	xorl	%edx, %edx
.LBB36_4:                               # %.lr.ph.i
                                        #   Parent Loop BB36_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movb	(%rcx,%rdx), %r9b
	testb	%r9b, %r9b
	je	.LBB36_7
# %bb.5:                                # %.lr.ph.i
                                        #   in Loop: Header=BB36_4 Depth=2
	cmpb	(%rdi,%rdx), %r9b
	jne	.LBB36_7
# %bb.6:                                #   in Loop: Header=BB36_4 Depth=2
	incq	%rdx
	cmpq	%rdx, %rsi
	jne	.LBB36_4
	jmp	.LBB36_9
.LBB36_2:                               #   in Loop: Header=BB36_1 Depth=1
	xorl	%edx, %edx
	jmp	.LBB36_8
.LBB36_7:                               # %._crit_edge.i.loopexit
                                        #   in Loop: Header=BB36_1 Depth=1
	addq	%rdx, %rcx
.LBB36_8:                               # %._crit_edge.i
                                        #   in Loop: Header=BB36_1 Depth=1
	movq	%rcx, %r8
	cmpq	%rsi, %rdx
	jne	.LBB36_11
.LBB36_9:                               # %_ZN7rocprim6detail13prefix_equalsEPKcS2_m.exit
                                        #   in Loop: Header=BB36_1 Depth=1
	cmpb	$0, (%r8)
	je	.LBB36_10
.LBB36_11:                              # %_ZN7rocprim6detail13prefix_equalsEPKcS2_m.exit.thread
                                        #   in Loop: Header=BB36_1 Depth=1
	incq	%rax
	cmpq	$8, %rax
	jne	.LBB36_1
# %bb.12:
	movl	$-1, %eax
	retq
.LBB36_10:
	movl	-40(%rsp,%rax,4), %eax
	retq
.Lfunc_end36:
	.size	_ZN7rocprim6detail25get_target_arch_from_nameEPKcm, .Lfunc_end36-_ZN7rocprim6detail25get_target_arch_from_nameEPKcm
	.cfi_endproc
                                        # -- End function
	.section	.text._ZSt9__find_ifIPKcN9__gnu_cxx5__ops10_Iter_predIZN7rocprim6detail14parse_gcn_archES1_EUlRS0_E_EEET_SA_SA_T0_St26random_access_iterator_tag,"axG",@progbits,_ZSt9__find_ifIPKcN9__gnu_cxx5__ops10_Iter_predIZN7rocprim6detail14parse_gcn_archES1_EUlRS0_E_EEET_SA_SA_T0_St26random_access_iterator_tag,comdat
	.weak	_ZSt9__find_ifIPKcN9__gnu_cxx5__ops10_Iter_predIZN7rocprim6detail14parse_gcn_archES1_EUlRS0_E_EEET_SA_SA_T0_St26random_access_iterator_tag # -- Begin function _ZSt9__find_ifIPKcN9__gnu_cxx5__ops10_Iter_predIZN7rocprim6detail14parse_gcn_archES1_EUlRS0_E_EEET_SA_SA_T0_St26random_access_iterator_tag
	.type	_ZSt9__find_ifIPKcN9__gnu_cxx5__ops10_Iter_predIZN7rocprim6detail14parse_gcn_archES1_EUlRS0_E_EEET_SA_SA_T0_St26random_access_iterator_tag,@function
_ZSt9__find_ifIPKcN9__gnu_cxx5__ops10_Iter_predIZN7rocprim6detail14parse_gcn_archES1_EUlRS0_E_EEET_SA_SA_T0_St26random_access_iterator_tag: # @_ZSt9__find_ifIPKcN9__gnu_cxx5__ops10_Iter_predIZN7rocprim6detail14parse_gcn_archES1_EUlRS0_E_EEET_SA_SA_T0_St26random_access_iterator_tag
	.cfi_startproc
# %bb.0:
	movq	%rdi, %rax
	movq	%rsi, %rcx
	subq	%rdi, %rcx
	movq	%rcx, %rdx
	sarq	$2, %rdx
	testq	%rdx, %rdx
	jle	.LBB37_12
# %bb.1:                                # %.lr.ph.preheader
	andq	$-4, %rcx
	addq	%rax, %rcx
	incq	%rdx
	addq	$3, %rax
.LBB37_2:                               # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movzbl	-3(%rax), %edi
	testl	%edi, %edi
	je	.LBB37_26
# %bb.3:                                # %.lr.ph
                                        #   in Loop: Header=BB37_2 Depth=1
	cmpl	$58, %edi
	je	.LBB37_26
# %bb.4:                                #   in Loop: Header=BB37_2 Depth=1
	movzbl	-2(%rax), %edi
	testl	%edi, %edi
	je	.LBB37_24
# %bb.5:                                #   in Loop: Header=BB37_2 Depth=1
	cmpl	$58, %edi
	je	.LBB37_24
# %bb.6:                                #   in Loop: Header=BB37_2 Depth=1
	movzbl	-1(%rax), %edi
	testl	%edi, %edi
	je	.LBB37_25
# %bb.7:                                #   in Loop: Header=BB37_2 Depth=1
	cmpl	$58, %edi
	je	.LBB37_25
# %bb.8:                                #   in Loop: Header=BB37_2 Depth=1
	movzbl	(%rax), %edi
	testl	%edi, %edi
	je	.LBB37_27
# %bb.9:                                #   in Loop: Header=BB37_2 Depth=1
	cmpl	$58, %edi
	je	.LBB37_27
# %bb.10:                               #   in Loop: Header=BB37_2 Depth=1
	decq	%rdx
	addq	$4, %rax
	cmpq	$1, %rdx
	jg	.LBB37_2
# %bb.11:                               # %._crit_edge.loopexit
	movq	%rcx, %rax
.LBB37_12:                              # %._crit_edge
	movq	%rsi, %rcx
	subq	%rax, %rcx
	cmpq	$1, %rcx
	je	.LBB37_21
# %bb.13:                               # %._crit_edge
	cmpq	$2, %rcx
	je	.LBB37_18
# %bb.14:                               # %._crit_edge
	cmpq	$3, %rcx
	jne	.LBB37_23
# %bb.15:
	movzbl	(%rax), %ecx
	testl	%ecx, %ecx
	je	.LBB37_27
# %bb.16:
	cmpl	$58, %ecx
	je	.LBB37_27
# %bb.17:
	incq	%rax
.LBB37_18:
	movzbl	(%rax), %ecx
	testl	%ecx, %ecx
	je	.LBB37_27
# %bb.19:
	cmpl	$58, %ecx
	je	.LBB37_27
# %bb.20:
	incq	%rax
.LBB37_21:
	movzbl	(%rax), %ecx
	testl	%ecx, %ecx
	je	.LBB37_27
# %bb.22:
	cmpl	$58, %ecx
	je	.LBB37_27
.LBB37_23:
	movq	%rsi, %rax
	retq
.LBB37_26:                              # %.loopexit.loopexit
	addq	$-3, %rax
.LBB37_27:                              # %.loopexit
	retq
.LBB37_24:                              # %.loopexit.loopexit.split.loop.exit
	addq	$-2, %rax
	retq
.LBB37_25:                              # %.loopexit.loopexit.split.loop.exit52
	decq	%rax
	retq
.Lfunc_end37:
	.size	_ZSt9__find_ifIPKcN9__gnu_cxx5__ops10_Iter_predIZN7rocprim6detail14parse_gcn_archES1_EUlRS0_E_EEET_SA_SA_T0_St26random_access_iterator_tag, .Lfunc_end37-_ZSt9__find_ifIPKcN9__gnu_cxx5__ops10_Iter_predIZN7rocprim6detail14parse_gcn_archES1_EUlRS0_E_EEET_SA_SA_T0_St26random_access_iterator_tag
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN7rocprim6detail34__device_stub__block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEdEEdPdS5_dN6thrust4plusIdEEEEvT2_mT3_T4_T5_,"axG",@progbits,_ZN7rocprim6detail34__device_stub__block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEdEEdPdS5_dN6thrust4plusIdEEEEvT2_mT3_T4_T5_,comdat
	.weak	_ZN7rocprim6detail34__device_stub__block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEdEEdPdS5_dN6thrust4plusIdEEEEvT2_mT3_T4_T5_ # -- Begin function _ZN7rocprim6detail34__device_stub__block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEdEEdPdS5_dN6thrust4plusIdEEEEvT2_mT3_T4_T5_
	.type	_ZN7rocprim6detail34__device_stub__block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEdEEdPdS5_dN6thrust4plusIdEEEEvT2_mT3_T4_T5_,@function
_ZN7rocprim6detail34__device_stub__block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEdEEdPdS5_dN6thrust4plusIdEEEEvT2_mT3_T4_T5_: # @_ZN7rocprim6detail34__device_stub__block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEdEEdPdS5_dN6thrust4plusIdEEEEvT2_mT3_T4_T5_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movsd	%xmm0, (%rdx)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	15(%rsp), %rax
	movq	%rax, 32(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_ZN7rocprim6detail19block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEdEEdPdS5_dN6thrust4plusIdEEEEvT2_mT3_T4_T5_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end38:
	.size	_ZN7rocprim6detail34__device_stub__block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEdEEdPdS5_dN6thrust4plusIdEEEEvT2_mT3_T4_T5_, .Lfunc_end38-_ZN7rocprim6detail34__device_stub__block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEdEEdPdS5_dN6thrust4plusIdEEEEvT2_mT3_T4_T5_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN7rocprim6detail34__device_stub__block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEdEEdPdS5_dN6thrust4plusIdEEEEvT2_mT3_T4_T5_,"axG",@progbits,_ZN7rocprim6detail34__device_stub__block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEdEEdPdS5_dN6thrust4plusIdEEEEvT2_mT3_T4_T5_,comdat
	.weak	_ZN7rocprim6detail34__device_stub__block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEdEEdPdS5_dN6thrust4plusIdEEEEvT2_mT3_T4_T5_ # -- Begin function _ZN7rocprim6detail34__device_stub__block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEdEEdPdS5_dN6thrust4plusIdEEEEvT2_mT3_T4_T5_
	.type	_ZN7rocprim6detail34__device_stub__block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEdEEdPdS5_dN6thrust4plusIdEEEEvT2_mT3_T4_T5_,@function
_ZN7rocprim6detail34__device_stub__block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEdEEdPdS5_dN6thrust4plusIdEEEEvT2_mT3_T4_T5_: # @_ZN7rocprim6detail34__device_stub__block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEdEEdPdS5_dN6thrust4plusIdEEEEvT2_mT3_T4_T5_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movsd	%xmm0, (%rdx)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	15(%rsp), %rax
	movq	%rax, 32(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_ZN7rocprim6detail19block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEdEEdPdS5_dN6thrust4plusIdEEEEvT2_mT3_T4_T5_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end39:
	.size	_ZN7rocprim6detail34__device_stub__block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEdEEdPdS5_dN6thrust4plusIdEEEEvT2_mT3_T4_T5_, .Lfunc_end39-_ZN7rocprim6detail34__device_stub__block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEdEEdPdS5_dN6thrust4plusIdEEEEvT2_mT3_T4_T5_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNK7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIdEENS3_IvEEEE10get_layoutEv,"axG",@progbits,_ZNK7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIdEENS3_IvEEEE10get_layoutEv,comdat
	.weak	_ZNK7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIdEENS3_IvEEEE10get_layoutEv # -- Begin function _ZNK7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIdEENS3_IvEEEE10get_layoutEv
	.p2align	1, 0x90
	.type	_ZNK7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIdEENS3_IvEEEE10get_layoutEv,@function
_ZNK7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIdEENS3_IvEEEE10get_layoutEv: # @_ZNK7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIdEENS3_IvEEEE10get_layoutEv
	.cfi_startproc
# %bb.0:                                # %_ZZNK7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIdEENS3_IvEEEE10get_layoutEvENKUlRKT_E_clIS4_EEDaS9_.exit.i.i
	movq	8(%rdi), %rax
	movq	16(%rdi), %rsi
	movq	32(%rdi), %r8
	movq	40(%rdi), %rcx
	testq	%r8, %r8
	je	.LBB40_2
# %bb.1:
	xorl	%edx, %edx
	divq	%rcx
	cmpq	$1, %rdx
	sbbq	$-1, %rax
	imulq	%rcx, %rax
	addq	%r8, %rax
.LBB40_2:                               # %_ZN7rocprim6detail17for_each_in_tupleIRKNS_5tupleIJNS0_12temp_storage16simple_partitionIdEENS4_IvEEEEEZNKS3_16linear_partitionIJS5_S6_EE10get_layoutEvEUlRKT_E_EEvOSC_OT0_.exit
	cmpq	%rcx, %rsi
	cmovaq	%rsi, %rcx
	cmpq	$1, %rcx
	adcq	$0, %rcx
	movq	%rcx, %rdx
	retq
.Lfunc_end40:
	.size	_ZNK7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIdEENS3_IvEEEE10get_layoutEv, .Lfunc_end40-_ZNK7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIdEENS3_IvEEEE10get_layoutEv
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN6thrust6detail18contiguous_storageIhNS0_18no_throw_allocatorINS0_19temporary_allocatorIhNS_11hip_rocprim3tagEEEEEED2Ev,"axG",@progbits,_ZN6thrust6detail18contiguous_storageIhNS0_18no_throw_allocatorINS0_19temporary_allocatorIhNS_11hip_rocprim3tagEEEEEED2Ev,comdat
	.weak	_ZN6thrust6detail18contiguous_storageIhNS0_18no_throw_allocatorINS0_19temporary_allocatorIhNS_11hip_rocprim3tagEEEEEED2Ev # -- Begin function _ZN6thrust6detail18contiguous_storageIhNS0_18no_throw_allocatorINS0_19temporary_allocatorIhNS_11hip_rocprim3tagEEEEEED2Ev
	.p2align	1, 0x90
	.type	_ZN6thrust6detail18contiguous_storageIhNS0_18no_throw_allocatorINS0_19temporary_allocatorIhNS_11hip_rocprim3tagEEEEEED2Ev,@function
_ZN6thrust6detail18contiguous_storageIhNS0_18no_throw_allocatorINS0_19temporary_allocatorIhNS_11hip_rocprim3tagEEEEEED2Ev: # @_ZN6thrust6detail18contiguous_storageIhNS0_18no_throw_allocatorINS0_19temporary_allocatorIhNS_11hip_rocprim3tagEEEEEED2Ev
.Lfunc_begin4:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception4
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movq	16(%rdi), %rdx
	testq	%rdx, %rdx
	je	.LBB41_3
# %bb.1:
	movq	%rdi, %rbx
	movq	8(%rdi), %rsi
.Ltmp45:
	callq	_ZN6thrust6detail18no_throw_allocatorINS0_19temporary_allocatorIhNS_11hip_rocprim3tagEEEE10deallocateENS_7pointerIhS4_NS_11use_defaultES8_EEm
.Ltmp46:
# %bb.2:                                # %.noexc
	addq	$8, %rbx
	xorps	%xmm0, %xmm0
	movups	%xmm0, (%rbx)
.LBB41_3:                               # %_ZN6thrust6detail18contiguous_storageIhNS0_18no_throw_allocatorINS0_19temporary_allocatorIhNS_11hip_rocprim3tagEEEEEE10deallocateEv.exit
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.LBB41_4:
	.cfi_def_cfa_offset 16
.Ltmp47:
	movq	%rax, %rdi
	callq	__clang_call_terminate
.Lfunc_end41:
	.size	_ZN6thrust6detail18contiguous_storageIhNS0_18no_throw_allocatorINS0_19temporary_allocatorIhNS_11hip_rocprim3tagEEEEEED2Ev, .Lfunc_end41-_ZN6thrust6detail18contiguous_storageIhNS0_18no_throw_allocatorINS0_19temporary_allocatorIhNS_11hip_rocprim3tagEEEEEED2Ev
	.cfi_endproc
	.section	.gcc_except_table._ZN6thrust6detail18contiguous_storageIhNS0_18no_throw_allocatorINS0_19temporary_allocatorIhNS_11hip_rocprim3tagEEEEEED2Ev,"aG",@progbits,_ZN6thrust6detail18contiguous_storageIhNS0_18no_throw_allocatorINS0_19temporary_allocatorIhNS_11hip_rocprim3tagEEEEEED2Ev,comdat
	.p2align	2, 0x0
GCC_except_table41:
.Lexception4:
	.byte	255                             # @LPStart Encoding = omit
	.byte	3                               # @TType Encoding = udata4
	.uleb128 .Lttbase1-.Lttbaseref1
.Lttbaseref1:
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end4-.Lcst_begin4
.Lcst_begin4:
	.uleb128 .Ltmp45-.Lfunc_begin4          # >> Call Site 1 <<
	.uleb128 .Ltmp46-.Ltmp45                #   Call between .Ltmp45 and .Ltmp46
	.uleb128 .Ltmp47-.Lfunc_begin4          #     jumps to .Ltmp47
	.byte	1                               #   On action: 1
.Lcst_end4:
	.byte	1                               # >> Action Record 1 <<
                                        #   Catch TypeInfo 1
	.byte	0                               #   No further actions
	.p2align	2, 0x0
                                        # >> Catch TypeInfos <<
	.long	0                               # TypeInfo 1
.Lttbase1:
	.p2align	2, 0x0
                                        # -- End function
	.section	.text._ZN6thrust6detail19temporary_allocatorIhNS_11hip_rocprim3tagEE8allocateEm,"axG",@progbits,_ZN6thrust6detail19temporary_allocatorIhNS_11hip_rocprim3tagEE8allocateEm,comdat
	.weak	_ZN6thrust6detail19temporary_allocatorIhNS_11hip_rocprim3tagEE8allocateEm # -- Begin function _ZN6thrust6detail19temporary_allocatorIhNS_11hip_rocprim3tagEE8allocateEm
	.p2align	1, 0x90
	.type	_ZN6thrust6detail19temporary_allocatorIhNS_11hip_rocprim3tagEE8allocateEm,@function
_ZN6thrust6detail19temporary_allocatorIhNS_11hip_rocprim3tagEE8allocateEm: # @_ZN6thrust6detail19temporary_allocatorIhNS_11hip_rocprim3tagEE8allocateEm
.Lfunc_begin5:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception5
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %r14
	movq	%rdi, %rbx
	movq	(%rdi), %rdi
	callq	_ZN6thrust11hip_rocprim6mallocINS0_3tagEEEPvRNS0_16execution_policyIT_EEm
	testq	%r14, %r14
	je	.LBB42_11
# %bb.1:
	testq	%rax, %rax
	je	.LBB42_2
.LBB42_11:
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB42_2:
	.cfi_def_cfa_offset 80
	movq	(%rbx), %rdi
	xorl	%esi, %esi
	callq	_ZN6thrust11hip_rocprim4freeINS0_3tagENS_7pointerIhS2_NS_11use_defaultES4_EEEEvRNS0_16execution_policyIT_EET0_
	movl	$40, %edi
	callq	__cxa_allocate_exception
	movq	%rax, %rbx
	leaq	24(%rsp), %r15
	movq	%r15, -16(%r15)
.Ltmp48:
	leaq	8(%rsp), %rdi
	movl	$.L.str.34, %esi
	movl	$.L.str.34+55, %edx
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag
.Ltmp49:
# %bb.3:                                # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_.exit
	movb	$1, %bpl
.Ltmp51:
	leaq	8(%rsp), %rsi
	movq	%rbx, %rdi
	callq	_ZN6thrust6system6detail9bad_allocC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE
.Ltmp52:
# %bb.4:
	xorl	%ebp, %ebp
.Ltmp53:
	movl	$_ZTIN6thrust6system6detail9bad_allocE, %esi
	movl	$_ZN6thrust6system6detail9bad_allocD2Ev, %edx
	movq	%rbx, %rdi
	callq	__cxa_throw
.Ltmp54:
# %bb.12:
.LBB42_6:
.Ltmp55:
	movq	%rax, %r14
	movq	8(%rsp), %rdi
	cmpq	%r15, %rdi
	je	.LBB42_8
# %bb.7:                                # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit
	callq	_ZdlPv
.LBB42_8:                               # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit
	testb	%bpl, %bpl
	jne	.LBB42_9
	jmp	.LBB42_10
.LBB42_5:                               # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit.thread
.Ltmp50:
	movq	%rax, %r14
.LBB42_9:
	movq	%rbx, %rdi
	callq	__cxa_free_exception
.LBB42_10:
	movq	%r14, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end42:
	.size	_ZN6thrust6detail19temporary_allocatorIhNS_11hip_rocprim3tagEE8allocateEm, .Lfunc_end42-_ZN6thrust6detail19temporary_allocatorIhNS_11hip_rocprim3tagEE8allocateEm
	.cfi_endproc
	.section	.gcc_except_table._ZN6thrust6detail19temporary_allocatorIhNS_11hip_rocprim3tagEE8allocateEm,"aG",@progbits,_ZN6thrust6detail19temporary_allocatorIhNS_11hip_rocprim3tagEE8allocateEm,comdat
	.p2align	2, 0x0
GCC_except_table42:
.Lexception5:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end5-.Lcst_begin5
.Lcst_begin5:
	.uleb128 .Lfunc_begin5-.Lfunc_begin5    # >> Call Site 1 <<
	.uleb128 .Ltmp48-.Lfunc_begin5          #   Call between .Lfunc_begin5 and .Ltmp48
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp48-.Lfunc_begin5          # >> Call Site 2 <<
	.uleb128 .Ltmp49-.Ltmp48                #   Call between .Ltmp48 and .Ltmp49
	.uleb128 .Ltmp50-.Lfunc_begin5          #     jumps to .Ltmp50
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp51-.Lfunc_begin5          # >> Call Site 3 <<
	.uleb128 .Ltmp54-.Ltmp51                #   Call between .Ltmp51 and .Ltmp54
	.uleb128 .Ltmp55-.Lfunc_begin5          #     jumps to .Ltmp55
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp54-.Lfunc_begin5          # >> Call Site 4 <<
	.uleb128 .Lfunc_end42-.Ltmp54           #   Call between .Ltmp54 and .Lfunc_end42
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end5:
	.p2align	2, 0x0
                                        # -- End function
	.section	.text._ZN6thrust6system6detail9bad_allocC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE,"axG",@progbits,_ZN6thrust6system6detail9bad_allocC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE,comdat
	.weak	_ZN6thrust6system6detail9bad_allocC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE # -- Begin function _ZN6thrust6system6detail9bad_allocC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE
	.p2align	1, 0x90
	.type	_ZN6thrust6system6detail9bad_allocC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE,@function
_ZN6thrust6system6detail9bad_allocC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE: # @_ZN6thrust6system6detail9bad_allocC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE
.Lfunc_begin6:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception6
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %r15
	movq	%rdi, %rbx
	movq	$_ZTVN6thrust6system6detail9bad_allocE+16, (%rdi)
	leaq	8(%rdi), %r14
	leaq	24(%rdi), %rbp
	movq	%rbp, 8(%rdi)
	movq	$0, 16(%rdi)
	movb	$0, 24(%rdi)
	callq	_ZNKSt9bad_alloc4whatEv
	movq	%rax, %r12
	movq	16(%rbx), %r13
	movq	%rax, %rdi
	callq	strlen
.Ltmp56:
	movq	%r14, %rdi
	xorl	%esi, %esi
	movq	%r13, %rdx
	movq	%r12, %rcx
	movq	%rax, %r8
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_replaceEmmPKcm
.Ltmp57:
# %bb.1:                                # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEaSEPKc.exit
.Ltmp58:
	movl	$.L.str.13, %esi
	movq	%r14, %rdi
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6appendEPKc
.Ltmp59:
# %bb.2:                                # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEpLEPKc.exit
	movq	(%r15), %rsi
	movq	8(%r15), %rdx
.Ltmp60:
	movq	%r14, %rdi
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6appendEPKcm
.Ltmp61:
# %bb.3:                                # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEpLERKS4_.exit
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB43_4:
	.cfi_def_cfa_offset 64
.Ltmp62:
	movq	%rax, %r15
	movq	(%r14), %rdi
	cmpq	%rbp, %rdi
	je	.LBB43_6
# %bb.5:                                # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i
	callq	_ZdlPv
.LBB43_6:                               # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit
	movq	%rbx, %rdi
	callq	_ZNSt9bad_allocD2Ev
	movq	%r15, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end43:
	.size	_ZN6thrust6system6detail9bad_allocC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE, .Lfunc_end43-_ZN6thrust6system6detail9bad_allocC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE
	.cfi_endproc
	.section	.gcc_except_table._ZN6thrust6system6detail9bad_allocC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE,"aG",@progbits,_ZN6thrust6system6detail9bad_allocC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE,comdat
	.p2align	2, 0x0
GCC_except_table43:
.Lexception6:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end6-.Lcst_begin6
.Lcst_begin6:
	.uleb128 .Ltmp56-.Lfunc_begin6          # >> Call Site 1 <<
	.uleb128 .Ltmp61-.Ltmp56                #   Call between .Ltmp56 and .Ltmp61
	.uleb128 .Ltmp62-.Lfunc_begin6          #     jumps to .Ltmp62
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp61-.Lfunc_begin6          # >> Call Site 2 <<
	.uleb128 .Lfunc_end43-.Ltmp61           #   Call between .Ltmp61 and .Lfunc_end43
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end6:
	.p2align	2, 0x0
                                        # -- End function
	.section	.text._ZN6thrust6system6detail9bad_allocD2Ev,"axG",@progbits,_ZN6thrust6system6detail9bad_allocD2Ev,comdat
	.weak	_ZN6thrust6system6detail9bad_allocD2Ev # -- Begin function _ZN6thrust6system6detail9bad_allocD2Ev
	.p2align	1, 0x90
	.type	_ZN6thrust6system6detail9bad_allocD2Ev,@function
_ZN6thrust6system6detail9bad_allocD2Ev: # @_ZN6thrust6system6detail9bad_allocD2Ev
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movq	%rdi, %rbx
	movq	$_ZTVN6thrust6system6detail9bad_allocE+16, (%rdi)
	movq	8(%rdi), %rdi
	leaq	24(%rbx), %rax
	cmpq	%rax, %rdi
	je	.LBB44_2
# %bb.1:                                # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i
	callq	_ZdlPv
.LBB44_2:                               # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit
	movq	%rbx, %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	_ZNSt9bad_allocD2Ev             # TAILCALL
.Lfunc_end44:
	.size	_ZN6thrust6system6detail9bad_allocD2Ev, .Lfunc_end44-_ZN6thrust6system6detail9bad_allocD2Ev
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN6thrust11hip_rocprim6mallocINS0_3tagEEEPvRNS0_16execution_policyIT_EEm,"axG",@progbits,_ZN6thrust11hip_rocprim6mallocINS0_3tagEEEPvRNS0_16execution_policyIT_EEm,comdat
	.weak	_ZN6thrust11hip_rocprim6mallocINS0_3tagEEEPvRNS0_16execution_policyIT_EEm # -- Begin function _ZN6thrust11hip_rocprim6mallocINS0_3tagEEEPvRNS0_16execution_policyIT_EEm
	.type	_ZN6thrust11hip_rocprim6mallocINS0_3tagEEEPvRNS0_16execution_policyIT_EEm,@function
_ZN6thrust11hip_rocprim6mallocINS0_3tagEEEPvRNS0_16execution_policyIT_EEm: # @_ZN6thrust11hip_rocprim6mallocINS0_3tagEEEPvRNS0_16execution_policyIT_EEm
.Lfunc_begin7:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception7
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$80, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %rbp, -16
	leaq	8(%rsp), %rdi
	movq	$0, (%rdi)
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB45_1
# %bb.16:
	movq	8(%rsp), %rax
	addq	$80, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB45_1:
	.cfi_def_cfa_offset 112
	movl	%eax, %ebp
	callq	hipGetLastError
	movl	$40, %edi
	callq	__cxa_allocate_exception
	movq	%rax, %rbx
.Ltmp63:
	callq	_ZN6thrust6system12hip_categoryEv
.Ltmp64:
# %bb.2:
	movq	(%rax), %rcx
.Ltmp65:
	leaq	16(%rsp), %rdi
	movq	%rax, %rsi
	movl	%ebp, %edx
	callq	*48(%rcx)
.Ltmp66:
# %bb.3:
	movq	16(%rsp), %rsi
.Ltmp68:
	leaq	48(%rsp), %rdi
	leaq	7(%rsp), %rdx
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_
.Ltmp69:
# %bb.4:
	movb	$1, %bpl
.Ltmp71:
	leaq	48(%rsp), %rsi
	movq	%rbx, %rdi
	callq	_ZN6thrust6system6detail9bad_allocC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE
.Ltmp72:
# %bb.5:
	xorl	%ebp, %ebp
.Ltmp73:
	movl	$_ZTIN6thrust6system6detail9bad_allocE, %esi
	movl	$_ZN6thrust6system6detail9bad_allocD2Ev, %edx
	movq	%rbx, %rdi
	callq	__cxa_throw
.Ltmp74:
# %bb.17:
.LBB45_7:
.Ltmp75:
	movq	%rax, %r14
	leaq	64(%rsp), %rax
	movq	-16(%rax), %rdi
	cmpq	%rax, %rdi
	je	.LBB45_9
# %bb.8:                                # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i
	callq	_ZdlPv
.LBB45_9:                               # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit
	leaq	32(%rsp), %rax
	movq	-16(%rax), %rdi
	cmpq	%rax, %rdi
	je	.LBB45_11
# %bb.10:                               # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit14
	callq	_ZdlPv
.LBB45_11:                              # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit14
	testb	%bpl, %bpl
	jne	.LBB45_14
	jmp	.LBB45_15
.LBB45_12:                              # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit.thread
.Ltmp70:
	movq	%rax, %r14
	leaq	32(%rsp), %rax
	movq	-16(%rax), %rdi
	cmpq	%rax, %rdi
	je	.LBB45_14
# %bb.13:                               # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit14.thread25
	callq	_ZdlPv
	jmp	.LBB45_14
.LBB45_6:                               # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit14.thread
.Ltmp67:
	movq	%rax, %r14
.LBB45_14:
	movq	%rbx, %rdi
	callq	__cxa_free_exception
.LBB45_15:
	movq	%r14, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end45:
	.size	_ZN6thrust11hip_rocprim6mallocINS0_3tagEEEPvRNS0_16execution_policyIT_EEm, .Lfunc_end45-_ZN6thrust11hip_rocprim6mallocINS0_3tagEEEPvRNS0_16execution_policyIT_EEm
	.cfi_endproc
	.section	.gcc_except_table._ZN6thrust11hip_rocprim6mallocINS0_3tagEEEPvRNS0_16execution_policyIT_EEm,"aG",@progbits,_ZN6thrust11hip_rocprim6mallocINS0_3tagEEEPvRNS0_16execution_policyIT_EEm,comdat
	.p2align	2, 0x0
GCC_except_table45:
.Lexception7:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end7-.Lcst_begin7
.Lcst_begin7:
	.uleb128 .Lfunc_begin7-.Lfunc_begin7    # >> Call Site 1 <<
	.uleb128 .Ltmp63-.Lfunc_begin7          #   Call between .Lfunc_begin7 and .Ltmp63
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp63-.Lfunc_begin7          # >> Call Site 2 <<
	.uleb128 .Ltmp66-.Ltmp63                #   Call between .Ltmp63 and .Ltmp66
	.uleb128 .Ltmp67-.Lfunc_begin7          #     jumps to .Ltmp67
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp68-.Lfunc_begin7          # >> Call Site 3 <<
	.uleb128 .Ltmp69-.Ltmp68                #   Call between .Ltmp68 and .Ltmp69
	.uleb128 .Ltmp70-.Lfunc_begin7          #     jumps to .Ltmp70
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp71-.Lfunc_begin7          # >> Call Site 4 <<
	.uleb128 .Ltmp74-.Ltmp71                #   Call between .Ltmp71 and .Ltmp74
	.uleb128 .Ltmp75-.Lfunc_begin7          #     jumps to .Ltmp75
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp74-.Lfunc_begin7          # >> Call Site 5 <<
	.uleb128 .Lfunc_end45-.Ltmp74           #   Call between .Ltmp74 and .Lfunc_end45
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end7:
	.p2align	2, 0x0
                                        # -- End function
	.section	.text._ZN6thrust11hip_rocprim4freeINS0_3tagENS_7pointerIhS2_NS_11use_defaultES4_EEEEvRNS0_16execution_policyIT_EET0_,"axG",@progbits,_ZN6thrust11hip_rocprim4freeINS0_3tagENS_7pointerIhS2_NS_11use_defaultES4_EEEEvRNS0_16execution_policyIT_EET0_,comdat
	.weak	_ZN6thrust11hip_rocprim4freeINS0_3tagENS_7pointerIhS2_NS_11use_defaultES4_EEEEvRNS0_16execution_policyIT_EET0_ # -- Begin function _ZN6thrust11hip_rocprim4freeINS0_3tagENS_7pointerIhS2_NS_11use_defaultES4_EEEEvRNS0_16execution_policyIT_EET0_
	.type	_ZN6thrust11hip_rocprim4freeINS0_3tagENS_7pointerIhS2_NS_11use_defaultES4_EEEEvRNS0_16execution_policyIT_EET0_,@function
_ZN6thrust11hip_rocprim4freeINS0_3tagENS_7pointerIhS2_NS_11use_defaultES4_EEEEvRNS0_16execution_policyIT_EET0_: # @_ZN6thrust11hip_rocprim4freeINS0_3tagENS_7pointerIhS2_NS_11use_defaultES4_EEEEvRNS0_16execution_policyIT_EET0_
.Lfunc_begin8:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception8
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %rdi
	callq	hipFree
	movl	%eax, %ebp
	callq	hipGetLastError
	testl	%ebp, %ebp
	jne	.LBB46_1
# %bb.5:                                # %_ZN6thrust11hip_rocprim14throw_on_errorE10hipError_tPKc.exit
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB46_1:
	.cfi_def_cfa_offset 32
	movl	$64, %edi
	callq	__cxa_allocate_exception
	movq	%rax, %rbx
.Ltmp76:
	callq	_ZN6thrust6system12hip_categoryEv
.Ltmp77:
# %bb.2:
.Ltmp78:
	movl	$.L.str.35, %ecx
	movq	%rbx, %rdi
	movl	%ebp, %esi
	movq	%rax, %rdx
	callq	_ZN6thrust6system12system_errorC2EiRKNS0_14error_categoryEPKc
.Ltmp79:
# %bb.3:
	movl	$_ZTIN6thrust6system12system_errorE, %esi
	movl	$_ZN6thrust6system12system_errorD2Ev, %edx
	movq	%rbx, %rdi
	callq	__cxa_throw
.LBB46_4:
.Ltmp80:
	movq	%rax, %r14
	movq	%rbx, %rdi
	callq	__cxa_free_exception
	movq	%r14, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end46:
	.size	_ZN6thrust11hip_rocprim4freeINS0_3tagENS_7pointerIhS2_NS_11use_defaultES4_EEEEvRNS0_16execution_policyIT_EET0_, .Lfunc_end46-_ZN6thrust11hip_rocprim4freeINS0_3tagENS_7pointerIhS2_NS_11use_defaultES4_EEEEvRNS0_16execution_policyIT_EET0_
	.cfi_endproc
	.section	.gcc_except_table._ZN6thrust11hip_rocprim4freeINS0_3tagENS_7pointerIhS2_NS_11use_defaultES4_EEEEvRNS0_16execution_policyIT_EET0_,"aG",@progbits,_ZN6thrust11hip_rocprim4freeINS0_3tagENS_7pointerIhS2_NS_11use_defaultES4_EEEEvRNS0_16execution_policyIT_EET0_,comdat
	.p2align	2, 0x0
GCC_except_table46:
.Lexception8:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end8-.Lcst_begin8
.Lcst_begin8:
	.uleb128 .Lfunc_begin8-.Lfunc_begin8    # >> Call Site 1 <<
	.uleb128 .Ltmp76-.Lfunc_begin8          #   Call between .Lfunc_begin8 and .Ltmp76
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp76-.Lfunc_begin8          # >> Call Site 2 <<
	.uleb128 .Ltmp79-.Ltmp76                #   Call between .Ltmp76 and .Ltmp79
	.uleb128 .Ltmp80-.Lfunc_begin8          #     jumps to .Ltmp80
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp79-.Lfunc_begin8          # >> Call Site 3 <<
	.uleb128 .Lfunc_end46-.Ltmp79           #   Call between .Ltmp79 and .Lfunc_end46
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end8:
	.p2align	2, 0x0
                                        # -- End function
	.section	.text._ZN6thrust6system6detail9bad_allocD0Ev,"axG",@progbits,_ZN6thrust6system6detail9bad_allocD0Ev,comdat
	.weak	_ZN6thrust6system6detail9bad_allocD0Ev # -- Begin function _ZN6thrust6system6detail9bad_allocD0Ev
	.p2align	1, 0x90
	.type	_ZN6thrust6system6detail9bad_allocD0Ev,@function
_ZN6thrust6system6detail9bad_allocD0Ev: # @_ZN6thrust6system6detail9bad_allocD0Ev
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movq	%rdi, %rbx
	movq	$_ZTVN6thrust6system6detail9bad_allocE+16, (%rdi)
	movq	8(%rdi), %rdi
	leaq	24(%rbx), %rax
	cmpq	%rax, %rdi
	je	.LBB47_2
# %bb.1:                                # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i.i
	callq	_ZdlPv
.LBB47_2:                               # %_ZN6thrust6system6detail9bad_allocD2Ev.exit
	movq	%rbx, %rdi
	callq	_ZNSt9bad_allocD2Ev
	movq	%rbx, %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	_ZdlPv                          # TAILCALL
.Lfunc_end47:
	.size	_ZN6thrust6system6detail9bad_allocD0Ev, .Lfunc_end47-_ZN6thrust6system6detail9bad_allocD0Ev
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNK6thrust6system6detail9bad_alloc4whatEv,"axG",@progbits,_ZNK6thrust6system6detail9bad_alloc4whatEv,comdat
	.weak	_ZNK6thrust6system6detail9bad_alloc4whatEv # -- Begin function _ZNK6thrust6system6detail9bad_alloc4whatEv
	.p2align	1, 0x90
	.type	_ZNK6thrust6system6detail9bad_alloc4whatEv,@function
_ZNK6thrust6system6detail9bad_alloc4whatEv: # @_ZNK6thrust6system6detail9bad_alloc4whatEv
	.cfi_startproc
# %bb.0:
	movq	8(%rdi), %rax
	retq
.Lfunc_end48:
	.size	_ZNK6thrust6system6detail9bad_alloc4whatEv, .Lfunc_end48-_ZNK6thrust6system6detail9bad_alloc4whatEv
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN6thrust6detail18no_throw_allocatorINS0_19temporary_allocatorIhNS_11hip_rocprim3tagEEEE10deallocateENS_7pointerIhS4_NS_11use_defaultES8_EEm,"axG",@progbits,_ZN6thrust6detail18no_throw_allocatorINS0_19temporary_allocatorIhNS_11hip_rocprim3tagEEEE10deallocateENS_7pointerIhS4_NS_11use_defaultES8_EEm,comdat
	.weak	_ZN6thrust6detail18no_throw_allocatorINS0_19temporary_allocatorIhNS_11hip_rocprim3tagEEEE10deallocateENS_7pointerIhS4_NS_11use_defaultES8_EEm # -- Begin function _ZN6thrust6detail18no_throw_allocatorINS0_19temporary_allocatorIhNS_11hip_rocprim3tagEEEE10deallocateENS_7pointerIhS4_NS_11use_defaultES8_EEm
	.p2align	1, 0x90
	.type	_ZN6thrust6detail18no_throw_allocatorINS0_19temporary_allocatorIhNS_11hip_rocprim3tagEEEE10deallocateENS_7pointerIhS4_NS_11use_defaultES8_EEm,@function
_ZN6thrust6detail18no_throw_allocatorINS0_19temporary_allocatorIhNS_11hip_rocprim3tagEEEE10deallocateENS_7pointerIhS4_NS_11use_defaultES8_EEm: # @_ZN6thrust6detail18no_throw_allocatorINS0_19temporary_allocatorIhNS_11hip_rocprim3tagEEEE10deallocateENS_7pointerIhS4_NS_11use_defaultES8_EEm
.Lfunc_begin9:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception9
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movq	(%rdi), %rdi
.Ltmp81:
	callq	_ZN6thrust11hip_rocprim4freeINS0_3tagENS_7pointerIhS2_NS_11use_defaultES4_EEEEvRNS0_16execution_policyIT_EET0_
.Ltmp82:
# %bb.1:                                # %_ZN6thrust6detail19temporary_allocatorIhNS_11hip_rocprim3tagEE10deallocateENS_7pointerIhS3_NS_11use_defaultES6_EEm.exit
	popq	%rax
	.cfi_def_cfa_offset 8
	retq
.LBB49_2:
	.cfi_def_cfa_offset 16
.Ltmp83:
	movq	%rax, %rdi
	callq	__cxa_begin_catch
	popq	%rax
	.cfi_def_cfa_offset 8
	jmp	__cxa_end_catch                 # TAILCALL
.Lfunc_end49:
	.size	_ZN6thrust6detail18no_throw_allocatorINS0_19temporary_allocatorIhNS_11hip_rocprim3tagEEEE10deallocateENS_7pointerIhS4_NS_11use_defaultES8_EEm, .Lfunc_end49-_ZN6thrust6detail18no_throw_allocatorINS0_19temporary_allocatorIhNS_11hip_rocprim3tagEEEE10deallocateENS_7pointerIhS4_NS_11use_defaultES8_EEm
	.cfi_endproc
	.section	.gcc_except_table._ZN6thrust6detail18no_throw_allocatorINS0_19temporary_allocatorIhNS_11hip_rocprim3tagEEEE10deallocateENS_7pointerIhS4_NS_11use_defaultES8_EEm,"aG",@progbits,_ZN6thrust6detail18no_throw_allocatorINS0_19temporary_allocatorIhNS_11hip_rocprim3tagEEEE10deallocateENS_7pointerIhS4_NS_11use_defaultES8_EEm,comdat
	.p2align	2, 0x0
GCC_except_table49:
.Lexception9:
	.byte	255                             # @LPStart Encoding = omit
	.byte	3                               # @TType Encoding = udata4
	.uleb128 .Lttbase2-.Lttbaseref2
.Lttbaseref2:
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end9-.Lcst_begin9
.Lcst_begin9:
	.uleb128 .Ltmp81-.Lfunc_begin9          # >> Call Site 1 <<
	.uleb128 .Ltmp82-.Ltmp81                #   Call between .Ltmp81 and .Ltmp82
	.uleb128 .Ltmp83-.Lfunc_begin9          #     jumps to .Ltmp83
	.byte	1                               #   On action: 1
	.uleb128 .Ltmp82-.Lfunc_begin9          # >> Call Site 2 <<
	.uleb128 .Lfunc_end49-.Ltmp82           #   Call between .Ltmp82 and .Lfunc_end49
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end9:
	.byte	1                               # >> Action Record 1 <<
                                        #   Catch TypeInfo 1
	.byte	0                               #   No further actions
	.p2align	2, 0x0
                                        # >> Catch TypeInfos <<
	.long	0                               # TypeInfo 1
.Lttbase2:
	.p2align	2, 0x0
                                        # -- End function
	.section	.text._ZN6thrust11hip_rocprim6__copy19cross_system_copy_nINS0_3tagENS_6system3cpp6detail3tagEPdmS8_EET3_RNS_16execution_policyIT_EERNSA_IT0_EET1_T2_S9_NS_6detail17integral_constantIbLb1EEE,"axG",@progbits,_ZN6thrust11hip_rocprim6__copy19cross_system_copy_nINS0_3tagENS_6system3cpp6detail3tagEPdmS8_EET3_RNS_16execution_policyIT_EERNSA_IT0_EET1_T2_S9_NS_6detail17integral_constantIbLb1EEE,comdat
	.weak	_ZN6thrust11hip_rocprim6__copy19cross_system_copy_nINS0_3tagENS_6system3cpp6detail3tagEPdmS8_EET3_RNS_16execution_policyIT_EERNSA_IT0_EET1_T2_S9_NS_6detail17integral_constantIbLb1EEE # -- Begin function _ZN6thrust11hip_rocprim6__copy19cross_system_copy_nINS0_3tagENS_6system3cpp6detail3tagEPdmS8_EET3_RNS_16execution_policyIT_EERNSA_IT0_EET1_T2_S9_NS_6detail17integral_constantIbLb1EEE
	.type	_ZN6thrust11hip_rocprim6__copy19cross_system_copy_nINS0_3tagENS_6system3cpp6detail3tagEPdmS8_EET3_RNS_16execution_policyIT_EERNSA_IT0_EET1_T2_S9_NS_6detail17integral_constantIbLb1EEE,@function
_ZN6thrust11hip_rocprim6__copy19cross_system_copy_nINS0_3tagENS_6system3cpp6detail3tagEPdmS8_EET3_RNS_16execution_policyIT_EERNSA_IT0_EET1_T2_S9_NS_6detail17integral_constantIbLb1EEE: # @_ZN6thrust11hip_rocprim6__copy19cross_system_copy_nINS0_3tagENS_6system3cpp6detail3tagEPdmS8_EET3_RNS_16execution_policyIT_EERNSA_IT0_EET1_T2_S9_NS_6detail17integral_constantIbLb1EEE
.Lfunc_begin10:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception10
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %rbp, -16
	movq	%r8, %rbx
	movq	%rcx, %r14
	testq	%rcx, %rcx
	je	.LBB50_6
# %bb.1:                                # %_ZN6thrust11hip_rocprim24trivial_copy_from_deviceIdEE10hipError_tPT_PKS3_mP12ihipStream_t.exit.i
	leaq	(,%r14,8), %rax
	movq	%rbx, %rdi
	movq	%rdx, %rsi
	movq	%rax, %rdx
	movl	$2, %ecx
	xorl	%r8d, %r8d
	callq	hipMemcpyWithStream
	movl	%eax, %ebp
	callq	hipGetLastError
	testl	%ebp, %ebp
	jne	.LBB50_2
.LBB50_6:                               # %_ZN6thrust11hip_rocprim6__copy19trivial_device_copyINS0_3tagENS_6system3cpp6detail3tagEdmEEvRNS0_16execution_policyIT_EERNS6_16execution_policyIT0_EEPT1_PKSG_T2_.exit
	leaq	(%rbx,%r14,8), %rax
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB50_2:
	.cfi_def_cfa_offset 32
	movl	$64, %edi
	callq	__cxa_allocate_exception
	movq	%rax, %rbx
.Ltmp84:
	callq	_ZN6thrust6system12hip_categoryEv
.Ltmp85:
# %bb.3:
.Ltmp86:
	movl	$.L.str.36, %ecx
	movq	%rbx, %rdi
	movl	%ebp, %esi
	movq	%rax, %rdx
	callq	_ZN6thrust6system12system_errorC2EiRKNS0_14error_categoryEPKc
.Ltmp87:
# %bb.4:
	movl	$_ZTIN6thrust6system12system_errorE, %esi
	movl	$_ZN6thrust6system12system_errorD2Ev, %edx
	movq	%rbx, %rdi
	callq	__cxa_throw
.LBB50_5:
.Ltmp88:
	movq	%rax, %r14
	movq	%rbx, %rdi
	callq	__cxa_free_exception
	movq	%r14, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end50:
	.size	_ZN6thrust11hip_rocprim6__copy19cross_system_copy_nINS0_3tagENS_6system3cpp6detail3tagEPdmS8_EET3_RNS_16execution_policyIT_EERNSA_IT0_EET1_T2_S9_NS_6detail17integral_constantIbLb1EEE, .Lfunc_end50-_ZN6thrust11hip_rocprim6__copy19cross_system_copy_nINS0_3tagENS_6system3cpp6detail3tagEPdmS8_EET3_RNS_16execution_policyIT_EERNSA_IT0_EET1_T2_S9_NS_6detail17integral_constantIbLb1EEE
	.cfi_endproc
	.section	.gcc_except_table._ZN6thrust11hip_rocprim6__copy19cross_system_copy_nINS0_3tagENS_6system3cpp6detail3tagEPdmS8_EET3_RNS_16execution_policyIT_EERNSA_IT0_EET1_T2_S9_NS_6detail17integral_constantIbLb1EEE,"aG",@progbits,_ZN6thrust11hip_rocprim6__copy19cross_system_copy_nINS0_3tagENS_6system3cpp6detail3tagEPdmS8_EET3_RNS_16execution_policyIT_EERNSA_IT0_EET1_T2_S9_NS_6detail17integral_constantIbLb1EEE,comdat
	.p2align	2, 0x0
GCC_except_table50:
.Lexception10:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end10-.Lcst_begin10
.Lcst_begin10:
	.uleb128 .Lfunc_begin10-.Lfunc_begin10  # >> Call Site 1 <<
	.uleb128 .Ltmp84-.Lfunc_begin10         #   Call between .Lfunc_begin10 and .Ltmp84
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp84-.Lfunc_begin10         # >> Call Site 2 <<
	.uleb128 .Ltmp87-.Ltmp84                #   Call between .Ltmp84 and .Ltmp87
	.uleb128 .Ltmp88-.Lfunc_begin10         #     jumps to .Ltmp88
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp87-.Lfunc_begin10         # >> Call Site 3 <<
	.uleb128 .Lfunc_end50-.Ltmp87           #   Call between .Ltmp87 and .Lfunc_end50
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end10:
	.p2align	2, 0x0
                                        # -- End function
	.text
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB51_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB51_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_ZN7rocprim6detail19block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEdEEdPdS5_dN6thrust4plusIdEEEEvT2_mT3_T4_T5_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_ZN7rocprim6detail19block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEdEEdPdS5_dN6thrust4plusIdEEEEvT2_mT3_T4_T5_, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_ZN7rocprim6detail19block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEdEEdN6thrust11hip_rocprim26transform_input_iterator_tIdNS5_17counting_iteratorIjNS5_11use_defaultES9_S9_EE11estimate_esEEPddNS5_4plusIdEEEEvT2_mT3_T4_T5_, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_ZN7rocprim6detail19block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEdEEdN6thrust11hip_rocprim26transform_input_iterator_tIdNS5_17counting_iteratorIjNS5_11use_defaultES9_S9_EE11estimate_esEEPddNS5_4plusIdEEEEvT2_mT3_T4_T5_, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$0, 8(%rsp)
	movl	$1, (%rsp)
	movl	$g_seed, %esi
	movl	$.L__unnamed_5, %edx
	movl	$.L__unnamed_5, %ecx
	movl	$8, %r9d
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	callq	__hipRegisterVar
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end51:
	.size	__hip_module_ctor, .Lfunc_end51-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB52_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB52_2:
	retq
.Lfunc_end52:
	.size	__hip_module_dtor, .Lfunc_end52-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	g_seed,@object                  # @g_seed
	.local	g_seed
	.comm	g_seed,8,8
	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"code,threads,power_of_4,min,avg,max,time\n"
	.size	.L.str, 42

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"CUDA thrust,"
	.size	.L.str.1, 13

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	","
	.size	.L.str.2, 2

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"\n"
	.size	.L.str.3, 2

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"reduce failed on 1st step"
	.size	.L.str.4, 26

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"reduce failed on 2nd step"
	.size	.L.str.5, 26

	.type	_ZTSN6thrust6system12system_errorE,@object # @_ZTSN6thrust6system12system_errorE
	.section	.rodata._ZTSN6thrust6system12system_errorE,"aG",@progbits,_ZTSN6thrust6system12system_errorE,comdat
	.weak	_ZTSN6thrust6system12system_errorE
_ZTSN6thrust6system12system_errorE:
	.asciz	"N6thrust6system12system_errorE"
	.size	_ZTSN6thrust6system12system_errorE, 31

	.type	_ZTIN6thrust6system12system_errorE,@object # @_ZTIN6thrust6system12system_errorE
	.section	.rodata._ZTIN6thrust6system12system_errorE,"aG",@progbits,_ZTIN6thrust6system12system_errorE,comdat
	.weak	_ZTIN6thrust6system12system_errorE
	.p2align	3, 0x0
_ZTIN6thrust6system12system_errorE:
	.quad	_ZTVN10__cxxabiv120__si_class_type_infoE+16
	.quad	_ZTSN6thrust6system12system_errorE
	.quad	_ZTISt13runtime_error
	.size	_ZTIN6thrust6system12system_errorE, 24

	.type	_ZZN6thrust6system12hip_categoryEvE6result,@object # @_ZZN6thrust6system12hip_categoryEvE6result
	.section	.bss._ZZN6thrust6system12hip_categoryEvE6result,"awG",@nobits,_ZZN6thrust6system12hip_categoryEvE6result,comdat
	.weak	_ZZN6thrust6system12hip_categoryEvE6result
	.p2align	3, 0x0
_ZZN6thrust6system12hip_categoryEvE6result:
	.zero	8
	.size	_ZZN6thrust6system12hip_categoryEvE6result, 8

	.type	_ZGVZN6thrust6system12hip_categoryEvE6result,@object # @_ZGVZN6thrust6system12hip_categoryEvE6result
	.section	.bss._ZGVZN6thrust6system12hip_categoryEvE6result,"awG",@nobits,_ZGVZN6thrust6system12hip_categoryEvE6result,comdat
	.weak	_ZGVZN6thrust6system12hip_categoryEvE6result
	.p2align	3, 0x0
_ZGVZN6thrust6system12hip_categoryEvE6result:
	.quad	0                               # 0x0
	.size	_ZGVZN6thrust6system12hip_categoryEvE6result, 8

	.hidden	__dso_handle
	.type	_ZTVN6thrust6system11hip_rocprim6detail18hip_error_categoryE,@object # @_ZTVN6thrust6system11hip_rocprim6detail18hip_error_categoryE
	.section	.rodata._ZTVN6thrust6system11hip_rocprim6detail18hip_error_categoryE,"aG",@progbits,_ZTVN6thrust6system11hip_rocprim6detail18hip_error_categoryE,comdat
	.weak	_ZTVN6thrust6system11hip_rocprim6detail18hip_error_categoryE
	.p2align	3, 0x0
_ZTVN6thrust6system11hip_rocprim6detail18hip_error_categoryE:
	.quad	0
	.quad	_ZTIN6thrust6system11hip_rocprim6detail18hip_error_categoryE
	.quad	_ZN6thrust6system14error_categoryD2Ev
	.quad	_ZN6thrust6system11hip_rocprim6detail18hip_error_categoryD0Ev
	.quad	_ZNK6thrust6system11hip_rocprim6detail18hip_error_category4nameEv
	.quad	_ZNK6thrust6system11hip_rocprim6detail18hip_error_category23default_error_conditionEi
	.quad	_ZNK6thrust6system14error_category10equivalentEiRKNS0_15error_conditionE
	.quad	_ZNK6thrust6system14error_category10equivalentERKNS0_10error_codeEi
	.quad	_ZNK6thrust6system11hip_rocprim6detail18hip_error_category7messageB5cxx11Ei
	.size	_ZTVN6thrust6system11hip_rocprim6detail18hip_error_categoryE, 72

	.type	_ZTSN6thrust6system11hip_rocprim6detail18hip_error_categoryE,@object # @_ZTSN6thrust6system11hip_rocprim6detail18hip_error_categoryE
	.section	.rodata._ZTSN6thrust6system11hip_rocprim6detail18hip_error_categoryE,"aG",@progbits,_ZTSN6thrust6system11hip_rocprim6detail18hip_error_categoryE,comdat
	.weak	_ZTSN6thrust6system11hip_rocprim6detail18hip_error_categoryE
_ZTSN6thrust6system11hip_rocprim6detail18hip_error_categoryE:
	.asciz	"N6thrust6system11hip_rocprim6detail18hip_error_categoryE"
	.size	_ZTSN6thrust6system11hip_rocprim6detail18hip_error_categoryE, 57

	.type	_ZTSN6thrust6system14error_categoryE,@object # @_ZTSN6thrust6system14error_categoryE
	.section	.rodata._ZTSN6thrust6system14error_categoryE,"aG",@progbits,_ZTSN6thrust6system14error_categoryE,comdat
	.weak	_ZTSN6thrust6system14error_categoryE
_ZTSN6thrust6system14error_categoryE:
	.asciz	"N6thrust6system14error_categoryE"
	.size	_ZTSN6thrust6system14error_categoryE, 33

	.type	_ZTIN6thrust6system14error_categoryE,@object # @_ZTIN6thrust6system14error_categoryE
	.section	.rodata._ZTIN6thrust6system14error_categoryE,"aG",@progbits,_ZTIN6thrust6system14error_categoryE,comdat
	.weak	_ZTIN6thrust6system14error_categoryE
	.p2align	3, 0x0
_ZTIN6thrust6system14error_categoryE:
	.quad	_ZTVN10__cxxabiv117__class_type_infoE+16
	.quad	_ZTSN6thrust6system14error_categoryE
	.size	_ZTIN6thrust6system14error_categoryE, 16

	.type	_ZTIN6thrust6system11hip_rocprim6detail18hip_error_categoryE,@object # @_ZTIN6thrust6system11hip_rocprim6detail18hip_error_categoryE
	.section	.rodata._ZTIN6thrust6system11hip_rocprim6detail18hip_error_categoryE,"aG",@progbits,_ZTIN6thrust6system11hip_rocprim6detail18hip_error_categoryE,comdat
	.weak	_ZTIN6thrust6system11hip_rocprim6detail18hip_error_categoryE
	.p2align	3, 0x0
_ZTIN6thrust6system11hip_rocprim6detail18hip_error_categoryE:
	.quad	_ZTVN10__cxxabiv120__si_class_type_infoE+16
	.quad	_ZTSN6thrust6system11hip_rocprim6detail18hip_error_categoryE
	.quad	_ZTIN6thrust6system14error_categoryE
	.size	_ZTIN6thrust6system11hip_rocprim6detail18hip_error_categoryE, 24

	.type	_ZTVN6thrust6system14error_categoryE,@object # @_ZTVN6thrust6system14error_categoryE
	.section	.rodata._ZTVN6thrust6system14error_categoryE,"aG",@progbits,_ZTVN6thrust6system14error_categoryE,comdat
	.weak	_ZTVN6thrust6system14error_categoryE
	.p2align	3, 0x0
_ZTVN6thrust6system14error_categoryE:
	.quad	0
	.quad	_ZTIN6thrust6system14error_categoryE
	.quad	_ZN6thrust6system14error_categoryD2Ev
	.quad	_ZN6thrust6system14error_categoryD0Ev
	.quad	__cxa_pure_virtual
	.quad	_ZNK6thrust6system14error_category23default_error_conditionEi
	.quad	_ZNK6thrust6system14error_category10equivalentEiRKNS0_15error_conditionE
	.quad	_ZNK6thrust6system14error_category10equivalentERKNS0_10error_codeEi
	.quad	__cxa_pure_virtual
	.size	_ZTVN6thrust6system14error_categoryE, 72

	.type	.L.str.6,@object                # @.str.6
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.6:
	.asciz	"hip"
	.size	.L.str.6, 4

	.type	_ZZN6thrust6system15system_categoryEvE6result,@object # @_ZZN6thrust6system15system_categoryEvE6result
	.section	.bss._ZZN6thrust6system15system_categoryEvE6result,"awG",@nobits,_ZZN6thrust6system15system_categoryEvE6result,comdat
	.weak	_ZZN6thrust6system15system_categoryEvE6result
	.p2align	3, 0x0
_ZZN6thrust6system15system_categoryEvE6result:
	.zero	8
	.size	_ZZN6thrust6system15system_categoryEvE6result, 8

	.type	_ZGVZN6thrust6system15system_categoryEvE6result,@object # @_ZGVZN6thrust6system15system_categoryEvE6result
	.section	.bss._ZGVZN6thrust6system15system_categoryEvE6result,"awG",@nobits,_ZGVZN6thrust6system15system_categoryEvE6result,comdat
	.weak	_ZGVZN6thrust6system15system_categoryEvE6result
	.p2align	3, 0x0
_ZGVZN6thrust6system15system_categoryEvE6result:
	.quad	0                               # 0x0
	.size	_ZGVZN6thrust6system15system_categoryEvE6result, 8

	.type	_ZTVN6thrust6system6detail21system_error_categoryE,@object # @_ZTVN6thrust6system6detail21system_error_categoryE
	.section	.rodata._ZTVN6thrust6system6detail21system_error_categoryE,"aG",@progbits,_ZTVN6thrust6system6detail21system_error_categoryE,comdat
	.weak	_ZTVN6thrust6system6detail21system_error_categoryE
	.p2align	3, 0x0
_ZTVN6thrust6system6detail21system_error_categoryE:
	.quad	0
	.quad	_ZTIN6thrust6system6detail21system_error_categoryE
	.quad	_ZN6thrust6system14error_categoryD2Ev
	.quad	_ZN6thrust6system6detail21system_error_categoryD0Ev
	.quad	_ZNK6thrust6system6detail21system_error_category4nameEv
	.quad	_ZNK6thrust6system6detail21system_error_category23default_error_conditionEi
	.quad	_ZNK6thrust6system14error_category10equivalentEiRKNS0_15error_conditionE
	.quad	_ZNK6thrust6system14error_category10equivalentERKNS0_10error_codeEi
	.quad	_ZNK6thrust6system6detail21system_error_category7messageB5cxx11Ei
	.size	_ZTVN6thrust6system6detail21system_error_categoryE, 72

	.type	_ZTSN6thrust6system6detail21system_error_categoryE,@object # @_ZTSN6thrust6system6detail21system_error_categoryE
	.section	.rodata._ZTSN6thrust6system6detail21system_error_categoryE,"aG",@progbits,_ZTSN6thrust6system6detail21system_error_categoryE,comdat
	.weak	_ZTSN6thrust6system6detail21system_error_categoryE
_ZTSN6thrust6system6detail21system_error_categoryE:
	.asciz	"N6thrust6system6detail21system_error_categoryE"
	.size	_ZTSN6thrust6system6detail21system_error_categoryE, 47

	.type	_ZTIN6thrust6system6detail21system_error_categoryE,@object # @_ZTIN6thrust6system6detail21system_error_categoryE
	.section	.rodata._ZTIN6thrust6system6detail21system_error_categoryE,"aG",@progbits,_ZTIN6thrust6system6detail21system_error_categoryE,comdat
	.weak	_ZTIN6thrust6system6detail21system_error_categoryE
	.p2align	3, 0x0
_ZTIN6thrust6system6detail21system_error_categoryE:
	.quad	_ZTVN10__cxxabiv120__si_class_type_infoE+16
	.quad	_ZTSN6thrust6system6detail21system_error_categoryE
	.quad	_ZTIN6thrust6system14error_categoryE
	.size	_ZTIN6thrust6system6detail21system_error_categoryE, 24

	.type	.L.str.7,@object                # @.str.7
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.7:
	.asciz	"system"
	.size	.L.str.7, 7

	.type	_ZZN6thrust6system16generic_categoryEvE6result,@object # @_ZZN6thrust6system16generic_categoryEvE6result
	.section	.bss._ZZN6thrust6system16generic_categoryEvE6result,"awG",@nobits,_ZZN6thrust6system16generic_categoryEvE6result,comdat
	.weak	_ZZN6thrust6system16generic_categoryEvE6result
	.p2align	3, 0x0
_ZZN6thrust6system16generic_categoryEvE6result:
	.zero	8
	.size	_ZZN6thrust6system16generic_categoryEvE6result, 8

	.type	_ZGVZN6thrust6system16generic_categoryEvE6result,@object # @_ZGVZN6thrust6system16generic_categoryEvE6result
	.section	.bss._ZGVZN6thrust6system16generic_categoryEvE6result,"awG",@nobits,_ZGVZN6thrust6system16generic_categoryEvE6result,comdat
	.weak	_ZGVZN6thrust6system16generic_categoryEvE6result
	.p2align	3, 0x0
_ZGVZN6thrust6system16generic_categoryEvE6result:
	.quad	0                               # 0x0
	.size	_ZGVZN6thrust6system16generic_categoryEvE6result, 8

	.type	_ZTVN6thrust6system6detail22generic_error_categoryE,@object # @_ZTVN6thrust6system6detail22generic_error_categoryE
	.section	.rodata._ZTVN6thrust6system6detail22generic_error_categoryE,"aG",@progbits,_ZTVN6thrust6system6detail22generic_error_categoryE,comdat
	.weak	_ZTVN6thrust6system6detail22generic_error_categoryE
	.p2align	3, 0x0
_ZTVN6thrust6system6detail22generic_error_categoryE:
	.quad	0
	.quad	_ZTIN6thrust6system6detail22generic_error_categoryE
	.quad	_ZN6thrust6system14error_categoryD2Ev
	.quad	_ZN6thrust6system6detail22generic_error_categoryD0Ev
	.quad	_ZNK6thrust6system6detail22generic_error_category4nameEv
	.quad	_ZNK6thrust6system14error_category23default_error_conditionEi
	.quad	_ZNK6thrust6system14error_category10equivalentEiRKNS0_15error_conditionE
	.quad	_ZNK6thrust6system14error_category10equivalentERKNS0_10error_codeEi
	.quad	_ZNK6thrust6system6detail22generic_error_category7messageB5cxx11Ei
	.size	_ZTVN6thrust6system6detail22generic_error_categoryE, 72

	.type	_ZTSN6thrust6system6detail22generic_error_categoryE,@object # @_ZTSN6thrust6system6detail22generic_error_categoryE
	.section	.rodata._ZTSN6thrust6system6detail22generic_error_categoryE,"aG",@progbits,_ZTSN6thrust6system6detail22generic_error_categoryE,comdat
	.weak	_ZTSN6thrust6system6detail22generic_error_categoryE
_ZTSN6thrust6system6detail22generic_error_categoryE:
	.asciz	"N6thrust6system6detail22generic_error_categoryE"
	.size	_ZTSN6thrust6system6detail22generic_error_categoryE, 48

	.type	_ZTIN6thrust6system6detail22generic_error_categoryE,@object # @_ZTIN6thrust6system6detail22generic_error_categoryE
	.section	.rodata._ZTIN6thrust6system6detail22generic_error_categoryE,"aG",@progbits,_ZTIN6thrust6system6detail22generic_error_categoryE,comdat
	.weak	_ZTIN6thrust6system6detail22generic_error_categoryE
	.p2align	3, 0x0
_ZTIN6thrust6system6detail22generic_error_categoryE:
	.quad	_ZTVN10__cxxabiv120__si_class_type_infoE+16
	.quad	_ZTSN6thrust6system6detail22generic_error_categoryE
	.quad	_ZTIN6thrust6system14error_categoryE
	.size	_ZTIN6thrust6system6detail22generic_error_categoryE, 24

	.type	.L.str.8,@object                # @.str.8
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.8:
	.asciz	"generic"
	.size	.L.str.8, 8

	.type	_ZZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11,@object # @_ZZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11
	.section	.bss._ZZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11,"awG",@nobits,_ZZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11,comdat
	.weak	_ZZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11
	.p2align	3, 0x0
_ZZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11:
	.zero	32
	.size	_ZZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11, 32

	.type	_ZGVZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11,@object # @_ZGVZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11
	.section	.bss._ZGVZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11,"awG",@nobits,_ZGVZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11,comdat
	.weak	_ZGVZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11
	.p2align	3, 0x0
_ZGVZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11:
	.quad	0                               # 0x0
	.size	_ZGVZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11, 8

	.type	.L.str.9,@object                # @.str.9
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.9:
	.asciz	"Unknown error"
	.size	.L.str.9, 14

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"basic_string: construction from null is not valid"
	.size	.L.str.10, 50

	.type	.L.str.11,@object               # @.str.11
.L.str.11:
	.asciz	"unknown error"
	.size	.L.str.11, 14

	.type	.L.str.12,@object               # @.str.12
.L.str.12:
	.asciz	"hipErrorUnknown"
	.size	.L.str.12, 16

	.type	.L.str.13,@object               # @.str.13
.L.str.13:
	.asciz	": "
	.size	.L.str.13, 3

	.type	_ZTVN6thrust6system12system_errorE,@object # @_ZTVN6thrust6system12system_errorE
	.section	.rodata._ZTVN6thrust6system12system_errorE,"aG",@progbits,_ZTVN6thrust6system12system_errorE,comdat
	.weak	_ZTVN6thrust6system12system_errorE
	.p2align	3, 0x0
_ZTVN6thrust6system12system_errorE:
	.quad	0
	.quad	_ZTIN6thrust6system12system_errorE
	.quad	_ZN6thrust6system12system_errorD2Ev
	.quad	_ZN6thrust6system12system_errorD0Ev
	.quad	_ZNK6thrust6system12system_error4whatEv
	.size	_ZTVN6thrust6system12system_errorE, 40

	.type	.L.str.15,@object               # @.str.15
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.15:
	.asciz	"block_size "
	.size	.L.str.15, 12

	.type	.L.str.16,@object               # @.str.16
.L.str.16:
	.asciz	"number of blocks "
	.size	.L.str.16, 18

	.type	.L.str.17,@object               # @.str.17
.L.str.17:
	.asciz	"number of blocks limit "
	.size	.L.str.17, 24

	.type	.L.str.18,@object               # @.str.18
.L.str.18:
	.asciz	"items_per_block "
	.size	.L.str.18, 17

	.type	_ZN7rocprim6detail19block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEdEEdN6thrust11hip_rocprim26transform_input_iterator_tIdNS5_17counting_iteratorIjNS5_11use_defaultES9_S9_EE11estimate_esEEPddNS5_4plusIdEEEEvT2_mT3_T4_T5_,@object # @_ZN7rocprim6detail19block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEdEEdN6thrust11hip_rocprim26transform_input_iterator_tIdNS5_17counting_iteratorIjNS5_11use_defaultES9_S9_EE11estimate_esEEPddNS5_4plusIdEEEEvT2_mT3_T4_T5_
	.section	.rodata._ZN7rocprim6detail19block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEdEEdN6thrust11hip_rocprim26transform_input_iterator_tIdNS5_17counting_iteratorIjNS5_11use_defaultES9_S9_EE11estimate_esEEPddNS5_4plusIdEEEEvT2_mT3_T4_T5_,"aG",@progbits,_ZN7rocprim6detail19block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEdEEdN6thrust11hip_rocprim26transform_input_iterator_tIdNS5_17counting_iteratorIjNS5_11use_defaultES9_S9_EE11estimate_esEEPddNS5_4plusIdEEEEvT2_mT3_T4_T5_,comdat
	.weak	_ZN7rocprim6detail19block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEdEEdN6thrust11hip_rocprim26transform_input_iterator_tIdNS5_17counting_iteratorIjNS5_11use_defaultES9_S9_EE11estimate_esEEPddNS5_4plusIdEEEEvT2_mT3_T4_T5_
	.p2align	3, 0x0
_ZN7rocprim6detail19block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEdEEdN6thrust11hip_rocprim26transform_input_iterator_tIdNS5_17counting_iteratorIjNS5_11use_defaultES9_S9_EE11estimate_esEEPddNS5_4plusIdEEEEvT2_mT3_T4_T5_:
	.quad	_ZN7rocprim6detail34__device_stub__block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEdEEdN6thrust11hip_rocprim26transform_input_iterator_tIdNS5_17counting_iteratorIjNS5_11use_defaultES9_S9_EE11estimate_esEEPddNS5_4plusIdEEEEvT2_mT3_T4_T5_
	.size	_ZN7rocprim6detail19block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEdEEdN6thrust11hip_rocprim26transform_input_iterator_tIdNS5_17counting_iteratorIjNS5_11use_defaultES9_S9_EE11estimate_esEEPddNS5_4plusIdEEEEvT2_mT3_T4_T5_, 8

	.type	.L.str.19,@object               # @.str.19
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.19:
	.asciz	"block_reduce_kernel"
	.size	.L.str.19, 20

	.type	.L.str.20,@object               # @.str.20
.L.str.20:
	.asciz	"("
	.size	.L.str.20, 2

	.type	.L.str.21,@object               # @.str.21
.L.str.21:
	.asciz	")"
	.size	.L.str.21, 2

	.type	.L.str.22,@object               # @.str.22
.L.str.22:
	.asciz	" "
	.size	.L.str.22, 2

	.type	.L.str.23,@object               # @.str.23
.L.str.23:
	.asciz	" ms"
	.size	.L.str.23, 4

	.type	.L.str.24,@object               # @.str.24
.L.str.24:
	.asciz	"nested_device_reduce"
	.size	.L.str.24, 21

	.type	_ZN7rocprim6detail19block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEdEEdN6thrust11hip_rocprim26transform_input_iterator_tIdNS5_17counting_iteratorIjNS5_11use_defaultES9_S9_EE11estimate_esEEPddNS5_4plusIdEEEEvT2_mT3_T4_T5_,@object # @_ZN7rocprim6detail19block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEdEEdN6thrust11hip_rocprim26transform_input_iterator_tIdNS5_17counting_iteratorIjNS5_11use_defaultES9_S9_EE11estimate_esEEPddNS5_4plusIdEEEEvT2_mT3_T4_T5_
	.section	.rodata._ZN7rocprim6detail19block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEdEEdN6thrust11hip_rocprim26transform_input_iterator_tIdNS5_17counting_iteratorIjNS5_11use_defaultES9_S9_EE11estimate_esEEPddNS5_4plusIdEEEEvT2_mT3_T4_T5_,"aG",@progbits,_ZN7rocprim6detail19block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEdEEdN6thrust11hip_rocprim26transform_input_iterator_tIdNS5_17counting_iteratorIjNS5_11use_defaultES9_S9_EE11estimate_esEEPddNS5_4plusIdEEEEvT2_mT3_T4_T5_,comdat
	.weak	_ZN7rocprim6detail19block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEdEEdN6thrust11hip_rocprim26transform_input_iterator_tIdNS5_17counting_iteratorIjNS5_11use_defaultES9_S9_EE11estimate_esEEPddNS5_4plusIdEEEEvT2_mT3_T4_T5_
	.p2align	3, 0x0
_ZN7rocprim6detail19block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEdEEdN6thrust11hip_rocprim26transform_input_iterator_tIdNS5_17counting_iteratorIjNS5_11use_defaultES9_S9_EE11estimate_esEEPddNS5_4plusIdEEEEvT2_mT3_T4_T5_:
	.quad	_ZN7rocprim6detail34__device_stub__block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEdEEdN6thrust11hip_rocprim26transform_input_iterator_tIdNS5_17counting_iteratorIjNS5_11use_defaultES9_S9_EE11estimate_esEEPddNS5_4plusIdEEEEvT2_mT3_T4_T5_
	.size	_ZN7rocprim6detail19block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEdEEdN6thrust11hip_rocprim26transform_input_iterator_tIdNS5_17counting_iteratorIjNS5_11use_defaultES9_S9_EE11estimate_esEEPddNS5_4plusIdEEEEvT2_mT3_T4_T5_, 8

	.type	_ZZN7rocprim6detail15get_device_archEiRNS0_11target_archEE10arch_cache,@object # @_ZZN7rocprim6detail15get_device_archEiRNS0_11target_archEE10arch_cache
	.section	.bss._ZZN7rocprim6detail15get_device_archEiRNS0_11target_archEE10arch_cache,"awG",@nobits,_ZZN7rocprim6detail15get_device_archEiRNS0_11target_archEE10arch_cache,comdat
	.weak	_ZZN7rocprim6detail15get_device_archEiRNS0_11target_archEE10arch_cache
	.p2align	4, 0x0
_ZZN7rocprim6detail15get_device_archEiRNS0_11target_archEE10arch_cache:
	.zero	2048
	.size	_ZZN7rocprim6detail15get_device_archEiRNS0_11target_archEE10arch_cache, 2048

	.type	.L.str.25,@object               # @.str.25
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.25:
	.asciz	"gfx803"
	.size	.L.str.25, 7

	.type	.L.str.26,@object               # @.str.26
.L.str.26:
	.asciz	"gfx900"
	.size	.L.str.26, 7

	.type	.L.str.27,@object               # @.str.27
.L.str.27:
	.asciz	"gfx906"
	.size	.L.str.27, 7

	.type	.L.str.28,@object               # @.str.28
.L.str.28:
	.asciz	"gfx908"
	.size	.L.str.28, 7

	.type	.L.str.29,@object               # @.str.29
.L.str.29:
	.asciz	"gfx90a"
	.size	.L.str.29, 7

	.type	.L.str.30,@object               # @.str.30
.L.str.30:
	.asciz	"gfx1030"
	.size	.L.str.30, 8

	.type	.L.str.31,@object               # @.str.31
.L.str.31:
	.asciz	"gfx1100"
	.size	.L.str.31, 8

	.type	.L.str.32,@object               # @.str.32
.L.str.32:
	.asciz	"gfx1102"
	.size	.L.str.32, 8

	.type	_ZN7rocprim6detail19block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEdEEdPdS5_dN6thrust4plusIdEEEEvT2_mT3_T4_T5_,@object # @_ZN7rocprim6detail19block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEdEEdPdS5_dN6thrust4plusIdEEEEvT2_mT3_T4_T5_
	.section	.rodata._ZN7rocprim6detail19block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEdEEdPdS5_dN6thrust4plusIdEEEEvT2_mT3_T4_T5_,"aG",@progbits,_ZN7rocprim6detail19block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEdEEdPdS5_dN6thrust4plusIdEEEEvT2_mT3_T4_T5_,comdat
	.weak	_ZN7rocprim6detail19block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEdEEdPdS5_dN6thrust4plusIdEEEEvT2_mT3_T4_T5_
	.p2align	3, 0x0
_ZN7rocprim6detail19block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEdEEdPdS5_dN6thrust4plusIdEEEEvT2_mT3_T4_T5_:
	.quad	_ZN7rocprim6detail34__device_stub__block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEdEEdPdS5_dN6thrust4plusIdEEEEvT2_mT3_T4_T5_
	.size	_ZN7rocprim6detail19block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEdEEdPdS5_dN6thrust4plusIdEEEEvT2_mT3_T4_T5_, 8

	.type	_ZN7rocprim6detail19block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEdEEdPdS5_dN6thrust4plusIdEEEEvT2_mT3_T4_T5_,@object # @_ZN7rocprim6detail19block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEdEEdPdS5_dN6thrust4plusIdEEEEvT2_mT3_T4_T5_
	.section	.rodata._ZN7rocprim6detail19block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEdEEdPdS5_dN6thrust4plusIdEEEEvT2_mT3_T4_T5_,"aG",@progbits,_ZN7rocprim6detail19block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEdEEdPdS5_dN6thrust4plusIdEEEEvT2_mT3_T4_T5_,comdat
	.weak	_ZN7rocprim6detail19block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEdEEdPdS5_dN6thrust4plusIdEEEEvT2_mT3_T4_T5_
	.p2align	3, 0x0
_ZN7rocprim6detail19block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEdEEdPdS5_dN6thrust4plusIdEEEEvT2_mT3_T4_T5_:
	.quad	_ZN7rocprim6detail34__device_stub__block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEdEEdPdS5_dN6thrust4plusIdEEEEvT2_mT3_T4_T5_
	.size	_ZN7rocprim6detail19block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEdEEdPdS5_dN6thrust4plusIdEEEEvT2_mT3_T4_T5_, 8

	.type	.L.str.34,@object               # @.str.34
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.34:
	.asciz	"temporary_buffer::allocate: get_temporary_buffer failed"
	.size	.L.str.34, 56

	.type	_ZTSN6thrust6system6detail9bad_allocE,@object # @_ZTSN6thrust6system6detail9bad_allocE
	.section	.rodata._ZTSN6thrust6system6detail9bad_allocE,"aG",@progbits,_ZTSN6thrust6system6detail9bad_allocE,comdat
	.weak	_ZTSN6thrust6system6detail9bad_allocE
_ZTSN6thrust6system6detail9bad_allocE:
	.asciz	"N6thrust6system6detail9bad_allocE"
	.size	_ZTSN6thrust6system6detail9bad_allocE, 34

	.type	_ZTIN6thrust6system6detail9bad_allocE,@object # @_ZTIN6thrust6system6detail9bad_allocE
	.section	.rodata._ZTIN6thrust6system6detail9bad_allocE,"aG",@progbits,_ZTIN6thrust6system6detail9bad_allocE,comdat
	.weak	_ZTIN6thrust6system6detail9bad_allocE
	.p2align	3, 0x0
_ZTIN6thrust6system6detail9bad_allocE:
	.quad	_ZTVN10__cxxabiv120__si_class_type_infoE+16
	.quad	_ZTSN6thrust6system6detail9bad_allocE
	.quad	_ZTISt9bad_alloc
	.size	_ZTIN6thrust6system6detail9bad_allocE, 24

	.type	.L.str.35,@object               # @.str.35
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.35:
	.asciz	"device free failed"
	.size	.L.str.35, 19

	.type	_ZTVN6thrust6system6detail9bad_allocE,@object # @_ZTVN6thrust6system6detail9bad_allocE
	.section	.rodata._ZTVN6thrust6system6detail9bad_allocE,"aG",@progbits,_ZTVN6thrust6system6detail9bad_allocE,comdat
	.weak	_ZTVN6thrust6system6detail9bad_allocE
	.p2align	3, 0x0
_ZTVN6thrust6system6detail9bad_allocE:
	.quad	0
	.quad	_ZTIN6thrust6system6detail9bad_allocE
	.quad	_ZN6thrust6system6detail9bad_allocD2Ev
	.quad	_ZN6thrust6system6detail9bad_allocD0Ev
	.quad	_ZNK6thrust6system6detail9bad_alloc4whatEv
	.size	_ZTVN6thrust6system6detail9bad_allocE, 40

	.type	.L.str.36,@object               # @.str.36
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.36:
	.asciz	"trivial_device_copy D->H failed"
	.size	.L.str.36, 32

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_ZN7rocprim6detail19block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEdEEdPdS5_dN6thrust4plusIdEEEEvT2_mT3_T4_T5_"
	.size	.L__unnamed_1, 136

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_ZN7rocprim6detail19block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEdEEdPdS5_dN6thrust4plusIdEEEEvT2_mT3_T4_T5_"
	.size	.L__unnamed_2, 136

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_ZN7rocprim6detail19block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEdEEdN6thrust11hip_rocprim26transform_input_iterator_tIdNS5_17counting_iteratorIjNS5_11use_defaultES9_S9_EE11estimate_esEEPddNS5_4plusIdEEEEvT2_mT3_T4_T5_"
	.size	.L__unnamed_3, 246

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"_ZN7rocprim6detail19block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEdEEdN6thrust11hip_rocprim26transform_input_iterator_tIdNS5_17counting_iteratorIjNS5_11use_defaultES9_S9_EE11estimate_esEEPddNS5_4plusIdEEEEvT2_mT3_T4_T5_"
	.size	.L__unnamed_4, 246

	.type	.L__unnamed_5,@object           # @4
.L__unnamed_5:
	.asciz	"g_seed"
	.size	.L__unnamed_5, 7

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __gxx_personality_v0
	.addrsig_sym _ZN7rocprim6detail34__device_stub__block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEdEEdN6thrust11hip_rocprim26transform_input_iterator_tIdNS5_17counting_iteratorIjNS5_11use_defaultES9_S9_EE11estimate_esEEPddNS5_4plusIdEEEEvT2_mT3_T4_T5_
	.addrsig_sym _ZN7rocprim6detail34__device_stub__block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEdEEdN6thrust11hip_rocprim26transform_input_iterator_tIdNS5_17counting_iteratorIjNS5_11use_defaultES9_S9_EE11estimate_esEEPddNS5_4plusIdEEEEvT2_mT3_T4_T5_
	.addrsig_sym _ZN7rocprim6detail34__device_stub__block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEdEEdPdS5_dN6thrust4plusIdEEEEvT2_mT3_T4_T5_
	.addrsig_sym _ZN7rocprim6detail34__device_stub__block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEdEEdPdS5_dN6thrust4plusIdEEEEvT2_mT3_T4_T5_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Unwind_Resume
	.addrsig_sym g_seed
	.addrsig_sym _ZSt4cout
	.addrsig_sym _ZTVN10__cxxabiv120__si_class_type_infoE
	.addrsig_sym _ZTSN6thrust6system12system_errorE
	.addrsig_sym _ZTISt13runtime_error
	.addrsig_sym _ZTIN6thrust6system12system_errorE
	.addrsig_sym _ZZN6thrust6system12hip_categoryEvE6result
	.addrsig_sym _ZGVZN6thrust6system12hip_categoryEvE6result
	.addrsig_sym __dso_handle
	.addrsig_sym _ZTSN6thrust6system11hip_rocprim6detail18hip_error_categoryE
	.addrsig_sym _ZTVN10__cxxabiv117__class_type_infoE
	.addrsig_sym _ZTSN6thrust6system14error_categoryE
	.addrsig_sym _ZTIN6thrust6system14error_categoryE
	.addrsig_sym _ZTIN6thrust6system11hip_rocprim6detail18hip_error_categoryE
	.addrsig_sym _ZZN6thrust6system15system_categoryEvE6result
	.addrsig_sym _ZGVZN6thrust6system15system_categoryEvE6result
	.addrsig_sym _ZTSN6thrust6system6detail21system_error_categoryE
	.addrsig_sym _ZTIN6thrust6system6detail21system_error_categoryE
	.addrsig_sym _ZZN6thrust6system16generic_categoryEvE6result
	.addrsig_sym _ZGVZN6thrust6system16generic_categoryEvE6result
	.addrsig_sym _ZTSN6thrust6system6detail22generic_error_categoryE
	.addrsig_sym _ZTIN6thrust6system6detail22generic_error_categoryE
	.addrsig_sym _ZZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11
	.addrsig_sym _ZGVZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11
	.addrsig_sym _ZN7rocprim6detail19block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEdEEdN6thrust11hip_rocprim26transform_input_iterator_tIdNS5_17counting_iteratorIjNS5_11use_defaultES9_S9_EE11estimate_esEEPddNS5_4plusIdEEEEvT2_mT3_T4_T5_
	.addrsig_sym _ZN7rocprim6detail19block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEdEEdN6thrust11hip_rocprim26transform_input_iterator_tIdNS5_17counting_iteratorIjNS5_11use_defaultES9_S9_EE11estimate_esEEPddNS5_4plusIdEEEEvT2_mT3_T4_T5_
	.addrsig_sym _ZZN7rocprim6detail15get_device_archEiRNS0_11target_archEE10arch_cache
	.addrsig_sym _ZN7rocprim6detail19block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEdEEdPdS5_dN6thrust4plusIdEEEEvT2_mT3_T4_T5_
	.addrsig_sym _ZN7rocprim6detail19block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEdEEdPdS5_dN6thrust4plusIdEEEEvT2_mT3_T4_T5_
	.addrsig_sym _ZTSN6thrust6system6detail9bad_allocE
	.addrsig_sym _ZTISt9bad_alloc
	.addrsig_sym _ZTIN6thrust6system6detail9bad_allocE
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.section	.text._ZN7rocprim6detail19block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEdEEdPdS5_dN6thrust4plusIdEEEEvT2_mT3_T4_T5_,"axG",@progbits,_ZN7rocprim6detail19block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEdEEdPdS5_dN6thrust4plusIdEEEEvT2_mT3_T4_T5_,comdat
	.protected	_ZN7rocprim6detail19block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEdEEdPdS5_dN6thrust4plusIdEEEEvT2_mT3_T4_T5_ ; -- Begin function _ZN7rocprim6detail19block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEdEEdPdS5_dN6thrust4plusIdEEEEvT2_mT3_T4_T5_
	.globl	_ZN7rocprim6detail19block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEdEEdPdS5_dN6thrust4plusIdEEEEvT2_mT3_T4_T5_
	.p2align	8
	.type	_ZN7rocprim6detail19block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEdEEdPdS5_dN6thrust4plusIdEEEEvT2_mT3_T4_T5_,@function
_ZN7rocprim6detail19block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEdEEdPdS5_dN6thrust4plusIdEEEEvT2_mT3_T4_T5_: ; @_ZN7rocprim6detail19block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEdEEdPdS5_dN6thrust4plusIdEEEEvT2_mT3_T4_T5_
; %bb.0:
	s_mov_b32 s16, s15
	s_load_b256 s[8:15], s[0:1], 0x0
	s_mov_b32 s1, 0
	s_lshl_b32 s0, s16, 11
	v_lshlrev_b32_e32 v1, 3, v0
	s_lshl_b64 s[2:3], s[0:1], 3
	s_mov_b32 s17, s1
	v_mbcnt_lo_u32_b32 v19, -1, 0
	s_waitcnt lgkmcnt(0)
	s_lshr_b64 s[4:5], s[10:11], 11
	s_add_u32 s1, s8, s2
	s_addc_u32 s2, s9, s3
	v_add_co_u32 v17, s1, s1, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v18, null, s2, 0, s1
	s_cmp_lg_u64 s[4:5], s[16:17]
	s_cbranch_scc0 .LBB0_6
; %bb.1:
	s_clause 0x1
	global_load_b64 v[1:2], v[17:18], off
	global_load_b64 v[3:4], v[17:18], off offset:2048
	v_add_co_u32 v5, vcc_lo, v17, 0x2000
	v_add_co_ci_u32_e32 v6, vcc_lo, 0, v18, vcc_lo
	v_add_co_u32 v9, vcc_lo, 0x1000, v17
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v18, vcc_lo
	s_clause 0x2
	global_load_b64 v[7:8], v[5:6], off offset:-4096
	global_load_b64 v[9:10], v[9:10], off offset:2048
	global_load_b64 v[5:6], v[5:6], off
	v_add_co_u32 v11, vcc_lo, 0x2000, v17
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v18, vcc_lo
	v_add_co_u32 v13, vcc_lo, 0x3000, v17
	v_add_co_ci_u32_e32 v14, vcc_lo, 0, v18, vcc_lo
	s_clause 0x2
	global_load_b64 v[11:12], v[11:12], off offset:2048
	global_load_b64 v[15:16], v[13:14], off
	global_load_b64 v[13:14], v[13:14], off offset:2048
	s_mov_b32 s1, exec_lo
	s_waitcnt vmcnt(6)
	v_add_f64 v[1:2], v[1:2], v[3:4]
	s_waitcnt vmcnt(5)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[1:2], v[1:2], v[7:8]
	s_waitcnt vmcnt(4)
	v_add_f64 v[1:2], v[1:2], v[9:10]
	s_waitcnt vmcnt(3)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[1:2], v[1:2], v[5:6]
	s_waitcnt vmcnt(2)
	v_add_f64 v[1:2], v[1:2], v[11:12]
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[1:2], v[1:2], v[15:16]
	s_waitcnt vmcnt(0)
	v_add_f64 v[1:2], v[1:2], v[13:14]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mov_b32_dpp v3, v1 quad_perm:[1,0,3,2] row_mask:0xf bank_mask:0xf
	v_mov_b32_dpp v4, v2 quad_perm:[1,0,3,2] row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[1:2], v[1:2], v[3:4]
	v_mov_b32_dpp v3, v1 quad_perm:[2,3,0,1] row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_dpp v4, v2 quad_perm:[2,3,0,1] row_mask:0xf bank_mask:0xf
	v_add_f64 v[1:2], v[1:2], v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mov_b32_dpp v3, v1 row_shr:4 row_mask:0xf bank_mask:0xf
	v_mov_b32_dpp v4, v2 row_shr:4 row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[1:2], v[1:2], v[3:4]
	v_mov_b32_dpp v3, v1 row_shr:8 row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_dpp v4, v2 row_shr:8 row_mask:0xf bank_mask:0xf
	v_add_f64 v[1:2], v[1:2], v[3:4]
	ds_swizzle_b32 v3, v1 offset:swizzle(BROADCAST,32,15)
	ds_swizzle_b32 v4, v2 offset:swizzle(BROADCAST,32,15)
	s_waitcnt lgkmcnt(0)
	v_add_f64 v[1:2], v[1:2], v[3:4]
	v_mov_b32_e32 v3, 0
	ds_bpermute_b32 v1, v3, v1 offset:124
	ds_bpermute_b32 v2, v3, v2 offset:124
	v_cmpx_eq_u32_e32 0, v19
	s_cbranch_execz .LBB0_3
; %bb.2:
	v_lshrrev_b32_e32 v3, 2, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v3, 56, v3
	s_waitcnt lgkmcnt(0)
	ds_store_b64 v3, v[1:2]
.LBB0_3:
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s1, exec_lo
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmpx_gt_u32_e32 8, v0
	s_cbranch_execz .LBB0_5
; %bb.4:
	v_lshlrev_b32_e32 v1, 3, v19
	ds_load_b64 v[1:2], v1
	s_waitcnt lgkmcnt(0)
	v_mov_b32_dpp v3, v1 quad_perm:[1,0,3,2] row_mask:0xf bank_mask:0xf
	v_mov_b32_dpp v4, v2 quad_perm:[1,0,3,2] row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[1:2], v[1:2], v[3:4]
	v_mov_b32_dpp v3, v1 quad_perm:[2,3,0,1] row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_dpp v4, v2 quad_perm:[2,3,0,1] row_mask:0xf bank_mask:0xf
	v_add_f64 v[1:2], v[1:2], v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mov_b32_dpp v3, v1 row_shr:4 row_mask:0xf bank_mask:0xf
	v_mov_b32_dpp v4, v2 row_shr:4 row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[1:2], v[1:2], v[3:4]
	v_lshlrev_b32_e32 v3, 2, v19
	v_or_b32_e32 v3, 28, v3
	ds_bpermute_b32 v1, v3, v1
	ds_bpermute_b32 v2, v3, v2
.LBB0_5:                                ; %Flow
	s_or_b32 exec_lo, exec_lo, s1
	s_mov_b32 s1, 0
	s_branch .LBB0_7
.LBB0_6:
	s_mov_b32 s1, -1
                                        ; implicit-def: $vgpr1_vgpr2
.LBB0_7:                                ; %Flow18
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccz .LBB0_45
; %bb.8:
	s_sub_i32 s7, s10, s0
	s_mov_b32 s0, exec_lo
                                        ; implicit-def: $vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16
	v_cmpx_gt_u32_e64 s7, v0
	s_cbranch_execz .LBB0_10
; %bb.9:
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[1:2], v[17:18], off
.LBB0_10:
	s_or_b32 exec_lo, exec_lo, s0
	v_or_b32_e32 v20, 0x100, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_u32_e32 vcc_lo, s7, v20
	s_and_saveexec_b32 s0, vcc_lo
	s_cbranch_execz .LBB0_12
; %bb.11:
	global_load_b64 v[3:4], v[17:18], off offset:2048
.LBB0_12:
	s_or_b32 exec_lo, exec_lo, s0
	v_or_b32_e32 v20, 0x200, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s0, s7, v20
	s_and_saveexec_b32 s2, s0
	s_cbranch_execz .LBB0_14
; %bb.13:
	v_add_co_u32 v5, s1, 0x1000, v17
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v6, s1, 0, v18, s1
	global_load_b64 v[5:6], v[5:6], off
.LBB0_14:
	s_or_b32 exec_lo, exec_lo, s2
	v_or_b32_e32 v20, 0x300, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s1, s7, v20
	s_and_saveexec_b32 s3, s1
	s_cbranch_execz .LBB0_16
; %bb.15:
	v_add_co_u32 v7, s2, 0x1000, v17
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v8, s2, 0, v18, s2
	global_load_b64 v[7:8], v[7:8], off offset:2048
.LBB0_16:
	s_or_b32 exec_lo, exec_lo, s3
	v_or_b32_e32 v20, 0x400, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s2, s7, v20
	s_and_saveexec_b32 s4, s2
	s_cbranch_execz .LBB0_18
; %bb.17:
	v_add_co_u32 v9, s3, 0x2000, v17
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v10, s3, 0, v18, s3
	global_load_b64 v[9:10], v[9:10], off
.LBB0_18:
	s_or_b32 exec_lo, exec_lo, s4
	v_or_b32_e32 v20, 0x500, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s3, s7, v20
	s_and_saveexec_b32 s5, s3
	s_cbranch_execz .LBB0_20
; %bb.19:
	v_add_co_u32 v11, s4, 0x2000, v17
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v12, s4, 0, v18, s4
	global_load_b64 v[11:12], v[11:12], off offset:2048
.LBB0_20:
	s_or_b32 exec_lo, exec_lo, s5
	v_or_b32_e32 v20, 0x600, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s4, s7, v20
	s_and_saveexec_b32 s6, s4
	s_cbranch_execz .LBB0_22
; %bb.21:
	v_add_co_u32 v13, s5, 0x3000, v17
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v14, s5, 0, v18, s5
	global_load_b64 v[13:14], v[13:14], off
.LBB0_22:
	s_or_b32 exec_lo, exec_lo, s6
	v_or_b32_e32 v20, 0x700, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s5, s7, v20
	s_and_saveexec_b32 s8, s5
	s_cbranch_execz .LBB0_24
; %bb.23:
	v_add_co_u32 v15, s6, 0x3000, v17
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v16, s6, 0, v18, s6
	global_load_b64 v[15:16], v[15:16], off offset:2048
.LBB0_24:                               ; %_ZN7rocprim25block_load_direct_stripedILj256EPddLj8EEEvjT0_RAT2__T1_j.exit.i
	s_or_b32 exec_lo, exec_lo, s8
	s_waitcnt vmcnt(0)
	v_cndmask_b32_e32 v4, 0x80000000, v4, vcc_lo
	v_cndmask_b32_e32 v3, 0, v3, vcc_lo
	v_cmp_ne_u32_e32 vcc_lo, 31, v19
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2)
	v_add_f64 v[1:2], v[1:2], v[3:4]
	v_cndmask_b32_e64 v4, 0x80000000, v6, s0
	v_cndmask_b32_e64 v3, 0, v5, s0
	v_and_b32_e32 v5, 0xe0, v0
	s_min_u32 s0, s7, 0x100
	v_add_nc_u32_e32 v6, 1, v19
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e64 v5, s0, v5 clamp
	v_add_f64 v[1:2], v[3:4], v[1:2]
	v_cndmask_b32_e64 v4, 0x80000000, v8, s1
	v_cndmask_b32_e64 v3, 0, v7, s1
	s_mov_b32 s1, exec_lo
	v_add_f64 v[1:2], v[3:4], v[1:2]
	v_cndmask_b32_e64 v4, 0x80000000, v10, s2
	v_cndmask_b32_e64 v3, 0, v9, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_f64 v[1:2], v[3:4], v[1:2]
	v_cndmask_b32_e64 v4, 0x80000000, v12, s3
	v_cndmask_b32_e64 v3, 0, v11, s3
	v_add_f64 v[1:2], v[3:4], v[1:2]
	v_cndmask_b32_e64 v4, 0x80000000, v14, s4
	v_cndmask_b32_e64 v3, 0, v13, s4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_f64 v[1:2], v[3:4], v[1:2]
	v_cndmask_b32_e64 v4, 0x80000000, v16, s5
	v_cndmask_b32_e64 v3, 0, v15, s5
	v_add_f64 v[1:2], v[3:4], v[1:2]
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v19, vcc_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_lshlrev_b32_e32 v4, 2, v3
	ds_bpermute_b32 v3, v4, v1
	ds_bpermute_b32 v4, v4, v2
	v_cmpx_lt_u32_e64 v6, v5
	s_cbranch_execz .LBB0_26
; %bb.25:
	s_waitcnt lgkmcnt(0)
	v_add_f64 v[1:2], v[1:2], v[3:4]
.LBB0_26:
	s_or_b32 exec_lo, exec_lo, s1
	v_cmp_gt_u32_e32 vcc_lo, 30, v19
	v_add_nc_u32_e32 v6, 2, v19
	s_mov_b32 s1, exec_lo
	s_waitcnt lgkmcnt(1)
	v_cndmask_b32_e64 v3, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v3, 1, v3
	s_waitcnt lgkmcnt(0)
	v_add_lshl_u32 v4, v3, v19, 2
	ds_bpermute_b32 v3, v4, v1
	ds_bpermute_b32 v4, v4, v2
	v_cmpx_lt_u32_e64 v6, v5
	s_cbranch_execz .LBB0_28
; %bb.27:
	s_waitcnt lgkmcnt(0)
	v_add_f64 v[1:2], v[1:2], v[3:4]
.LBB0_28:
	s_or_b32 exec_lo, exec_lo, s1
	v_cmp_gt_u32_e32 vcc_lo, 28, v19
	v_add_nc_u32_e32 v6, 4, v19
	s_mov_b32 s1, exec_lo
	s_waitcnt lgkmcnt(1)
	v_cndmask_b32_e64 v3, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v3, 2, v3
	s_waitcnt lgkmcnt(0)
	v_add_lshl_u32 v4, v3, v19, 2
	ds_bpermute_b32 v3, v4, v1
	ds_bpermute_b32 v4, v4, v2
	v_cmpx_lt_u32_e64 v6, v5
	s_cbranch_execz .LBB0_30
; %bb.29:
	s_waitcnt lgkmcnt(0)
	v_add_f64 v[1:2], v[1:2], v[3:4]
.LBB0_30:
	s_or_b32 exec_lo, exec_lo, s1
	v_cmp_gt_u32_e32 vcc_lo, 24, v19
	v_add_nc_u32_e32 v6, 8, v19
	s_mov_b32 s1, exec_lo
	s_waitcnt lgkmcnt(1)
	v_cndmask_b32_e64 v3, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v3, 3, v3
	s_waitcnt lgkmcnt(0)
	v_add_lshl_u32 v4, v3, v19, 2
	ds_bpermute_b32 v3, v4, v1
	ds_bpermute_b32 v4, v4, v2
	v_cmpx_lt_u32_e64 v6, v5
	s_cbranch_execz .LBB0_32
; %bb.31:
	s_waitcnt lgkmcnt(0)
	v_add_f64 v[1:2], v[1:2], v[3:4]
.LBB0_32:
	s_or_b32 exec_lo, exec_lo, s1
	v_cmp_gt_u32_e32 vcc_lo, 16, v19
	v_add_nc_u32_e32 v6, 16, v19
	s_mov_b32 s1, exec_lo
	s_waitcnt lgkmcnt(1)
	v_cndmask_b32_e64 v3, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v3, 4, v3
	s_waitcnt lgkmcnt(0)
	v_add_lshl_u32 v4, v3, v19, 2
	ds_bpermute_b32 v3, v4, v1
	ds_bpermute_b32 v4, v4, v2
	v_cmpx_lt_u32_e64 v6, v5
	s_cbranch_execz .LBB0_34
; %bb.33:
	s_waitcnt lgkmcnt(0)
	v_add_f64 v[1:2], v[1:2], v[3:4]
.LBB0_34:                               ; %_ZN7rocprim6detail15warp_reduce_dppIdLj32ELb0EE6reduceIN6thrust4plusIdEEEEvdRdjT_.exit.i.i.i.i.i
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s1, exec_lo
	v_cmpx_eq_u32_e32 0, v19
	s_cbranch_execz .LBB0_36
; %bb.35:
	s_waitcnt lgkmcnt(1)
	v_lshrrev_b32_e32 v3, 2, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v3, 56, v3
	ds_store_b64 v3, v[1:2] offset:64
.LBB0_36:
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s1, exec_lo
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmpx_gt_u32_e32 8, v0
	s_cbranch_execz .LBB0_44
; %bb.37:
	v_lshlrev_b32_e32 v1, 3, v19
	v_and_b32_e32 v5, 7, v19
	s_add_i32 s0, s0, 31
	s_mov_b32 s2, exec_lo
	s_lshr_b32 s0, s0, 5
	ds_load_b64 v[1:2], v1 offset:64
	v_cmp_ne_u32_e32 vcc_lo, 7, v5
	v_add_nc_u32_e32 v6, 1, v5
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v19, vcc_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_lshlrev_b32_e32 v4, 2, v3
	s_waitcnt lgkmcnt(0)
	ds_bpermute_b32 v3, v4, v1
	ds_bpermute_b32 v4, v4, v2
	v_cmpx_gt_u32_e64 s0, v6
	s_cbranch_execz .LBB0_39
; %bb.38:
	s_waitcnt lgkmcnt(0)
	v_add_f64 v[1:2], v[1:2], v[3:4]
.LBB0_39:
	s_or_b32 exec_lo, exec_lo, s2
	v_cmp_gt_u32_e32 vcc_lo, 6, v5
	v_add_nc_u32_e32 v6, 2, v5
	s_mov_b32 s2, exec_lo
	s_waitcnt lgkmcnt(1)
	v_cndmask_b32_e64 v3, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v3, 1, v3
	s_waitcnt lgkmcnt(0)
	v_add_lshl_u32 v4, v3, v19, 2
	ds_bpermute_b32 v3, v4, v1
	ds_bpermute_b32 v4, v4, v2
	v_cmpx_gt_u32_e64 s0, v6
	s_cbranch_execz .LBB0_41
; %bb.40:
	s_waitcnt lgkmcnt(0)
	v_add_f64 v[1:2], v[1:2], v[3:4]
.LBB0_41:
	s_or_b32 exec_lo, exec_lo, s2
	v_cmp_gt_u32_e32 vcc_lo, 4, v5
	v_add_nc_u32_e32 v5, 4, v5
	s_waitcnt lgkmcnt(1)
	v_cndmask_b32_e64 v3, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_u32_e32 vcc_lo, s0, v5
	v_lshlrev_b32_e32 v3, 2, v3
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_add_lshl_u32 v4, v3, v19, 2
	ds_bpermute_b32 v3, v4, v1
	ds_bpermute_b32 v4, v4, v2
	s_and_saveexec_b32 s0, vcc_lo
	s_cbranch_execz .LBB0_43
; %bb.42:
	s_waitcnt lgkmcnt(0)
	v_add_f64 v[1:2], v[1:2], v[3:4]
.LBB0_43:                               ; %Flow16
	s_or_b32 exec_lo, exec_lo, s0
.LBB0_44:                               ; %Flow17
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
.LBB0_45:                               ; %_ZN7rocprim12block_reduceIdLj256ELNS_22block_reduce_algorithmE0ELj1ELj1EE6reduceIN6thrust4plusIdEEEEvdRdjT_.exit.i
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB0_47
; %bb.46:
	s_lshl_b64 s[0:1], s[16:17], 3
	v_mov_b32_e32 v0, 0
	s_add_u32 s0, s12, s0
	s_addc_u32 s1, s13, s1
	s_cmp_eq_u64 s[10:11], 0
	s_cselect_b32 s2, -1, 0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v2, v2, s15, s2
	v_cndmask_b32_e64 v1, v1, s14, s2
	global_store_b64 v0, v[1:2], s[0:1]
.LBB0_47:                               ; %_ZN7rocprim6detail24block_reduce_kernel_implILb0ENS0_21wrapped_reduce_configINS_14default_configEdEEdPdS5_dN6thrust4plusIdEEEEvT2_mT3_T4_T5_.exit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _ZN7rocprim6detail19block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEdEEdPdS5_dN6thrust4plusIdEEEEvT2_mT3_T4_T5_
		.amdhsa_group_segment_fixed_size 128
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 36
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 21
		.amdhsa_next_free_sgpr 18
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._ZN7rocprim6detail19block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEdEEdPdS5_dN6thrust4plusIdEEEEvT2_mT3_T4_T5_,"axG",@progbits,_ZN7rocprim6detail19block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEdEEdPdS5_dN6thrust4plusIdEEEEvT2_mT3_T4_T5_,comdat
.Lfunc_end0:
	.size	_ZN7rocprim6detail19block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEdEEdPdS5_dN6thrust4plusIdEEEEvT2_mT3_T4_T5_, .Lfunc_end0-_ZN7rocprim6detail19block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEdEEdPdS5_dN6thrust4plusIdEEEEvT2_mT3_T4_T5_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 2268
; NumSgprs: 20
; NumVgprs: 21
; ScratchSize: 0
; MemoryBound: 1
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 128 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 20
; NumVGPRsForWavesPerEU: 21
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._ZN7rocprim6detail19block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEdEEdPdS5_dN6thrust4plusIdEEEEvT2_mT3_T4_T5_,"axG",@progbits,_ZN7rocprim6detail19block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEdEEdPdS5_dN6thrust4plusIdEEEEvT2_mT3_T4_T5_,comdat
	.protected	_ZN7rocprim6detail19block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEdEEdPdS5_dN6thrust4plusIdEEEEvT2_mT3_T4_T5_ ; -- Begin function _ZN7rocprim6detail19block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEdEEdPdS5_dN6thrust4plusIdEEEEvT2_mT3_T4_T5_
	.globl	_ZN7rocprim6detail19block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEdEEdPdS5_dN6thrust4plusIdEEEEvT2_mT3_T4_T5_
	.p2align	8
	.type	_ZN7rocprim6detail19block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEdEEdPdS5_dN6thrust4plusIdEEEEvT2_mT3_T4_T5_,@function
_ZN7rocprim6detail19block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEdEEdPdS5_dN6thrust4plusIdEEEEvT2_mT3_T4_T5_: ; @_ZN7rocprim6detail19block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEdEEdPdS5_dN6thrust4plusIdEEEEvT2_mT3_T4_T5_
; %bb.0:
	s_mov_b32 s16, s15
	s_load_b256 s[8:15], s[0:1], 0x0
	s_mov_b32 s1, 0
	s_lshl_b32 s0, s16, 11
	v_lshlrev_b32_e32 v1, 3, v0
	s_lshl_b64 s[2:3], s[0:1], 3
	s_mov_b32 s17, s1
	v_mbcnt_lo_u32_b32 v19, -1, 0
	s_waitcnt lgkmcnt(0)
	s_lshr_b64 s[4:5], s[10:11], 11
	s_add_u32 s1, s8, s2
	s_addc_u32 s2, s9, s3
	v_add_co_u32 v17, s1, s1, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v18, null, s2, 0, s1
	s_cmp_lg_u64 s[4:5], s[16:17]
	s_cbranch_scc0 .LBB1_6
; %bb.1:
	s_clause 0x1
	global_load_b64 v[1:2], v[17:18], off
	global_load_b64 v[3:4], v[17:18], off offset:2048
	v_add_co_u32 v5, vcc_lo, v17, 0x2000
	v_add_co_ci_u32_e32 v6, vcc_lo, 0, v18, vcc_lo
	v_add_co_u32 v9, vcc_lo, 0x1000, v17
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v18, vcc_lo
	s_clause 0x2
	global_load_b64 v[7:8], v[5:6], off offset:-4096
	global_load_b64 v[9:10], v[9:10], off offset:2048
	global_load_b64 v[5:6], v[5:6], off
	v_add_co_u32 v11, vcc_lo, 0x2000, v17
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v18, vcc_lo
	v_add_co_u32 v13, vcc_lo, 0x3000, v17
	v_add_co_ci_u32_e32 v14, vcc_lo, 0, v18, vcc_lo
	s_clause 0x2
	global_load_b64 v[11:12], v[11:12], off offset:2048
	global_load_b64 v[15:16], v[13:14], off
	global_load_b64 v[13:14], v[13:14], off offset:2048
	s_mov_b32 s1, exec_lo
	s_waitcnt vmcnt(6)
	v_add_f64 v[1:2], v[1:2], v[3:4]
	s_waitcnt vmcnt(5)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[1:2], v[1:2], v[7:8]
	s_waitcnt vmcnt(4)
	v_add_f64 v[1:2], v[1:2], v[9:10]
	s_waitcnt vmcnt(3)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[1:2], v[1:2], v[5:6]
	s_waitcnt vmcnt(2)
	v_add_f64 v[1:2], v[1:2], v[11:12]
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[1:2], v[1:2], v[15:16]
	s_waitcnt vmcnt(0)
	v_add_f64 v[1:2], v[1:2], v[13:14]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mov_b32_dpp v3, v1 quad_perm:[1,0,3,2] row_mask:0xf bank_mask:0xf
	v_mov_b32_dpp v4, v2 quad_perm:[1,0,3,2] row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[1:2], v[1:2], v[3:4]
	v_mov_b32_dpp v3, v1 quad_perm:[2,3,0,1] row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_dpp v4, v2 quad_perm:[2,3,0,1] row_mask:0xf bank_mask:0xf
	v_add_f64 v[1:2], v[1:2], v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mov_b32_dpp v3, v1 row_shr:4 row_mask:0xf bank_mask:0xf
	v_mov_b32_dpp v4, v2 row_shr:4 row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[1:2], v[1:2], v[3:4]
	v_mov_b32_dpp v3, v1 row_shr:8 row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_dpp v4, v2 row_shr:8 row_mask:0xf bank_mask:0xf
	v_add_f64 v[1:2], v[1:2], v[3:4]
	ds_swizzle_b32 v3, v1 offset:swizzle(BROADCAST,32,15)
	ds_swizzle_b32 v4, v2 offset:swizzle(BROADCAST,32,15)
	s_waitcnt lgkmcnt(0)
	v_add_f64 v[1:2], v[1:2], v[3:4]
	v_mov_b32_e32 v3, 0
	ds_bpermute_b32 v1, v3, v1 offset:124
	ds_bpermute_b32 v2, v3, v2 offset:124
	v_cmpx_eq_u32_e32 0, v19
	s_cbranch_execz .LBB1_3
; %bb.2:
	v_lshrrev_b32_e32 v3, 2, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v3, 56, v3
	s_waitcnt lgkmcnt(0)
	ds_store_b64 v3, v[1:2]
.LBB1_3:
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s1, exec_lo
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmpx_gt_u32_e32 8, v0
	s_cbranch_execz .LBB1_5
; %bb.4:
	v_lshlrev_b32_e32 v1, 3, v19
	ds_load_b64 v[1:2], v1
	s_waitcnt lgkmcnt(0)
	v_mov_b32_dpp v3, v1 quad_perm:[1,0,3,2] row_mask:0xf bank_mask:0xf
	v_mov_b32_dpp v4, v2 quad_perm:[1,0,3,2] row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[1:2], v[1:2], v[3:4]
	v_mov_b32_dpp v3, v1 quad_perm:[2,3,0,1] row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_dpp v4, v2 quad_perm:[2,3,0,1] row_mask:0xf bank_mask:0xf
	v_add_f64 v[1:2], v[1:2], v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mov_b32_dpp v3, v1 row_shr:4 row_mask:0xf bank_mask:0xf
	v_mov_b32_dpp v4, v2 row_shr:4 row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[1:2], v[1:2], v[3:4]
	v_lshlrev_b32_e32 v3, 2, v19
	v_or_b32_e32 v3, 28, v3
	ds_bpermute_b32 v1, v3, v1
	ds_bpermute_b32 v2, v3, v2
.LBB1_5:                                ; %Flow
	s_or_b32 exec_lo, exec_lo, s1
	s_mov_b32 s1, 0
	s_branch .LBB1_7
.LBB1_6:
	s_mov_b32 s1, -1
                                        ; implicit-def: $vgpr1_vgpr2
.LBB1_7:                                ; %Flow18
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccz .LBB1_45
; %bb.8:
	s_sub_i32 s7, s10, s0
	s_mov_b32 s0, exec_lo
                                        ; implicit-def: $vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16
	v_cmpx_gt_u32_e64 s7, v0
	s_cbranch_execz .LBB1_10
; %bb.9:
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[1:2], v[17:18], off
.LBB1_10:
	s_or_b32 exec_lo, exec_lo, s0
	v_or_b32_e32 v20, 0x100, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_u32_e32 vcc_lo, s7, v20
	s_and_saveexec_b32 s0, vcc_lo
	s_cbranch_execz .LBB1_12
; %bb.11:
	global_load_b64 v[3:4], v[17:18], off offset:2048
.LBB1_12:
	s_or_b32 exec_lo, exec_lo, s0
	v_or_b32_e32 v20, 0x200, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s0, s7, v20
	s_and_saveexec_b32 s2, s0
	s_cbranch_execz .LBB1_14
; %bb.13:
	v_add_co_u32 v5, s1, 0x1000, v17
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v6, s1, 0, v18, s1
	global_load_b64 v[5:6], v[5:6], off
.LBB1_14:
	s_or_b32 exec_lo, exec_lo, s2
	v_or_b32_e32 v20, 0x300, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s1, s7, v20
	s_and_saveexec_b32 s3, s1
	s_cbranch_execz .LBB1_16
; %bb.15:
	v_add_co_u32 v7, s2, 0x1000, v17
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v8, s2, 0, v18, s2
	global_load_b64 v[7:8], v[7:8], off offset:2048
.LBB1_16:
	s_or_b32 exec_lo, exec_lo, s3
	v_or_b32_e32 v20, 0x400, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s2, s7, v20
	s_and_saveexec_b32 s4, s2
	s_cbranch_execz .LBB1_18
; %bb.17:
	v_add_co_u32 v9, s3, 0x2000, v17
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v10, s3, 0, v18, s3
	global_load_b64 v[9:10], v[9:10], off
.LBB1_18:
	s_or_b32 exec_lo, exec_lo, s4
	v_or_b32_e32 v20, 0x500, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s3, s7, v20
	s_and_saveexec_b32 s5, s3
	s_cbranch_execz .LBB1_20
; %bb.19:
	v_add_co_u32 v11, s4, 0x2000, v17
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v12, s4, 0, v18, s4
	global_load_b64 v[11:12], v[11:12], off offset:2048
.LBB1_20:
	s_or_b32 exec_lo, exec_lo, s5
	v_or_b32_e32 v20, 0x600, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s4, s7, v20
	s_and_saveexec_b32 s6, s4
	s_cbranch_execz .LBB1_22
; %bb.21:
	v_add_co_u32 v13, s5, 0x3000, v17
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v14, s5, 0, v18, s5
	global_load_b64 v[13:14], v[13:14], off
.LBB1_22:
	s_or_b32 exec_lo, exec_lo, s6
	v_or_b32_e32 v20, 0x700, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s5, s7, v20
	s_and_saveexec_b32 s8, s5
	s_cbranch_execz .LBB1_24
; %bb.23:
	v_add_co_u32 v15, s6, 0x3000, v17
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v16, s6, 0, v18, s6
	global_load_b64 v[15:16], v[15:16], off offset:2048
.LBB1_24:                               ; %_ZN7rocprim25block_load_direct_stripedILj256EPddLj8EEEvjT0_RAT2__T1_j.exit.i
	s_or_b32 exec_lo, exec_lo, s8
	s_waitcnt vmcnt(0)
	v_cndmask_b32_e32 v4, 0x80000000, v4, vcc_lo
	v_cndmask_b32_e32 v3, 0, v3, vcc_lo
	v_cmp_ne_u32_e32 vcc_lo, 31, v19
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2)
	v_add_f64 v[1:2], v[1:2], v[3:4]
	v_cndmask_b32_e64 v4, 0x80000000, v6, s0
	v_cndmask_b32_e64 v3, 0, v5, s0
	v_and_b32_e32 v5, 0xe0, v0
	s_min_u32 s0, s7, 0x100
	v_add_nc_u32_e32 v6, 1, v19
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e64 v5, s0, v5 clamp
	v_add_f64 v[1:2], v[3:4], v[1:2]
	v_cndmask_b32_e64 v4, 0x80000000, v8, s1
	v_cndmask_b32_e64 v3, 0, v7, s1
	s_mov_b32 s1, exec_lo
	v_add_f64 v[1:2], v[3:4], v[1:2]
	v_cndmask_b32_e64 v4, 0x80000000, v10, s2
	v_cndmask_b32_e64 v3, 0, v9, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_f64 v[1:2], v[3:4], v[1:2]
	v_cndmask_b32_e64 v4, 0x80000000, v12, s3
	v_cndmask_b32_e64 v3, 0, v11, s3
	v_add_f64 v[1:2], v[3:4], v[1:2]
	v_cndmask_b32_e64 v4, 0x80000000, v14, s4
	v_cndmask_b32_e64 v3, 0, v13, s4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_f64 v[1:2], v[3:4], v[1:2]
	v_cndmask_b32_e64 v4, 0x80000000, v16, s5
	v_cndmask_b32_e64 v3, 0, v15, s5
	v_add_f64 v[1:2], v[3:4], v[1:2]
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v19, vcc_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_lshlrev_b32_e32 v4, 2, v3
	ds_bpermute_b32 v3, v4, v1
	ds_bpermute_b32 v4, v4, v2
	v_cmpx_lt_u32_e64 v6, v5
	s_cbranch_execz .LBB1_26
; %bb.25:
	s_waitcnt lgkmcnt(0)
	v_add_f64 v[1:2], v[1:2], v[3:4]
.LBB1_26:
	s_or_b32 exec_lo, exec_lo, s1
	v_cmp_gt_u32_e32 vcc_lo, 30, v19
	v_add_nc_u32_e32 v6, 2, v19
	s_mov_b32 s1, exec_lo
	s_waitcnt lgkmcnt(1)
	v_cndmask_b32_e64 v3, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v3, 1, v3
	s_waitcnt lgkmcnt(0)
	v_add_lshl_u32 v4, v3, v19, 2
	ds_bpermute_b32 v3, v4, v1
	ds_bpermute_b32 v4, v4, v2
	v_cmpx_lt_u32_e64 v6, v5
	s_cbranch_execz .LBB1_28
; %bb.27:
	s_waitcnt lgkmcnt(0)
	v_add_f64 v[1:2], v[1:2], v[3:4]
.LBB1_28:
	s_or_b32 exec_lo, exec_lo, s1
	v_cmp_gt_u32_e32 vcc_lo, 28, v19
	v_add_nc_u32_e32 v6, 4, v19
	s_mov_b32 s1, exec_lo
	s_waitcnt lgkmcnt(1)
	v_cndmask_b32_e64 v3, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v3, 2, v3
	s_waitcnt lgkmcnt(0)
	v_add_lshl_u32 v4, v3, v19, 2
	ds_bpermute_b32 v3, v4, v1
	ds_bpermute_b32 v4, v4, v2
	v_cmpx_lt_u32_e64 v6, v5
	s_cbranch_execz .LBB1_30
; %bb.29:
	s_waitcnt lgkmcnt(0)
	v_add_f64 v[1:2], v[1:2], v[3:4]
.LBB1_30:
	s_or_b32 exec_lo, exec_lo, s1
	v_cmp_gt_u32_e32 vcc_lo, 24, v19
	v_add_nc_u32_e32 v6, 8, v19
	s_mov_b32 s1, exec_lo
	s_waitcnt lgkmcnt(1)
	v_cndmask_b32_e64 v3, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v3, 3, v3
	s_waitcnt lgkmcnt(0)
	v_add_lshl_u32 v4, v3, v19, 2
	ds_bpermute_b32 v3, v4, v1
	ds_bpermute_b32 v4, v4, v2
	v_cmpx_lt_u32_e64 v6, v5
	s_cbranch_execz .LBB1_32
; %bb.31:
	s_waitcnt lgkmcnt(0)
	v_add_f64 v[1:2], v[1:2], v[3:4]
.LBB1_32:
	s_or_b32 exec_lo, exec_lo, s1
	v_cmp_gt_u32_e32 vcc_lo, 16, v19
	v_add_nc_u32_e32 v6, 16, v19
	s_mov_b32 s1, exec_lo
	s_waitcnt lgkmcnt(1)
	v_cndmask_b32_e64 v3, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v3, 4, v3
	s_waitcnt lgkmcnt(0)
	v_add_lshl_u32 v4, v3, v19, 2
	ds_bpermute_b32 v3, v4, v1
	ds_bpermute_b32 v4, v4, v2
	v_cmpx_lt_u32_e64 v6, v5
	s_cbranch_execz .LBB1_34
; %bb.33:
	s_waitcnt lgkmcnt(0)
	v_add_f64 v[1:2], v[1:2], v[3:4]
.LBB1_34:                               ; %_ZN7rocprim6detail15warp_reduce_dppIdLj32ELb0EE6reduceIN6thrust4plusIdEEEEvdRdjT_.exit.i.i.i.i.i
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s1, exec_lo
	v_cmpx_eq_u32_e32 0, v19
	s_cbranch_execz .LBB1_36
; %bb.35:
	s_waitcnt lgkmcnt(1)
	v_lshrrev_b32_e32 v3, 2, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v3, 56, v3
	ds_store_b64 v3, v[1:2] offset:64
.LBB1_36:
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s1, exec_lo
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmpx_gt_u32_e32 8, v0
	s_cbranch_execz .LBB1_44
; %bb.37:
	v_lshlrev_b32_e32 v1, 3, v19
	v_and_b32_e32 v5, 7, v19
	s_add_i32 s0, s0, 31
	s_mov_b32 s2, exec_lo
	s_lshr_b32 s0, s0, 5
	ds_load_b64 v[1:2], v1 offset:64
	v_cmp_ne_u32_e32 vcc_lo, 7, v5
	v_add_nc_u32_e32 v6, 1, v5
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v19, vcc_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_lshlrev_b32_e32 v4, 2, v3
	s_waitcnt lgkmcnt(0)
	ds_bpermute_b32 v3, v4, v1
	ds_bpermute_b32 v4, v4, v2
	v_cmpx_gt_u32_e64 s0, v6
	s_cbranch_execz .LBB1_39
; %bb.38:
	s_waitcnt lgkmcnt(0)
	v_add_f64 v[1:2], v[1:2], v[3:4]
.LBB1_39:
	s_or_b32 exec_lo, exec_lo, s2
	v_cmp_gt_u32_e32 vcc_lo, 6, v5
	v_add_nc_u32_e32 v6, 2, v5
	s_mov_b32 s2, exec_lo
	s_waitcnt lgkmcnt(1)
	v_cndmask_b32_e64 v3, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v3, 1, v3
	s_waitcnt lgkmcnt(0)
	v_add_lshl_u32 v4, v3, v19, 2
	ds_bpermute_b32 v3, v4, v1
	ds_bpermute_b32 v4, v4, v2
	v_cmpx_gt_u32_e64 s0, v6
	s_cbranch_execz .LBB1_41
; %bb.40:
	s_waitcnt lgkmcnt(0)
	v_add_f64 v[1:2], v[1:2], v[3:4]
.LBB1_41:
	s_or_b32 exec_lo, exec_lo, s2
	v_cmp_gt_u32_e32 vcc_lo, 4, v5
	v_add_nc_u32_e32 v5, 4, v5
	s_waitcnt lgkmcnt(1)
	v_cndmask_b32_e64 v3, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_u32_e32 vcc_lo, s0, v5
	v_lshlrev_b32_e32 v3, 2, v3
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_add_lshl_u32 v4, v3, v19, 2
	ds_bpermute_b32 v3, v4, v1
	ds_bpermute_b32 v4, v4, v2
	s_and_saveexec_b32 s0, vcc_lo
	s_cbranch_execz .LBB1_43
; %bb.42:
	s_waitcnt lgkmcnt(0)
	v_add_f64 v[1:2], v[1:2], v[3:4]
.LBB1_43:                               ; %Flow16
	s_or_b32 exec_lo, exec_lo, s0
.LBB1_44:                               ; %Flow17
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
.LBB1_45:                               ; %_ZN7rocprim12block_reduceIdLj256ELNS_22block_reduce_algorithmE0ELj1ELj1EE6reduceIN6thrust4plusIdEEEEvdRdjT_.exit.i
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB1_47
; %bb.46:
	s_lshl_b64 s[0:1], s[16:17], 3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	s_add_u32 s0, s12, s0
	s_addc_u32 s1, s13, s1
	s_cmp_lg_u64 s[10:11], 0
	s_cselect_b32 vcc_lo, -1, 0
	s_waitcnt lgkmcnt(0)
	v_cndmask_b32_e32 v2, 0x80000000, v2, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v1, 0, v1, vcc_lo
	v_add_f64 v[0:1], v[1:2], s[14:15]
	v_mov_b32_e32 v2, 0
	global_store_b64 v2, v[0:1], s[0:1]
.LBB1_47:                               ; %_ZN7rocprim6detail24block_reduce_kernel_implILb1ENS0_21wrapped_reduce_configINS_14default_configEdEEdPdS5_dN6thrust4plusIdEEEEvT2_mT3_T4_T5_.exit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _ZN7rocprim6detail19block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEdEEdPdS5_dN6thrust4plusIdEEEEvT2_mT3_T4_T5_
		.amdhsa_group_segment_fixed_size 128
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 36
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 21
		.amdhsa_next_free_sgpr 18
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._ZN7rocprim6detail19block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEdEEdPdS5_dN6thrust4plusIdEEEEvT2_mT3_T4_T5_,"axG",@progbits,_ZN7rocprim6detail19block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEdEEdPdS5_dN6thrust4plusIdEEEEvT2_mT3_T4_T5_,comdat
.Lfunc_end1:
	.size	_ZN7rocprim6detail19block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEdEEdPdS5_dN6thrust4plusIdEEEEvT2_mT3_T4_T5_, .Lfunc_end1-_ZN7rocprim6detail19block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEdEEdPdS5_dN6thrust4plusIdEEEEvT2_mT3_T4_T5_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 2276
; NumSgprs: 20
; NumVgprs: 21
; ScratchSize: 0
; MemoryBound: 1
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 128 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 20
; NumVGPRsForWavesPerEU: 21
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._ZN7rocprim6detail19block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEdEEdN6thrust11hip_rocprim26transform_input_iterator_tIdNS5_17counting_iteratorIjNS5_11use_defaultES9_S9_EE11estimate_esEEPddNS5_4plusIdEEEEvT2_mT3_T4_T5_,"axG",@progbits,_ZN7rocprim6detail19block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEdEEdN6thrust11hip_rocprim26transform_input_iterator_tIdNS5_17counting_iteratorIjNS5_11use_defaultES9_S9_EE11estimate_esEEPddNS5_4plusIdEEEEvT2_mT3_T4_T5_,comdat
	.protected	_ZN7rocprim6detail19block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEdEEdN6thrust11hip_rocprim26transform_input_iterator_tIdNS5_17counting_iteratorIjNS5_11use_defaultES9_S9_EE11estimate_esEEPddNS5_4plusIdEEEEvT2_mT3_T4_T5_ ; -- Begin function _ZN7rocprim6detail19block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEdEEdN6thrust11hip_rocprim26transform_input_iterator_tIdNS5_17counting_iteratorIjNS5_11use_defaultES9_S9_EE11estimate_esEEPddNS5_4plusIdEEEEvT2_mT3_T4_T5_
	.globl	_ZN7rocprim6detail19block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEdEEdN6thrust11hip_rocprim26transform_input_iterator_tIdNS5_17counting_iteratorIjNS5_11use_defaultES9_S9_EE11estimate_esEEPddNS5_4plusIdEEEEvT2_mT3_T4_T5_
	.p2align	8
	.type	_ZN7rocprim6detail19block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEdEEdN6thrust11hip_rocprim26transform_input_iterator_tIdNS5_17counting_iteratorIjNS5_11use_defaultES9_S9_EE11estimate_esEEPddNS5_4plusIdEEEEvT2_mT3_T4_T5_,@function
_ZN7rocprim6detail19block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEdEEdN6thrust11hip_rocprim26transform_input_iterator_tIdNS5_17counting_iteratorIjNS5_11use_defaultES9_S9_EE11estimate_esEEPddNS5_4plusIdEEEEvT2_mT3_T4_T5_: ; @_ZN7rocprim6detail19block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEdEEdN6thrust11hip_rocprim26transform_input_iterator_tIdNS5_17counting_iteratorIjNS5_11use_defaultES9_S9_EE11estimate_esEEPddNS5_4plusIdEEEEvT2_mT3_T4_T5_
; %bb.0:
	s_mov_b32 s20, s15
	s_load_b256 s[12:19], s[0:1], 0x0
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, g_seed@rel32@lo+4
	s_addc_u32 s1, s1, g_seed@rel32@hi+12
	s_lshl_b32 s33, s20, 11
	s_load_b64 s[22:23], s[0:1], 0x0
	v_or_b32_e32 v1, s33, v0
	s_mov_b32 s21, 0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_add_nc_u32_e32 v66, s12, v1
	s_lshr_b64 s[0:1], s[14:15], 11
	s_cmp_lg_u64 s[0:1], s[20:21]
	s_cbranch_scc0 .LBB2_150
; %bb.1:
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v1, 12, v66
	s_mov_b64 s[4:5], 0
                                        ; implicit-def: $vgpr34_vgpr35
                                        ; implicit-def: $vgpr29_vgpr30
                                        ; implicit-def: $vgpr31_vgpr32
                                        ; implicit-def: $vgpr36_vgpr37
	v_add3_u32 v1, v66, v1, 0x7ed55d16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v2, 19, v1
	v_xor3_b32 v1, v1, v2, 0xc761c23c
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v1, v1, 5, v1
	v_add_nc_u32_e32 v2, 0xe9f8cc1d, v1
	v_lshl_add_u32 v1, v1, 9, 0xaccf6200
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v1, v2, v1
	v_lshlrev_b32_e32 v2, 3, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v1, v1, v2, 0xfd7046c5
	v_lshrrev_b32_e32 v2, 16, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_xor3_b32 v1, v1, v2, 0xb55a4f09
.LBB2_2:                                ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v2, 12, v1
	s_cmp_eq_u32 s4, 0
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s4, 1
	v_add3_u32 v1, v1, v2, 0x7ed55d16
	s_cselect_b32 s0, -1, 0
	s_cmp_eq_u32 s4, 2
	s_cselect_b32 s1, -1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v2, 19, v1
	s_cmp_eq_u32 s4, 3
	s_cselect_b32 s2, -1, 0
	s_add_u32 s4, s4, 1
	v_xor3_b32 v1, v1, v2, 0xc761c23c
	s_addc_u32 s5, s5, 0
	s_cmp_lg_u32 s4, 4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v1, v1, 5, v1
	v_add_nc_u32_e32 v2, 0xe9f8cc1d, v1
	v_lshl_add_u32 v1, v1, 9, 0xaccf6200
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v1, v2, v1
	v_lshlrev_b32_e32 v2, 3, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v1, v1, v2, 0xfd7046c5
	v_lshrrev_b32_e32 v2, 16, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor3_b32 v1, v1, v2, 0xb55a4f09
	v_lshlrev_b32_e32 v3, 12, v1
	v_xor_b32_e32 v2, s23, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add3_u32 v1, v1, v3, 0x7ed55d16
	v_cndmask_b32_e32 v35, v35, v2, vcc_lo
	v_cndmask_b32_e64 v30, v30, v2, s0
	v_cndmask_b32_e64 v32, v32, v2, s1
	v_cndmask_b32_e64 v37, v37, v2, s2
	v_lshrrev_b32_e32 v3, 19, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor3_b32 v1, v1, v3, 0xc761c23c
	v_lshl_add_u32 v1, v1, 5, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v3, 0xe9f8cc1d, v1
	v_lshl_add_u32 v1, v1, 9, 0xaccf6200
	v_xor_b32_e32 v1, v3, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v3, 3, v1
	v_add3_u32 v1, v1, v3, 0xfd7046c5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v3, 16, v1
	v_xor3_b32 v1, v1, v3, 0xb55a4f09
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v2, s22, v1
	v_cndmask_b32_e32 v34, v34, v2, vcc_lo
	v_cndmask_b32_e64 v29, v29, v2, s0
	v_cndmask_b32_e64 v31, v31, v2, s1
	v_cndmask_b32_e64 v36, v36, v2, s2
	s_cbranch_scc1 .LBB2_2
; %bb.3:                                ; %.preheader55.i.i.i28.i.preheader
	v_mov_b32_e32 v27, 0
	v_dual_mov_b32 v28, 0 :: v_dual_mov_b32 v33, 0
	s_mov_b32 s4, 0x54442d18
	s_mov_b32 s12, 0x6dc9c883
	s_mov_b32 s26, 0x33145c00
	s_mov_b32 s28, 0x252049c0
	s_mov_b32 s30, 0x55555555
	s_mov_b32 s34, 0x6b47b09a
	s_mov_b32 s36, 0xbf559e2b
	s_mov_b32 s38, 0xd7f4df2e
	s_mov_b32 s40, 0x16291751
	s_mov_b32 s42, 0x9b27acf1
	s_mov_b32 s44, 0x998ef7b6
	s_mov_b32 s46, 0xfefa39ef
	s_mov_b32 s48, 0x3b39803f
	s_mov_b32 s50, 0x9037ab78
	s_mov_b32 s52, 0x46cc5e42
	s_mov_b32 s54, 0xa17f65f6
	s_mov_b32 s56, 0x19f4ec90
	s_mov_b32 s58, 0x16c16967
	s_mov_b32 s60, 0xb42fdfa7
	s_mov_b32 s62, 0xf9a43bb8
	s_mov_b32 s64, 0x796cde01
	s_mov_b32 s66, 0x19e83e5c
	s_mov_b32 s68, 0x11110bb3
	s_mov_b32 s76, 0
	s_mov_b32 s5, 0x401921fb
	s_mov_b32 s7, 0x3ff921fb
	s_mov_b32 s9, 0x3c91a626
	s_mov_b32 s10, 0x33145c07
	s_mov_b32 s13, 0x3fe45f30
	s_mov_b32 s25, 0xbff921fb
	s_mov_b32 s27, 0xbc91a626
	s_mov_b32 s29, 0xb97b839a
	s_mov_b32 s31, 0x3fe55555
	s_mov_b32 s35, 0x3fc38538
	s_mov_b32 s37, 0x3fc3ab76
	s_mov_b32 s39, 0x3fc7474d
	s_mov_b32 s41, 0x3fcc71c0
	s_mov_b32 s43, 0x3fd24924
	s_mov_b32 s45, 0x3fd99999
	s_mov_b32 s47, 0x3fe62e42
	s_mov_b32 s49, 0x3c7abc9e
	s_mov_b32 s51, 0x3e21eeb6
	s_mov_b32 s53, 0xbda907db
	s_mov_b32 s55, 0xbe927e4f
	s_mov_b32 s57, 0x3efa01a0
	s_mov_b32 s59, 0xbf56c16c
	s_mov_b32 s61, 0xbe5ae600
	s_mov_b32 s63, 0x3de5e0b2
	s_mov_b32 s65, 0x3ec71de3
	s_mov_b32 s67, 0xbf2a01a0
	s_mov_b32 s69, 0x3f811111
	s_mov_b32 s70, 0x55555780
	s_mov_b32 s73, 0x3fa55555
	s_mov_b32 s75, 0xbfc55555
                                        ; implicit-def: $vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16
                                        ; implicit-def: $vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26
.LBB2_4:                                ; %.preheader55.i.i.i28.i
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB2_5 Depth 2
                                        ;     Child Loop BB2_15 Depth 2
                                        ;       Child Loop BB2_16 Depth 3
	v_dual_mov_b32 v21, v34 :: v_dual_mov_b32 v22, v35
	v_dual_mov_b32 v40, v37 :: v_dual_mov_b32 v39, v36
	s_mov_b32 s77, 0
.LBB2_5:                                ;   Parent Loop BB2_4 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v35, v30, v40
	v_xor_b32_e32 v34, v29, v39
                                        ; implicit-def: $vgpr55
                                        ; implicit-def: $vgpr37_vgpr38
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v53, v35, v22
	v_lshrrev_b64 v[23:24], 19, v[34:35]
	v_lshlrev_b32_e32 v25, 13, v34
	v_xor_b32_e32 v26, v34, v21
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_or_b32_e32 v54, v25, v24
	v_add_co_u32 v24, vcc_lo, v23, v26
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v25, vcc_lo, v54, v53, vcc_lo
	v_lshrrev_b64 v[24:25], 11, v[24:25]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_u32_e32 v[34:35], v25
	v_cvt_f64_u32_e32 v[24:25], v24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[34:35], v[34:35], 32
	v_add_f64 v[24:25], v[34:35], v[24:25]
                                        ; implicit-def: $vgpr35_vgpr36
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[24:25], v[24:25], 0xffffffcb
	v_mul_f64 v[24:25], v[24:25], s[4:5]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ngt_f64_e32 vcc_lo, 0x41d00000, v[24:25]
	v_trig_preop_f64 v[49:50], v[24:25], 0
	v_trig_preop_f64 v[47:48], v[24:25], 1
	v_ldexp_f64 v[51:52], v[24:25], 0xffffff80
	v_trig_preop_f64 v[45:46], v[24:25], 2
	s_and_saveexec_b32 s0, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s2, exec_lo, s0
	s_cbranch_execz .LBB2_7
; %bb.6:                                ;   in Loop: Header=BB2_5 Depth=2
	v_cmp_le_f64_e64 s0, 0x7b000000, v[24:25]
	s_mov_b32 s6, s4
	s_mov_b32 s11, s9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v36, v25, v52, s0
	v_cndmask_b32_e64 v35, v24, v51, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_f64 v[37:38], v[49:50], v[35:36]
	v_mul_f64 v[41:42], v[47:48], v[35:36]
	v_mul_f64 v[63:64], v[45:46], v[35:36]
	v_fma_f64 v[43:44], v[49:50], v[35:36], -v[37:38]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[67:68], v[47:48], v[35:36], -v[41:42]
	v_add_f64 v[55:56], v[41:42], v[43:44]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[57:58], v[55:56], -v[41:42]
	v_add_f64 v[61:62], v[37:38], v[55:56]
	v_add_f64 v[59:60], v[55:56], -v[57:58]
	v_add_f64 v[43:44], v[43:44], -v[57:58]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[57:58], v[61:62], -2
	v_add_f64 v[37:38], v[61:62], -v[37:38]
	v_add_f64 v[41:42], v[41:42], -v[59:60]
	v_add_f64 v[59:60], v[63:64], v[67:68]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cmp_neq_f64_e64 s0, 0x7ff00000, |v[57:58]|
	v_add_f64 v[37:38], v[55:56], -v[37:38]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[41:42], v[43:44], v[41:42]
	v_fract_f64_e32 v[43:44], v[57:58]
	v_add_f64 v[55:56], v[59:60], v[41:42]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v44, 0, v44, s0
	v_cndmask_b32_e64 v43, 0, v43, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[43:44], v[43:44], 2
	v_add_f64 v[57:58], v[37:38], v[55:56]
	v_add_f64 v[69:70], v[55:56], -v[59:60]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[61:62], v[57:58], v[43:44]
	v_add_f64 v[75:76], v[55:56], -v[69:70]
	v_add_f64 v[41:42], v[41:42], -v[69:70]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cmp_gt_f64_e64 s0, 0, v[61:62]
	v_add_f64 v[61:62], v[59:60], -v[63:64]
	v_cndmask_b32_e64 v34, 0, 0x40100000, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[73:74], v[59:60], -v[61:62]
	v_add_f64 v[61:62], v[67:68], -v[61:62]
	v_add_f64 v[59:60], v[59:60], -v[75:76]
	v_add_f64 v[43:44], v[43:44], v[33:34]
	v_fma_f64 v[34:35], v[45:46], v[35:36], -v[63:64]
	v_add_f64 v[36:37], v[57:58], -v[37:38]
	v_add_f64 v[67:68], v[63:64], -v[73:74]
	v_add_f64 v[41:42], v[41:42], v[59:60]
	v_add_f64 v[71:72], v[57:58], v[43:44]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[36:37], v[55:56], -v[36:37]
	v_add_f64 v[61:62], v[61:62], v[67:68]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_i32_f64_e32 v65, v[71:72]
	v_add_f64 v[41:42], v[61:62], v[41:42]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_i32_e32 v[69:70], v65
	v_add_f64 v[34:35], v[34:35], v[41:42]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[43:44], v[43:44], -v[69:70]
	v_add_f64 v[35:36], v[36:37], v[34:35]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[59:60], v[57:58], v[43:44]
	v_add_f64 v[41:42], v[59:60], -v[43:44]
	v_cmp_le_f64_e64 s0, 0.5, v[59:60]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[37:38], v[57:58], -v[41:42]
	v_cndmask_b32_e64 v34, 0, 0x3ff00000, s0
	v_add_co_ci_u32_e64 v55, s1, 0, v65, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[35:36], v[35:36], v[37:38]
	v_add_f64 v[37:38], v[59:60], -v[33:34]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[41:42], v[37:38], v[35:36]
	v_mul_f64 v[43:44], v[41:42], s[6:7]
	v_add_f64 v[37:38], v[41:42], -v[37:38]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[56:57], v[41:42], s[6:7], -v[43:44]
	v_add_f64 v[34:35], v[35:36], -v[37:38]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[36:37], v[41:42], s[10:11], v[56:57]
	v_fma_f64 v[37:38], v[34:35], s[6:7], v[36:37]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[35:36], v[43:44], v[37:38]
	v_add_f64 v[41:42], v[35:36], -v[43:44]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[37:38], v[37:38], -v[41:42]
.LBB2_7:                                ; %Flow1205
                                        ;   in Loop: Header=BB2_5 Depth=2
	s_and_not1_saveexec_b32 s0, s2
	s_cbranch_execz .LBB2_9
; %bb.8:                                ;   in Loop: Header=BB2_5 Depth=2
	v_mul_f64 v[34:35], v[24:25], s[12:13]
	s_mov_b32 s24, s4
	s_mov_b32 s8, s26
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[41:42], v[34:35]
	v_fma_f64 v[34:35], v[41:42], s[24:25], v[24:25]
	v_mul_f64 v[36:37], v[41:42], s[26:27]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[55:56], v[41:42], s[26:27], v[34:35]
	v_add_f64 v[43:44], v[34:35], v[36:37]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[34:35], v[34:35], -v[43:44]
	v_add_f64 v[43:44], v[43:44], -v[55:56]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[34:35], v[34:35], v[36:37]
	v_fma_f64 v[36:37], v[41:42], s[8:9], v[36:37]
	v_add_f64 v[34:35], v[43:44], v[34:35]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[34:35], v[34:35], -v[36:37]
	v_fma_f64 v[37:38], v[41:42], s[28:29], v[34:35]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[35:36], v[55:56], v[37:38]
	v_add_f64 v[43:44], v[35:36], -v[55:56]
	v_cvt_i32_f64_e32 v55, v[41:42]
	s_delay_alu instid0(VALU_DEP_2)
	v_add_f64 v[37:38], v[37:38], -v[43:44]
.LBB2_9:                                ; %_ZL3cosd.exit.i.i.i38.i
                                        ;   in Loop: Header=BB2_5 Depth=2
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $vgpr56
                                        ; implicit-def: $vgpr41_vgpr42
                                        ; implicit-def: $vgpr43_vgpr44
	s_and_saveexec_b32 s0, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s1, exec_lo, s0
	s_cbranch_execz .LBB2_11
; %bb.10:                               ;   in Loop: Header=BB2_5 Depth=2
	v_cmp_le_f64_e32 vcc_lo, 0x7b000000, v[24:25]
	s_mov_b32 s6, s4
	s_mov_b32 s11, s9
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v42, v25, v52 :: v_dual_cndmask_b32 v41, v24, v51
	v_mul_f64 v[43:44], v[49:50], v[41:42]
	v_mul_f64 v[51:52], v[47:48], v[41:42]
	v_mul_f64 v[64:65], v[45:46], v[41:42]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[49:50], v[49:50], v[41:42], -v[43:44]
	v_fma_f64 v[47:48], v[47:48], v[41:42], -v[51:52]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[41:42], v[45:46], v[41:42], -v[64:65]
	v_add_f64 v[56:57], v[51:52], v[49:50]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[58:59], v[56:57], -v[51:52]
	v_add_f64 v[62:63], v[43:44], v[56:57]
	v_add_f64 v[60:61], v[56:57], -v[58:59]
	v_add_f64 v[49:50], v[49:50], -v[58:59]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[58:59], v[62:63], -2
	v_add_f64 v[43:44], v[62:63], -v[43:44]
	v_add_f64 v[51:52], v[51:52], -v[60:61]
	v_add_f64 v[60:61], v[64:65], v[47:48]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[58:59]|
	v_add_f64 v[43:44], v[56:57], -v[43:44]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[49:50], v[49:50], v[51:52]
	v_fract_f64_e32 v[51:52], v[58:59]
	v_add_f64 v[56:57], v[60:61], v[49:50]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v52, 0, v52 :: v_dual_cndmask_b32 v51, 0, v51
	v_ldexp_f64 v[51:52], v[51:52], 2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[58:59], v[43:44], v[56:57]
	v_add_f64 v[67:68], v[56:57], -v[60:61]
	v_add_f64 v[62:63], v[58:59], v[51:52]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[73:74], v[56:57], -v[67:68]
	v_add_f64 v[49:50], v[49:50], -v[67:68]
	v_add_f64 v[43:44], v[58:59], -v[43:44]
	v_cmp_gt_f64_e32 vcc_lo, 0, v[62:63]
	v_add_f64 v[62:63], v[60:61], -v[64:65]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[43:44], v[56:57], -v[43:44]
	v_cndmask_b32_e64 v34, 0, 0x40100000, vcc_lo
	v_add_f64 v[71:72], v[60:61], -v[62:63]
	v_add_f64 v[47:48], v[47:48], -v[62:63]
	v_add_f64 v[60:61], v[60:61], -v[73:74]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[51:52], v[51:52], v[33:34]
	v_add_f64 v[62:63], v[64:65], -v[71:72]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[49:50], v[49:50], v[60:61]
	v_add_f64 v[69:70], v[58:59], v[51:52]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[47:48], v[47:48], v[62:63]
	v_cvt_i32_f64_e32 v34, v[69:70]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[45:46], v[47:48], v[49:50]
	v_cvt_f64_i32_e32 v[67:68], v34
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[41:42], v[41:42], v[45:46]
	v_add_f64 v[51:52], v[51:52], -v[67:68]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[41:42], v[43:44], v[41:42]
	v_add_f64 v[47:48], v[58:59], v[51:52]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[45:46], v[47:48], -v[51:52]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[47:48]
	v_add_f64 v[43:44], v[58:59], -v[45:46]
	v_add_co_ci_u32_e64 v56, s0, 0, v34, vcc_lo
	v_cndmask_b32_e64 v34, 0, 0x3ff00000, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[41:42], v[41:42], v[43:44]
	v_add_f64 v[43:44], v[47:48], -v[33:34]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[45:46], v[43:44], v[41:42]
	v_mul_f64 v[47:48], v[45:46], s[6:7]
	v_add_f64 v[43:44], v[45:46], -v[43:44]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[49:50], v[45:46], s[6:7], -v[47:48]
	v_add_f64 v[41:42], v[41:42], -v[43:44]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[43:44], v[45:46], s[10:11], v[49:50]
	v_fma_f64 v[43:44], v[41:42], s[6:7], v[43:44]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[41:42], v[47:48], v[43:44]
	v_add_f64 v[45:46], v[41:42], -v[47:48]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[43:44], v[43:44], -v[45:46]
.LBB2_11:                               ; %Flow1204
                                        ;   in Loop: Header=BB2_5 Depth=2
	s_and_not1_saveexec_b32 s0, s1
	s_cbranch_execz .LBB2_13
; %bb.12:                               ;   in Loop: Header=BB2_5 Depth=2
	v_mul_f64 v[41:42], v[24:25], s[12:13]
	s_mov_b32 s24, s4
	s_mov_b32 s8, s26
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[45:46], v[41:42]
	v_fma_f64 v[41:42], v[45:46], s[24:25], v[24:25]
	v_mul_f64 v[43:44], v[45:46], s[26:27]
	v_cvt_i32_f64_e32 v56, v[45:46]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[49:50], v[45:46], s[26:27], v[41:42]
	v_add_f64 v[47:48], v[41:42], v[43:44]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[41:42], v[41:42], -v[47:48]
	v_add_f64 v[47:48], v[47:48], -v[49:50]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[41:42], v[41:42], v[43:44]
	v_fma_f64 v[43:44], v[45:46], s[8:9], v[43:44]
	v_add_f64 v[41:42], v[47:48], v[41:42]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[41:42], v[41:42], -v[43:44]
	v_fma_f64 v[43:44], v[45:46], s[28:29], v[41:42]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[41:42], v[49:50], v[43:44]
	v_add_f64 v[47:48], v[41:42], -v[49:50]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[43:44], v[43:44], -v[47:48]
.LBB2_13:                               ; %_ZL3sind.exit.i.i.i43.i
                                        ;   in Loop: Header=BB2_5 Depth=2
	s_or_b32 exec_lo, exec_lo, s0
	v_add_co_u32 v39, vcc_lo, v39, v21
	v_add_co_ci_u32_e32 v40, vcc_lo, v40, v22, vcc_lo
	s_mov_b32 s71, s31
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_f64 v[75:76], v[37:38], 0.5
	v_mul_f64 v[83:84], v[43:44], 0.5
	s_delay_alu instid0(VALU_DEP_3)
	v_lshrrev_b64 v[39:40], 11, v[39:40]
	s_mov_b32 s72, s30
	s_mov_b32 s74, s30
	v_cmp_lg_f64_e64 s0, 0x7ff00000, v[24:25]
	s_cmp_eq_u32 s77, 4
	v_xor_b32_e32 v32, v32, v22
	v_cvt_f64_u32_e32 v[45:46], v40
	v_cvt_f64_u32_e32 v[39:40], v39
	v_xor_b32_e32 v31, v31, v21
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[45:46], v[45:46], 32
	v_add_f64 v[39:40], v[45:46], v[39:40]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[39:40], v[39:40], 0xffffffcb
	v_frexp_mant_f64_e32 v[45:46], v[39:40]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f64_e32 vcc_lo, s[30:31], v[45:46]
	v_cndmask_b32_e64 v34, 0, 1, vcc_lo
	v_ldexp_f64 v[45:46], v[45:46], v34
	v_frexp_exp_i32_f64_e32 v34, v[39:40]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[47:48], v[45:46], 1.0
	v_add_f64 v[57:58], v[45:46], -1.0
	v_subrev_co_ci_u32_e32 v34, vcc_lo, 0, v34, vcc_lo
	v_cmp_eq_f64_e32 vcc_lo, 0x7ff00000, v[39:40]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[49:50], v[47:48]
	v_add_f64 v[59:60], v[47:48], -1.0
	v_add_f64 v[45:46], v[45:46], -v[59:60]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[51:52], -v[47:48], v[49:50], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[49:50], v[51:52], v[49:50], v[49:50]
	v_fma_f64 v[51:52], -v[47:48], v[49:50], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[49:50], v[51:52], v[49:50], v[49:50]
	v_mul_f64 v[51:52], v[57:58], v[49:50]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[61:62], v[47:48], v[51:52]
	v_fma_f64 v[47:48], v[51:52], v[47:48], -v[61:62]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[45:46], v[51:52], v[45:46], v[47:48]
	v_add_f64 v[47:48], v[61:62], v[45:46]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[59:60], v[57:58], -v[47:48]
	v_add_f64 v[61:62], v[47:48], -v[61:62]
	v_add_f64 v[57:58], v[57:58], -v[59:60]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[45:46], v[61:62], -v[45:46]
	v_add_f64 v[47:48], v[57:58], -v[47:48]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[45:46], v[45:46], v[47:48]
	v_add_f64 v[45:46], v[59:60], v[45:46]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[45:46], v[49:50], v[45:46]
	v_add_f64 v[47:48], v[51:52], v[45:46]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[49:50], v[47:48], v[47:48]
	v_fma_f64 v[57:58], v[49:50], s[36:37], s[34:35]
	v_mul_f64 v[59:60], v[47:48], v[49:50]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[57:58], v[49:50], v[57:58], s[38:39]
	v_fma_f64 v[57:58], v[49:50], v[57:58], s[40:41]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[57:58], v[49:50], v[57:58], s[42:43]
	v_fma_f64 v[57:58], v[49:50], v[57:58], s[44:45]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[49:50], v[49:50], v[57:58], s[70:71]
	v_ldexp_f64 v[57:58], v[47:48], 1
	v_add_f64 v[47:48], v[47:48], -v[51:52]
	v_mul_f64 v[49:50], v[59:60], v[49:50]
	v_cvt_f64_i32_e32 v[59:60], v34
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[45:46], v[45:46], -v[47:48]
	v_add_f64 v[51:52], v[57:58], v[49:50]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[61:62], v[59:60], s[46:47]
	v_ldexp_f64 v[45:46], v[45:46], 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[47:48], v[51:52], -v[57:58]
	v_fma_f64 v[57:58], v[59:60], s[46:47], -v[61:62]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[47:48], v[49:50], -v[47:48]
	v_fma_f64 v[49:50], v[59:60], s[48:49], v[57:58]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[45:46], v[45:46], v[47:48]
	v_add_f64 v[47:48], v[61:62], v[49:50]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[57:58], v[51:52], v[45:46]
	v_add_f64 v[61:62], v[47:48], -v[61:62]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[59:60], v[47:48], v[57:58]
	v_add_f64 v[51:52], v[57:58], -v[51:52]
	v_add_f64 v[49:50], v[49:50], -v[61:62]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[63:64], v[59:60], -v[47:48]
	v_add_f64 v[45:46], v[45:46], -v[51:52]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[67:68], v[59:60], -v[63:64]
	v_add_f64 v[51:52], v[57:58], -v[63:64]
	v_add_f64 v[57:58], v[49:50], v[45:46]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[47:48], v[47:48], -v[67:68]
	v_add_f64 v[47:48], v[51:52], v[47:48]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[51:52], v[57:58], -v[49:50]
	v_add_f64 v[47:48], v[57:58], v[47:48]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[57:58], v[57:58], -v[51:52]
	v_add_f64 v[45:46], v[45:46], -v[51:52]
	v_add_f64 v[61:62], v[59:60], v[47:48]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[49:50], v[49:50], -v[57:58]
	v_add_f64 v[51:52], v[61:62], -v[59:60]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[45:46], v[45:46], v[49:50]
	v_mul_f64 v[49:50], v[41:42], v[41:42]
	v_add_f64 v[47:48], v[47:48], -v[51:52]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mul_f64 v[69:70], v[49:50], 0.5
	v_fma_f64 v[71:72], v[49:50], s[52:53], s[50:51]
	v_add_f64 v[45:46], v[45:46], v[47:48]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[81:82], -v[69:70], 1.0
	v_fma_f64 v[71:72], v[49:50], v[71:72], s[54:55]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[45:46], v[61:62], v[45:46]
	v_fma_f64 v[61:62], v[49:50], s[62:63], s[60:61]
	v_fma_f64 v[71:72], v[49:50], v[71:72], s[56:57]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_dual_cndmask_b32 v46, v46, v40 :: v_dual_cndmask_b32 v45, v45, v39
	v_cmp_ngt_f64_e32 vcc_lo, 0, v[39:40]
	v_fma_f64 v[61:62], v[49:50], v[61:62], s[64:65]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[71:72], v[49:50], v[71:72], s[58:59]
	v_mul_f64 v[45:46], v[45:46], -2.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[61:62], v[49:50], v[61:62], s[66:67]
	v_cndmask_b32_e32 v34, 0x7ff80000, v46, vcc_lo
	v_cmp_nge_f64_e32 vcc_lo, 0, v[39:40]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_fma_f64 v[61:62], v[49:50], v[61:62], s[68:69]
	v_cndmask_b32_e32 v45, 0, v45, vcc_lo
	v_cmp_neq_f64_e32 vcc_lo, 0, v[39:40]
	v_mul_f64 v[39:40], v[35:36], v[35:36]
	v_cndmask_b32_e32 v46, 0x7ff00000, v34, vcc_lo
	v_fma_f64 v[47:48], v[39:40], s[62:63], s[60:61]
	v_mul_f64 v[57:58], v[39:40], 0.5
	v_fma_f64 v[59:60], v[39:40], s[52:53], s[50:51]
	v_mul_f64 v[77:78], v[35:36], -v[39:40]
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[45:46]
	v_fma_f64 v[47:48], v[39:40], v[47:48], s[64:65]
	v_add_f64 v[67:68], -v[57:58], 1.0
	v_fma_f64 v[59:60], v[39:40], v[59:60], s[54:55]
	v_cndmask_b32_e64 v34, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v34, 8, v34
	v_ldexp_f64 v[45:46], v[45:46], v34
	v_fma_f64 v[47:48], v[39:40], v[47:48], s[66:67]
	v_add_f64 v[79:80], -v[67:68], 1.0
	v_fma_f64 v[59:60], v[39:40], v[59:60], s[56:57]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_rsq_f64_e32 v[51:52], v[45:46]
	v_cmp_class_f64_e64 s1, v[45:46], 0x260
	v_fma_f64 v[47:48], v[39:40], v[47:48], s[68:69]
	s_delay_alu instid0(VALU_DEP_4)
	v_add_f64 v[57:58], v[79:80], -v[57:58]
	v_add_f64 v[79:80], -v[81:82], 1.0
	v_fma_f64 v[59:60], v[39:40], v[59:60], s[58:59]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[63:64], v[45:46], v[51:52]
	v_mul_f64 v[51:52], v[51:52], 0.5
	v_fma_f64 v[47:48], v[77:78], v[47:48], v[75:76]
	v_mul_f64 v[75:76], v[41:42], -v[49:50]
	v_add_f64 v[69:70], v[79:80], -v[69:70]
	v_mul_f64 v[79:80], v[39:40], v[39:40]
	v_fma_f64 v[59:60], v[39:40], v[59:60], s[72:73]
	v_fma_f64 v[57:58], v[35:36], -v[37:38], v[57:58]
	v_fma_f64 v[73:74], -v[51:52], v[63:64], 0.5
	v_fma_f64 v[37:38], v[39:40], v[47:48], -v[37:38]
	v_fma_f64 v[61:62], v[75:76], v[61:62], v[83:84]
	v_mul_f64 v[47:48], v[49:50], v[49:50]
	v_fma_f64 v[69:70], v[41:42], -v[43:44], v[69:70]
	v_fma_f64 v[63:64], v[63:64], v[73:74], v[63:64]
	v_fma_f64 v[51:52], v[51:52], v[73:74], v[51:52]
	v_fma_f64 v[37:38], v[77:78], s[74:75], v[37:38]
	v_fma_f64 v[43:44], v[49:50], v[61:62], -v[43:44]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[73:74], -v[63:64], v[63:64], v[45:46]
	v_add_f64 v[34:35], v[35:36], -v[37:38]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[43:44], v[75:76], s[74:75], v[43:44]
	v_fma_f64 v[39:40], v[73:74], v[51:52], v[63:64]
	v_fma_f64 v[63:64], v[49:50], v[71:72], s[72:73]
	v_fma_f64 v[49:50], v[79:80], v[59:60], v[57:58]
	v_xor_b32_e32 v35, 0x80000000, v35
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[57:58], -v[39:40], v[39:40], v[45:46]
	v_fma_f64 v[47:48], v[47:48], v[63:64], v[69:70]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[49:50], v[67:68], v[49:50]
	v_fma_f64 v[36:37], v[57:58], v[51:52], v[39:40]
	s_delay_alu instid0(VALU_DEP_3)
	v_add_f64 v[38:39], v[81:82], v[47:48]
	v_add_f64 v[40:41], v[41:42], -v[43:44]
	v_and_b32_e32 v43, 1, v56
	v_cndmask_b32_e64 v47, 0, 0xffffff80, vcc_lo
	v_and_b32_e32 v51, 1, v55
	v_lshlrev_b32_e32 v42, 30, v56
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_eq_u32_e32 vcc_lo, 0, v51
	v_xor_b32_e32 v25, v42, v25
	v_dual_cndmask_b32 v34, v34, v49 :: v_dual_cndmask_b32 v35, v35, v50
	v_cmp_eq_u32_e32 vcc_lo, 0, v43
	v_lshlrev_b32_e32 v24, 30, v55
	v_ldexp_f64 v[36:37], v[36:37], v47
	v_dual_cndmask_b32 v39, v39, v41 :: v_dual_cndmask_b32 v38, v38, v40
	s_cselect_b32 vcc_lo, -1, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_and_b32_e32 v24, 0x80000000, v24
	v_and_b32_e32 v42, 0x80000000, v25
	s_cmp_eq_u32 s77, 3
	v_cndmask_b32_e64 v21, 0, v38, s0
	v_xor_b32_e32 v35, v35, v24
	v_cndmask_b32_e64 v24, 0, v34, s0
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e64 v25, 0x7ff80000, v35, s0
	v_cndmask_b32_e64 v35, v37, v46, s1
	v_cndmask_b32_e64 v34, v36, v45, s1
	v_lshlrev_b64 v[36:37], 17, v[29:30]
	v_xor_b32_e32 v30, v32, v30
	v_xor_b32_e32 v29, v31, v29
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[24:25], v[34:35], v[24:25]
	v_cndmask_b32_e32 v19, v19, v24, vcc_lo
	v_xor_b32_e32 v39, v39, v42
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v20, v20, v25, vcc_lo
	v_cndmask_b32_e64 v22, 0x7ff80000, v39, s0
	s_cselect_b32 s0, -1, 0
	s_cmp_eq_u32 s77, 2
	v_cndmask_b32_e64 v18, v18, v25, s0
	s_cselect_b32 s1, -1, 0
	v_mul_f64 v[38:39], v[34:35], v[21:22]
	v_xor_b32_e32 v22, v30, v54
	v_xor_b32_e32 v21, v29, v23
	v_xor_b32_e32 v34, v32, v37
	v_xor_b32_e32 v35, v31, v36
	v_lshlrev_b64 v[31:32], 17, v[29:30]
	s_cmp_eq_u32 s77, 1
	v_lshrrev_b64 v[36:37], 19, v[21:22]
	v_xor_b32_e32 v23, v34, v53
	v_xor_b32_e32 v40, v35, v26
	v_xor_b32_e32 v34, v21, v26
	v_lshlrev_b32_e32 v26, 13, v21
	v_xor_b32_e32 v35, v22, v53
	s_cselect_b32 s2, -1, 0
	s_cmp_eq_u32 s77, 0
	v_xor_b32_e32 v29, v40, v29
	v_or_b32_e32 v37, v26, v37
	s_cselect_b32 s3, -1, 0
	v_xor_b32_e32 v31, v40, v31
	v_mov_b32_e32 v21, v34
	v_xor_b32_e32 v30, v23, v30
	v_xor_b32_e32 v32, v23, v32
	v_mov_b32_e32 v22, v35
	v_cndmask_b32_e64 v17, v17, v24, s0
	v_cndmask_b32_e64 v16, v16, v25, s1
	v_cndmask_b32_e64 v15, v15, v24, s1
	v_cndmask_b32_e64 v14, v14, v25, s2
	v_cndmask_b32_e64 v13, v13, v24, s2
	v_cndmask_b32_e64 v12, v12, v25, s3
	v_cndmask_b32_e64 v11, v11, v24, s3
	s_add_i32 s77, s77, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s77, 5
	v_cndmask_b32_e32 v10, v10, v39, vcc_lo
	v_cndmask_b32_e64 v8, v8, v39, s0
	v_cndmask_b32_e64 v6, v6, v39, s1
	v_cndmask_b32_e64 v4, v4, v39, s2
	v_cndmask_b32_e64 v2, v2, v39, s3
	v_mov_b32_e32 v40, v37
	v_cndmask_b32_e32 v9, v9, v38, vcc_lo
	v_cndmask_b32_e64 v7, v7, v38, s0
	v_cndmask_b32_e64 v5, v5, v38, s1
	v_cndmask_b32_e64 v3, v3, v38, s2
	v_cndmask_b32_e64 v1, v1, v38, s3
	v_mov_b32_e32 v39, v36
	s_cbranch_scc1 .LBB2_5
; %bb.14:                               ; %.lr.ph.i.i.i50.i.preheader
                                        ;   in Loop: Header=BB2_4 Depth=1
	v_mov_b32_e32 v21, 0
	v_mov_b32_e32 v22, 0
	s_mov_b32 s3, 0
.LBB2_15:                               ; %.lr.ph.i.i.i50.i
                                        ;   Parent Loop BB2_4 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB2_16 Depth 3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s3, 1
	s_mov_b32 s6, s3
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s3, 2
	v_dual_cndmask_b32 v23, v12, v14 :: v_dual_cndmask_b32 v24, v11, v13
	v_dual_cndmask_b32 v25, v2, v4 :: v_dual_cndmask_b32 v26, v1, v3
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s3, 3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v23, v23, v16 :: v_dual_cndmask_b32 v24, v24, v15
	v_dual_cndmask_b32 v25, v25, v6 :: v_dual_cndmask_b32 v26, v26, v5
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s3, 4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v23, v23, v18 :: v_dual_cndmask_b32 v38, v24, v17
	v_cndmask_b32_e32 v25, v25, v8, vcc_lo
	v_cndmask_b32_e32 v39, v26, v7, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v24, v23, v20 :: v_dual_cndmask_b32 v23, v38, v19
	v_dual_cndmask_b32 v26, v25, v10 :: v_dual_cndmask_b32 v25, v39, v9
.LBB2_16:                               ;   Parent Loop BB2_4 Depth=1
                                        ;     Parent Loop BB2_15 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_add_i32 s6, s6, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s6, 1
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s6, 2
	v_dual_cndmask_b32 v38, v12, v14 :: v_dual_cndmask_b32 v39, v2, v4
	v_cndmask_b32_e32 v40, v1, v3, vcc_lo
	s_cselect_b32 s0, -1, 0
	s_cmp_eq_u32 s6, 3
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e64 v38, v38, v16, s0
	v_cndmask_b32_e64 v39, v39, v6, s0
	v_cndmask_b32_e64 v40, v40, v5, s0
	s_cselect_b32 s1, -1, 0
	s_cmp_eq_u32 s6, 4
	v_cndmask_b32_e64 v38, v38, v18, s1
	v_cndmask_b32_e64 v41, v39, v8, s1
	v_cndmask_b32_e64 v40, v40, v7, s1
	s_cselect_b32 s2, -1, 0
	s_cmp_gt_u32 s6, 3
	v_cndmask_b32_e64 v39, v38, v20, s2
	v_cndmask_b32_e64 v41, v41, v10, s2
	v_cndmask_b32_e64 v40, v40, v9, s2
	v_cndmask_b32_e32 v38, v11, v13, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[40:41], v[25:26], -v[40:41]
	v_cndmask_b32_e64 v38, v38, v15, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v38, v38, v17, s1
	v_cndmask_b32_e64 v38, v38, v19, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[38:39], v[23:24], -v[38:39]
	v_mul_f64 v[40:41], v[40:41], v[40:41]
	v_fma_f64 v[38:39], v[38:39], v[38:39], v[40:41]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_lt_f64_e32 vcc_lo, v[21:22], v[38:39]
	v_dual_cndmask_b32 v22, v22, v39 :: v_dual_cndmask_b32 v21, v21, v38
	s_cbranch_scc0 .LBB2_16
; %bb.17:                               ; %.loopexit.i.i.i56.i
                                        ;   in Loop: Header=BB2_15 Depth=2
	s_add_i32 s3, s3, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s3, 4
	s_cbranch_scc1 .LBB2_15
; %bb.18:                               ;   in Loop: Header=BB2_4 Depth=1
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[21:22]
	s_add_i32 s76, s76, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	s_cmp_eq_u32 s76, 0x10000
	v_cndmask_b32_e64 v23, 0, 1, vcc_lo
	v_lshlrev_b32_e32 v23, 8, v23
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[21:22], v[21:22], v23
	v_rsq_f64_e32 v[23:24], v[21:22]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[25:26], v[21:22], v[23:24]
	v_mul_f64 v[23:24], v[23:24], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[38:39], -v[23:24], v[25:26], 0.5
	v_fma_f64 v[25:26], v[25:26], v[38:39], v[25:26]
	v_fma_f64 v[23:24], v[23:24], v[38:39], v[23:24]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[38:39], -v[25:26], v[25:26], v[21:22]
	v_fma_f64 v[25:26], v[38:39], v[23:24], v[25:26]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[38:39], -v[25:26], v[25:26], v[21:22]
	v_fma_f64 v[23:24], v[38:39], v[23:24], v[25:26]
	v_cndmask_b32_e64 v25, 0, 0xffffff80, vcc_lo
	v_cmp_class_f64_e64 vcc_lo, v[21:22], 0x260
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[23:24], v[23:24], v25
	v_dual_cndmask_b32 v22, v24, v22 :: v_dual_cndmask_b32 v21, v23, v21
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[27:28], v[27:28], v[21:22]
	s_cbranch_scc0 .LBB2_4
; %bb.19:                               ; %_ZNK6thrust11hip_rocprim26transform_input_iterator_tIdNS_17counting_iteratorIjNS_11use_defaultES3_S3_EE11estimate_esEixEl.exit.i59.i
	v_lshl_add_u32 v64, v66, 12, v66
	s_mov_b64 s[4:5], 0
                                        ; implicit-def: $vgpr36_vgpr37
                                        ; implicit-def: $vgpr31_vgpr32
                                        ; implicit-def: $vgpr33_vgpr34
                                        ; implicit-def: $vgpr38_vgpr39
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v1, 0x7ee55e16, v64
	v_lshrrev_b32_e32 v2, 19, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor3_b32 v1, v1, v2, 0xc761c23c
	v_lshl_add_u32 v1, v1, 5, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v2, 0xe9f8cc1d, v1
	v_lshl_add_u32 v1, v1, 9, 0xaccf6200
	v_xor_b32_e32 v1, v2, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v2, 3, v1
	v_add3_u32 v1, v1, v2, 0xfd7046c5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v2, 16, v1
	v_xor3_b32 v1, v1, v2, 0xb55a4f09
.LBB2_20:                               ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v2, 12, v1
	s_cmp_eq_u32 s4, 0
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s4, 1
	v_add3_u32 v1, v1, v2, 0x7ed55d16
	s_cselect_b32 s0, -1, 0
	s_cmp_eq_u32 s4, 2
	s_cselect_b32 s1, -1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v2, 19, v1
	s_cmp_eq_u32 s4, 3
	s_cselect_b32 s2, -1, 0
	s_add_u32 s4, s4, 1
	v_xor3_b32 v1, v1, v2, 0xc761c23c
	s_addc_u32 s5, s5, 0
	s_cmp_lg_u32 s4, 4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v1, v1, 5, v1
	v_add_nc_u32_e32 v2, 0xe9f8cc1d, v1
	v_lshl_add_u32 v1, v1, 9, 0xaccf6200
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v1, v2, v1
	v_lshlrev_b32_e32 v2, 3, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v1, v1, v2, 0xfd7046c5
	v_lshrrev_b32_e32 v2, 16, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor3_b32 v1, v1, v2, 0xb55a4f09
	v_lshlrev_b32_e32 v3, 12, v1
	v_xor_b32_e32 v2, s23, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add3_u32 v1, v1, v3, 0x7ed55d16
	v_cndmask_b32_e32 v37, v37, v2, vcc_lo
	v_cndmask_b32_e64 v32, v32, v2, s0
	v_cndmask_b32_e64 v34, v34, v2, s1
	v_cndmask_b32_e64 v39, v39, v2, s2
	v_lshrrev_b32_e32 v3, 19, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor3_b32 v1, v1, v3, 0xc761c23c
	v_lshl_add_u32 v1, v1, 5, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v3, 0xe9f8cc1d, v1
	v_lshl_add_u32 v1, v1, 9, 0xaccf6200
	v_xor_b32_e32 v1, v3, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v3, 3, v1
	v_add3_u32 v1, v1, v3, 0xfd7046c5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v3, 16, v1
	v_xor3_b32 v1, v1, v3, 0xb55a4f09
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v2, s22, v1
	v_cndmask_b32_e32 v36, v36, v2, vcc_lo
	v_cndmask_b32_e64 v31, v31, v2, s0
	v_cndmask_b32_e64 v33, v33, v2, s1
	v_cndmask_b32_e64 v38, v38, v2, s2
	s_cbranch_scc1 .LBB2_20
; %bb.21:                               ; %.preheader55.i.i.1.i64.i.preheader
	v_mov_b32_e32 v29, 0
	v_dual_mov_b32 v30, 0 :: v_dual_mov_b32 v35, 0
	s_mov_b32 s4, 0x54442d18
	s_mov_b32 s8, 0x33145c07
	s_mov_b32 s10, 0x6dc9c883
	s_mov_b32 s24, 0x33145c00
	s_mov_b32 s26, 0x252049c0
	s_mov_b32 s28, 0x55555555
	s_mov_b32 s30, 0x6b47b09a
	s_mov_b32 s34, 0xbf559e2b
	s_mov_b32 s36, 0xd7f4df2e
	s_mov_b32 s38, 0x16291751
	s_mov_b32 s40, 0x9b27acf1
	s_mov_b32 s42, 0x998ef7b6
	s_mov_b32 s44, 0xfefa39ef
	s_mov_b32 s46, 0x3b39803f
	s_mov_b32 s48, 0x9037ab78
	s_mov_b32 s50, 0x46cc5e42
	s_mov_b32 s52, 0xa17f65f6
	s_mov_b32 s54, 0x19f4ec90
	s_mov_b32 s56, 0x16c16967
	s_mov_b32 s58, 0xb42fdfa7
	s_mov_b32 s60, 0xf9a43bb8
	s_mov_b32 s62, 0x796cde01
	s_mov_b32 s64, 0x19e83e5c
	s_mov_b32 s66, 0x11110bb3
	s_mov_b32 s74, 0
	s_mov_b32 s5, 0x401921fb
	s_mov_b32 s7, 0x3ff921fb
	s_mov_b32 s9, 0x3c91a626
	s_mov_b32 s11, 0x3fe45f30
	s_mov_b32 s13, 0xbff921fb
	s_mov_b32 s25, 0xbc91a626
	s_mov_b32 s27, 0xb97b839a
	s_mov_b32 s29, 0x3fe55555
	s_mov_b32 s31, 0x3fc38538
	s_mov_b32 s35, 0x3fc3ab76
	s_mov_b32 s37, 0x3fc7474d
	s_mov_b32 s39, 0x3fcc71c0
	s_mov_b32 s41, 0x3fd24924
	s_mov_b32 s43, 0x3fd99999
	s_mov_b32 s45, 0x3fe62e42
	s_mov_b32 s47, 0x3c7abc9e
	s_mov_b32 s49, 0x3e21eeb6
	s_mov_b32 s51, 0xbda907db
	s_mov_b32 s53, 0xbe927e4f
	s_mov_b32 s55, 0x3efa01a0
	s_mov_b32 s57, 0xbf56c16c
	s_mov_b32 s59, 0xbe5ae600
	s_mov_b32 s61, 0x3de5e0b2
	s_mov_b32 s63, 0x3ec71de3
	s_mov_b32 s65, 0xbf2a01a0
	s_mov_b32 s67, 0x3f811111
	s_mov_b32 s68, 0x55555780
	s_mov_b32 s71, 0x3fa55555
	s_mov_b32 s73, 0xbfc55555
                                        ; implicit-def: $vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16
                                        ; implicit-def: $vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26
.LBB2_22:                               ; %.preheader55.i.i.1.i64.i
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB2_23 Depth 2
                                        ;     Child Loop BB2_33 Depth 2
                                        ;       Child Loop BB2_34 Depth 3
	v_dual_mov_b32 v21, v36 :: v_dual_mov_b32 v22, v37
	v_dual_mov_b32 v42, v39 :: v_dual_mov_b32 v41, v38
	s_mov_b32 s75, 0
.LBB2_23:                               ;   Parent Loop BB2_22 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v37, v32, v42
	v_xor_b32_e32 v36, v31, v41
                                        ; implicit-def: $vgpr57
                                        ; implicit-def: $vgpr39_vgpr40
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v55, v37, v22
	v_lshrrev_b64 v[23:24], 19, v[36:37]
	v_lshlrev_b32_e32 v25, 13, v36
	v_xor_b32_e32 v26, v36, v21
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_or_b32_e32 v56, v25, v24
	v_add_co_u32 v24, vcc_lo, v23, v26
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v25, vcc_lo, v56, v55, vcc_lo
	v_lshrrev_b64 v[24:25], 11, v[24:25]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_u32_e32 v[36:37], v25
	v_cvt_f64_u32_e32 v[24:25], v24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[36:37], v[36:37], 32
	v_add_f64 v[24:25], v[36:37], v[24:25]
                                        ; implicit-def: $vgpr37_vgpr38
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[24:25], v[24:25], 0xffffffcb
	v_mul_f64 v[24:25], v[24:25], s[4:5]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ngt_f64_e32 vcc_lo, 0x41d00000, v[24:25]
	v_trig_preop_f64 v[51:52], v[24:25], 0
	v_trig_preop_f64 v[49:50], v[24:25], 1
	v_ldexp_f64 v[53:54], v[24:25], 0xffffff80
	v_trig_preop_f64 v[47:48], v[24:25], 2
	s_and_saveexec_b32 s0, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s2, exec_lo, s0
	s_cbranch_execz .LBB2_25
; %bb.24:                               ;   in Loop: Header=BB2_23 Depth=2
	v_cmp_le_f64_e64 s0, 0x7b000000, v[24:25]
	s_mov_b32 s6, s4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v38, v25, v54, s0
	v_cndmask_b32_e64 v37, v24, v53, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_f64 v[39:40], v[51:52], v[37:38]
	v_mul_f64 v[43:44], v[49:50], v[37:38]
	v_mul_f64 v[69:70], v[47:48], v[37:38]
	v_fma_f64 v[45:46], v[51:52], v[37:38], -v[39:40]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[71:72], v[49:50], v[37:38], -v[43:44]
	v_add_f64 v[57:58], v[43:44], v[45:46]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[59:60], v[57:58], -v[43:44]
	v_add_f64 v[67:68], v[39:40], v[57:58]
	v_add_f64 v[61:62], v[57:58], -v[59:60]
	v_add_f64 v[45:46], v[45:46], -v[59:60]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[59:60], v[67:68], -2
	v_add_f64 v[39:40], v[67:68], -v[39:40]
	v_add_f64 v[43:44], v[43:44], -v[61:62]
	v_add_f64 v[61:62], v[69:70], v[71:72]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cmp_neq_f64_e64 s0, 0x7ff00000, |v[59:60]|
	v_add_f64 v[39:40], v[57:58], -v[39:40]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[43:44], v[45:46], v[43:44]
	v_fract_f64_e32 v[45:46], v[59:60]
	v_add_f64 v[57:58], v[61:62], v[43:44]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v46, 0, v46, s0
	v_cndmask_b32_e64 v45, 0, v45, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[45:46], v[45:46], 2
	v_add_f64 v[59:60], v[39:40], v[57:58]
	v_add_f64 v[73:74], v[57:58], -v[61:62]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[67:68], v[59:60], v[45:46]
	v_add_f64 v[79:80], v[57:58], -v[73:74]
	v_add_f64 v[43:44], v[43:44], -v[73:74]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cmp_gt_f64_e64 s0, 0, v[67:68]
	v_add_f64 v[67:68], v[61:62], -v[69:70]
	v_cndmask_b32_e64 v36, 0, 0x40100000, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[77:78], v[61:62], -v[67:68]
	v_add_f64 v[67:68], v[71:72], -v[67:68]
	v_add_f64 v[61:62], v[61:62], -v[79:80]
	v_add_f64 v[45:46], v[45:46], v[35:36]
	v_fma_f64 v[36:37], v[47:48], v[37:38], -v[69:70]
	v_add_f64 v[38:39], v[59:60], -v[39:40]
	v_add_f64 v[71:72], v[69:70], -v[77:78]
	v_add_f64 v[43:44], v[43:44], v[61:62]
	v_add_f64 v[75:76], v[59:60], v[45:46]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[38:39], v[57:58], -v[38:39]
	v_add_f64 v[67:68], v[67:68], v[71:72]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_i32_f64_e32 v63, v[75:76]
	v_add_f64 v[43:44], v[67:68], v[43:44]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_i32_e32 v[73:74], v63
	v_add_f64 v[36:37], v[36:37], v[43:44]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[45:46], v[45:46], -v[73:74]
	v_add_f64 v[37:38], v[38:39], v[36:37]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[61:62], v[59:60], v[45:46]
	v_add_f64 v[43:44], v[61:62], -v[45:46]
	v_cmp_le_f64_e64 s0, 0.5, v[61:62]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[39:40], v[59:60], -v[43:44]
	v_cndmask_b32_e64 v36, 0, 0x3ff00000, s0
	v_add_co_ci_u32_e64 v57, s1, 0, v63, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[37:38], v[37:38], v[39:40]
	v_add_f64 v[39:40], v[61:62], -v[35:36]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[43:44], v[39:40], v[37:38]
	v_mul_f64 v[45:46], v[43:44], s[6:7]
	v_add_f64 v[39:40], v[43:44], -v[39:40]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[58:59], v[43:44], s[6:7], -v[45:46]
	v_add_f64 v[36:37], v[37:38], -v[39:40]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[38:39], v[43:44], s[8:9], v[58:59]
	v_fma_f64 v[39:40], v[36:37], s[6:7], v[38:39]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[37:38], v[45:46], v[39:40]
	v_add_f64 v[43:44], v[37:38], -v[45:46]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[39:40], v[39:40], -v[43:44]
.LBB2_25:                               ; %Flow1203
                                        ;   in Loop: Header=BB2_23 Depth=2
	s_and_not1_saveexec_b32 s0, s2
	s_cbranch_execz .LBB2_27
; %bb.26:                               ;   in Loop: Header=BB2_23 Depth=2
	v_mul_f64 v[36:37], v[24:25], s[10:11]
	s_mov_b32 s12, s4
	s_mov_b32 s2, s24
	s_mov_b32 s3, s9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[43:44], v[36:37]
	v_fma_f64 v[36:37], v[43:44], s[12:13], v[24:25]
	v_mul_f64 v[38:39], v[43:44], s[24:25]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[57:58], v[43:44], s[24:25], v[36:37]
	v_add_f64 v[45:46], v[36:37], v[38:39]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[36:37], v[36:37], -v[45:46]
	v_add_f64 v[45:46], v[45:46], -v[57:58]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[36:37], v[36:37], v[38:39]
	v_fma_f64 v[38:39], v[43:44], s[2:3], v[38:39]
	v_add_f64 v[36:37], v[45:46], v[36:37]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[36:37], v[36:37], -v[38:39]
	v_fma_f64 v[39:40], v[43:44], s[26:27], v[36:37]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[37:38], v[57:58], v[39:40]
	v_add_f64 v[45:46], v[37:38], -v[57:58]
	v_cvt_i32_f64_e32 v57, v[43:44]
	s_delay_alu instid0(VALU_DEP_2)
	v_add_f64 v[39:40], v[39:40], -v[45:46]
.LBB2_27:                               ; %_ZL3cosd.exit.i.i.1.i74.i
                                        ;   in Loop: Header=BB2_23 Depth=2
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $vgpr58
                                        ; implicit-def: $vgpr43_vgpr44
                                        ; implicit-def: $vgpr45_vgpr46
	s_and_saveexec_b32 s0, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s1, exec_lo, s0
	s_cbranch_execz .LBB2_29
; %bb.28:                               ;   in Loop: Header=BB2_23 Depth=2
	v_cmp_le_f64_e32 vcc_lo, 0x7b000000, v[24:25]
	s_mov_b32 s6, s4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v44, v25, v54 :: v_dual_cndmask_b32 v43, v24, v53
	v_mul_f64 v[45:46], v[51:52], v[43:44]
	v_mul_f64 v[53:54], v[49:50], v[43:44]
	v_mul_f64 v[69:70], v[47:48], v[43:44]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[51:52], v[51:52], v[43:44], -v[45:46]
	v_fma_f64 v[49:50], v[49:50], v[43:44], -v[53:54]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[43:44], v[47:48], v[43:44], -v[69:70]
	v_add_f64 v[58:59], v[53:54], v[51:52]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[60:61], v[58:59], -v[53:54]
	v_add_f64 v[67:68], v[45:46], v[58:59]
	v_add_f64 v[62:63], v[58:59], -v[60:61]
	v_add_f64 v[51:52], v[51:52], -v[60:61]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[60:61], v[67:68], -2
	v_add_f64 v[45:46], v[67:68], -v[45:46]
	v_add_f64 v[53:54], v[53:54], -v[62:63]
	v_add_f64 v[62:63], v[69:70], v[49:50]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[60:61]|
	v_add_f64 v[45:46], v[58:59], -v[45:46]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[51:52], v[51:52], v[53:54]
	v_fract_f64_e32 v[53:54], v[60:61]
	v_add_f64 v[58:59], v[62:63], v[51:52]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v54, 0, v54 :: v_dual_cndmask_b32 v53, 0, v53
	v_ldexp_f64 v[53:54], v[53:54], 2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[60:61], v[45:46], v[58:59]
	v_add_f64 v[71:72], v[58:59], -v[62:63]
	v_add_f64 v[67:68], v[60:61], v[53:54]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[77:78], v[58:59], -v[71:72]
	v_add_f64 v[51:52], v[51:52], -v[71:72]
	v_add_f64 v[45:46], v[60:61], -v[45:46]
	v_cmp_gt_f64_e32 vcc_lo, 0, v[67:68]
	v_add_f64 v[67:68], v[62:63], -v[69:70]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[45:46], v[58:59], -v[45:46]
	v_cndmask_b32_e64 v36, 0, 0x40100000, vcc_lo
	v_add_f64 v[75:76], v[62:63], -v[67:68]
	v_add_f64 v[49:50], v[49:50], -v[67:68]
	v_add_f64 v[62:63], v[62:63], -v[77:78]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[53:54], v[53:54], v[35:36]
	v_add_f64 v[67:68], v[69:70], -v[75:76]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[51:52], v[51:52], v[62:63]
	v_add_f64 v[73:74], v[60:61], v[53:54]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[49:50], v[49:50], v[67:68]
	v_cvt_i32_f64_e32 v36, v[73:74]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[47:48], v[49:50], v[51:52]
	v_cvt_f64_i32_e32 v[71:72], v36
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[43:44], v[43:44], v[47:48]
	v_add_f64 v[53:54], v[53:54], -v[71:72]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[43:44], v[45:46], v[43:44]
	v_add_f64 v[49:50], v[60:61], v[53:54]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[47:48], v[49:50], -v[53:54]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[49:50]
	v_add_f64 v[45:46], v[60:61], -v[47:48]
	v_add_co_ci_u32_e64 v58, s0, 0, v36, vcc_lo
	v_cndmask_b32_e64 v36, 0, 0x3ff00000, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[43:44], v[43:44], v[45:46]
	v_add_f64 v[45:46], v[49:50], -v[35:36]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[47:48], v[45:46], v[43:44]
	v_mul_f64 v[49:50], v[47:48], s[6:7]
	v_add_f64 v[45:46], v[47:48], -v[45:46]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[51:52], v[47:48], s[6:7], -v[49:50]
	v_add_f64 v[43:44], v[43:44], -v[45:46]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[45:46], v[47:48], s[8:9], v[51:52]
	v_fma_f64 v[45:46], v[43:44], s[6:7], v[45:46]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[43:44], v[49:50], v[45:46]
	v_add_f64 v[47:48], v[43:44], -v[49:50]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[45:46], v[45:46], -v[47:48]
.LBB2_29:                               ; %Flow1202
                                        ;   in Loop: Header=BB2_23 Depth=2
	s_and_not1_saveexec_b32 s0, s1
	s_cbranch_execz .LBB2_31
; %bb.30:                               ;   in Loop: Header=BB2_23 Depth=2
	v_mul_f64 v[43:44], v[24:25], s[10:11]
	s_mov_b32 s12, s4
	s_mov_b32 s2, s24
	s_mov_b32 s3, s9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[47:48], v[43:44]
	v_fma_f64 v[43:44], v[47:48], s[12:13], v[24:25]
	v_mul_f64 v[45:46], v[47:48], s[24:25]
	v_cvt_i32_f64_e32 v58, v[47:48]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[51:52], v[47:48], s[24:25], v[43:44]
	v_add_f64 v[49:50], v[43:44], v[45:46]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[43:44], v[43:44], -v[49:50]
	v_add_f64 v[49:50], v[49:50], -v[51:52]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[43:44], v[43:44], v[45:46]
	v_fma_f64 v[45:46], v[47:48], s[2:3], v[45:46]
	v_add_f64 v[43:44], v[49:50], v[43:44]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[43:44], v[43:44], -v[45:46]
	v_fma_f64 v[45:46], v[47:48], s[26:27], v[43:44]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[43:44], v[51:52], v[45:46]
	v_add_f64 v[49:50], v[43:44], -v[51:52]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[45:46], v[45:46], -v[49:50]
.LBB2_31:                               ; %_ZL3sind.exit.i.i.1.i79.i
                                        ;   in Loop: Header=BB2_23 Depth=2
	s_or_b32 exec_lo, exec_lo, s0
	v_add_co_u32 v41, vcc_lo, v41, v21
	v_add_co_ci_u32_e32 v42, vcc_lo, v42, v22, vcc_lo
	s_mov_b32 s69, s29
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_f64 v[79:80], v[39:40], 0.5
	v_mul_f64 v[87:88], v[45:46], 0.5
	s_delay_alu instid0(VALU_DEP_3)
	v_lshrrev_b64 v[41:42], 11, v[41:42]
	s_mov_b32 s70, s28
	s_mov_b32 s72, s28
	v_cmp_lg_f64_e64 s0, 0x7ff00000, v[24:25]
	s_cmp_eq_u32 s75, 4
	v_xor_b32_e32 v34, v34, v22
	v_cvt_f64_u32_e32 v[47:48], v42
	v_cvt_f64_u32_e32 v[41:42], v41
	v_xor_b32_e32 v33, v33, v21
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[47:48], v[47:48], 32
	v_add_f64 v[41:42], v[47:48], v[41:42]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[41:42], v[41:42], 0xffffffcb
	v_frexp_mant_f64_e32 v[47:48], v[41:42]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f64_e32 vcc_lo, s[28:29], v[47:48]
	v_cndmask_b32_e64 v36, 0, 1, vcc_lo
	v_ldexp_f64 v[47:48], v[47:48], v36
	v_frexp_exp_i32_f64_e32 v36, v[41:42]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[49:50], v[47:48], 1.0
	v_add_f64 v[59:60], v[47:48], -1.0
	v_subrev_co_ci_u32_e32 v36, vcc_lo, 0, v36, vcc_lo
	v_cmp_eq_f64_e32 vcc_lo, 0x7ff00000, v[41:42]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[51:52], v[49:50]
	v_add_f64 v[61:62], v[49:50], -1.0
	v_add_f64 v[47:48], v[47:48], -v[61:62]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[53:54], -v[49:50], v[51:52], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[51:52], v[53:54], v[51:52], v[51:52]
	v_fma_f64 v[53:54], -v[49:50], v[51:52], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[51:52], v[53:54], v[51:52], v[51:52]
	v_mul_f64 v[53:54], v[59:60], v[51:52]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[67:68], v[49:50], v[53:54]
	v_fma_f64 v[49:50], v[53:54], v[49:50], -v[67:68]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[47:48], v[53:54], v[47:48], v[49:50]
	v_add_f64 v[49:50], v[67:68], v[47:48]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[61:62], v[59:60], -v[49:50]
	v_add_f64 v[67:68], v[49:50], -v[67:68]
	v_add_f64 v[59:60], v[59:60], -v[61:62]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[47:48], v[67:68], -v[47:48]
	v_add_f64 v[49:50], v[59:60], -v[49:50]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[47:48], v[47:48], v[49:50]
	v_add_f64 v[47:48], v[61:62], v[47:48]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[47:48], v[51:52], v[47:48]
	v_add_f64 v[49:50], v[53:54], v[47:48]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[51:52], v[49:50], v[49:50]
	v_fma_f64 v[59:60], v[51:52], s[34:35], s[30:31]
	v_mul_f64 v[61:62], v[49:50], v[51:52]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[59:60], v[51:52], v[59:60], s[36:37]
	v_fma_f64 v[59:60], v[51:52], v[59:60], s[38:39]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[59:60], v[51:52], v[59:60], s[40:41]
	v_fma_f64 v[59:60], v[51:52], v[59:60], s[42:43]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[51:52], v[51:52], v[59:60], s[68:69]
	v_ldexp_f64 v[59:60], v[49:50], 1
	v_add_f64 v[49:50], v[49:50], -v[53:54]
	v_mul_f64 v[51:52], v[61:62], v[51:52]
	v_cvt_f64_i32_e32 v[61:62], v36
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[47:48], v[47:48], -v[49:50]
	v_add_f64 v[53:54], v[59:60], v[51:52]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[67:68], v[61:62], s[44:45]
	v_ldexp_f64 v[47:48], v[47:48], 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[49:50], v[53:54], -v[59:60]
	v_fma_f64 v[59:60], v[61:62], s[44:45], -v[67:68]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[49:50], v[51:52], -v[49:50]
	v_fma_f64 v[51:52], v[61:62], s[46:47], v[59:60]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[47:48], v[47:48], v[49:50]
	v_add_f64 v[49:50], v[67:68], v[51:52]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[59:60], v[53:54], v[47:48]
	v_add_f64 v[67:68], v[49:50], -v[67:68]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[61:62], v[49:50], v[59:60]
	v_add_f64 v[53:54], v[59:60], -v[53:54]
	v_add_f64 v[51:52], v[51:52], -v[67:68]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[69:70], v[61:62], -v[49:50]
	v_add_f64 v[47:48], v[47:48], -v[53:54]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[71:72], v[61:62], -v[69:70]
	v_add_f64 v[53:54], v[59:60], -v[69:70]
	v_add_f64 v[59:60], v[51:52], v[47:48]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[49:50], v[49:50], -v[71:72]
	v_add_f64 v[49:50], v[53:54], v[49:50]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[53:54], v[59:60], -v[51:52]
	v_add_f64 v[49:50], v[59:60], v[49:50]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[59:60], v[59:60], -v[53:54]
	v_add_f64 v[47:48], v[47:48], -v[53:54]
	v_add_f64 v[67:68], v[61:62], v[49:50]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[51:52], v[51:52], -v[59:60]
	v_add_f64 v[53:54], v[67:68], -v[61:62]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[47:48], v[47:48], v[51:52]
	v_mul_f64 v[51:52], v[43:44], v[43:44]
	v_add_f64 v[49:50], v[49:50], -v[53:54]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mul_f64 v[73:74], v[51:52], 0.5
	v_fma_f64 v[75:76], v[51:52], s[50:51], s[48:49]
	v_add_f64 v[47:48], v[47:48], v[49:50]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[85:86], -v[73:74], 1.0
	v_fma_f64 v[75:76], v[51:52], v[75:76], s[52:53]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[47:48], v[67:68], v[47:48]
	v_fma_f64 v[67:68], v[51:52], s[60:61], s[58:59]
	v_fma_f64 v[75:76], v[51:52], v[75:76], s[54:55]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_dual_cndmask_b32 v48, v48, v42 :: v_dual_cndmask_b32 v47, v47, v41
	v_cmp_ngt_f64_e32 vcc_lo, 0, v[41:42]
	v_fma_f64 v[67:68], v[51:52], v[67:68], s[62:63]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[75:76], v[51:52], v[75:76], s[56:57]
	v_mul_f64 v[47:48], v[47:48], -2.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[67:68], v[51:52], v[67:68], s[64:65]
	v_cndmask_b32_e32 v36, 0x7ff80000, v48, vcc_lo
	v_cmp_nge_f64_e32 vcc_lo, 0, v[41:42]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_fma_f64 v[67:68], v[51:52], v[67:68], s[66:67]
	v_cndmask_b32_e32 v47, 0, v47, vcc_lo
	v_cmp_neq_f64_e32 vcc_lo, 0, v[41:42]
	v_mul_f64 v[41:42], v[37:38], v[37:38]
	v_cndmask_b32_e32 v48, 0x7ff00000, v36, vcc_lo
	v_fma_f64 v[49:50], v[41:42], s[60:61], s[58:59]
	v_mul_f64 v[59:60], v[41:42], 0.5
	v_fma_f64 v[61:62], v[41:42], s[50:51], s[48:49]
	v_mul_f64 v[81:82], v[37:38], -v[41:42]
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[47:48]
	v_fma_f64 v[49:50], v[41:42], v[49:50], s[62:63]
	v_add_f64 v[71:72], -v[59:60], 1.0
	v_fma_f64 v[61:62], v[41:42], v[61:62], s[52:53]
	v_cndmask_b32_e64 v36, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v36, 8, v36
	v_ldexp_f64 v[47:48], v[47:48], v36
	v_fma_f64 v[49:50], v[41:42], v[49:50], s[64:65]
	v_add_f64 v[83:84], -v[71:72], 1.0
	v_fma_f64 v[61:62], v[41:42], v[61:62], s[54:55]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_rsq_f64_e32 v[53:54], v[47:48]
	v_cmp_class_f64_e64 s1, v[47:48], 0x260
	v_fma_f64 v[49:50], v[41:42], v[49:50], s[66:67]
	s_delay_alu instid0(VALU_DEP_4)
	v_add_f64 v[59:60], v[83:84], -v[59:60]
	v_add_f64 v[83:84], -v[85:86], 1.0
	v_fma_f64 v[61:62], v[41:42], v[61:62], s[56:57]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[69:70], v[47:48], v[53:54]
	v_mul_f64 v[53:54], v[53:54], 0.5
	v_fma_f64 v[49:50], v[81:82], v[49:50], v[79:80]
	v_mul_f64 v[79:80], v[43:44], -v[51:52]
	v_add_f64 v[73:74], v[83:84], -v[73:74]
	v_mul_f64 v[83:84], v[41:42], v[41:42]
	v_fma_f64 v[61:62], v[41:42], v[61:62], s[70:71]
	v_fma_f64 v[59:60], v[37:38], -v[39:40], v[59:60]
	v_fma_f64 v[77:78], -v[53:54], v[69:70], 0.5
	v_fma_f64 v[39:40], v[41:42], v[49:50], -v[39:40]
	v_fma_f64 v[67:68], v[79:80], v[67:68], v[87:88]
	v_mul_f64 v[49:50], v[51:52], v[51:52]
	v_fma_f64 v[73:74], v[43:44], -v[45:46], v[73:74]
	v_fma_f64 v[69:70], v[69:70], v[77:78], v[69:70]
	v_fma_f64 v[53:54], v[53:54], v[77:78], v[53:54]
	v_fma_f64 v[39:40], v[81:82], s[72:73], v[39:40]
	v_fma_f64 v[45:46], v[51:52], v[67:68], -v[45:46]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[77:78], -v[69:70], v[69:70], v[47:48]
	v_add_f64 v[36:37], v[37:38], -v[39:40]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[45:46], v[79:80], s[72:73], v[45:46]
	v_fma_f64 v[41:42], v[77:78], v[53:54], v[69:70]
	v_fma_f64 v[69:70], v[51:52], v[75:76], s[70:71]
	v_fma_f64 v[51:52], v[83:84], v[61:62], v[59:60]
	v_xor_b32_e32 v37, 0x80000000, v37
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[59:60], -v[41:42], v[41:42], v[47:48]
	v_fma_f64 v[49:50], v[49:50], v[69:70], v[73:74]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[51:52], v[71:72], v[51:52]
	v_fma_f64 v[38:39], v[59:60], v[53:54], v[41:42]
	s_delay_alu instid0(VALU_DEP_3)
	v_add_f64 v[40:41], v[85:86], v[49:50]
	v_add_f64 v[42:43], v[43:44], -v[45:46]
	v_and_b32_e32 v45, 1, v58
	v_cndmask_b32_e64 v49, 0, 0xffffff80, vcc_lo
	v_and_b32_e32 v53, 1, v57
	v_lshlrev_b32_e32 v44, 30, v58
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_eq_u32_e32 vcc_lo, 0, v53
	v_xor_b32_e32 v25, v44, v25
	v_dual_cndmask_b32 v36, v36, v51 :: v_dual_cndmask_b32 v37, v37, v52
	v_cmp_eq_u32_e32 vcc_lo, 0, v45
	v_lshlrev_b32_e32 v24, 30, v57
	v_ldexp_f64 v[38:39], v[38:39], v49
	s_delay_alu instid0(VALU_DEP_2)
	v_dual_cndmask_b32 v41, v41, v43 :: v_dual_and_b32 v24, 0x80000000, v24
	v_cndmask_b32_e32 v40, v40, v42, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	v_and_b32_e32 v44, 0x80000000, v25
	s_cmp_eq_u32 s75, 3
	v_xor_b32_e32 v37, v37, v24
	v_cndmask_b32_e64 v24, 0, v36, s0
	v_cndmask_b32_e64 v21, 0, v40, s0
	s_delay_alu instid0(VALU_DEP_3)
	v_cndmask_b32_e64 v25, 0x7ff80000, v37, s0
	v_cndmask_b32_e64 v37, v39, v48, s1
	v_cndmask_b32_e64 v36, v38, v47, s1
	v_lshlrev_b64 v[38:39], 17, v[31:32]
	v_xor_b32_e32 v32, v34, v32
	v_xor_b32_e32 v31, v33, v31
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[24:25], v[36:37], v[24:25]
	v_cndmask_b32_e32 v19, v19, v24, vcc_lo
	v_xor_b32_e32 v41, v41, v44
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v20, v20, v25, vcc_lo
	v_cndmask_b32_e64 v22, 0x7ff80000, v41, s0
	s_cselect_b32 s0, -1, 0
	s_cmp_eq_u32 s75, 2
	v_cndmask_b32_e64 v18, v18, v25, s0
	s_cselect_b32 s1, -1, 0
	v_mul_f64 v[40:41], v[36:37], v[21:22]
	v_xor_b32_e32 v22, v32, v56
	v_xor_b32_e32 v21, v31, v23
	v_xor_b32_e32 v36, v34, v39
	v_xor_b32_e32 v37, v33, v38
	v_lshlrev_b64 v[33:34], 17, v[31:32]
	s_cmp_eq_u32 s75, 1
	v_lshrrev_b64 v[38:39], 19, v[21:22]
	v_xor_b32_e32 v23, v36, v55
	v_xor_b32_e32 v42, v37, v26
	v_xor_b32_e32 v36, v21, v26
	v_lshlrev_b32_e32 v26, 13, v21
	v_xor_b32_e32 v37, v22, v55
	s_cselect_b32 s2, -1, 0
	s_cmp_eq_u32 s75, 0
	v_xor_b32_e32 v31, v42, v31
	s_cselect_b32 s3, -1, 0
	v_xor_b32_e32 v33, v42, v33
	v_mov_b32_e32 v21, v36
	v_xor_b32_e32 v32, v23, v32
	v_xor_b32_e32 v34, v23, v34
	v_mov_b32_e32 v22, v37
	v_cndmask_b32_e64 v17, v17, v24, s0
	v_cndmask_b32_e64 v16, v16, v25, s1
	v_cndmask_b32_e64 v15, v15, v24, s1
	v_cndmask_b32_e64 v14, v14, v25, s2
	v_cndmask_b32_e64 v13, v13, v24, s2
	v_cndmask_b32_e64 v12, v12, v25, s3
	v_cndmask_b32_e64 v11, v11, v24, s3
	s_add_i32 s75, s75, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s75, 5
	v_cndmask_b32_e32 v9, v9, v40, vcc_lo
	v_or_b32_e32 v39, v26, v39
	v_cndmask_b32_e32 v10, v10, v41, vcc_lo
	v_cndmask_b32_e64 v8, v8, v41, s0
	v_cndmask_b32_e64 v6, v6, v41, s1
	v_cndmask_b32_e64 v4, v4, v41, s2
	v_cndmask_b32_e64 v2, v2, v41, s3
	v_mov_b32_e32 v42, v39
	v_cndmask_b32_e64 v7, v7, v40, s0
	v_cndmask_b32_e64 v5, v5, v40, s1
	v_cndmask_b32_e64 v3, v3, v40, s2
	v_cndmask_b32_e64 v1, v1, v40, s3
	v_mov_b32_e32 v41, v38
	s_cbranch_scc1 .LBB2_23
; %bb.32:                               ; %.lr.ph.i.i.1.i86.i.preheader
                                        ;   in Loop: Header=BB2_22 Depth=1
	v_mov_b32_e32 v21, 0
	v_mov_b32_e32 v22, 0
	s_mov_b32 s3, 0
.LBB2_33:                               ; %.lr.ph.i.i.1.i86.i
                                        ;   Parent Loop BB2_22 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB2_34 Depth 3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s3, 1
	s_mov_b32 s6, s3
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s3, 2
	v_dual_cndmask_b32 v23, v12, v14 :: v_dual_cndmask_b32 v24, v11, v13
	v_dual_cndmask_b32 v25, v2, v4 :: v_dual_cndmask_b32 v26, v1, v3
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s3, 3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v23, v23, v16 :: v_dual_cndmask_b32 v24, v24, v15
	v_dual_cndmask_b32 v25, v25, v6 :: v_dual_cndmask_b32 v26, v26, v5
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s3, 4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v23, v23, v18 :: v_dual_cndmask_b32 v40, v24, v17
	v_cndmask_b32_e32 v25, v25, v8, vcc_lo
	v_cndmask_b32_e32 v41, v26, v7, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_cndmask_b32 v24, v23, v20 :: v_dual_cndmask_b32 v23, v40, v19
	v_cndmask_b32_e32 v26, v25, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_cndmask_b32_e32 v25, v41, v9, vcc_lo
.LBB2_34:                               ;   Parent Loop BB2_22 Depth=1
                                        ;     Parent Loop BB2_33 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_add_i32 s6, s6, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s6, 1
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s6, 2
	v_dual_cndmask_b32 v40, v12, v14 :: v_dual_cndmask_b32 v41, v2, v4
	v_cndmask_b32_e32 v42, v1, v3, vcc_lo
	s_cselect_b32 s0, -1, 0
	s_cmp_eq_u32 s6, 3
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e64 v40, v40, v16, s0
	v_cndmask_b32_e64 v41, v41, v6, s0
	v_cndmask_b32_e64 v42, v42, v5, s0
	s_cselect_b32 s1, -1, 0
	s_cmp_eq_u32 s6, 4
	v_cndmask_b32_e64 v40, v40, v18, s1
	v_cndmask_b32_e64 v43, v41, v8, s1
	v_cndmask_b32_e64 v42, v42, v7, s1
	s_cselect_b32 s2, -1, 0
	s_cmp_lt_u32 s6, 4
	v_cndmask_b32_e64 v41, v40, v20, s2
	v_cndmask_b32_e64 v43, v43, v10, s2
	v_cndmask_b32_e64 v42, v42, v9, s2
	v_cndmask_b32_e32 v40, v11, v13, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[42:43], v[25:26], -v[42:43]
	v_cndmask_b32_e64 v40, v40, v15, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v40, v40, v17, s1
	v_cndmask_b32_e64 v40, v40, v19, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[40:41], v[23:24], -v[40:41]
	v_mul_f64 v[42:43], v[42:43], v[42:43]
	v_fma_f64 v[40:41], v[40:41], v[40:41], v[42:43]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_lt_f64_e32 vcc_lo, v[21:22], v[40:41]
	v_dual_cndmask_b32 v22, v22, v41 :: v_dual_cndmask_b32 v21, v21, v40
	s_cbranch_scc1 .LBB2_34
; %bb.35:                               ; %.loopexit.i.i.1.i92.i
                                        ;   in Loop: Header=BB2_33 Depth=2
	s_add_i32 s3, s3, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s3, 4
	s_cbranch_scc1 .LBB2_33
; %bb.36:                               ;   in Loop: Header=BB2_22 Depth=1
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[21:22]
	s_add_i32 s74, s74, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	s_cmp_lg_u32 s74, 0x10000
	v_cndmask_b32_e64 v23, 0, 1, vcc_lo
	v_lshlrev_b32_e32 v23, 8, v23
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[21:22], v[21:22], v23
	v_rsq_f64_e32 v[23:24], v[21:22]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[25:26], v[21:22], v[23:24]
	v_mul_f64 v[23:24], v[23:24], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[40:41], -v[23:24], v[25:26], 0.5
	v_fma_f64 v[25:26], v[25:26], v[40:41], v[25:26]
	v_fma_f64 v[23:24], v[23:24], v[40:41], v[23:24]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[40:41], -v[25:26], v[25:26], v[21:22]
	v_fma_f64 v[25:26], v[40:41], v[23:24], v[25:26]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[40:41], -v[25:26], v[25:26], v[21:22]
	v_fma_f64 v[23:24], v[40:41], v[23:24], v[25:26]
	v_cndmask_b32_e64 v25, 0, 0xffffff80, vcc_lo
	v_cmp_class_f64_e64 vcc_lo, v[21:22], 0x260
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[23:24], v[23:24], v25
	v_dual_cndmask_b32 v22, v24, v22 :: v_dual_cndmask_b32 v21, v23, v21
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[29:30], v[29:30], v[21:22]
	s_cbranch_scc1 .LBB2_22
; %bb.37:                               ; %_ZNK6thrust11hip_rocprim26transform_input_iterator_tIdNS_17counting_iteratorIjNS_11use_defaultES3_S3_EE11estimate_esEixEl.exit.1.i95.i
	v_add_nc_u32_e32 v1, 0x7ef55f16, v64
	s_mov_b64 s[4:5], 0
                                        ; implicit-def: $vgpr38_vgpr39
                                        ; implicit-def: $vgpr33_vgpr34
                                        ; implicit-def: $vgpr35_vgpr36
                                        ; implicit-def: $vgpr40_vgpr41
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v2, 19, v1
	v_xor3_b32 v1, v1, v2, 0xc761c23c
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v1, v1, 5, v1
	v_add_nc_u32_e32 v2, 0xe9f8cc1d, v1
	v_lshl_add_u32 v1, v1, 9, 0xaccf6200
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v1, v2, v1
	v_lshlrev_b32_e32 v2, 3, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v1, v1, v2, 0xfd7046c5
	v_lshrrev_b32_e32 v2, 16, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_xor3_b32 v1, v1, v2, 0xb55a4f09
.LBB2_38:                               ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v2, 12, v1
	s_cmp_eq_u32 s4, 0
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s4, 1
	v_add3_u32 v1, v1, v2, 0x7ed55d16
	s_cselect_b32 s0, -1, 0
	s_cmp_eq_u32 s4, 2
	s_cselect_b32 s1, -1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v2, 19, v1
	s_cmp_eq_u32 s4, 3
	s_cselect_b32 s2, -1, 0
	s_add_u32 s4, s4, 1
	v_xor3_b32 v1, v1, v2, 0xc761c23c
	s_addc_u32 s5, s5, 0
	s_cmp_lg_u32 s4, 4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v1, v1, 5, v1
	v_add_nc_u32_e32 v2, 0xe9f8cc1d, v1
	v_lshl_add_u32 v1, v1, 9, 0xaccf6200
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v1, v2, v1
	v_lshlrev_b32_e32 v2, 3, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v1, v1, v2, 0xfd7046c5
	v_lshrrev_b32_e32 v2, 16, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor3_b32 v1, v1, v2, 0xb55a4f09
	v_lshlrev_b32_e32 v3, 12, v1
	v_xor_b32_e32 v2, s23, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add3_u32 v1, v1, v3, 0x7ed55d16
	v_cndmask_b32_e32 v39, v39, v2, vcc_lo
	v_cndmask_b32_e64 v34, v34, v2, s0
	v_cndmask_b32_e64 v36, v36, v2, s1
	v_cndmask_b32_e64 v41, v41, v2, s2
	v_lshrrev_b32_e32 v3, 19, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor3_b32 v1, v1, v3, 0xc761c23c
	v_lshl_add_u32 v1, v1, 5, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v3, 0xe9f8cc1d, v1
	v_lshl_add_u32 v1, v1, 9, 0xaccf6200
	v_xor_b32_e32 v1, v3, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v3, 3, v1
	v_add3_u32 v1, v1, v3, 0xfd7046c5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v3, 16, v1
	v_xor3_b32 v1, v1, v3, 0xb55a4f09
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v2, s22, v1
	v_cndmask_b32_e32 v38, v38, v2, vcc_lo
	v_cndmask_b32_e64 v33, v33, v2, s0
	v_cndmask_b32_e64 v35, v35, v2, s1
	v_cndmask_b32_e64 v40, v40, v2, s2
	s_cbranch_scc1 .LBB2_38
; %bb.39:                               ; %.preheader55.i.i.2.i100.i.preheader
	v_mov_b32_e32 v31, 0
	v_dual_mov_b32 v32, 0 :: v_dual_mov_b32 v37, 0
	s_mov_b32 s4, 0x54442d18
	s_mov_b32 s8, 0x33145c07
	s_mov_b32 s10, 0x6dc9c883
	s_mov_b32 s24, 0x33145c00
	s_mov_b32 s26, 0x252049c0
	s_mov_b32 s28, 0x55555555
	s_mov_b32 s30, 0x6b47b09a
	s_mov_b32 s34, 0xbf559e2b
	s_mov_b32 s36, 0xd7f4df2e
	s_mov_b32 s38, 0x16291751
	s_mov_b32 s40, 0x9b27acf1
	s_mov_b32 s42, 0x998ef7b6
	s_mov_b32 s44, 0xfefa39ef
	s_mov_b32 s46, 0x3b39803f
	s_mov_b32 s48, 0x9037ab78
	s_mov_b32 s50, 0x46cc5e42
	s_mov_b32 s52, 0xa17f65f6
	s_mov_b32 s54, 0x19f4ec90
	s_mov_b32 s56, 0x16c16967
	s_mov_b32 s58, 0xb42fdfa7
	s_mov_b32 s60, 0xf9a43bb8
	s_mov_b32 s62, 0x796cde01
	s_mov_b32 s64, 0x19e83e5c
	s_mov_b32 s66, 0x11110bb3
	s_mov_b32 s74, 0
	s_mov_b32 s5, 0x401921fb
	s_mov_b32 s7, 0x3ff921fb
	s_mov_b32 s9, 0x3c91a626
	s_mov_b32 s11, 0x3fe45f30
	s_mov_b32 s13, 0xbff921fb
	s_mov_b32 s25, 0xbc91a626
	s_mov_b32 s27, 0xb97b839a
	s_mov_b32 s29, 0x3fe55555
	s_mov_b32 s31, 0x3fc38538
	s_mov_b32 s35, 0x3fc3ab76
	s_mov_b32 s37, 0x3fc7474d
	s_mov_b32 s39, 0x3fcc71c0
	s_mov_b32 s41, 0x3fd24924
	s_mov_b32 s43, 0x3fd99999
	s_mov_b32 s45, 0x3fe62e42
	s_mov_b32 s47, 0x3c7abc9e
	s_mov_b32 s49, 0x3e21eeb6
	s_mov_b32 s51, 0xbda907db
	s_mov_b32 s53, 0xbe927e4f
	s_mov_b32 s55, 0x3efa01a0
	s_mov_b32 s57, 0xbf56c16c
	s_mov_b32 s59, 0xbe5ae600
	s_mov_b32 s61, 0x3de5e0b2
	s_mov_b32 s63, 0x3ec71de3
	s_mov_b32 s65, 0xbf2a01a0
	s_mov_b32 s67, 0x3f811111
	s_mov_b32 s68, 0x55555780
	s_mov_b32 s71, 0x3fa55555
	s_mov_b32 s73, 0xbfc55555
                                        ; implicit-def: $vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16
                                        ; implicit-def: $vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26
.LBB2_40:                               ; %.preheader55.i.i.2.i100.i
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB2_41 Depth 2
                                        ;     Child Loop BB2_51 Depth 2
                                        ;       Child Loop BB2_52 Depth 3
	v_dual_mov_b32 v21, v38 :: v_dual_mov_b32 v22, v39
	v_dual_mov_b32 v44, v41 :: v_dual_mov_b32 v43, v40
	s_mov_b32 s75, 0
.LBB2_41:                               ;   Parent Loop BB2_40 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v39, v34, v44
	v_xor_b32_e32 v38, v33, v43
                                        ; implicit-def: $vgpr59
                                        ; implicit-def: $vgpr41_vgpr42
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v57, v39, v22
	v_lshrrev_b64 v[23:24], 19, v[38:39]
	v_lshlrev_b32_e32 v25, 13, v38
	v_xor_b32_e32 v26, v38, v21
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_or_b32_e32 v58, v25, v24
	v_add_co_u32 v24, vcc_lo, v23, v26
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v25, vcc_lo, v58, v57, vcc_lo
	v_lshrrev_b64 v[24:25], 11, v[24:25]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_u32_e32 v[38:39], v25
	v_cvt_f64_u32_e32 v[24:25], v24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[38:39], v[38:39], 32
	v_add_f64 v[24:25], v[38:39], v[24:25]
                                        ; implicit-def: $vgpr39_vgpr40
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[24:25], v[24:25], 0xffffffcb
	v_mul_f64 v[24:25], v[24:25], s[4:5]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ngt_f64_e32 vcc_lo, 0x41d00000, v[24:25]
	v_trig_preop_f64 v[53:54], v[24:25], 0
	v_trig_preop_f64 v[51:52], v[24:25], 1
	v_ldexp_f64 v[55:56], v[24:25], 0xffffff80
	v_trig_preop_f64 v[49:50], v[24:25], 2
	s_and_saveexec_b32 s0, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s2, exec_lo, s0
	s_cbranch_execz .LBB2_43
; %bb.42:                               ;   in Loop: Header=BB2_41 Depth=2
	v_cmp_le_f64_e64 s0, 0x7b000000, v[24:25]
	s_mov_b32 s6, s4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v40, v25, v56, s0
	v_cndmask_b32_e64 v39, v24, v55, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_f64 v[41:42], v[53:54], v[39:40]
	v_mul_f64 v[45:46], v[51:52], v[39:40]
	v_mul_f64 v[71:72], v[49:50], v[39:40]
	v_fma_f64 v[47:48], v[53:54], v[39:40], -v[41:42]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[73:74], v[51:52], v[39:40], -v[45:46]
	v_add_f64 v[59:60], v[45:46], v[47:48]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[61:62], v[59:60], -v[45:46]
	v_add_f64 v[69:70], v[41:42], v[59:60]
	v_add_f64 v[67:68], v[59:60], -v[61:62]
	v_add_f64 v[47:48], v[47:48], -v[61:62]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[61:62], v[69:70], -2
	v_add_f64 v[41:42], v[69:70], -v[41:42]
	v_add_f64 v[45:46], v[45:46], -v[67:68]
	v_add_f64 v[67:68], v[71:72], v[73:74]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cmp_neq_f64_e64 s0, 0x7ff00000, |v[61:62]|
	v_add_f64 v[41:42], v[59:60], -v[41:42]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[45:46], v[47:48], v[45:46]
	v_fract_f64_e32 v[47:48], v[61:62]
	v_add_f64 v[59:60], v[67:68], v[45:46]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v48, 0, v48, s0
	v_cndmask_b32_e64 v47, 0, v47, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[47:48], v[47:48], 2
	v_add_f64 v[61:62], v[41:42], v[59:60]
	v_add_f64 v[75:76], v[59:60], -v[67:68]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[69:70], v[61:62], v[47:48]
	v_add_f64 v[81:82], v[59:60], -v[75:76]
	v_add_f64 v[45:46], v[45:46], -v[75:76]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cmp_gt_f64_e64 s0, 0, v[69:70]
	v_add_f64 v[69:70], v[67:68], -v[71:72]
	v_cndmask_b32_e64 v38, 0, 0x40100000, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[79:80], v[67:68], -v[69:70]
	v_add_f64 v[69:70], v[73:74], -v[69:70]
	v_add_f64 v[67:68], v[67:68], -v[81:82]
	v_add_f64 v[47:48], v[47:48], v[37:38]
	v_fma_f64 v[38:39], v[49:50], v[39:40], -v[71:72]
	v_add_f64 v[40:41], v[61:62], -v[41:42]
	v_add_f64 v[73:74], v[71:72], -v[79:80]
	v_add_f64 v[45:46], v[45:46], v[67:68]
	v_add_f64 v[77:78], v[61:62], v[47:48]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[40:41], v[59:60], -v[40:41]
	v_add_f64 v[69:70], v[69:70], v[73:74]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_i32_f64_e32 v63, v[77:78]
	v_add_f64 v[45:46], v[69:70], v[45:46]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_i32_e32 v[75:76], v63
	v_add_f64 v[38:39], v[38:39], v[45:46]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[47:48], v[47:48], -v[75:76]
	v_add_f64 v[39:40], v[40:41], v[38:39]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[67:68], v[61:62], v[47:48]
	v_add_f64 v[45:46], v[67:68], -v[47:48]
	v_cmp_le_f64_e64 s0, 0.5, v[67:68]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[41:42], v[61:62], -v[45:46]
	v_cndmask_b32_e64 v38, 0, 0x3ff00000, s0
	v_add_co_ci_u32_e64 v59, s1, 0, v63, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[39:40], v[39:40], v[41:42]
	v_add_f64 v[41:42], v[67:68], -v[37:38]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[45:46], v[41:42], v[39:40]
	v_mul_f64 v[47:48], v[45:46], s[6:7]
	v_add_f64 v[41:42], v[45:46], -v[41:42]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[60:61], v[45:46], s[6:7], -v[47:48]
	v_add_f64 v[38:39], v[39:40], -v[41:42]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[40:41], v[45:46], s[8:9], v[60:61]
	v_fma_f64 v[41:42], v[38:39], s[6:7], v[40:41]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[39:40], v[47:48], v[41:42]
	v_add_f64 v[45:46], v[39:40], -v[47:48]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[41:42], v[41:42], -v[45:46]
.LBB2_43:                               ; %Flow1201
                                        ;   in Loop: Header=BB2_41 Depth=2
	s_and_not1_saveexec_b32 s0, s2
	s_cbranch_execz .LBB2_45
; %bb.44:                               ;   in Loop: Header=BB2_41 Depth=2
	v_mul_f64 v[38:39], v[24:25], s[10:11]
	s_mov_b32 s12, s4
	s_mov_b32 s2, s24
	s_mov_b32 s3, s9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[45:46], v[38:39]
	v_fma_f64 v[38:39], v[45:46], s[12:13], v[24:25]
	v_mul_f64 v[40:41], v[45:46], s[24:25]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[59:60], v[45:46], s[24:25], v[38:39]
	v_add_f64 v[47:48], v[38:39], v[40:41]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[38:39], v[38:39], -v[47:48]
	v_add_f64 v[47:48], v[47:48], -v[59:60]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[38:39], v[38:39], v[40:41]
	v_fma_f64 v[40:41], v[45:46], s[2:3], v[40:41]
	v_add_f64 v[38:39], v[47:48], v[38:39]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[38:39], v[38:39], -v[40:41]
	v_fma_f64 v[41:42], v[45:46], s[26:27], v[38:39]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[39:40], v[59:60], v[41:42]
	v_add_f64 v[47:48], v[39:40], -v[59:60]
	v_cvt_i32_f64_e32 v59, v[45:46]
	s_delay_alu instid0(VALU_DEP_2)
	v_add_f64 v[41:42], v[41:42], -v[47:48]
.LBB2_45:                               ; %_ZL3cosd.exit.i.i.2.i110.i
                                        ;   in Loop: Header=BB2_41 Depth=2
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $vgpr60
                                        ; implicit-def: $vgpr45_vgpr46
                                        ; implicit-def: $vgpr47_vgpr48
	s_and_saveexec_b32 s0, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s1, exec_lo, s0
	s_cbranch_execz .LBB2_47
; %bb.46:                               ;   in Loop: Header=BB2_41 Depth=2
	v_cmp_le_f64_e32 vcc_lo, 0x7b000000, v[24:25]
	s_mov_b32 s6, s4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v46, v25, v56 :: v_dual_cndmask_b32 v45, v24, v55
	v_mul_f64 v[47:48], v[53:54], v[45:46]
	v_mul_f64 v[55:56], v[51:52], v[45:46]
	v_mul_f64 v[71:72], v[49:50], v[45:46]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[53:54], v[53:54], v[45:46], -v[47:48]
	v_fma_f64 v[51:52], v[51:52], v[45:46], -v[55:56]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[45:46], v[49:50], v[45:46], -v[71:72]
	v_add_f64 v[60:61], v[55:56], v[53:54]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[62:63], v[60:61], -v[55:56]
	v_add_f64 v[69:70], v[47:48], v[60:61]
	v_add_f64 v[67:68], v[60:61], -v[62:63]
	v_add_f64 v[53:54], v[53:54], -v[62:63]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[62:63], v[69:70], -2
	v_add_f64 v[47:48], v[69:70], -v[47:48]
	v_add_f64 v[55:56], v[55:56], -v[67:68]
	v_add_f64 v[67:68], v[71:72], v[51:52]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[62:63]|
	v_add_f64 v[47:48], v[60:61], -v[47:48]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[53:54], v[53:54], v[55:56]
	v_fract_f64_e32 v[55:56], v[62:63]
	v_add_f64 v[60:61], v[67:68], v[53:54]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v56, 0, v56 :: v_dual_cndmask_b32 v55, 0, v55
	v_ldexp_f64 v[55:56], v[55:56], 2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[62:63], v[47:48], v[60:61]
	v_add_f64 v[73:74], v[60:61], -v[67:68]
	v_add_f64 v[69:70], v[62:63], v[55:56]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[79:80], v[60:61], -v[73:74]
	v_add_f64 v[53:54], v[53:54], -v[73:74]
	v_add_f64 v[47:48], v[62:63], -v[47:48]
	v_cmp_gt_f64_e32 vcc_lo, 0, v[69:70]
	v_add_f64 v[69:70], v[67:68], -v[71:72]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[47:48], v[60:61], -v[47:48]
	v_cndmask_b32_e64 v38, 0, 0x40100000, vcc_lo
	v_add_f64 v[77:78], v[67:68], -v[69:70]
	v_add_f64 v[51:52], v[51:52], -v[69:70]
	v_add_f64 v[67:68], v[67:68], -v[79:80]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[55:56], v[55:56], v[37:38]
	v_add_f64 v[69:70], v[71:72], -v[77:78]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[53:54], v[53:54], v[67:68]
	v_add_f64 v[75:76], v[62:63], v[55:56]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[51:52], v[51:52], v[69:70]
	v_cvt_i32_f64_e32 v38, v[75:76]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[49:50], v[51:52], v[53:54]
	v_cvt_f64_i32_e32 v[73:74], v38
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[45:46], v[45:46], v[49:50]
	v_add_f64 v[55:56], v[55:56], -v[73:74]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[45:46], v[47:48], v[45:46]
	v_add_f64 v[51:52], v[62:63], v[55:56]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[49:50], v[51:52], -v[55:56]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[51:52]
	v_add_f64 v[47:48], v[62:63], -v[49:50]
	v_add_co_ci_u32_e64 v60, s0, 0, v38, vcc_lo
	v_cndmask_b32_e64 v38, 0, 0x3ff00000, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[45:46], v[45:46], v[47:48]
	v_add_f64 v[47:48], v[51:52], -v[37:38]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[49:50], v[47:48], v[45:46]
	v_mul_f64 v[51:52], v[49:50], s[6:7]
	v_add_f64 v[47:48], v[49:50], -v[47:48]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[53:54], v[49:50], s[6:7], -v[51:52]
	v_add_f64 v[45:46], v[45:46], -v[47:48]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[47:48], v[49:50], s[8:9], v[53:54]
	v_fma_f64 v[47:48], v[45:46], s[6:7], v[47:48]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[45:46], v[51:52], v[47:48]
	v_add_f64 v[49:50], v[45:46], -v[51:52]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[47:48], v[47:48], -v[49:50]
.LBB2_47:                               ; %Flow1200
                                        ;   in Loop: Header=BB2_41 Depth=2
	s_and_not1_saveexec_b32 s0, s1
	s_cbranch_execz .LBB2_49
; %bb.48:                               ;   in Loop: Header=BB2_41 Depth=2
	v_mul_f64 v[45:46], v[24:25], s[10:11]
	s_mov_b32 s12, s4
	s_mov_b32 s2, s24
	s_mov_b32 s3, s9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[49:50], v[45:46]
	v_fma_f64 v[45:46], v[49:50], s[12:13], v[24:25]
	v_mul_f64 v[47:48], v[49:50], s[24:25]
	v_cvt_i32_f64_e32 v60, v[49:50]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[53:54], v[49:50], s[24:25], v[45:46]
	v_add_f64 v[51:52], v[45:46], v[47:48]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[45:46], v[45:46], -v[51:52]
	v_add_f64 v[51:52], v[51:52], -v[53:54]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[45:46], v[45:46], v[47:48]
	v_fma_f64 v[47:48], v[49:50], s[2:3], v[47:48]
	v_add_f64 v[45:46], v[51:52], v[45:46]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[45:46], v[45:46], -v[47:48]
	v_fma_f64 v[47:48], v[49:50], s[26:27], v[45:46]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[45:46], v[53:54], v[47:48]
	v_add_f64 v[51:52], v[45:46], -v[53:54]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[47:48], v[47:48], -v[51:52]
.LBB2_49:                               ; %_ZL3sind.exit.i.i.2.i115.i
                                        ;   in Loop: Header=BB2_41 Depth=2
	s_or_b32 exec_lo, exec_lo, s0
	v_add_co_u32 v43, vcc_lo, v43, v21
	v_add_co_ci_u32_e32 v44, vcc_lo, v44, v22, vcc_lo
	s_mov_b32 s69, s29
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_f64 v[81:82], v[41:42], 0.5
	v_mul_f64 v[89:90], v[47:48], 0.5
	s_delay_alu instid0(VALU_DEP_3)
	v_lshrrev_b64 v[43:44], 11, v[43:44]
	s_mov_b32 s70, s28
	s_mov_b32 s72, s28
	v_cmp_lg_f64_e64 s0, 0x7ff00000, v[24:25]
	s_cmp_eq_u32 s75, 4
	v_xor_b32_e32 v36, v36, v22
	v_cvt_f64_u32_e32 v[49:50], v44
	v_cvt_f64_u32_e32 v[43:44], v43
	v_xor_b32_e32 v35, v35, v21
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[49:50], v[49:50], 32
	v_add_f64 v[43:44], v[49:50], v[43:44]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[43:44], v[43:44], 0xffffffcb
	v_frexp_mant_f64_e32 v[49:50], v[43:44]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f64_e32 vcc_lo, s[28:29], v[49:50]
	v_cndmask_b32_e64 v38, 0, 1, vcc_lo
	v_ldexp_f64 v[49:50], v[49:50], v38
	v_frexp_exp_i32_f64_e32 v38, v[43:44]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[51:52], v[49:50], 1.0
	v_add_f64 v[61:62], v[49:50], -1.0
	v_subrev_co_ci_u32_e32 v38, vcc_lo, 0, v38, vcc_lo
	v_cmp_eq_f64_e32 vcc_lo, 0x7ff00000, v[43:44]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[53:54], v[51:52]
	v_add_f64 v[67:68], v[51:52], -1.0
	v_add_f64 v[49:50], v[49:50], -v[67:68]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[55:56], -v[51:52], v[53:54], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[53:54], v[55:56], v[53:54], v[53:54]
	v_fma_f64 v[55:56], -v[51:52], v[53:54], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[53:54], v[55:56], v[53:54], v[53:54]
	v_mul_f64 v[55:56], v[61:62], v[53:54]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[69:70], v[51:52], v[55:56]
	v_fma_f64 v[51:52], v[55:56], v[51:52], -v[69:70]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[49:50], v[55:56], v[49:50], v[51:52]
	v_add_f64 v[51:52], v[69:70], v[49:50]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[67:68], v[61:62], -v[51:52]
	v_add_f64 v[69:70], v[51:52], -v[69:70]
	v_add_f64 v[61:62], v[61:62], -v[67:68]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[49:50], v[69:70], -v[49:50]
	v_add_f64 v[51:52], v[61:62], -v[51:52]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[49:50], v[49:50], v[51:52]
	v_add_f64 v[49:50], v[67:68], v[49:50]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[49:50], v[53:54], v[49:50]
	v_add_f64 v[51:52], v[55:56], v[49:50]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[53:54], v[51:52], v[51:52]
	v_fma_f64 v[61:62], v[53:54], s[34:35], s[30:31]
	v_mul_f64 v[67:68], v[51:52], v[53:54]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[61:62], v[53:54], v[61:62], s[36:37]
	v_fma_f64 v[61:62], v[53:54], v[61:62], s[38:39]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[61:62], v[53:54], v[61:62], s[40:41]
	v_fma_f64 v[61:62], v[53:54], v[61:62], s[42:43]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[53:54], v[53:54], v[61:62], s[68:69]
	v_ldexp_f64 v[61:62], v[51:52], 1
	v_add_f64 v[51:52], v[51:52], -v[55:56]
	v_mul_f64 v[53:54], v[67:68], v[53:54]
	v_cvt_f64_i32_e32 v[67:68], v38
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[49:50], v[49:50], -v[51:52]
	v_add_f64 v[55:56], v[61:62], v[53:54]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[69:70], v[67:68], s[44:45]
	v_ldexp_f64 v[49:50], v[49:50], 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[51:52], v[55:56], -v[61:62]
	v_fma_f64 v[61:62], v[67:68], s[44:45], -v[69:70]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[51:52], v[53:54], -v[51:52]
	v_fma_f64 v[53:54], v[67:68], s[46:47], v[61:62]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[49:50], v[49:50], v[51:52]
	v_add_f64 v[51:52], v[69:70], v[53:54]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[61:62], v[55:56], v[49:50]
	v_add_f64 v[69:70], v[51:52], -v[69:70]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[67:68], v[51:52], v[61:62]
	v_add_f64 v[55:56], v[61:62], -v[55:56]
	v_add_f64 v[53:54], v[53:54], -v[69:70]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[71:72], v[67:68], -v[51:52]
	v_add_f64 v[49:50], v[49:50], -v[55:56]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[73:74], v[67:68], -v[71:72]
	v_add_f64 v[55:56], v[61:62], -v[71:72]
	v_add_f64 v[61:62], v[53:54], v[49:50]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[51:52], v[51:52], -v[73:74]
	v_add_f64 v[51:52], v[55:56], v[51:52]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[55:56], v[61:62], -v[53:54]
	v_add_f64 v[51:52], v[61:62], v[51:52]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[61:62], v[61:62], -v[55:56]
	v_add_f64 v[49:50], v[49:50], -v[55:56]
	v_add_f64 v[69:70], v[67:68], v[51:52]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[53:54], v[53:54], -v[61:62]
	v_add_f64 v[55:56], v[69:70], -v[67:68]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[49:50], v[49:50], v[53:54]
	v_mul_f64 v[53:54], v[45:46], v[45:46]
	v_add_f64 v[51:52], v[51:52], -v[55:56]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mul_f64 v[75:76], v[53:54], 0.5
	v_fma_f64 v[77:78], v[53:54], s[50:51], s[48:49]
	v_add_f64 v[49:50], v[49:50], v[51:52]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[87:88], -v[75:76], 1.0
	v_fma_f64 v[77:78], v[53:54], v[77:78], s[52:53]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[49:50], v[69:70], v[49:50]
	v_fma_f64 v[69:70], v[53:54], s[60:61], s[58:59]
	v_fma_f64 v[77:78], v[53:54], v[77:78], s[54:55]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_dual_cndmask_b32 v50, v50, v44 :: v_dual_cndmask_b32 v49, v49, v43
	v_cmp_ngt_f64_e32 vcc_lo, 0, v[43:44]
	v_fma_f64 v[69:70], v[53:54], v[69:70], s[62:63]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[77:78], v[53:54], v[77:78], s[56:57]
	v_mul_f64 v[49:50], v[49:50], -2.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[69:70], v[53:54], v[69:70], s[64:65]
	v_cndmask_b32_e32 v38, 0x7ff80000, v50, vcc_lo
	v_cmp_nge_f64_e32 vcc_lo, 0, v[43:44]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_fma_f64 v[69:70], v[53:54], v[69:70], s[66:67]
	v_cndmask_b32_e32 v49, 0, v49, vcc_lo
	v_cmp_neq_f64_e32 vcc_lo, 0, v[43:44]
	v_mul_f64 v[43:44], v[39:40], v[39:40]
	v_cndmask_b32_e32 v50, 0x7ff00000, v38, vcc_lo
	v_fma_f64 v[51:52], v[43:44], s[60:61], s[58:59]
	v_mul_f64 v[61:62], v[43:44], 0.5
	v_fma_f64 v[67:68], v[43:44], s[50:51], s[48:49]
	v_mul_f64 v[83:84], v[39:40], -v[43:44]
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[49:50]
	v_fma_f64 v[51:52], v[43:44], v[51:52], s[62:63]
	v_add_f64 v[73:74], -v[61:62], 1.0
	v_fma_f64 v[67:68], v[43:44], v[67:68], s[52:53]
	v_cndmask_b32_e64 v38, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v38, 8, v38
	v_ldexp_f64 v[49:50], v[49:50], v38
	v_fma_f64 v[51:52], v[43:44], v[51:52], s[64:65]
	v_add_f64 v[85:86], -v[73:74], 1.0
	v_fma_f64 v[67:68], v[43:44], v[67:68], s[54:55]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_rsq_f64_e32 v[55:56], v[49:50]
	v_cmp_class_f64_e64 s1, v[49:50], 0x260
	v_fma_f64 v[51:52], v[43:44], v[51:52], s[66:67]
	s_delay_alu instid0(VALU_DEP_4)
	v_add_f64 v[61:62], v[85:86], -v[61:62]
	v_add_f64 v[85:86], -v[87:88], 1.0
	v_fma_f64 v[67:68], v[43:44], v[67:68], s[56:57]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[71:72], v[49:50], v[55:56]
	v_mul_f64 v[55:56], v[55:56], 0.5
	v_fma_f64 v[51:52], v[83:84], v[51:52], v[81:82]
	v_mul_f64 v[81:82], v[45:46], -v[53:54]
	v_add_f64 v[75:76], v[85:86], -v[75:76]
	v_mul_f64 v[85:86], v[43:44], v[43:44]
	v_fma_f64 v[67:68], v[43:44], v[67:68], s[70:71]
	v_fma_f64 v[61:62], v[39:40], -v[41:42], v[61:62]
	v_fma_f64 v[79:80], -v[55:56], v[71:72], 0.5
	v_fma_f64 v[41:42], v[43:44], v[51:52], -v[41:42]
	v_fma_f64 v[69:70], v[81:82], v[69:70], v[89:90]
	v_mul_f64 v[51:52], v[53:54], v[53:54]
	v_fma_f64 v[75:76], v[45:46], -v[47:48], v[75:76]
	v_fma_f64 v[71:72], v[71:72], v[79:80], v[71:72]
	v_fma_f64 v[55:56], v[55:56], v[79:80], v[55:56]
	v_fma_f64 v[41:42], v[83:84], s[72:73], v[41:42]
	v_fma_f64 v[47:48], v[53:54], v[69:70], -v[47:48]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[79:80], -v[71:72], v[71:72], v[49:50]
	v_add_f64 v[38:39], v[39:40], -v[41:42]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[47:48], v[81:82], s[72:73], v[47:48]
	v_fma_f64 v[43:44], v[79:80], v[55:56], v[71:72]
	v_fma_f64 v[71:72], v[53:54], v[77:78], s[70:71]
	v_fma_f64 v[53:54], v[85:86], v[67:68], v[61:62]
	v_xor_b32_e32 v39, 0x80000000, v39
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[61:62], -v[43:44], v[43:44], v[49:50]
	v_fma_f64 v[51:52], v[51:52], v[71:72], v[75:76]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[53:54], v[73:74], v[53:54]
	v_fma_f64 v[40:41], v[61:62], v[55:56], v[43:44]
	s_delay_alu instid0(VALU_DEP_3)
	v_add_f64 v[42:43], v[87:88], v[51:52]
	v_add_f64 v[44:45], v[45:46], -v[47:48]
	v_and_b32_e32 v47, 1, v60
	v_cndmask_b32_e64 v51, 0, 0xffffff80, vcc_lo
	v_and_b32_e32 v55, 1, v59
	v_lshlrev_b32_e32 v46, 30, v60
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_eq_u32_e32 vcc_lo, 0, v55
	v_xor_b32_e32 v25, v46, v25
	v_dual_cndmask_b32 v38, v38, v53 :: v_dual_cndmask_b32 v39, v39, v54
	v_cmp_eq_u32_e32 vcc_lo, 0, v47
	v_lshlrev_b32_e32 v24, 30, v59
	v_ldexp_f64 v[40:41], v[40:41], v51
	v_dual_cndmask_b32 v43, v43, v45 :: v_dual_cndmask_b32 v42, v42, v44
	s_cselect_b32 vcc_lo, -1, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_and_b32_e32 v24, 0x80000000, v24
	v_and_b32_e32 v46, 0x80000000, v25
	s_cmp_eq_u32 s75, 3
	v_cndmask_b32_e64 v21, 0, v42, s0
	v_xor_b32_e32 v39, v39, v24
	v_cndmask_b32_e64 v24, 0, v38, s0
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e64 v25, 0x7ff80000, v39, s0
	v_cndmask_b32_e64 v39, v41, v50, s1
	v_cndmask_b32_e64 v38, v40, v49, s1
	v_lshlrev_b64 v[40:41], 17, v[33:34]
	v_xor_b32_e32 v34, v36, v34
	v_xor_b32_e32 v33, v35, v33
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[24:25], v[38:39], v[24:25]
	v_cndmask_b32_e32 v19, v19, v24, vcc_lo
	v_xor_b32_e32 v43, v43, v46
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v20, v20, v25, vcc_lo
	v_cndmask_b32_e64 v22, 0x7ff80000, v43, s0
	s_cselect_b32 s0, -1, 0
	s_cmp_eq_u32 s75, 2
	v_cndmask_b32_e64 v18, v18, v25, s0
	s_cselect_b32 s1, -1, 0
	v_mul_f64 v[42:43], v[38:39], v[21:22]
	v_xor_b32_e32 v22, v34, v58
	v_xor_b32_e32 v21, v33, v23
	v_xor_b32_e32 v38, v36, v41
	v_xor_b32_e32 v39, v35, v40
	v_lshlrev_b64 v[35:36], 17, v[33:34]
	s_cmp_eq_u32 s75, 1
	v_lshrrev_b64 v[40:41], 19, v[21:22]
	v_xor_b32_e32 v23, v38, v57
	v_xor_b32_e32 v44, v39, v26
	v_xor_b32_e32 v38, v21, v26
	v_lshlrev_b32_e32 v26, 13, v21
	v_xor_b32_e32 v39, v22, v57
	s_cselect_b32 s2, -1, 0
	s_cmp_eq_u32 s75, 0
	v_xor_b32_e32 v33, v44, v33
	v_or_b32_e32 v41, v26, v41
	s_cselect_b32 s3, -1, 0
	v_xor_b32_e32 v35, v44, v35
	v_mov_b32_e32 v21, v38
	v_xor_b32_e32 v34, v23, v34
	v_xor_b32_e32 v36, v23, v36
	v_mov_b32_e32 v22, v39
	v_cndmask_b32_e64 v17, v17, v24, s0
	v_cndmask_b32_e64 v16, v16, v25, s1
	v_cndmask_b32_e64 v15, v15, v24, s1
	v_cndmask_b32_e64 v14, v14, v25, s2
	v_cndmask_b32_e64 v13, v13, v24, s2
	v_cndmask_b32_e64 v12, v12, v25, s3
	v_cndmask_b32_e64 v11, v11, v24, s3
	s_add_i32 s75, s75, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s75, 5
	v_cndmask_b32_e32 v10, v10, v43, vcc_lo
	v_cndmask_b32_e64 v8, v8, v43, s0
	v_cndmask_b32_e64 v6, v6, v43, s1
	v_cndmask_b32_e64 v4, v4, v43, s2
	v_cndmask_b32_e64 v2, v2, v43, s3
	v_mov_b32_e32 v44, v41
	v_cndmask_b32_e32 v9, v9, v42, vcc_lo
	v_cndmask_b32_e64 v7, v7, v42, s0
	v_cndmask_b32_e64 v5, v5, v42, s1
	v_cndmask_b32_e64 v3, v3, v42, s2
	v_cndmask_b32_e64 v1, v1, v42, s3
	v_mov_b32_e32 v43, v40
	s_cbranch_scc1 .LBB2_41
; %bb.50:                               ; %.lr.ph.i.i.2.i122.i.preheader
                                        ;   in Loop: Header=BB2_40 Depth=1
	v_mov_b32_e32 v21, 0
	v_mov_b32_e32 v22, 0
	s_mov_b32 s3, 0
.LBB2_51:                               ; %.lr.ph.i.i.2.i122.i
                                        ;   Parent Loop BB2_40 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB2_52 Depth 3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s3, 1
	s_mov_b32 s6, s3
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s3, 2
	v_dual_cndmask_b32 v23, v12, v14 :: v_dual_cndmask_b32 v24, v11, v13
	v_dual_cndmask_b32 v25, v2, v4 :: v_dual_cndmask_b32 v26, v1, v3
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s3, 3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v23, v23, v16 :: v_dual_cndmask_b32 v24, v24, v15
	v_dual_cndmask_b32 v25, v25, v6 :: v_dual_cndmask_b32 v26, v26, v5
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s3, 4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v23, v23, v18 :: v_dual_cndmask_b32 v42, v24, v17
	v_cndmask_b32_e32 v25, v25, v8, vcc_lo
	v_cndmask_b32_e32 v43, v26, v7, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v24, v23, v20 :: v_dual_cndmask_b32 v23, v42, v19
	v_dual_cndmask_b32 v26, v25, v10 :: v_dual_cndmask_b32 v25, v43, v9
.LBB2_52:                               ;   Parent Loop BB2_40 Depth=1
                                        ;     Parent Loop BB2_51 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_add_i32 s6, s6, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s6, 1
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s6, 2
	v_dual_cndmask_b32 v42, v12, v14 :: v_dual_cndmask_b32 v43, v2, v4
	v_cndmask_b32_e32 v44, v1, v3, vcc_lo
	s_cselect_b32 s0, -1, 0
	s_cmp_eq_u32 s6, 3
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e64 v42, v42, v16, s0
	v_cndmask_b32_e64 v43, v43, v6, s0
	v_cndmask_b32_e64 v44, v44, v5, s0
	s_cselect_b32 s1, -1, 0
	s_cmp_eq_u32 s6, 4
	v_cndmask_b32_e64 v42, v42, v18, s1
	v_cndmask_b32_e64 v45, v43, v8, s1
	v_cndmask_b32_e64 v44, v44, v7, s1
	s_cselect_b32 s2, -1, 0
	s_cmp_lt_u32 s6, 4
	v_cndmask_b32_e64 v43, v42, v20, s2
	v_cndmask_b32_e64 v45, v45, v10, s2
	v_cndmask_b32_e64 v44, v44, v9, s2
	v_cndmask_b32_e32 v42, v11, v13, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[44:45], v[25:26], -v[44:45]
	v_cndmask_b32_e64 v42, v42, v15, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v42, v42, v17, s1
	v_cndmask_b32_e64 v42, v42, v19, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[42:43], v[23:24], -v[42:43]
	v_mul_f64 v[44:45], v[44:45], v[44:45]
	v_fma_f64 v[42:43], v[42:43], v[42:43], v[44:45]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_lt_f64_e32 vcc_lo, v[21:22], v[42:43]
	v_dual_cndmask_b32 v22, v22, v43 :: v_dual_cndmask_b32 v21, v21, v42
	s_cbranch_scc1 .LBB2_52
; %bb.53:                               ; %.loopexit.i.i.2.i128.i
                                        ;   in Loop: Header=BB2_51 Depth=2
	s_add_i32 s3, s3, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s3, 4
	s_cbranch_scc1 .LBB2_51
; %bb.54:                               ;   in Loop: Header=BB2_40 Depth=1
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[21:22]
	s_add_i32 s74, s74, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	s_cmp_lg_u32 s74, 0x10000
	v_cndmask_b32_e64 v23, 0, 1, vcc_lo
	v_lshlrev_b32_e32 v23, 8, v23
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[21:22], v[21:22], v23
	v_rsq_f64_e32 v[23:24], v[21:22]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[25:26], v[21:22], v[23:24]
	v_mul_f64 v[23:24], v[23:24], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[42:43], -v[23:24], v[25:26], 0.5
	v_fma_f64 v[25:26], v[25:26], v[42:43], v[25:26]
	v_fma_f64 v[23:24], v[23:24], v[42:43], v[23:24]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[42:43], -v[25:26], v[25:26], v[21:22]
	v_fma_f64 v[25:26], v[42:43], v[23:24], v[25:26]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[42:43], -v[25:26], v[25:26], v[21:22]
	v_fma_f64 v[23:24], v[42:43], v[23:24], v[25:26]
	v_cndmask_b32_e64 v25, 0, 0xffffff80, vcc_lo
	v_cmp_class_f64_e64 vcc_lo, v[21:22], 0x260
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[23:24], v[23:24], v25
	v_dual_cndmask_b32 v22, v24, v22 :: v_dual_cndmask_b32 v21, v23, v21
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[31:32], v[31:32], v[21:22]
	s_cbranch_scc1 .LBB2_40
; %bb.55:                               ; %_ZNK6thrust11hip_rocprim26transform_input_iterator_tIdNS_17counting_iteratorIjNS_11use_defaultES3_S3_EE11estimate_esEixEl.exit.2.i131.i
	v_add_nc_u32_e32 v1, 0x7f056016, v64
	s_mov_b64 s[4:5], 0
                                        ; implicit-def: $vgpr40_vgpr41
                                        ; implicit-def: $vgpr35_vgpr36
                                        ; implicit-def: $vgpr37_vgpr38
                                        ; implicit-def: $vgpr42_vgpr43
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v2, 19, v1
	v_xor3_b32 v1, v1, v2, 0xc761c23c
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v1, v1, 5, v1
	v_add_nc_u32_e32 v2, 0xe9f8cc1d, v1
	v_lshl_add_u32 v1, v1, 9, 0xaccf6200
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v1, v2, v1
	v_lshlrev_b32_e32 v2, 3, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v1, v1, v2, 0xfd7046c5
	v_lshrrev_b32_e32 v2, 16, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_xor3_b32 v1, v1, v2, 0xb55a4f09
.LBB2_56:                               ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v2, 12, v1
	s_cmp_eq_u32 s4, 0
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s4, 1
	v_add3_u32 v1, v1, v2, 0x7ed55d16
	s_cselect_b32 s0, -1, 0
	s_cmp_eq_u32 s4, 2
	s_cselect_b32 s1, -1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v2, 19, v1
	s_cmp_eq_u32 s4, 3
	s_cselect_b32 s2, -1, 0
	s_add_u32 s4, s4, 1
	v_xor3_b32 v1, v1, v2, 0xc761c23c
	s_addc_u32 s5, s5, 0
	s_cmp_lg_u32 s4, 4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v1, v1, 5, v1
	v_add_nc_u32_e32 v2, 0xe9f8cc1d, v1
	v_lshl_add_u32 v1, v1, 9, 0xaccf6200
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v1, v2, v1
	v_lshlrev_b32_e32 v2, 3, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v1, v1, v2, 0xfd7046c5
	v_lshrrev_b32_e32 v2, 16, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor3_b32 v1, v1, v2, 0xb55a4f09
	v_lshlrev_b32_e32 v3, 12, v1
	v_xor_b32_e32 v2, s23, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add3_u32 v1, v1, v3, 0x7ed55d16
	v_cndmask_b32_e32 v41, v41, v2, vcc_lo
	v_cndmask_b32_e64 v36, v36, v2, s0
	v_cndmask_b32_e64 v38, v38, v2, s1
	v_cndmask_b32_e64 v43, v43, v2, s2
	v_lshrrev_b32_e32 v3, 19, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor3_b32 v1, v1, v3, 0xc761c23c
	v_lshl_add_u32 v1, v1, 5, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v3, 0xe9f8cc1d, v1
	v_lshl_add_u32 v1, v1, 9, 0xaccf6200
	v_xor_b32_e32 v1, v3, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v3, 3, v1
	v_add3_u32 v1, v1, v3, 0xfd7046c5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v3, 16, v1
	v_xor3_b32 v1, v1, v3, 0xb55a4f09
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v2, s22, v1
	v_cndmask_b32_e32 v40, v40, v2, vcc_lo
	v_cndmask_b32_e64 v35, v35, v2, s0
	v_cndmask_b32_e64 v37, v37, v2, s1
	v_cndmask_b32_e64 v42, v42, v2, s2
	s_cbranch_scc1 .LBB2_56
; %bb.57:                               ; %.preheader55.i.i.3.i136.i.preheader
	v_mov_b32_e32 v33, 0
	v_dual_mov_b32 v34, 0 :: v_dual_mov_b32 v39, 0
	s_mov_b32 s4, 0x54442d18
	s_mov_b32 s8, 0x33145c07
	s_mov_b32 s10, 0x6dc9c883
	s_mov_b32 s24, 0x33145c00
	s_mov_b32 s26, 0x252049c0
	s_mov_b32 s28, 0x55555555
	s_mov_b32 s30, 0x6b47b09a
	s_mov_b32 s34, 0xbf559e2b
	s_mov_b32 s36, 0xd7f4df2e
	s_mov_b32 s38, 0x16291751
	s_mov_b32 s40, 0x9b27acf1
	s_mov_b32 s42, 0x998ef7b6
	s_mov_b32 s44, 0xfefa39ef
	s_mov_b32 s46, 0x3b39803f
	s_mov_b32 s48, 0x9037ab78
	s_mov_b32 s50, 0x46cc5e42
	s_mov_b32 s52, 0xa17f65f6
	s_mov_b32 s54, 0x19f4ec90
	s_mov_b32 s56, 0x16c16967
	s_mov_b32 s58, 0xb42fdfa7
	s_mov_b32 s60, 0xf9a43bb8
	s_mov_b32 s62, 0x796cde01
	s_mov_b32 s64, 0x19e83e5c
	s_mov_b32 s66, 0x11110bb3
	s_mov_b32 s74, 0
	s_mov_b32 s5, 0x401921fb
	s_mov_b32 s7, 0x3ff921fb
	s_mov_b32 s9, 0x3c91a626
	s_mov_b32 s11, 0x3fe45f30
	s_mov_b32 s13, 0xbff921fb
	s_mov_b32 s25, 0xbc91a626
	s_mov_b32 s27, 0xb97b839a
	s_mov_b32 s29, 0x3fe55555
	s_mov_b32 s31, 0x3fc38538
	s_mov_b32 s35, 0x3fc3ab76
	s_mov_b32 s37, 0x3fc7474d
	s_mov_b32 s39, 0x3fcc71c0
	s_mov_b32 s41, 0x3fd24924
	s_mov_b32 s43, 0x3fd99999
	s_mov_b32 s45, 0x3fe62e42
	s_mov_b32 s47, 0x3c7abc9e
	s_mov_b32 s49, 0x3e21eeb6
	s_mov_b32 s51, 0xbda907db
	s_mov_b32 s53, 0xbe927e4f
	s_mov_b32 s55, 0x3efa01a0
	s_mov_b32 s57, 0xbf56c16c
	s_mov_b32 s59, 0xbe5ae600
	s_mov_b32 s61, 0x3de5e0b2
	s_mov_b32 s63, 0x3ec71de3
	s_mov_b32 s65, 0xbf2a01a0
	s_mov_b32 s67, 0x3f811111
	s_mov_b32 s68, 0x55555780
	s_mov_b32 s71, 0x3fa55555
	s_mov_b32 s73, 0xbfc55555
                                        ; implicit-def: $vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16
                                        ; implicit-def: $vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26
.LBB2_58:                               ; %.preheader55.i.i.3.i136.i
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB2_59 Depth 2
                                        ;     Child Loop BB2_69 Depth 2
                                        ;       Child Loop BB2_70 Depth 3
	v_dual_mov_b32 v21, v40 :: v_dual_mov_b32 v22, v41
	v_dual_mov_b32 v46, v43 :: v_dual_mov_b32 v45, v42
	s_mov_b32 s75, 0
.LBB2_59:                               ;   Parent Loop BB2_58 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v41, v36, v46
	v_xor_b32_e32 v40, v35, v45
                                        ; implicit-def: $vgpr61
                                        ; implicit-def: $vgpr43_vgpr44
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v59, v41, v22
	v_lshrrev_b64 v[23:24], 19, v[40:41]
	v_lshlrev_b32_e32 v25, 13, v40
	v_xor_b32_e32 v26, v40, v21
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_or_b32_e32 v60, v25, v24
	v_add_co_u32 v24, vcc_lo, v23, v26
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v25, vcc_lo, v60, v59, vcc_lo
	v_lshrrev_b64 v[24:25], 11, v[24:25]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_u32_e32 v[40:41], v25
	v_cvt_f64_u32_e32 v[24:25], v24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[40:41], v[40:41], 32
	v_add_f64 v[24:25], v[40:41], v[24:25]
                                        ; implicit-def: $vgpr41_vgpr42
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[24:25], v[24:25], 0xffffffcb
	v_mul_f64 v[24:25], v[24:25], s[4:5]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ngt_f64_e32 vcc_lo, 0x41d00000, v[24:25]
	v_trig_preop_f64 v[55:56], v[24:25], 0
	v_trig_preop_f64 v[53:54], v[24:25], 1
	v_ldexp_f64 v[57:58], v[24:25], 0xffffff80
	v_trig_preop_f64 v[51:52], v[24:25], 2
	s_and_saveexec_b32 s0, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s2, exec_lo, s0
	s_cbranch_execz .LBB2_61
; %bb.60:                               ;   in Loop: Header=BB2_59 Depth=2
	v_cmp_le_f64_e64 s0, 0x7b000000, v[24:25]
	s_mov_b32 s6, s4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v42, v25, v58, s0
	v_cndmask_b32_e64 v41, v24, v57, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_f64 v[43:44], v[55:56], v[41:42]
	v_mul_f64 v[47:48], v[53:54], v[41:42]
	v_mul_f64 v[73:74], v[51:52], v[41:42]
	v_fma_f64 v[49:50], v[55:56], v[41:42], -v[43:44]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[75:76], v[53:54], v[41:42], -v[47:48]
	v_add_f64 v[61:62], v[47:48], v[49:50]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[67:68], v[61:62], -v[47:48]
	v_add_f64 v[71:72], v[43:44], v[61:62]
	v_add_f64 v[69:70], v[61:62], -v[67:68]
	v_add_f64 v[49:50], v[49:50], -v[67:68]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[67:68], v[71:72], -2
	v_add_f64 v[43:44], v[71:72], -v[43:44]
	v_add_f64 v[47:48], v[47:48], -v[69:70]
	v_add_f64 v[69:70], v[73:74], v[75:76]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cmp_neq_f64_e64 s0, 0x7ff00000, |v[67:68]|
	v_add_f64 v[43:44], v[61:62], -v[43:44]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[47:48], v[49:50], v[47:48]
	v_fract_f64_e32 v[49:50], v[67:68]
	v_add_f64 v[61:62], v[69:70], v[47:48]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v50, 0, v50, s0
	v_cndmask_b32_e64 v49, 0, v49, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[49:50], v[49:50], 2
	v_add_f64 v[67:68], v[43:44], v[61:62]
	v_add_f64 v[77:78], v[61:62], -v[69:70]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[71:72], v[67:68], v[49:50]
	v_add_f64 v[83:84], v[61:62], -v[77:78]
	v_add_f64 v[47:48], v[47:48], -v[77:78]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cmp_gt_f64_e64 s0, 0, v[71:72]
	v_add_f64 v[71:72], v[69:70], -v[73:74]
	v_cndmask_b32_e64 v40, 0, 0x40100000, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[81:82], v[69:70], -v[71:72]
	v_add_f64 v[71:72], v[75:76], -v[71:72]
	v_add_f64 v[69:70], v[69:70], -v[83:84]
	v_add_f64 v[49:50], v[49:50], v[39:40]
	v_fma_f64 v[40:41], v[51:52], v[41:42], -v[73:74]
	v_add_f64 v[42:43], v[67:68], -v[43:44]
	v_add_f64 v[75:76], v[73:74], -v[81:82]
	v_add_f64 v[47:48], v[47:48], v[69:70]
	v_add_f64 v[79:80], v[67:68], v[49:50]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[42:43], v[61:62], -v[42:43]
	v_add_f64 v[71:72], v[71:72], v[75:76]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_i32_f64_e32 v63, v[79:80]
	v_add_f64 v[47:48], v[71:72], v[47:48]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_i32_e32 v[77:78], v63
	v_add_f64 v[40:41], v[40:41], v[47:48]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[49:50], v[49:50], -v[77:78]
	v_add_f64 v[41:42], v[42:43], v[40:41]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[69:70], v[67:68], v[49:50]
	v_add_f64 v[47:48], v[69:70], -v[49:50]
	v_cmp_le_f64_e64 s0, 0.5, v[69:70]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[43:44], v[67:68], -v[47:48]
	v_cndmask_b32_e64 v40, 0, 0x3ff00000, s0
	v_add_co_ci_u32_e64 v61, s1, 0, v63, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[41:42], v[41:42], v[43:44]
	v_add_f64 v[43:44], v[69:70], -v[39:40]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[47:48], v[43:44], v[41:42]
	v_mul_f64 v[49:50], v[47:48], s[6:7]
	v_add_f64 v[43:44], v[47:48], -v[43:44]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[62:63], v[47:48], s[6:7], -v[49:50]
	v_add_f64 v[40:41], v[41:42], -v[43:44]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[42:43], v[47:48], s[8:9], v[62:63]
	v_fma_f64 v[43:44], v[40:41], s[6:7], v[42:43]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[41:42], v[49:50], v[43:44]
	v_add_f64 v[47:48], v[41:42], -v[49:50]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[43:44], v[43:44], -v[47:48]
.LBB2_61:                               ; %Flow1199
                                        ;   in Loop: Header=BB2_59 Depth=2
	s_and_not1_saveexec_b32 s0, s2
	s_cbranch_execz .LBB2_63
; %bb.62:                               ;   in Loop: Header=BB2_59 Depth=2
	v_mul_f64 v[40:41], v[24:25], s[10:11]
	s_mov_b32 s12, s4
	s_mov_b32 s2, s24
	s_mov_b32 s3, s9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[47:48], v[40:41]
	v_fma_f64 v[40:41], v[47:48], s[12:13], v[24:25]
	v_mul_f64 v[42:43], v[47:48], s[24:25]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[61:62], v[47:48], s[24:25], v[40:41]
	v_add_f64 v[49:50], v[40:41], v[42:43]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[40:41], v[40:41], -v[49:50]
	v_add_f64 v[49:50], v[49:50], -v[61:62]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[40:41], v[40:41], v[42:43]
	v_fma_f64 v[42:43], v[47:48], s[2:3], v[42:43]
	v_add_f64 v[40:41], v[49:50], v[40:41]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[40:41], v[40:41], -v[42:43]
	v_fma_f64 v[43:44], v[47:48], s[26:27], v[40:41]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[41:42], v[61:62], v[43:44]
	v_add_f64 v[49:50], v[41:42], -v[61:62]
	v_cvt_i32_f64_e32 v61, v[47:48]
	s_delay_alu instid0(VALU_DEP_2)
	v_add_f64 v[43:44], v[43:44], -v[49:50]
.LBB2_63:                               ; %_ZL3cosd.exit.i.i.3.i146.i
                                        ;   in Loop: Header=BB2_59 Depth=2
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $vgpr62
                                        ; implicit-def: $vgpr47_vgpr48
                                        ; implicit-def: $vgpr49_vgpr50
	s_and_saveexec_b32 s0, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s1, exec_lo, s0
	s_cbranch_execz .LBB2_65
; %bb.64:                               ;   in Loop: Header=BB2_59 Depth=2
	v_cmp_le_f64_e32 vcc_lo, 0x7b000000, v[24:25]
	s_mov_b32 s6, s4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v48, v25, v58 :: v_dual_cndmask_b32 v47, v24, v57
	v_mul_f64 v[49:50], v[55:56], v[47:48]
	v_mul_f64 v[57:58], v[53:54], v[47:48]
	v_mul_f64 v[73:74], v[51:52], v[47:48]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[55:56], v[55:56], v[47:48], -v[49:50]
	v_fma_f64 v[53:54], v[53:54], v[47:48], -v[57:58]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[47:48], v[51:52], v[47:48], -v[73:74]
	v_add_f64 v[62:63], v[57:58], v[55:56]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[67:68], v[62:63], -v[57:58]
	v_add_f64 v[71:72], v[49:50], v[62:63]
	v_add_f64 v[69:70], v[62:63], -v[67:68]
	v_add_f64 v[55:56], v[55:56], -v[67:68]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[67:68], v[71:72], -2
	v_add_f64 v[49:50], v[71:72], -v[49:50]
	v_add_f64 v[57:58], v[57:58], -v[69:70]
	v_add_f64 v[69:70], v[73:74], v[53:54]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[67:68]|
	v_add_f64 v[49:50], v[62:63], -v[49:50]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[55:56], v[55:56], v[57:58]
	v_fract_f64_e32 v[57:58], v[67:68]
	v_add_f64 v[62:63], v[69:70], v[55:56]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v58, 0, v58 :: v_dual_cndmask_b32 v57, 0, v57
	v_ldexp_f64 v[57:58], v[57:58], 2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[67:68], v[49:50], v[62:63]
	v_add_f64 v[75:76], v[62:63], -v[69:70]
	v_add_f64 v[71:72], v[67:68], v[57:58]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[81:82], v[62:63], -v[75:76]
	v_add_f64 v[55:56], v[55:56], -v[75:76]
	v_add_f64 v[49:50], v[67:68], -v[49:50]
	v_cmp_gt_f64_e32 vcc_lo, 0, v[71:72]
	v_add_f64 v[71:72], v[69:70], -v[73:74]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[49:50], v[62:63], -v[49:50]
	v_cndmask_b32_e64 v40, 0, 0x40100000, vcc_lo
	v_add_f64 v[79:80], v[69:70], -v[71:72]
	v_add_f64 v[53:54], v[53:54], -v[71:72]
	v_add_f64 v[69:70], v[69:70], -v[81:82]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[57:58], v[57:58], v[39:40]
	v_add_f64 v[71:72], v[73:74], -v[79:80]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[55:56], v[55:56], v[69:70]
	v_add_f64 v[77:78], v[67:68], v[57:58]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[53:54], v[53:54], v[71:72]
	v_cvt_i32_f64_e32 v40, v[77:78]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[51:52], v[53:54], v[55:56]
	v_cvt_f64_i32_e32 v[75:76], v40
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[47:48], v[47:48], v[51:52]
	v_add_f64 v[57:58], v[57:58], -v[75:76]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[47:48], v[49:50], v[47:48]
	v_add_f64 v[53:54], v[67:68], v[57:58]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[51:52], v[53:54], -v[57:58]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[53:54]
	v_add_f64 v[49:50], v[67:68], -v[51:52]
	v_add_co_ci_u32_e64 v62, s0, 0, v40, vcc_lo
	v_cndmask_b32_e64 v40, 0, 0x3ff00000, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[47:48], v[47:48], v[49:50]
	v_add_f64 v[49:50], v[53:54], -v[39:40]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[51:52], v[49:50], v[47:48]
	v_mul_f64 v[53:54], v[51:52], s[6:7]
	v_add_f64 v[49:50], v[51:52], -v[49:50]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[55:56], v[51:52], s[6:7], -v[53:54]
	v_add_f64 v[47:48], v[47:48], -v[49:50]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[49:50], v[51:52], s[8:9], v[55:56]
	v_fma_f64 v[49:50], v[47:48], s[6:7], v[49:50]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[47:48], v[53:54], v[49:50]
	v_add_f64 v[51:52], v[47:48], -v[53:54]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[49:50], v[49:50], -v[51:52]
.LBB2_65:                               ; %Flow1198
                                        ;   in Loop: Header=BB2_59 Depth=2
	s_and_not1_saveexec_b32 s0, s1
	s_cbranch_execz .LBB2_67
; %bb.66:                               ;   in Loop: Header=BB2_59 Depth=2
	v_mul_f64 v[47:48], v[24:25], s[10:11]
	s_mov_b32 s12, s4
	s_mov_b32 s2, s24
	s_mov_b32 s3, s9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[51:52], v[47:48]
	v_fma_f64 v[47:48], v[51:52], s[12:13], v[24:25]
	v_mul_f64 v[49:50], v[51:52], s[24:25]
	v_cvt_i32_f64_e32 v62, v[51:52]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[55:56], v[51:52], s[24:25], v[47:48]
	v_add_f64 v[53:54], v[47:48], v[49:50]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[47:48], v[47:48], -v[53:54]
	v_add_f64 v[53:54], v[53:54], -v[55:56]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[47:48], v[47:48], v[49:50]
	v_fma_f64 v[49:50], v[51:52], s[2:3], v[49:50]
	v_add_f64 v[47:48], v[53:54], v[47:48]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[47:48], v[47:48], -v[49:50]
	v_fma_f64 v[49:50], v[51:52], s[26:27], v[47:48]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[47:48], v[55:56], v[49:50]
	v_add_f64 v[53:54], v[47:48], -v[55:56]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[49:50], v[49:50], -v[53:54]
.LBB2_67:                               ; %_ZL3sind.exit.i.i.3.i151.i
                                        ;   in Loop: Header=BB2_59 Depth=2
	s_or_b32 exec_lo, exec_lo, s0
	v_add_co_u32 v45, vcc_lo, v45, v21
	v_add_co_ci_u32_e32 v46, vcc_lo, v46, v22, vcc_lo
	s_mov_b32 s69, s29
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_f64 v[83:84], v[43:44], 0.5
	v_mul_f64 v[91:92], v[49:50], 0.5
	s_delay_alu instid0(VALU_DEP_3)
	v_lshrrev_b64 v[45:46], 11, v[45:46]
	s_mov_b32 s70, s28
	s_mov_b32 s72, s28
	v_cmp_lg_f64_e64 s0, 0x7ff00000, v[24:25]
	s_cmp_eq_u32 s75, 4
	v_xor_b32_e32 v38, v38, v22
	v_cvt_f64_u32_e32 v[51:52], v46
	v_cvt_f64_u32_e32 v[45:46], v45
	v_xor_b32_e32 v37, v37, v21
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[51:52], v[51:52], 32
	v_add_f64 v[45:46], v[51:52], v[45:46]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[45:46], v[45:46], 0xffffffcb
	v_frexp_mant_f64_e32 v[51:52], v[45:46]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f64_e32 vcc_lo, s[28:29], v[51:52]
	v_cndmask_b32_e64 v40, 0, 1, vcc_lo
	v_ldexp_f64 v[51:52], v[51:52], v40
	v_frexp_exp_i32_f64_e32 v40, v[45:46]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[53:54], v[51:52], 1.0
	v_add_f64 v[67:68], v[51:52], -1.0
	v_subrev_co_ci_u32_e32 v40, vcc_lo, 0, v40, vcc_lo
	v_cmp_eq_f64_e32 vcc_lo, 0x7ff00000, v[45:46]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[55:56], v[53:54]
	v_add_f64 v[69:70], v[53:54], -1.0
	v_add_f64 v[51:52], v[51:52], -v[69:70]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[57:58], -v[53:54], v[55:56], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[55:56], v[57:58], v[55:56], v[55:56]
	v_fma_f64 v[57:58], -v[53:54], v[55:56], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[55:56], v[57:58], v[55:56], v[55:56]
	v_mul_f64 v[57:58], v[67:68], v[55:56]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[71:72], v[53:54], v[57:58]
	v_fma_f64 v[53:54], v[57:58], v[53:54], -v[71:72]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[51:52], v[57:58], v[51:52], v[53:54]
	v_add_f64 v[53:54], v[71:72], v[51:52]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[69:70], v[67:68], -v[53:54]
	v_add_f64 v[71:72], v[53:54], -v[71:72]
	v_add_f64 v[67:68], v[67:68], -v[69:70]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[51:52], v[71:72], -v[51:52]
	v_add_f64 v[53:54], v[67:68], -v[53:54]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[51:52], v[51:52], v[53:54]
	v_add_f64 v[51:52], v[69:70], v[51:52]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[51:52], v[55:56], v[51:52]
	v_add_f64 v[53:54], v[57:58], v[51:52]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[55:56], v[53:54], v[53:54]
	v_fma_f64 v[67:68], v[55:56], s[34:35], s[30:31]
	v_mul_f64 v[69:70], v[53:54], v[55:56]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[67:68], v[55:56], v[67:68], s[36:37]
	v_fma_f64 v[67:68], v[55:56], v[67:68], s[38:39]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[67:68], v[55:56], v[67:68], s[40:41]
	v_fma_f64 v[67:68], v[55:56], v[67:68], s[42:43]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[55:56], v[55:56], v[67:68], s[68:69]
	v_ldexp_f64 v[67:68], v[53:54], 1
	v_add_f64 v[53:54], v[53:54], -v[57:58]
	v_mul_f64 v[55:56], v[69:70], v[55:56]
	v_cvt_f64_i32_e32 v[69:70], v40
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[51:52], v[51:52], -v[53:54]
	v_add_f64 v[57:58], v[67:68], v[55:56]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[71:72], v[69:70], s[44:45]
	v_ldexp_f64 v[51:52], v[51:52], 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[53:54], v[57:58], -v[67:68]
	v_fma_f64 v[67:68], v[69:70], s[44:45], -v[71:72]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[53:54], v[55:56], -v[53:54]
	v_fma_f64 v[55:56], v[69:70], s[46:47], v[67:68]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[51:52], v[51:52], v[53:54]
	v_add_f64 v[53:54], v[71:72], v[55:56]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[67:68], v[57:58], v[51:52]
	v_add_f64 v[71:72], v[53:54], -v[71:72]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[69:70], v[53:54], v[67:68]
	v_add_f64 v[57:58], v[67:68], -v[57:58]
	v_add_f64 v[55:56], v[55:56], -v[71:72]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[73:74], v[69:70], -v[53:54]
	v_add_f64 v[51:52], v[51:52], -v[57:58]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[75:76], v[69:70], -v[73:74]
	v_add_f64 v[57:58], v[67:68], -v[73:74]
	v_add_f64 v[67:68], v[55:56], v[51:52]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[53:54], v[53:54], -v[75:76]
	v_add_f64 v[53:54], v[57:58], v[53:54]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[57:58], v[67:68], -v[55:56]
	v_add_f64 v[53:54], v[67:68], v[53:54]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[67:68], v[67:68], -v[57:58]
	v_add_f64 v[51:52], v[51:52], -v[57:58]
	v_add_f64 v[71:72], v[69:70], v[53:54]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[55:56], v[55:56], -v[67:68]
	v_add_f64 v[57:58], v[71:72], -v[69:70]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[51:52], v[51:52], v[55:56]
	v_mul_f64 v[55:56], v[47:48], v[47:48]
	v_add_f64 v[53:54], v[53:54], -v[57:58]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mul_f64 v[77:78], v[55:56], 0.5
	v_fma_f64 v[79:80], v[55:56], s[50:51], s[48:49]
	v_add_f64 v[51:52], v[51:52], v[53:54]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[89:90], -v[77:78], 1.0
	v_fma_f64 v[79:80], v[55:56], v[79:80], s[52:53]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[51:52], v[71:72], v[51:52]
	v_fma_f64 v[71:72], v[55:56], s[60:61], s[58:59]
	v_fma_f64 v[79:80], v[55:56], v[79:80], s[54:55]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_dual_cndmask_b32 v52, v52, v46 :: v_dual_cndmask_b32 v51, v51, v45
	v_cmp_ngt_f64_e32 vcc_lo, 0, v[45:46]
	v_fma_f64 v[71:72], v[55:56], v[71:72], s[62:63]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[79:80], v[55:56], v[79:80], s[56:57]
	v_mul_f64 v[51:52], v[51:52], -2.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[71:72], v[55:56], v[71:72], s[64:65]
	v_cndmask_b32_e32 v40, 0x7ff80000, v52, vcc_lo
	v_cmp_nge_f64_e32 vcc_lo, 0, v[45:46]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_fma_f64 v[71:72], v[55:56], v[71:72], s[66:67]
	v_cndmask_b32_e32 v51, 0, v51, vcc_lo
	v_cmp_neq_f64_e32 vcc_lo, 0, v[45:46]
	v_mul_f64 v[45:46], v[41:42], v[41:42]
	v_cndmask_b32_e32 v52, 0x7ff00000, v40, vcc_lo
	v_fma_f64 v[53:54], v[45:46], s[60:61], s[58:59]
	v_mul_f64 v[67:68], v[45:46], 0.5
	v_fma_f64 v[69:70], v[45:46], s[50:51], s[48:49]
	v_mul_f64 v[85:86], v[41:42], -v[45:46]
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[51:52]
	v_fma_f64 v[53:54], v[45:46], v[53:54], s[62:63]
	v_add_f64 v[75:76], -v[67:68], 1.0
	v_fma_f64 v[69:70], v[45:46], v[69:70], s[52:53]
	v_cndmask_b32_e64 v40, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v40, 8, v40
	v_ldexp_f64 v[51:52], v[51:52], v40
	v_fma_f64 v[53:54], v[45:46], v[53:54], s[64:65]
	v_add_f64 v[87:88], -v[75:76], 1.0
	v_fma_f64 v[69:70], v[45:46], v[69:70], s[54:55]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_rsq_f64_e32 v[57:58], v[51:52]
	v_cmp_class_f64_e64 s1, v[51:52], 0x260
	v_fma_f64 v[53:54], v[45:46], v[53:54], s[66:67]
	s_delay_alu instid0(VALU_DEP_4)
	v_add_f64 v[67:68], v[87:88], -v[67:68]
	v_add_f64 v[87:88], -v[89:90], 1.0
	v_fma_f64 v[69:70], v[45:46], v[69:70], s[56:57]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[73:74], v[51:52], v[57:58]
	v_mul_f64 v[57:58], v[57:58], 0.5
	v_fma_f64 v[53:54], v[85:86], v[53:54], v[83:84]
	v_mul_f64 v[83:84], v[47:48], -v[55:56]
	v_add_f64 v[77:78], v[87:88], -v[77:78]
	v_mul_f64 v[87:88], v[45:46], v[45:46]
	v_fma_f64 v[69:70], v[45:46], v[69:70], s[70:71]
	v_fma_f64 v[67:68], v[41:42], -v[43:44], v[67:68]
	v_fma_f64 v[81:82], -v[57:58], v[73:74], 0.5
	v_fma_f64 v[43:44], v[45:46], v[53:54], -v[43:44]
	v_fma_f64 v[71:72], v[83:84], v[71:72], v[91:92]
	v_mul_f64 v[53:54], v[55:56], v[55:56]
	v_fma_f64 v[77:78], v[47:48], -v[49:50], v[77:78]
	v_fma_f64 v[73:74], v[73:74], v[81:82], v[73:74]
	v_fma_f64 v[57:58], v[57:58], v[81:82], v[57:58]
	v_fma_f64 v[43:44], v[85:86], s[72:73], v[43:44]
	v_fma_f64 v[49:50], v[55:56], v[71:72], -v[49:50]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[81:82], -v[73:74], v[73:74], v[51:52]
	v_add_f64 v[40:41], v[41:42], -v[43:44]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[49:50], v[83:84], s[72:73], v[49:50]
	v_fma_f64 v[45:46], v[81:82], v[57:58], v[73:74]
	v_fma_f64 v[73:74], v[55:56], v[79:80], s[70:71]
	v_fma_f64 v[55:56], v[87:88], v[69:70], v[67:68]
	v_xor_b32_e32 v41, 0x80000000, v41
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[67:68], -v[45:46], v[45:46], v[51:52]
	v_fma_f64 v[53:54], v[53:54], v[73:74], v[77:78]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[55:56], v[75:76], v[55:56]
	v_fma_f64 v[42:43], v[67:68], v[57:58], v[45:46]
	s_delay_alu instid0(VALU_DEP_3)
	v_add_f64 v[44:45], v[89:90], v[53:54]
	v_add_f64 v[46:47], v[47:48], -v[49:50]
	v_and_b32_e32 v49, 1, v62
	v_cndmask_b32_e64 v53, 0, 0xffffff80, vcc_lo
	v_and_b32_e32 v57, 1, v61
	v_lshlrev_b32_e32 v48, 30, v62
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_eq_u32_e32 vcc_lo, 0, v57
	v_xor_b32_e32 v25, v48, v25
	v_dual_cndmask_b32 v40, v40, v55 :: v_dual_cndmask_b32 v41, v41, v56
	v_cmp_eq_u32_e32 vcc_lo, 0, v49
	v_lshlrev_b32_e32 v24, 30, v61
	v_ldexp_f64 v[42:43], v[42:43], v53
	s_delay_alu instid0(VALU_DEP_2)
	v_dual_cndmask_b32 v45, v45, v47 :: v_dual_and_b32 v24, 0x80000000, v24
	v_cndmask_b32_e32 v44, v44, v46, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	v_and_b32_e32 v48, 0x80000000, v25
	s_cmp_eq_u32 s75, 3
	v_xor_b32_e32 v41, v41, v24
	v_cndmask_b32_e64 v24, 0, v40, s0
	v_cndmask_b32_e64 v21, 0, v44, s0
	s_delay_alu instid0(VALU_DEP_3)
	v_cndmask_b32_e64 v25, 0x7ff80000, v41, s0
	v_cndmask_b32_e64 v41, v43, v52, s1
	v_cndmask_b32_e64 v40, v42, v51, s1
	v_lshlrev_b64 v[42:43], 17, v[35:36]
	v_xor_b32_e32 v36, v38, v36
	v_xor_b32_e32 v35, v37, v35
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[24:25], v[40:41], v[24:25]
	v_cndmask_b32_e32 v19, v19, v24, vcc_lo
	v_xor_b32_e32 v45, v45, v48
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v20, v20, v25, vcc_lo
	v_cndmask_b32_e64 v22, 0x7ff80000, v45, s0
	s_cselect_b32 s0, -1, 0
	s_cmp_eq_u32 s75, 2
	v_cndmask_b32_e64 v18, v18, v25, s0
	s_cselect_b32 s1, -1, 0
	v_mul_f64 v[44:45], v[40:41], v[21:22]
	v_xor_b32_e32 v22, v36, v60
	v_xor_b32_e32 v21, v35, v23
	v_xor_b32_e32 v40, v38, v43
	v_xor_b32_e32 v41, v37, v42
	v_lshlrev_b64 v[37:38], 17, v[35:36]
	s_cmp_eq_u32 s75, 1
	v_lshrrev_b64 v[42:43], 19, v[21:22]
	v_xor_b32_e32 v23, v40, v59
	v_xor_b32_e32 v46, v41, v26
	v_xor_b32_e32 v40, v21, v26
	v_lshlrev_b32_e32 v26, 13, v21
	v_xor_b32_e32 v41, v22, v59
	s_cselect_b32 s2, -1, 0
	s_cmp_eq_u32 s75, 0
	v_xor_b32_e32 v35, v46, v35
	s_cselect_b32 s3, -1, 0
	v_xor_b32_e32 v37, v46, v37
	v_mov_b32_e32 v21, v40
	v_xor_b32_e32 v36, v23, v36
	v_xor_b32_e32 v38, v23, v38
	v_mov_b32_e32 v22, v41
	v_cndmask_b32_e64 v17, v17, v24, s0
	v_cndmask_b32_e64 v16, v16, v25, s1
	v_cndmask_b32_e64 v15, v15, v24, s1
	v_cndmask_b32_e64 v14, v14, v25, s2
	v_cndmask_b32_e64 v13, v13, v24, s2
	v_cndmask_b32_e64 v12, v12, v25, s3
	v_cndmask_b32_e64 v11, v11, v24, s3
	s_add_i32 s75, s75, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s75, 5
	v_cndmask_b32_e32 v9, v9, v44, vcc_lo
	v_or_b32_e32 v43, v26, v43
	v_cndmask_b32_e32 v10, v10, v45, vcc_lo
	v_cndmask_b32_e64 v8, v8, v45, s0
	v_cndmask_b32_e64 v6, v6, v45, s1
	v_cndmask_b32_e64 v4, v4, v45, s2
	v_cndmask_b32_e64 v2, v2, v45, s3
	v_mov_b32_e32 v46, v43
	v_cndmask_b32_e64 v7, v7, v44, s0
	v_cndmask_b32_e64 v5, v5, v44, s1
	v_cndmask_b32_e64 v3, v3, v44, s2
	v_cndmask_b32_e64 v1, v1, v44, s3
	v_mov_b32_e32 v45, v42
	s_cbranch_scc1 .LBB2_59
; %bb.68:                               ; %.lr.ph.i.i.3.i158.i.preheader
                                        ;   in Loop: Header=BB2_58 Depth=1
	v_mov_b32_e32 v21, 0
	v_mov_b32_e32 v22, 0
	s_mov_b32 s3, 0
.LBB2_69:                               ; %.lr.ph.i.i.3.i158.i
                                        ;   Parent Loop BB2_58 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB2_70 Depth 3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s3, 1
	s_mov_b32 s6, s3
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s3, 2
	v_dual_cndmask_b32 v23, v12, v14 :: v_dual_cndmask_b32 v24, v11, v13
	v_dual_cndmask_b32 v25, v2, v4 :: v_dual_cndmask_b32 v26, v1, v3
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s3, 3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v23, v23, v16 :: v_dual_cndmask_b32 v24, v24, v15
	v_dual_cndmask_b32 v25, v25, v6 :: v_dual_cndmask_b32 v26, v26, v5
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s3, 4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v23, v23, v18 :: v_dual_cndmask_b32 v44, v24, v17
	v_cndmask_b32_e32 v25, v25, v8, vcc_lo
	v_cndmask_b32_e32 v45, v26, v7, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_cndmask_b32 v24, v23, v20 :: v_dual_cndmask_b32 v23, v44, v19
	v_cndmask_b32_e32 v26, v25, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_cndmask_b32_e32 v25, v45, v9, vcc_lo
.LBB2_70:                               ;   Parent Loop BB2_58 Depth=1
                                        ;     Parent Loop BB2_69 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_add_i32 s6, s6, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s6, 1
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s6, 2
	v_dual_cndmask_b32 v44, v12, v14 :: v_dual_cndmask_b32 v45, v2, v4
	v_cndmask_b32_e32 v46, v1, v3, vcc_lo
	s_cselect_b32 s0, -1, 0
	s_cmp_eq_u32 s6, 3
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e64 v44, v44, v16, s0
	v_cndmask_b32_e64 v45, v45, v6, s0
	v_cndmask_b32_e64 v46, v46, v5, s0
	s_cselect_b32 s1, -1, 0
	s_cmp_eq_u32 s6, 4
	v_cndmask_b32_e64 v44, v44, v18, s1
	v_cndmask_b32_e64 v47, v45, v8, s1
	v_cndmask_b32_e64 v46, v46, v7, s1
	s_cselect_b32 s2, -1, 0
	s_cmp_lt_u32 s6, 4
	v_cndmask_b32_e64 v45, v44, v20, s2
	v_cndmask_b32_e64 v47, v47, v10, s2
	v_cndmask_b32_e64 v46, v46, v9, s2
	v_cndmask_b32_e32 v44, v11, v13, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[46:47], v[25:26], -v[46:47]
	v_cndmask_b32_e64 v44, v44, v15, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v44, v44, v17, s1
	v_cndmask_b32_e64 v44, v44, v19, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[44:45], v[23:24], -v[44:45]
	v_mul_f64 v[46:47], v[46:47], v[46:47]
	v_fma_f64 v[44:45], v[44:45], v[44:45], v[46:47]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_lt_f64_e32 vcc_lo, v[21:22], v[44:45]
	v_dual_cndmask_b32 v22, v22, v45 :: v_dual_cndmask_b32 v21, v21, v44
	s_cbranch_scc1 .LBB2_70
; %bb.71:                               ; %.loopexit.i.i.3.i164.i
                                        ;   in Loop: Header=BB2_69 Depth=2
	s_add_i32 s3, s3, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s3, 4
	s_cbranch_scc1 .LBB2_69
; %bb.72:                               ;   in Loop: Header=BB2_58 Depth=1
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[21:22]
	s_add_i32 s74, s74, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	s_cmp_lg_u32 s74, 0x10000
	v_cndmask_b32_e64 v23, 0, 1, vcc_lo
	v_lshlrev_b32_e32 v23, 8, v23
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[21:22], v[21:22], v23
	v_rsq_f64_e32 v[23:24], v[21:22]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[25:26], v[21:22], v[23:24]
	v_mul_f64 v[23:24], v[23:24], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[44:45], -v[23:24], v[25:26], 0.5
	v_fma_f64 v[25:26], v[25:26], v[44:45], v[25:26]
	v_fma_f64 v[23:24], v[23:24], v[44:45], v[23:24]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[44:45], -v[25:26], v[25:26], v[21:22]
	v_fma_f64 v[25:26], v[44:45], v[23:24], v[25:26]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[44:45], -v[25:26], v[25:26], v[21:22]
	v_fma_f64 v[23:24], v[44:45], v[23:24], v[25:26]
	v_cndmask_b32_e64 v25, 0, 0xffffff80, vcc_lo
	v_cmp_class_f64_e64 vcc_lo, v[21:22], 0x260
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[23:24], v[23:24], v25
	v_dual_cndmask_b32 v22, v24, v22 :: v_dual_cndmask_b32 v21, v23, v21
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[33:34], v[33:34], v[21:22]
	s_cbranch_scc1 .LBB2_58
; %bb.73:                               ; %_ZNK6thrust11hip_rocprim26transform_input_iterator_tIdNS_17counting_iteratorIjNS_11use_defaultES3_S3_EE11estimate_esEixEl.exit.3.i167.i
	v_add_nc_u32_e32 v1, 0x7f156116, v64
	s_mov_b64 s[4:5], 0
                                        ; implicit-def: $vgpr42_vgpr43
                                        ; implicit-def: $vgpr37_vgpr38
                                        ; implicit-def: $vgpr39_vgpr40
                                        ; implicit-def: $vgpr44_vgpr45
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v2, 19, v1
	v_xor3_b32 v1, v1, v2, 0xc761c23c
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v1, v1, 5, v1
	v_add_nc_u32_e32 v2, 0xe9f8cc1d, v1
	v_lshl_add_u32 v1, v1, 9, 0xaccf6200
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v1, v2, v1
	v_lshlrev_b32_e32 v2, 3, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v1, v1, v2, 0xfd7046c5
	v_lshrrev_b32_e32 v2, 16, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_xor3_b32 v1, v1, v2, 0xb55a4f09
.LBB2_74:                               ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v2, 12, v1
	s_cmp_eq_u32 s4, 0
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s4, 1
	v_add3_u32 v1, v1, v2, 0x7ed55d16
	s_cselect_b32 s0, -1, 0
	s_cmp_eq_u32 s4, 2
	s_cselect_b32 s1, -1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v2, 19, v1
	s_cmp_eq_u32 s4, 3
	s_cselect_b32 s2, -1, 0
	s_add_u32 s4, s4, 1
	v_xor3_b32 v1, v1, v2, 0xc761c23c
	s_addc_u32 s5, s5, 0
	s_cmp_lg_u32 s4, 4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v1, v1, 5, v1
	v_add_nc_u32_e32 v2, 0xe9f8cc1d, v1
	v_lshl_add_u32 v1, v1, 9, 0xaccf6200
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v1, v2, v1
	v_lshlrev_b32_e32 v2, 3, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v1, v1, v2, 0xfd7046c5
	v_lshrrev_b32_e32 v2, 16, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor3_b32 v1, v1, v2, 0xb55a4f09
	v_lshlrev_b32_e32 v3, 12, v1
	v_xor_b32_e32 v2, s23, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add3_u32 v1, v1, v3, 0x7ed55d16
	v_cndmask_b32_e32 v43, v43, v2, vcc_lo
	v_cndmask_b32_e64 v38, v38, v2, s0
	v_cndmask_b32_e64 v40, v40, v2, s1
	v_cndmask_b32_e64 v45, v45, v2, s2
	v_lshrrev_b32_e32 v3, 19, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor3_b32 v1, v1, v3, 0xc761c23c
	v_lshl_add_u32 v1, v1, 5, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v3, 0xe9f8cc1d, v1
	v_lshl_add_u32 v1, v1, 9, 0xaccf6200
	v_xor_b32_e32 v1, v3, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v3, 3, v1
	v_add3_u32 v1, v1, v3, 0xfd7046c5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v3, 16, v1
	v_xor3_b32 v1, v1, v3, 0xb55a4f09
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v2, s22, v1
	v_cndmask_b32_e32 v42, v42, v2, vcc_lo
	v_cndmask_b32_e64 v37, v37, v2, s0
	v_cndmask_b32_e64 v39, v39, v2, s1
	v_cndmask_b32_e64 v44, v44, v2, s2
	s_cbranch_scc1 .LBB2_74
; %bb.75:                               ; %.preheader55.i.i.4.i172.i.preheader
	v_mov_b32_e32 v35, 0
	v_dual_mov_b32 v36, 0 :: v_dual_mov_b32 v41, 0
	s_mov_b32 s4, 0x54442d18
	s_mov_b32 s8, 0x33145c07
	s_mov_b32 s10, 0x6dc9c883
	s_mov_b32 s24, 0x33145c00
	s_mov_b32 s26, 0x252049c0
	s_mov_b32 s28, 0x55555555
	s_mov_b32 s30, 0x6b47b09a
	s_mov_b32 s34, 0xbf559e2b
	s_mov_b32 s36, 0xd7f4df2e
	s_mov_b32 s38, 0x16291751
	s_mov_b32 s40, 0x9b27acf1
	s_mov_b32 s42, 0x998ef7b6
	s_mov_b32 s44, 0xfefa39ef
	s_mov_b32 s46, 0x3b39803f
	s_mov_b32 s48, 0x9037ab78
	s_mov_b32 s50, 0x46cc5e42
	s_mov_b32 s52, 0xa17f65f6
	s_mov_b32 s54, 0x19f4ec90
	s_mov_b32 s56, 0x16c16967
	s_mov_b32 s58, 0xb42fdfa7
	s_mov_b32 s60, 0xf9a43bb8
	s_mov_b32 s62, 0x796cde01
	s_mov_b32 s64, 0x19e83e5c
	s_mov_b32 s66, 0x11110bb3
	s_mov_b32 s74, 0
	s_mov_b32 s5, 0x401921fb
	s_mov_b32 s7, 0x3ff921fb
	s_mov_b32 s9, 0x3c91a626
	s_mov_b32 s11, 0x3fe45f30
	s_mov_b32 s13, 0xbff921fb
	s_mov_b32 s25, 0xbc91a626
	s_mov_b32 s27, 0xb97b839a
	s_mov_b32 s29, 0x3fe55555
	s_mov_b32 s31, 0x3fc38538
	s_mov_b32 s35, 0x3fc3ab76
	s_mov_b32 s37, 0x3fc7474d
	s_mov_b32 s39, 0x3fcc71c0
	s_mov_b32 s41, 0x3fd24924
	s_mov_b32 s43, 0x3fd99999
	s_mov_b32 s45, 0x3fe62e42
	s_mov_b32 s47, 0x3c7abc9e
	s_mov_b32 s49, 0x3e21eeb6
	s_mov_b32 s51, 0xbda907db
	s_mov_b32 s53, 0xbe927e4f
	s_mov_b32 s55, 0x3efa01a0
	s_mov_b32 s57, 0xbf56c16c
	s_mov_b32 s59, 0xbe5ae600
	s_mov_b32 s61, 0x3de5e0b2
	s_mov_b32 s63, 0x3ec71de3
	s_mov_b32 s65, 0xbf2a01a0
	s_mov_b32 s67, 0x3f811111
	s_mov_b32 s68, 0x55555780
	s_mov_b32 s71, 0x3fa55555
	s_mov_b32 s73, 0xbfc55555
                                        ; implicit-def: $vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16
                                        ; implicit-def: $vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26
.LBB2_76:                               ; %.preheader55.i.i.4.i172.i
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB2_77 Depth 2
                                        ;     Child Loop BB2_87 Depth 2
                                        ;       Child Loop BB2_88 Depth 3
	v_dual_mov_b32 v21, v42 :: v_dual_mov_b32 v22, v43
	v_dual_mov_b32 v48, v45 :: v_dual_mov_b32 v47, v44
	s_mov_b32 s75, 0
.LBB2_77:                               ;   Parent Loop BB2_76 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v43, v38, v48
	v_xor_b32_e32 v42, v37, v47
                                        ; implicit-def: $vgpr63
                                        ; implicit-def: $vgpr45_vgpr46
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v61, v43, v22
	v_lshrrev_b64 v[23:24], 19, v[42:43]
	v_lshlrev_b32_e32 v25, 13, v42
	v_xor_b32_e32 v26, v42, v21
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_or_b32_e32 v62, v25, v24
	v_add_co_u32 v24, vcc_lo, v23, v26
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v25, vcc_lo, v62, v61, vcc_lo
	v_lshrrev_b64 v[24:25], 11, v[24:25]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_u32_e32 v[42:43], v25
	v_cvt_f64_u32_e32 v[24:25], v24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[42:43], v[42:43], 32
	v_add_f64 v[24:25], v[42:43], v[24:25]
                                        ; implicit-def: $vgpr43_vgpr44
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[24:25], v[24:25], 0xffffffcb
	v_mul_f64 v[24:25], v[24:25], s[4:5]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ngt_f64_e32 vcc_lo, 0x41d00000, v[24:25]
	v_trig_preop_f64 v[57:58], v[24:25], 0
	v_trig_preop_f64 v[55:56], v[24:25], 1
	v_ldexp_f64 v[59:60], v[24:25], 0xffffff80
	v_trig_preop_f64 v[53:54], v[24:25], 2
	s_and_saveexec_b32 s0, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s2, exec_lo, s0
	s_cbranch_execz .LBB2_79
; %bb.78:                               ;   in Loop: Header=BB2_77 Depth=2
	v_cmp_le_f64_e64 s0, 0x7b000000, v[24:25]
	s_mov_b32 s6, s4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v44, v25, v60, s0
	v_cndmask_b32_e64 v43, v24, v59, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_f64 v[45:46], v[57:58], v[43:44]
	v_mul_f64 v[49:50], v[55:56], v[43:44]
	v_mul_f64 v[75:76], v[53:54], v[43:44]
	v_fma_f64 v[51:52], v[57:58], v[43:44], -v[45:46]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[77:78], v[55:56], v[43:44], -v[49:50]
	v_add_f64 v[67:68], v[49:50], v[51:52]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[69:70], v[67:68], -v[49:50]
	v_add_f64 v[73:74], v[45:46], v[67:68]
	v_add_f64 v[71:72], v[67:68], -v[69:70]
	v_add_f64 v[51:52], v[51:52], -v[69:70]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[69:70], v[73:74], -2
	v_add_f64 v[45:46], v[73:74], -v[45:46]
	v_add_f64 v[49:50], v[49:50], -v[71:72]
	v_add_f64 v[71:72], v[75:76], v[77:78]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cmp_neq_f64_e64 s0, 0x7ff00000, |v[69:70]|
	v_add_f64 v[45:46], v[67:68], -v[45:46]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[49:50], v[51:52], v[49:50]
	v_fract_f64_e32 v[51:52], v[69:70]
	v_add_f64 v[67:68], v[71:72], v[49:50]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v52, 0, v52, s0
	v_cndmask_b32_e64 v51, 0, v51, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[51:52], v[51:52], 2
	v_add_f64 v[69:70], v[45:46], v[67:68]
	v_add_f64 v[79:80], v[67:68], -v[71:72]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[73:74], v[69:70], v[51:52]
	v_add_f64 v[85:86], v[67:68], -v[79:80]
	v_add_f64 v[49:50], v[49:50], -v[79:80]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cmp_gt_f64_e64 s0, 0, v[73:74]
	v_add_f64 v[73:74], v[71:72], -v[75:76]
	v_cndmask_b32_e64 v42, 0, 0x40100000, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[83:84], v[71:72], -v[73:74]
	v_add_f64 v[73:74], v[77:78], -v[73:74]
	v_add_f64 v[71:72], v[71:72], -v[85:86]
	v_add_f64 v[51:52], v[51:52], v[41:42]
	v_fma_f64 v[42:43], v[53:54], v[43:44], -v[75:76]
	v_add_f64 v[44:45], v[69:70], -v[45:46]
	v_add_f64 v[77:78], v[75:76], -v[83:84]
	v_add_f64 v[49:50], v[49:50], v[71:72]
	v_add_f64 v[81:82], v[69:70], v[51:52]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[44:45], v[67:68], -v[44:45]
	v_add_f64 v[73:74], v[73:74], v[77:78]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_i32_f64_e32 v63, v[81:82]
	v_add_f64 v[49:50], v[73:74], v[49:50]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_i32_e32 v[79:80], v63
	v_add_f64 v[42:43], v[42:43], v[49:50]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[51:52], v[51:52], -v[79:80]
	v_add_f64 v[43:44], v[44:45], v[42:43]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[71:72], v[69:70], v[51:52]
	v_add_f64 v[49:50], v[71:72], -v[51:52]
	v_cmp_le_f64_e64 s0, 0.5, v[71:72]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[45:46], v[69:70], -v[49:50]
	v_cndmask_b32_e64 v42, 0, 0x3ff00000, s0
	v_add_co_ci_u32_e64 v63, s1, 0, v63, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[43:44], v[43:44], v[45:46]
	v_add_f64 v[45:46], v[71:72], -v[41:42]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[49:50], v[45:46], v[43:44]
	v_mul_f64 v[51:52], v[49:50], s[6:7]
	v_add_f64 v[45:46], v[49:50], -v[45:46]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[67:68], v[49:50], s[6:7], -v[51:52]
	v_add_f64 v[42:43], v[43:44], -v[45:46]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[44:45], v[49:50], s[8:9], v[67:68]
	v_fma_f64 v[45:46], v[42:43], s[6:7], v[44:45]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[43:44], v[51:52], v[45:46]
	v_add_f64 v[49:50], v[43:44], -v[51:52]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[45:46], v[45:46], -v[49:50]
.LBB2_79:                               ; %Flow1197
                                        ;   in Loop: Header=BB2_77 Depth=2
	s_and_not1_saveexec_b32 s0, s2
	s_cbranch_execz .LBB2_81
; %bb.80:                               ;   in Loop: Header=BB2_77 Depth=2
	v_mul_f64 v[42:43], v[24:25], s[10:11]
	s_mov_b32 s12, s4
	s_mov_b32 s2, s24
	s_mov_b32 s3, s9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[49:50], v[42:43]
	v_fma_f64 v[42:43], v[49:50], s[12:13], v[24:25]
	v_mul_f64 v[44:45], v[49:50], s[24:25]
	v_cvt_i32_f64_e32 v63, v[49:50]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[67:68], v[49:50], s[24:25], v[42:43]
	v_add_f64 v[51:52], v[42:43], v[44:45]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[42:43], v[42:43], -v[51:52]
	v_add_f64 v[51:52], v[51:52], -v[67:68]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[42:43], v[42:43], v[44:45]
	v_fma_f64 v[44:45], v[49:50], s[2:3], v[44:45]
	v_add_f64 v[42:43], v[51:52], v[42:43]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[42:43], v[42:43], -v[44:45]
	v_fma_f64 v[45:46], v[49:50], s[26:27], v[42:43]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[43:44], v[67:68], v[45:46]
	v_add_f64 v[51:52], v[43:44], -v[67:68]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[45:46], v[45:46], -v[51:52]
.LBB2_81:                               ; %_ZL3cosd.exit.i.i.4.i182.i
                                        ;   in Loop: Header=BB2_77 Depth=2
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $vgpr65
                                        ; implicit-def: $vgpr49_vgpr50
                                        ; implicit-def: $vgpr51_vgpr52
	s_and_saveexec_b32 s0, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s1, exec_lo, s0
	s_cbranch_execz .LBB2_83
; %bb.82:                               ;   in Loop: Header=BB2_77 Depth=2
	v_cmp_le_f64_e32 vcc_lo, 0x7b000000, v[24:25]
	s_mov_b32 s6, s4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v50, v25, v60 :: v_dual_cndmask_b32 v49, v24, v59
	v_mul_f64 v[51:52], v[57:58], v[49:50]
	v_mul_f64 v[59:60], v[55:56], v[49:50]
	v_mul_f64 v[75:76], v[53:54], v[49:50]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[57:58], v[57:58], v[49:50], -v[51:52]
	v_fma_f64 v[55:56], v[55:56], v[49:50], -v[59:60]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[49:50], v[53:54], v[49:50], -v[75:76]
	v_add_f64 v[67:68], v[59:60], v[57:58]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[69:70], v[67:68], -v[59:60]
	v_add_f64 v[73:74], v[51:52], v[67:68]
	v_add_f64 v[71:72], v[67:68], -v[69:70]
	v_add_f64 v[57:58], v[57:58], -v[69:70]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[69:70], v[73:74], -2
	v_add_f64 v[51:52], v[73:74], -v[51:52]
	v_add_f64 v[59:60], v[59:60], -v[71:72]
	v_add_f64 v[71:72], v[75:76], v[55:56]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[69:70]|
	v_add_f64 v[51:52], v[67:68], -v[51:52]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[57:58], v[57:58], v[59:60]
	v_fract_f64_e32 v[59:60], v[69:70]
	v_add_f64 v[67:68], v[71:72], v[57:58]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v60, 0, v60 :: v_dual_cndmask_b32 v59, 0, v59
	v_ldexp_f64 v[59:60], v[59:60], 2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[69:70], v[51:52], v[67:68]
	v_add_f64 v[77:78], v[67:68], -v[71:72]
	v_add_f64 v[73:74], v[69:70], v[59:60]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[83:84], v[67:68], -v[77:78]
	v_add_f64 v[57:58], v[57:58], -v[77:78]
	v_add_f64 v[51:52], v[69:70], -v[51:52]
	v_cmp_gt_f64_e32 vcc_lo, 0, v[73:74]
	v_add_f64 v[73:74], v[71:72], -v[75:76]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[51:52], v[67:68], -v[51:52]
	v_cndmask_b32_e64 v42, 0, 0x40100000, vcc_lo
	v_add_f64 v[81:82], v[71:72], -v[73:74]
	v_add_f64 v[55:56], v[55:56], -v[73:74]
	v_add_f64 v[71:72], v[71:72], -v[83:84]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[59:60], v[59:60], v[41:42]
	v_add_f64 v[73:74], v[75:76], -v[81:82]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[57:58], v[57:58], v[71:72]
	v_add_f64 v[79:80], v[69:70], v[59:60]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[55:56], v[55:56], v[73:74]
	v_cvt_i32_f64_e32 v42, v[79:80]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[53:54], v[55:56], v[57:58]
	v_cvt_f64_i32_e32 v[77:78], v42
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[49:50], v[49:50], v[53:54]
	v_add_f64 v[59:60], v[59:60], -v[77:78]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[49:50], v[51:52], v[49:50]
	v_add_f64 v[55:56], v[69:70], v[59:60]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[53:54], v[55:56], -v[59:60]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[55:56]
	v_add_f64 v[51:52], v[69:70], -v[53:54]
	v_add_co_ci_u32_e64 v65, s0, 0, v42, vcc_lo
	v_cndmask_b32_e64 v42, 0, 0x3ff00000, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[49:50], v[49:50], v[51:52]
	v_add_f64 v[51:52], v[55:56], -v[41:42]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[53:54], v[51:52], v[49:50]
	v_mul_f64 v[55:56], v[53:54], s[6:7]
	v_add_f64 v[51:52], v[53:54], -v[51:52]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[57:58], v[53:54], s[6:7], -v[55:56]
	v_add_f64 v[49:50], v[49:50], -v[51:52]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[51:52], v[53:54], s[8:9], v[57:58]
	v_fma_f64 v[51:52], v[49:50], s[6:7], v[51:52]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[49:50], v[55:56], v[51:52]
	v_add_f64 v[53:54], v[49:50], -v[55:56]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[51:52], v[51:52], -v[53:54]
.LBB2_83:                               ; %Flow1196
                                        ;   in Loop: Header=BB2_77 Depth=2
	s_and_not1_saveexec_b32 s0, s1
	s_cbranch_execz .LBB2_85
; %bb.84:                               ;   in Loop: Header=BB2_77 Depth=2
	v_mul_f64 v[49:50], v[24:25], s[10:11]
	s_mov_b32 s12, s4
	s_mov_b32 s2, s24
	s_mov_b32 s3, s9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[53:54], v[49:50]
	v_fma_f64 v[49:50], v[53:54], s[12:13], v[24:25]
	v_mul_f64 v[51:52], v[53:54], s[24:25]
	v_cvt_i32_f64_e32 v65, v[53:54]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[57:58], v[53:54], s[24:25], v[49:50]
	v_add_f64 v[55:56], v[49:50], v[51:52]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[49:50], v[49:50], -v[55:56]
	v_add_f64 v[55:56], v[55:56], -v[57:58]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[49:50], v[49:50], v[51:52]
	v_fma_f64 v[51:52], v[53:54], s[2:3], v[51:52]
	v_add_f64 v[49:50], v[55:56], v[49:50]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[49:50], v[49:50], -v[51:52]
	v_fma_f64 v[51:52], v[53:54], s[26:27], v[49:50]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[49:50], v[57:58], v[51:52]
	v_add_f64 v[55:56], v[49:50], -v[57:58]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[51:52], v[51:52], -v[55:56]
.LBB2_85:                               ; %_ZL3sind.exit.i.i.4.i187.i
                                        ;   in Loop: Header=BB2_77 Depth=2
	s_or_b32 exec_lo, exec_lo, s0
	v_add_co_u32 v47, vcc_lo, v47, v21
	v_add_co_ci_u32_e32 v48, vcc_lo, v48, v22, vcc_lo
	s_mov_b32 s69, s29
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_f64 v[83:84], v[45:46], 0.5
	v_mul_f64 v[91:92], v[51:52], 0.5
	s_delay_alu instid0(VALU_DEP_3)
	v_lshrrev_b64 v[47:48], 11, v[47:48]
	s_mov_b32 s70, s28
	s_mov_b32 s72, s28
	v_cmp_lg_f64_e64 s0, 0x7ff00000, v[24:25]
	s_cmp_eq_u32 s75, 4
	v_xor_b32_e32 v40, v40, v22
	v_cvt_f64_u32_e32 v[53:54], v48
	v_cvt_f64_u32_e32 v[47:48], v47
	v_xor_b32_e32 v39, v39, v21
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[53:54], v[53:54], 32
	v_add_f64 v[47:48], v[53:54], v[47:48]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[47:48], v[47:48], 0xffffffcb
	v_frexp_mant_f64_e32 v[53:54], v[47:48]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f64_e32 vcc_lo, s[28:29], v[53:54]
	v_cndmask_b32_e64 v42, 0, 1, vcc_lo
	v_ldexp_f64 v[53:54], v[53:54], v42
	v_frexp_exp_i32_f64_e32 v42, v[47:48]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[55:56], v[53:54], 1.0
	v_add_f64 v[67:68], v[53:54], -1.0
	v_subrev_co_ci_u32_e32 v42, vcc_lo, 0, v42, vcc_lo
	v_cmp_eq_f64_e32 vcc_lo, 0x7ff00000, v[47:48]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[57:58], v[55:56]
	v_add_f64 v[69:70], v[55:56], -1.0
	v_add_f64 v[53:54], v[53:54], -v[69:70]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[59:60], -v[55:56], v[57:58], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[57:58], v[59:60], v[57:58], v[57:58]
	v_fma_f64 v[59:60], -v[55:56], v[57:58], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[57:58], v[59:60], v[57:58], v[57:58]
	v_mul_f64 v[59:60], v[67:68], v[57:58]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[71:72], v[55:56], v[59:60]
	v_fma_f64 v[55:56], v[59:60], v[55:56], -v[71:72]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[53:54], v[59:60], v[53:54], v[55:56]
	v_add_f64 v[55:56], v[71:72], v[53:54]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[69:70], v[67:68], -v[55:56]
	v_add_f64 v[71:72], v[55:56], -v[71:72]
	v_add_f64 v[67:68], v[67:68], -v[69:70]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[53:54], v[71:72], -v[53:54]
	v_add_f64 v[55:56], v[67:68], -v[55:56]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[53:54], v[53:54], v[55:56]
	v_add_f64 v[53:54], v[69:70], v[53:54]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[53:54], v[57:58], v[53:54]
	v_add_f64 v[55:56], v[59:60], v[53:54]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[57:58], v[55:56], v[55:56]
	v_fma_f64 v[67:68], v[57:58], s[34:35], s[30:31]
	v_mul_f64 v[69:70], v[55:56], v[57:58]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[67:68], v[57:58], v[67:68], s[36:37]
	v_fma_f64 v[67:68], v[57:58], v[67:68], s[38:39]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[67:68], v[57:58], v[67:68], s[40:41]
	v_fma_f64 v[67:68], v[57:58], v[67:68], s[42:43]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[57:58], v[57:58], v[67:68], s[68:69]
	v_ldexp_f64 v[67:68], v[55:56], 1
	v_add_f64 v[55:56], v[55:56], -v[59:60]
	v_mul_f64 v[57:58], v[69:70], v[57:58]
	v_cvt_f64_i32_e32 v[69:70], v42
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[53:54], v[53:54], -v[55:56]
	v_add_f64 v[59:60], v[67:68], v[57:58]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[71:72], v[69:70], s[44:45]
	v_ldexp_f64 v[53:54], v[53:54], 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[55:56], v[59:60], -v[67:68]
	v_fma_f64 v[67:68], v[69:70], s[44:45], -v[71:72]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[55:56], v[57:58], -v[55:56]
	v_fma_f64 v[57:58], v[69:70], s[46:47], v[67:68]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[53:54], v[53:54], v[55:56]
	v_add_f64 v[55:56], v[71:72], v[57:58]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[67:68], v[59:60], v[53:54]
	v_add_f64 v[71:72], v[55:56], -v[71:72]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[69:70], v[55:56], v[67:68]
	v_add_f64 v[59:60], v[67:68], -v[59:60]
	v_add_f64 v[57:58], v[57:58], -v[71:72]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[73:74], v[69:70], -v[55:56]
	v_add_f64 v[53:54], v[53:54], -v[59:60]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[75:76], v[69:70], -v[73:74]
	v_add_f64 v[59:60], v[67:68], -v[73:74]
	v_add_f64 v[67:68], v[57:58], v[53:54]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[55:56], v[55:56], -v[75:76]
	v_add_f64 v[55:56], v[59:60], v[55:56]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[59:60], v[67:68], -v[57:58]
	v_add_f64 v[55:56], v[67:68], v[55:56]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[67:68], v[67:68], -v[59:60]
	v_add_f64 v[53:54], v[53:54], -v[59:60]
	v_add_f64 v[71:72], v[69:70], v[55:56]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[57:58], v[57:58], -v[67:68]
	v_add_f64 v[59:60], v[71:72], -v[69:70]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[53:54], v[53:54], v[57:58]
	v_mul_f64 v[57:58], v[49:50], v[49:50]
	v_add_f64 v[55:56], v[55:56], -v[59:60]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mul_f64 v[77:78], v[57:58], 0.5
	v_fma_f64 v[79:80], v[57:58], s[50:51], s[48:49]
	v_add_f64 v[53:54], v[53:54], v[55:56]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[89:90], -v[77:78], 1.0
	v_fma_f64 v[79:80], v[57:58], v[79:80], s[52:53]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[53:54], v[71:72], v[53:54]
	v_fma_f64 v[71:72], v[57:58], s[60:61], s[58:59]
	v_fma_f64 v[79:80], v[57:58], v[79:80], s[54:55]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_dual_cndmask_b32 v54, v54, v48 :: v_dual_cndmask_b32 v53, v53, v47
	v_cmp_ngt_f64_e32 vcc_lo, 0, v[47:48]
	v_fma_f64 v[71:72], v[57:58], v[71:72], s[62:63]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[79:80], v[57:58], v[79:80], s[56:57]
	v_mul_f64 v[53:54], v[53:54], -2.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[71:72], v[57:58], v[71:72], s[64:65]
	v_cndmask_b32_e32 v42, 0x7ff80000, v54, vcc_lo
	v_cmp_nge_f64_e32 vcc_lo, 0, v[47:48]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_fma_f64 v[71:72], v[57:58], v[71:72], s[66:67]
	v_cndmask_b32_e32 v53, 0, v53, vcc_lo
	v_cmp_neq_f64_e32 vcc_lo, 0, v[47:48]
	v_mul_f64 v[47:48], v[43:44], v[43:44]
	v_cndmask_b32_e32 v54, 0x7ff00000, v42, vcc_lo
	v_fma_f64 v[55:56], v[47:48], s[60:61], s[58:59]
	v_mul_f64 v[67:68], v[47:48], 0.5
	v_fma_f64 v[69:70], v[47:48], s[50:51], s[48:49]
	v_mul_f64 v[85:86], v[43:44], -v[47:48]
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[53:54]
	v_fma_f64 v[55:56], v[47:48], v[55:56], s[62:63]
	v_add_f64 v[75:76], -v[67:68], 1.0
	v_fma_f64 v[69:70], v[47:48], v[69:70], s[52:53]
	v_cndmask_b32_e64 v42, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v42, 8, v42
	v_ldexp_f64 v[53:54], v[53:54], v42
	v_fma_f64 v[55:56], v[47:48], v[55:56], s[64:65]
	v_add_f64 v[87:88], -v[75:76], 1.0
	v_fma_f64 v[69:70], v[47:48], v[69:70], s[54:55]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_rsq_f64_e32 v[59:60], v[53:54]
	v_cmp_class_f64_e64 s1, v[53:54], 0x260
	v_fma_f64 v[55:56], v[47:48], v[55:56], s[66:67]
	s_delay_alu instid0(VALU_DEP_4)
	v_add_f64 v[67:68], v[87:88], -v[67:68]
	v_add_f64 v[87:88], -v[89:90], 1.0
	v_fma_f64 v[69:70], v[47:48], v[69:70], s[56:57]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[73:74], v[53:54], v[59:60]
	v_mul_f64 v[59:60], v[59:60], 0.5
	v_fma_f64 v[55:56], v[85:86], v[55:56], v[83:84]
	v_mul_f64 v[83:84], v[49:50], -v[57:58]
	v_add_f64 v[77:78], v[87:88], -v[77:78]
	v_mul_f64 v[87:88], v[47:48], v[47:48]
	v_fma_f64 v[69:70], v[47:48], v[69:70], s[70:71]
	v_fma_f64 v[67:68], v[43:44], -v[45:46], v[67:68]
	v_fma_f64 v[81:82], -v[59:60], v[73:74], 0.5
	v_fma_f64 v[45:46], v[47:48], v[55:56], -v[45:46]
	v_fma_f64 v[71:72], v[83:84], v[71:72], v[91:92]
	v_mul_f64 v[55:56], v[57:58], v[57:58]
	v_fma_f64 v[77:78], v[49:50], -v[51:52], v[77:78]
	v_fma_f64 v[73:74], v[73:74], v[81:82], v[73:74]
	v_fma_f64 v[59:60], v[59:60], v[81:82], v[59:60]
	v_fma_f64 v[45:46], v[85:86], s[72:73], v[45:46]
	v_fma_f64 v[51:52], v[57:58], v[71:72], -v[51:52]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[81:82], -v[73:74], v[73:74], v[53:54]
	v_add_f64 v[42:43], v[43:44], -v[45:46]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[51:52], v[83:84], s[72:73], v[51:52]
	v_fma_f64 v[47:48], v[81:82], v[59:60], v[73:74]
	v_fma_f64 v[73:74], v[57:58], v[79:80], s[70:71]
	v_fma_f64 v[57:58], v[87:88], v[69:70], v[67:68]
	v_xor_b32_e32 v43, 0x80000000, v43
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[67:68], -v[47:48], v[47:48], v[53:54]
	v_fma_f64 v[55:56], v[55:56], v[73:74], v[77:78]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[57:58], v[75:76], v[57:58]
	v_fma_f64 v[44:45], v[67:68], v[59:60], v[47:48]
	s_delay_alu instid0(VALU_DEP_3)
	v_add_f64 v[46:47], v[89:90], v[55:56]
	v_add_f64 v[48:49], v[49:50], -v[51:52]
	v_and_b32_e32 v51, 1, v65
	v_cndmask_b32_e64 v55, 0, 0xffffff80, vcc_lo
	v_and_b32_e32 v59, 1, v63
	v_lshlrev_b32_e32 v50, 30, v65
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_eq_u32_e32 vcc_lo, 0, v59
	v_xor_b32_e32 v25, v50, v25
	v_dual_cndmask_b32 v42, v42, v57 :: v_dual_cndmask_b32 v43, v43, v58
	v_cmp_eq_u32_e32 vcc_lo, 0, v51
	v_lshlrev_b32_e32 v24, 30, v63
	v_ldexp_f64 v[44:45], v[44:45], v55
	v_dual_cndmask_b32 v47, v47, v49 :: v_dual_cndmask_b32 v46, v46, v48
	s_cselect_b32 vcc_lo, -1, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_and_b32_e32 v24, 0x80000000, v24
	v_and_b32_e32 v50, 0x80000000, v25
	s_cmp_eq_u32 s75, 3
	v_cndmask_b32_e64 v21, 0, v46, s0
	v_xor_b32_e32 v43, v43, v24
	v_cndmask_b32_e64 v24, 0, v42, s0
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e64 v25, 0x7ff80000, v43, s0
	v_cndmask_b32_e64 v43, v45, v54, s1
	v_cndmask_b32_e64 v42, v44, v53, s1
	v_lshlrev_b64 v[44:45], 17, v[37:38]
	v_xor_b32_e32 v38, v40, v38
	v_xor_b32_e32 v37, v39, v37
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[24:25], v[42:43], v[24:25]
	v_cndmask_b32_e32 v19, v19, v24, vcc_lo
	v_xor_b32_e32 v47, v47, v50
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v20, v20, v25, vcc_lo
	v_cndmask_b32_e64 v22, 0x7ff80000, v47, s0
	s_cselect_b32 s0, -1, 0
	s_cmp_eq_u32 s75, 2
	v_cndmask_b32_e64 v18, v18, v25, s0
	s_cselect_b32 s1, -1, 0
	v_mul_f64 v[46:47], v[42:43], v[21:22]
	v_xor_b32_e32 v22, v38, v62
	v_xor_b32_e32 v21, v37, v23
	v_xor_b32_e32 v42, v40, v45
	v_xor_b32_e32 v43, v39, v44
	v_lshlrev_b64 v[39:40], 17, v[37:38]
	s_cmp_eq_u32 s75, 1
	v_lshrrev_b64 v[44:45], 19, v[21:22]
	v_xor_b32_e32 v23, v42, v61
	v_xor_b32_e32 v48, v43, v26
	v_xor_b32_e32 v42, v21, v26
	v_lshlrev_b32_e32 v26, 13, v21
	v_xor_b32_e32 v43, v22, v61
	s_cselect_b32 s2, -1, 0
	s_cmp_eq_u32 s75, 0
	v_xor_b32_e32 v37, v48, v37
	v_or_b32_e32 v45, v26, v45
	s_cselect_b32 s3, -1, 0
	v_xor_b32_e32 v39, v48, v39
	v_mov_b32_e32 v21, v42
	v_xor_b32_e32 v38, v23, v38
	v_xor_b32_e32 v40, v23, v40
	v_mov_b32_e32 v22, v43
	v_cndmask_b32_e64 v17, v17, v24, s0
	v_cndmask_b32_e64 v16, v16, v25, s1
	v_cndmask_b32_e64 v15, v15, v24, s1
	v_cndmask_b32_e64 v14, v14, v25, s2
	v_cndmask_b32_e64 v13, v13, v24, s2
	v_cndmask_b32_e64 v12, v12, v25, s3
	v_cndmask_b32_e64 v11, v11, v24, s3
	s_add_i32 s75, s75, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s75, 5
	v_cndmask_b32_e32 v10, v10, v47, vcc_lo
	v_cndmask_b32_e64 v8, v8, v47, s0
	v_cndmask_b32_e64 v6, v6, v47, s1
	v_cndmask_b32_e64 v4, v4, v47, s2
	v_cndmask_b32_e64 v2, v2, v47, s3
	v_mov_b32_e32 v48, v45
	v_cndmask_b32_e32 v9, v9, v46, vcc_lo
	v_cndmask_b32_e64 v7, v7, v46, s0
	v_cndmask_b32_e64 v5, v5, v46, s1
	v_cndmask_b32_e64 v3, v3, v46, s2
	v_cndmask_b32_e64 v1, v1, v46, s3
	v_mov_b32_e32 v47, v44
	s_cbranch_scc1 .LBB2_77
; %bb.86:                               ; %.lr.ph.i.i.4.i194.i.preheader
                                        ;   in Loop: Header=BB2_76 Depth=1
	v_mov_b32_e32 v21, 0
	v_mov_b32_e32 v22, 0
	s_mov_b32 s3, 0
.LBB2_87:                               ; %.lr.ph.i.i.4.i194.i
                                        ;   Parent Loop BB2_76 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB2_88 Depth 3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s3, 1
	s_mov_b32 s6, s3
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s3, 2
	v_dual_cndmask_b32 v23, v12, v14 :: v_dual_cndmask_b32 v24, v11, v13
	v_dual_cndmask_b32 v25, v2, v4 :: v_dual_cndmask_b32 v26, v1, v3
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s3, 3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v23, v23, v16 :: v_dual_cndmask_b32 v24, v24, v15
	v_dual_cndmask_b32 v25, v25, v6 :: v_dual_cndmask_b32 v26, v26, v5
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s3, 4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v23, v23, v18 :: v_dual_cndmask_b32 v46, v24, v17
	v_cndmask_b32_e32 v25, v25, v8, vcc_lo
	v_cndmask_b32_e32 v47, v26, v7, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v24, v23, v20 :: v_dual_cndmask_b32 v23, v46, v19
	v_dual_cndmask_b32 v26, v25, v10 :: v_dual_cndmask_b32 v25, v47, v9
.LBB2_88:                               ;   Parent Loop BB2_76 Depth=1
                                        ;     Parent Loop BB2_87 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_add_i32 s6, s6, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s6, 1
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s6, 2
	v_dual_cndmask_b32 v46, v12, v14 :: v_dual_cndmask_b32 v47, v2, v4
	v_cndmask_b32_e32 v48, v1, v3, vcc_lo
	s_cselect_b32 s0, -1, 0
	s_cmp_eq_u32 s6, 3
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e64 v46, v46, v16, s0
	v_cndmask_b32_e64 v47, v47, v6, s0
	v_cndmask_b32_e64 v48, v48, v5, s0
	s_cselect_b32 s1, -1, 0
	s_cmp_eq_u32 s6, 4
	v_cndmask_b32_e64 v46, v46, v18, s1
	v_cndmask_b32_e64 v49, v47, v8, s1
	v_cndmask_b32_e64 v48, v48, v7, s1
	s_cselect_b32 s2, -1, 0
	s_cmp_lt_u32 s6, 4
	v_cndmask_b32_e64 v47, v46, v20, s2
	v_cndmask_b32_e64 v49, v49, v10, s2
	v_cndmask_b32_e64 v48, v48, v9, s2
	v_cndmask_b32_e32 v46, v11, v13, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[48:49], v[25:26], -v[48:49]
	v_cndmask_b32_e64 v46, v46, v15, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v46, v46, v17, s1
	v_cndmask_b32_e64 v46, v46, v19, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[46:47], v[23:24], -v[46:47]
	v_mul_f64 v[48:49], v[48:49], v[48:49]
	v_fma_f64 v[46:47], v[46:47], v[46:47], v[48:49]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_lt_f64_e32 vcc_lo, v[21:22], v[46:47]
	v_dual_cndmask_b32 v22, v22, v47 :: v_dual_cndmask_b32 v21, v21, v46
	s_cbranch_scc1 .LBB2_88
; %bb.89:                               ; %.loopexit.i.i.4.i200.i
                                        ;   in Loop: Header=BB2_87 Depth=2
	s_add_i32 s3, s3, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s3, 4
	s_cbranch_scc1 .LBB2_87
; %bb.90:                               ;   in Loop: Header=BB2_76 Depth=1
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[21:22]
	s_add_i32 s74, s74, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	s_cmp_lg_u32 s74, 0x10000
	v_cndmask_b32_e64 v23, 0, 1, vcc_lo
	v_lshlrev_b32_e32 v23, 8, v23
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[21:22], v[21:22], v23
	v_rsq_f64_e32 v[23:24], v[21:22]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[25:26], v[21:22], v[23:24]
	v_mul_f64 v[23:24], v[23:24], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[46:47], -v[23:24], v[25:26], 0.5
	v_fma_f64 v[25:26], v[25:26], v[46:47], v[25:26]
	v_fma_f64 v[23:24], v[23:24], v[46:47], v[23:24]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[46:47], -v[25:26], v[25:26], v[21:22]
	v_fma_f64 v[25:26], v[46:47], v[23:24], v[25:26]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[46:47], -v[25:26], v[25:26], v[21:22]
	v_fma_f64 v[23:24], v[46:47], v[23:24], v[25:26]
	v_cndmask_b32_e64 v25, 0, 0xffffff80, vcc_lo
	v_cmp_class_f64_e64 vcc_lo, v[21:22], 0x260
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[23:24], v[23:24], v25
	v_dual_cndmask_b32 v22, v24, v22 :: v_dual_cndmask_b32 v21, v23, v21
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[35:36], v[35:36], v[21:22]
	s_cbranch_scc1 .LBB2_76
; %bb.91:                               ; %_ZNK6thrust11hip_rocprim26transform_input_iterator_tIdNS_17counting_iteratorIjNS_11use_defaultES3_S3_EE11estimate_esEixEl.exit.4.i203.i
	v_add_nc_u32_e32 v1, 0x7f256216, v64
	s_mov_b64 s[4:5], 0
                                        ; implicit-def: $vgpr44_vgpr45
                                        ; implicit-def: $vgpr39_vgpr40
                                        ; implicit-def: $vgpr41_vgpr42
                                        ; implicit-def: $vgpr46_vgpr47
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v2, 19, v1
	v_xor3_b32 v1, v1, v2, 0xc761c23c
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v1, v1, 5, v1
	v_add_nc_u32_e32 v2, 0xe9f8cc1d, v1
	v_lshl_add_u32 v1, v1, 9, 0xaccf6200
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v1, v2, v1
	v_lshlrev_b32_e32 v2, 3, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v1, v1, v2, 0xfd7046c5
	v_lshrrev_b32_e32 v2, 16, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_xor3_b32 v1, v1, v2, 0xb55a4f09
.LBB2_92:                               ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v2, 12, v1
	s_cmp_eq_u32 s4, 0
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s4, 1
	v_add3_u32 v1, v1, v2, 0x7ed55d16
	s_cselect_b32 s0, -1, 0
	s_cmp_eq_u32 s4, 2
	s_cselect_b32 s1, -1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v2, 19, v1
	s_cmp_eq_u32 s4, 3
	s_cselect_b32 s2, -1, 0
	s_add_u32 s4, s4, 1
	v_xor3_b32 v1, v1, v2, 0xc761c23c
	s_addc_u32 s5, s5, 0
	s_cmp_lg_u32 s4, 4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v1, v1, 5, v1
	v_add_nc_u32_e32 v2, 0xe9f8cc1d, v1
	v_lshl_add_u32 v1, v1, 9, 0xaccf6200
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v1, v2, v1
	v_lshlrev_b32_e32 v2, 3, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v1, v1, v2, 0xfd7046c5
	v_lshrrev_b32_e32 v2, 16, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor3_b32 v1, v1, v2, 0xb55a4f09
	v_lshlrev_b32_e32 v3, 12, v1
	v_xor_b32_e32 v2, s23, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add3_u32 v1, v1, v3, 0x7ed55d16
	v_cndmask_b32_e32 v45, v45, v2, vcc_lo
	v_cndmask_b32_e64 v40, v40, v2, s0
	v_cndmask_b32_e64 v42, v42, v2, s1
	v_cndmask_b32_e64 v47, v47, v2, s2
	v_lshrrev_b32_e32 v3, 19, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor3_b32 v1, v1, v3, 0xc761c23c
	v_lshl_add_u32 v1, v1, 5, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v3, 0xe9f8cc1d, v1
	v_lshl_add_u32 v1, v1, 9, 0xaccf6200
	v_xor_b32_e32 v1, v3, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v3, 3, v1
	v_add3_u32 v1, v1, v3, 0xfd7046c5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v3, 16, v1
	v_xor3_b32 v1, v1, v3, 0xb55a4f09
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v2, s22, v1
	v_cndmask_b32_e32 v44, v44, v2, vcc_lo
	v_cndmask_b32_e64 v39, v39, v2, s0
	v_cndmask_b32_e64 v41, v41, v2, s1
	v_cndmask_b32_e64 v46, v46, v2, s2
	s_cbranch_scc1 .LBB2_92
; %bb.93:                               ; %.preheader55.i.i.5.i208.i.preheader
	v_mov_b32_e32 v37, 0
	v_dual_mov_b32 v38, 0 :: v_dual_mov_b32 v43, 0
	s_mov_b32 s4, 0x54442d18
	s_mov_b32 s8, 0x33145c07
	s_mov_b32 s10, 0x6dc9c883
	s_mov_b32 s24, 0x33145c00
	s_mov_b32 s26, 0x252049c0
	s_mov_b32 s28, 0x55555555
	s_mov_b32 s30, 0x6b47b09a
	s_mov_b32 s34, 0xbf559e2b
	s_mov_b32 s36, 0xd7f4df2e
	s_mov_b32 s38, 0x16291751
	s_mov_b32 s40, 0x9b27acf1
	s_mov_b32 s42, 0x998ef7b6
	s_mov_b32 s44, 0xfefa39ef
	s_mov_b32 s46, 0x3b39803f
	s_mov_b32 s48, 0x9037ab78
	s_mov_b32 s50, 0x46cc5e42
	s_mov_b32 s52, 0xa17f65f6
	s_mov_b32 s54, 0x19f4ec90
	s_mov_b32 s56, 0x16c16967
	s_mov_b32 s58, 0xb42fdfa7
	s_mov_b32 s60, 0xf9a43bb8
	s_mov_b32 s62, 0x796cde01
	s_mov_b32 s64, 0x19e83e5c
	s_mov_b32 s66, 0x11110bb3
	s_mov_b32 s74, 0
	s_mov_b32 s5, 0x401921fb
	s_mov_b32 s7, 0x3ff921fb
	s_mov_b32 s9, 0x3c91a626
	s_mov_b32 s11, 0x3fe45f30
	s_mov_b32 s13, 0xbff921fb
	s_mov_b32 s25, 0xbc91a626
	s_mov_b32 s27, 0xb97b839a
	s_mov_b32 s29, 0x3fe55555
	s_mov_b32 s31, 0x3fc38538
	s_mov_b32 s35, 0x3fc3ab76
	s_mov_b32 s37, 0x3fc7474d
	s_mov_b32 s39, 0x3fcc71c0
	s_mov_b32 s41, 0x3fd24924
	s_mov_b32 s43, 0x3fd99999
	s_mov_b32 s45, 0x3fe62e42
	s_mov_b32 s47, 0x3c7abc9e
	s_mov_b32 s49, 0x3e21eeb6
	s_mov_b32 s51, 0xbda907db
	s_mov_b32 s53, 0xbe927e4f
	s_mov_b32 s55, 0x3efa01a0
	s_mov_b32 s57, 0xbf56c16c
	s_mov_b32 s59, 0xbe5ae600
	s_mov_b32 s61, 0x3de5e0b2
	s_mov_b32 s63, 0x3ec71de3
	s_mov_b32 s65, 0xbf2a01a0
	s_mov_b32 s67, 0x3f811111
	s_mov_b32 s68, 0x55555780
	s_mov_b32 s71, 0x3fa55555
	s_mov_b32 s73, 0xbfc55555
                                        ; implicit-def: $vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16
                                        ; implicit-def: $vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26
.LBB2_94:                               ; %.preheader55.i.i.5.i208.i
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB2_95 Depth 2
                                        ;     Child Loop BB2_105 Depth 2
                                        ;       Child Loop BB2_106 Depth 3
	v_dual_mov_b32 v21, v44 :: v_dual_mov_b32 v22, v45
	v_dual_mov_b32 v50, v47 :: v_dual_mov_b32 v49, v46
	s_mov_b32 s75, 0
.LBB2_95:                               ;   Parent Loop BB2_94 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v45, v40, v50
	v_xor_b32_e32 v44, v39, v49
                                        ; implicit-def: $vgpr67
                                        ; implicit-def: $vgpr47_vgpr48
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v63, v45, v22
	v_lshrrev_b64 v[23:24], 19, v[44:45]
	v_lshlrev_b32_e32 v25, 13, v44
	v_xor_b32_e32 v26, v44, v21
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_or_b32_e32 v65, v25, v24
	v_add_co_u32 v24, vcc_lo, v23, v26
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v25, vcc_lo, v65, v63, vcc_lo
	v_lshrrev_b64 v[24:25], 11, v[24:25]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_u32_e32 v[44:45], v25
	v_cvt_f64_u32_e32 v[24:25], v24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[44:45], v[44:45], 32
	v_add_f64 v[24:25], v[44:45], v[24:25]
                                        ; implicit-def: $vgpr45_vgpr46
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[24:25], v[24:25], 0xffffffcb
	v_mul_f64 v[24:25], v[24:25], s[4:5]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ngt_f64_e32 vcc_lo, 0x41d00000, v[24:25]
	v_trig_preop_f64 v[59:60], v[24:25], 0
	v_trig_preop_f64 v[57:58], v[24:25], 1
	v_ldexp_f64 v[61:62], v[24:25], 0xffffff80
	v_trig_preop_f64 v[55:56], v[24:25], 2
	s_and_saveexec_b32 s0, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s2, exec_lo, s0
	s_cbranch_execz .LBB2_97
; %bb.96:                               ;   in Loop: Header=BB2_95 Depth=2
	v_cmp_le_f64_e64 s0, 0x7b000000, v[24:25]
	s_mov_b32 s6, s4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v46, v25, v62, s0
	v_cndmask_b32_e64 v45, v24, v61, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_f64 v[47:48], v[59:60], v[45:46]
	v_mul_f64 v[51:52], v[57:58], v[45:46]
	v_mul_f64 v[75:76], v[55:56], v[45:46]
	v_fma_f64 v[53:54], v[59:60], v[45:46], -v[47:48]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[77:78], v[57:58], v[45:46], -v[51:52]
	v_add_f64 v[67:68], v[51:52], v[53:54]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[69:70], v[67:68], -v[51:52]
	v_add_f64 v[73:74], v[47:48], v[67:68]
	v_add_f64 v[71:72], v[67:68], -v[69:70]
	v_add_f64 v[53:54], v[53:54], -v[69:70]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[69:70], v[73:74], -2
	v_add_f64 v[47:48], v[73:74], -v[47:48]
	v_add_f64 v[51:52], v[51:52], -v[71:72]
	v_add_f64 v[71:72], v[75:76], v[77:78]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cmp_neq_f64_e64 s0, 0x7ff00000, |v[69:70]|
	v_add_f64 v[47:48], v[67:68], -v[47:48]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[51:52], v[53:54], v[51:52]
	v_fract_f64_e32 v[53:54], v[69:70]
	v_add_f64 v[67:68], v[71:72], v[51:52]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v54, 0, v54, s0
	v_cndmask_b32_e64 v53, 0, v53, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[53:54], v[53:54], 2
	v_add_f64 v[69:70], v[47:48], v[67:68]
	v_add_f64 v[79:80], v[67:68], -v[71:72]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[73:74], v[69:70], v[53:54]
	v_add_f64 v[85:86], v[67:68], -v[79:80]
	v_add_f64 v[51:52], v[51:52], -v[79:80]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cmp_gt_f64_e64 s0, 0, v[73:74]
	v_add_f64 v[73:74], v[71:72], -v[75:76]
	v_cndmask_b32_e64 v44, 0, 0x40100000, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[83:84], v[71:72], -v[73:74]
	v_add_f64 v[73:74], v[77:78], -v[73:74]
	v_add_f64 v[71:72], v[71:72], -v[85:86]
	v_add_f64 v[53:54], v[53:54], v[43:44]
	v_fma_f64 v[44:45], v[55:56], v[45:46], -v[75:76]
	v_add_f64 v[46:47], v[69:70], -v[47:48]
	v_add_f64 v[77:78], v[75:76], -v[83:84]
	v_add_f64 v[51:52], v[51:52], v[71:72]
	v_add_f64 v[81:82], v[69:70], v[53:54]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[46:47], v[67:68], -v[46:47]
	v_add_f64 v[73:74], v[73:74], v[77:78]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_i32_f64_e32 v81, v[81:82]
	v_add_f64 v[51:52], v[73:74], v[51:52]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_i32_e32 v[79:80], v81
	v_add_f64 v[44:45], v[44:45], v[51:52]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[53:54], v[53:54], -v[79:80]
	v_add_f64 v[45:46], v[46:47], v[44:45]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[71:72], v[69:70], v[53:54]
	v_add_f64 v[51:52], v[71:72], -v[53:54]
	v_cmp_le_f64_e64 s0, 0.5, v[71:72]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[47:48], v[69:70], -v[51:52]
	v_cndmask_b32_e64 v44, 0, 0x3ff00000, s0
	v_add_co_ci_u32_e64 v67, s1, 0, v81, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[45:46], v[45:46], v[47:48]
	v_add_f64 v[47:48], v[71:72], -v[43:44]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[51:52], v[47:48], v[45:46]
	v_mul_f64 v[53:54], v[51:52], s[6:7]
	v_add_f64 v[47:48], v[51:52], -v[47:48]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[68:69], v[51:52], s[6:7], -v[53:54]
	v_add_f64 v[44:45], v[45:46], -v[47:48]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[46:47], v[51:52], s[8:9], v[68:69]
	v_fma_f64 v[47:48], v[44:45], s[6:7], v[46:47]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[45:46], v[53:54], v[47:48]
	v_add_f64 v[51:52], v[45:46], -v[53:54]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[47:48], v[47:48], -v[51:52]
.LBB2_97:                               ; %Flow1195
                                        ;   in Loop: Header=BB2_95 Depth=2
	s_and_not1_saveexec_b32 s0, s2
	s_cbranch_execz .LBB2_99
; %bb.98:                               ;   in Loop: Header=BB2_95 Depth=2
	v_mul_f64 v[44:45], v[24:25], s[10:11]
	s_mov_b32 s12, s4
	s_mov_b32 s2, s24
	s_mov_b32 s3, s9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[51:52], v[44:45]
	v_fma_f64 v[44:45], v[51:52], s[12:13], v[24:25]
	v_mul_f64 v[46:47], v[51:52], s[24:25]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[67:68], v[51:52], s[24:25], v[44:45]
	v_add_f64 v[53:54], v[44:45], v[46:47]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[44:45], v[44:45], -v[53:54]
	v_add_f64 v[53:54], v[53:54], -v[67:68]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[44:45], v[44:45], v[46:47]
	v_fma_f64 v[46:47], v[51:52], s[2:3], v[46:47]
	v_add_f64 v[44:45], v[53:54], v[44:45]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[44:45], v[44:45], -v[46:47]
	v_fma_f64 v[47:48], v[51:52], s[26:27], v[44:45]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[45:46], v[67:68], v[47:48]
	v_add_f64 v[53:54], v[45:46], -v[67:68]
	v_cvt_i32_f64_e32 v67, v[51:52]
	s_delay_alu instid0(VALU_DEP_2)
	v_add_f64 v[47:48], v[47:48], -v[53:54]
.LBB2_99:                               ; %_ZL3cosd.exit.i.i.5.i218.i
                                        ;   in Loop: Header=BB2_95 Depth=2
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $vgpr68
                                        ; implicit-def: $vgpr51_vgpr52
                                        ; implicit-def: $vgpr53_vgpr54
	s_and_saveexec_b32 s0, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s1, exec_lo, s0
	s_cbranch_execz .LBB2_101
; %bb.100:                              ;   in Loop: Header=BB2_95 Depth=2
	v_cmp_le_f64_e32 vcc_lo, 0x7b000000, v[24:25]
	s_mov_b32 s6, s4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v52, v25, v62 :: v_dual_cndmask_b32 v51, v24, v61
	v_mul_f64 v[53:54], v[59:60], v[51:52]
	v_mul_f64 v[61:62], v[57:58], v[51:52]
	v_mul_f64 v[76:77], v[55:56], v[51:52]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[59:60], v[59:60], v[51:52], -v[53:54]
	v_fma_f64 v[57:58], v[57:58], v[51:52], -v[61:62]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[51:52], v[55:56], v[51:52], -v[76:77]
	v_add_f64 v[68:69], v[61:62], v[59:60]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[70:71], v[68:69], -v[61:62]
	v_add_f64 v[74:75], v[53:54], v[68:69]
	v_add_f64 v[72:73], v[68:69], -v[70:71]
	v_add_f64 v[59:60], v[59:60], -v[70:71]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[70:71], v[74:75], -2
	v_add_f64 v[53:54], v[74:75], -v[53:54]
	v_add_f64 v[61:62], v[61:62], -v[72:73]
	v_add_f64 v[72:73], v[76:77], v[57:58]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[70:71]|
	v_add_f64 v[53:54], v[68:69], -v[53:54]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[59:60], v[59:60], v[61:62]
	v_fract_f64_e32 v[61:62], v[70:71]
	v_add_f64 v[68:69], v[72:73], v[59:60]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v62, 0, v62 :: v_dual_cndmask_b32 v61, 0, v61
	v_ldexp_f64 v[61:62], v[61:62], 2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[70:71], v[53:54], v[68:69]
	v_add_f64 v[78:79], v[68:69], -v[72:73]
	v_add_f64 v[74:75], v[70:71], v[61:62]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[84:85], v[68:69], -v[78:79]
	v_add_f64 v[59:60], v[59:60], -v[78:79]
	v_add_f64 v[53:54], v[70:71], -v[53:54]
	v_cmp_gt_f64_e32 vcc_lo, 0, v[74:75]
	v_add_f64 v[74:75], v[72:73], -v[76:77]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[53:54], v[68:69], -v[53:54]
	v_cndmask_b32_e64 v44, 0, 0x40100000, vcc_lo
	v_add_f64 v[82:83], v[72:73], -v[74:75]
	v_add_f64 v[57:58], v[57:58], -v[74:75]
	v_add_f64 v[72:73], v[72:73], -v[84:85]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[61:62], v[61:62], v[43:44]
	v_add_f64 v[74:75], v[76:77], -v[82:83]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[59:60], v[59:60], v[72:73]
	v_add_f64 v[80:81], v[70:71], v[61:62]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[57:58], v[57:58], v[74:75]
	v_cvt_i32_f64_e32 v44, v[80:81]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[55:56], v[57:58], v[59:60]
	v_cvt_f64_i32_e32 v[78:79], v44
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[51:52], v[51:52], v[55:56]
	v_add_f64 v[61:62], v[61:62], -v[78:79]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[51:52], v[53:54], v[51:52]
	v_add_f64 v[57:58], v[70:71], v[61:62]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[55:56], v[57:58], -v[61:62]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[57:58]
	v_add_f64 v[53:54], v[70:71], -v[55:56]
	v_add_co_ci_u32_e64 v68, s0, 0, v44, vcc_lo
	v_cndmask_b32_e64 v44, 0, 0x3ff00000, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[51:52], v[51:52], v[53:54]
	v_add_f64 v[53:54], v[57:58], -v[43:44]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[55:56], v[53:54], v[51:52]
	v_mul_f64 v[57:58], v[55:56], s[6:7]
	v_add_f64 v[53:54], v[55:56], -v[53:54]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[59:60], v[55:56], s[6:7], -v[57:58]
	v_add_f64 v[51:52], v[51:52], -v[53:54]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[53:54], v[55:56], s[8:9], v[59:60]
	v_fma_f64 v[53:54], v[51:52], s[6:7], v[53:54]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[51:52], v[57:58], v[53:54]
	v_add_f64 v[55:56], v[51:52], -v[57:58]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[53:54], v[53:54], -v[55:56]
.LBB2_101:                              ; %Flow1194
                                        ;   in Loop: Header=BB2_95 Depth=2
	s_and_not1_saveexec_b32 s0, s1
	s_cbranch_execz .LBB2_103
; %bb.102:                              ;   in Loop: Header=BB2_95 Depth=2
	v_mul_f64 v[51:52], v[24:25], s[10:11]
	s_mov_b32 s12, s4
	s_mov_b32 s2, s24
	s_mov_b32 s3, s9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[55:56], v[51:52]
	v_fma_f64 v[51:52], v[55:56], s[12:13], v[24:25]
	v_mul_f64 v[53:54], v[55:56], s[24:25]
	v_cvt_i32_f64_e32 v68, v[55:56]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[59:60], v[55:56], s[24:25], v[51:52]
	v_add_f64 v[57:58], v[51:52], v[53:54]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[51:52], v[51:52], -v[57:58]
	v_add_f64 v[57:58], v[57:58], -v[59:60]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[51:52], v[51:52], v[53:54]
	v_fma_f64 v[53:54], v[55:56], s[2:3], v[53:54]
	v_add_f64 v[51:52], v[57:58], v[51:52]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[51:52], v[51:52], -v[53:54]
	v_fma_f64 v[53:54], v[55:56], s[26:27], v[51:52]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[51:52], v[59:60], v[53:54]
	v_add_f64 v[57:58], v[51:52], -v[59:60]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[53:54], v[53:54], -v[57:58]
.LBB2_103:                              ; %_ZL3sind.exit.i.i.5.i223.i
                                        ;   in Loop: Header=BB2_95 Depth=2
	s_or_b32 exec_lo, exec_lo, s0
	v_add_co_u32 v49, vcc_lo, v49, v21
	v_add_co_ci_u32_e32 v50, vcc_lo, v50, v22, vcc_lo
	s_mov_b32 s69, s29
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_f64 v[85:86], v[47:48], 0.5
	v_mul_f64 v[93:94], v[53:54], 0.5
	s_delay_alu instid0(VALU_DEP_3)
	v_lshrrev_b64 v[49:50], 11, v[49:50]
	s_mov_b32 s70, s28
	s_mov_b32 s72, s28
	v_cmp_lg_f64_e64 s0, 0x7ff00000, v[24:25]
	s_cmp_eq_u32 s75, 4
	v_xor_b32_e32 v42, v42, v22
	v_cvt_f64_u32_e32 v[55:56], v50
	v_cvt_f64_u32_e32 v[49:50], v49
	v_xor_b32_e32 v41, v41, v21
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[55:56], v[55:56], 32
	v_add_f64 v[49:50], v[55:56], v[49:50]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[49:50], v[49:50], 0xffffffcb
	v_frexp_mant_f64_e32 v[55:56], v[49:50]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f64_e32 vcc_lo, s[28:29], v[55:56]
	v_cndmask_b32_e64 v44, 0, 1, vcc_lo
	v_ldexp_f64 v[55:56], v[55:56], v44
	v_frexp_exp_i32_f64_e32 v44, v[49:50]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[57:58], v[55:56], 1.0
	v_add_f64 v[69:70], v[55:56], -1.0
	v_subrev_co_ci_u32_e32 v44, vcc_lo, 0, v44, vcc_lo
	v_cmp_eq_f64_e32 vcc_lo, 0x7ff00000, v[49:50]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[59:60], v[57:58]
	v_add_f64 v[71:72], v[57:58], -1.0
	v_add_f64 v[55:56], v[55:56], -v[71:72]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[61:62], -v[57:58], v[59:60], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[59:60], v[61:62], v[59:60], v[59:60]
	v_fma_f64 v[61:62], -v[57:58], v[59:60], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[59:60], v[61:62], v[59:60], v[59:60]
	v_mul_f64 v[61:62], v[69:70], v[59:60]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[73:74], v[57:58], v[61:62]
	v_fma_f64 v[57:58], v[61:62], v[57:58], -v[73:74]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[55:56], v[61:62], v[55:56], v[57:58]
	v_add_f64 v[57:58], v[73:74], v[55:56]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[71:72], v[69:70], -v[57:58]
	v_add_f64 v[73:74], v[57:58], -v[73:74]
	v_add_f64 v[69:70], v[69:70], -v[71:72]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[55:56], v[73:74], -v[55:56]
	v_add_f64 v[57:58], v[69:70], -v[57:58]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[55:56], v[55:56], v[57:58]
	v_add_f64 v[55:56], v[71:72], v[55:56]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[55:56], v[59:60], v[55:56]
	v_add_f64 v[57:58], v[61:62], v[55:56]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[59:60], v[57:58], v[57:58]
	v_fma_f64 v[69:70], v[59:60], s[34:35], s[30:31]
	v_mul_f64 v[71:72], v[57:58], v[59:60]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[69:70], v[59:60], v[69:70], s[36:37]
	v_fma_f64 v[69:70], v[59:60], v[69:70], s[38:39]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[69:70], v[59:60], v[69:70], s[40:41]
	v_fma_f64 v[69:70], v[59:60], v[69:70], s[42:43]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[59:60], v[59:60], v[69:70], s[68:69]
	v_ldexp_f64 v[69:70], v[57:58], 1
	v_add_f64 v[57:58], v[57:58], -v[61:62]
	v_mul_f64 v[59:60], v[71:72], v[59:60]
	v_cvt_f64_i32_e32 v[71:72], v44
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[55:56], v[55:56], -v[57:58]
	v_add_f64 v[61:62], v[69:70], v[59:60]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[73:74], v[71:72], s[44:45]
	v_ldexp_f64 v[55:56], v[55:56], 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[57:58], v[61:62], -v[69:70]
	v_fma_f64 v[69:70], v[71:72], s[44:45], -v[73:74]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[57:58], v[59:60], -v[57:58]
	v_fma_f64 v[59:60], v[71:72], s[46:47], v[69:70]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[55:56], v[55:56], v[57:58]
	v_add_f64 v[57:58], v[73:74], v[59:60]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[69:70], v[61:62], v[55:56]
	v_add_f64 v[73:74], v[57:58], -v[73:74]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[71:72], v[57:58], v[69:70]
	v_add_f64 v[61:62], v[69:70], -v[61:62]
	v_add_f64 v[59:60], v[59:60], -v[73:74]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[75:76], v[71:72], -v[57:58]
	v_add_f64 v[55:56], v[55:56], -v[61:62]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[77:78], v[71:72], -v[75:76]
	v_add_f64 v[61:62], v[69:70], -v[75:76]
	v_add_f64 v[69:70], v[59:60], v[55:56]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[57:58], v[57:58], -v[77:78]
	v_add_f64 v[57:58], v[61:62], v[57:58]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[61:62], v[69:70], -v[59:60]
	v_add_f64 v[57:58], v[69:70], v[57:58]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[69:70], v[69:70], -v[61:62]
	v_add_f64 v[55:56], v[55:56], -v[61:62]
	v_add_f64 v[73:74], v[71:72], v[57:58]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[59:60], v[59:60], -v[69:70]
	v_add_f64 v[61:62], v[73:74], -v[71:72]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[55:56], v[55:56], v[59:60]
	v_mul_f64 v[59:60], v[51:52], v[51:52]
	v_add_f64 v[57:58], v[57:58], -v[61:62]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mul_f64 v[79:80], v[59:60], 0.5
	v_fma_f64 v[81:82], v[59:60], s[50:51], s[48:49]
	v_add_f64 v[55:56], v[55:56], v[57:58]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[91:92], -v[79:80], 1.0
	v_fma_f64 v[81:82], v[59:60], v[81:82], s[52:53]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[55:56], v[73:74], v[55:56]
	v_fma_f64 v[73:74], v[59:60], s[60:61], s[58:59]
	v_fma_f64 v[81:82], v[59:60], v[81:82], s[54:55]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_dual_cndmask_b32 v56, v56, v50 :: v_dual_cndmask_b32 v55, v55, v49
	v_cmp_ngt_f64_e32 vcc_lo, 0, v[49:50]
	v_fma_f64 v[73:74], v[59:60], v[73:74], s[62:63]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[81:82], v[59:60], v[81:82], s[56:57]
	v_mul_f64 v[55:56], v[55:56], -2.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[73:74], v[59:60], v[73:74], s[64:65]
	v_cndmask_b32_e32 v44, 0x7ff80000, v56, vcc_lo
	v_cmp_nge_f64_e32 vcc_lo, 0, v[49:50]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_fma_f64 v[73:74], v[59:60], v[73:74], s[66:67]
	v_cndmask_b32_e32 v55, 0, v55, vcc_lo
	v_cmp_neq_f64_e32 vcc_lo, 0, v[49:50]
	v_mul_f64 v[49:50], v[45:46], v[45:46]
	v_cndmask_b32_e32 v56, 0x7ff00000, v44, vcc_lo
	v_fma_f64 v[57:58], v[49:50], s[60:61], s[58:59]
	v_mul_f64 v[69:70], v[49:50], 0.5
	v_fma_f64 v[71:72], v[49:50], s[50:51], s[48:49]
	v_mul_f64 v[87:88], v[45:46], -v[49:50]
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[55:56]
	v_fma_f64 v[57:58], v[49:50], v[57:58], s[62:63]
	v_add_f64 v[77:78], -v[69:70], 1.0
	v_fma_f64 v[71:72], v[49:50], v[71:72], s[52:53]
	v_cndmask_b32_e64 v44, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v44, 8, v44
	v_ldexp_f64 v[55:56], v[55:56], v44
	v_fma_f64 v[57:58], v[49:50], v[57:58], s[64:65]
	v_add_f64 v[89:90], -v[77:78], 1.0
	v_fma_f64 v[71:72], v[49:50], v[71:72], s[54:55]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_rsq_f64_e32 v[61:62], v[55:56]
	v_cmp_class_f64_e64 s1, v[55:56], 0x260
	v_fma_f64 v[57:58], v[49:50], v[57:58], s[66:67]
	s_delay_alu instid0(VALU_DEP_4)
	v_add_f64 v[69:70], v[89:90], -v[69:70]
	v_add_f64 v[89:90], -v[91:92], 1.0
	v_fma_f64 v[71:72], v[49:50], v[71:72], s[56:57]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[75:76], v[55:56], v[61:62]
	v_mul_f64 v[61:62], v[61:62], 0.5
	v_fma_f64 v[57:58], v[87:88], v[57:58], v[85:86]
	v_mul_f64 v[85:86], v[51:52], -v[59:60]
	v_add_f64 v[79:80], v[89:90], -v[79:80]
	v_mul_f64 v[89:90], v[49:50], v[49:50]
	v_fma_f64 v[71:72], v[49:50], v[71:72], s[70:71]
	v_fma_f64 v[69:70], v[45:46], -v[47:48], v[69:70]
	v_fma_f64 v[83:84], -v[61:62], v[75:76], 0.5
	v_fma_f64 v[47:48], v[49:50], v[57:58], -v[47:48]
	v_fma_f64 v[73:74], v[85:86], v[73:74], v[93:94]
	v_mul_f64 v[57:58], v[59:60], v[59:60]
	v_fma_f64 v[79:80], v[51:52], -v[53:54], v[79:80]
	v_fma_f64 v[75:76], v[75:76], v[83:84], v[75:76]
	v_fma_f64 v[61:62], v[61:62], v[83:84], v[61:62]
	v_fma_f64 v[47:48], v[87:88], s[72:73], v[47:48]
	v_fma_f64 v[53:54], v[59:60], v[73:74], -v[53:54]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[83:84], -v[75:76], v[75:76], v[55:56]
	v_add_f64 v[44:45], v[45:46], -v[47:48]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[53:54], v[85:86], s[72:73], v[53:54]
	v_fma_f64 v[49:50], v[83:84], v[61:62], v[75:76]
	v_fma_f64 v[75:76], v[59:60], v[81:82], s[70:71]
	v_fma_f64 v[59:60], v[89:90], v[71:72], v[69:70]
	v_xor_b32_e32 v45, 0x80000000, v45
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[69:70], -v[49:50], v[49:50], v[55:56]
	v_fma_f64 v[57:58], v[57:58], v[75:76], v[79:80]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[59:60], v[77:78], v[59:60]
	v_fma_f64 v[46:47], v[69:70], v[61:62], v[49:50]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_add_f64 v[48:49], v[91:92], v[57:58]
	v_cndmask_b32_e64 v57, 0, 0xffffff80, vcc_lo
	v_add_f64 v[50:51], v[51:52], -v[53:54]
	v_and_b32_e32 v61, 1, v67
	v_and_b32_e32 v53, 1, v68
	v_cmp_eq_u32_e32 vcc_lo, 0, v61
	v_dual_cndmask_b32 v45, v45, v60 :: v_dual_lshlrev_b32 v24, 30, v67
	v_cndmask_b32_e32 v44, v44, v59, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_and_b32_e32 v24, 0x80000000, v24
	v_cmp_eq_u32_e32 vcc_lo, 0, v53
	v_lshlrev_b32_e32 v52, 30, v68
	v_xor_b32_e32 v45, v45, v24
	v_cndmask_b32_e64 v24, 0, v44, s0
	v_ldexp_f64 v[46:47], v[46:47], v57
	v_cndmask_b32_e32 v49, v49, v51, vcc_lo
	v_xor_b32_e32 v25, v52, v25
	v_cndmask_b32_e32 v48, v48, v50, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s75, 3
	s_delay_alu instid0(VALU_DEP_2)
	v_and_b32_e32 v52, 0x80000000, v25
	v_cndmask_b32_e64 v25, 0x7ff80000, v45, s0
	v_cndmask_b32_e64 v21, 0, v48, s0
	v_cndmask_b32_e64 v45, v47, v56, s1
	v_cndmask_b32_e64 v44, v46, v55, s1
	v_lshlrev_b64 v[46:47], 17, v[39:40]
	v_xor_b32_e32 v40, v42, v40
	v_xor_b32_e32 v39, v41, v39
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[24:25], v[44:45], v[24:25]
	v_cndmask_b32_e32 v19, v19, v24, vcc_lo
	v_xor_b32_e32 v49, v49, v52
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v20, v20, v25, vcc_lo
	v_cndmask_b32_e64 v22, 0x7ff80000, v49, s0
	s_cselect_b32 s0, -1, 0
	s_cmp_eq_u32 s75, 2
	v_cndmask_b32_e64 v18, v18, v25, s0
	s_cselect_b32 s1, -1, 0
	v_mul_f64 v[48:49], v[44:45], v[21:22]
	v_xor_b32_e32 v22, v40, v65
	v_xor_b32_e32 v21, v39, v23
	v_xor_b32_e32 v44, v42, v47
	v_xor_b32_e32 v45, v41, v46
	v_lshlrev_b64 v[41:42], 17, v[39:40]
	s_cmp_eq_u32 s75, 1
	v_lshrrev_b64 v[46:47], 19, v[21:22]
	v_xor_b32_e32 v23, v44, v63
	v_xor_b32_e32 v50, v45, v26
	v_xor_b32_e32 v44, v21, v26
	v_lshlrev_b32_e32 v26, 13, v21
	v_xor_b32_e32 v45, v22, v63
	s_cselect_b32 s2, -1, 0
	s_cmp_eq_u32 s75, 0
	v_xor_b32_e32 v39, v50, v39
	s_cselect_b32 s3, -1, 0
	v_xor_b32_e32 v41, v50, v41
	v_mov_b32_e32 v21, v44
	v_xor_b32_e32 v40, v23, v40
	v_xor_b32_e32 v42, v23, v42
	v_mov_b32_e32 v22, v45
	v_cndmask_b32_e64 v17, v17, v24, s0
	v_cndmask_b32_e64 v16, v16, v25, s1
	v_cndmask_b32_e64 v15, v15, v24, s1
	v_cndmask_b32_e64 v14, v14, v25, s2
	v_cndmask_b32_e64 v13, v13, v24, s2
	v_cndmask_b32_e64 v12, v12, v25, s3
	v_cndmask_b32_e64 v11, v11, v24, s3
	s_add_i32 s75, s75, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s75, 5
	v_cndmask_b32_e32 v9, v9, v48, vcc_lo
	v_or_b32_e32 v47, v26, v47
	v_cndmask_b32_e32 v10, v10, v49, vcc_lo
	v_cndmask_b32_e64 v8, v8, v49, s0
	v_cndmask_b32_e64 v6, v6, v49, s1
	v_cndmask_b32_e64 v4, v4, v49, s2
	v_cndmask_b32_e64 v2, v2, v49, s3
	v_mov_b32_e32 v50, v47
	v_cndmask_b32_e64 v7, v7, v48, s0
	v_cndmask_b32_e64 v5, v5, v48, s1
	v_cndmask_b32_e64 v3, v3, v48, s2
	v_cndmask_b32_e64 v1, v1, v48, s3
	v_mov_b32_e32 v49, v46
	s_cbranch_scc1 .LBB2_95
; %bb.104:                              ; %.lr.ph.i.i.5.i230.i.preheader
                                        ;   in Loop: Header=BB2_94 Depth=1
	v_mov_b32_e32 v21, 0
	v_mov_b32_e32 v22, 0
	s_mov_b32 s3, 0
.LBB2_105:                              ; %.lr.ph.i.i.5.i230.i
                                        ;   Parent Loop BB2_94 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB2_106 Depth 3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s3, 1
	s_mov_b32 s6, s3
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s3, 2
	v_dual_cndmask_b32 v23, v12, v14 :: v_dual_cndmask_b32 v24, v11, v13
	v_dual_cndmask_b32 v25, v2, v4 :: v_dual_cndmask_b32 v26, v1, v3
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s3, 3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v23, v23, v16 :: v_dual_cndmask_b32 v24, v24, v15
	v_dual_cndmask_b32 v25, v25, v6 :: v_dual_cndmask_b32 v26, v26, v5
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s3, 4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v23, v23, v18 :: v_dual_cndmask_b32 v48, v24, v17
	v_cndmask_b32_e32 v25, v25, v8, vcc_lo
	v_cndmask_b32_e32 v49, v26, v7, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_cndmask_b32 v24, v23, v20 :: v_dual_cndmask_b32 v23, v48, v19
	v_cndmask_b32_e32 v26, v25, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_cndmask_b32_e32 v25, v49, v9, vcc_lo
.LBB2_106:                              ;   Parent Loop BB2_94 Depth=1
                                        ;     Parent Loop BB2_105 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_add_i32 s6, s6, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s6, 1
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s6, 2
	v_dual_cndmask_b32 v48, v12, v14 :: v_dual_cndmask_b32 v49, v2, v4
	v_cndmask_b32_e32 v50, v1, v3, vcc_lo
	s_cselect_b32 s0, -1, 0
	s_cmp_eq_u32 s6, 3
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e64 v48, v48, v16, s0
	v_cndmask_b32_e64 v49, v49, v6, s0
	v_cndmask_b32_e64 v50, v50, v5, s0
	s_cselect_b32 s1, -1, 0
	s_cmp_eq_u32 s6, 4
	v_cndmask_b32_e64 v48, v48, v18, s1
	v_cndmask_b32_e64 v51, v49, v8, s1
	v_cndmask_b32_e64 v50, v50, v7, s1
	s_cselect_b32 s2, -1, 0
	s_cmp_lt_u32 s6, 4
	v_cndmask_b32_e64 v49, v48, v20, s2
	v_cndmask_b32_e64 v51, v51, v10, s2
	v_cndmask_b32_e64 v50, v50, v9, s2
	v_cndmask_b32_e32 v48, v11, v13, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[50:51], v[25:26], -v[50:51]
	v_cndmask_b32_e64 v48, v48, v15, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v48, v48, v17, s1
	v_cndmask_b32_e64 v48, v48, v19, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[48:49], v[23:24], -v[48:49]
	v_mul_f64 v[50:51], v[50:51], v[50:51]
	v_fma_f64 v[48:49], v[48:49], v[48:49], v[50:51]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_lt_f64_e32 vcc_lo, v[21:22], v[48:49]
	v_dual_cndmask_b32 v22, v22, v49 :: v_dual_cndmask_b32 v21, v21, v48
	s_cbranch_scc1 .LBB2_106
; %bb.107:                              ; %.loopexit.i.i.5.i236.i
                                        ;   in Loop: Header=BB2_105 Depth=2
	s_add_i32 s3, s3, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s3, 4
	s_cbranch_scc1 .LBB2_105
; %bb.108:                              ;   in Loop: Header=BB2_94 Depth=1
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[21:22]
	s_add_i32 s74, s74, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	s_cmp_lg_u32 s74, 0x10000
	v_cndmask_b32_e64 v23, 0, 1, vcc_lo
	v_lshlrev_b32_e32 v23, 8, v23
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[21:22], v[21:22], v23
	v_rsq_f64_e32 v[23:24], v[21:22]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[25:26], v[21:22], v[23:24]
	v_mul_f64 v[23:24], v[23:24], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[48:49], -v[23:24], v[25:26], 0.5
	v_fma_f64 v[25:26], v[25:26], v[48:49], v[25:26]
	v_fma_f64 v[23:24], v[23:24], v[48:49], v[23:24]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[48:49], -v[25:26], v[25:26], v[21:22]
	v_fma_f64 v[25:26], v[48:49], v[23:24], v[25:26]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[48:49], -v[25:26], v[25:26], v[21:22]
	v_fma_f64 v[23:24], v[48:49], v[23:24], v[25:26]
	v_cndmask_b32_e64 v25, 0, 0xffffff80, vcc_lo
	v_cmp_class_f64_e64 vcc_lo, v[21:22], 0x260
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[23:24], v[23:24], v25
	v_dual_cndmask_b32 v22, v24, v22 :: v_dual_cndmask_b32 v21, v23, v21
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[37:38], v[37:38], v[21:22]
	s_cbranch_scc1 .LBB2_94
; %bb.109:                              ; %_ZNK6thrust11hip_rocprim26transform_input_iterator_tIdNS_17counting_iteratorIjNS_11use_defaultES3_S3_EE11estimate_esEixEl.exit.5.i239.i
	v_add_nc_u32_e32 v1, 0x7f356316, v64
	s_mov_b64 s[4:5], 0
                                        ; implicit-def: $vgpr46_vgpr47
                                        ; implicit-def: $vgpr41_vgpr42
                                        ; implicit-def: $vgpr43_vgpr44
                                        ; implicit-def: $vgpr48_vgpr49
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v2, 19, v1
	v_xor3_b32 v1, v1, v2, 0xc761c23c
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v1, v1, 5, v1
	v_add_nc_u32_e32 v2, 0xe9f8cc1d, v1
	v_lshl_add_u32 v1, v1, 9, 0xaccf6200
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v1, v2, v1
	v_lshlrev_b32_e32 v2, 3, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v1, v1, v2, 0xfd7046c5
	v_lshrrev_b32_e32 v2, 16, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_xor3_b32 v1, v1, v2, 0xb55a4f09
.LBB2_110:                              ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v2, 12, v1
	s_cmp_eq_u32 s4, 0
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s4, 1
	v_add3_u32 v1, v1, v2, 0x7ed55d16
	s_cselect_b32 s0, -1, 0
	s_cmp_eq_u32 s4, 2
	s_cselect_b32 s1, -1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v2, 19, v1
	s_cmp_eq_u32 s4, 3
	s_cselect_b32 s2, -1, 0
	s_add_u32 s4, s4, 1
	v_xor3_b32 v1, v1, v2, 0xc761c23c
	s_addc_u32 s5, s5, 0
	s_cmp_lg_u32 s4, 4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v1, v1, 5, v1
	v_add_nc_u32_e32 v2, 0xe9f8cc1d, v1
	v_lshl_add_u32 v1, v1, 9, 0xaccf6200
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v1, v2, v1
	v_lshlrev_b32_e32 v2, 3, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v1, v1, v2, 0xfd7046c5
	v_lshrrev_b32_e32 v2, 16, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor3_b32 v1, v1, v2, 0xb55a4f09
	v_lshlrev_b32_e32 v3, 12, v1
	v_xor_b32_e32 v2, s23, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add3_u32 v1, v1, v3, 0x7ed55d16
	v_cndmask_b32_e32 v47, v47, v2, vcc_lo
	v_cndmask_b32_e64 v42, v42, v2, s0
	v_cndmask_b32_e64 v44, v44, v2, s1
	v_cndmask_b32_e64 v49, v49, v2, s2
	v_lshrrev_b32_e32 v3, 19, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor3_b32 v1, v1, v3, 0xc761c23c
	v_lshl_add_u32 v1, v1, 5, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v3, 0xe9f8cc1d, v1
	v_lshl_add_u32 v1, v1, 9, 0xaccf6200
	v_xor_b32_e32 v1, v3, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v3, 3, v1
	v_add3_u32 v1, v1, v3, 0xfd7046c5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v3, 16, v1
	v_xor3_b32 v1, v1, v3, 0xb55a4f09
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v2, s22, v1
	v_cndmask_b32_e32 v46, v46, v2, vcc_lo
	v_cndmask_b32_e64 v41, v41, v2, s0
	v_cndmask_b32_e64 v43, v43, v2, s1
	v_cndmask_b32_e64 v48, v48, v2, s2
	s_cbranch_scc1 .LBB2_110
; %bb.111:                              ; %.preheader55.i.i.6.i244.i.preheader
	v_mov_b32_e32 v39, 0
	v_dual_mov_b32 v40, 0 :: v_dual_mov_b32 v45, 0
	s_mov_b32 s6, 0x54442d18
	s_mov_b32 s10, 0x33145c07
	s_mov_b32 s12, 0x6dc9c883
	s_mov_b32 s26, 0x33145c00
	s_mov_b32 s28, 0x252049c0
	s_mov_b32 s30, 0x55555555
	s_mov_b32 s34, 0x6b47b09a
	s_mov_b32 s36, 0xbf559e2b
	s_mov_b32 s38, 0xd7f4df2e
	s_mov_b32 s40, 0x16291751
	s_mov_b32 s42, 0x9b27acf1
	s_mov_b32 s44, 0x998ef7b6
	s_mov_b32 s46, 0xfefa39ef
	s_mov_b32 s48, 0x3b39803f
	s_mov_b32 s50, 0x9037ab78
	s_mov_b32 s52, 0x46cc5e42
	s_mov_b32 s54, 0xa17f65f6
	s_mov_b32 s56, 0x19f4ec90
	s_mov_b32 s58, 0x16c16967
	s_mov_b32 s60, 0xb42fdfa7
	s_mov_b32 s62, 0xf9a43bb8
	s_mov_b32 s64, 0x796cde01
	s_mov_b32 s66, 0x19e83e5c
	s_mov_b32 s68, 0x11110bb3
	s_mov_b32 s76, 0
	s_mov_b32 s7, 0x401921fb
	s_mov_b32 s9, 0x3ff921fb
	s_mov_b32 s11, 0x3c91a626
	s_mov_b32 s13, 0x3fe45f30
	s_mov_b32 s25, 0xbff921fb
	s_mov_b32 s27, 0xbc91a626
	s_mov_b32 s29, 0xb97b839a
	s_mov_b32 s31, 0x3fe55555
	s_mov_b32 s35, 0x3fc38538
	s_mov_b32 s37, 0x3fc3ab76
	s_mov_b32 s39, 0x3fc7474d
	s_mov_b32 s41, 0x3fcc71c0
	s_mov_b32 s43, 0x3fd24924
	s_mov_b32 s45, 0x3fd99999
	s_mov_b32 s47, 0x3fe62e42
	s_mov_b32 s49, 0x3c7abc9e
	s_mov_b32 s51, 0x3e21eeb6
	s_mov_b32 s53, 0xbda907db
	s_mov_b32 s55, 0xbe927e4f
	s_mov_b32 s57, 0x3efa01a0
	s_mov_b32 s59, 0xbf56c16c
	s_mov_b32 s61, 0xbe5ae600
	s_mov_b32 s63, 0x3de5e0b2
	s_mov_b32 s65, 0x3ec71de3
	s_mov_b32 s67, 0xbf2a01a0
	s_mov_b32 s69, 0x3f811111
	s_mov_b32 s70, 0x55555780
	s_mov_b32 s73, 0x3fa55555
	s_mov_b32 s75, 0xbfc55555
                                        ; implicit-def: $vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16
                                        ; implicit-def: $vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26
.LBB2_112:                              ; %.preheader55.i.i.6.i244.i
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB2_113 Depth 2
                                        ;     Child Loop BB2_123 Depth 2
                                        ;       Child Loop BB2_124 Depth 3
	v_dual_mov_b32 v55, v47 :: v_dual_mov_b32 v54, v46
	v_dual_mov_b32 v57, v49 :: v_dual_mov_b32 v56, v48
	s_mov_b32 s77, 0
.LBB2_113:                              ;   Parent Loop BB2_112 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v22, v42, v57
	v_xor_b32_e32 v21, v41, v56
                                        ; implicit-def: $vgpr67
                                        ; implicit-def: $vgpr50_vgpr51
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v69, v22, v55
	v_lshrrev_b64 v[47:48], 19, v[21:22]
	v_lshlrev_b32_e32 v23, 13, v21
	v_xor_b32_e32 v68, v21, v54
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_or_b32_e32 v70, v23, v48
	v_add_co_u32 v21, vcc_lo, v47, v68
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v22, vcc_lo, v70, v69, vcc_lo
	v_lshrrev_b64 v[21:22], 11, v[21:22]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_u32_e32 v[22:23], v22
	v_cvt_f64_u32_e32 v[24:25], v21
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[21:22], v[22:23], 32
	v_add_f64 v[21:22], v[21:22], v[24:25]
                                        ; implicit-def: $vgpr25_vgpr26
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[21:22], v[21:22], 0xffffffcb
	v_mul_f64 v[21:22], v[21:22], s[6:7]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ngt_f64_e32 vcc_lo, 0x41d00000, v[21:22]
	v_trig_preop_f64 v[60:61], v[21:22], 0
	v_trig_preop_f64 v[58:59], v[21:22], 1
	v_ldexp_f64 v[62:63], v[21:22], 0xffffff80
	v_trig_preop_f64 v[48:49], v[21:22], 2
	s_and_saveexec_b32 s0, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s2, exec_lo, s0
	s_cbranch_execz .LBB2_115
; %bb.114:                              ;   in Loop: Header=BB2_113 Depth=2
	v_cmp_le_f64_e64 s0, 0x7b000000, v[21:22]
	s_mov_b32 s8, s6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v24, v22, v63, s0
	v_cndmask_b32_e64 v23, v21, v62, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_f64 v[25:26], v[60:61], v[23:24]
	v_mul_f64 v[50:51], v[58:59], v[23:24]
	v_mul_f64 v[79:80], v[48:49], v[23:24]
	v_fma_f64 v[52:53], v[60:61], v[23:24], -v[25:26]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[81:82], v[58:59], v[23:24], -v[50:51]
	v_fma_f64 v[23:24], v[48:49], v[23:24], -v[79:80]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[71:72], v[50:51], v[52:53]
	v_add_f64 v[73:74], v[71:72], -v[50:51]
	v_add_f64 v[77:78], v[25:26], v[71:72]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[75:76], v[71:72], -v[73:74]
	v_add_f64 v[52:53], v[52:53], -v[73:74]
	v_ldexp_f64 v[73:74], v[77:78], -2
	v_add_f64 v[25:26], v[77:78], -v[25:26]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[50:51], v[50:51], -v[75:76]
	v_add_f64 v[75:76], v[79:80], v[81:82]
	v_cmp_neq_f64_e64 s0, 0x7ff00000, |v[73:74]|
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[25:26], v[71:72], -v[25:26]
	v_add_f64 v[50:51], v[52:53], v[50:51]
	v_fract_f64_e32 v[52:53], v[73:74]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[71:72], v[75:76], v[50:51]
	v_cndmask_b32_e64 v53, 0, v53, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v52, 0, v52, s0
	v_ldexp_f64 v[52:53], v[52:53], 2
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[73:74], v[25:26], v[71:72]
	v_add_f64 v[83:84], v[71:72], -v[75:76]
	v_add_f64 v[77:78], v[73:74], v[52:53]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[89:90], v[71:72], -v[83:84]
	v_add_f64 v[50:51], v[50:51], -v[83:84]
	v_add_f64 v[25:26], v[73:74], -v[25:26]
	v_cmp_gt_f64_e64 s0, 0, v[77:78]
	v_add_f64 v[77:78], v[75:76], -v[79:80]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[25:26], v[71:72], -v[25:26]
	v_cndmask_b32_e64 v46, 0, 0x40100000, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[87:88], v[75:76], -v[77:78]
	v_add_f64 v[77:78], v[81:82], -v[77:78]
	v_add_f64 v[75:76], v[75:76], -v[89:90]
	v_add_f64 v[52:53], v[52:53], v[45:46]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[81:82], v[79:80], -v[87:88]
	v_add_f64 v[50:51], v[50:51], v[75:76]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[85:86], v[73:74], v[52:53]
	v_add_f64 v[77:78], v[77:78], v[81:82]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_i32_f64_e32 v46, v[85:86]
	v_add_f64 v[50:51], v[77:78], v[50:51]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_i32_e32 v[83:84], v46
	v_add_f64 v[23:24], v[23:24], v[50:51]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[52:53], v[52:53], -v[83:84]
	v_add_f64 v[23:24], v[25:26], v[23:24]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[75:76], v[73:74], v[52:53]
	v_add_f64 v[50:51], v[75:76], -v[52:53]
	v_cmp_le_f64_e64 s0, 0.5, v[75:76]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[25:26], v[73:74], -v[50:51]
	v_add_co_ci_u32_e64 v67, s1, 0, v46, s0
	v_cndmask_b32_e64 v46, 0, 0x3ff00000, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[23:24], v[23:24], v[25:26]
	v_add_f64 v[25:26], v[75:76], -v[45:46]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[50:51], v[25:26], v[23:24]
	v_mul_f64 v[52:53], v[50:51], s[8:9]
	v_add_f64 v[25:26], v[50:51], -v[25:26]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[71:72], v[50:51], s[8:9], -v[52:53]
	v_add_f64 v[23:24], v[23:24], -v[25:26]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[25:26], v[50:51], s[10:11], v[71:72]
	v_fma_f64 v[23:24], v[23:24], s[8:9], v[25:26]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[25:26], v[52:53], v[23:24]
	v_add_f64 v[50:51], v[25:26], -v[52:53]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[50:51], v[23:24], -v[50:51]
.LBB2_115:                              ; %Flow1193
                                        ;   in Loop: Header=BB2_113 Depth=2
	s_and_not1_saveexec_b32 s0, s2
	s_cbranch_execz .LBB2_117
; %bb.116:                              ;   in Loop: Header=BB2_113 Depth=2
	v_mul_f64 v[23:24], v[21:22], s[12:13]
	s_mov_b32 s24, s6
	s_mov_b32 s2, s26
	s_mov_b32 s3, s11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[23:24], v[23:24]
	v_fma_f64 v[25:26], v[23:24], s[24:25], v[21:22]
	v_mul_f64 v[50:51], v[23:24], s[26:27]
	v_cvt_i32_f64_e32 v67, v[23:24]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[71:72], v[23:24], s[26:27], v[25:26]
	v_add_f64 v[52:53], v[25:26], v[50:51]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[25:26], v[25:26], -v[52:53]
	v_add_f64 v[52:53], v[52:53], -v[71:72]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[25:26], v[25:26], v[50:51]
	v_fma_f64 v[50:51], v[23:24], s[2:3], v[50:51]
	v_add_f64 v[25:26], v[52:53], v[25:26]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[25:26], v[25:26], -v[50:51]
	v_fma_f64 v[50:51], v[23:24], s[28:29], v[25:26]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[25:26], v[71:72], v[50:51]
	v_add_f64 v[52:53], v[25:26], -v[71:72]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[50:51], v[50:51], -v[52:53]
.LBB2_117:                              ; %_ZL3cosd.exit.i.i.6.i254.i
                                        ;   in Loop: Header=BB2_113 Depth=2
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $vgpr65
                                        ; implicit-def: $vgpr23_vgpr24
                                        ; implicit-def: $vgpr52_vgpr53
	s_and_saveexec_b32 s0, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s1, exec_lo, s0
	s_cbranch_execz .LBB2_119
; %bb.118:                              ;   in Loop: Header=BB2_113 Depth=2
	v_cmp_le_f64_e32 vcc_lo, 0x7b000000, v[21:22]
	s_mov_b32 s8, s6
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v24, v22, v63 :: v_dual_cndmask_b32 v23, v21, v62
	v_mul_f64 v[52:53], v[60:61], v[23:24]
	v_mul_f64 v[62:63], v[58:59], v[23:24]
	v_mul_f64 v[79:80], v[48:49], v[23:24]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[60:61], v[60:61], v[23:24], -v[52:53]
	v_fma_f64 v[58:59], v[58:59], v[23:24], -v[62:63]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[23:24], v[48:49], v[23:24], -v[79:80]
	v_add_f64 v[71:72], v[62:63], v[60:61]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[73:74], v[71:72], -v[62:63]
	v_add_f64 v[77:78], v[52:53], v[71:72]
	v_add_f64 v[75:76], v[71:72], -v[73:74]
	v_add_f64 v[60:61], v[60:61], -v[73:74]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[73:74], v[77:78], -2
	v_add_f64 v[52:53], v[77:78], -v[52:53]
	v_add_f64 v[62:63], v[62:63], -v[75:76]
	v_add_f64 v[75:76], v[79:80], v[58:59]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[73:74]|
	v_add_f64 v[52:53], v[71:72], -v[52:53]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[60:61], v[60:61], v[62:63]
	v_fract_f64_e32 v[62:63], v[73:74]
	v_add_f64 v[71:72], v[75:76], v[60:61]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v63, 0, v63 :: v_dual_cndmask_b32 v62, 0, v62
	v_ldexp_f64 v[62:63], v[62:63], 2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[73:74], v[52:53], v[71:72]
	v_add_f64 v[81:82], v[71:72], -v[75:76]
	v_add_f64 v[77:78], v[73:74], v[62:63]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[87:88], v[71:72], -v[81:82]
	v_add_f64 v[60:61], v[60:61], -v[81:82]
	v_add_f64 v[48:49], v[73:74], -v[52:53]
	v_cmp_gt_f64_e32 vcc_lo, 0, v[77:78]
	v_add_f64 v[77:78], v[75:76], -v[79:80]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[48:49], v[71:72], -v[48:49]
	v_cndmask_b32_e64 v46, 0, 0x40100000, vcc_lo
	v_add_f64 v[85:86], v[75:76], -v[77:78]
	v_add_f64 v[58:59], v[58:59], -v[77:78]
	v_add_f64 v[75:76], v[75:76], -v[87:88]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[62:63], v[62:63], v[45:46]
	v_add_f64 v[77:78], v[79:80], -v[85:86]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[60:61], v[60:61], v[75:76]
	v_add_f64 v[83:84], v[73:74], v[62:63]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[58:59], v[58:59], v[77:78]
	v_cvt_i32_f64_e32 v46, v[83:84]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[52:53], v[58:59], v[60:61]
	v_cvt_f64_i32_e32 v[81:82], v46
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[23:24], v[23:24], v[52:53]
	v_add_f64 v[62:63], v[62:63], -v[81:82]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[23:24], v[48:49], v[23:24]
	v_add_f64 v[58:59], v[73:74], v[62:63]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[52:53], v[58:59], -v[62:63]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[58:59]
	v_add_f64 v[48:49], v[73:74], -v[52:53]
	v_add_co_ci_u32_e64 v65, s0, 0, v46, vcc_lo
	v_cndmask_b32_e64 v46, 0, 0x3ff00000, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[23:24], v[23:24], v[48:49]
	v_add_f64 v[48:49], v[58:59], -v[45:46]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[52:53], v[48:49], v[23:24]
	v_mul_f64 v[58:59], v[52:53], s[8:9]
	v_add_f64 v[48:49], v[52:53], -v[48:49]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[60:61], v[52:53], s[8:9], -v[58:59]
	v_add_f64 v[23:24], v[23:24], -v[48:49]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[48:49], v[52:53], s[10:11], v[60:61]
	v_fma_f64 v[48:49], v[23:24], s[8:9], v[48:49]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[23:24], v[58:59], v[48:49]
	v_add_f64 v[52:53], v[23:24], -v[58:59]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[52:53], v[48:49], -v[52:53]
.LBB2_119:                              ; %Flow1192
                                        ;   in Loop: Header=BB2_113 Depth=2
	s_and_not1_saveexec_b32 s0, s1
	s_cbranch_execz .LBB2_121
; %bb.120:                              ;   in Loop: Header=BB2_113 Depth=2
	v_mul_f64 v[23:24], v[21:22], s[12:13]
	s_mov_b32 s24, s6
	s_mov_b32 s2, s26
	s_mov_b32 s3, s11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[48:49], v[23:24]
	v_fma_f64 v[23:24], v[48:49], s[24:25], v[21:22]
	v_mul_f64 v[52:53], v[48:49], s[26:27]
	v_cvt_i32_f64_e32 v65, v[48:49]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[60:61], v[48:49], s[26:27], v[23:24]
	v_add_f64 v[58:59], v[23:24], v[52:53]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[23:24], v[23:24], -v[58:59]
	v_add_f64 v[58:59], v[58:59], -v[60:61]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[23:24], v[23:24], v[52:53]
	v_fma_f64 v[52:53], v[48:49], s[2:3], v[52:53]
	v_add_f64 v[23:24], v[58:59], v[23:24]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[23:24], v[23:24], -v[52:53]
	v_fma_f64 v[52:53], v[48:49], s[28:29], v[23:24]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[23:24], v[60:61], v[52:53]
	v_add_f64 v[58:59], v[23:24], -v[60:61]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[52:53], v[52:53], -v[58:59]
.LBB2_121:                              ; %_ZL3sind.exit.i.i.6.i259.i
                                        ;   in Loop: Header=BB2_113 Depth=2
	s_or_b32 exec_lo, exec_lo, s0
	v_xor_b32_e32 v43, v43, v54
	v_add_co_u32 v54, vcc_lo, v56, v54
	v_xor_b32_e32 v44, v44, v55
	v_add_co_ci_u32_e32 v55, vcc_lo, v57, v55, vcc_lo
	v_lshlrev_b64 v[48:49], 17, v[41:42]
	v_xor_b32_e32 v41, v43, v41
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_xor_b32_e32 v42, v44, v42
	v_lshrrev_b64 v[54:55], 11, v[54:55]
	s_mov_b32 s71, s31
	s_mov_b32 s72, s30
	v_xor_b32_e32 v46, v44, v49
	v_xor_b32_e32 v48, v43, v48
	v_lshlrev_b64 v[43:44], 17, v[41:42]
	v_cvt_f64_u32_e32 v[55:56], v55
	v_xor_b32_e32 v59, v42, v70
	v_xor_b32_e32 v49, v46, v69
	v_xor_b32_e32 v48, v48, v68
	v_xor_b32_e32 v58, v41, v47
	s_mov_b32 s74, s30
	v_xor_b32_e32 v47, v59, v69
	v_xor_b32_e32 v42, v49, v42
	v_xor_b32_e32 v41, v48, v41
	v_xor_b32_e32 v44, v49, v44
	v_xor_b32_e32 v43, v48, v43
	v_lshrrev_b64 v[48:49], 19, v[58:59]
	v_xor_b32_e32 v46, v58, v68
	v_lshlrev_b32_e32 v58, 13, v58
	v_cmp_lg_f64_e64 s1, 0x7ff00000, v[21:22]
	s_cmp_eq_u32 s77, 4
	v_and_b32_e32 v21, 1, v65
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_or_b32_e32 v49, v58, v49
	v_cvt_f64_u32_e32 v[57:58], v54
	v_cmp_eq_u32_e64 s5, 0, v21
	v_ldexp_f64 v[55:56], v[55:56], 32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[54:55], v[55:56], v[57:58]
	v_ldexp_f64 v[54:55], v[54:55], 0xffffffcb
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_frexp_mant_f64_e32 v[56:57], v[54:55]
	v_cmp_gt_f64_e32 vcc_lo, s[30:31], v[56:57]
	v_cndmask_b32_e64 v58, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[56:57], v[56:57], v58
	v_frexp_exp_i32_f64_e32 v58, v[54:55]
	v_add_f64 v[60:61], v[56:57], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_subrev_co_ci_u32_e32 v74, vcc_lo, 0, v58, vcc_lo
	v_add_f64 v[58:59], v[56:57], -1.0
	v_cmp_eq_f64_e32 vcc_lo, 0x7ff00000, v[54:55]
	v_add_f64 v[62:63], v[60:61], -1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_f64 v[56:57], v[56:57], -v[62:63]
	v_rcp_f64_e32 v[62:63], v[60:61]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[68:69], -v[60:61], v[62:63], 1.0
	v_fma_f64 v[62:63], v[68:69], v[62:63], v[62:63]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[68:69], -v[60:61], v[62:63], 1.0
	v_fma_f64 v[62:63], v[68:69], v[62:63], v[62:63]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[68:69], v[58:59], v[62:63]
	v_mul_f64 v[70:71], v[60:61], v[68:69]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[60:61], v[68:69], v[60:61], -v[70:71]
	v_fma_f64 v[56:57], v[68:69], v[56:57], v[60:61]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[60:61], v[70:71], v[56:57]
	v_add_f64 v[72:73], v[58:59], -v[60:61]
	v_add_f64 v[70:71], v[60:61], -v[70:71]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[58:59], v[58:59], -v[72:73]
	v_add_f64 v[56:57], v[70:71], -v[56:57]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[58:59], v[58:59], -v[60:61]
	v_add_f64 v[56:57], v[56:57], v[58:59]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[56:57], v[72:73], v[56:57]
	v_mul_f64 v[56:57], v[62:63], v[56:57]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[58:59], v[68:69], v[56:57]
	v_add_f64 v[60:61], v[58:59], -v[68:69]
	v_ldexp_f64 v[68:69], v[58:59], 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[56:57], v[56:57], -v[60:61]
	v_mul_f64 v[60:61], v[58:59], v[58:59]
	v_ldexp_f64 v[56:57], v[56:57], 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[62:63], v[60:61], s[36:37], s[34:35]
	v_mul_f64 v[58:59], v[58:59], v[60:61]
	v_fma_f64 v[62:63], v[60:61], v[62:63], s[38:39]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[62:63], v[60:61], v[62:63], s[40:41]
	v_fma_f64 v[62:63], v[60:61], v[62:63], s[42:43]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[62:63], v[60:61], v[62:63], s[44:45]
	v_fma_f64 v[62:63], v[60:61], v[62:63], s[70:71]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[58:59], v[58:59], v[62:63]
	v_add_f64 v[60:61], v[68:69], v[58:59]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[62:63], v[60:61], -v[68:69]
	v_add_f64 v[58:59], v[58:59], -v[62:63]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[56:57], v[56:57], v[58:59]
	v_add_f64 v[58:59], v[60:61], v[56:57]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[60:61], v[58:59], -v[60:61]
	v_add_f64 v[56:57], v[56:57], -v[60:61]
	v_cvt_f64_i32_e32 v[60:61], v74
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[62:63], v[60:61], s[46:47]
	v_fma_f64 v[68:69], v[60:61], s[46:47], -v[62:63]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[60:61], v[60:61], s[48:49], v[68:69]
	v_add_f64 v[68:69], v[62:63], v[60:61]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[62:63], v[68:69], -v[62:63]
	v_add_f64 v[60:61], v[60:61], -v[62:63]
	v_add_f64 v[62:63], v[68:69], v[58:59]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[70:71], v[62:63], -v[68:69]
	v_add_f64 v[72:73], v[62:63], -v[70:71]
	v_add_f64 v[58:59], v[58:59], -v[70:71]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[68:69], v[68:69], -v[72:73]
	v_add_f64 v[58:59], v[58:59], v[68:69]
	v_add_f64 v[68:69], v[60:61], v[56:57]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[70:71], v[68:69], -v[60:61]
	v_add_f64 v[58:59], v[68:69], v[58:59]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[72:73], v[68:69], -v[70:71]
	v_add_f64 v[56:57], v[56:57], -v[70:71]
	v_add_f64 v[60:61], v[60:61], -v[72:73]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[56:57], v[56:57], v[60:61]
	v_add_f64 v[60:61], v[62:63], v[58:59]
	v_add_f64 v[62:63], v[60:61], -v[62:63]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[58:59], v[58:59], -v[62:63]
	v_add_f64 v[56:57], v[56:57], v[58:59]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[56:57], v[60:61], v[56:57]
	v_dual_cndmask_b32 v57, v57, v55 :: v_dual_cndmask_b32 v56, v56, v54
	v_cmp_ngt_f64_e32 vcc_lo, 0, v[54:55]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[56:57], v[56:57], -2.0
	v_cndmask_b32_e32 v57, 0x7ff80000, v57, vcc_lo
	v_cmp_nge_f64_e32 vcc_lo, 0, v[54:55]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_cndmask_b32_e32 v56, 0, v56, vcc_lo
	v_cmp_neq_f64_e32 vcc_lo, 0, v[54:55]
	v_cndmask_b32_e32 v57, 0x7ff00000, v57, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[56:57]
	v_cndmask_b32_e64 v54, 0, 1, vcc_lo
	v_lshlrev_b32_e32 v54, 8, v54
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[54:55], v[56:57], v54
	v_rsq_f64_e32 v[56:57], v[54:55]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[58:59], v[54:55], v[56:57]
	v_mul_f64 v[56:57], v[56:57], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[60:61], -v[56:57], v[58:59], 0.5
	v_fma_f64 v[58:59], v[58:59], v[60:61], v[58:59]
	v_fma_f64 v[56:57], v[56:57], v[60:61], v[56:57]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[62:63], -v[58:59], v[58:59], v[54:55]
	v_fma_f64 v[58:59], v[62:63], v[56:57], v[58:59]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[60:61], -v[58:59], v[58:59], v[54:55]
	v_fma_f64 v[56:57], v[60:61], v[56:57], v[58:59]
	v_cndmask_b32_e64 v58, 0, 0xffffff80, vcc_lo
	v_cmp_class_f64_e64 vcc_lo, v[54:55], 0x260
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[56:57], v[56:57], v58
	v_dual_cndmask_b32 v55, v57, v55 :: v_dual_cndmask_b32 v54, v56, v54
	v_mul_f64 v[56:57], v[25:26], v[25:26]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[58:59], v[56:57], 0.5
	v_fma_f64 v[68:69], v[56:57], s[52:53], s[50:51]
	v_add_f64 v[60:61], -v[58:59], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[68:69], v[56:57], v[68:69], s[54:55]
	v_add_f64 v[62:63], -v[60:61], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[68:69], v[56:57], v[68:69], s[56:57]
	v_add_f64 v[58:59], v[62:63], -v[58:59]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[68:69], v[56:57], v[68:69], s[58:59]
	v_mul_f64 v[62:63], v[56:57], v[56:57]
	v_fma_f64 v[58:59], v[25:26], -v[50:51], v[58:59]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[68:69], v[56:57], v[68:69], s[72:73]
	v_fma_f64 v[58:59], v[62:63], v[68:69], v[58:59]
	v_mul_f64 v[62:63], v[25:26], -v[56:57]
	v_mul_f64 v[68:69], v[50:51], 0.5
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[58:59], v[60:61], v[58:59]
	v_fma_f64 v[60:61], v[56:57], s[62:63], s[60:61]
	v_fma_f64 v[60:61], v[56:57], v[60:61], s[64:65]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[60:61], v[56:57], v[60:61], s[66:67]
	v_fma_f64 v[60:61], v[56:57], v[60:61], s[68:69]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[60:61], v[62:63], v[60:61], v[68:69]
	v_fma_f64 v[50:51], v[56:57], v[60:61], -v[50:51]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[50:51], v[62:63], s[74:75], v[50:51]
	v_add_f64 v[25:26], v[25:26], -v[50:51]
	v_and_b32_e32 v50, 1, v67
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_eq_u32_e32 vcc_lo, 0, v50
	v_xor_b32_e32 v26, 0x80000000, v26
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v25, v25, v58 :: v_dual_cndmask_b32 v26, v26, v59
	s_cselect_b32 vcc_lo, -1, 0
	v_lshlrev_b32_e32 v50, 30, v67
	v_cndmask_b32_e64 v25, 0, v25, s1
	s_cmp_eq_u32 s77, 3
	s_cselect_b32 s0, -1, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_and_b32_e32 v50, 0x80000000, v50
	s_cmp_eq_u32 s77, 2
	s_cselect_b32 s2, -1, 0
	s_cmp_eq_u32 s77, 1
	v_xor_b32_e32 v26, v26, v50
	s_cselect_b32 s3, -1, 0
	s_cmp_eq_u32 s77, 0
	s_cselect_b32 s4, -1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cndmask_b32_e64 v26, 0x7ff80000, v26, s1
	s_add_i32 s77, s77, 1
	s_cmp_lg_u32 s77, 5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[25:26], v[54:55], v[25:26]
	v_dual_cndmask_b32 v20, v20, v26 :: v_dual_cndmask_b32 v19, v19, v25
	v_cndmask_b32_e64 v18, v18, v26, s0
	v_cndmask_b32_e64 v17, v17, v25, s0
	v_cndmask_b32_e64 v16, v16, v26, s2
	v_cndmask_b32_e64 v15, v15, v25, s2
	v_cndmask_b32_e64 v14, v14, v26, s3
	v_cndmask_b32_e64 v13, v13, v25, s3
	v_cndmask_b32_e64 v12, v12, v26, s4
	v_cndmask_b32_e64 v11, v11, v25, s4
	v_mul_f64 v[25:26], v[23:24], v[23:24]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[50:51], v[25:26], 0.5
	v_fma_f64 v[60:61], v[25:26], s[52:53], s[50:51]
	v_add_f64 v[56:57], -v[50:51], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[60:61], v[25:26], v[60:61], s[54:55]
	v_add_f64 v[58:59], -v[56:57], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[60:61], v[25:26], v[60:61], s[56:57]
	v_add_f64 v[50:51], v[58:59], -v[50:51]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[60:61], v[25:26], v[60:61], s[58:59]
	v_mul_f64 v[58:59], v[25:26], v[25:26]
	v_fma_f64 v[50:51], v[23:24], -v[52:53], v[50:51]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[60:61], v[25:26], v[60:61], s[72:73]
	v_fma_f64 v[50:51], v[58:59], v[60:61], v[50:51]
	v_mul_f64 v[58:59], v[23:24], -v[25:26]
	v_mul_f64 v[60:61], v[52:53], 0.5
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[50:51], v[56:57], v[50:51]
	v_fma_f64 v[56:57], v[25:26], s[62:63], s[60:61]
	v_fma_f64 v[56:57], v[25:26], v[56:57], s[64:65]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[56:57], v[25:26], v[56:57], s[66:67]
	v_fma_f64 v[56:57], v[25:26], v[56:57], s[68:69]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[56:57], v[58:59], v[56:57], v[60:61]
	v_fma_f64 v[25:26], v[25:26], v[56:57], -v[52:53]
	v_dual_mov_b32 v57, v49 :: v_dual_mov_b32 v56, v48
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[25:26], v[58:59], s[74:75], v[25:26]
	v_add_f64 v[23:24], v[23:24], -v[25:26]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v21, v50, v23, s5
	v_cndmask_b32_e64 v23, v51, v24, s5
	v_lshlrev_b32_e32 v24, 30, v65
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v21, 0, v21, s1
	v_xor_b32_e32 v22, v24, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v22, 0x80000000, v22
	v_xor_b32_e32 v22, v23, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v22, 0x7ff80000, v22, s1
	v_mul_f64 v[21:22], v[54:55], v[21:22]
	v_dual_mov_b32 v55, v47 :: v_dual_mov_b32 v54, v46
	s_delay_alu instid0(VALU_DEP_2)
	v_dual_cndmask_b32 v10, v10, v22 :: v_dual_cndmask_b32 v9, v9, v21
	v_cndmask_b32_e64 v8, v8, v22, s0
	v_cndmask_b32_e64 v7, v7, v21, s0
	v_cndmask_b32_e64 v6, v6, v22, s2
	v_cndmask_b32_e64 v5, v5, v21, s2
	v_cndmask_b32_e64 v4, v4, v22, s3
	v_cndmask_b32_e64 v3, v3, v21, s3
	v_cndmask_b32_e64 v2, v2, v22, s4
	v_cndmask_b32_e64 v1, v1, v21, s4
	s_cbranch_scc1 .LBB2_113
; %bb.122:                              ; %.lr.ph.i.i.6.i266.i.preheader
                                        ;   in Loop: Header=BB2_112 Depth=1
	v_mov_b32_e32 v21, 0
	v_mov_b32_e32 v22, 0
	s_mov_b32 s3, 0
.LBB2_123:                              ; %.lr.ph.i.i.6.i266.i
                                        ;   Parent Loop BB2_112 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB2_124 Depth 3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s3, 1
	s_mov_b32 s4, s3
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s3, 2
	v_dual_cndmask_b32 v23, v12, v14 :: v_dual_cndmask_b32 v24, v11, v13
	v_dual_cndmask_b32 v25, v2, v4 :: v_dual_cndmask_b32 v26, v1, v3
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s3, 3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v23, v23, v16 :: v_dual_cndmask_b32 v24, v24, v15
	v_dual_cndmask_b32 v25, v25, v6 :: v_dual_cndmask_b32 v26, v26, v5
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s3, 4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v23, v23, v18 :: v_dual_cndmask_b32 v50, v24, v17
	v_cndmask_b32_e32 v25, v25, v8, vcc_lo
	v_cndmask_b32_e32 v51, v26, v7, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v24, v23, v20 :: v_dual_cndmask_b32 v23, v50, v19
	v_dual_cndmask_b32 v26, v25, v10 :: v_dual_cndmask_b32 v25, v51, v9
.LBB2_124:                              ;   Parent Loop BB2_112 Depth=1
                                        ;     Parent Loop BB2_123 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_add_i32 s4, s4, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s4, 1
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s4, 2
	v_dual_cndmask_b32 v50, v12, v14 :: v_dual_cndmask_b32 v51, v2, v4
	v_cndmask_b32_e32 v52, v1, v3, vcc_lo
	s_cselect_b32 s0, -1, 0
	s_cmp_eq_u32 s4, 3
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e64 v50, v50, v16, s0
	v_cndmask_b32_e64 v51, v51, v6, s0
	v_cndmask_b32_e64 v52, v52, v5, s0
	s_cselect_b32 s1, -1, 0
	s_cmp_eq_u32 s4, 4
	v_cndmask_b32_e64 v50, v50, v18, s1
	v_cndmask_b32_e64 v53, v51, v8, s1
	v_cndmask_b32_e64 v52, v52, v7, s1
	s_cselect_b32 s2, -1, 0
	s_cmp_lt_u32 s4, 4
	v_cndmask_b32_e64 v51, v50, v20, s2
	v_cndmask_b32_e64 v53, v53, v10, s2
	v_cndmask_b32_e64 v52, v52, v9, s2
	v_cndmask_b32_e32 v50, v11, v13, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[52:53], v[25:26], -v[52:53]
	v_cndmask_b32_e64 v50, v50, v15, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v50, v50, v17, s1
	v_cndmask_b32_e64 v50, v50, v19, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[50:51], v[23:24], -v[50:51]
	v_mul_f64 v[52:53], v[52:53], v[52:53]
	v_fma_f64 v[50:51], v[50:51], v[50:51], v[52:53]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_lt_f64_e32 vcc_lo, v[21:22], v[50:51]
	v_dual_cndmask_b32 v22, v22, v51 :: v_dual_cndmask_b32 v21, v21, v50
	s_cbranch_scc1 .LBB2_124
; %bb.125:                              ; %.loopexit.i.i.6.i272.i
                                        ;   in Loop: Header=BB2_123 Depth=2
	s_add_i32 s3, s3, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s3, 4
	s_cbranch_scc1 .LBB2_123
; %bb.126:                              ;   in Loop: Header=BB2_112 Depth=1
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[21:22]
	s_add_i32 s76, s76, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	s_cmp_lg_u32 s76, 0x10000
	v_cndmask_b32_e64 v23, 0, 1, vcc_lo
	v_lshlrev_b32_e32 v23, 8, v23
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[21:22], v[21:22], v23
	v_rsq_f64_e32 v[23:24], v[21:22]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[25:26], v[21:22], v[23:24]
	v_mul_f64 v[23:24], v[23:24], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[50:51], -v[23:24], v[25:26], 0.5
	v_fma_f64 v[25:26], v[25:26], v[50:51], v[25:26]
	v_fma_f64 v[23:24], v[23:24], v[50:51], v[23:24]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[50:51], -v[25:26], v[25:26], v[21:22]
	v_fma_f64 v[25:26], v[50:51], v[23:24], v[25:26]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[50:51], -v[25:26], v[25:26], v[21:22]
	v_fma_f64 v[23:24], v[50:51], v[23:24], v[25:26]
	v_cndmask_b32_e64 v25, 0, 0xffffff80, vcc_lo
	v_cmp_class_f64_e64 vcc_lo, v[21:22], 0x260
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[23:24], v[23:24], v25
	v_dual_cndmask_b32 v22, v24, v22 :: v_dual_cndmask_b32 v21, v23, v21
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[39:40], v[39:40], v[21:22]
	s_cbranch_scc1 .LBB2_112
; %bb.127:                              ; %_ZNK6thrust11hip_rocprim26transform_input_iterator_tIdNS_17counting_iteratorIjNS_11use_defaultES3_S3_EE11estimate_esEixEl.exit.6.i275.i
	v_add_nc_u32_e32 v1, 0x7f456416, v64
	s_mov_b64 s[4:5], 0
                                        ; implicit-def: $vgpr48_vgpr49
                                        ; implicit-def: $vgpr41_vgpr42
                                        ; implicit-def: $vgpr43_vgpr44
                                        ; implicit-def: $vgpr50_vgpr51
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v2, 19, v1
	v_xor3_b32 v1, v1, v2, 0xc761c23c
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v1, v1, 5, v1
	v_add_nc_u32_e32 v2, 0xe9f8cc1d, v1
	v_lshl_add_u32 v1, v1, 9, 0xaccf6200
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v1, v2, v1
	v_lshlrev_b32_e32 v2, 3, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v1, v1, v2, 0xfd7046c5
	v_lshrrev_b32_e32 v2, 16, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_xor3_b32 v1, v1, v2, 0xb55a4f09
.LBB2_128:                              ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v2, 12, v1
	s_cmp_eq_u32 s4, 0
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s4, 1
	v_add3_u32 v1, v1, v2, 0x7ed55d16
	s_cselect_b32 s0, -1, 0
	s_cmp_eq_u32 s4, 2
	s_cselect_b32 s1, -1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v2, 19, v1
	s_cmp_eq_u32 s4, 3
	s_cselect_b32 s2, -1, 0
	s_add_u32 s4, s4, 1
	v_xor3_b32 v1, v1, v2, 0xc761c23c
	s_addc_u32 s5, s5, 0
	s_cmp_lg_u32 s4, 4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v1, v1, 5, v1
	v_add_nc_u32_e32 v2, 0xe9f8cc1d, v1
	v_lshl_add_u32 v1, v1, 9, 0xaccf6200
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v1, v2, v1
	v_lshlrev_b32_e32 v2, 3, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v1, v1, v2, 0xfd7046c5
	v_lshrrev_b32_e32 v2, 16, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor3_b32 v1, v1, v2, 0xb55a4f09
	v_lshlrev_b32_e32 v3, 12, v1
	v_xor_b32_e32 v2, s23, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add3_u32 v1, v1, v3, 0x7ed55d16
	v_cndmask_b32_e32 v49, v49, v2, vcc_lo
	v_cndmask_b32_e64 v42, v42, v2, s0
	v_cndmask_b32_e64 v44, v44, v2, s1
	v_cndmask_b32_e64 v51, v51, v2, s2
	v_lshrrev_b32_e32 v3, 19, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor3_b32 v1, v1, v3, 0xc761c23c
	v_lshl_add_u32 v1, v1, 5, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v3, 0xe9f8cc1d, v1
	v_lshl_add_u32 v1, v1, 9, 0xaccf6200
	v_xor_b32_e32 v1, v3, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v3, 3, v1
	v_add3_u32 v1, v1, v3, 0xfd7046c5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v3, 16, v1
	v_xor3_b32 v1, v1, v3, 0xb55a4f09
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v2, s22, v1
	v_cndmask_b32_e32 v48, v48, v2, vcc_lo
	v_cndmask_b32_e64 v41, v41, v2, s0
	v_cndmask_b32_e64 v43, v43, v2, s1
	v_cndmask_b32_e64 v50, v50, v2, s2
	s_cbranch_scc1 .LBB2_128
; %bb.129:                              ; %.preheader55.i.i.7.i280.i.preheader
	v_mov_b32_e32 v45, 0
	v_dual_mov_b32 v46, 0 :: v_dual_mov_b32 v47, 0
	s_mov_b32 s6, 0x54442d18
	s_mov_b32 s10, 0x33145c07
	s_mov_b32 s12, 0x6dc9c883
	s_mov_b32 s26, 0x33145c00
	s_mov_b32 s28, 0x252049c0
	s_mov_b32 s30, 0x55555555
	s_mov_b32 s34, 0x6b47b09a
	s_mov_b32 s36, 0xbf559e2b
	s_mov_b32 s38, 0xd7f4df2e
	s_mov_b32 s40, 0x16291751
	s_mov_b32 s42, 0x9b27acf1
	s_mov_b32 s44, 0x998ef7b6
	s_mov_b32 s46, 0xfefa39ef
	s_mov_b32 s48, 0x3b39803f
	s_mov_b32 s50, 0x9037ab78
	s_mov_b32 s52, 0x46cc5e42
	s_mov_b32 s54, 0xa17f65f6
	s_mov_b32 s56, 0x19f4ec90
	s_mov_b32 s58, 0x16c16967
	s_mov_b32 s60, 0xb42fdfa7
	s_mov_b32 s62, 0xf9a43bb8
	s_mov_b32 s64, 0x796cde01
	s_mov_b32 s66, 0x19e83e5c
	s_mov_b32 s68, 0x11110bb3
	s_mov_b32 s76, 0
	s_mov_b32 s7, 0x401921fb
	s_mov_b32 s9, 0x3ff921fb
	s_mov_b32 s11, 0x3c91a626
	s_mov_b32 s13, 0x3fe45f30
	s_mov_b32 s25, 0xbff921fb
	s_mov_b32 s27, 0xbc91a626
	s_mov_b32 s29, 0xb97b839a
	s_mov_b32 s31, 0x3fe55555
	s_mov_b32 s35, 0x3fc38538
	s_mov_b32 s37, 0x3fc3ab76
	s_mov_b32 s39, 0x3fc7474d
	s_mov_b32 s41, 0x3fcc71c0
	s_mov_b32 s43, 0x3fd24924
	s_mov_b32 s45, 0x3fd99999
	s_mov_b32 s47, 0x3fe62e42
	s_mov_b32 s49, 0x3c7abc9e
	s_mov_b32 s51, 0x3e21eeb6
	s_mov_b32 s53, 0xbda907db
	s_mov_b32 s55, 0xbe927e4f
	s_mov_b32 s57, 0x3efa01a0
	s_mov_b32 s59, 0xbf56c16c
	s_mov_b32 s61, 0xbe5ae600
	s_mov_b32 s63, 0x3de5e0b2
	s_mov_b32 s65, 0x3ec71de3
	s_mov_b32 s67, 0xbf2a01a0
	s_mov_b32 s69, 0x3f811111
	s_mov_b32 s70, 0x55555780
	s_mov_b32 s73, 0x3fa55555
	s_mov_b32 s75, 0xbfc55555
                                        ; implicit-def: $vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16
                                        ; implicit-def: $vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26
.LBB2_130:                              ; %.preheader55.i.i.7.i280.i
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB2_131 Depth 2
                                        ;     Child Loop BB2_141 Depth 2
                                        ;       Child Loop BB2_142 Depth 3
	v_dual_mov_b32 v57, v49 :: v_dual_mov_b32 v56, v48
	v_dual_mov_b32 v59, v51 :: v_dual_mov_b32 v58, v50
	s_mov_b32 s77, 0
.LBB2_131:                              ;   Parent Loop BB2_130 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v22, v42, v59
	v_xor_b32_e32 v21, v41, v58
                                        ; implicit-def: $vgpr68
                                        ; implicit-def: $vgpr52_vgpr53
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v70, v22, v57
	v_lshrrev_b64 v[49:50], 19, v[21:22]
	v_lshlrev_b32_e32 v23, 13, v21
	v_xor_b32_e32 v69, v21, v56
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_or_b32_e32 v71, v23, v50
	v_add_co_u32 v21, vcc_lo, v49, v69
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v22, vcc_lo, v71, v70, vcc_lo
	v_lshrrev_b64 v[21:22], 11, v[21:22]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_u32_e32 v[22:23], v22
	v_cvt_f64_u32_e32 v[24:25], v21
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[21:22], v[22:23], 32
	v_add_f64 v[21:22], v[21:22], v[24:25]
                                        ; implicit-def: $vgpr25_vgpr26
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[21:22], v[21:22], 0xffffffcb
	v_mul_f64 v[21:22], v[21:22], s[6:7]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ngt_f64_e32 vcc_lo, 0x41d00000, v[21:22]
	v_trig_preop_f64 v[62:63], v[21:22], 0
	v_trig_preop_f64 v[60:61], v[21:22], 1
	v_ldexp_f64 v[64:65], v[21:22], 0xffffff80
	v_trig_preop_f64 v[50:51], v[21:22], 2
	s_and_saveexec_b32 s0, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s2, exec_lo, s0
	s_cbranch_execz .LBB2_133
; %bb.132:                              ;   in Loop: Header=BB2_131 Depth=2
	v_cmp_le_f64_e64 s0, 0x7b000000, v[21:22]
	s_mov_b32 s8, s6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v24, v22, v65, s0
	v_cndmask_b32_e64 v23, v21, v64, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_f64 v[25:26], v[62:63], v[23:24]
	v_mul_f64 v[52:53], v[60:61], v[23:24]
	v_mul_f64 v[78:79], v[50:51], v[23:24]
	v_fma_f64 v[54:55], v[62:63], v[23:24], -v[25:26]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[80:81], v[60:61], v[23:24], -v[52:53]
	v_fma_f64 v[23:24], v[50:51], v[23:24], -v[78:79]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[67:68], v[52:53], v[54:55]
	v_add_f64 v[72:73], v[67:68], -v[52:53]
	v_add_f64 v[76:77], v[25:26], v[67:68]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[74:75], v[67:68], -v[72:73]
	v_add_f64 v[54:55], v[54:55], -v[72:73]
	v_ldexp_f64 v[72:73], v[76:77], -2
	v_add_f64 v[25:26], v[76:77], -v[25:26]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[52:53], v[52:53], -v[74:75]
	v_add_f64 v[74:75], v[78:79], v[80:81]
	v_cmp_neq_f64_e64 s0, 0x7ff00000, |v[72:73]|
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[25:26], v[67:68], -v[25:26]
	v_add_f64 v[52:53], v[54:55], v[52:53]
	v_fract_f64_e32 v[54:55], v[72:73]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[67:68], v[74:75], v[52:53]
	v_cndmask_b32_e64 v55, 0, v55, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v54, 0, v54, s0
	v_ldexp_f64 v[54:55], v[54:55], 2
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[72:73], v[25:26], v[67:68]
	v_add_f64 v[82:83], v[67:68], -v[74:75]
	v_add_f64 v[76:77], v[72:73], v[54:55]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[88:89], v[67:68], -v[82:83]
	v_add_f64 v[52:53], v[52:53], -v[82:83]
	v_add_f64 v[25:26], v[72:73], -v[25:26]
	v_cmp_gt_f64_e64 s0, 0, v[76:77]
	v_add_f64 v[76:77], v[74:75], -v[78:79]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[25:26], v[67:68], -v[25:26]
	v_cndmask_b32_e64 v48, 0, 0x40100000, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[86:87], v[74:75], -v[76:77]
	v_add_f64 v[76:77], v[80:81], -v[76:77]
	v_add_f64 v[74:75], v[74:75], -v[88:89]
	v_add_f64 v[54:55], v[54:55], v[47:48]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[80:81], v[78:79], -v[86:87]
	v_add_f64 v[52:53], v[52:53], v[74:75]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[84:85], v[72:73], v[54:55]
	v_add_f64 v[76:77], v[76:77], v[80:81]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_i32_f64_e32 v48, v[84:85]
	v_add_f64 v[52:53], v[76:77], v[52:53]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_i32_e32 v[82:83], v48
	v_add_f64 v[23:24], v[23:24], v[52:53]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[54:55], v[54:55], -v[82:83]
	v_add_f64 v[23:24], v[25:26], v[23:24]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[74:75], v[72:73], v[54:55]
	v_add_f64 v[52:53], v[74:75], -v[54:55]
	v_cmp_le_f64_e64 s0, 0.5, v[74:75]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[25:26], v[72:73], -v[52:53]
	v_add_co_ci_u32_e64 v68, s1, 0, v48, s0
	v_cndmask_b32_e64 v48, 0, 0x3ff00000, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[23:24], v[23:24], v[25:26]
	v_add_f64 v[25:26], v[74:75], -v[47:48]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[52:53], v[25:26], v[23:24]
	v_mul_f64 v[54:55], v[52:53], s[8:9]
	v_add_f64 v[25:26], v[52:53], -v[25:26]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[72:73], v[52:53], s[8:9], -v[54:55]
	v_add_f64 v[23:24], v[23:24], -v[25:26]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[25:26], v[52:53], s[10:11], v[72:73]
	v_fma_f64 v[23:24], v[23:24], s[8:9], v[25:26]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[25:26], v[54:55], v[23:24]
	v_add_f64 v[52:53], v[25:26], -v[54:55]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[52:53], v[23:24], -v[52:53]
.LBB2_133:                              ; %Flow1191
                                        ;   in Loop: Header=BB2_131 Depth=2
	s_and_not1_saveexec_b32 s0, s2
	s_cbranch_execz .LBB2_135
; %bb.134:                              ;   in Loop: Header=BB2_131 Depth=2
	v_mul_f64 v[23:24], v[21:22], s[12:13]
	s_mov_b32 s24, s6
	s_mov_b32 s2, s26
	s_mov_b32 s3, s11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[23:24], v[23:24]
	v_fma_f64 v[25:26], v[23:24], s[24:25], v[21:22]
	v_mul_f64 v[52:53], v[23:24], s[26:27]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[67:68], v[23:24], s[26:27], v[25:26]
	v_add_f64 v[54:55], v[25:26], v[52:53]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[25:26], v[25:26], -v[54:55]
	v_add_f64 v[54:55], v[54:55], -v[67:68]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[25:26], v[25:26], v[52:53]
	v_fma_f64 v[52:53], v[23:24], s[2:3], v[52:53]
	v_add_f64 v[25:26], v[54:55], v[25:26]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[25:26], v[25:26], -v[52:53]
	v_fma_f64 v[52:53], v[23:24], s[28:29], v[25:26]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[25:26], v[67:68], v[52:53]
	v_add_f64 v[54:55], v[25:26], -v[67:68]
	v_cvt_i32_f64_e32 v68, v[23:24]
	s_delay_alu instid0(VALU_DEP_2)
	v_add_f64 v[52:53], v[52:53], -v[54:55]
.LBB2_135:                              ; %_ZL3cosd.exit.i.i.7.i290.i
                                        ;   in Loop: Header=BB2_131 Depth=2
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $vgpr67
                                        ; implicit-def: $vgpr23_vgpr24
                                        ; implicit-def: $vgpr54_vgpr55
	s_and_saveexec_b32 s0, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s1, exec_lo, s0
	s_cbranch_execz .LBB2_137
; %bb.136:                              ;   in Loop: Header=BB2_131 Depth=2
	v_cmp_le_f64_e32 vcc_lo, 0x7b000000, v[21:22]
	s_mov_b32 s8, s6
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v24, v22, v65 :: v_dual_cndmask_b32 v23, v21, v64
	v_mul_f64 v[54:55], v[62:63], v[23:24]
	v_mul_f64 v[64:65], v[60:61], v[23:24]
	v_mul_f64 v[80:81], v[50:51], v[23:24]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[62:63], v[62:63], v[23:24], -v[54:55]
	v_fma_f64 v[60:61], v[60:61], v[23:24], -v[64:65]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[23:24], v[50:51], v[23:24], -v[80:81]
	v_add_f64 v[72:73], v[64:65], v[62:63]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[74:75], v[72:73], -v[64:65]
	v_add_f64 v[78:79], v[54:55], v[72:73]
	v_add_f64 v[76:77], v[72:73], -v[74:75]
	v_add_f64 v[62:63], v[62:63], -v[74:75]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[74:75], v[78:79], -2
	v_add_f64 v[54:55], v[78:79], -v[54:55]
	v_add_f64 v[64:65], v[64:65], -v[76:77]
	v_add_f64 v[76:77], v[80:81], v[60:61]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[74:75]|
	v_add_f64 v[54:55], v[72:73], -v[54:55]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[62:63], v[62:63], v[64:65]
	v_fract_f64_e32 v[64:65], v[74:75]
	v_add_f64 v[72:73], v[76:77], v[62:63]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v65, 0, v65 :: v_dual_cndmask_b32 v64, 0, v64
	v_ldexp_f64 v[64:65], v[64:65], 2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[74:75], v[54:55], v[72:73]
	v_add_f64 v[82:83], v[72:73], -v[76:77]
	v_add_f64 v[78:79], v[74:75], v[64:65]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[88:89], v[72:73], -v[82:83]
	v_add_f64 v[62:63], v[62:63], -v[82:83]
	v_add_f64 v[50:51], v[74:75], -v[54:55]
	v_cmp_gt_f64_e32 vcc_lo, 0, v[78:79]
	v_add_f64 v[78:79], v[76:77], -v[80:81]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[50:51], v[72:73], -v[50:51]
	v_cndmask_b32_e64 v48, 0, 0x40100000, vcc_lo
	v_add_f64 v[86:87], v[76:77], -v[78:79]
	v_add_f64 v[60:61], v[60:61], -v[78:79]
	v_add_f64 v[76:77], v[76:77], -v[88:89]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[64:65], v[64:65], v[47:48]
	v_add_f64 v[78:79], v[80:81], -v[86:87]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[62:63], v[62:63], v[76:77]
	v_add_f64 v[84:85], v[74:75], v[64:65]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[60:61], v[60:61], v[78:79]
	v_cvt_i32_f64_e32 v48, v[84:85]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[54:55], v[60:61], v[62:63]
	v_cvt_f64_i32_e32 v[82:83], v48
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[23:24], v[23:24], v[54:55]
	v_add_f64 v[64:65], v[64:65], -v[82:83]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[23:24], v[50:51], v[23:24]
	v_add_f64 v[60:61], v[74:75], v[64:65]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[54:55], v[60:61], -v[64:65]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[60:61]
	v_add_f64 v[50:51], v[74:75], -v[54:55]
	v_add_co_ci_u32_e64 v67, s0, 0, v48, vcc_lo
	v_cndmask_b32_e64 v48, 0, 0x3ff00000, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[23:24], v[23:24], v[50:51]
	v_add_f64 v[50:51], v[60:61], -v[47:48]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[54:55], v[50:51], v[23:24]
	v_mul_f64 v[60:61], v[54:55], s[8:9]
	v_add_f64 v[50:51], v[54:55], -v[50:51]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[62:63], v[54:55], s[8:9], -v[60:61]
	v_add_f64 v[23:24], v[23:24], -v[50:51]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[50:51], v[54:55], s[10:11], v[62:63]
	v_fma_f64 v[50:51], v[23:24], s[8:9], v[50:51]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[23:24], v[60:61], v[50:51]
	v_add_f64 v[54:55], v[23:24], -v[60:61]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[54:55], v[50:51], -v[54:55]
.LBB2_137:                              ; %Flow1190
                                        ;   in Loop: Header=BB2_131 Depth=2
	s_and_not1_saveexec_b32 s0, s1
	s_cbranch_execz .LBB2_139
; %bb.138:                              ;   in Loop: Header=BB2_131 Depth=2
	v_mul_f64 v[23:24], v[21:22], s[12:13]
	s_mov_b32 s24, s6
	s_mov_b32 s2, s26
	s_mov_b32 s3, s11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[50:51], v[23:24]
	v_fma_f64 v[23:24], v[50:51], s[24:25], v[21:22]
	v_mul_f64 v[54:55], v[50:51], s[26:27]
	v_cvt_i32_f64_e32 v67, v[50:51]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[62:63], v[50:51], s[26:27], v[23:24]
	v_add_f64 v[60:61], v[23:24], v[54:55]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[23:24], v[23:24], -v[60:61]
	v_add_f64 v[60:61], v[60:61], -v[62:63]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[23:24], v[23:24], v[54:55]
	v_fma_f64 v[54:55], v[50:51], s[2:3], v[54:55]
	v_add_f64 v[23:24], v[60:61], v[23:24]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[23:24], v[23:24], -v[54:55]
	v_fma_f64 v[54:55], v[50:51], s[28:29], v[23:24]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[23:24], v[62:63], v[54:55]
	v_add_f64 v[60:61], v[23:24], -v[62:63]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[54:55], v[54:55], -v[60:61]
.LBB2_139:                              ; %_ZL3sind.exit.i.i.7.i295.i
                                        ;   in Loop: Header=BB2_131 Depth=2
	s_or_b32 exec_lo, exec_lo, s0
	v_xor_b32_e32 v43, v43, v56
	v_add_co_u32 v56, vcc_lo, v58, v56
	v_xor_b32_e32 v44, v44, v57
	v_add_co_ci_u32_e32 v57, vcc_lo, v59, v57, vcc_lo
	v_lshlrev_b64 v[50:51], 17, v[41:42]
	v_xor_b32_e32 v41, v43, v41
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_xor_b32_e32 v42, v44, v42
	v_lshrrev_b64 v[56:57], 11, v[56:57]
	s_mov_b32 s71, s31
	s_mov_b32 s72, s30
	v_xor_b32_e32 v48, v44, v51
	v_xor_b32_e32 v50, v43, v50
	v_lshlrev_b64 v[43:44], 17, v[41:42]
	v_cvt_f64_u32_e32 v[57:58], v57
	v_xor_b32_e32 v61, v42, v71
	v_xor_b32_e32 v51, v48, v70
	v_xor_b32_e32 v50, v50, v69
	v_xor_b32_e32 v60, v41, v49
	s_mov_b32 s74, s30
	v_xor_b32_e32 v49, v61, v70
	v_xor_b32_e32 v42, v51, v42
	v_xor_b32_e32 v41, v50, v41
	v_xor_b32_e32 v44, v51, v44
	v_xor_b32_e32 v43, v50, v43
	v_lshrrev_b64 v[50:51], 19, v[60:61]
	v_xor_b32_e32 v48, v60, v69
	v_lshlrev_b32_e32 v60, 13, v60
	v_cmp_lg_f64_e64 s1, 0x7ff00000, v[21:22]
	s_cmp_eq_u32 s77, 4
	v_and_b32_e32 v21, 1, v67
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_or_b32_e32 v51, v60, v51
	v_cvt_f64_u32_e32 v[59:60], v56
	v_cmp_eq_u32_e64 s5, 0, v21
	v_ldexp_f64 v[57:58], v[57:58], 32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[56:57], v[57:58], v[59:60]
	v_ldexp_f64 v[56:57], v[56:57], 0xffffffcb
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_frexp_mant_f64_e32 v[58:59], v[56:57]
	v_cmp_gt_f64_e32 vcc_lo, s[30:31], v[58:59]
	v_cndmask_b32_e64 v60, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[58:59], v[58:59], v60
	v_frexp_exp_i32_f64_e32 v60, v[56:57]
	v_add_f64 v[62:63], v[58:59], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_subrev_co_ci_u32_e32 v75, vcc_lo, 0, v60, vcc_lo
	v_add_f64 v[60:61], v[58:59], -1.0
	v_cmp_eq_f64_e32 vcc_lo, 0x7ff00000, v[56:57]
	v_add_f64 v[64:65], v[62:63], -1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_f64 v[58:59], v[58:59], -v[64:65]
	v_rcp_f64_e32 v[64:65], v[62:63]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[69:70], -v[62:63], v[64:65], 1.0
	v_fma_f64 v[64:65], v[69:70], v[64:65], v[64:65]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[69:70], -v[62:63], v[64:65], 1.0
	v_fma_f64 v[64:65], v[69:70], v[64:65], v[64:65]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[69:70], v[60:61], v[64:65]
	v_mul_f64 v[71:72], v[62:63], v[69:70]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[62:63], v[69:70], v[62:63], -v[71:72]
	v_fma_f64 v[58:59], v[69:70], v[58:59], v[62:63]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[62:63], v[71:72], v[58:59]
	v_add_f64 v[73:74], v[60:61], -v[62:63]
	v_add_f64 v[71:72], v[62:63], -v[71:72]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[60:61], v[60:61], -v[73:74]
	v_add_f64 v[58:59], v[71:72], -v[58:59]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[60:61], v[60:61], -v[62:63]
	v_add_f64 v[58:59], v[58:59], v[60:61]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[58:59], v[73:74], v[58:59]
	v_mul_f64 v[58:59], v[64:65], v[58:59]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[60:61], v[69:70], v[58:59]
	v_add_f64 v[62:63], v[60:61], -v[69:70]
	v_ldexp_f64 v[69:70], v[60:61], 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[58:59], v[58:59], -v[62:63]
	v_mul_f64 v[62:63], v[60:61], v[60:61]
	v_ldexp_f64 v[58:59], v[58:59], 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[64:65], v[62:63], s[36:37], s[34:35]
	v_mul_f64 v[60:61], v[60:61], v[62:63]
	v_fma_f64 v[64:65], v[62:63], v[64:65], s[38:39]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[64:65], v[62:63], v[64:65], s[40:41]
	v_fma_f64 v[64:65], v[62:63], v[64:65], s[42:43]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[64:65], v[62:63], v[64:65], s[44:45]
	v_fma_f64 v[64:65], v[62:63], v[64:65], s[70:71]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[60:61], v[60:61], v[64:65]
	v_add_f64 v[62:63], v[69:70], v[60:61]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[64:65], v[62:63], -v[69:70]
	v_add_f64 v[60:61], v[60:61], -v[64:65]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[58:59], v[58:59], v[60:61]
	v_add_f64 v[60:61], v[62:63], v[58:59]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[62:63], v[60:61], -v[62:63]
	v_add_f64 v[58:59], v[58:59], -v[62:63]
	v_cvt_f64_i32_e32 v[62:63], v75
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[64:65], v[62:63], s[46:47]
	v_fma_f64 v[69:70], v[62:63], s[46:47], -v[64:65]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[62:63], v[62:63], s[48:49], v[69:70]
	v_add_f64 v[69:70], v[64:65], v[62:63]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[64:65], v[69:70], -v[64:65]
	v_add_f64 v[62:63], v[62:63], -v[64:65]
	v_add_f64 v[64:65], v[69:70], v[60:61]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[71:72], v[64:65], -v[69:70]
	v_add_f64 v[73:74], v[64:65], -v[71:72]
	v_add_f64 v[60:61], v[60:61], -v[71:72]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[69:70], v[69:70], -v[73:74]
	v_add_f64 v[60:61], v[60:61], v[69:70]
	v_add_f64 v[69:70], v[62:63], v[58:59]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[71:72], v[69:70], -v[62:63]
	v_add_f64 v[60:61], v[69:70], v[60:61]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[73:74], v[69:70], -v[71:72]
	v_add_f64 v[58:59], v[58:59], -v[71:72]
	v_add_f64 v[62:63], v[62:63], -v[73:74]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[58:59], v[58:59], v[62:63]
	v_add_f64 v[62:63], v[64:65], v[60:61]
	v_add_f64 v[64:65], v[62:63], -v[64:65]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[60:61], v[60:61], -v[64:65]
	v_add_f64 v[58:59], v[58:59], v[60:61]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[58:59], v[62:63], v[58:59]
	v_dual_cndmask_b32 v59, v59, v57 :: v_dual_cndmask_b32 v58, v58, v56
	v_cmp_ngt_f64_e32 vcc_lo, 0, v[56:57]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[58:59], v[58:59], -2.0
	v_cndmask_b32_e32 v59, 0x7ff80000, v59, vcc_lo
	v_cmp_nge_f64_e32 vcc_lo, 0, v[56:57]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_cndmask_b32_e32 v58, 0, v58, vcc_lo
	v_cmp_neq_f64_e32 vcc_lo, 0, v[56:57]
	v_cndmask_b32_e32 v59, 0x7ff00000, v59, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[58:59]
	v_cndmask_b32_e64 v56, 0, 1, vcc_lo
	v_lshlrev_b32_e32 v56, 8, v56
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[56:57], v[58:59], v56
	v_rsq_f64_e32 v[58:59], v[56:57]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[60:61], v[56:57], v[58:59]
	v_mul_f64 v[58:59], v[58:59], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[62:63], -v[58:59], v[60:61], 0.5
	v_fma_f64 v[60:61], v[60:61], v[62:63], v[60:61]
	v_fma_f64 v[58:59], v[58:59], v[62:63], v[58:59]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[64:65], -v[60:61], v[60:61], v[56:57]
	v_fma_f64 v[60:61], v[64:65], v[58:59], v[60:61]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[62:63], -v[60:61], v[60:61], v[56:57]
	v_fma_f64 v[58:59], v[62:63], v[58:59], v[60:61]
	v_cndmask_b32_e64 v60, 0, 0xffffff80, vcc_lo
	v_cmp_class_f64_e64 vcc_lo, v[56:57], 0x260
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[58:59], v[58:59], v60
	v_dual_cndmask_b32 v57, v59, v57 :: v_dual_cndmask_b32 v56, v58, v56
	v_mul_f64 v[58:59], v[25:26], v[25:26]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[60:61], v[58:59], 0.5
	v_fma_f64 v[69:70], v[58:59], s[52:53], s[50:51]
	v_add_f64 v[62:63], -v[60:61], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[69:70], v[58:59], v[69:70], s[54:55]
	v_add_f64 v[64:65], -v[62:63], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[69:70], v[58:59], v[69:70], s[56:57]
	v_add_f64 v[60:61], v[64:65], -v[60:61]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[69:70], v[58:59], v[69:70], s[58:59]
	v_mul_f64 v[64:65], v[58:59], v[58:59]
	v_fma_f64 v[60:61], v[25:26], -v[52:53], v[60:61]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[69:70], v[58:59], v[69:70], s[72:73]
	v_fma_f64 v[60:61], v[64:65], v[69:70], v[60:61]
	v_mul_f64 v[64:65], v[25:26], -v[58:59]
	v_mul_f64 v[69:70], v[52:53], 0.5
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[60:61], v[62:63], v[60:61]
	v_fma_f64 v[62:63], v[58:59], s[62:63], s[60:61]
	v_fma_f64 v[62:63], v[58:59], v[62:63], s[64:65]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[62:63], v[58:59], v[62:63], s[66:67]
	v_fma_f64 v[62:63], v[58:59], v[62:63], s[68:69]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[62:63], v[64:65], v[62:63], v[69:70]
	v_fma_f64 v[52:53], v[58:59], v[62:63], -v[52:53]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[52:53], v[64:65], s[74:75], v[52:53]
	v_add_f64 v[25:26], v[25:26], -v[52:53]
	v_and_b32_e32 v52, 1, v68
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_eq_u32_e32 vcc_lo, 0, v52
	v_xor_b32_e32 v26, 0x80000000, v26
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v25, v25, v60 :: v_dual_cndmask_b32 v26, v26, v61
	s_cselect_b32 vcc_lo, -1, 0
	v_lshlrev_b32_e32 v52, 30, v68
	v_cndmask_b32_e64 v25, 0, v25, s1
	s_cmp_eq_u32 s77, 3
	s_cselect_b32 s0, -1, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_and_b32_e32 v52, 0x80000000, v52
	s_cmp_eq_u32 s77, 2
	s_cselect_b32 s2, -1, 0
	s_cmp_eq_u32 s77, 1
	v_xor_b32_e32 v26, v26, v52
	s_cselect_b32 s3, -1, 0
	s_cmp_eq_u32 s77, 0
	s_cselect_b32 s4, -1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cndmask_b32_e64 v26, 0x7ff80000, v26, s1
	s_add_i32 s77, s77, 1
	s_cmp_lg_u32 s77, 5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[25:26], v[56:57], v[25:26]
	v_dual_cndmask_b32 v20, v20, v26 :: v_dual_cndmask_b32 v19, v19, v25
	v_cndmask_b32_e64 v18, v18, v26, s0
	v_cndmask_b32_e64 v17, v17, v25, s0
	v_cndmask_b32_e64 v16, v16, v26, s2
	v_cndmask_b32_e64 v15, v15, v25, s2
	v_cndmask_b32_e64 v14, v14, v26, s3
	v_cndmask_b32_e64 v13, v13, v25, s3
	v_cndmask_b32_e64 v12, v12, v26, s4
	v_cndmask_b32_e64 v11, v11, v25, s4
	v_mul_f64 v[25:26], v[23:24], v[23:24]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[52:53], v[25:26], 0.5
	v_fma_f64 v[62:63], v[25:26], s[52:53], s[50:51]
	v_add_f64 v[58:59], -v[52:53], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[62:63], v[25:26], v[62:63], s[54:55]
	v_add_f64 v[60:61], -v[58:59], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[62:63], v[25:26], v[62:63], s[56:57]
	v_add_f64 v[52:53], v[60:61], -v[52:53]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[62:63], v[25:26], v[62:63], s[58:59]
	v_mul_f64 v[60:61], v[25:26], v[25:26]
	v_fma_f64 v[52:53], v[23:24], -v[54:55], v[52:53]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[62:63], v[25:26], v[62:63], s[72:73]
	v_fma_f64 v[52:53], v[60:61], v[62:63], v[52:53]
	v_mul_f64 v[60:61], v[23:24], -v[25:26]
	v_mul_f64 v[62:63], v[54:55], 0.5
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[52:53], v[58:59], v[52:53]
	v_fma_f64 v[58:59], v[25:26], s[62:63], s[60:61]
	v_fma_f64 v[58:59], v[25:26], v[58:59], s[64:65]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[58:59], v[25:26], v[58:59], s[66:67]
	v_fma_f64 v[58:59], v[25:26], v[58:59], s[68:69]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[58:59], v[60:61], v[58:59], v[62:63]
	v_fma_f64 v[25:26], v[25:26], v[58:59], -v[54:55]
	v_dual_mov_b32 v59, v51 :: v_dual_mov_b32 v58, v50
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[25:26], v[60:61], s[74:75], v[25:26]
	v_add_f64 v[23:24], v[23:24], -v[25:26]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v21, v52, v23, s5
	v_cndmask_b32_e64 v23, v53, v24, s5
	v_lshlrev_b32_e32 v24, 30, v67
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v21, 0, v21, s1
	v_xor_b32_e32 v22, v24, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v22, 0x80000000, v22
	v_xor_b32_e32 v22, v23, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v22, 0x7ff80000, v22, s1
	v_mul_f64 v[21:22], v[56:57], v[21:22]
	v_dual_mov_b32 v57, v49 :: v_dual_mov_b32 v56, v48
	s_delay_alu instid0(VALU_DEP_2)
	v_dual_cndmask_b32 v10, v10, v22 :: v_dual_cndmask_b32 v9, v9, v21
	v_cndmask_b32_e64 v8, v8, v22, s0
	v_cndmask_b32_e64 v7, v7, v21, s0
	v_cndmask_b32_e64 v6, v6, v22, s2
	v_cndmask_b32_e64 v5, v5, v21, s2
	v_cndmask_b32_e64 v4, v4, v22, s3
	v_cndmask_b32_e64 v3, v3, v21, s3
	v_cndmask_b32_e64 v2, v2, v22, s4
	v_cndmask_b32_e64 v1, v1, v21, s4
	s_cbranch_scc1 .LBB2_131
; %bb.140:                              ; %.lr.ph.i.i.7.i302.i.preheader
                                        ;   in Loop: Header=BB2_130 Depth=1
	v_mov_b32_e32 v21, 0
	v_mov_b32_e32 v22, 0
	s_mov_b32 s3, 0
.LBB2_141:                              ; %.lr.ph.i.i.7.i302.i
                                        ;   Parent Loop BB2_130 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB2_142 Depth 3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s3, 1
	s_mov_b32 s4, s3
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s3, 2
	v_dual_cndmask_b32 v23, v12, v14 :: v_dual_cndmask_b32 v24, v11, v13
	v_dual_cndmask_b32 v25, v2, v4 :: v_dual_cndmask_b32 v26, v1, v3
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s3, 3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v23, v23, v16 :: v_dual_cndmask_b32 v24, v24, v15
	v_dual_cndmask_b32 v25, v25, v6 :: v_dual_cndmask_b32 v26, v26, v5
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s3, 4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v23, v23, v18 :: v_dual_cndmask_b32 v52, v24, v17
	v_cndmask_b32_e32 v25, v25, v8, vcc_lo
	v_cndmask_b32_e32 v53, v26, v7, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_cndmask_b32 v24, v23, v20 :: v_dual_cndmask_b32 v23, v52, v19
	v_cndmask_b32_e32 v26, v25, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_cndmask_b32_e32 v25, v53, v9, vcc_lo
.LBB2_142:                              ;   Parent Loop BB2_130 Depth=1
                                        ;     Parent Loop BB2_141 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_add_i32 s4, s4, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s4, 1
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s4, 2
	v_dual_cndmask_b32 v52, v12, v14 :: v_dual_cndmask_b32 v53, v2, v4
	v_cndmask_b32_e32 v54, v1, v3, vcc_lo
	s_cselect_b32 s0, -1, 0
	s_cmp_eq_u32 s4, 3
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e64 v52, v52, v16, s0
	v_cndmask_b32_e64 v53, v53, v6, s0
	v_cndmask_b32_e64 v54, v54, v5, s0
	s_cselect_b32 s1, -1, 0
	s_cmp_eq_u32 s4, 4
	v_cndmask_b32_e64 v52, v52, v18, s1
	v_cndmask_b32_e64 v55, v53, v8, s1
	v_cndmask_b32_e64 v54, v54, v7, s1
	s_cselect_b32 s2, -1, 0
	s_cmp_lt_u32 s4, 4
	v_cndmask_b32_e64 v53, v52, v20, s2
	v_cndmask_b32_e64 v55, v55, v10, s2
	v_cndmask_b32_e64 v54, v54, v9, s2
	v_cndmask_b32_e32 v52, v11, v13, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[54:55], v[25:26], -v[54:55]
	v_cndmask_b32_e64 v52, v52, v15, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v52, v52, v17, s1
	v_cndmask_b32_e64 v52, v52, v19, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[52:53], v[23:24], -v[52:53]
	v_mul_f64 v[54:55], v[54:55], v[54:55]
	v_fma_f64 v[52:53], v[52:53], v[52:53], v[54:55]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_lt_f64_e32 vcc_lo, v[21:22], v[52:53]
	v_dual_cndmask_b32 v22, v22, v53 :: v_dual_cndmask_b32 v21, v21, v52
	s_cbranch_scc1 .LBB2_142
; %bb.143:                              ; %.loopexit.i.i.7.i308.i
                                        ;   in Loop: Header=BB2_141 Depth=2
	s_add_i32 s3, s3, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s3, 4
	s_cbranch_scc1 .LBB2_141
; %bb.144:                              ;   in Loop: Header=BB2_130 Depth=1
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[21:22]
	s_add_i32 s76, s76, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	s_cmp_lg_u32 s76, 0x10000
	v_cndmask_b32_e64 v23, 0, 1, vcc_lo
	v_lshlrev_b32_e32 v23, 8, v23
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[21:22], v[21:22], v23
	v_rsq_f64_e32 v[23:24], v[21:22]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[25:26], v[21:22], v[23:24]
	v_mul_f64 v[23:24], v[23:24], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[52:53], -v[23:24], v[25:26], 0.5
	v_fma_f64 v[25:26], v[25:26], v[52:53], v[25:26]
	v_fma_f64 v[23:24], v[23:24], v[52:53], v[23:24]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[52:53], -v[25:26], v[25:26], v[21:22]
	v_fma_f64 v[25:26], v[52:53], v[23:24], v[25:26]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[52:53], -v[25:26], v[25:26], v[21:22]
	v_fma_f64 v[23:24], v[52:53], v[23:24], v[25:26]
	v_cndmask_b32_e64 v25, 0, 0xffffff80, vcc_lo
	v_cmp_class_f64_e64 vcc_lo, v[21:22], 0x260
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[23:24], v[23:24], v25
	v_dual_cndmask_b32 v22, v24, v22 :: v_dual_cndmask_b32 v21, v23, v21
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[45:46], v[45:46], v[21:22]
	s_cbranch_scc1 .LBB2_130
; %bb.145:                              ; %_ZN7rocprim25block_load_direct_stripedILj256EN6thrust11hip_rocprim26transform_input_iterator_tIdNS1_17counting_iteratorIjNS1_11use_defaultES5_S5_EE11estimate_esEEdLj8EEEvjT0_RAT2__T1_.exit.i
	v_ldexp_f64 v[1:2], v[29:30], -16
	s_mov_b32 s0, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[1:2], 0x3ef00000, v[27:28], v[1:2]
	v_fma_f64 v[1:2], 0x3ef00000, v[31:32], v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[1:2], 0x3ef00000, v[33:34], v[1:2]
	v_fma_f64 v[1:2], 0x3ef00000, v[35:36], v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[1:2], 0x3ef00000, v[37:38], v[1:2]
	v_fma_f64 v[1:2], 0x3ef00000, v[39:40], v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[1:2], 0x3ef00000, v[45:46], v[1:2]
	v_mov_b32_dpp v3, v1 quad_perm:[1,0,3,2] row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_dpp v4, v2 quad_perm:[1,0,3,2] row_mask:0xf bank_mask:0xf
	v_add_f64 v[1:2], v[1:2], v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mov_b32_dpp v3, v1 quad_perm:[2,3,0,1] row_mask:0xf bank_mask:0xf
	v_mov_b32_dpp v4, v2 quad_perm:[2,3,0,1] row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[1:2], v[1:2], v[3:4]
	v_mov_b32_dpp v3, v1 row_shr:4 row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_dpp v4, v2 row_shr:4 row_mask:0xf bank_mask:0xf
	v_add_f64 v[1:2], v[1:2], v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mov_b32_dpp v3, v1 row_shr:8 row_mask:0xf bank_mask:0xf
	v_mov_b32_dpp v4, v2 row_shr:8 row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[1:2], v[1:2], v[3:4]
	ds_swizzle_b32 v3, v1 offset:swizzle(BROADCAST,32,15)
	ds_swizzle_b32 v4, v2 offset:swizzle(BROADCAST,32,15)
	s_waitcnt lgkmcnt(0)
	v_add_f64 v[1:2], v[1:2], v[3:4]
	v_mov_b32_e32 v3, 0
	ds_bpermute_b32 v1, v3, v1 offset:124
	ds_bpermute_b32 v2, v3, v2 offset:124
	v_mbcnt_lo_u32_b32 v3, -1, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v3
	s_cbranch_execz .LBB2_147
; %bb.146:
	v_lshrrev_b32_e32 v4, 2, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v4, 56, v4
	s_waitcnt lgkmcnt(0)
	ds_store_b64 v4, v[1:2]
.LBB2_147:
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmpx_gt_u32_e32 8, v0
	s_cbranch_execz .LBB2_149
; %bb.148:
	v_lshlrev_b32_e32 v1, 3, v3
	v_lshlrev_b32_e32 v3, 2, v3
	ds_load_b64 v[1:2], v1
	v_or_b32_e32 v3, 28, v3
	s_waitcnt lgkmcnt(0)
	v_mov_b32_dpp v4, v1 quad_perm:[1,0,3,2] row_mask:0xf bank_mask:0xf
	v_mov_b32_dpp v5, v2 quad_perm:[1,0,3,2] row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[1:2], v[1:2], v[4:5]
	v_mov_b32_dpp v4, v1 quad_perm:[2,3,0,1] row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_dpp v5, v2 quad_perm:[2,3,0,1] row_mask:0xf bank_mask:0xf
	v_add_f64 v[1:2], v[1:2], v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mov_b32_dpp v4, v1 row_shr:4 row_mask:0xf bank_mask:0xf
	v_mov_b32_dpp v5, v2 row_shr:4 row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[1:2], v[1:2], v[4:5]
	ds_bpermute_b32 v1, v3, v1
	ds_bpermute_b32 v2, v3, v2
.LBB2_149:                              ; %Flow
	s_or_b32 exec_lo, exec_lo, s0
	s_mov_b32 s0, 0
	s_branch .LBB2_151
.LBB2_150:
	s_mov_b32 s0, -1
                                        ; implicit-def: $vgpr1_vgpr2
.LBB2_151:                              ; %Flow1232
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccz .LBB2_333
; %bb.152:
	s_sub_i32 s33, s14, s33
	s_mov_b32 s76, exec_lo
                                        ; implicit-def: $vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16
	v_cmpx_gt_u32_e64 s33, v0
	s_cbranch_execz .LBB2_172
; %bb.153:
	s_waitcnt lgkmcnt(1)
	v_lshlrev_b32_e32 v1, 12, v66
	s_mov_b64 s[4:5], 0
                                        ; implicit-def: $vgpr34_vgpr35
                                        ; implicit-def: $vgpr27_vgpr28
                                        ; implicit-def: $vgpr29_vgpr30
                                        ; implicit-def: $vgpr36_vgpr37
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add3_u32 v1, v66, v1, 0x7ed55d16
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v2, 19, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor3_b32 v1, v1, v2, 0xc761c23c
	v_lshl_add_u32 v1, v1, 5, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v2, 0xe9f8cc1d, v1
	v_lshl_add_u32 v1, v1, 9, 0xaccf6200
	v_xor_b32_e32 v1, v2, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v2, 3, v1
	v_add3_u32 v1, v1, v2, 0xfd7046c5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v2, 16, v1
	v_xor3_b32 v1, v1, v2, 0xb55a4f09
.LBB2_154:                              ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v2, 12, v1
	s_cmp_eq_u32 s4, 0
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s4, 1
	v_add3_u32 v1, v1, v2, 0x7ed55d16
	s_cselect_b32 s0, -1, 0
	s_cmp_eq_u32 s4, 2
	s_cselect_b32 s1, -1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v2, 19, v1
	s_cmp_eq_u32 s4, 3
	s_cselect_b32 s2, -1, 0
	s_add_u32 s4, s4, 1
	v_xor3_b32 v1, v1, v2, 0xc761c23c
	s_addc_u32 s5, s5, 0
	s_cmp_lg_u32 s4, 4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v1, v1, 5, v1
	v_add_nc_u32_e32 v2, 0xe9f8cc1d, v1
	v_lshl_add_u32 v1, v1, 9, 0xaccf6200
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v1, v2, v1
	v_lshlrev_b32_e32 v2, 3, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v1, v1, v2, 0xfd7046c5
	v_lshrrev_b32_e32 v2, 16, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor3_b32 v1, v1, v2, 0xb55a4f09
	v_lshlrev_b32_e32 v3, 12, v1
	v_xor_b32_e32 v2, s23, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add3_u32 v1, v1, v3, 0x7ed55d16
	v_cndmask_b32_e32 v35, v35, v2, vcc_lo
	v_cndmask_b32_e64 v28, v28, v2, s0
	v_cndmask_b32_e64 v30, v30, v2, s1
	v_cndmask_b32_e64 v37, v37, v2, s2
	v_lshrrev_b32_e32 v3, 19, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor3_b32 v1, v1, v3, 0xc761c23c
	v_lshl_add_u32 v1, v1, 5, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v3, 0xe9f8cc1d, v1
	v_lshl_add_u32 v1, v1, 9, 0xaccf6200
	v_xor_b32_e32 v1, v3, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v3, 3, v1
	v_add3_u32 v1, v1, v3, 0xfd7046c5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v3, 16, v1
	v_xor3_b32 v1, v1, v3, 0xb55a4f09
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v2, s22, v1
	v_cndmask_b32_e32 v34, v34, v2, vcc_lo
	v_cndmask_b32_e64 v27, v27, v2, s0
	v_cndmask_b32_e64 v29, v29, v2, s1
	v_cndmask_b32_e64 v36, v36, v2, s2
	s_cbranch_scc1 .LBB2_154
; %bb.155:                              ; %.preheader55.i.i.i.i.preheader
	v_mov_b32_e32 v31, 0
	v_dual_mov_b32 v32, 0 :: v_dual_mov_b32 v33, 0
	s_mov_b32 s4, 0x54442d18
	s_mov_b32 s12, 0x6dc9c883
	s_mov_b32 s26, 0x33145c00
	s_mov_b32 s28, 0x252049c0
	s_mov_b32 s30, 0x55555555
	s_mov_b32 s34, 0x6b47b09a
	s_mov_b32 s36, 0xbf559e2b
	s_mov_b32 s38, 0xd7f4df2e
	s_mov_b32 s40, 0x16291751
	s_mov_b32 s42, 0x9b27acf1
	s_mov_b32 s44, 0x998ef7b6
	s_mov_b32 s46, 0xfefa39ef
	s_mov_b32 s48, 0x3b39803f
	s_mov_b32 s50, 0x9037ab78
	s_mov_b32 s52, 0x46cc5e42
	s_mov_b32 s54, 0xa17f65f6
	s_mov_b32 s56, 0x19f4ec90
	s_mov_b32 s58, 0x16c16967
	s_mov_b32 s60, 0xb42fdfa7
	s_mov_b32 s62, 0xf9a43bb8
	s_mov_b32 s64, 0x796cde01
	s_mov_b32 s66, 0x19e83e5c
	s_mov_b32 s68, 0x11110bb3
	s_mov_b32 s77, 0
	s_mov_b32 s5, 0x401921fb
	s_mov_b32 s7, 0x3ff921fb
	s_mov_b32 s9, 0x3c91a626
	s_mov_b32 s10, 0x33145c07
	s_mov_b32 s13, 0x3fe45f30
	s_mov_b32 s25, 0xbff921fb
	s_mov_b32 s27, 0xbc91a626
	s_mov_b32 s29, 0xb97b839a
	s_mov_b32 s31, 0x3fe55555
	s_mov_b32 s35, 0x3fc38538
	s_mov_b32 s37, 0x3fc3ab76
	s_mov_b32 s39, 0x3fc7474d
	s_mov_b32 s41, 0x3fcc71c0
	s_mov_b32 s43, 0x3fd24924
	s_mov_b32 s45, 0x3fd99999
	s_mov_b32 s47, 0x3fe62e42
	s_mov_b32 s49, 0x3c7abc9e
	s_mov_b32 s51, 0x3e21eeb6
	s_mov_b32 s53, 0xbda907db
	s_mov_b32 s55, 0xbe927e4f
	s_mov_b32 s57, 0x3efa01a0
	s_mov_b32 s59, 0xbf56c16c
	s_mov_b32 s61, 0xbe5ae600
	s_mov_b32 s63, 0x3de5e0b2
	s_mov_b32 s65, 0x3ec71de3
	s_mov_b32 s67, 0xbf2a01a0
	s_mov_b32 s69, 0x3f811111
	s_mov_b32 s70, 0x55555780
	s_mov_b32 s73, 0x3fa55555
	s_mov_b32 s75, 0xbfc55555
                                        ; implicit-def: $vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16
                                        ; implicit-def: $vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26
.LBB2_156:                              ; %.preheader55.i.i.i.i
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB2_157 Depth 2
                                        ;     Child Loop BB2_167 Depth 2
                                        ;       Child Loop BB2_168 Depth 3
	v_dual_mov_b32 v21, v34 :: v_dual_mov_b32 v22, v35
	v_dual_mov_b32 v40, v37 :: v_dual_mov_b32 v39, v36
	s_mov_b32 s78, 0
.LBB2_157:                              ;   Parent Loop BB2_156 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v35, v28, v40
	v_xor_b32_e32 v34, v27, v39
                                        ; implicit-def: $vgpr55
                                        ; implicit-def: $vgpr37_vgpr38
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v53, v35, v22
	v_lshrrev_b64 v[23:24], 19, v[34:35]
	v_lshlrev_b32_e32 v25, 13, v34
	v_xor_b32_e32 v26, v34, v21
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_or_b32_e32 v54, v25, v24
	v_add_co_u32 v24, vcc_lo, v23, v26
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v25, vcc_lo, v54, v53, vcc_lo
	v_lshrrev_b64 v[24:25], 11, v[24:25]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_u32_e32 v[34:35], v25
	v_cvt_f64_u32_e32 v[24:25], v24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[34:35], v[34:35], 32
	v_add_f64 v[24:25], v[34:35], v[24:25]
                                        ; implicit-def: $vgpr35_vgpr36
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[24:25], v[24:25], 0xffffffcb
	v_mul_f64 v[24:25], v[24:25], s[4:5]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ngt_f64_e32 vcc_lo, 0x41d00000, v[24:25]
	v_trig_preop_f64 v[49:50], v[24:25], 0
	v_trig_preop_f64 v[47:48], v[24:25], 1
	v_ldexp_f64 v[51:52], v[24:25], 0xffffff80
	v_trig_preop_f64 v[45:46], v[24:25], 2
	s_and_saveexec_b32 s0, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s2, exec_lo, s0
	s_cbranch_execz .LBB2_159
; %bb.158:                              ;   in Loop: Header=BB2_157 Depth=2
	v_cmp_le_f64_e64 s0, 0x7b000000, v[24:25]
	s_mov_b32 s6, s4
	s_mov_b32 s11, s9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v36, v25, v52, s0
	v_cndmask_b32_e64 v35, v24, v51, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_f64 v[37:38], v[49:50], v[35:36]
	v_mul_f64 v[41:42], v[47:48], v[35:36]
	v_mul_f64 v[63:64], v[45:46], v[35:36]
	v_fma_f64 v[43:44], v[49:50], v[35:36], -v[37:38]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[67:68], v[47:48], v[35:36], -v[41:42]
	v_add_f64 v[55:56], v[41:42], v[43:44]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[57:58], v[55:56], -v[41:42]
	v_add_f64 v[61:62], v[37:38], v[55:56]
	v_add_f64 v[59:60], v[55:56], -v[57:58]
	v_add_f64 v[43:44], v[43:44], -v[57:58]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[57:58], v[61:62], -2
	v_add_f64 v[37:38], v[61:62], -v[37:38]
	v_add_f64 v[41:42], v[41:42], -v[59:60]
	v_add_f64 v[59:60], v[63:64], v[67:68]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cmp_neq_f64_e64 s0, 0x7ff00000, |v[57:58]|
	v_add_f64 v[37:38], v[55:56], -v[37:38]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[41:42], v[43:44], v[41:42]
	v_fract_f64_e32 v[43:44], v[57:58]
	v_add_f64 v[55:56], v[59:60], v[41:42]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v44, 0, v44, s0
	v_cndmask_b32_e64 v43, 0, v43, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[43:44], v[43:44], 2
	v_add_f64 v[57:58], v[37:38], v[55:56]
	v_add_f64 v[69:70], v[55:56], -v[59:60]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[61:62], v[57:58], v[43:44]
	v_add_f64 v[75:76], v[55:56], -v[69:70]
	v_add_f64 v[41:42], v[41:42], -v[69:70]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cmp_gt_f64_e64 s0, 0, v[61:62]
	v_add_f64 v[61:62], v[59:60], -v[63:64]
	v_cndmask_b32_e64 v34, 0, 0x40100000, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[73:74], v[59:60], -v[61:62]
	v_add_f64 v[61:62], v[67:68], -v[61:62]
	v_add_f64 v[59:60], v[59:60], -v[75:76]
	v_add_f64 v[43:44], v[43:44], v[33:34]
	v_fma_f64 v[34:35], v[45:46], v[35:36], -v[63:64]
	v_add_f64 v[36:37], v[57:58], -v[37:38]
	v_add_f64 v[67:68], v[63:64], -v[73:74]
	v_add_f64 v[41:42], v[41:42], v[59:60]
	v_add_f64 v[71:72], v[57:58], v[43:44]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[36:37], v[55:56], -v[36:37]
	v_add_f64 v[61:62], v[61:62], v[67:68]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_i32_f64_e32 v65, v[71:72]
	v_add_f64 v[41:42], v[61:62], v[41:42]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_i32_e32 v[69:70], v65
	v_add_f64 v[34:35], v[34:35], v[41:42]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[43:44], v[43:44], -v[69:70]
	v_add_f64 v[35:36], v[36:37], v[34:35]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[59:60], v[57:58], v[43:44]
	v_add_f64 v[41:42], v[59:60], -v[43:44]
	v_cmp_le_f64_e64 s0, 0.5, v[59:60]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[37:38], v[57:58], -v[41:42]
	v_cndmask_b32_e64 v34, 0, 0x3ff00000, s0
	v_add_co_ci_u32_e64 v55, s1, 0, v65, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[35:36], v[35:36], v[37:38]
	v_add_f64 v[37:38], v[59:60], -v[33:34]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[41:42], v[37:38], v[35:36]
	v_mul_f64 v[43:44], v[41:42], s[6:7]
	v_add_f64 v[37:38], v[41:42], -v[37:38]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[56:57], v[41:42], s[6:7], -v[43:44]
	v_add_f64 v[34:35], v[35:36], -v[37:38]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[36:37], v[41:42], s[10:11], v[56:57]
	v_fma_f64 v[37:38], v[34:35], s[6:7], v[36:37]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[35:36], v[43:44], v[37:38]
	v_add_f64 v[41:42], v[35:36], -v[43:44]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[37:38], v[37:38], -v[41:42]
.LBB2_159:                              ; %Flow1230
                                        ;   in Loop: Header=BB2_157 Depth=2
	s_and_not1_saveexec_b32 s0, s2
	s_cbranch_execz .LBB2_161
; %bb.160:                              ;   in Loop: Header=BB2_157 Depth=2
	v_mul_f64 v[34:35], v[24:25], s[12:13]
	s_mov_b32 s24, s4
	s_mov_b32 s8, s26
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[41:42], v[34:35]
	v_fma_f64 v[34:35], v[41:42], s[24:25], v[24:25]
	v_mul_f64 v[36:37], v[41:42], s[26:27]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[55:56], v[41:42], s[26:27], v[34:35]
	v_add_f64 v[43:44], v[34:35], v[36:37]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[34:35], v[34:35], -v[43:44]
	v_add_f64 v[43:44], v[43:44], -v[55:56]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[34:35], v[34:35], v[36:37]
	v_fma_f64 v[36:37], v[41:42], s[8:9], v[36:37]
	v_add_f64 v[34:35], v[43:44], v[34:35]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[34:35], v[34:35], -v[36:37]
	v_fma_f64 v[37:38], v[41:42], s[28:29], v[34:35]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[35:36], v[55:56], v[37:38]
	v_add_f64 v[43:44], v[35:36], -v[55:56]
	v_cvt_i32_f64_e32 v55, v[41:42]
	s_delay_alu instid0(VALU_DEP_2)
	v_add_f64 v[37:38], v[37:38], -v[43:44]
.LBB2_161:                              ; %_ZL3cosd.exit.i.i.i.i
                                        ;   in Loop: Header=BB2_157 Depth=2
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $vgpr56
                                        ; implicit-def: $vgpr41_vgpr42
                                        ; implicit-def: $vgpr43_vgpr44
	s_and_saveexec_b32 s0, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s1, exec_lo, s0
	s_cbranch_execz .LBB2_163
; %bb.162:                              ;   in Loop: Header=BB2_157 Depth=2
	v_cmp_le_f64_e32 vcc_lo, 0x7b000000, v[24:25]
	s_mov_b32 s6, s4
	s_mov_b32 s11, s9
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v42, v25, v52 :: v_dual_cndmask_b32 v41, v24, v51
	v_mul_f64 v[43:44], v[49:50], v[41:42]
	v_mul_f64 v[51:52], v[47:48], v[41:42]
	v_mul_f64 v[64:65], v[45:46], v[41:42]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[49:50], v[49:50], v[41:42], -v[43:44]
	v_fma_f64 v[47:48], v[47:48], v[41:42], -v[51:52]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[41:42], v[45:46], v[41:42], -v[64:65]
	v_add_f64 v[56:57], v[51:52], v[49:50]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[58:59], v[56:57], -v[51:52]
	v_add_f64 v[62:63], v[43:44], v[56:57]
	v_add_f64 v[60:61], v[56:57], -v[58:59]
	v_add_f64 v[49:50], v[49:50], -v[58:59]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[58:59], v[62:63], -2
	v_add_f64 v[43:44], v[62:63], -v[43:44]
	v_add_f64 v[51:52], v[51:52], -v[60:61]
	v_add_f64 v[60:61], v[64:65], v[47:48]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[58:59]|
	v_add_f64 v[43:44], v[56:57], -v[43:44]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[49:50], v[49:50], v[51:52]
	v_fract_f64_e32 v[51:52], v[58:59]
	v_add_f64 v[56:57], v[60:61], v[49:50]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v52, 0, v52 :: v_dual_cndmask_b32 v51, 0, v51
	v_ldexp_f64 v[51:52], v[51:52], 2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[58:59], v[43:44], v[56:57]
	v_add_f64 v[67:68], v[56:57], -v[60:61]
	v_add_f64 v[62:63], v[58:59], v[51:52]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[73:74], v[56:57], -v[67:68]
	v_add_f64 v[49:50], v[49:50], -v[67:68]
	v_add_f64 v[43:44], v[58:59], -v[43:44]
	v_cmp_gt_f64_e32 vcc_lo, 0, v[62:63]
	v_add_f64 v[62:63], v[60:61], -v[64:65]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[43:44], v[56:57], -v[43:44]
	v_cndmask_b32_e64 v34, 0, 0x40100000, vcc_lo
	v_add_f64 v[71:72], v[60:61], -v[62:63]
	v_add_f64 v[47:48], v[47:48], -v[62:63]
	v_add_f64 v[60:61], v[60:61], -v[73:74]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[51:52], v[51:52], v[33:34]
	v_add_f64 v[62:63], v[64:65], -v[71:72]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[49:50], v[49:50], v[60:61]
	v_add_f64 v[69:70], v[58:59], v[51:52]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[47:48], v[47:48], v[62:63]
	v_cvt_i32_f64_e32 v34, v[69:70]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[45:46], v[47:48], v[49:50]
	v_cvt_f64_i32_e32 v[67:68], v34
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[41:42], v[41:42], v[45:46]
	v_add_f64 v[51:52], v[51:52], -v[67:68]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[41:42], v[43:44], v[41:42]
	v_add_f64 v[47:48], v[58:59], v[51:52]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[45:46], v[47:48], -v[51:52]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[47:48]
	v_add_f64 v[43:44], v[58:59], -v[45:46]
	v_add_co_ci_u32_e64 v56, s0, 0, v34, vcc_lo
	v_cndmask_b32_e64 v34, 0, 0x3ff00000, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[41:42], v[41:42], v[43:44]
	v_add_f64 v[43:44], v[47:48], -v[33:34]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[45:46], v[43:44], v[41:42]
	v_mul_f64 v[47:48], v[45:46], s[6:7]
	v_add_f64 v[43:44], v[45:46], -v[43:44]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[49:50], v[45:46], s[6:7], -v[47:48]
	v_add_f64 v[41:42], v[41:42], -v[43:44]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[43:44], v[45:46], s[10:11], v[49:50]
	v_fma_f64 v[43:44], v[41:42], s[6:7], v[43:44]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[41:42], v[47:48], v[43:44]
	v_add_f64 v[45:46], v[41:42], -v[47:48]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[43:44], v[43:44], -v[45:46]
.LBB2_163:                              ; %Flow1229
                                        ;   in Loop: Header=BB2_157 Depth=2
	s_and_not1_saveexec_b32 s0, s1
	s_cbranch_execz .LBB2_165
; %bb.164:                              ;   in Loop: Header=BB2_157 Depth=2
	v_mul_f64 v[41:42], v[24:25], s[12:13]
	s_mov_b32 s24, s4
	s_mov_b32 s8, s26
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[45:46], v[41:42]
	v_fma_f64 v[41:42], v[45:46], s[24:25], v[24:25]
	v_mul_f64 v[43:44], v[45:46], s[26:27]
	v_cvt_i32_f64_e32 v56, v[45:46]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[49:50], v[45:46], s[26:27], v[41:42]
	v_add_f64 v[47:48], v[41:42], v[43:44]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[41:42], v[41:42], -v[47:48]
	v_add_f64 v[47:48], v[47:48], -v[49:50]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[41:42], v[41:42], v[43:44]
	v_fma_f64 v[43:44], v[45:46], s[8:9], v[43:44]
	v_add_f64 v[41:42], v[47:48], v[41:42]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[41:42], v[41:42], -v[43:44]
	v_fma_f64 v[43:44], v[45:46], s[28:29], v[41:42]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[41:42], v[49:50], v[43:44]
	v_add_f64 v[47:48], v[41:42], -v[49:50]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[43:44], v[43:44], -v[47:48]
.LBB2_165:                              ; %_ZL3sind.exit.i.i.i.i
                                        ;   in Loop: Header=BB2_157 Depth=2
	s_or_b32 exec_lo, exec_lo, s0
	v_add_co_u32 v39, vcc_lo, v39, v21
	v_add_co_ci_u32_e32 v40, vcc_lo, v40, v22, vcc_lo
	s_mov_b32 s71, s31
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_f64 v[75:76], v[37:38], 0.5
	v_mul_f64 v[83:84], v[43:44], 0.5
	s_delay_alu instid0(VALU_DEP_3)
	v_lshrrev_b64 v[39:40], 11, v[39:40]
	s_mov_b32 s72, s30
	s_mov_b32 s74, s30
	v_cmp_lg_f64_e64 s0, 0x7ff00000, v[24:25]
	s_cmp_eq_u32 s78, 4
	v_xor_b32_e32 v30, v30, v22
	v_cvt_f64_u32_e32 v[45:46], v40
	v_cvt_f64_u32_e32 v[39:40], v39
	v_xor_b32_e32 v29, v29, v21
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[45:46], v[45:46], 32
	v_add_f64 v[39:40], v[45:46], v[39:40]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[39:40], v[39:40], 0xffffffcb
	v_frexp_mant_f64_e32 v[45:46], v[39:40]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f64_e32 vcc_lo, s[30:31], v[45:46]
	v_cndmask_b32_e64 v34, 0, 1, vcc_lo
	v_ldexp_f64 v[45:46], v[45:46], v34
	v_frexp_exp_i32_f64_e32 v34, v[39:40]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[47:48], v[45:46], 1.0
	v_add_f64 v[57:58], v[45:46], -1.0
	v_subrev_co_ci_u32_e32 v34, vcc_lo, 0, v34, vcc_lo
	v_cmp_eq_f64_e32 vcc_lo, 0x7ff00000, v[39:40]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[49:50], v[47:48]
	v_add_f64 v[59:60], v[47:48], -1.0
	v_add_f64 v[45:46], v[45:46], -v[59:60]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[51:52], -v[47:48], v[49:50], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[49:50], v[51:52], v[49:50], v[49:50]
	v_fma_f64 v[51:52], -v[47:48], v[49:50], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[49:50], v[51:52], v[49:50], v[49:50]
	v_mul_f64 v[51:52], v[57:58], v[49:50]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[61:62], v[47:48], v[51:52]
	v_fma_f64 v[47:48], v[51:52], v[47:48], -v[61:62]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[45:46], v[51:52], v[45:46], v[47:48]
	v_add_f64 v[47:48], v[61:62], v[45:46]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[59:60], v[57:58], -v[47:48]
	v_add_f64 v[61:62], v[47:48], -v[61:62]
	v_add_f64 v[57:58], v[57:58], -v[59:60]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[45:46], v[61:62], -v[45:46]
	v_add_f64 v[47:48], v[57:58], -v[47:48]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[45:46], v[45:46], v[47:48]
	v_add_f64 v[45:46], v[59:60], v[45:46]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[45:46], v[49:50], v[45:46]
	v_add_f64 v[47:48], v[51:52], v[45:46]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[49:50], v[47:48], v[47:48]
	v_fma_f64 v[57:58], v[49:50], s[36:37], s[34:35]
	v_mul_f64 v[59:60], v[47:48], v[49:50]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[57:58], v[49:50], v[57:58], s[38:39]
	v_fma_f64 v[57:58], v[49:50], v[57:58], s[40:41]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[57:58], v[49:50], v[57:58], s[42:43]
	v_fma_f64 v[57:58], v[49:50], v[57:58], s[44:45]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[49:50], v[49:50], v[57:58], s[70:71]
	v_ldexp_f64 v[57:58], v[47:48], 1
	v_add_f64 v[47:48], v[47:48], -v[51:52]
	v_mul_f64 v[49:50], v[59:60], v[49:50]
	v_cvt_f64_i32_e32 v[59:60], v34
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[45:46], v[45:46], -v[47:48]
	v_add_f64 v[51:52], v[57:58], v[49:50]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[61:62], v[59:60], s[46:47]
	v_ldexp_f64 v[45:46], v[45:46], 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[47:48], v[51:52], -v[57:58]
	v_fma_f64 v[57:58], v[59:60], s[46:47], -v[61:62]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[47:48], v[49:50], -v[47:48]
	v_fma_f64 v[49:50], v[59:60], s[48:49], v[57:58]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[45:46], v[45:46], v[47:48]
	v_add_f64 v[47:48], v[61:62], v[49:50]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[57:58], v[51:52], v[45:46]
	v_add_f64 v[61:62], v[47:48], -v[61:62]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[59:60], v[47:48], v[57:58]
	v_add_f64 v[51:52], v[57:58], -v[51:52]
	v_add_f64 v[49:50], v[49:50], -v[61:62]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[63:64], v[59:60], -v[47:48]
	v_add_f64 v[45:46], v[45:46], -v[51:52]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[67:68], v[59:60], -v[63:64]
	v_add_f64 v[51:52], v[57:58], -v[63:64]
	v_add_f64 v[57:58], v[49:50], v[45:46]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[47:48], v[47:48], -v[67:68]
	v_add_f64 v[47:48], v[51:52], v[47:48]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[51:52], v[57:58], -v[49:50]
	v_add_f64 v[47:48], v[57:58], v[47:48]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[57:58], v[57:58], -v[51:52]
	v_add_f64 v[45:46], v[45:46], -v[51:52]
	v_add_f64 v[61:62], v[59:60], v[47:48]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[49:50], v[49:50], -v[57:58]
	v_add_f64 v[51:52], v[61:62], -v[59:60]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[45:46], v[45:46], v[49:50]
	v_mul_f64 v[49:50], v[41:42], v[41:42]
	v_add_f64 v[47:48], v[47:48], -v[51:52]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mul_f64 v[69:70], v[49:50], 0.5
	v_fma_f64 v[71:72], v[49:50], s[52:53], s[50:51]
	v_add_f64 v[45:46], v[45:46], v[47:48]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[81:82], -v[69:70], 1.0
	v_fma_f64 v[71:72], v[49:50], v[71:72], s[54:55]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[45:46], v[61:62], v[45:46]
	v_fma_f64 v[61:62], v[49:50], s[62:63], s[60:61]
	v_fma_f64 v[71:72], v[49:50], v[71:72], s[56:57]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_dual_cndmask_b32 v46, v46, v40 :: v_dual_cndmask_b32 v45, v45, v39
	v_cmp_ngt_f64_e32 vcc_lo, 0, v[39:40]
	v_fma_f64 v[61:62], v[49:50], v[61:62], s[64:65]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[71:72], v[49:50], v[71:72], s[58:59]
	v_mul_f64 v[45:46], v[45:46], -2.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[61:62], v[49:50], v[61:62], s[66:67]
	v_cndmask_b32_e32 v34, 0x7ff80000, v46, vcc_lo
	v_cmp_nge_f64_e32 vcc_lo, 0, v[39:40]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_fma_f64 v[61:62], v[49:50], v[61:62], s[68:69]
	v_cndmask_b32_e32 v45, 0, v45, vcc_lo
	v_cmp_neq_f64_e32 vcc_lo, 0, v[39:40]
	v_mul_f64 v[39:40], v[35:36], v[35:36]
	v_cndmask_b32_e32 v46, 0x7ff00000, v34, vcc_lo
	v_fma_f64 v[47:48], v[39:40], s[62:63], s[60:61]
	v_mul_f64 v[57:58], v[39:40], 0.5
	v_fma_f64 v[59:60], v[39:40], s[52:53], s[50:51]
	v_mul_f64 v[77:78], v[35:36], -v[39:40]
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[45:46]
	v_fma_f64 v[47:48], v[39:40], v[47:48], s[64:65]
	v_add_f64 v[67:68], -v[57:58], 1.0
	v_fma_f64 v[59:60], v[39:40], v[59:60], s[54:55]
	v_cndmask_b32_e64 v34, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v34, 8, v34
	v_ldexp_f64 v[45:46], v[45:46], v34
	v_fma_f64 v[47:48], v[39:40], v[47:48], s[66:67]
	v_add_f64 v[79:80], -v[67:68], 1.0
	v_fma_f64 v[59:60], v[39:40], v[59:60], s[56:57]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_rsq_f64_e32 v[51:52], v[45:46]
	v_cmp_class_f64_e64 s1, v[45:46], 0x260
	v_fma_f64 v[47:48], v[39:40], v[47:48], s[68:69]
	s_delay_alu instid0(VALU_DEP_4)
	v_add_f64 v[57:58], v[79:80], -v[57:58]
	v_add_f64 v[79:80], -v[81:82], 1.0
	v_fma_f64 v[59:60], v[39:40], v[59:60], s[58:59]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[63:64], v[45:46], v[51:52]
	v_mul_f64 v[51:52], v[51:52], 0.5
	v_fma_f64 v[47:48], v[77:78], v[47:48], v[75:76]
	v_mul_f64 v[75:76], v[41:42], -v[49:50]
	v_add_f64 v[69:70], v[79:80], -v[69:70]
	v_mul_f64 v[79:80], v[39:40], v[39:40]
	v_fma_f64 v[59:60], v[39:40], v[59:60], s[72:73]
	v_fma_f64 v[57:58], v[35:36], -v[37:38], v[57:58]
	v_fma_f64 v[73:74], -v[51:52], v[63:64], 0.5
	v_fma_f64 v[37:38], v[39:40], v[47:48], -v[37:38]
	v_fma_f64 v[61:62], v[75:76], v[61:62], v[83:84]
	v_mul_f64 v[47:48], v[49:50], v[49:50]
	v_fma_f64 v[69:70], v[41:42], -v[43:44], v[69:70]
	v_fma_f64 v[63:64], v[63:64], v[73:74], v[63:64]
	v_fma_f64 v[51:52], v[51:52], v[73:74], v[51:52]
	v_fma_f64 v[37:38], v[77:78], s[74:75], v[37:38]
	v_fma_f64 v[43:44], v[49:50], v[61:62], -v[43:44]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[73:74], -v[63:64], v[63:64], v[45:46]
	v_add_f64 v[34:35], v[35:36], -v[37:38]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[43:44], v[75:76], s[74:75], v[43:44]
	v_fma_f64 v[39:40], v[73:74], v[51:52], v[63:64]
	v_fma_f64 v[63:64], v[49:50], v[71:72], s[72:73]
	v_fma_f64 v[49:50], v[79:80], v[59:60], v[57:58]
	v_xor_b32_e32 v35, 0x80000000, v35
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[57:58], -v[39:40], v[39:40], v[45:46]
	v_fma_f64 v[47:48], v[47:48], v[63:64], v[69:70]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[49:50], v[67:68], v[49:50]
	v_fma_f64 v[36:37], v[57:58], v[51:52], v[39:40]
	s_delay_alu instid0(VALU_DEP_3)
	v_add_f64 v[38:39], v[81:82], v[47:48]
	v_add_f64 v[40:41], v[41:42], -v[43:44]
	v_and_b32_e32 v43, 1, v56
	v_cndmask_b32_e64 v47, 0, 0xffffff80, vcc_lo
	v_and_b32_e32 v51, 1, v55
	v_lshlrev_b32_e32 v42, 30, v56
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_eq_u32_e32 vcc_lo, 0, v51
	v_xor_b32_e32 v25, v42, v25
	v_dual_cndmask_b32 v34, v34, v49 :: v_dual_cndmask_b32 v35, v35, v50
	v_cmp_eq_u32_e32 vcc_lo, 0, v43
	v_lshlrev_b32_e32 v24, 30, v55
	v_ldexp_f64 v[36:37], v[36:37], v47
	v_dual_cndmask_b32 v39, v39, v41 :: v_dual_cndmask_b32 v38, v38, v40
	s_cselect_b32 vcc_lo, -1, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_and_b32_e32 v24, 0x80000000, v24
	v_and_b32_e32 v42, 0x80000000, v25
	s_cmp_eq_u32 s78, 3
	v_cndmask_b32_e64 v21, 0, v38, s0
	v_xor_b32_e32 v35, v35, v24
	v_cndmask_b32_e64 v24, 0, v34, s0
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e64 v25, 0x7ff80000, v35, s0
	v_cndmask_b32_e64 v35, v37, v46, s1
	v_cndmask_b32_e64 v34, v36, v45, s1
	v_lshlrev_b64 v[36:37], 17, v[27:28]
	v_xor_b32_e32 v28, v30, v28
	v_xor_b32_e32 v27, v29, v27
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[24:25], v[34:35], v[24:25]
	v_cndmask_b32_e32 v19, v19, v24, vcc_lo
	v_xor_b32_e32 v39, v39, v42
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v20, v20, v25, vcc_lo
	v_cndmask_b32_e64 v22, 0x7ff80000, v39, s0
	s_cselect_b32 s0, -1, 0
	s_cmp_eq_u32 s78, 2
	v_cndmask_b32_e64 v18, v18, v25, s0
	s_cselect_b32 s1, -1, 0
	v_mul_f64 v[38:39], v[34:35], v[21:22]
	v_xor_b32_e32 v22, v28, v54
	v_xor_b32_e32 v21, v27, v23
	v_xor_b32_e32 v34, v30, v37
	v_xor_b32_e32 v35, v29, v36
	v_lshlrev_b64 v[29:30], 17, v[27:28]
	s_cmp_eq_u32 s78, 1
	v_lshrrev_b64 v[36:37], 19, v[21:22]
	v_xor_b32_e32 v23, v34, v53
	v_xor_b32_e32 v40, v35, v26
	v_xor_b32_e32 v34, v21, v26
	v_lshlrev_b32_e32 v26, 13, v21
	v_xor_b32_e32 v35, v22, v53
	s_cselect_b32 s2, -1, 0
	s_cmp_eq_u32 s78, 0
	v_xor_b32_e32 v27, v40, v27
	v_or_b32_e32 v37, v26, v37
	s_cselect_b32 s3, -1, 0
	v_xor_b32_e32 v29, v40, v29
	v_mov_b32_e32 v21, v34
	v_xor_b32_e32 v28, v23, v28
	v_xor_b32_e32 v30, v23, v30
	v_mov_b32_e32 v22, v35
	v_cndmask_b32_e64 v17, v17, v24, s0
	v_cndmask_b32_e64 v16, v16, v25, s1
	v_cndmask_b32_e64 v15, v15, v24, s1
	v_cndmask_b32_e64 v14, v14, v25, s2
	v_cndmask_b32_e64 v13, v13, v24, s2
	v_cndmask_b32_e64 v12, v12, v25, s3
	v_cndmask_b32_e64 v11, v11, v24, s3
	s_add_i32 s78, s78, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s78, 5
	v_cndmask_b32_e32 v10, v10, v39, vcc_lo
	v_cndmask_b32_e64 v8, v8, v39, s0
	v_cndmask_b32_e64 v6, v6, v39, s1
	v_cndmask_b32_e64 v4, v4, v39, s2
	v_cndmask_b32_e64 v2, v2, v39, s3
	v_mov_b32_e32 v40, v37
	v_cndmask_b32_e32 v9, v9, v38, vcc_lo
	v_cndmask_b32_e64 v7, v7, v38, s0
	v_cndmask_b32_e64 v5, v5, v38, s1
	v_cndmask_b32_e64 v3, v3, v38, s2
	v_cndmask_b32_e64 v1, v1, v38, s3
	v_mov_b32_e32 v39, v36
	s_cbranch_scc1 .LBB2_157
; %bb.166:                              ; %.lr.ph.i.i.i.i.preheader
                                        ;   in Loop: Header=BB2_156 Depth=1
	v_mov_b32_e32 v21, 0
	v_mov_b32_e32 v22, 0
	s_mov_b32 s3, 0
.LBB2_167:                              ; %.lr.ph.i.i.i.i
                                        ;   Parent Loop BB2_156 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB2_168 Depth 3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s3, 1
	s_mov_b32 s6, s3
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s3, 2
	v_dual_cndmask_b32 v23, v12, v14 :: v_dual_cndmask_b32 v24, v11, v13
	v_dual_cndmask_b32 v25, v2, v4 :: v_dual_cndmask_b32 v26, v1, v3
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s3, 3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v23, v23, v16 :: v_dual_cndmask_b32 v24, v24, v15
	v_dual_cndmask_b32 v25, v25, v6 :: v_dual_cndmask_b32 v26, v26, v5
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s3, 4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v23, v23, v18 :: v_dual_cndmask_b32 v38, v24, v17
	v_cndmask_b32_e32 v25, v25, v8, vcc_lo
	v_cndmask_b32_e32 v39, v26, v7, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v24, v23, v20 :: v_dual_cndmask_b32 v23, v38, v19
	v_dual_cndmask_b32 v26, v25, v10 :: v_dual_cndmask_b32 v25, v39, v9
.LBB2_168:                              ;   Parent Loop BB2_156 Depth=1
                                        ;     Parent Loop BB2_167 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_add_i32 s6, s6, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s6, 1
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s6, 2
	v_dual_cndmask_b32 v38, v12, v14 :: v_dual_cndmask_b32 v39, v2, v4
	v_cndmask_b32_e32 v40, v1, v3, vcc_lo
	s_cselect_b32 s0, -1, 0
	s_cmp_eq_u32 s6, 3
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e64 v38, v38, v16, s0
	v_cndmask_b32_e64 v39, v39, v6, s0
	v_cndmask_b32_e64 v40, v40, v5, s0
	s_cselect_b32 s1, -1, 0
	s_cmp_eq_u32 s6, 4
	v_cndmask_b32_e64 v38, v38, v18, s1
	v_cndmask_b32_e64 v41, v39, v8, s1
	v_cndmask_b32_e64 v40, v40, v7, s1
	s_cselect_b32 s2, -1, 0
	s_cmp_gt_u32 s6, 3
	v_cndmask_b32_e64 v39, v38, v20, s2
	v_cndmask_b32_e64 v41, v41, v10, s2
	v_cndmask_b32_e64 v40, v40, v9, s2
	v_cndmask_b32_e32 v38, v11, v13, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[40:41], v[25:26], -v[40:41]
	v_cndmask_b32_e64 v38, v38, v15, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v38, v38, v17, s1
	v_cndmask_b32_e64 v38, v38, v19, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[38:39], v[23:24], -v[38:39]
	v_mul_f64 v[40:41], v[40:41], v[40:41]
	v_fma_f64 v[38:39], v[38:39], v[38:39], v[40:41]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_lt_f64_e32 vcc_lo, v[21:22], v[38:39]
	v_dual_cndmask_b32 v22, v22, v39 :: v_dual_cndmask_b32 v21, v21, v38
	s_cbranch_scc0 .LBB2_168
; %bb.169:                              ; %.loopexit.i.i.i.i
                                        ;   in Loop: Header=BB2_167 Depth=2
	s_add_i32 s3, s3, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s3, 4
	s_cbranch_scc1 .LBB2_167
; %bb.170:                              ;   in Loop: Header=BB2_156 Depth=1
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[21:22]
	s_add_i32 s77, s77, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	s_cmp_eq_u32 s77, 0x10000
	v_cndmask_b32_e64 v23, 0, 1, vcc_lo
	v_lshlrev_b32_e32 v23, 8, v23
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[21:22], v[21:22], v23
	v_rsq_f64_e32 v[23:24], v[21:22]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[25:26], v[21:22], v[23:24]
	v_mul_f64 v[23:24], v[23:24], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[38:39], -v[23:24], v[25:26], 0.5
	v_fma_f64 v[25:26], v[25:26], v[38:39], v[25:26]
	v_fma_f64 v[23:24], v[23:24], v[38:39], v[23:24]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[38:39], -v[25:26], v[25:26], v[21:22]
	v_fma_f64 v[25:26], v[38:39], v[23:24], v[25:26]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[38:39], -v[25:26], v[25:26], v[21:22]
	v_fma_f64 v[23:24], v[38:39], v[23:24], v[25:26]
	v_cndmask_b32_e64 v25, 0, 0xffffff80, vcc_lo
	v_cmp_class_f64_e64 vcc_lo, v[21:22], 0x260
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[23:24], v[23:24], v25
	v_dual_cndmask_b32 v22, v24, v22 :: v_dual_cndmask_b32 v21, v23, v21
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[31:32], v[31:32], v[21:22]
	s_cbranch_scc0 .LBB2_156
; %bb.171:                              ; %_ZNK6thrust11hip_rocprim26transform_input_iterator_tIdNS_17counting_iteratorIjNS_11use_defaultES3_S3_EE11estimate_esEixEl.exit.i.i
	s_delay_alu instid0(VALU_DEP_1)
	v_ldexp_f64 v[1:2], v[31:32], -16
.LBB2_172:                              ; %Flow1231
	s_or_b32 exec_lo, exec_lo, s76
	v_or_b32_e32 v17, 0x100, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_u32_e32 vcc_lo, s33, v17
	s_and_saveexec_b32 s76, vcc_lo
	s_cbranch_execz .LBB2_192
; %bb.173:
	s_movk_i32 s0, 0x1001
	s_mov_b64 s[4:5], 0
	v_mad_u64_u32 v[3:4], null, v66, s0, 0x7ee55e16
                                        ; implicit-def: $vgpr48_vgpr49
                                        ; implicit-def: $vgpr43_vgpr44
                                        ; implicit-def: $vgpr50_vgpr51
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v4, 19, v3
	v_xor3_b32 v3, v3, v4, 0xc761c23c
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v3, v3, 5, v3
	v_add_nc_u32_e32 v4, 0xe9f8cc1d, v3
	v_lshl_add_u32 v3, v3, 9, 0xaccf6200
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v3, v4, v3
	v_lshlrev_b32_e32 v4, 3, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v3, v3, v4, 0xfd7046c5
	v_lshrrev_b32_e32 v4, 16, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_xor3_b32 v17, v3, v4, 0xb55a4f09
                                        ; implicit-def: $vgpr3_vgpr4
.LBB2_174:                              ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v18, 12, v17
	s_cmp_eq_u32 s4, 0
	s_cselect_b32 s0, -1, 0
	s_cmp_eq_u32 s4, 1
	v_add3_u32 v17, v17, v18, 0x7ed55d16
	s_cselect_b32 s1, -1, 0
	s_cmp_eq_u32 s4, 2
	s_cselect_b32 s2, -1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v18, 19, v17
	s_cmp_eq_u32 s4, 3
	s_cselect_b32 s3, -1, 0
	s_add_u32 s4, s4, 1
	v_xor3_b32 v17, v17, v18, 0xc761c23c
	s_addc_u32 s5, s5, 0
	s_cmp_lg_u32 s4, 4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v17, v17, 5, v17
	v_add_nc_u32_e32 v18, 0xe9f8cc1d, v17
	v_lshl_add_u32 v17, v17, 9, 0xaccf6200
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v17, v18, v17
	v_lshlrev_b32_e32 v18, 3, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v17, v17, v18, 0xfd7046c5
	v_lshrrev_b32_e32 v18, 16, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor3_b32 v17, v17, v18, 0xb55a4f09
	v_lshlrev_b32_e32 v19, 12, v17
	v_xor_b32_e32 v18, s23, v17
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add3_u32 v17, v17, v19, 0x7ed55d16
	v_cndmask_b32_e64 v49, v49, v18, s0
	v_cndmask_b32_e64 v4, v4, v18, s1
	v_cndmask_b32_e64 v44, v44, v18, s2
	v_cndmask_b32_e64 v51, v51, v18, s3
	v_lshrrev_b32_e32 v19, 19, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor3_b32 v17, v17, v19, 0xc761c23c
	v_lshl_add_u32 v17, v17, 5, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v19, 0xe9f8cc1d, v17
	v_lshl_add_u32 v17, v17, 9, 0xaccf6200
	v_xor_b32_e32 v17, v19, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v19, 3, v17
	v_add3_u32 v17, v17, v19, 0xfd7046c5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v19, 16, v17
	v_xor3_b32 v17, v17, v19, 0xb55a4f09
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v18, s22, v17
	v_cndmask_b32_e64 v48, v48, v18, s0
	v_cndmask_b32_e64 v3, v3, v18, s1
	v_cndmask_b32_e64 v43, v43, v18, s2
	v_cndmask_b32_e64 v50, v50, v18, s3
	s_cbranch_scc1 .LBB2_174
; %bb.175:                              ; %.preheader55.i.i.1.i.i.preheader
	v_mov_b32_e32 v45, 0
	v_dual_mov_b32 v46, 0 :: v_dual_mov_b32 v47, 0
	s_mov_b32 s8, 0x54442d18
	s_mov_b32 s10, 0x33145c07
	s_mov_b32 s12, 0x6dc9c883
	s_mov_b32 s26, 0x33145c00
	s_mov_b32 s28, 0x252049c0
	s_mov_b32 s30, 0x55555555
	s_mov_b32 s34, 0x6b47b09a
	s_mov_b32 s36, 0xbf559e2b
	s_mov_b32 s38, 0xd7f4df2e
	s_mov_b32 s40, 0x16291751
	s_mov_b32 s42, 0x9b27acf1
	s_mov_b32 s44, 0x998ef7b6
	s_mov_b32 s46, 0xfefa39ef
	s_mov_b32 s48, 0x3b39803f
	s_mov_b32 s50, 0x9037ab78
	s_mov_b32 s52, 0x46cc5e42
	s_mov_b32 s54, 0xa17f65f6
	s_mov_b32 s56, 0x19f4ec90
	s_mov_b32 s58, 0x16c16967
	s_mov_b32 s60, 0xb42fdfa7
	s_mov_b32 s62, 0xf9a43bb8
	s_mov_b32 s64, 0x796cde01
	s_mov_b32 s66, 0x19e83e5c
	s_mov_b32 s68, 0x11110bb3
	s_mov_b32 s77, 0
	s_mov_b32 s9, 0x401921fb
	s_mov_b32 s7, 0x3ff921fb
	s_mov_b32 s11, 0x3c91a626
	s_mov_b32 s13, 0x3fe45f30
	s_mov_b32 s25, 0xbff921fb
	s_mov_b32 s27, 0xbc91a626
	s_mov_b32 s29, 0xb97b839a
	s_mov_b32 s31, 0x3fe55555
	s_mov_b32 s35, 0x3fc38538
	s_mov_b32 s37, 0x3fc3ab76
	s_mov_b32 s39, 0x3fc7474d
	s_mov_b32 s41, 0x3fcc71c0
	s_mov_b32 s43, 0x3fd24924
	s_mov_b32 s45, 0x3fd99999
	s_mov_b32 s47, 0x3fe62e42
	s_mov_b32 s49, 0x3c7abc9e
	s_mov_b32 s51, 0x3e21eeb6
	s_mov_b32 s53, 0xbda907db
	s_mov_b32 s55, 0xbe927e4f
	s_mov_b32 s57, 0x3efa01a0
	s_mov_b32 s59, 0xbf56c16c
	s_mov_b32 s61, 0xbe5ae600
	s_mov_b32 s63, 0x3de5e0b2
	s_mov_b32 s65, 0x3ec71de3
	s_mov_b32 s67, 0xbf2a01a0
	s_mov_b32 s69, 0x3f811111
	s_mov_b32 s70, 0x55555780
	s_mov_b32 s73, 0x3fa55555
	s_mov_b32 s75, 0xbfc55555
                                        ; implicit-def: $vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31_vgpr32
                                        ; implicit-def: $vgpr27_vgpr28_vgpr29_vgpr30_vgpr31_vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42
.LBB2_176:                              ; %.preheader55.i.i.1.i.i
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB2_177 Depth 2
                                        ;     Child Loop BB2_187 Depth 2
                                        ;       Child Loop BB2_188 Depth 3
	v_dual_mov_b32 v57, v49 :: v_dual_mov_b32 v56, v48
	v_dual_mov_b32 v59, v51 :: v_dual_mov_b32 v58, v50
	s_mov_b32 s78, 0
.LBB2_177:                              ;   Parent Loop BB2_176 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v38, v4, v59
	v_xor_b32_e32 v37, v3, v58
                                        ; implicit-def: $vgpr68
                                        ; implicit-def: $vgpr52_vgpr53
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v70, v38, v57
	v_lshrrev_b64 v[49:50], 19, v[37:38]
	v_lshlrev_b32_e32 v39, 13, v37
	v_xor_b32_e32 v69, v37, v56
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_or_b32_e32 v71, v39, v50
	v_add_co_u32 v37, s0, v49, v69
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v38, s0, v71, v70, s0
	v_lshrrev_b64 v[37:38], 11, v[37:38]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_u32_e32 v[38:39], v38
	v_cvt_f64_u32_e32 v[40:41], v37
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[37:38], v[38:39], 32
	v_add_f64 v[37:38], v[37:38], v[40:41]
                                        ; implicit-def: $vgpr41_vgpr42
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[37:38], v[37:38], 0xffffffcb
	v_mul_f64 v[37:38], v[37:38], s[8:9]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ngt_f64_e64 s0, 0x41d00000, v[37:38]
	v_trig_preop_f64 v[62:63], v[37:38], 0
	v_trig_preop_f64 v[60:61], v[37:38], 1
	v_ldexp_f64 v[64:65], v[37:38], 0xffffff80
	v_trig_preop_f64 v[50:51], v[37:38], 2
	s_and_saveexec_b32 s1, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s3, exec_lo, s1
	s_cbranch_execz .LBB2_179
; %bb.178:                              ;   in Loop: Header=BB2_177 Depth=2
	v_cmp_le_f64_e64 s1, 0x7b000000, v[37:38]
	s_mov_b32 s6, s8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v40, v38, v65, s1
	v_cndmask_b32_e64 v39, v37, v64, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_f64 v[41:42], v[62:63], v[39:40]
	v_mul_f64 v[52:53], v[60:61], v[39:40]
	v_mul_f64 v[78:79], v[50:51], v[39:40]
	v_fma_f64 v[54:55], v[62:63], v[39:40], -v[41:42]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[80:81], v[60:61], v[39:40], -v[52:53]
	v_fma_f64 v[39:40], v[50:51], v[39:40], -v[78:79]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[67:68], v[52:53], v[54:55]
	v_add_f64 v[72:73], v[67:68], -v[52:53]
	v_add_f64 v[76:77], v[41:42], v[67:68]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[74:75], v[67:68], -v[72:73]
	v_add_f64 v[54:55], v[54:55], -v[72:73]
	v_ldexp_f64 v[72:73], v[76:77], -2
	v_add_f64 v[41:42], v[76:77], -v[41:42]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[52:53], v[52:53], -v[74:75]
	v_add_f64 v[74:75], v[78:79], v[80:81]
	v_cmp_neq_f64_e64 s1, 0x7ff00000, |v[72:73]|
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[41:42], v[67:68], -v[41:42]
	v_add_f64 v[52:53], v[54:55], v[52:53]
	v_fract_f64_e32 v[54:55], v[72:73]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[67:68], v[74:75], v[52:53]
	v_cndmask_b32_e64 v55, 0, v55, s1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v54, 0, v54, s1
	v_ldexp_f64 v[54:55], v[54:55], 2
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[72:73], v[41:42], v[67:68]
	v_add_f64 v[82:83], v[67:68], -v[74:75]
	v_add_f64 v[76:77], v[72:73], v[54:55]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[88:89], v[67:68], -v[82:83]
	v_add_f64 v[52:53], v[52:53], -v[82:83]
	v_add_f64 v[41:42], v[72:73], -v[41:42]
	v_cmp_gt_f64_e64 s1, 0, v[76:77]
	v_add_f64 v[76:77], v[74:75], -v[78:79]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[41:42], v[67:68], -v[41:42]
	v_cndmask_b32_e64 v48, 0, 0x40100000, s1
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[86:87], v[74:75], -v[76:77]
	v_add_f64 v[76:77], v[80:81], -v[76:77]
	v_add_f64 v[74:75], v[74:75], -v[88:89]
	v_add_f64 v[54:55], v[54:55], v[47:48]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[80:81], v[78:79], -v[86:87]
	v_add_f64 v[52:53], v[52:53], v[74:75]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[84:85], v[72:73], v[54:55]
	v_add_f64 v[76:77], v[76:77], v[80:81]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_i32_f64_e32 v48, v[84:85]
	v_add_f64 v[52:53], v[76:77], v[52:53]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_i32_e32 v[82:83], v48
	v_add_f64 v[39:40], v[39:40], v[52:53]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[54:55], v[54:55], -v[82:83]
	v_add_f64 v[39:40], v[41:42], v[39:40]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[74:75], v[72:73], v[54:55]
	v_add_f64 v[52:53], v[74:75], -v[54:55]
	v_cmp_le_f64_e64 s1, 0.5, v[74:75]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[41:42], v[72:73], -v[52:53]
	v_add_co_ci_u32_e64 v68, s2, 0, v48, s1
	v_cndmask_b32_e64 v48, 0, 0x3ff00000, s1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[39:40], v[39:40], v[41:42]
	v_add_f64 v[41:42], v[74:75], -v[47:48]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[52:53], v[41:42], v[39:40]
	v_mul_f64 v[54:55], v[52:53], s[6:7]
	v_add_f64 v[41:42], v[52:53], -v[41:42]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[72:73], v[52:53], s[6:7], -v[54:55]
	v_add_f64 v[39:40], v[39:40], -v[41:42]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[41:42], v[52:53], s[10:11], v[72:73]
	v_fma_f64 v[39:40], v[39:40], s[6:7], v[41:42]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[41:42], v[54:55], v[39:40]
	v_add_f64 v[52:53], v[41:42], -v[54:55]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[52:53], v[39:40], -v[52:53]
.LBB2_179:                              ; %Flow1227
                                        ;   in Loop: Header=BB2_177 Depth=2
	s_and_not1_saveexec_b32 s1, s3
	s_cbranch_execz .LBB2_181
; %bb.180:                              ;   in Loop: Header=BB2_177 Depth=2
	v_mul_f64 v[39:40], v[37:38], s[12:13]
	s_mov_b32 s24, s8
	s_mov_b32 s2, s26
	s_mov_b32 s3, s11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[39:40], v[39:40]
	v_fma_f64 v[41:42], v[39:40], s[24:25], v[37:38]
	v_mul_f64 v[52:53], v[39:40], s[26:27]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[67:68], v[39:40], s[26:27], v[41:42]
	v_add_f64 v[54:55], v[41:42], v[52:53]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[41:42], v[41:42], -v[54:55]
	v_add_f64 v[54:55], v[54:55], -v[67:68]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[41:42], v[41:42], v[52:53]
	v_fma_f64 v[52:53], v[39:40], s[2:3], v[52:53]
	v_add_f64 v[41:42], v[54:55], v[41:42]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[41:42], v[41:42], -v[52:53]
	v_fma_f64 v[52:53], v[39:40], s[28:29], v[41:42]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[41:42], v[67:68], v[52:53]
	v_add_f64 v[54:55], v[41:42], -v[67:68]
	v_cvt_i32_f64_e32 v68, v[39:40]
	s_delay_alu instid0(VALU_DEP_2)
	v_add_f64 v[52:53], v[52:53], -v[54:55]
.LBB2_181:                              ; %_ZL3cosd.exit.i.i.1.i.i
                                        ;   in Loop: Header=BB2_177 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
                                        ; implicit-def: $vgpr67
                                        ; implicit-def: $vgpr39_vgpr40
                                        ; implicit-def: $vgpr54_vgpr55
	s_and_saveexec_b32 s1, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s2, exec_lo, s1
	s_cbranch_execz .LBB2_183
; %bb.182:                              ;   in Loop: Header=BB2_177 Depth=2
	v_cmp_le_f64_e64 s0, 0x7b000000, v[37:38]
	s_mov_b32 s6, s8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v40, v38, v65, s0
	v_cndmask_b32_e64 v39, v37, v64, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_f64 v[54:55], v[62:63], v[39:40]
	v_mul_f64 v[64:65], v[60:61], v[39:40]
	v_mul_f64 v[80:81], v[50:51], v[39:40]
	v_fma_f64 v[62:63], v[62:63], v[39:40], -v[54:55]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[60:61], v[60:61], v[39:40], -v[64:65]
	v_fma_f64 v[39:40], v[50:51], v[39:40], -v[80:81]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[72:73], v[64:65], v[62:63]
	v_add_f64 v[74:75], v[72:73], -v[64:65]
	v_add_f64 v[78:79], v[54:55], v[72:73]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[76:77], v[72:73], -v[74:75]
	v_add_f64 v[62:63], v[62:63], -v[74:75]
	v_ldexp_f64 v[74:75], v[78:79], -2
	v_add_f64 v[54:55], v[78:79], -v[54:55]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[64:65], v[64:65], -v[76:77]
	v_add_f64 v[76:77], v[80:81], v[60:61]
	v_cmp_neq_f64_e64 s0, 0x7ff00000, |v[74:75]|
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[54:55], v[72:73], -v[54:55]
	v_add_f64 v[62:63], v[62:63], v[64:65]
	v_fract_f64_e32 v[64:65], v[74:75]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[72:73], v[76:77], v[62:63]
	v_cndmask_b32_e64 v65, 0, v65, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v64, 0, v64, s0
	v_ldexp_f64 v[64:65], v[64:65], 2
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[74:75], v[54:55], v[72:73]
	v_add_f64 v[82:83], v[72:73], -v[76:77]
	v_add_f64 v[78:79], v[74:75], v[64:65]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[88:89], v[72:73], -v[82:83]
	v_add_f64 v[62:63], v[62:63], -v[82:83]
	v_add_f64 v[50:51], v[74:75], -v[54:55]
	v_cmp_gt_f64_e64 s0, 0, v[78:79]
	v_add_f64 v[78:79], v[76:77], -v[80:81]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[50:51], v[72:73], -v[50:51]
	v_cndmask_b32_e64 v48, 0, 0x40100000, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[86:87], v[76:77], -v[78:79]
	v_add_f64 v[60:61], v[60:61], -v[78:79]
	v_add_f64 v[76:77], v[76:77], -v[88:89]
	v_add_f64 v[64:65], v[64:65], v[47:48]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[78:79], v[80:81], -v[86:87]
	v_add_f64 v[62:63], v[62:63], v[76:77]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[84:85], v[74:75], v[64:65]
	v_add_f64 v[60:61], v[60:61], v[78:79]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_i32_f64_e32 v48, v[84:85]
	v_add_f64 v[54:55], v[60:61], v[62:63]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_i32_e32 v[82:83], v48
	v_add_f64 v[39:40], v[39:40], v[54:55]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[64:65], v[64:65], -v[82:83]
	v_add_f64 v[39:40], v[50:51], v[39:40]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[60:61], v[74:75], v[64:65]
	v_add_f64 v[54:55], v[60:61], -v[64:65]
	v_cmp_le_f64_e64 s0, 0.5, v[60:61]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[50:51], v[74:75], -v[54:55]
	v_add_co_ci_u32_e64 v67, s1, 0, v48, s0
	v_cndmask_b32_e64 v48, 0, 0x3ff00000, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[39:40], v[39:40], v[50:51]
	v_add_f64 v[50:51], v[60:61], -v[47:48]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[54:55], v[50:51], v[39:40]
	v_mul_f64 v[60:61], v[54:55], s[6:7]
	v_add_f64 v[50:51], v[54:55], -v[50:51]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[62:63], v[54:55], s[6:7], -v[60:61]
	v_add_f64 v[39:40], v[39:40], -v[50:51]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[50:51], v[54:55], s[10:11], v[62:63]
	v_fma_f64 v[50:51], v[39:40], s[6:7], v[50:51]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[39:40], v[60:61], v[50:51]
	v_add_f64 v[54:55], v[39:40], -v[60:61]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[54:55], v[50:51], -v[54:55]
.LBB2_183:                              ; %Flow1226
                                        ;   in Loop: Header=BB2_177 Depth=2
	s_and_not1_saveexec_b32 s0, s2
	s_cbranch_execz .LBB2_185
; %bb.184:                              ;   in Loop: Header=BB2_177 Depth=2
	v_mul_f64 v[39:40], v[37:38], s[12:13]
	s_mov_b32 s24, s8
	s_mov_b32 s2, s26
	s_mov_b32 s3, s11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[50:51], v[39:40]
	v_fma_f64 v[39:40], v[50:51], s[24:25], v[37:38]
	v_mul_f64 v[54:55], v[50:51], s[26:27]
	v_cvt_i32_f64_e32 v67, v[50:51]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[62:63], v[50:51], s[26:27], v[39:40]
	v_add_f64 v[60:61], v[39:40], v[54:55]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[39:40], v[39:40], -v[60:61]
	v_add_f64 v[60:61], v[60:61], -v[62:63]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[39:40], v[39:40], v[54:55]
	v_fma_f64 v[54:55], v[50:51], s[2:3], v[54:55]
	v_add_f64 v[39:40], v[60:61], v[39:40]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[39:40], v[39:40], -v[54:55]
	v_fma_f64 v[54:55], v[50:51], s[28:29], v[39:40]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[39:40], v[62:63], v[54:55]
	v_add_f64 v[60:61], v[39:40], -v[62:63]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[54:55], v[54:55], -v[60:61]
.LBB2_185:                              ; %_ZL3sind.exit.i.i.1.i.i
                                        ;   in Loop: Header=BB2_177 Depth=2
	s_or_b32 exec_lo, exec_lo, s0
	v_xor_b32_e32 v43, v43, v56
	v_add_co_u32 v56, s0, v58, v56
	v_xor_b32_e32 v44, v44, v57
	v_add_co_ci_u32_e64 v57, s0, v59, v57, s0
	v_lshlrev_b64 v[50:51], 17, v[3:4]
	v_xor_b32_e32 v3, v43, v3
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_xor_b32_e32 v4, v44, v4
	v_lshrrev_b64 v[56:57], 11, v[56:57]
	s_mov_b32 s71, s31
	s_mov_b32 s72, s30
	v_xor_b32_e32 v48, v44, v51
	v_xor_b32_e32 v50, v43, v50
	v_lshlrev_b64 v[43:44], 17, v[3:4]
	v_cvt_f64_u32_e32 v[57:58], v57
	v_xor_b32_e32 v61, v4, v71
	v_xor_b32_e32 v51, v48, v70
	v_xor_b32_e32 v50, v50, v69
	v_xor_b32_e32 v60, v3, v49
	s_mov_b32 s74, s30
	v_xor_b32_e32 v49, v61, v70
	v_xor_b32_e32 v4, v51, v4
	v_xor_b32_e32 v3, v50, v3
	v_xor_b32_e32 v44, v51, v44
	v_xor_b32_e32 v43, v50, v43
	v_lshrrev_b64 v[50:51], 19, v[60:61]
	v_xor_b32_e32 v48, v60, v69
	v_lshlrev_b32_e32 v60, 13, v60
	v_cmp_lg_f64_e64 s2, 0x7ff00000, v[37:38]
	s_cmp_eq_u32 s78, 4
	v_and_b32_e32 v37, 1, v67
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_or_b32_e32 v51, v60, v51
	v_cvt_f64_u32_e32 v[59:60], v56
	v_cmp_eq_u32_e64 s6, 0, v37
	v_ldexp_f64 v[57:58], v[57:58], 32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[56:57], v[57:58], v[59:60]
	v_ldexp_f64 v[56:57], v[56:57], 0xffffffcb
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_frexp_mant_f64_e32 v[58:59], v[56:57]
	v_cmp_gt_f64_e64 s0, s[30:31], v[58:59]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v60, 0, 1, s0
	v_ldexp_f64 v[58:59], v[58:59], v60
	v_frexp_exp_i32_f64_e32 v60, v[56:57]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[62:63], v[58:59], 1.0
	v_subrev_co_ci_u32_e64 v75, s0, 0, v60, s0
	v_add_f64 v[60:61], v[58:59], -1.0
	v_cmp_eq_f64_e64 s0, 0x7ff00000, v[56:57]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[64:65], v[62:63], -1.0
	v_add_f64 v[58:59], v[58:59], -v[64:65]
	v_rcp_f64_e32 v[64:65], v[62:63]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[69:70], -v[62:63], v[64:65], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[64:65], v[69:70], v[64:65], v[64:65]
	v_fma_f64 v[69:70], -v[62:63], v[64:65], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[64:65], v[69:70], v[64:65], v[64:65]
	v_mul_f64 v[69:70], v[60:61], v[64:65]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[71:72], v[62:63], v[69:70]
	v_fma_f64 v[62:63], v[69:70], v[62:63], -v[71:72]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[58:59], v[69:70], v[58:59], v[62:63]
	v_add_f64 v[62:63], v[71:72], v[58:59]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[73:74], v[60:61], -v[62:63]
	v_add_f64 v[71:72], v[62:63], -v[71:72]
	v_add_f64 v[60:61], v[60:61], -v[73:74]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[58:59], v[71:72], -v[58:59]
	v_add_f64 v[60:61], v[60:61], -v[62:63]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[58:59], v[58:59], v[60:61]
	v_add_f64 v[58:59], v[73:74], v[58:59]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[58:59], v[64:65], v[58:59]
	v_add_f64 v[60:61], v[69:70], v[58:59]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[62:63], v[60:61], -v[69:70]
	v_ldexp_f64 v[69:70], v[60:61], 1
	v_add_f64 v[58:59], v[58:59], -v[62:63]
	v_mul_f64 v[62:63], v[60:61], v[60:61]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[58:59], v[58:59], 1
	v_fma_f64 v[64:65], v[62:63], s[36:37], s[34:35]
	v_mul_f64 v[60:61], v[60:61], v[62:63]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[64:65], v[62:63], v[64:65], s[38:39]
	v_fma_f64 v[64:65], v[62:63], v[64:65], s[40:41]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[64:65], v[62:63], v[64:65], s[42:43]
	v_fma_f64 v[64:65], v[62:63], v[64:65], s[44:45]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[64:65], v[62:63], v[64:65], s[70:71]
	v_mul_f64 v[60:61], v[60:61], v[64:65]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[62:63], v[69:70], v[60:61]
	v_add_f64 v[64:65], v[62:63], -v[69:70]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[60:61], v[60:61], -v[64:65]
	v_add_f64 v[58:59], v[58:59], v[60:61]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[60:61], v[62:63], v[58:59]
	v_add_f64 v[62:63], v[60:61], -v[62:63]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[58:59], v[58:59], -v[62:63]
	v_cvt_f64_i32_e32 v[62:63], v75
	v_mul_f64 v[64:65], v[62:63], s[46:47]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[69:70], v[62:63], s[46:47], -v[64:65]
	v_fma_f64 v[62:63], v[62:63], s[48:49], v[69:70]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[69:70], v[64:65], v[62:63]
	v_add_f64 v[64:65], v[69:70], -v[64:65]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[62:63], v[62:63], -v[64:65]
	v_add_f64 v[64:65], v[69:70], v[60:61]
	v_add_f64 v[71:72], v[64:65], -v[69:70]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[73:74], v[64:65], -v[71:72]
	v_add_f64 v[60:61], v[60:61], -v[71:72]
	v_add_f64 v[69:70], v[69:70], -v[73:74]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[60:61], v[60:61], v[69:70]
	v_add_f64 v[69:70], v[62:63], v[58:59]
	v_add_f64 v[71:72], v[69:70], -v[62:63]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[60:61], v[69:70], v[60:61]
	v_add_f64 v[73:74], v[69:70], -v[71:72]
	v_add_f64 v[58:59], v[58:59], -v[71:72]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[62:63], v[62:63], -v[73:74]
	v_add_f64 v[58:59], v[58:59], v[62:63]
	v_add_f64 v[62:63], v[64:65], v[60:61]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[64:65], v[62:63], -v[64:65]
	v_add_f64 v[60:61], v[60:61], -v[64:65]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[58:59], v[58:59], v[60:61]
	v_add_f64 v[58:59], v[62:63], v[58:59]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v59, v59, v57, s0
	v_cndmask_b32_e64 v58, v58, v56, s0
	v_cmp_ngt_f64_e64 s0, 0, v[56:57]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[58:59], v[58:59], -2.0
	v_cndmask_b32_e64 v59, 0x7ff80000, v59, s0
	v_cmp_nge_f64_e64 s0, 0, v[56:57]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v58, 0, v58, s0
	v_cmp_neq_f64_e64 s0, 0, v[56:57]
	v_cndmask_b32_e64 v59, 0x7ff00000, v59, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_f64_e64 s0, 0x10000000, v[58:59]
	v_cndmask_b32_e64 v56, 0, 1, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v56, 8, v56
	v_ldexp_f64 v[56:57], v[58:59], v56
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_rsq_f64_e32 v[58:59], v[56:57]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[60:61], v[56:57], v[58:59]
	v_mul_f64 v[58:59], v[58:59], 0.5
	v_fma_f64 v[62:63], -v[58:59], v[60:61], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[60:61], v[60:61], v[62:63], v[60:61]
	v_fma_f64 v[58:59], v[58:59], v[62:63], v[58:59]
	v_fma_f64 v[64:65], -v[60:61], v[60:61], v[56:57]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[60:61], v[64:65], v[58:59], v[60:61]
	v_fma_f64 v[62:63], -v[60:61], v[60:61], v[56:57]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[58:59], v[62:63], v[58:59], v[60:61]
	v_cndmask_b32_e64 v60, 0, 0xffffff80, s0
	v_cmp_class_f64_e64 s0, v[56:57], 0x260
	v_ldexp_f64 v[58:59], v[58:59], v60
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v57, v59, v57, s0
	v_cndmask_b32_e64 v56, v58, v56, s0
	v_mul_f64 v[58:59], v[41:42], v[41:42]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[60:61], v[58:59], 0.5
	v_fma_f64 v[69:70], v[58:59], s[52:53], s[50:51]
	v_add_f64 v[62:63], -v[60:61], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[69:70], v[58:59], v[69:70], s[54:55]
	v_add_f64 v[64:65], -v[62:63], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[69:70], v[58:59], v[69:70], s[56:57]
	v_add_f64 v[60:61], v[64:65], -v[60:61]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[69:70], v[58:59], v[69:70], s[58:59]
	v_mul_f64 v[64:65], v[58:59], v[58:59]
	v_fma_f64 v[60:61], v[41:42], -v[52:53], v[60:61]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[69:70], v[58:59], v[69:70], s[72:73]
	v_fma_f64 v[60:61], v[64:65], v[69:70], v[60:61]
	v_mul_f64 v[64:65], v[41:42], -v[58:59]
	v_mul_f64 v[69:70], v[52:53], 0.5
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[60:61], v[62:63], v[60:61]
	v_fma_f64 v[62:63], v[58:59], s[62:63], s[60:61]
	v_fma_f64 v[62:63], v[58:59], v[62:63], s[64:65]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[62:63], v[58:59], v[62:63], s[66:67]
	v_fma_f64 v[62:63], v[58:59], v[62:63], s[68:69]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[62:63], v[64:65], v[62:63], v[69:70]
	v_fma_f64 v[52:53], v[58:59], v[62:63], -v[52:53]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[52:53], v[64:65], s[74:75], v[52:53]
	v_add_f64 v[41:42], v[41:42], -v[52:53]
	v_and_b32_e32 v52, 1, v68
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, 0, v52
	v_lshlrev_b32_e32 v52, 30, v68
	v_and_b32_e32 v52, 0x80000000, v52
	v_xor_b32_e32 v42, 0x80000000, v42
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v41, v41, v60, s0
	v_cndmask_b32_e64 v42, v42, v61, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v41, 0, v41, s2
	s_cselect_b32 s0, -1, 0
	s_cmp_eq_u32 s78, 3
	v_xor_b32_e32 v42, v42, v52
	s_cselect_b32 s1, -1, 0
	s_cmp_eq_u32 s78, 2
	s_cselect_b32 s3, -1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v42, 0x7ff80000, v42, s2
	s_cmp_eq_u32 s78, 1
	s_cselect_b32 s4, -1, 0
	s_cmp_eq_u32 s78, 0
	v_mul_f64 v[41:42], v[56:57], v[41:42]
	s_cselect_b32 s5, -1, 0
	s_add_i32 s78, s78, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_cmp_lg_u32 s78, 5
	v_cndmask_b32_e64 v36, v36, v42, s0
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e64 v35, v35, v41, s0
	v_cndmask_b32_e64 v34, v34, v42, s1
	v_cndmask_b32_e64 v33, v33, v41, s1
	v_cndmask_b32_e64 v32, v32, v42, s3
	v_cndmask_b32_e64 v31, v31, v41, s3
	v_cndmask_b32_e64 v30, v30, v42, s4
	v_cndmask_b32_e64 v29, v29, v41, s4
	v_cndmask_b32_e64 v28, v28, v42, s5
	v_cndmask_b32_e64 v27, v27, v41, s5
	v_mul_f64 v[41:42], v[39:40], v[39:40]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[52:53], v[41:42], 0.5
	v_fma_f64 v[62:63], v[41:42], s[52:53], s[50:51]
	v_add_f64 v[58:59], -v[52:53], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[62:63], v[41:42], v[62:63], s[54:55]
	v_add_f64 v[60:61], -v[58:59], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[62:63], v[41:42], v[62:63], s[56:57]
	v_add_f64 v[52:53], v[60:61], -v[52:53]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[62:63], v[41:42], v[62:63], s[58:59]
	v_mul_f64 v[60:61], v[41:42], v[41:42]
	v_fma_f64 v[52:53], v[39:40], -v[54:55], v[52:53]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[62:63], v[41:42], v[62:63], s[72:73]
	v_fma_f64 v[52:53], v[60:61], v[62:63], v[52:53]
	v_mul_f64 v[60:61], v[39:40], -v[41:42]
	v_mul_f64 v[62:63], v[54:55], 0.5
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[52:53], v[58:59], v[52:53]
	v_fma_f64 v[58:59], v[41:42], s[62:63], s[60:61]
	v_fma_f64 v[58:59], v[41:42], v[58:59], s[64:65]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[58:59], v[41:42], v[58:59], s[66:67]
	v_fma_f64 v[58:59], v[41:42], v[58:59], s[68:69]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[58:59], v[60:61], v[58:59], v[62:63]
	v_fma_f64 v[41:42], v[41:42], v[58:59], -v[54:55]
	v_dual_mov_b32 v59, v51 :: v_dual_mov_b32 v58, v50
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[41:42], v[60:61], s[74:75], v[41:42]
	v_add_f64 v[39:40], v[39:40], -v[41:42]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v37, v52, v39, s6
	v_cndmask_b32_e64 v39, v53, v40, s6
	v_lshlrev_b32_e32 v40, 30, v67
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v37, 0, v37, s2
	v_xor_b32_e32 v38, v40, v38
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v38, 0x80000000, v38
	v_xor_b32_e32 v38, v39, v38
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v38, 0x7ff80000, v38, s2
	v_mul_f64 v[37:38], v[56:57], v[37:38]
	v_dual_mov_b32 v57, v49 :: v_dual_mov_b32 v56, v48
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v26, v26, v38, s0
	v_cndmask_b32_e64 v25, v25, v37, s0
	v_cndmask_b32_e64 v24, v24, v38, s1
	v_cndmask_b32_e64 v23, v23, v37, s1
	v_cndmask_b32_e64 v22, v22, v38, s3
	v_cndmask_b32_e64 v21, v21, v37, s3
	v_cndmask_b32_e64 v20, v20, v38, s4
	v_cndmask_b32_e64 v19, v19, v37, s4
	v_cndmask_b32_e64 v18, v18, v38, s5
	v_cndmask_b32_e64 v17, v17, v37, s5
	s_cbranch_scc1 .LBB2_177
; %bb.186:                              ; %.lr.ph.i.i.1.i.i.preheader
                                        ;   in Loop: Header=BB2_176 Depth=1
	v_mov_b32_e32 v37, 0
	v_mov_b32_e32 v38, 0
	s_mov_b32 s4, 0
.LBB2_187:                              ; %.lr.ph.i.i.1.i.i
                                        ;   Parent Loop BB2_176 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB2_188 Depth 3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s4, 1
	s_mov_b32 s5, s4
	s_cselect_b32 s0, -1, 0
	s_cmp_eq_u32 s4, 2
	v_cndmask_b32_e64 v39, v28, v30, s0
	v_cndmask_b32_e64 v40, v27, v29, s0
	v_cndmask_b32_e64 v41, v18, v20, s0
	v_cndmask_b32_e64 v42, v17, v19, s0
	s_cselect_b32 s0, -1, 0
	s_cmp_eq_u32 s4, 3
	v_cndmask_b32_e64 v39, v39, v32, s0
	v_cndmask_b32_e64 v40, v40, v31, s0
	v_cndmask_b32_e64 v41, v41, v22, s0
	v_cndmask_b32_e64 v42, v42, v21, s0
	s_cselect_b32 s0, -1, 0
	s_cmp_eq_u32 s4, 4
	v_cndmask_b32_e64 v39, v39, v34, s0
	v_cndmask_b32_e64 v52, v40, v33, s0
	v_cndmask_b32_e64 v41, v41, v24, s0
	v_cndmask_b32_e64 v53, v42, v23, s0
	s_cselect_b32 s0, -1, 0
	s_delay_alu instid0(SALU_CYCLE_1)
	v_cndmask_b32_e64 v40, v39, v36, s0
	v_cndmask_b32_e64 v39, v52, v35, s0
	v_cndmask_b32_e64 v42, v41, v26, s0
	v_cndmask_b32_e64 v41, v53, v25, s0
.LBB2_188:                              ;   Parent Loop BB2_176 Depth=1
                                        ;     Parent Loop BB2_187 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_add_i32 s5, s5, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s5, 1
	s_cselect_b32 s0, -1, 0
	s_cmp_eq_u32 s5, 2
	v_cndmask_b32_e64 v53, v18, v20, s0
	v_cndmask_b32_e64 v54, v17, v19, s0
	s_cselect_b32 s1, -1, 0
	s_cmp_eq_u32 s5, 3
	v_cndmask_b32_e64 v52, v28, v30, s0
	v_cndmask_b32_e64 v53, v53, v22, s1
	v_cndmask_b32_e64 v54, v54, v21, s1
	s_cselect_b32 s2, -1, 0
	s_cmp_eq_u32 s5, 4
	v_cndmask_b32_e64 v52, v52, v32, s1
	v_cndmask_b32_e64 v55, v53, v24, s2
	v_cndmask_b32_e64 v54, v54, v23, s2
	s_cselect_b32 s3, -1, 0
	s_cmp_lt_u32 s5, 4
	v_cndmask_b32_e64 v52, v52, v34, s2
	v_cndmask_b32_e64 v55, v55, v26, s3
	v_cndmask_b32_e64 v54, v54, v25, s3
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v53, v52, v36, s3
	v_cndmask_b32_e64 v52, v27, v29, s0
	v_add_f64 v[54:55], v[41:42], -v[54:55]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v52, v52, v31, s1
	v_cndmask_b32_e64 v52, v52, v33, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v52, v52, v35, s3
	v_add_f64 v[52:53], v[39:40], -v[52:53]
	v_mul_f64 v[54:55], v[54:55], v[54:55]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[52:53], v[52:53], v[52:53], v[54:55]
	v_cmp_lt_f64_e64 s0, v[37:38], v[52:53]
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e64 v38, v38, v53, s0
	v_cndmask_b32_e64 v37, v37, v52, s0
	s_cbranch_scc1 .LBB2_188
; %bb.189:                              ; %.loopexit.i.i.1.i.i
                                        ;   in Loop: Header=BB2_187 Depth=2
	s_add_i32 s4, s4, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s4, 4
	s_cbranch_scc1 .LBB2_187
; %bb.190:                              ;   in Loop: Header=BB2_176 Depth=1
	v_cmp_gt_f64_e64 s0, 0x10000000, v[37:38]
	s_add_i32 s77, s77, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_cmp_lg_u32 s77, 0x10000
	v_cndmask_b32_e64 v39, 0, 1, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v39, 8, v39
	v_ldexp_f64 v[37:38], v[37:38], v39
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_rsq_f64_e32 v[39:40], v[37:38]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[41:42], v[37:38], v[39:40]
	v_mul_f64 v[39:40], v[39:40], 0.5
	v_fma_f64 v[52:53], -v[39:40], v[41:42], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[41:42], v[41:42], v[52:53], v[41:42]
	v_fma_f64 v[39:40], v[39:40], v[52:53], v[39:40]
	v_fma_f64 v[52:53], -v[41:42], v[41:42], v[37:38]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[41:42], v[52:53], v[39:40], v[41:42]
	v_fma_f64 v[52:53], -v[41:42], v[41:42], v[37:38]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[39:40], v[52:53], v[39:40], v[41:42]
	v_cndmask_b32_e64 v41, 0, 0xffffff80, s0
	v_cmp_class_f64_e64 s0, v[37:38], 0x260
	v_ldexp_f64 v[39:40], v[39:40], v41
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v38, v40, v38, s0
	v_cndmask_b32_e64 v37, v39, v37, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[45:46], v[45:46], v[37:38]
	s_cbranch_scc1 .LBB2_176
; %bb.191:                              ; %_ZNK6thrust11hip_rocprim26transform_input_iterator_tIdNS_17counting_iteratorIjNS_11use_defaultES3_S3_EE11estimate_esEixEl.exit.1.i.i
	s_delay_alu instid0(VALU_DEP_1)
	v_ldexp_f64 v[3:4], v[45:46], -16
.LBB2_192:                              ; %Flow1228
	s_or_b32 exec_lo, exec_lo, s76
	v_or_b32_e32 v17, 0x200, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s0, s33, v17
	s_and_saveexec_b32 s78, s0
	s_cbranch_execz .LBB2_212
; %bb.193:
	s_movk_i32 s1, 0x1001
	s_mov_b64 s[6:7], 0
	v_mad_u64_u32 v[5:6], null, v66, s1, 0x7ef55f16
                                        ; implicit-def: $vgpr48_vgpr49
                                        ; implicit-def: $vgpr43_vgpr44
                                        ; implicit-def: $vgpr50_vgpr51
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v6, 19, v5
	v_xor3_b32 v5, v5, v6, 0xc761c23c
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v5, v5, 5, v5
	v_add_nc_u32_e32 v6, 0xe9f8cc1d, v5
	v_lshl_add_u32 v5, v5, 9, 0xaccf6200
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v5, v6, v5
	v_lshlrev_b32_e32 v6, 3, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v5, v5, v6, 0xfd7046c5
	v_lshrrev_b32_e32 v6, 16, v5
	s_delay_alu instid0(VALU_DEP_1)
	v_xor3_b32 v17, v5, v6, 0xb55a4f09
                                        ; implicit-def: $vgpr5_vgpr6
.LBB2_194:                              ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v18, 12, v17
	s_cmp_eq_u32 s6, 0
	s_cselect_b32 s1, -1, 0
	s_cmp_eq_u32 s6, 1
	v_add3_u32 v17, v17, v18, 0x7ed55d16
	s_cselect_b32 s2, -1, 0
	s_cmp_eq_u32 s6, 2
	s_cselect_b32 s3, -1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v18, 19, v17
	s_cmp_eq_u32 s6, 3
	s_cselect_b32 s4, -1, 0
	s_add_u32 s6, s6, 1
	v_xor3_b32 v17, v17, v18, 0xc761c23c
	s_addc_u32 s7, s7, 0
	s_cmp_lg_u32 s6, 4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v17, v17, 5, v17
	v_add_nc_u32_e32 v18, 0xe9f8cc1d, v17
	v_lshl_add_u32 v17, v17, 9, 0xaccf6200
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v17, v18, v17
	v_lshlrev_b32_e32 v18, 3, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v17, v17, v18, 0xfd7046c5
	v_lshrrev_b32_e32 v18, 16, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor3_b32 v17, v17, v18, 0xb55a4f09
	v_lshlrev_b32_e32 v19, 12, v17
	v_xor_b32_e32 v18, s23, v17
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add3_u32 v17, v17, v19, 0x7ed55d16
	v_cndmask_b32_e64 v49, v49, v18, s1
	v_cndmask_b32_e64 v6, v6, v18, s2
	v_cndmask_b32_e64 v44, v44, v18, s3
	v_cndmask_b32_e64 v51, v51, v18, s4
	v_lshrrev_b32_e32 v19, 19, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor3_b32 v17, v17, v19, 0xc761c23c
	v_lshl_add_u32 v17, v17, 5, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v19, 0xe9f8cc1d, v17
	v_lshl_add_u32 v17, v17, 9, 0xaccf6200
	v_xor_b32_e32 v17, v19, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v19, 3, v17
	v_add3_u32 v17, v17, v19, 0xfd7046c5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v19, 16, v17
	v_xor3_b32 v17, v17, v19, 0xb55a4f09
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v18, s22, v17
	v_cndmask_b32_e64 v48, v48, v18, s1
	v_cndmask_b32_e64 v5, v5, v18, s2
	v_cndmask_b32_e64 v43, v43, v18, s3
	v_cndmask_b32_e64 v50, v50, v18, s4
	s_cbranch_scc1 .LBB2_194
; %bb.195:                              ; %.preheader55.i.i.2.i.i.preheader
	v_mov_b32_e32 v45, 0
	v_dual_mov_b32 v46, 0 :: v_dual_mov_b32 v47, 0
	s_mov_b32 s8, 0x54442d18
	s_mov_b32 s12, 0x33145c07
	s_mov_b32 s24, 0x6dc9c883
	s_mov_b32 s28, 0x33145c00
	s_mov_b32 s30, 0x252049c0
	s_mov_b32 s34, 0x55555555
	s_mov_b32 s36, 0x6b47b09a
	s_mov_b32 s38, 0xbf559e2b
	s_mov_b32 s40, 0xd7f4df2e
	s_mov_b32 s42, 0x16291751
	s_mov_b32 s44, 0x9b27acf1
	s_mov_b32 s46, 0x998ef7b6
	s_mov_b32 s48, 0xfefa39ef
	s_mov_b32 s50, 0x3b39803f
	s_mov_b32 s52, 0x9037ab78
	s_mov_b32 s54, 0x46cc5e42
	s_mov_b32 s56, 0xa17f65f6
	s_mov_b32 s58, 0x19f4ec90
	s_mov_b32 s60, 0x16c16967
	s_mov_b32 s62, 0xb42fdfa7
	s_mov_b32 s64, 0xf9a43bb8
	s_mov_b32 s66, 0x796cde01
	s_mov_b32 s68, 0x19e83e5c
	s_mov_b32 s70, 0x11110bb3
	s_mov_b32 s79, 0
	s_mov_b32 s9, 0x401921fb
	s_mov_b32 s11, 0x3ff921fb
	s_mov_b32 s13, 0x3c91a626
	s_mov_b32 s25, 0x3fe45f30
	s_mov_b32 s27, 0xbff921fb
	s_mov_b32 s29, 0xbc91a626
	s_mov_b32 s31, 0xb97b839a
	s_mov_b32 s35, 0x3fe55555
	s_mov_b32 s37, 0x3fc38538
	s_mov_b32 s39, 0x3fc3ab76
	s_mov_b32 s41, 0x3fc7474d
	s_mov_b32 s43, 0x3fcc71c0
	s_mov_b32 s45, 0x3fd24924
	s_mov_b32 s47, 0x3fd99999
	s_mov_b32 s49, 0x3fe62e42
	s_mov_b32 s51, 0x3c7abc9e
	s_mov_b32 s53, 0x3e21eeb6
	s_mov_b32 s55, 0xbda907db
	s_mov_b32 s57, 0xbe927e4f
	s_mov_b32 s59, 0x3efa01a0
	s_mov_b32 s61, 0xbf56c16c
	s_mov_b32 s63, 0xbe5ae600
	s_mov_b32 s65, 0x3de5e0b2
	s_mov_b32 s67, 0x3ec71de3
	s_mov_b32 s69, 0xbf2a01a0
	s_mov_b32 s71, 0x3f811111
	s_mov_b32 s72, 0x55555780
	s_mov_b32 s75, 0x3fa55555
	s_mov_b32 s77, 0xbfc55555
                                        ; implicit-def: $vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31_vgpr32
                                        ; implicit-def: $vgpr27_vgpr28_vgpr29_vgpr30_vgpr31_vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42
.LBB2_196:                              ; %.preheader55.i.i.2.i.i
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB2_197 Depth 2
                                        ;     Child Loop BB2_207 Depth 2
                                        ;       Child Loop BB2_208 Depth 3
	v_dual_mov_b32 v57, v49 :: v_dual_mov_b32 v56, v48
	v_dual_mov_b32 v59, v51 :: v_dual_mov_b32 v58, v50
	s_mov_b32 s80, 0
.LBB2_197:                              ;   Parent Loop BB2_196 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v38, v6, v59
	v_xor_b32_e32 v37, v5, v58
                                        ; implicit-def: $vgpr68
                                        ; implicit-def: $vgpr52_vgpr53
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v70, v38, v57
	v_lshrrev_b64 v[49:50], 19, v[37:38]
	v_lshlrev_b32_e32 v39, 13, v37
	v_xor_b32_e32 v69, v37, v56
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_or_b32_e32 v71, v39, v50
	v_add_co_u32 v37, s1, v49, v69
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v38, s1, v71, v70, s1
	v_lshrrev_b64 v[37:38], 11, v[37:38]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_u32_e32 v[38:39], v38
	v_cvt_f64_u32_e32 v[40:41], v37
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[37:38], v[38:39], 32
	v_add_f64 v[37:38], v[37:38], v[40:41]
                                        ; implicit-def: $vgpr41_vgpr42
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[37:38], v[37:38], 0xffffffcb
	v_mul_f64 v[37:38], v[37:38], s[8:9]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ngt_f64_e64 s1, 0x41d00000, v[37:38]
	v_trig_preop_f64 v[62:63], v[37:38], 0
	v_trig_preop_f64 v[60:61], v[37:38], 1
	v_ldexp_f64 v[64:65], v[37:38], 0xffffff80
	v_trig_preop_f64 v[50:51], v[37:38], 2
	s_and_saveexec_b32 s2, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s4, exec_lo, s2
	s_cbranch_execz .LBB2_199
; %bb.198:                              ;   in Loop: Header=BB2_197 Depth=2
	v_cmp_le_f64_e64 s2, 0x7b000000, v[37:38]
	s_mov_b32 s10, s8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v40, v38, v65, s2
	v_cndmask_b32_e64 v39, v37, v64, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_f64 v[41:42], v[62:63], v[39:40]
	v_mul_f64 v[52:53], v[60:61], v[39:40]
	v_mul_f64 v[78:79], v[50:51], v[39:40]
	v_fma_f64 v[54:55], v[62:63], v[39:40], -v[41:42]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[80:81], v[60:61], v[39:40], -v[52:53]
	v_fma_f64 v[39:40], v[50:51], v[39:40], -v[78:79]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[67:68], v[52:53], v[54:55]
	v_add_f64 v[72:73], v[67:68], -v[52:53]
	v_add_f64 v[76:77], v[41:42], v[67:68]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[74:75], v[67:68], -v[72:73]
	v_add_f64 v[54:55], v[54:55], -v[72:73]
	v_ldexp_f64 v[72:73], v[76:77], -2
	v_add_f64 v[41:42], v[76:77], -v[41:42]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[52:53], v[52:53], -v[74:75]
	v_add_f64 v[74:75], v[78:79], v[80:81]
	v_cmp_neq_f64_e64 s2, 0x7ff00000, |v[72:73]|
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[41:42], v[67:68], -v[41:42]
	v_add_f64 v[52:53], v[54:55], v[52:53]
	v_fract_f64_e32 v[54:55], v[72:73]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[67:68], v[74:75], v[52:53]
	v_cndmask_b32_e64 v55, 0, v55, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v54, 0, v54, s2
	v_ldexp_f64 v[54:55], v[54:55], 2
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[72:73], v[41:42], v[67:68]
	v_add_f64 v[82:83], v[67:68], -v[74:75]
	v_add_f64 v[76:77], v[72:73], v[54:55]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[88:89], v[67:68], -v[82:83]
	v_add_f64 v[52:53], v[52:53], -v[82:83]
	v_add_f64 v[41:42], v[72:73], -v[41:42]
	v_cmp_gt_f64_e64 s2, 0, v[76:77]
	v_add_f64 v[76:77], v[74:75], -v[78:79]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[41:42], v[67:68], -v[41:42]
	v_cndmask_b32_e64 v48, 0, 0x40100000, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[86:87], v[74:75], -v[76:77]
	v_add_f64 v[76:77], v[80:81], -v[76:77]
	v_add_f64 v[74:75], v[74:75], -v[88:89]
	v_add_f64 v[54:55], v[54:55], v[47:48]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[80:81], v[78:79], -v[86:87]
	v_add_f64 v[52:53], v[52:53], v[74:75]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[84:85], v[72:73], v[54:55]
	v_add_f64 v[76:77], v[76:77], v[80:81]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_i32_f64_e32 v48, v[84:85]
	v_add_f64 v[52:53], v[76:77], v[52:53]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_i32_e32 v[82:83], v48
	v_add_f64 v[39:40], v[39:40], v[52:53]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[54:55], v[54:55], -v[82:83]
	v_add_f64 v[39:40], v[41:42], v[39:40]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[74:75], v[72:73], v[54:55]
	v_add_f64 v[52:53], v[74:75], -v[54:55]
	v_cmp_le_f64_e64 s2, 0.5, v[74:75]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[41:42], v[72:73], -v[52:53]
	v_add_co_ci_u32_e64 v68, s3, 0, v48, s2
	v_cndmask_b32_e64 v48, 0, 0x3ff00000, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[39:40], v[39:40], v[41:42]
	v_add_f64 v[41:42], v[74:75], -v[47:48]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[52:53], v[41:42], v[39:40]
	v_mul_f64 v[54:55], v[52:53], s[10:11]
	v_add_f64 v[41:42], v[52:53], -v[41:42]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[72:73], v[52:53], s[10:11], -v[54:55]
	v_add_f64 v[39:40], v[39:40], -v[41:42]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[41:42], v[52:53], s[12:13], v[72:73]
	v_fma_f64 v[39:40], v[39:40], s[10:11], v[41:42]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[41:42], v[54:55], v[39:40]
	v_add_f64 v[52:53], v[41:42], -v[54:55]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[52:53], v[39:40], -v[52:53]
.LBB2_199:                              ; %Flow1224
                                        ;   in Loop: Header=BB2_197 Depth=2
	s_and_not1_saveexec_b32 s2, s4
	s_cbranch_execz .LBB2_201
; %bb.200:                              ;   in Loop: Header=BB2_197 Depth=2
	v_mul_f64 v[39:40], v[37:38], s[24:25]
	s_mov_b32 s26, s8
	s_mov_b32 s4, s28
	s_mov_b32 s5, s13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[39:40], v[39:40]
	v_fma_f64 v[41:42], v[39:40], s[26:27], v[37:38]
	v_mul_f64 v[52:53], v[39:40], s[28:29]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[67:68], v[39:40], s[28:29], v[41:42]
	v_add_f64 v[54:55], v[41:42], v[52:53]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[41:42], v[41:42], -v[54:55]
	v_add_f64 v[54:55], v[54:55], -v[67:68]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[41:42], v[41:42], v[52:53]
	v_fma_f64 v[52:53], v[39:40], s[4:5], v[52:53]
	v_add_f64 v[41:42], v[54:55], v[41:42]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[41:42], v[41:42], -v[52:53]
	v_fma_f64 v[52:53], v[39:40], s[30:31], v[41:42]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[41:42], v[67:68], v[52:53]
	v_add_f64 v[54:55], v[41:42], -v[67:68]
	v_cvt_i32_f64_e32 v68, v[39:40]
	s_delay_alu instid0(VALU_DEP_2)
	v_add_f64 v[52:53], v[52:53], -v[54:55]
.LBB2_201:                              ; %_ZL3cosd.exit.i.i.2.i.i
                                        ;   in Loop: Header=BB2_197 Depth=2
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr67
                                        ; implicit-def: $vgpr39_vgpr40
                                        ; implicit-def: $vgpr54_vgpr55
	s_and_saveexec_b32 s2, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s3, exec_lo, s2
	s_cbranch_execz .LBB2_203
; %bb.202:                              ;   in Loop: Header=BB2_197 Depth=2
	v_cmp_le_f64_e64 s1, 0x7b000000, v[37:38]
	s_mov_b32 s10, s8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v40, v38, v65, s1
	v_cndmask_b32_e64 v39, v37, v64, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_f64 v[54:55], v[62:63], v[39:40]
	v_mul_f64 v[64:65], v[60:61], v[39:40]
	v_mul_f64 v[80:81], v[50:51], v[39:40]
	v_fma_f64 v[62:63], v[62:63], v[39:40], -v[54:55]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[60:61], v[60:61], v[39:40], -v[64:65]
	v_fma_f64 v[39:40], v[50:51], v[39:40], -v[80:81]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[72:73], v[64:65], v[62:63]
	v_add_f64 v[74:75], v[72:73], -v[64:65]
	v_add_f64 v[78:79], v[54:55], v[72:73]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[76:77], v[72:73], -v[74:75]
	v_add_f64 v[62:63], v[62:63], -v[74:75]
	v_ldexp_f64 v[74:75], v[78:79], -2
	v_add_f64 v[54:55], v[78:79], -v[54:55]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[64:65], v[64:65], -v[76:77]
	v_add_f64 v[76:77], v[80:81], v[60:61]
	v_cmp_neq_f64_e64 s1, 0x7ff00000, |v[74:75]|
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[54:55], v[72:73], -v[54:55]
	v_add_f64 v[62:63], v[62:63], v[64:65]
	v_fract_f64_e32 v[64:65], v[74:75]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[72:73], v[76:77], v[62:63]
	v_cndmask_b32_e64 v65, 0, v65, s1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v64, 0, v64, s1
	v_ldexp_f64 v[64:65], v[64:65], 2
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[74:75], v[54:55], v[72:73]
	v_add_f64 v[82:83], v[72:73], -v[76:77]
	v_add_f64 v[78:79], v[74:75], v[64:65]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[88:89], v[72:73], -v[82:83]
	v_add_f64 v[62:63], v[62:63], -v[82:83]
	v_add_f64 v[50:51], v[74:75], -v[54:55]
	v_cmp_gt_f64_e64 s1, 0, v[78:79]
	v_add_f64 v[78:79], v[76:77], -v[80:81]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[50:51], v[72:73], -v[50:51]
	v_cndmask_b32_e64 v48, 0, 0x40100000, s1
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[86:87], v[76:77], -v[78:79]
	v_add_f64 v[60:61], v[60:61], -v[78:79]
	v_add_f64 v[76:77], v[76:77], -v[88:89]
	v_add_f64 v[64:65], v[64:65], v[47:48]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[78:79], v[80:81], -v[86:87]
	v_add_f64 v[62:63], v[62:63], v[76:77]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[84:85], v[74:75], v[64:65]
	v_add_f64 v[60:61], v[60:61], v[78:79]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_i32_f64_e32 v48, v[84:85]
	v_add_f64 v[54:55], v[60:61], v[62:63]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_i32_e32 v[82:83], v48
	v_add_f64 v[39:40], v[39:40], v[54:55]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[64:65], v[64:65], -v[82:83]
	v_add_f64 v[39:40], v[50:51], v[39:40]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[60:61], v[74:75], v[64:65]
	v_add_f64 v[54:55], v[60:61], -v[64:65]
	v_cmp_le_f64_e64 s1, 0.5, v[60:61]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[50:51], v[74:75], -v[54:55]
	v_add_co_ci_u32_e64 v67, s2, 0, v48, s1
	v_cndmask_b32_e64 v48, 0, 0x3ff00000, s1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[39:40], v[39:40], v[50:51]
	v_add_f64 v[50:51], v[60:61], -v[47:48]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[54:55], v[50:51], v[39:40]
	v_mul_f64 v[60:61], v[54:55], s[10:11]
	v_add_f64 v[50:51], v[54:55], -v[50:51]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[62:63], v[54:55], s[10:11], -v[60:61]
	v_add_f64 v[39:40], v[39:40], -v[50:51]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[50:51], v[54:55], s[12:13], v[62:63]
	v_fma_f64 v[50:51], v[39:40], s[10:11], v[50:51]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[39:40], v[60:61], v[50:51]
	v_add_f64 v[54:55], v[39:40], -v[60:61]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[54:55], v[50:51], -v[54:55]
.LBB2_203:                              ; %Flow1223
                                        ;   in Loop: Header=BB2_197 Depth=2
	s_and_not1_saveexec_b32 s1, s3
	s_cbranch_execz .LBB2_205
; %bb.204:                              ;   in Loop: Header=BB2_197 Depth=2
	v_mul_f64 v[39:40], v[37:38], s[24:25]
	s_mov_b32 s26, s8
	s_mov_b32 s2, s28
	s_mov_b32 s3, s13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[50:51], v[39:40]
	v_fma_f64 v[39:40], v[50:51], s[26:27], v[37:38]
	v_mul_f64 v[54:55], v[50:51], s[28:29]
	v_cvt_i32_f64_e32 v67, v[50:51]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[62:63], v[50:51], s[28:29], v[39:40]
	v_add_f64 v[60:61], v[39:40], v[54:55]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[39:40], v[39:40], -v[60:61]
	v_add_f64 v[60:61], v[60:61], -v[62:63]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[39:40], v[39:40], v[54:55]
	v_fma_f64 v[54:55], v[50:51], s[2:3], v[54:55]
	v_add_f64 v[39:40], v[60:61], v[39:40]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[39:40], v[39:40], -v[54:55]
	v_fma_f64 v[54:55], v[50:51], s[30:31], v[39:40]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[39:40], v[62:63], v[54:55]
	v_add_f64 v[60:61], v[39:40], -v[62:63]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[54:55], v[54:55], -v[60:61]
.LBB2_205:                              ; %_ZL3sind.exit.i.i.2.i.i
                                        ;   in Loop: Header=BB2_197 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	v_xor_b32_e32 v43, v43, v56
	v_add_co_u32 v56, s1, v58, v56
	v_xor_b32_e32 v44, v44, v57
	v_add_co_ci_u32_e64 v57, s1, v59, v57, s1
	v_lshlrev_b64 v[50:51], 17, v[5:6]
	v_xor_b32_e32 v5, v43, v5
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_xor_b32_e32 v6, v44, v6
	v_lshrrev_b64 v[56:57], 11, v[56:57]
	s_mov_b32 s73, s35
	s_mov_b32 s74, s34
	v_xor_b32_e32 v48, v44, v51
	v_xor_b32_e32 v50, v43, v50
	v_lshlrev_b64 v[43:44], 17, v[5:6]
	v_cvt_f64_u32_e32 v[57:58], v57
	v_xor_b32_e32 v61, v6, v71
	v_xor_b32_e32 v51, v48, v70
	v_xor_b32_e32 v50, v50, v69
	v_xor_b32_e32 v60, v5, v49
	s_mov_b32 s76, s34
	v_xor_b32_e32 v49, v61, v70
	v_xor_b32_e32 v6, v51, v6
	v_xor_b32_e32 v5, v50, v5
	v_xor_b32_e32 v44, v51, v44
	v_xor_b32_e32 v43, v50, v43
	v_lshrrev_b64 v[50:51], 19, v[60:61]
	v_xor_b32_e32 v48, v60, v69
	v_lshlrev_b32_e32 v60, 13, v60
	v_cmp_lg_f64_e64 s3, 0x7ff00000, v[37:38]
	s_cmp_eq_u32 s80, 4
	v_and_b32_e32 v37, 1, v67
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_or_b32_e32 v51, v60, v51
	v_cvt_f64_u32_e32 v[59:60], v56
	v_cmp_eq_u32_e64 s7, 0, v37
	v_ldexp_f64 v[57:58], v[57:58], 32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[56:57], v[57:58], v[59:60]
	v_ldexp_f64 v[56:57], v[56:57], 0xffffffcb
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_frexp_mant_f64_e32 v[58:59], v[56:57]
	v_cmp_gt_f64_e64 s1, s[34:35], v[58:59]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v60, 0, 1, s1
	v_ldexp_f64 v[58:59], v[58:59], v60
	v_frexp_exp_i32_f64_e32 v60, v[56:57]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[62:63], v[58:59], 1.0
	v_subrev_co_ci_u32_e64 v75, s1, 0, v60, s1
	v_add_f64 v[60:61], v[58:59], -1.0
	v_cmp_eq_f64_e64 s1, 0x7ff00000, v[56:57]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[64:65], v[62:63], -1.0
	v_add_f64 v[58:59], v[58:59], -v[64:65]
	v_rcp_f64_e32 v[64:65], v[62:63]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[69:70], -v[62:63], v[64:65], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[64:65], v[69:70], v[64:65], v[64:65]
	v_fma_f64 v[69:70], -v[62:63], v[64:65], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[64:65], v[69:70], v[64:65], v[64:65]
	v_mul_f64 v[69:70], v[60:61], v[64:65]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[71:72], v[62:63], v[69:70]
	v_fma_f64 v[62:63], v[69:70], v[62:63], -v[71:72]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[58:59], v[69:70], v[58:59], v[62:63]
	v_add_f64 v[62:63], v[71:72], v[58:59]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[73:74], v[60:61], -v[62:63]
	v_add_f64 v[71:72], v[62:63], -v[71:72]
	v_add_f64 v[60:61], v[60:61], -v[73:74]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[58:59], v[71:72], -v[58:59]
	v_add_f64 v[60:61], v[60:61], -v[62:63]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[58:59], v[58:59], v[60:61]
	v_add_f64 v[58:59], v[73:74], v[58:59]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[58:59], v[64:65], v[58:59]
	v_add_f64 v[60:61], v[69:70], v[58:59]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[62:63], v[60:61], -v[69:70]
	v_ldexp_f64 v[69:70], v[60:61], 1
	v_add_f64 v[58:59], v[58:59], -v[62:63]
	v_mul_f64 v[62:63], v[60:61], v[60:61]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[58:59], v[58:59], 1
	v_fma_f64 v[64:65], v[62:63], s[38:39], s[36:37]
	v_mul_f64 v[60:61], v[60:61], v[62:63]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[64:65], v[62:63], v[64:65], s[40:41]
	v_fma_f64 v[64:65], v[62:63], v[64:65], s[42:43]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[64:65], v[62:63], v[64:65], s[44:45]
	v_fma_f64 v[64:65], v[62:63], v[64:65], s[46:47]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[64:65], v[62:63], v[64:65], s[72:73]
	v_mul_f64 v[60:61], v[60:61], v[64:65]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[62:63], v[69:70], v[60:61]
	v_add_f64 v[64:65], v[62:63], -v[69:70]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[60:61], v[60:61], -v[64:65]
	v_add_f64 v[58:59], v[58:59], v[60:61]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[60:61], v[62:63], v[58:59]
	v_add_f64 v[62:63], v[60:61], -v[62:63]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[58:59], v[58:59], -v[62:63]
	v_cvt_f64_i32_e32 v[62:63], v75
	v_mul_f64 v[64:65], v[62:63], s[48:49]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[69:70], v[62:63], s[48:49], -v[64:65]
	v_fma_f64 v[62:63], v[62:63], s[50:51], v[69:70]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[69:70], v[64:65], v[62:63]
	v_add_f64 v[64:65], v[69:70], -v[64:65]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[62:63], v[62:63], -v[64:65]
	v_add_f64 v[64:65], v[69:70], v[60:61]
	v_add_f64 v[71:72], v[64:65], -v[69:70]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[73:74], v[64:65], -v[71:72]
	v_add_f64 v[60:61], v[60:61], -v[71:72]
	v_add_f64 v[69:70], v[69:70], -v[73:74]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[60:61], v[60:61], v[69:70]
	v_add_f64 v[69:70], v[62:63], v[58:59]
	v_add_f64 v[71:72], v[69:70], -v[62:63]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[60:61], v[69:70], v[60:61]
	v_add_f64 v[73:74], v[69:70], -v[71:72]
	v_add_f64 v[58:59], v[58:59], -v[71:72]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[62:63], v[62:63], -v[73:74]
	v_add_f64 v[58:59], v[58:59], v[62:63]
	v_add_f64 v[62:63], v[64:65], v[60:61]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[64:65], v[62:63], -v[64:65]
	v_add_f64 v[60:61], v[60:61], -v[64:65]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[58:59], v[58:59], v[60:61]
	v_add_f64 v[58:59], v[62:63], v[58:59]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v59, v59, v57, s1
	v_cndmask_b32_e64 v58, v58, v56, s1
	v_cmp_ngt_f64_e64 s1, 0, v[56:57]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[58:59], v[58:59], -2.0
	v_cndmask_b32_e64 v59, 0x7ff80000, v59, s1
	v_cmp_nge_f64_e64 s1, 0, v[56:57]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v58, 0, v58, s1
	v_cmp_neq_f64_e64 s1, 0, v[56:57]
	v_cndmask_b32_e64 v59, 0x7ff00000, v59, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_f64_e64 s1, 0x10000000, v[58:59]
	v_cndmask_b32_e64 v56, 0, 1, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v56, 8, v56
	v_ldexp_f64 v[56:57], v[58:59], v56
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_rsq_f64_e32 v[58:59], v[56:57]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[60:61], v[56:57], v[58:59]
	v_mul_f64 v[58:59], v[58:59], 0.5
	v_fma_f64 v[62:63], -v[58:59], v[60:61], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[60:61], v[60:61], v[62:63], v[60:61]
	v_fma_f64 v[58:59], v[58:59], v[62:63], v[58:59]
	v_fma_f64 v[64:65], -v[60:61], v[60:61], v[56:57]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[60:61], v[64:65], v[58:59], v[60:61]
	v_fma_f64 v[62:63], -v[60:61], v[60:61], v[56:57]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[58:59], v[62:63], v[58:59], v[60:61]
	v_cndmask_b32_e64 v60, 0, 0xffffff80, s1
	v_cmp_class_f64_e64 s1, v[56:57], 0x260
	v_ldexp_f64 v[58:59], v[58:59], v60
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v57, v59, v57, s1
	v_cndmask_b32_e64 v56, v58, v56, s1
	v_mul_f64 v[58:59], v[41:42], v[41:42]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[60:61], v[58:59], 0.5
	v_fma_f64 v[69:70], v[58:59], s[54:55], s[52:53]
	v_add_f64 v[62:63], -v[60:61], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[69:70], v[58:59], v[69:70], s[56:57]
	v_add_f64 v[64:65], -v[62:63], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[69:70], v[58:59], v[69:70], s[58:59]
	v_add_f64 v[60:61], v[64:65], -v[60:61]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[69:70], v[58:59], v[69:70], s[60:61]
	v_mul_f64 v[64:65], v[58:59], v[58:59]
	v_fma_f64 v[60:61], v[41:42], -v[52:53], v[60:61]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[69:70], v[58:59], v[69:70], s[74:75]
	v_fma_f64 v[60:61], v[64:65], v[69:70], v[60:61]
	v_mul_f64 v[64:65], v[41:42], -v[58:59]
	v_mul_f64 v[69:70], v[52:53], 0.5
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[60:61], v[62:63], v[60:61]
	v_fma_f64 v[62:63], v[58:59], s[64:65], s[62:63]
	v_fma_f64 v[62:63], v[58:59], v[62:63], s[66:67]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[62:63], v[58:59], v[62:63], s[68:69]
	v_fma_f64 v[62:63], v[58:59], v[62:63], s[70:71]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[62:63], v[64:65], v[62:63], v[69:70]
	v_fma_f64 v[52:53], v[58:59], v[62:63], -v[52:53]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[52:53], v[64:65], s[76:77], v[52:53]
	v_add_f64 v[41:42], v[41:42], -v[52:53]
	v_and_b32_e32 v52, 1, v68
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s1, 0, v52
	v_lshlrev_b32_e32 v52, 30, v68
	v_and_b32_e32 v52, 0x80000000, v52
	v_xor_b32_e32 v42, 0x80000000, v42
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v41, v41, v60, s1
	v_cndmask_b32_e64 v42, v42, v61, s1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v41, 0, v41, s3
	s_cselect_b32 s1, -1, 0
	s_cmp_eq_u32 s80, 3
	v_xor_b32_e32 v42, v42, v52
	s_cselect_b32 s2, -1, 0
	s_cmp_eq_u32 s80, 2
	s_cselect_b32 s4, -1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v42, 0x7ff80000, v42, s3
	s_cmp_eq_u32 s80, 1
	s_cselect_b32 s5, -1, 0
	s_cmp_eq_u32 s80, 0
	v_mul_f64 v[41:42], v[56:57], v[41:42]
	s_cselect_b32 s6, -1, 0
	s_add_i32 s80, s80, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_cmp_lg_u32 s80, 5
	v_cndmask_b32_e64 v36, v36, v42, s1
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e64 v35, v35, v41, s1
	v_cndmask_b32_e64 v34, v34, v42, s2
	v_cndmask_b32_e64 v33, v33, v41, s2
	v_cndmask_b32_e64 v32, v32, v42, s4
	v_cndmask_b32_e64 v31, v31, v41, s4
	v_cndmask_b32_e64 v30, v30, v42, s5
	v_cndmask_b32_e64 v29, v29, v41, s5
	v_cndmask_b32_e64 v28, v28, v42, s6
	v_cndmask_b32_e64 v27, v27, v41, s6
	v_mul_f64 v[41:42], v[39:40], v[39:40]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[52:53], v[41:42], 0.5
	v_fma_f64 v[62:63], v[41:42], s[54:55], s[52:53]
	v_add_f64 v[58:59], -v[52:53], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[62:63], v[41:42], v[62:63], s[56:57]
	v_add_f64 v[60:61], -v[58:59], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[62:63], v[41:42], v[62:63], s[58:59]
	v_add_f64 v[52:53], v[60:61], -v[52:53]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[62:63], v[41:42], v[62:63], s[60:61]
	v_mul_f64 v[60:61], v[41:42], v[41:42]
	v_fma_f64 v[52:53], v[39:40], -v[54:55], v[52:53]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[62:63], v[41:42], v[62:63], s[74:75]
	v_fma_f64 v[52:53], v[60:61], v[62:63], v[52:53]
	v_mul_f64 v[60:61], v[39:40], -v[41:42]
	v_mul_f64 v[62:63], v[54:55], 0.5
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[52:53], v[58:59], v[52:53]
	v_fma_f64 v[58:59], v[41:42], s[64:65], s[62:63]
	v_fma_f64 v[58:59], v[41:42], v[58:59], s[66:67]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[58:59], v[41:42], v[58:59], s[68:69]
	v_fma_f64 v[58:59], v[41:42], v[58:59], s[70:71]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[58:59], v[60:61], v[58:59], v[62:63]
	v_fma_f64 v[41:42], v[41:42], v[58:59], -v[54:55]
	v_dual_mov_b32 v59, v51 :: v_dual_mov_b32 v58, v50
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[41:42], v[60:61], s[76:77], v[41:42]
	v_add_f64 v[39:40], v[39:40], -v[41:42]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v37, v52, v39, s7
	v_cndmask_b32_e64 v39, v53, v40, s7
	v_lshlrev_b32_e32 v40, 30, v67
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v37, 0, v37, s3
	v_xor_b32_e32 v38, v40, v38
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v38, 0x80000000, v38
	v_xor_b32_e32 v38, v39, v38
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v38, 0x7ff80000, v38, s3
	v_mul_f64 v[37:38], v[56:57], v[37:38]
	v_dual_mov_b32 v57, v49 :: v_dual_mov_b32 v56, v48
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v26, v26, v38, s1
	v_cndmask_b32_e64 v25, v25, v37, s1
	v_cndmask_b32_e64 v24, v24, v38, s2
	v_cndmask_b32_e64 v23, v23, v37, s2
	v_cndmask_b32_e64 v22, v22, v38, s4
	v_cndmask_b32_e64 v21, v21, v37, s4
	v_cndmask_b32_e64 v20, v20, v38, s5
	v_cndmask_b32_e64 v19, v19, v37, s5
	v_cndmask_b32_e64 v18, v18, v38, s6
	v_cndmask_b32_e64 v17, v17, v37, s6
	s_cbranch_scc1 .LBB2_197
; %bb.206:                              ; %.lr.ph.i.i.2.i.i.preheader
                                        ;   in Loop: Header=BB2_196 Depth=1
	v_mov_b32_e32 v37, 0
	v_mov_b32_e32 v38, 0
	s_mov_b32 s5, 0
.LBB2_207:                              ; %.lr.ph.i.i.2.i.i
                                        ;   Parent Loop BB2_196 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB2_208 Depth 3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s5, 1
	s_mov_b32 s6, s5
	s_cselect_b32 s1, -1, 0
	s_cmp_eq_u32 s5, 2
	v_cndmask_b32_e64 v39, v28, v30, s1
	v_cndmask_b32_e64 v40, v27, v29, s1
	v_cndmask_b32_e64 v41, v18, v20, s1
	v_cndmask_b32_e64 v42, v17, v19, s1
	s_cselect_b32 s1, -1, 0
	s_cmp_eq_u32 s5, 3
	v_cndmask_b32_e64 v39, v39, v32, s1
	v_cndmask_b32_e64 v40, v40, v31, s1
	v_cndmask_b32_e64 v41, v41, v22, s1
	v_cndmask_b32_e64 v42, v42, v21, s1
	s_cselect_b32 s1, -1, 0
	s_cmp_eq_u32 s5, 4
	v_cndmask_b32_e64 v39, v39, v34, s1
	v_cndmask_b32_e64 v52, v40, v33, s1
	v_cndmask_b32_e64 v41, v41, v24, s1
	v_cndmask_b32_e64 v53, v42, v23, s1
	s_cselect_b32 s1, -1, 0
	s_delay_alu instid0(SALU_CYCLE_1)
	v_cndmask_b32_e64 v40, v39, v36, s1
	v_cndmask_b32_e64 v39, v52, v35, s1
	v_cndmask_b32_e64 v42, v41, v26, s1
	v_cndmask_b32_e64 v41, v53, v25, s1
.LBB2_208:                              ;   Parent Loop BB2_196 Depth=1
                                        ;     Parent Loop BB2_207 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_add_i32 s6, s6, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s6, 1
	s_cselect_b32 s1, -1, 0
	s_cmp_eq_u32 s6, 2
	v_cndmask_b32_e64 v53, v18, v20, s1
	v_cndmask_b32_e64 v54, v17, v19, s1
	s_cselect_b32 s2, -1, 0
	s_cmp_eq_u32 s6, 3
	v_cndmask_b32_e64 v52, v28, v30, s1
	v_cndmask_b32_e64 v53, v53, v22, s2
	v_cndmask_b32_e64 v54, v54, v21, s2
	s_cselect_b32 s3, -1, 0
	s_cmp_eq_u32 s6, 4
	v_cndmask_b32_e64 v52, v52, v32, s2
	v_cndmask_b32_e64 v55, v53, v24, s3
	v_cndmask_b32_e64 v54, v54, v23, s3
	s_cselect_b32 s4, -1, 0
	s_cmp_lt_u32 s6, 4
	v_cndmask_b32_e64 v52, v52, v34, s3
	v_cndmask_b32_e64 v55, v55, v26, s4
	v_cndmask_b32_e64 v54, v54, v25, s4
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v53, v52, v36, s4
	v_cndmask_b32_e64 v52, v27, v29, s1
	v_add_f64 v[54:55], v[41:42], -v[54:55]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v52, v52, v31, s2
	v_cndmask_b32_e64 v52, v52, v33, s3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v52, v52, v35, s4
	v_add_f64 v[52:53], v[39:40], -v[52:53]
	v_mul_f64 v[54:55], v[54:55], v[54:55]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[52:53], v[52:53], v[52:53], v[54:55]
	v_cmp_lt_f64_e64 s1, v[37:38], v[52:53]
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e64 v38, v38, v53, s1
	v_cndmask_b32_e64 v37, v37, v52, s1
	s_cbranch_scc1 .LBB2_208
; %bb.209:                              ; %.loopexit.i.i.2.i.i
                                        ;   in Loop: Header=BB2_207 Depth=2
	s_add_i32 s5, s5, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s5, 4
	s_cbranch_scc1 .LBB2_207
; %bb.210:                              ;   in Loop: Header=BB2_196 Depth=1
	v_cmp_gt_f64_e64 s1, 0x10000000, v[37:38]
	s_add_i32 s79, s79, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_cmp_lg_u32 s79, 0x10000
	v_cndmask_b32_e64 v39, 0, 1, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v39, 8, v39
	v_ldexp_f64 v[37:38], v[37:38], v39
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_rsq_f64_e32 v[39:40], v[37:38]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[41:42], v[37:38], v[39:40]
	v_mul_f64 v[39:40], v[39:40], 0.5
	v_fma_f64 v[52:53], -v[39:40], v[41:42], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[41:42], v[41:42], v[52:53], v[41:42]
	v_fma_f64 v[39:40], v[39:40], v[52:53], v[39:40]
	v_fma_f64 v[52:53], -v[41:42], v[41:42], v[37:38]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[41:42], v[52:53], v[39:40], v[41:42]
	v_fma_f64 v[52:53], -v[41:42], v[41:42], v[37:38]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[39:40], v[52:53], v[39:40], v[41:42]
	v_cndmask_b32_e64 v41, 0, 0xffffff80, s1
	v_cmp_class_f64_e64 s1, v[37:38], 0x260
	v_ldexp_f64 v[39:40], v[39:40], v41
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v38, v40, v38, s1
	v_cndmask_b32_e64 v37, v39, v37, s1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[45:46], v[45:46], v[37:38]
	s_cbranch_scc1 .LBB2_196
; %bb.211:                              ; %_ZNK6thrust11hip_rocprim26transform_input_iterator_tIdNS_17counting_iteratorIjNS_11use_defaultES3_S3_EE11estimate_esEixEl.exit.2.i.i
	s_delay_alu instid0(VALU_DEP_1)
	v_ldexp_f64 v[5:6], v[45:46], -16
.LBB2_212:                              ; %Flow1225
	s_or_b32 exec_lo, exec_lo, s78
	v_or_b32_e32 v17, 0x300, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s1, s33, v17
	s_and_saveexec_b32 s78, s1
	s_cbranch_execz .LBB2_232
; %bb.213:
	s_movk_i32 s2, 0x1001
	s_mov_b64 s[6:7], 0
	v_mad_u64_u32 v[7:8], null, v66, s2, 0x7f056016
                                        ; implicit-def: $vgpr48_vgpr49
                                        ; implicit-def: $vgpr43_vgpr44
                                        ; implicit-def: $vgpr50_vgpr51
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v8, 19, v7
	v_xor3_b32 v7, v7, v8, 0xc761c23c
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v7, v7, 5, v7
	v_add_nc_u32_e32 v8, 0xe9f8cc1d, v7
	v_lshl_add_u32 v7, v7, 9, 0xaccf6200
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v7, v8, v7
	v_lshlrev_b32_e32 v8, 3, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v7, v7, v8, 0xfd7046c5
	v_lshrrev_b32_e32 v8, 16, v7
	s_delay_alu instid0(VALU_DEP_1)
	v_xor3_b32 v17, v7, v8, 0xb55a4f09
                                        ; implicit-def: $vgpr7_vgpr8
.LBB2_214:                              ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v18, 12, v17
	s_cmp_eq_u32 s6, 0
	s_cselect_b32 s2, -1, 0
	s_cmp_eq_u32 s6, 1
	v_add3_u32 v17, v17, v18, 0x7ed55d16
	s_cselect_b32 s3, -1, 0
	s_cmp_eq_u32 s6, 2
	s_cselect_b32 s4, -1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v18, 19, v17
	s_cmp_eq_u32 s6, 3
	s_cselect_b32 s5, -1, 0
	s_add_u32 s6, s6, 1
	v_xor3_b32 v17, v17, v18, 0xc761c23c
	s_addc_u32 s7, s7, 0
	s_cmp_lg_u32 s6, 4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v17, v17, 5, v17
	v_add_nc_u32_e32 v18, 0xe9f8cc1d, v17
	v_lshl_add_u32 v17, v17, 9, 0xaccf6200
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v17, v18, v17
	v_lshlrev_b32_e32 v18, 3, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v17, v17, v18, 0xfd7046c5
	v_lshrrev_b32_e32 v18, 16, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor3_b32 v17, v17, v18, 0xb55a4f09
	v_lshlrev_b32_e32 v19, 12, v17
	v_xor_b32_e32 v18, s23, v17
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add3_u32 v17, v17, v19, 0x7ed55d16
	v_cndmask_b32_e64 v49, v49, v18, s2
	v_cndmask_b32_e64 v8, v8, v18, s3
	v_cndmask_b32_e64 v44, v44, v18, s4
	v_cndmask_b32_e64 v51, v51, v18, s5
	v_lshrrev_b32_e32 v19, 19, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor3_b32 v17, v17, v19, 0xc761c23c
	v_lshl_add_u32 v17, v17, 5, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v19, 0xe9f8cc1d, v17
	v_lshl_add_u32 v17, v17, 9, 0xaccf6200
	v_xor_b32_e32 v17, v19, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v19, 3, v17
	v_add3_u32 v17, v17, v19, 0xfd7046c5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v19, 16, v17
	v_xor3_b32 v17, v17, v19, 0xb55a4f09
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v18, s22, v17
	v_cndmask_b32_e64 v48, v48, v18, s2
	v_cndmask_b32_e64 v7, v7, v18, s3
	v_cndmask_b32_e64 v43, v43, v18, s4
	v_cndmask_b32_e64 v50, v50, v18, s5
	s_cbranch_scc1 .LBB2_214
; %bb.215:                              ; %.preheader55.i.i.3.i.i.preheader
	v_mov_b32_e32 v45, 0
	v_dual_mov_b32 v46, 0 :: v_dual_mov_b32 v47, 0
	s_mov_b32 s10, 0x54442d18
	s_mov_b32 s12, 0x33145c07
	s_mov_b32 s24, 0x6dc9c883
	s_mov_b32 s28, 0x33145c00
	s_mov_b32 s30, 0x252049c0
	s_mov_b32 s34, 0x55555555
	s_mov_b32 s36, 0x6b47b09a
	s_mov_b32 s38, 0xbf559e2b
	s_mov_b32 s40, 0xd7f4df2e
	s_mov_b32 s42, 0x16291751
	s_mov_b32 s44, 0x9b27acf1
	s_mov_b32 s46, 0x998ef7b6
	s_mov_b32 s48, 0xfefa39ef
	s_mov_b32 s50, 0x3b39803f
	s_mov_b32 s52, 0x9037ab78
	s_mov_b32 s54, 0x46cc5e42
	s_mov_b32 s56, 0xa17f65f6
	s_mov_b32 s58, 0x19f4ec90
	s_mov_b32 s60, 0x16c16967
	s_mov_b32 s62, 0xb42fdfa7
	s_mov_b32 s64, 0xf9a43bb8
	s_mov_b32 s66, 0x796cde01
	s_mov_b32 s68, 0x19e83e5c
	s_mov_b32 s70, 0x11110bb3
	s_mov_b32 s79, 0
	s_mov_b32 s11, 0x401921fb
	s_mov_b32 s9, 0x3ff921fb
	s_mov_b32 s13, 0x3c91a626
	s_mov_b32 s25, 0x3fe45f30
	s_mov_b32 s27, 0xbff921fb
	s_mov_b32 s29, 0xbc91a626
	s_mov_b32 s31, 0xb97b839a
	s_mov_b32 s35, 0x3fe55555
	s_mov_b32 s37, 0x3fc38538
	s_mov_b32 s39, 0x3fc3ab76
	s_mov_b32 s41, 0x3fc7474d
	s_mov_b32 s43, 0x3fcc71c0
	s_mov_b32 s45, 0x3fd24924
	s_mov_b32 s47, 0x3fd99999
	s_mov_b32 s49, 0x3fe62e42
	s_mov_b32 s51, 0x3c7abc9e
	s_mov_b32 s53, 0x3e21eeb6
	s_mov_b32 s55, 0xbda907db
	s_mov_b32 s57, 0xbe927e4f
	s_mov_b32 s59, 0x3efa01a0
	s_mov_b32 s61, 0xbf56c16c
	s_mov_b32 s63, 0xbe5ae600
	s_mov_b32 s65, 0x3de5e0b2
	s_mov_b32 s67, 0x3ec71de3
	s_mov_b32 s69, 0xbf2a01a0
	s_mov_b32 s71, 0x3f811111
	s_mov_b32 s72, 0x55555780
	s_mov_b32 s75, 0x3fa55555
	s_mov_b32 s77, 0xbfc55555
                                        ; implicit-def: $vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31_vgpr32
                                        ; implicit-def: $vgpr27_vgpr28_vgpr29_vgpr30_vgpr31_vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42
.LBB2_216:                              ; %.preheader55.i.i.3.i.i
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB2_217 Depth 2
                                        ;     Child Loop BB2_227 Depth 2
                                        ;       Child Loop BB2_228 Depth 3
	v_dual_mov_b32 v57, v49 :: v_dual_mov_b32 v56, v48
	v_dual_mov_b32 v59, v51 :: v_dual_mov_b32 v58, v50
	s_mov_b32 s80, 0
.LBB2_217:                              ;   Parent Loop BB2_216 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v38, v8, v59
	v_xor_b32_e32 v37, v7, v58
                                        ; implicit-def: $vgpr68
                                        ; implicit-def: $vgpr52_vgpr53
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v70, v38, v57
	v_lshrrev_b64 v[49:50], 19, v[37:38]
	v_lshlrev_b32_e32 v39, 13, v37
	v_xor_b32_e32 v69, v37, v56
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_or_b32_e32 v71, v39, v50
	v_add_co_u32 v37, s2, v49, v69
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v38, s2, v71, v70, s2
	v_lshrrev_b64 v[37:38], 11, v[37:38]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_u32_e32 v[38:39], v38
	v_cvt_f64_u32_e32 v[40:41], v37
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[37:38], v[38:39], 32
	v_add_f64 v[37:38], v[37:38], v[40:41]
                                        ; implicit-def: $vgpr41_vgpr42
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[37:38], v[37:38], 0xffffffcb
	v_mul_f64 v[37:38], v[37:38], s[10:11]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ngt_f64_e64 s2, 0x41d00000, v[37:38]
	v_trig_preop_f64 v[62:63], v[37:38], 0
	v_trig_preop_f64 v[60:61], v[37:38], 1
	v_ldexp_f64 v[64:65], v[37:38], 0xffffff80
	v_trig_preop_f64 v[50:51], v[37:38], 2
	s_and_saveexec_b32 s3, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s5, exec_lo, s3
	s_cbranch_execz .LBB2_219
; %bb.218:                              ;   in Loop: Header=BB2_217 Depth=2
	v_cmp_le_f64_e64 s3, 0x7b000000, v[37:38]
	s_mov_b32 s8, s10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v40, v38, v65, s3
	v_cndmask_b32_e64 v39, v37, v64, s3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_f64 v[41:42], v[62:63], v[39:40]
	v_mul_f64 v[52:53], v[60:61], v[39:40]
	v_mul_f64 v[78:79], v[50:51], v[39:40]
	v_fma_f64 v[54:55], v[62:63], v[39:40], -v[41:42]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[80:81], v[60:61], v[39:40], -v[52:53]
	v_fma_f64 v[39:40], v[50:51], v[39:40], -v[78:79]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[67:68], v[52:53], v[54:55]
	v_add_f64 v[72:73], v[67:68], -v[52:53]
	v_add_f64 v[76:77], v[41:42], v[67:68]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[74:75], v[67:68], -v[72:73]
	v_add_f64 v[54:55], v[54:55], -v[72:73]
	v_ldexp_f64 v[72:73], v[76:77], -2
	v_add_f64 v[41:42], v[76:77], -v[41:42]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[52:53], v[52:53], -v[74:75]
	v_add_f64 v[74:75], v[78:79], v[80:81]
	v_cmp_neq_f64_e64 s3, 0x7ff00000, |v[72:73]|
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[41:42], v[67:68], -v[41:42]
	v_add_f64 v[52:53], v[54:55], v[52:53]
	v_fract_f64_e32 v[54:55], v[72:73]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[67:68], v[74:75], v[52:53]
	v_cndmask_b32_e64 v55, 0, v55, s3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v54, 0, v54, s3
	v_ldexp_f64 v[54:55], v[54:55], 2
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[72:73], v[41:42], v[67:68]
	v_add_f64 v[82:83], v[67:68], -v[74:75]
	v_add_f64 v[76:77], v[72:73], v[54:55]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[88:89], v[67:68], -v[82:83]
	v_add_f64 v[52:53], v[52:53], -v[82:83]
	v_add_f64 v[41:42], v[72:73], -v[41:42]
	v_cmp_gt_f64_e64 s3, 0, v[76:77]
	v_add_f64 v[76:77], v[74:75], -v[78:79]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[41:42], v[67:68], -v[41:42]
	v_cndmask_b32_e64 v48, 0, 0x40100000, s3
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[86:87], v[74:75], -v[76:77]
	v_add_f64 v[76:77], v[80:81], -v[76:77]
	v_add_f64 v[74:75], v[74:75], -v[88:89]
	v_add_f64 v[54:55], v[54:55], v[47:48]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[80:81], v[78:79], -v[86:87]
	v_add_f64 v[52:53], v[52:53], v[74:75]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[84:85], v[72:73], v[54:55]
	v_add_f64 v[76:77], v[76:77], v[80:81]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_i32_f64_e32 v48, v[84:85]
	v_add_f64 v[52:53], v[76:77], v[52:53]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_i32_e32 v[82:83], v48
	v_add_f64 v[39:40], v[39:40], v[52:53]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[54:55], v[54:55], -v[82:83]
	v_add_f64 v[39:40], v[41:42], v[39:40]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[74:75], v[72:73], v[54:55]
	v_add_f64 v[52:53], v[74:75], -v[54:55]
	v_cmp_le_f64_e64 s3, 0.5, v[74:75]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[41:42], v[72:73], -v[52:53]
	v_add_co_ci_u32_e64 v68, s4, 0, v48, s3
	v_cndmask_b32_e64 v48, 0, 0x3ff00000, s3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[39:40], v[39:40], v[41:42]
	v_add_f64 v[41:42], v[74:75], -v[47:48]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[52:53], v[41:42], v[39:40]
	v_mul_f64 v[54:55], v[52:53], s[8:9]
	v_add_f64 v[41:42], v[52:53], -v[41:42]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[72:73], v[52:53], s[8:9], -v[54:55]
	v_add_f64 v[39:40], v[39:40], -v[41:42]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[41:42], v[52:53], s[12:13], v[72:73]
	v_fma_f64 v[39:40], v[39:40], s[8:9], v[41:42]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[41:42], v[54:55], v[39:40]
	v_add_f64 v[52:53], v[41:42], -v[54:55]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[52:53], v[39:40], -v[52:53]
.LBB2_219:                              ; %Flow1221
                                        ;   in Loop: Header=BB2_217 Depth=2
	s_and_not1_saveexec_b32 s3, s5
	s_cbranch_execz .LBB2_221
; %bb.220:                              ;   in Loop: Header=BB2_217 Depth=2
	v_mul_f64 v[39:40], v[37:38], s[24:25]
	s_mov_b32 s26, s10
	s_mov_b32 s4, s28
	s_mov_b32 s5, s13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[39:40], v[39:40]
	v_fma_f64 v[41:42], v[39:40], s[26:27], v[37:38]
	v_mul_f64 v[52:53], v[39:40], s[28:29]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[67:68], v[39:40], s[28:29], v[41:42]
	v_add_f64 v[54:55], v[41:42], v[52:53]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[41:42], v[41:42], -v[54:55]
	v_add_f64 v[54:55], v[54:55], -v[67:68]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[41:42], v[41:42], v[52:53]
	v_fma_f64 v[52:53], v[39:40], s[4:5], v[52:53]
	v_add_f64 v[41:42], v[54:55], v[41:42]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[41:42], v[41:42], -v[52:53]
	v_fma_f64 v[52:53], v[39:40], s[30:31], v[41:42]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[41:42], v[67:68], v[52:53]
	v_add_f64 v[54:55], v[41:42], -v[67:68]
	v_cvt_i32_f64_e32 v68, v[39:40]
	s_delay_alu instid0(VALU_DEP_2)
	v_add_f64 v[52:53], v[52:53], -v[54:55]
.LBB2_221:                              ; %_ZL3cosd.exit.i.i.3.i.i
                                        ;   in Loop: Header=BB2_217 Depth=2
	s_or_b32 exec_lo, exec_lo, s3
                                        ; implicit-def: $vgpr67
                                        ; implicit-def: $vgpr39_vgpr40
                                        ; implicit-def: $vgpr54_vgpr55
	s_and_saveexec_b32 s3, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s4, exec_lo, s3
	s_cbranch_execz .LBB2_223
; %bb.222:                              ;   in Loop: Header=BB2_217 Depth=2
	v_cmp_le_f64_e64 s2, 0x7b000000, v[37:38]
	s_mov_b32 s8, s10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v40, v38, v65, s2
	v_cndmask_b32_e64 v39, v37, v64, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_f64 v[54:55], v[62:63], v[39:40]
	v_mul_f64 v[64:65], v[60:61], v[39:40]
	v_mul_f64 v[80:81], v[50:51], v[39:40]
	v_fma_f64 v[62:63], v[62:63], v[39:40], -v[54:55]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[60:61], v[60:61], v[39:40], -v[64:65]
	v_fma_f64 v[39:40], v[50:51], v[39:40], -v[80:81]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[72:73], v[64:65], v[62:63]
	v_add_f64 v[74:75], v[72:73], -v[64:65]
	v_add_f64 v[78:79], v[54:55], v[72:73]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[76:77], v[72:73], -v[74:75]
	v_add_f64 v[62:63], v[62:63], -v[74:75]
	v_ldexp_f64 v[74:75], v[78:79], -2
	v_add_f64 v[54:55], v[78:79], -v[54:55]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[64:65], v[64:65], -v[76:77]
	v_add_f64 v[76:77], v[80:81], v[60:61]
	v_cmp_neq_f64_e64 s2, 0x7ff00000, |v[74:75]|
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[54:55], v[72:73], -v[54:55]
	v_add_f64 v[62:63], v[62:63], v[64:65]
	v_fract_f64_e32 v[64:65], v[74:75]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[72:73], v[76:77], v[62:63]
	v_cndmask_b32_e64 v65, 0, v65, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v64, 0, v64, s2
	v_ldexp_f64 v[64:65], v[64:65], 2
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[74:75], v[54:55], v[72:73]
	v_add_f64 v[82:83], v[72:73], -v[76:77]
	v_add_f64 v[78:79], v[74:75], v[64:65]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[88:89], v[72:73], -v[82:83]
	v_add_f64 v[62:63], v[62:63], -v[82:83]
	v_add_f64 v[50:51], v[74:75], -v[54:55]
	v_cmp_gt_f64_e64 s2, 0, v[78:79]
	v_add_f64 v[78:79], v[76:77], -v[80:81]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[50:51], v[72:73], -v[50:51]
	v_cndmask_b32_e64 v48, 0, 0x40100000, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[86:87], v[76:77], -v[78:79]
	v_add_f64 v[60:61], v[60:61], -v[78:79]
	v_add_f64 v[76:77], v[76:77], -v[88:89]
	v_add_f64 v[64:65], v[64:65], v[47:48]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[78:79], v[80:81], -v[86:87]
	v_add_f64 v[62:63], v[62:63], v[76:77]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[84:85], v[74:75], v[64:65]
	v_add_f64 v[60:61], v[60:61], v[78:79]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_i32_f64_e32 v48, v[84:85]
	v_add_f64 v[54:55], v[60:61], v[62:63]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_i32_e32 v[82:83], v48
	v_add_f64 v[39:40], v[39:40], v[54:55]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[64:65], v[64:65], -v[82:83]
	v_add_f64 v[39:40], v[50:51], v[39:40]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[60:61], v[74:75], v[64:65]
	v_add_f64 v[54:55], v[60:61], -v[64:65]
	v_cmp_le_f64_e64 s2, 0.5, v[60:61]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[50:51], v[74:75], -v[54:55]
	v_add_co_ci_u32_e64 v67, s3, 0, v48, s2
	v_cndmask_b32_e64 v48, 0, 0x3ff00000, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[39:40], v[39:40], v[50:51]
	v_add_f64 v[50:51], v[60:61], -v[47:48]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[54:55], v[50:51], v[39:40]
	v_mul_f64 v[60:61], v[54:55], s[8:9]
	v_add_f64 v[50:51], v[54:55], -v[50:51]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[62:63], v[54:55], s[8:9], -v[60:61]
	v_add_f64 v[39:40], v[39:40], -v[50:51]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[50:51], v[54:55], s[12:13], v[62:63]
	v_fma_f64 v[50:51], v[39:40], s[8:9], v[50:51]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[39:40], v[60:61], v[50:51]
	v_add_f64 v[54:55], v[39:40], -v[60:61]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[54:55], v[50:51], -v[54:55]
.LBB2_223:                              ; %Flow1220
                                        ;   in Loop: Header=BB2_217 Depth=2
	s_and_not1_saveexec_b32 s2, s4
	s_cbranch_execz .LBB2_225
; %bb.224:                              ;   in Loop: Header=BB2_217 Depth=2
	v_mul_f64 v[39:40], v[37:38], s[24:25]
	s_mov_b32 s26, s10
	s_mov_b32 s4, s28
	s_mov_b32 s5, s13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[50:51], v[39:40]
	v_fma_f64 v[39:40], v[50:51], s[26:27], v[37:38]
	v_mul_f64 v[54:55], v[50:51], s[28:29]
	v_cvt_i32_f64_e32 v67, v[50:51]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[62:63], v[50:51], s[28:29], v[39:40]
	v_add_f64 v[60:61], v[39:40], v[54:55]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[39:40], v[39:40], -v[60:61]
	v_add_f64 v[60:61], v[60:61], -v[62:63]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[39:40], v[39:40], v[54:55]
	v_fma_f64 v[54:55], v[50:51], s[4:5], v[54:55]
	v_add_f64 v[39:40], v[60:61], v[39:40]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[39:40], v[39:40], -v[54:55]
	v_fma_f64 v[54:55], v[50:51], s[30:31], v[39:40]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[39:40], v[62:63], v[54:55]
	v_add_f64 v[60:61], v[39:40], -v[62:63]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[54:55], v[54:55], -v[60:61]
.LBB2_225:                              ; %_ZL3sind.exit.i.i.3.i.i
                                        ;   in Loop: Header=BB2_217 Depth=2
	s_or_b32 exec_lo, exec_lo, s2
	v_xor_b32_e32 v43, v43, v56
	v_add_co_u32 v56, s2, v58, v56
	v_xor_b32_e32 v44, v44, v57
	v_add_co_ci_u32_e64 v57, s2, v59, v57, s2
	v_lshlrev_b64 v[50:51], 17, v[7:8]
	v_xor_b32_e32 v7, v43, v7
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_xor_b32_e32 v8, v44, v8
	v_lshrrev_b64 v[56:57], 11, v[56:57]
	s_mov_b32 s73, s35
	s_mov_b32 s74, s34
	v_xor_b32_e32 v48, v44, v51
	v_xor_b32_e32 v50, v43, v50
	v_lshlrev_b64 v[43:44], 17, v[7:8]
	v_cvt_f64_u32_e32 v[57:58], v57
	v_xor_b32_e32 v61, v8, v71
	v_xor_b32_e32 v51, v48, v70
	v_xor_b32_e32 v50, v50, v69
	v_xor_b32_e32 v60, v7, v49
	s_mov_b32 s76, s34
	v_xor_b32_e32 v49, v61, v70
	v_xor_b32_e32 v8, v51, v8
	v_xor_b32_e32 v7, v50, v7
	v_xor_b32_e32 v44, v51, v44
	v_xor_b32_e32 v43, v50, v43
	v_lshrrev_b64 v[50:51], 19, v[60:61]
	v_xor_b32_e32 v48, v60, v69
	v_lshlrev_b32_e32 v60, 13, v60
	v_cmp_lg_f64_e64 s4, 0x7ff00000, v[37:38]
	s_cmp_eq_u32 s80, 4
	v_and_b32_e32 v37, 1, v67
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_or_b32_e32 v51, v60, v51
	v_cvt_f64_u32_e32 v[59:60], v56
	v_cmp_eq_u32_e64 s8, 0, v37
	v_ldexp_f64 v[57:58], v[57:58], 32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[56:57], v[57:58], v[59:60]
	v_ldexp_f64 v[56:57], v[56:57], 0xffffffcb
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_frexp_mant_f64_e32 v[58:59], v[56:57]
	v_cmp_gt_f64_e64 s2, s[34:35], v[58:59]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v60, 0, 1, s2
	v_ldexp_f64 v[58:59], v[58:59], v60
	v_frexp_exp_i32_f64_e32 v60, v[56:57]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[62:63], v[58:59], 1.0
	v_subrev_co_ci_u32_e64 v75, s2, 0, v60, s2
	v_add_f64 v[60:61], v[58:59], -1.0
	v_cmp_eq_f64_e64 s2, 0x7ff00000, v[56:57]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[64:65], v[62:63], -1.0
	v_add_f64 v[58:59], v[58:59], -v[64:65]
	v_rcp_f64_e32 v[64:65], v[62:63]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[69:70], -v[62:63], v[64:65], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[64:65], v[69:70], v[64:65], v[64:65]
	v_fma_f64 v[69:70], -v[62:63], v[64:65], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[64:65], v[69:70], v[64:65], v[64:65]
	v_mul_f64 v[69:70], v[60:61], v[64:65]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[71:72], v[62:63], v[69:70]
	v_fma_f64 v[62:63], v[69:70], v[62:63], -v[71:72]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[58:59], v[69:70], v[58:59], v[62:63]
	v_add_f64 v[62:63], v[71:72], v[58:59]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[73:74], v[60:61], -v[62:63]
	v_add_f64 v[71:72], v[62:63], -v[71:72]
	v_add_f64 v[60:61], v[60:61], -v[73:74]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[58:59], v[71:72], -v[58:59]
	v_add_f64 v[60:61], v[60:61], -v[62:63]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[58:59], v[58:59], v[60:61]
	v_add_f64 v[58:59], v[73:74], v[58:59]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[58:59], v[64:65], v[58:59]
	v_add_f64 v[60:61], v[69:70], v[58:59]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[62:63], v[60:61], -v[69:70]
	v_ldexp_f64 v[69:70], v[60:61], 1
	v_add_f64 v[58:59], v[58:59], -v[62:63]
	v_mul_f64 v[62:63], v[60:61], v[60:61]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[58:59], v[58:59], 1
	v_fma_f64 v[64:65], v[62:63], s[38:39], s[36:37]
	v_mul_f64 v[60:61], v[60:61], v[62:63]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[64:65], v[62:63], v[64:65], s[40:41]
	v_fma_f64 v[64:65], v[62:63], v[64:65], s[42:43]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[64:65], v[62:63], v[64:65], s[44:45]
	v_fma_f64 v[64:65], v[62:63], v[64:65], s[46:47]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[64:65], v[62:63], v[64:65], s[72:73]
	v_mul_f64 v[60:61], v[60:61], v[64:65]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[62:63], v[69:70], v[60:61]
	v_add_f64 v[64:65], v[62:63], -v[69:70]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[60:61], v[60:61], -v[64:65]
	v_add_f64 v[58:59], v[58:59], v[60:61]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[60:61], v[62:63], v[58:59]
	v_add_f64 v[62:63], v[60:61], -v[62:63]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[58:59], v[58:59], -v[62:63]
	v_cvt_f64_i32_e32 v[62:63], v75
	v_mul_f64 v[64:65], v[62:63], s[48:49]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[69:70], v[62:63], s[48:49], -v[64:65]
	v_fma_f64 v[62:63], v[62:63], s[50:51], v[69:70]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[69:70], v[64:65], v[62:63]
	v_add_f64 v[64:65], v[69:70], -v[64:65]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[62:63], v[62:63], -v[64:65]
	v_add_f64 v[64:65], v[69:70], v[60:61]
	v_add_f64 v[71:72], v[64:65], -v[69:70]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[73:74], v[64:65], -v[71:72]
	v_add_f64 v[60:61], v[60:61], -v[71:72]
	v_add_f64 v[69:70], v[69:70], -v[73:74]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[60:61], v[60:61], v[69:70]
	v_add_f64 v[69:70], v[62:63], v[58:59]
	v_add_f64 v[71:72], v[69:70], -v[62:63]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[60:61], v[69:70], v[60:61]
	v_add_f64 v[73:74], v[69:70], -v[71:72]
	v_add_f64 v[58:59], v[58:59], -v[71:72]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[62:63], v[62:63], -v[73:74]
	v_add_f64 v[58:59], v[58:59], v[62:63]
	v_add_f64 v[62:63], v[64:65], v[60:61]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[64:65], v[62:63], -v[64:65]
	v_add_f64 v[60:61], v[60:61], -v[64:65]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[58:59], v[58:59], v[60:61]
	v_add_f64 v[58:59], v[62:63], v[58:59]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v59, v59, v57, s2
	v_cndmask_b32_e64 v58, v58, v56, s2
	v_cmp_ngt_f64_e64 s2, 0, v[56:57]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[58:59], v[58:59], -2.0
	v_cndmask_b32_e64 v59, 0x7ff80000, v59, s2
	v_cmp_nge_f64_e64 s2, 0, v[56:57]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v58, 0, v58, s2
	v_cmp_neq_f64_e64 s2, 0, v[56:57]
	v_cndmask_b32_e64 v59, 0x7ff00000, v59, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_f64_e64 s2, 0x10000000, v[58:59]
	v_cndmask_b32_e64 v56, 0, 1, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v56, 8, v56
	v_ldexp_f64 v[56:57], v[58:59], v56
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_rsq_f64_e32 v[58:59], v[56:57]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[60:61], v[56:57], v[58:59]
	v_mul_f64 v[58:59], v[58:59], 0.5
	v_fma_f64 v[62:63], -v[58:59], v[60:61], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[60:61], v[60:61], v[62:63], v[60:61]
	v_fma_f64 v[58:59], v[58:59], v[62:63], v[58:59]
	v_fma_f64 v[64:65], -v[60:61], v[60:61], v[56:57]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[60:61], v[64:65], v[58:59], v[60:61]
	v_fma_f64 v[62:63], -v[60:61], v[60:61], v[56:57]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[58:59], v[62:63], v[58:59], v[60:61]
	v_cndmask_b32_e64 v60, 0, 0xffffff80, s2
	v_cmp_class_f64_e64 s2, v[56:57], 0x260
	v_ldexp_f64 v[58:59], v[58:59], v60
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v57, v59, v57, s2
	v_cndmask_b32_e64 v56, v58, v56, s2
	v_mul_f64 v[58:59], v[41:42], v[41:42]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[60:61], v[58:59], 0.5
	v_fma_f64 v[69:70], v[58:59], s[54:55], s[52:53]
	v_add_f64 v[62:63], -v[60:61], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[69:70], v[58:59], v[69:70], s[56:57]
	v_add_f64 v[64:65], -v[62:63], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[69:70], v[58:59], v[69:70], s[58:59]
	v_add_f64 v[60:61], v[64:65], -v[60:61]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[69:70], v[58:59], v[69:70], s[60:61]
	v_mul_f64 v[64:65], v[58:59], v[58:59]
	v_fma_f64 v[60:61], v[41:42], -v[52:53], v[60:61]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[69:70], v[58:59], v[69:70], s[74:75]
	v_fma_f64 v[60:61], v[64:65], v[69:70], v[60:61]
	v_mul_f64 v[64:65], v[41:42], -v[58:59]
	v_mul_f64 v[69:70], v[52:53], 0.5
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[60:61], v[62:63], v[60:61]
	v_fma_f64 v[62:63], v[58:59], s[64:65], s[62:63]
	v_fma_f64 v[62:63], v[58:59], v[62:63], s[66:67]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[62:63], v[58:59], v[62:63], s[68:69]
	v_fma_f64 v[62:63], v[58:59], v[62:63], s[70:71]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[62:63], v[64:65], v[62:63], v[69:70]
	v_fma_f64 v[52:53], v[58:59], v[62:63], -v[52:53]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[52:53], v[64:65], s[76:77], v[52:53]
	v_add_f64 v[41:42], v[41:42], -v[52:53]
	v_and_b32_e32 v52, 1, v68
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s2, 0, v52
	v_lshlrev_b32_e32 v52, 30, v68
	v_and_b32_e32 v52, 0x80000000, v52
	v_xor_b32_e32 v42, 0x80000000, v42
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v41, v41, v60, s2
	v_cndmask_b32_e64 v42, v42, v61, s2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v41, 0, v41, s4
	s_cselect_b32 s2, -1, 0
	s_cmp_eq_u32 s80, 3
	v_xor_b32_e32 v42, v42, v52
	s_cselect_b32 s3, -1, 0
	s_cmp_eq_u32 s80, 2
	s_cselect_b32 s5, -1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v42, 0x7ff80000, v42, s4
	s_cmp_eq_u32 s80, 1
	s_cselect_b32 s6, -1, 0
	s_cmp_eq_u32 s80, 0
	v_mul_f64 v[41:42], v[56:57], v[41:42]
	s_cselect_b32 s7, -1, 0
	s_add_i32 s80, s80, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_cmp_lg_u32 s80, 5
	v_cndmask_b32_e64 v36, v36, v42, s2
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e64 v35, v35, v41, s2
	v_cndmask_b32_e64 v34, v34, v42, s3
	v_cndmask_b32_e64 v33, v33, v41, s3
	v_cndmask_b32_e64 v32, v32, v42, s5
	v_cndmask_b32_e64 v31, v31, v41, s5
	v_cndmask_b32_e64 v30, v30, v42, s6
	v_cndmask_b32_e64 v29, v29, v41, s6
	v_cndmask_b32_e64 v28, v28, v42, s7
	v_cndmask_b32_e64 v27, v27, v41, s7
	v_mul_f64 v[41:42], v[39:40], v[39:40]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[52:53], v[41:42], 0.5
	v_fma_f64 v[62:63], v[41:42], s[54:55], s[52:53]
	v_add_f64 v[58:59], -v[52:53], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[62:63], v[41:42], v[62:63], s[56:57]
	v_add_f64 v[60:61], -v[58:59], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[62:63], v[41:42], v[62:63], s[58:59]
	v_add_f64 v[52:53], v[60:61], -v[52:53]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[62:63], v[41:42], v[62:63], s[60:61]
	v_mul_f64 v[60:61], v[41:42], v[41:42]
	v_fma_f64 v[52:53], v[39:40], -v[54:55], v[52:53]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[62:63], v[41:42], v[62:63], s[74:75]
	v_fma_f64 v[52:53], v[60:61], v[62:63], v[52:53]
	v_mul_f64 v[60:61], v[39:40], -v[41:42]
	v_mul_f64 v[62:63], v[54:55], 0.5
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[52:53], v[58:59], v[52:53]
	v_fma_f64 v[58:59], v[41:42], s[64:65], s[62:63]
	v_fma_f64 v[58:59], v[41:42], v[58:59], s[66:67]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[58:59], v[41:42], v[58:59], s[68:69]
	v_fma_f64 v[58:59], v[41:42], v[58:59], s[70:71]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[58:59], v[60:61], v[58:59], v[62:63]
	v_fma_f64 v[41:42], v[41:42], v[58:59], -v[54:55]
	v_dual_mov_b32 v59, v51 :: v_dual_mov_b32 v58, v50
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[41:42], v[60:61], s[76:77], v[41:42]
	v_add_f64 v[39:40], v[39:40], -v[41:42]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v37, v52, v39, s8
	v_cndmask_b32_e64 v39, v53, v40, s8
	v_lshlrev_b32_e32 v40, 30, v67
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v37, 0, v37, s4
	v_xor_b32_e32 v38, v40, v38
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v38, 0x80000000, v38
	v_xor_b32_e32 v38, v39, v38
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v38, 0x7ff80000, v38, s4
	v_mul_f64 v[37:38], v[56:57], v[37:38]
	v_dual_mov_b32 v57, v49 :: v_dual_mov_b32 v56, v48
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v26, v26, v38, s2
	v_cndmask_b32_e64 v25, v25, v37, s2
	v_cndmask_b32_e64 v24, v24, v38, s3
	v_cndmask_b32_e64 v23, v23, v37, s3
	v_cndmask_b32_e64 v22, v22, v38, s5
	v_cndmask_b32_e64 v21, v21, v37, s5
	v_cndmask_b32_e64 v20, v20, v38, s6
	v_cndmask_b32_e64 v19, v19, v37, s6
	v_cndmask_b32_e64 v18, v18, v38, s7
	v_cndmask_b32_e64 v17, v17, v37, s7
	s_cbranch_scc1 .LBB2_217
; %bb.226:                              ; %.lr.ph.i.i.3.i.i.preheader
                                        ;   in Loop: Header=BB2_216 Depth=1
	v_mov_b32_e32 v37, 0
	v_mov_b32_e32 v38, 0
	s_mov_b32 s6, 0
.LBB2_227:                              ; %.lr.ph.i.i.3.i.i
                                        ;   Parent Loop BB2_216 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB2_228 Depth 3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s6, 1
	s_mov_b32 s7, s6
	s_cselect_b32 s2, -1, 0
	s_cmp_eq_u32 s6, 2
	v_cndmask_b32_e64 v39, v28, v30, s2
	v_cndmask_b32_e64 v40, v27, v29, s2
	v_cndmask_b32_e64 v41, v18, v20, s2
	v_cndmask_b32_e64 v42, v17, v19, s2
	s_cselect_b32 s2, -1, 0
	s_cmp_eq_u32 s6, 3
	v_cndmask_b32_e64 v39, v39, v32, s2
	v_cndmask_b32_e64 v40, v40, v31, s2
	v_cndmask_b32_e64 v41, v41, v22, s2
	v_cndmask_b32_e64 v42, v42, v21, s2
	s_cselect_b32 s2, -1, 0
	s_cmp_eq_u32 s6, 4
	v_cndmask_b32_e64 v39, v39, v34, s2
	v_cndmask_b32_e64 v52, v40, v33, s2
	v_cndmask_b32_e64 v41, v41, v24, s2
	v_cndmask_b32_e64 v53, v42, v23, s2
	s_cselect_b32 s2, -1, 0
	s_delay_alu instid0(SALU_CYCLE_1)
	v_cndmask_b32_e64 v40, v39, v36, s2
	v_cndmask_b32_e64 v39, v52, v35, s2
	v_cndmask_b32_e64 v42, v41, v26, s2
	v_cndmask_b32_e64 v41, v53, v25, s2
.LBB2_228:                              ;   Parent Loop BB2_216 Depth=1
                                        ;     Parent Loop BB2_227 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_add_i32 s7, s7, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s7, 1
	s_cselect_b32 s2, -1, 0
	s_cmp_eq_u32 s7, 2
	v_cndmask_b32_e64 v53, v18, v20, s2
	v_cndmask_b32_e64 v54, v17, v19, s2
	s_cselect_b32 s3, -1, 0
	s_cmp_eq_u32 s7, 3
	v_cndmask_b32_e64 v52, v28, v30, s2
	v_cndmask_b32_e64 v53, v53, v22, s3
	v_cndmask_b32_e64 v54, v54, v21, s3
	s_cselect_b32 s4, -1, 0
	s_cmp_eq_u32 s7, 4
	v_cndmask_b32_e64 v52, v52, v32, s3
	v_cndmask_b32_e64 v55, v53, v24, s4
	v_cndmask_b32_e64 v54, v54, v23, s4
	s_cselect_b32 s5, -1, 0
	s_cmp_lt_u32 s7, 4
	v_cndmask_b32_e64 v52, v52, v34, s4
	v_cndmask_b32_e64 v55, v55, v26, s5
	v_cndmask_b32_e64 v54, v54, v25, s5
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v53, v52, v36, s5
	v_cndmask_b32_e64 v52, v27, v29, s2
	v_add_f64 v[54:55], v[41:42], -v[54:55]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v52, v52, v31, s3
	v_cndmask_b32_e64 v52, v52, v33, s4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v52, v52, v35, s5
	v_add_f64 v[52:53], v[39:40], -v[52:53]
	v_mul_f64 v[54:55], v[54:55], v[54:55]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[52:53], v[52:53], v[52:53], v[54:55]
	v_cmp_lt_f64_e64 s2, v[37:38], v[52:53]
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e64 v38, v38, v53, s2
	v_cndmask_b32_e64 v37, v37, v52, s2
	s_cbranch_scc1 .LBB2_228
; %bb.229:                              ; %.loopexit.i.i.3.i.i
                                        ;   in Loop: Header=BB2_227 Depth=2
	s_add_i32 s6, s6, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s6, 4
	s_cbranch_scc1 .LBB2_227
; %bb.230:                              ;   in Loop: Header=BB2_216 Depth=1
	v_cmp_gt_f64_e64 s2, 0x10000000, v[37:38]
	s_add_i32 s79, s79, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_cmp_lg_u32 s79, 0x10000
	v_cndmask_b32_e64 v39, 0, 1, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v39, 8, v39
	v_ldexp_f64 v[37:38], v[37:38], v39
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_rsq_f64_e32 v[39:40], v[37:38]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[41:42], v[37:38], v[39:40]
	v_mul_f64 v[39:40], v[39:40], 0.5
	v_fma_f64 v[52:53], -v[39:40], v[41:42], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[41:42], v[41:42], v[52:53], v[41:42]
	v_fma_f64 v[39:40], v[39:40], v[52:53], v[39:40]
	v_fma_f64 v[52:53], -v[41:42], v[41:42], v[37:38]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[41:42], v[52:53], v[39:40], v[41:42]
	v_fma_f64 v[52:53], -v[41:42], v[41:42], v[37:38]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[39:40], v[52:53], v[39:40], v[41:42]
	v_cndmask_b32_e64 v41, 0, 0xffffff80, s2
	v_cmp_class_f64_e64 s2, v[37:38], 0x260
	v_ldexp_f64 v[39:40], v[39:40], v41
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v38, v40, v38, s2
	v_cndmask_b32_e64 v37, v39, v37, s2
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[45:46], v[45:46], v[37:38]
	s_cbranch_scc1 .LBB2_216
; %bb.231:                              ; %_ZNK6thrust11hip_rocprim26transform_input_iterator_tIdNS_17counting_iteratorIjNS_11use_defaultES3_S3_EE11estimate_esEixEl.exit.3.i.i
	s_delay_alu instid0(VALU_DEP_1)
	v_ldexp_f64 v[7:8], v[45:46], -16
.LBB2_232:                              ; %Flow1222
	s_or_b32 exec_lo, exec_lo, s78
	v_or_b32_e32 v17, 0x400, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s2, s33, v17
	s_and_saveexec_b32 s80, s2
	s_cbranch_execz .LBB2_252
; %bb.233:
	s_movk_i32 s3, 0x1001
	s_mov_b64 s[8:9], 0
	v_mad_u64_u32 v[9:10], null, v66, s3, 0x7f156116
                                        ; implicit-def: $vgpr48_vgpr49
                                        ; implicit-def: $vgpr43_vgpr44
                                        ; implicit-def: $vgpr50_vgpr51
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v10, 19, v9
	v_xor3_b32 v9, v9, v10, 0xc761c23c
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v9, v9, 5, v9
	v_add_nc_u32_e32 v10, 0xe9f8cc1d, v9
	v_lshl_add_u32 v9, v9, 9, 0xaccf6200
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v9, v10, v9
	v_lshlrev_b32_e32 v10, 3, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v9, v9, v10, 0xfd7046c5
	v_lshrrev_b32_e32 v10, 16, v9
	s_delay_alu instid0(VALU_DEP_1)
	v_xor3_b32 v17, v9, v10, 0xb55a4f09
                                        ; implicit-def: $vgpr9_vgpr10
.LBB2_234:                              ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v18, 12, v17
	s_cmp_eq_u32 s8, 0
	s_cselect_b32 s3, -1, 0
	s_cmp_eq_u32 s8, 1
	v_add3_u32 v17, v17, v18, 0x7ed55d16
	s_cselect_b32 s4, -1, 0
	s_cmp_eq_u32 s8, 2
	s_cselect_b32 s5, -1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v18, 19, v17
	s_cmp_eq_u32 s8, 3
	s_cselect_b32 s6, -1, 0
	s_add_u32 s8, s8, 1
	v_xor3_b32 v17, v17, v18, 0xc761c23c
	s_addc_u32 s9, s9, 0
	s_cmp_lg_u32 s8, 4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v17, v17, 5, v17
	v_add_nc_u32_e32 v18, 0xe9f8cc1d, v17
	v_lshl_add_u32 v17, v17, 9, 0xaccf6200
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v17, v18, v17
	v_lshlrev_b32_e32 v18, 3, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v17, v17, v18, 0xfd7046c5
	v_lshrrev_b32_e32 v18, 16, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor3_b32 v17, v17, v18, 0xb55a4f09
	v_lshlrev_b32_e32 v19, 12, v17
	v_xor_b32_e32 v18, s23, v17
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add3_u32 v17, v17, v19, 0x7ed55d16
	v_cndmask_b32_e64 v49, v49, v18, s3
	v_cndmask_b32_e64 v10, v10, v18, s4
	v_cndmask_b32_e64 v44, v44, v18, s5
	v_cndmask_b32_e64 v51, v51, v18, s6
	v_lshrrev_b32_e32 v19, 19, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor3_b32 v17, v17, v19, 0xc761c23c
	v_lshl_add_u32 v17, v17, 5, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v19, 0xe9f8cc1d, v17
	v_lshl_add_u32 v17, v17, 9, 0xaccf6200
	v_xor_b32_e32 v17, v19, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v19, 3, v17
	v_add3_u32 v17, v17, v19, 0xfd7046c5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v19, 16, v17
	v_xor3_b32 v17, v17, v19, 0xb55a4f09
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v18, s22, v17
	v_cndmask_b32_e64 v48, v48, v18, s3
	v_cndmask_b32_e64 v9, v9, v18, s4
	v_cndmask_b32_e64 v43, v43, v18, s5
	v_cndmask_b32_e64 v50, v50, v18, s6
	s_cbranch_scc1 .LBB2_234
; %bb.235:                              ; %.preheader55.i.i.4.i.i.preheader
	v_mov_b32_e32 v45, 0
	v_dual_mov_b32 v46, 0 :: v_dual_mov_b32 v47, 0
	s_mov_b32 s10, 0x54442d18
	s_mov_b32 s24, 0x33145c07
	s_mov_b32 s26, 0x6dc9c883
	s_mov_b32 s30, 0x33145c00
	s_mov_b32 s34, 0x252049c0
	s_mov_b32 s36, 0x55555555
	s_mov_b32 s38, 0x6b47b09a
	s_mov_b32 s40, 0xbf559e2b
	s_mov_b32 s42, 0xd7f4df2e
	s_mov_b32 s44, 0x16291751
	s_mov_b32 s46, 0x9b27acf1
	s_mov_b32 s48, 0x998ef7b6
	s_mov_b32 s50, 0xfefa39ef
	s_mov_b32 s52, 0x3b39803f
	s_mov_b32 s54, 0x9037ab78
	s_mov_b32 s56, 0x46cc5e42
	s_mov_b32 s58, 0xa17f65f6
	s_mov_b32 s60, 0x19f4ec90
	s_mov_b32 s62, 0x16c16967
	s_mov_b32 s64, 0xb42fdfa7
	s_mov_b32 s66, 0xf9a43bb8
	s_mov_b32 s68, 0x796cde01
	s_mov_b32 s70, 0x19e83e5c
	s_mov_b32 s72, 0x11110bb3
	s_mov_b32 s81, 0
	s_mov_b32 s11, 0x401921fb
	s_mov_b32 s13, 0x3ff921fb
	s_mov_b32 s25, 0x3c91a626
	s_mov_b32 s27, 0x3fe45f30
	s_mov_b32 s29, 0xbff921fb
	s_mov_b32 s31, 0xbc91a626
	s_mov_b32 s35, 0xb97b839a
	s_mov_b32 s37, 0x3fe55555
	s_mov_b32 s39, 0x3fc38538
	s_mov_b32 s41, 0x3fc3ab76
	s_mov_b32 s43, 0x3fc7474d
	s_mov_b32 s45, 0x3fcc71c0
	s_mov_b32 s47, 0x3fd24924
	s_mov_b32 s49, 0x3fd99999
	s_mov_b32 s51, 0x3fe62e42
	s_mov_b32 s53, 0x3c7abc9e
	s_mov_b32 s55, 0x3e21eeb6
	s_mov_b32 s57, 0xbda907db
	s_mov_b32 s59, 0xbe927e4f
	s_mov_b32 s61, 0x3efa01a0
	s_mov_b32 s63, 0xbf56c16c
	s_mov_b32 s65, 0xbe5ae600
	s_mov_b32 s67, 0x3de5e0b2
	s_mov_b32 s69, 0x3ec71de3
	s_mov_b32 s71, 0xbf2a01a0
	s_mov_b32 s73, 0x3f811111
	s_mov_b32 s74, 0x55555780
	s_mov_b32 s77, 0x3fa55555
	s_mov_b32 s79, 0xbfc55555
                                        ; implicit-def: $vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31_vgpr32
                                        ; implicit-def: $vgpr27_vgpr28_vgpr29_vgpr30_vgpr31_vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42
.LBB2_236:                              ; %.preheader55.i.i.4.i.i
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB2_237 Depth 2
                                        ;     Child Loop BB2_247 Depth 2
                                        ;       Child Loop BB2_248 Depth 3
	v_dual_mov_b32 v57, v49 :: v_dual_mov_b32 v56, v48
	v_dual_mov_b32 v59, v51 :: v_dual_mov_b32 v58, v50
	s_mov_b32 s82, 0
.LBB2_237:                              ;   Parent Loop BB2_236 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v38, v10, v59
	v_xor_b32_e32 v37, v9, v58
                                        ; implicit-def: $vgpr68
                                        ; implicit-def: $vgpr52_vgpr53
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v70, v38, v57
	v_lshrrev_b64 v[49:50], 19, v[37:38]
	v_lshlrev_b32_e32 v39, 13, v37
	v_xor_b32_e32 v69, v37, v56
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_or_b32_e32 v71, v39, v50
	v_add_co_u32 v37, s3, v49, v69
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v38, s3, v71, v70, s3
	v_lshrrev_b64 v[37:38], 11, v[37:38]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_u32_e32 v[38:39], v38
	v_cvt_f64_u32_e32 v[40:41], v37
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[37:38], v[38:39], 32
	v_add_f64 v[37:38], v[37:38], v[40:41]
                                        ; implicit-def: $vgpr41_vgpr42
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[37:38], v[37:38], 0xffffffcb
	v_mul_f64 v[37:38], v[37:38], s[10:11]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ngt_f64_e64 s3, 0x41d00000, v[37:38]
	v_trig_preop_f64 v[62:63], v[37:38], 0
	v_trig_preop_f64 v[60:61], v[37:38], 1
	v_ldexp_f64 v[64:65], v[37:38], 0xffffff80
	v_trig_preop_f64 v[50:51], v[37:38], 2
	s_and_saveexec_b32 s4, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s6, exec_lo, s4
	s_cbranch_execz .LBB2_239
; %bb.238:                              ;   in Loop: Header=BB2_237 Depth=2
	v_cmp_le_f64_e64 s4, 0x7b000000, v[37:38]
	s_mov_b32 s12, s10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v40, v38, v65, s4
	v_cndmask_b32_e64 v39, v37, v64, s4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_f64 v[41:42], v[62:63], v[39:40]
	v_mul_f64 v[52:53], v[60:61], v[39:40]
	v_mul_f64 v[78:79], v[50:51], v[39:40]
	v_fma_f64 v[54:55], v[62:63], v[39:40], -v[41:42]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[80:81], v[60:61], v[39:40], -v[52:53]
	v_fma_f64 v[39:40], v[50:51], v[39:40], -v[78:79]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[67:68], v[52:53], v[54:55]
	v_add_f64 v[72:73], v[67:68], -v[52:53]
	v_add_f64 v[76:77], v[41:42], v[67:68]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[74:75], v[67:68], -v[72:73]
	v_add_f64 v[54:55], v[54:55], -v[72:73]
	v_ldexp_f64 v[72:73], v[76:77], -2
	v_add_f64 v[41:42], v[76:77], -v[41:42]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[52:53], v[52:53], -v[74:75]
	v_add_f64 v[74:75], v[78:79], v[80:81]
	v_cmp_neq_f64_e64 s4, 0x7ff00000, |v[72:73]|
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[41:42], v[67:68], -v[41:42]
	v_add_f64 v[52:53], v[54:55], v[52:53]
	v_fract_f64_e32 v[54:55], v[72:73]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[67:68], v[74:75], v[52:53]
	v_cndmask_b32_e64 v55, 0, v55, s4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v54, 0, v54, s4
	v_ldexp_f64 v[54:55], v[54:55], 2
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[72:73], v[41:42], v[67:68]
	v_add_f64 v[82:83], v[67:68], -v[74:75]
	v_add_f64 v[76:77], v[72:73], v[54:55]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[88:89], v[67:68], -v[82:83]
	v_add_f64 v[52:53], v[52:53], -v[82:83]
	v_add_f64 v[41:42], v[72:73], -v[41:42]
	v_cmp_gt_f64_e64 s4, 0, v[76:77]
	v_add_f64 v[76:77], v[74:75], -v[78:79]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[41:42], v[67:68], -v[41:42]
	v_cndmask_b32_e64 v48, 0, 0x40100000, s4
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[86:87], v[74:75], -v[76:77]
	v_add_f64 v[76:77], v[80:81], -v[76:77]
	v_add_f64 v[74:75], v[74:75], -v[88:89]
	v_add_f64 v[54:55], v[54:55], v[47:48]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[80:81], v[78:79], -v[86:87]
	v_add_f64 v[52:53], v[52:53], v[74:75]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[84:85], v[72:73], v[54:55]
	v_add_f64 v[76:77], v[76:77], v[80:81]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_i32_f64_e32 v48, v[84:85]
	v_add_f64 v[52:53], v[76:77], v[52:53]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_i32_e32 v[82:83], v48
	v_add_f64 v[39:40], v[39:40], v[52:53]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[54:55], v[54:55], -v[82:83]
	v_add_f64 v[39:40], v[41:42], v[39:40]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[74:75], v[72:73], v[54:55]
	v_add_f64 v[52:53], v[74:75], -v[54:55]
	v_cmp_le_f64_e64 s4, 0.5, v[74:75]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[41:42], v[72:73], -v[52:53]
	v_add_co_ci_u32_e64 v68, s5, 0, v48, s4
	v_cndmask_b32_e64 v48, 0, 0x3ff00000, s4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[39:40], v[39:40], v[41:42]
	v_add_f64 v[41:42], v[74:75], -v[47:48]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[52:53], v[41:42], v[39:40]
	v_mul_f64 v[54:55], v[52:53], s[12:13]
	v_add_f64 v[41:42], v[52:53], -v[41:42]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[72:73], v[52:53], s[12:13], -v[54:55]
	v_add_f64 v[39:40], v[39:40], -v[41:42]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[41:42], v[52:53], s[24:25], v[72:73]
	v_fma_f64 v[39:40], v[39:40], s[12:13], v[41:42]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[41:42], v[54:55], v[39:40]
	v_add_f64 v[52:53], v[41:42], -v[54:55]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[52:53], v[39:40], -v[52:53]
.LBB2_239:                              ; %Flow1218
                                        ;   in Loop: Header=BB2_237 Depth=2
	s_and_not1_saveexec_b32 s4, s6
	s_cbranch_execz .LBB2_241
; %bb.240:                              ;   in Loop: Header=BB2_237 Depth=2
	v_mul_f64 v[39:40], v[37:38], s[26:27]
	s_mov_b32 s28, s10
	s_mov_b32 s6, s30
	s_mov_b32 s7, s25
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[39:40], v[39:40]
	v_fma_f64 v[41:42], v[39:40], s[28:29], v[37:38]
	v_mul_f64 v[52:53], v[39:40], s[30:31]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[67:68], v[39:40], s[30:31], v[41:42]
	v_add_f64 v[54:55], v[41:42], v[52:53]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[41:42], v[41:42], -v[54:55]
	v_add_f64 v[54:55], v[54:55], -v[67:68]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[41:42], v[41:42], v[52:53]
	v_fma_f64 v[52:53], v[39:40], s[6:7], v[52:53]
	v_add_f64 v[41:42], v[54:55], v[41:42]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[41:42], v[41:42], -v[52:53]
	v_fma_f64 v[52:53], v[39:40], s[34:35], v[41:42]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[41:42], v[67:68], v[52:53]
	v_add_f64 v[54:55], v[41:42], -v[67:68]
	v_cvt_i32_f64_e32 v68, v[39:40]
	s_delay_alu instid0(VALU_DEP_2)
	v_add_f64 v[52:53], v[52:53], -v[54:55]
.LBB2_241:                              ; %_ZL3cosd.exit.i.i.4.i.i
                                        ;   in Loop: Header=BB2_237 Depth=2
	s_or_b32 exec_lo, exec_lo, s4
                                        ; implicit-def: $vgpr67
                                        ; implicit-def: $vgpr39_vgpr40
                                        ; implicit-def: $vgpr54_vgpr55
	s_and_saveexec_b32 s4, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s5, exec_lo, s4
	s_cbranch_execz .LBB2_243
; %bb.242:                              ;   in Loop: Header=BB2_237 Depth=2
	v_cmp_le_f64_e64 s3, 0x7b000000, v[37:38]
	s_mov_b32 s12, s10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v40, v38, v65, s3
	v_cndmask_b32_e64 v39, v37, v64, s3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_f64 v[54:55], v[62:63], v[39:40]
	v_mul_f64 v[64:65], v[60:61], v[39:40]
	v_mul_f64 v[80:81], v[50:51], v[39:40]
	v_fma_f64 v[62:63], v[62:63], v[39:40], -v[54:55]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[60:61], v[60:61], v[39:40], -v[64:65]
	v_fma_f64 v[39:40], v[50:51], v[39:40], -v[80:81]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[72:73], v[64:65], v[62:63]
	v_add_f64 v[74:75], v[72:73], -v[64:65]
	v_add_f64 v[78:79], v[54:55], v[72:73]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[76:77], v[72:73], -v[74:75]
	v_add_f64 v[62:63], v[62:63], -v[74:75]
	v_ldexp_f64 v[74:75], v[78:79], -2
	v_add_f64 v[54:55], v[78:79], -v[54:55]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[64:65], v[64:65], -v[76:77]
	v_add_f64 v[76:77], v[80:81], v[60:61]
	v_cmp_neq_f64_e64 s3, 0x7ff00000, |v[74:75]|
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[54:55], v[72:73], -v[54:55]
	v_add_f64 v[62:63], v[62:63], v[64:65]
	v_fract_f64_e32 v[64:65], v[74:75]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[72:73], v[76:77], v[62:63]
	v_cndmask_b32_e64 v65, 0, v65, s3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v64, 0, v64, s3
	v_ldexp_f64 v[64:65], v[64:65], 2
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[74:75], v[54:55], v[72:73]
	v_add_f64 v[82:83], v[72:73], -v[76:77]
	v_add_f64 v[78:79], v[74:75], v[64:65]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[88:89], v[72:73], -v[82:83]
	v_add_f64 v[62:63], v[62:63], -v[82:83]
	v_add_f64 v[50:51], v[74:75], -v[54:55]
	v_cmp_gt_f64_e64 s3, 0, v[78:79]
	v_add_f64 v[78:79], v[76:77], -v[80:81]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[50:51], v[72:73], -v[50:51]
	v_cndmask_b32_e64 v48, 0, 0x40100000, s3
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[86:87], v[76:77], -v[78:79]
	v_add_f64 v[60:61], v[60:61], -v[78:79]
	v_add_f64 v[76:77], v[76:77], -v[88:89]
	v_add_f64 v[64:65], v[64:65], v[47:48]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[78:79], v[80:81], -v[86:87]
	v_add_f64 v[62:63], v[62:63], v[76:77]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[84:85], v[74:75], v[64:65]
	v_add_f64 v[60:61], v[60:61], v[78:79]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_i32_f64_e32 v48, v[84:85]
	v_add_f64 v[54:55], v[60:61], v[62:63]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_i32_e32 v[82:83], v48
	v_add_f64 v[39:40], v[39:40], v[54:55]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[64:65], v[64:65], -v[82:83]
	v_add_f64 v[39:40], v[50:51], v[39:40]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[60:61], v[74:75], v[64:65]
	v_add_f64 v[54:55], v[60:61], -v[64:65]
	v_cmp_le_f64_e64 s3, 0.5, v[60:61]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[50:51], v[74:75], -v[54:55]
	v_add_co_ci_u32_e64 v67, s4, 0, v48, s3
	v_cndmask_b32_e64 v48, 0, 0x3ff00000, s3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[39:40], v[39:40], v[50:51]
	v_add_f64 v[50:51], v[60:61], -v[47:48]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[54:55], v[50:51], v[39:40]
	v_mul_f64 v[60:61], v[54:55], s[12:13]
	v_add_f64 v[50:51], v[54:55], -v[50:51]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[62:63], v[54:55], s[12:13], -v[60:61]
	v_add_f64 v[39:40], v[39:40], -v[50:51]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[50:51], v[54:55], s[24:25], v[62:63]
	v_fma_f64 v[50:51], v[39:40], s[12:13], v[50:51]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[39:40], v[60:61], v[50:51]
	v_add_f64 v[54:55], v[39:40], -v[60:61]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[54:55], v[50:51], -v[54:55]
.LBB2_243:                              ; %Flow1217
                                        ;   in Loop: Header=BB2_237 Depth=2
	s_and_not1_saveexec_b32 s3, s5
	s_cbranch_execz .LBB2_245
; %bb.244:                              ;   in Loop: Header=BB2_237 Depth=2
	v_mul_f64 v[39:40], v[37:38], s[26:27]
	s_mov_b32 s28, s10
	s_mov_b32 s4, s30
	s_mov_b32 s5, s25
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[50:51], v[39:40]
	v_fma_f64 v[39:40], v[50:51], s[28:29], v[37:38]
	v_mul_f64 v[54:55], v[50:51], s[30:31]
	v_cvt_i32_f64_e32 v67, v[50:51]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[62:63], v[50:51], s[30:31], v[39:40]
	v_add_f64 v[60:61], v[39:40], v[54:55]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[39:40], v[39:40], -v[60:61]
	v_add_f64 v[60:61], v[60:61], -v[62:63]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[39:40], v[39:40], v[54:55]
	v_fma_f64 v[54:55], v[50:51], s[4:5], v[54:55]
	v_add_f64 v[39:40], v[60:61], v[39:40]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[39:40], v[39:40], -v[54:55]
	v_fma_f64 v[54:55], v[50:51], s[34:35], v[39:40]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[39:40], v[62:63], v[54:55]
	v_add_f64 v[60:61], v[39:40], -v[62:63]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[54:55], v[54:55], -v[60:61]
.LBB2_245:                              ; %_ZL3sind.exit.i.i.4.i.i
                                        ;   in Loop: Header=BB2_237 Depth=2
	s_or_b32 exec_lo, exec_lo, s3
	v_xor_b32_e32 v43, v43, v56
	v_add_co_u32 v56, s3, v58, v56
	v_xor_b32_e32 v44, v44, v57
	v_add_co_ci_u32_e64 v57, s3, v59, v57, s3
	v_lshlrev_b64 v[50:51], 17, v[9:10]
	v_xor_b32_e32 v9, v43, v9
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_xor_b32_e32 v10, v44, v10
	v_lshrrev_b64 v[56:57], 11, v[56:57]
	s_mov_b32 s75, s37
	s_mov_b32 s76, s36
	v_xor_b32_e32 v48, v44, v51
	v_xor_b32_e32 v50, v43, v50
	v_lshlrev_b64 v[43:44], 17, v[9:10]
	v_cvt_f64_u32_e32 v[57:58], v57
	v_xor_b32_e32 v61, v10, v71
	v_xor_b32_e32 v51, v48, v70
	v_xor_b32_e32 v50, v50, v69
	v_xor_b32_e32 v60, v9, v49
	s_mov_b32 s78, s36
	v_xor_b32_e32 v49, v61, v70
	v_xor_b32_e32 v10, v51, v10
	v_xor_b32_e32 v9, v50, v9
	v_xor_b32_e32 v44, v51, v44
	v_xor_b32_e32 v43, v50, v43
	v_lshrrev_b64 v[50:51], 19, v[60:61]
	v_xor_b32_e32 v48, v60, v69
	v_lshlrev_b32_e32 v60, 13, v60
	v_cmp_lg_f64_e64 s5, 0x7ff00000, v[37:38]
	s_cmp_eq_u32 s82, 4
	v_and_b32_e32 v37, 1, v67
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_or_b32_e32 v51, v60, v51
	v_cvt_f64_u32_e32 v[59:60], v56
	v_cmp_eq_u32_e64 s9, 0, v37
	v_ldexp_f64 v[57:58], v[57:58], 32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[56:57], v[57:58], v[59:60]
	v_ldexp_f64 v[56:57], v[56:57], 0xffffffcb
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_frexp_mant_f64_e32 v[58:59], v[56:57]
	v_cmp_gt_f64_e64 s3, s[36:37], v[58:59]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v60, 0, 1, s3
	v_ldexp_f64 v[58:59], v[58:59], v60
	v_frexp_exp_i32_f64_e32 v60, v[56:57]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[62:63], v[58:59], 1.0
	v_subrev_co_ci_u32_e64 v75, s3, 0, v60, s3
	v_add_f64 v[60:61], v[58:59], -1.0
	v_cmp_eq_f64_e64 s3, 0x7ff00000, v[56:57]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[64:65], v[62:63], -1.0
	v_add_f64 v[58:59], v[58:59], -v[64:65]
	v_rcp_f64_e32 v[64:65], v[62:63]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[69:70], -v[62:63], v[64:65], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[64:65], v[69:70], v[64:65], v[64:65]
	v_fma_f64 v[69:70], -v[62:63], v[64:65], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[64:65], v[69:70], v[64:65], v[64:65]
	v_mul_f64 v[69:70], v[60:61], v[64:65]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[71:72], v[62:63], v[69:70]
	v_fma_f64 v[62:63], v[69:70], v[62:63], -v[71:72]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[58:59], v[69:70], v[58:59], v[62:63]
	v_add_f64 v[62:63], v[71:72], v[58:59]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[73:74], v[60:61], -v[62:63]
	v_add_f64 v[71:72], v[62:63], -v[71:72]
	v_add_f64 v[60:61], v[60:61], -v[73:74]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[58:59], v[71:72], -v[58:59]
	v_add_f64 v[60:61], v[60:61], -v[62:63]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[58:59], v[58:59], v[60:61]
	v_add_f64 v[58:59], v[73:74], v[58:59]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[58:59], v[64:65], v[58:59]
	v_add_f64 v[60:61], v[69:70], v[58:59]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[62:63], v[60:61], -v[69:70]
	v_ldexp_f64 v[69:70], v[60:61], 1
	v_add_f64 v[58:59], v[58:59], -v[62:63]
	v_mul_f64 v[62:63], v[60:61], v[60:61]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[58:59], v[58:59], 1
	v_fma_f64 v[64:65], v[62:63], s[40:41], s[38:39]
	v_mul_f64 v[60:61], v[60:61], v[62:63]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[64:65], v[62:63], v[64:65], s[42:43]
	v_fma_f64 v[64:65], v[62:63], v[64:65], s[44:45]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[64:65], v[62:63], v[64:65], s[46:47]
	v_fma_f64 v[64:65], v[62:63], v[64:65], s[48:49]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[64:65], v[62:63], v[64:65], s[74:75]
	v_mul_f64 v[60:61], v[60:61], v[64:65]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[62:63], v[69:70], v[60:61]
	v_add_f64 v[64:65], v[62:63], -v[69:70]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[60:61], v[60:61], -v[64:65]
	v_add_f64 v[58:59], v[58:59], v[60:61]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[60:61], v[62:63], v[58:59]
	v_add_f64 v[62:63], v[60:61], -v[62:63]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[58:59], v[58:59], -v[62:63]
	v_cvt_f64_i32_e32 v[62:63], v75
	v_mul_f64 v[64:65], v[62:63], s[50:51]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[69:70], v[62:63], s[50:51], -v[64:65]
	v_fma_f64 v[62:63], v[62:63], s[52:53], v[69:70]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[69:70], v[64:65], v[62:63]
	v_add_f64 v[64:65], v[69:70], -v[64:65]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[62:63], v[62:63], -v[64:65]
	v_add_f64 v[64:65], v[69:70], v[60:61]
	v_add_f64 v[71:72], v[64:65], -v[69:70]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[73:74], v[64:65], -v[71:72]
	v_add_f64 v[60:61], v[60:61], -v[71:72]
	v_add_f64 v[69:70], v[69:70], -v[73:74]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[60:61], v[60:61], v[69:70]
	v_add_f64 v[69:70], v[62:63], v[58:59]
	v_add_f64 v[71:72], v[69:70], -v[62:63]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[60:61], v[69:70], v[60:61]
	v_add_f64 v[73:74], v[69:70], -v[71:72]
	v_add_f64 v[58:59], v[58:59], -v[71:72]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[62:63], v[62:63], -v[73:74]
	v_add_f64 v[58:59], v[58:59], v[62:63]
	v_add_f64 v[62:63], v[64:65], v[60:61]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[64:65], v[62:63], -v[64:65]
	v_add_f64 v[60:61], v[60:61], -v[64:65]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[58:59], v[58:59], v[60:61]
	v_add_f64 v[58:59], v[62:63], v[58:59]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v59, v59, v57, s3
	v_cndmask_b32_e64 v58, v58, v56, s3
	v_cmp_ngt_f64_e64 s3, 0, v[56:57]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[58:59], v[58:59], -2.0
	v_cndmask_b32_e64 v59, 0x7ff80000, v59, s3
	v_cmp_nge_f64_e64 s3, 0, v[56:57]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v58, 0, v58, s3
	v_cmp_neq_f64_e64 s3, 0, v[56:57]
	v_cndmask_b32_e64 v59, 0x7ff00000, v59, s3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_f64_e64 s3, 0x10000000, v[58:59]
	v_cndmask_b32_e64 v56, 0, 1, s3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v56, 8, v56
	v_ldexp_f64 v[56:57], v[58:59], v56
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_rsq_f64_e32 v[58:59], v[56:57]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[60:61], v[56:57], v[58:59]
	v_mul_f64 v[58:59], v[58:59], 0.5
	v_fma_f64 v[62:63], -v[58:59], v[60:61], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[60:61], v[60:61], v[62:63], v[60:61]
	v_fma_f64 v[58:59], v[58:59], v[62:63], v[58:59]
	v_fma_f64 v[64:65], -v[60:61], v[60:61], v[56:57]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[60:61], v[64:65], v[58:59], v[60:61]
	v_fma_f64 v[62:63], -v[60:61], v[60:61], v[56:57]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[58:59], v[62:63], v[58:59], v[60:61]
	v_cndmask_b32_e64 v60, 0, 0xffffff80, s3
	v_cmp_class_f64_e64 s3, v[56:57], 0x260
	v_ldexp_f64 v[58:59], v[58:59], v60
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v57, v59, v57, s3
	v_cndmask_b32_e64 v56, v58, v56, s3
	v_mul_f64 v[58:59], v[41:42], v[41:42]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[60:61], v[58:59], 0.5
	v_fma_f64 v[69:70], v[58:59], s[56:57], s[54:55]
	v_add_f64 v[62:63], -v[60:61], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[69:70], v[58:59], v[69:70], s[58:59]
	v_add_f64 v[64:65], -v[62:63], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[69:70], v[58:59], v[69:70], s[60:61]
	v_add_f64 v[60:61], v[64:65], -v[60:61]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[69:70], v[58:59], v[69:70], s[62:63]
	v_mul_f64 v[64:65], v[58:59], v[58:59]
	v_fma_f64 v[60:61], v[41:42], -v[52:53], v[60:61]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[69:70], v[58:59], v[69:70], s[76:77]
	v_fma_f64 v[60:61], v[64:65], v[69:70], v[60:61]
	v_mul_f64 v[64:65], v[41:42], -v[58:59]
	v_mul_f64 v[69:70], v[52:53], 0.5
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[60:61], v[62:63], v[60:61]
	v_fma_f64 v[62:63], v[58:59], s[66:67], s[64:65]
	v_fma_f64 v[62:63], v[58:59], v[62:63], s[68:69]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[62:63], v[58:59], v[62:63], s[70:71]
	v_fma_f64 v[62:63], v[58:59], v[62:63], s[72:73]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[62:63], v[64:65], v[62:63], v[69:70]
	v_fma_f64 v[52:53], v[58:59], v[62:63], -v[52:53]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[52:53], v[64:65], s[78:79], v[52:53]
	v_add_f64 v[41:42], v[41:42], -v[52:53]
	v_and_b32_e32 v52, 1, v68
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s3, 0, v52
	v_lshlrev_b32_e32 v52, 30, v68
	v_and_b32_e32 v52, 0x80000000, v52
	v_xor_b32_e32 v42, 0x80000000, v42
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v41, v41, v60, s3
	v_cndmask_b32_e64 v42, v42, v61, s3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v41, 0, v41, s5
	s_cselect_b32 s3, -1, 0
	s_cmp_eq_u32 s82, 3
	v_xor_b32_e32 v42, v42, v52
	s_cselect_b32 s4, -1, 0
	s_cmp_eq_u32 s82, 2
	s_cselect_b32 s6, -1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v42, 0x7ff80000, v42, s5
	s_cmp_eq_u32 s82, 1
	s_cselect_b32 s7, -1, 0
	s_cmp_eq_u32 s82, 0
	v_mul_f64 v[41:42], v[56:57], v[41:42]
	s_cselect_b32 s8, -1, 0
	s_add_i32 s82, s82, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_cmp_lg_u32 s82, 5
	v_cndmask_b32_e64 v36, v36, v42, s3
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e64 v35, v35, v41, s3
	v_cndmask_b32_e64 v34, v34, v42, s4
	v_cndmask_b32_e64 v33, v33, v41, s4
	v_cndmask_b32_e64 v32, v32, v42, s6
	v_cndmask_b32_e64 v31, v31, v41, s6
	v_cndmask_b32_e64 v30, v30, v42, s7
	v_cndmask_b32_e64 v29, v29, v41, s7
	v_cndmask_b32_e64 v28, v28, v42, s8
	v_cndmask_b32_e64 v27, v27, v41, s8
	v_mul_f64 v[41:42], v[39:40], v[39:40]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[52:53], v[41:42], 0.5
	v_fma_f64 v[62:63], v[41:42], s[56:57], s[54:55]
	v_add_f64 v[58:59], -v[52:53], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[62:63], v[41:42], v[62:63], s[58:59]
	v_add_f64 v[60:61], -v[58:59], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[62:63], v[41:42], v[62:63], s[60:61]
	v_add_f64 v[52:53], v[60:61], -v[52:53]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[62:63], v[41:42], v[62:63], s[62:63]
	v_mul_f64 v[60:61], v[41:42], v[41:42]
	v_fma_f64 v[52:53], v[39:40], -v[54:55], v[52:53]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[62:63], v[41:42], v[62:63], s[76:77]
	v_fma_f64 v[52:53], v[60:61], v[62:63], v[52:53]
	v_mul_f64 v[60:61], v[39:40], -v[41:42]
	v_mul_f64 v[62:63], v[54:55], 0.5
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[52:53], v[58:59], v[52:53]
	v_fma_f64 v[58:59], v[41:42], s[66:67], s[64:65]
	v_fma_f64 v[58:59], v[41:42], v[58:59], s[68:69]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[58:59], v[41:42], v[58:59], s[70:71]
	v_fma_f64 v[58:59], v[41:42], v[58:59], s[72:73]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[58:59], v[60:61], v[58:59], v[62:63]
	v_fma_f64 v[41:42], v[41:42], v[58:59], -v[54:55]
	v_dual_mov_b32 v59, v51 :: v_dual_mov_b32 v58, v50
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[41:42], v[60:61], s[78:79], v[41:42]
	v_add_f64 v[39:40], v[39:40], -v[41:42]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v37, v52, v39, s9
	v_cndmask_b32_e64 v39, v53, v40, s9
	v_lshlrev_b32_e32 v40, 30, v67
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v37, 0, v37, s5
	v_xor_b32_e32 v38, v40, v38
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v38, 0x80000000, v38
	v_xor_b32_e32 v38, v39, v38
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v38, 0x7ff80000, v38, s5
	v_mul_f64 v[37:38], v[56:57], v[37:38]
	v_dual_mov_b32 v57, v49 :: v_dual_mov_b32 v56, v48
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v26, v26, v38, s3
	v_cndmask_b32_e64 v25, v25, v37, s3
	v_cndmask_b32_e64 v24, v24, v38, s4
	v_cndmask_b32_e64 v23, v23, v37, s4
	v_cndmask_b32_e64 v22, v22, v38, s6
	v_cndmask_b32_e64 v21, v21, v37, s6
	v_cndmask_b32_e64 v20, v20, v38, s7
	v_cndmask_b32_e64 v19, v19, v37, s7
	v_cndmask_b32_e64 v18, v18, v38, s8
	v_cndmask_b32_e64 v17, v17, v37, s8
	s_cbranch_scc1 .LBB2_237
; %bb.246:                              ; %.lr.ph.i.i.4.i.i.preheader
                                        ;   in Loop: Header=BB2_236 Depth=1
	v_mov_b32_e32 v37, 0
	v_mov_b32_e32 v38, 0
	s_mov_b32 s7, 0
.LBB2_247:                              ; %.lr.ph.i.i.4.i.i
                                        ;   Parent Loop BB2_236 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB2_248 Depth 3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s7, 1
	s_mov_b32 s8, s7
	s_cselect_b32 s3, -1, 0
	s_cmp_eq_u32 s7, 2
	v_cndmask_b32_e64 v39, v28, v30, s3
	v_cndmask_b32_e64 v40, v27, v29, s3
	v_cndmask_b32_e64 v41, v18, v20, s3
	v_cndmask_b32_e64 v42, v17, v19, s3
	s_cselect_b32 s3, -1, 0
	s_cmp_eq_u32 s7, 3
	v_cndmask_b32_e64 v39, v39, v32, s3
	v_cndmask_b32_e64 v40, v40, v31, s3
	v_cndmask_b32_e64 v41, v41, v22, s3
	v_cndmask_b32_e64 v42, v42, v21, s3
	s_cselect_b32 s3, -1, 0
	s_cmp_eq_u32 s7, 4
	v_cndmask_b32_e64 v39, v39, v34, s3
	v_cndmask_b32_e64 v52, v40, v33, s3
	v_cndmask_b32_e64 v41, v41, v24, s3
	v_cndmask_b32_e64 v53, v42, v23, s3
	s_cselect_b32 s3, -1, 0
	s_delay_alu instid0(SALU_CYCLE_1)
	v_cndmask_b32_e64 v40, v39, v36, s3
	v_cndmask_b32_e64 v39, v52, v35, s3
	v_cndmask_b32_e64 v42, v41, v26, s3
	v_cndmask_b32_e64 v41, v53, v25, s3
.LBB2_248:                              ;   Parent Loop BB2_236 Depth=1
                                        ;     Parent Loop BB2_247 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_add_i32 s8, s8, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s8, 1
	s_cselect_b32 s3, -1, 0
	s_cmp_eq_u32 s8, 2
	v_cndmask_b32_e64 v53, v18, v20, s3
	v_cndmask_b32_e64 v54, v17, v19, s3
	s_cselect_b32 s4, -1, 0
	s_cmp_eq_u32 s8, 3
	v_cndmask_b32_e64 v52, v28, v30, s3
	v_cndmask_b32_e64 v53, v53, v22, s4
	v_cndmask_b32_e64 v54, v54, v21, s4
	s_cselect_b32 s5, -1, 0
	s_cmp_eq_u32 s8, 4
	v_cndmask_b32_e64 v52, v52, v32, s4
	v_cndmask_b32_e64 v55, v53, v24, s5
	v_cndmask_b32_e64 v54, v54, v23, s5
	s_cselect_b32 s6, -1, 0
	s_cmp_lt_u32 s8, 4
	v_cndmask_b32_e64 v52, v52, v34, s5
	v_cndmask_b32_e64 v55, v55, v26, s6
	v_cndmask_b32_e64 v54, v54, v25, s6
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v53, v52, v36, s6
	v_cndmask_b32_e64 v52, v27, v29, s3
	v_add_f64 v[54:55], v[41:42], -v[54:55]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v52, v52, v31, s4
	v_cndmask_b32_e64 v52, v52, v33, s5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v52, v52, v35, s6
	v_add_f64 v[52:53], v[39:40], -v[52:53]
	v_mul_f64 v[54:55], v[54:55], v[54:55]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[52:53], v[52:53], v[52:53], v[54:55]
	v_cmp_lt_f64_e64 s3, v[37:38], v[52:53]
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e64 v38, v38, v53, s3
	v_cndmask_b32_e64 v37, v37, v52, s3
	s_cbranch_scc1 .LBB2_248
; %bb.249:                              ; %.loopexit.i.i.4.i.i
                                        ;   in Loop: Header=BB2_247 Depth=2
	s_add_i32 s7, s7, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s7, 4
	s_cbranch_scc1 .LBB2_247
; %bb.250:                              ;   in Loop: Header=BB2_236 Depth=1
	v_cmp_gt_f64_e64 s3, 0x10000000, v[37:38]
	s_add_i32 s81, s81, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_cmp_lg_u32 s81, 0x10000
	v_cndmask_b32_e64 v39, 0, 1, s3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v39, 8, v39
	v_ldexp_f64 v[37:38], v[37:38], v39
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_rsq_f64_e32 v[39:40], v[37:38]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[41:42], v[37:38], v[39:40]
	v_mul_f64 v[39:40], v[39:40], 0.5
	v_fma_f64 v[52:53], -v[39:40], v[41:42], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[41:42], v[41:42], v[52:53], v[41:42]
	v_fma_f64 v[39:40], v[39:40], v[52:53], v[39:40]
	v_fma_f64 v[52:53], -v[41:42], v[41:42], v[37:38]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[41:42], v[52:53], v[39:40], v[41:42]
	v_fma_f64 v[52:53], -v[41:42], v[41:42], v[37:38]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[39:40], v[52:53], v[39:40], v[41:42]
	v_cndmask_b32_e64 v41, 0, 0xffffff80, s3
	v_cmp_class_f64_e64 s3, v[37:38], 0x260
	v_ldexp_f64 v[39:40], v[39:40], v41
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v38, v40, v38, s3
	v_cndmask_b32_e64 v37, v39, v37, s3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[45:46], v[45:46], v[37:38]
	s_cbranch_scc1 .LBB2_236
; %bb.251:                              ; %_ZNK6thrust11hip_rocprim26transform_input_iterator_tIdNS_17counting_iteratorIjNS_11use_defaultES3_S3_EE11estimate_esEixEl.exit.4.i.i
	s_delay_alu instid0(VALU_DEP_1)
	v_ldexp_f64 v[9:10], v[45:46], -16
.LBB2_252:                              ; %Flow1219
	s_or_b32 exec_lo, exec_lo, s80
	v_or_b32_e32 v17, 0x500, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s3, s33, v17
	s_and_saveexec_b32 s80, s3
	s_cbranch_execz .LBB2_272
; %bb.253:
	s_movk_i32 s4, 0x1001
	s_mov_b64 s[8:9], 0
	v_mad_u64_u32 v[11:12], null, v66, s4, 0x7f256216
                                        ; implicit-def: $vgpr48_vgpr49
                                        ; implicit-def: $vgpr43_vgpr44
                                        ; implicit-def: $vgpr50_vgpr51
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v12, 19, v11
	v_xor3_b32 v11, v11, v12, 0xc761c23c
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v11, v11, 5, v11
	v_add_nc_u32_e32 v12, 0xe9f8cc1d, v11
	v_lshl_add_u32 v11, v11, 9, 0xaccf6200
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v11, v12, v11
	v_lshlrev_b32_e32 v12, 3, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v11, v11, v12, 0xfd7046c5
	v_lshrrev_b32_e32 v12, 16, v11
	s_delay_alu instid0(VALU_DEP_1)
	v_xor3_b32 v17, v11, v12, 0xb55a4f09
                                        ; implicit-def: $vgpr11_vgpr12
.LBB2_254:                              ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v18, 12, v17
	s_cmp_eq_u32 s8, 0
	s_cselect_b32 s4, -1, 0
	s_cmp_eq_u32 s8, 1
	v_add3_u32 v17, v17, v18, 0x7ed55d16
	s_cselect_b32 s5, -1, 0
	s_cmp_eq_u32 s8, 2
	s_cselect_b32 s6, -1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v18, 19, v17
	s_cmp_eq_u32 s8, 3
	s_cselect_b32 s7, -1, 0
	s_add_u32 s8, s8, 1
	v_xor3_b32 v17, v17, v18, 0xc761c23c
	s_addc_u32 s9, s9, 0
	s_cmp_lg_u32 s8, 4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v17, v17, 5, v17
	v_add_nc_u32_e32 v18, 0xe9f8cc1d, v17
	v_lshl_add_u32 v17, v17, 9, 0xaccf6200
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v17, v18, v17
	v_lshlrev_b32_e32 v18, 3, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v17, v17, v18, 0xfd7046c5
	v_lshrrev_b32_e32 v18, 16, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor3_b32 v17, v17, v18, 0xb55a4f09
	v_lshlrev_b32_e32 v19, 12, v17
	v_xor_b32_e32 v18, s23, v17
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add3_u32 v17, v17, v19, 0x7ed55d16
	v_cndmask_b32_e64 v49, v49, v18, s4
	v_cndmask_b32_e64 v12, v12, v18, s5
	v_cndmask_b32_e64 v44, v44, v18, s6
	v_cndmask_b32_e64 v51, v51, v18, s7
	v_lshrrev_b32_e32 v19, 19, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor3_b32 v17, v17, v19, 0xc761c23c
	v_lshl_add_u32 v17, v17, 5, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v19, 0xe9f8cc1d, v17
	v_lshl_add_u32 v17, v17, 9, 0xaccf6200
	v_xor_b32_e32 v17, v19, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v19, 3, v17
	v_add3_u32 v17, v17, v19, 0xfd7046c5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v19, 16, v17
	v_xor3_b32 v17, v17, v19, 0xb55a4f09
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v18, s22, v17
	v_cndmask_b32_e64 v48, v48, v18, s4
	v_cndmask_b32_e64 v11, v11, v18, s5
	v_cndmask_b32_e64 v43, v43, v18, s6
	v_cndmask_b32_e64 v50, v50, v18, s7
	s_cbranch_scc1 .LBB2_254
; %bb.255:                              ; %.preheader55.i.i.5.i.i.preheader
	v_mov_b32_e32 v45, 0
	v_dual_mov_b32 v46, 0 :: v_dual_mov_b32 v47, 0
	s_mov_b32 s12, 0x54442d18
	s_mov_b32 s24, 0x33145c07
	s_mov_b32 s26, 0x6dc9c883
	s_mov_b32 s30, 0x33145c00
	s_mov_b32 s34, 0x252049c0
	s_mov_b32 s36, 0x55555555
	s_mov_b32 s38, 0x6b47b09a
	s_mov_b32 s40, 0xbf559e2b
	s_mov_b32 s42, 0xd7f4df2e
	s_mov_b32 s44, 0x16291751
	s_mov_b32 s46, 0x9b27acf1
	s_mov_b32 s48, 0x998ef7b6
	s_mov_b32 s50, 0xfefa39ef
	s_mov_b32 s52, 0x3b39803f
	s_mov_b32 s54, 0x9037ab78
	s_mov_b32 s56, 0x46cc5e42
	s_mov_b32 s58, 0xa17f65f6
	s_mov_b32 s60, 0x19f4ec90
	s_mov_b32 s62, 0x16c16967
	s_mov_b32 s64, 0xb42fdfa7
	s_mov_b32 s66, 0xf9a43bb8
	s_mov_b32 s68, 0x796cde01
	s_mov_b32 s70, 0x19e83e5c
	s_mov_b32 s72, 0x11110bb3
	s_mov_b32 s81, 0
	s_mov_b32 s13, 0x401921fb
	s_mov_b32 s11, 0x3ff921fb
	s_mov_b32 s25, 0x3c91a626
	s_mov_b32 s27, 0x3fe45f30
	s_mov_b32 s29, 0xbff921fb
	s_mov_b32 s31, 0xbc91a626
	s_mov_b32 s35, 0xb97b839a
	s_mov_b32 s37, 0x3fe55555
	s_mov_b32 s39, 0x3fc38538
	s_mov_b32 s41, 0x3fc3ab76
	s_mov_b32 s43, 0x3fc7474d
	s_mov_b32 s45, 0x3fcc71c0
	s_mov_b32 s47, 0x3fd24924
	s_mov_b32 s49, 0x3fd99999
	s_mov_b32 s51, 0x3fe62e42
	s_mov_b32 s53, 0x3c7abc9e
	s_mov_b32 s55, 0x3e21eeb6
	s_mov_b32 s57, 0xbda907db
	s_mov_b32 s59, 0xbe927e4f
	s_mov_b32 s61, 0x3efa01a0
	s_mov_b32 s63, 0xbf56c16c
	s_mov_b32 s65, 0xbe5ae600
	s_mov_b32 s67, 0x3de5e0b2
	s_mov_b32 s69, 0x3ec71de3
	s_mov_b32 s71, 0xbf2a01a0
	s_mov_b32 s73, 0x3f811111
	s_mov_b32 s74, 0x55555780
	s_mov_b32 s77, 0x3fa55555
	s_mov_b32 s79, 0xbfc55555
                                        ; implicit-def: $vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31_vgpr32
                                        ; implicit-def: $vgpr27_vgpr28_vgpr29_vgpr30_vgpr31_vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42
.LBB2_256:                              ; %.preheader55.i.i.5.i.i
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB2_257 Depth 2
                                        ;     Child Loop BB2_267 Depth 2
                                        ;       Child Loop BB2_268 Depth 3
	v_dual_mov_b32 v57, v49 :: v_dual_mov_b32 v56, v48
	v_dual_mov_b32 v59, v51 :: v_dual_mov_b32 v58, v50
	s_mov_b32 s82, 0
.LBB2_257:                              ;   Parent Loop BB2_256 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v38, v12, v59
	v_xor_b32_e32 v37, v11, v58
                                        ; implicit-def: $vgpr68
                                        ; implicit-def: $vgpr52_vgpr53
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v70, v38, v57
	v_lshrrev_b64 v[49:50], 19, v[37:38]
	v_lshlrev_b32_e32 v39, 13, v37
	v_xor_b32_e32 v69, v37, v56
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_or_b32_e32 v71, v39, v50
	v_add_co_u32 v37, s4, v49, v69
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v38, s4, v71, v70, s4
	v_lshrrev_b64 v[37:38], 11, v[37:38]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_u32_e32 v[38:39], v38
	v_cvt_f64_u32_e32 v[40:41], v37
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[37:38], v[38:39], 32
	v_add_f64 v[37:38], v[37:38], v[40:41]
                                        ; implicit-def: $vgpr41_vgpr42
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[37:38], v[37:38], 0xffffffcb
	v_mul_f64 v[37:38], v[37:38], s[12:13]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ngt_f64_e64 s4, 0x41d00000, v[37:38]
	v_trig_preop_f64 v[62:63], v[37:38], 0
	v_trig_preop_f64 v[60:61], v[37:38], 1
	v_ldexp_f64 v[64:65], v[37:38], 0xffffff80
	v_trig_preop_f64 v[50:51], v[37:38], 2
	s_and_saveexec_b32 s5, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s7, exec_lo, s5
	s_cbranch_execz .LBB2_259
; %bb.258:                              ;   in Loop: Header=BB2_257 Depth=2
	v_cmp_le_f64_e64 s5, 0x7b000000, v[37:38]
	s_mov_b32 s10, s12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v40, v38, v65, s5
	v_cndmask_b32_e64 v39, v37, v64, s5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_f64 v[41:42], v[62:63], v[39:40]
	v_mul_f64 v[52:53], v[60:61], v[39:40]
	v_mul_f64 v[78:79], v[50:51], v[39:40]
	v_fma_f64 v[54:55], v[62:63], v[39:40], -v[41:42]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[80:81], v[60:61], v[39:40], -v[52:53]
	v_fma_f64 v[39:40], v[50:51], v[39:40], -v[78:79]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[67:68], v[52:53], v[54:55]
	v_add_f64 v[72:73], v[67:68], -v[52:53]
	v_add_f64 v[76:77], v[41:42], v[67:68]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[74:75], v[67:68], -v[72:73]
	v_add_f64 v[54:55], v[54:55], -v[72:73]
	v_ldexp_f64 v[72:73], v[76:77], -2
	v_add_f64 v[41:42], v[76:77], -v[41:42]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[52:53], v[52:53], -v[74:75]
	v_add_f64 v[74:75], v[78:79], v[80:81]
	v_cmp_neq_f64_e64 s5, 0x7ff00000, |v[72:73]|
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[41:42], v[67:68], -v[41:42]
	v_add_f64 v[52:53], v[54:55], v[52:53]
	v_fract_f64_e32 v[54:55], v[72:73]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[67:68], v[74:75], v[52:53]
	v_cndmask_b32_e64 v55, 0, v55, s5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v54, 0, v54, s5
	v_ldexp_f64 v[54:55], v[54:55], 2
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[72:73], v[41:42], v[67:68]
	v_add_f64 v[82:83], v[67:68], -v[74:75]
	v_add_f64 v[76:77], v[72:73], v[54:55]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[88:89], v[67:68], -v[82:83]
	v_add_f64 v[52:53], v[52:53], -v[82:83]
	v_add_f64 v[41:42], v[72:73], -v[41:42]
	v_cmp_gt_f64_e64 s5, 0, v[76:77]
	v_add_f64 v[76:77], v[74:75], -v[78:79]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[41:42], v[67:68], -v[41:42]
	v_cndmask_b32_e64 v48, 0, 0x40100000, s5
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[86:87], v[74:75], -v[76:77]
	v_add_f64 v[76:77], v[80:81], -v[76:77]
	v_add_f64 v[74:75], v[74:75], -v[88:89]
	v_add_f64 v[54:55], v[54:55], v[47:48]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[80:81], v[78:79], -v[86:87]
	v_add_f64 v[52:53], v[52:53], v[74:75]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[84:85], v[72:73], v[54:55]
	v_add_f64 v[76:77], v[76:77], v[80:81]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_i32_f64_e32 v48, v[84:85]
	v_add_f64 v[52:53], v[76:77], v[52:53]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_i32_e32 v[82:83], v48
	v_add_f64 v[39:40], v[39:40], v[52:53]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[54:55], v[54:55], -v[82:83]
	v_add_f64 v[39:40], v[41:42], v[39:40]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[74:75], v[72:73], v[54:55]
	v_add_f64 v[52:53], v[74:75], -v[54:55]
	v_cmp_le_f64_e64 s5, 0.5, v[74:75]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[41:42], v[72:73], -v[52:53]
	v_add_co_ci_u32_e64 v68, s6, 0, v48, s5
	v_cndmask_b32_e64 v48, 0, 0x3ff00000, s5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[39:40], v[39:40], v[41:42]
	v_add_f64 v[41:42], v[74:75], -v[47:48]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[52:53], v[41:42], v[39:40]
	v_mul_f64 v[54:55], v[52:53], s[10:11]
	v_add_f64 v[41:42], v[52:53], -v[41:42]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[72:73], v[52:53], s[10:11], -v[54:55]
	v_add_f64 v[39:40], v[39:40], -v[41:42]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[41:42], v[52:53], s[24:25], v[72:73]
	v_fma_f64 v[39:40], v[39:40], s[10:11], v[41:42]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[41:42], v[54:55], v[39:40]
	v_add_f64 v[52:53], v[41:42], -v[54:55]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[52:53], v[39:40], -v[52:53]
.LBB2_259:                              ; %Flow1215
                                        ;   in Loop: Header=BB2_257 Depth=2
	s_and_not1_saveexec_b32 s5, s7
	s_cbranch_execz .LBB2_261
; %bb.260:                              ;   in Loop: Header=BB2_257 Depth=2
	v_mul_f64 v[39:40], v[37:38], s[26:27]
	s_mov_b32 s28, s12
	s_mov_b32 s6, s30
	s_mov_b32 s7, s25
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[39:40], v[39:40]
	v_fma_f64 v[41:42], v[39:40], s[28:29], v[37:38]
	v_mul_f64 v[52:53], v[39:40], s[30:31]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[67:68], v[39:40], s[30:31], v[41:42]
	v_add_f64 v[54:55], v[41:42], v[52:53]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[41:42], v[41:42], -v[54:55]
	v_add_f64 v[54:55], v[54:55], -v[67:68]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[41:42], v[41:42], v[52:53]
	v_fma_f64 v[52:53], v[39:40], s[6:7], v[52:53]
	v_add_f64 v[41:42], v[54:55], v[41:42]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[41:42], v[41:42], -v[52:53]
	v_fma_f64 v[52:53], v[39:40], s[34:35], v[41:42]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[41:42], v[67:68], v[52:53]
	v_add_f64 v[54:55], v[41:42], -v[67:68]
	v_cvt_i32_f64_e32 v68, v[39:40]
	s_delay_alu instid0(VALU_DEP_2)
	v_add_f64 v[52:53], v[52:53], -v[54:55]
.LBB2_261:                              ; %_ZL3cosd.exit.i.i.5.i.i
                                        ;   in Loop: Header=BB2_257 Depth=2
	s_or_b32 exec_lo, exec_lo, s5
                                        ; implicit-def: $vgpr67
                                        ; implicit-def: $vgpr39_vgpr40
                                        ; implicit-def: $vgpr54_vgpr55
	s_and_saveexec_b32 s5, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s6, exec_lo, s5
	s_cbranch_execz .LBB2_263
; %bb.262:                              ;   in Loop: Header=BB2_257 Depth=2
	v_cmp_le_f64_e64 s4, 0x7b000000, v[37:38]
	s_mov_b32 s10, s12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v40, v38, v65, s4
	v_cndmask_b32_e64 v39, v37, v64, s4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_f64 v[54:55], v[62:63], v[39:40]
	v_mul_f64 v[64:65], v[60:61], v[39:40]
	v_mul_f64 v[80:81], v[50:51], v[39:40]
	v_fma_f64 v[62:63], v[62:63], v[39:40], -v[54:55]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[60:61], v[60:61], v[39:40], -v[64:65]
	v_fma_f64 v[39:40], v[50:51], v[39:40], -v[80:81]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[72:73], v[64:65], v[62:63]
	v_add_f64 v[74:75], v[72:73], -v[64:65]
	v_add_f64 v[78:79], v[54:55], v[72:73]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[76:77], v[72:73], -v[74:75]
	v_add_f64 v[62:63], v[62:63], -v[74:75]
	v_ldexp_f64 v[74:75], v[78:79], -2
	v_add_f64 v[54:55], v[78:79], -v[54:55]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[64:65], v[64:65], -v[76:77]
	v_add_f64 v[76:77], v[80:81], v[60:61]
	v_cmp_neq_f64_e64 s4, 0x7ff00000, |v[74:75]|
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[54:55], v[72:73], -v[54:55]
	v_add_f64 v[62:63], v[62:63], v[64:65]
	v_fract_f64_e32 v[64:65], v[74:75]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[72:73], v[76:77], v[62:63]
	v_cndmask_b32_e64 v65, 0, v65, s4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v64, 0, v64, s4
	v_ldexp_f64 v[64:65], v[64:65], 2
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[74:75], v[54:55], v[72:73]
	v_add_f64 v[82:83], v[72:73], -v[76:77]
	v_add_f64 v[78:79], v[74:75], v[64:65]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[88:89], v[72:73], -v[82:83]
	v_add_f64 v[62:63], v[62:63], -v[82:83]
	v_add_f64 v[50:51], v[74:75], -v[54:55]
	v_cmp_gt_f64_e64 s4, 0, v[78:79]
	v_add_f64 v[78:79], v[76:77], -v[80:81]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[50:51], v[72:73], -v[50:51]
	v_cndmask_b32_e64 v48, 0, 0x40100000, s4
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[86:87], v[76:77], -v[78:79]
	v_add_f64 v[60:61], v[60:61], -v[78:79]
	v_add_f64 v[76:77], v[76:77], -v[88:89]
	v_add_f64 v[64:65], v[64:65], v[47:48]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[78:79], v[80:81], -v[86:87]
	v_add_f64 v[62:63], v[62:63], v[76:77]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[84:85], v[74:75], v[64:65]
	v_add_f64 v[60:61], v[60:61], v[78:79]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_i32_f64_e32 v48, v[84:85]
	v_add_f64 v[54:55], v[60:61], v[62:63]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_i32_e32 v[82:83], v48
	v_add_f64 v[39:40], v[39:40], v[54:55]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[64:65], v[64:65], -v[82:83]
	v_add_f64 v[39:40], v[50:51], v[39:40]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[60:61], v[74:75], v[64:65]
	v_add_f64 v[54:55], v[60:61], -v[64:65]
	v_cmp_le_f64_e64 s4, 0.5, v[60:61]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[50:51], v[74:75], -v[54:55]
	v_add_co_ci_u32_e64 v67, s5, 0, v48, s4
	v_cndmask_b32_e64 v48, 0, 0x3ff00000, s4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[39:40], v[39:40], v[50:51]
	v_add_f64 v[50:51], v[60:61], -v[47:48]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[54:55], v[50:51], v[39:40]
	v_mul_f64 v[60:61], v[54:55], s[10:11]
	v_add_f64 v[50:51], v[54:55], -v[50:51]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[62:63], v[54:55], s[10:11], -v[60:61]
	v_add_f64 v[39:40], v[39:40], -v[50:51]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[50:51], v[54:55], s[24:25], v[62:63]
	v_fma_f64 v[50:51], v[39:40], s[10:11], v[50:51]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[39:40], v[60:61], v[50:51]
	v_add_f64 v[54:55], v[39:40], -v[60:61]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[54:55], v[50:51], -v[54:55]
.LBB2_263:                              ; %Flow1214
                                        ;   in Loop: Header=BB2_257 Depth=2
	s_and_not1_saveexec_b32 s4, s6
	s_cbranch_execz .LBB2_265
; %bb.264:                              ;   in Loop: Header=BB2_257 Depth=2
	v_mul_f64 v[39:40], v[37:38], s[26:27]
	s_mov_b32 s28, s12
	s_mov_b32 s6, s30
	s_mov_b32 s7, s25
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[50:51], v[39:40]
	v_fma_f64 v[39:40], v[50:51], s[28:29], v[37:38]
	v_mul_f64 v[54:55], v[50:51], s[30:31]
	v_cvt_i32_f64_e32 v67, v[50:51]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[62:63], v[50:51], s[30:31], v[39:40]
	v_add_f64 v[60:61], v[39:40], v[54:55]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[39:40], v[39:40], -v[60:61]
	v_add_f64 v[60:61], v[60:61], -v[62:63]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[39:40], v[39:40], v[54:55]
	v_fma_f64 v[54:55], v[50:51], s[6:7], v[54:55]
	v_add_f64 v[39:40], v[60:61], v[39:40]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[39:40], v[39:40], -v[54:55]
	v_fma_f64 v[54:55], v[50:51], s[34:35], v[39:40]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[39:40], v[62:63], v[54:55]
	v_add_f64 v[60:61], v[39:40], -v[62:63]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[54:55], v[54:55], -v[60:61]
.LBB2_265:                              ; %_ZL3sind.exit.i.i.5.i.i
                                        ;   in Loop: Header=BB2_257 Depth=2
	s_or_b32 exec_lo, exec_lo, s4
	v_xor_b32_e32 v43, v43, v56
	v_add_co_u32 v56, s4, v58, v56
	v_xor_b32_e32 v44, v44, v57
	v_add_co_ci_u32_e64 v57, s4, v59, v57, s4
	v_lshlrev_b64 v[50:51], 17, v[11:12]
	v_xor_b32_e32 v11, v43, v11
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_xor_b32_e32 v12, v44, v12
	v_lshrrev_b64 v[56:57], 11, v[56:57]
	s_mov_b32 s75, s37
	s_mov_b32 s76, s36
	v_xor_b32_e32 v48, v44, v51
	v_xor_b32_e32 v50, v43, v50
	v_lshlrev_b64 v[43:44], 17, v[11:12]
	v_cvt_f64_u32_e32 v[57:58], v57
	v_xor_b32_e32 v61, v12, v71
	v_xor_b32_e32 v51, v48, v70
	v_xor_b32_e32 v50, v50, v69
	v_xor_b32_e32 v60, v11, v49
	s_mov_b32 s78, s36
	v_xor_b32_e32 v49, v61, v70
	v_xor_b32_e32 v12, v51, v12
	v_xor_b32_e32 v11, v50, v11
	v_xor_b32_e32 v44, v51, v44
	v_xor_b32_e32 v43, v50, v43
	v_lshrrev_b64 v[50:51], 19, v[60:61]
	v_xor_b32_e32 v48, v60, v69
	v_lshlrev_b32_e32 v60, 13, v60
	v_cmp_lg_f64_e64 s6, 0x7ff00000, v[37:38]
	s_cmp_eq_u32 s82, 4
	v_and_b32_e32 v37, 1, v67
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_or_b32_e32 v51, v60, v51
	v_cvt_f64_u32_e32 v[59:60], v56
	v_cmp_eq_u32_e64 s10, 0, v37
	v_ldexp_f64 v[57:58], v[57:58], 32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[56:57], v[57:58], v[59:60]
	v_ldexp_f64 v[56:57], v[56:57], 0xffffffcb
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_frexp_mant_f64_e32 v[58:59], v[56:57]
	v_cmp_gt_f64_e64 s4, s[36:37], v[58:59]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v60, 0, 1, s4
	v_ldexp_f64 v[58:59], v[58:59], v60
	v_frexp_exp_i32_f64_e32 v60, v[56:57]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[62:63], v[58:59], 1.0
	v_subrev_co_ci_u32_e64 v75, s4, 0, v60, s4
	v_add_f64 v[60:61], v[58:59], -1.0
	v_cmp_eq_f64_e64 s4, 0x7ff00000, v[56:57]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[64:65], v[62:63], -1.0
	v_add_f64 v[58:59], v[58:59], -v[64:65]
	v_rcp_f64_e32 v[64:65], v[62:63]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[69:70], -v[62:63], v[64:65], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[64:65], v[69:70], v[64:65], v[64:65]
	v_fma_f64 v[69:70], -v[62:63], v[64:65], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[64:65], v[69:70], v[64:65], v[64:65]
	v_mul_f64 v[69:70], v[60:61], v[64:65]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[71:72], v[62:63], v[69:70]
	v_fma_f64 v[62:63], v[69:70], v[62:63], -v[71:72]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[58:59], v[69:70], v[58:59], v[62:63]
	v_add_f64 v[62:63], v[71:72], v[58:59]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[73:74], v[60:61], -v[62:63]
	v_add_f64 v[71:72], v[62:63], -v[71:72]
	v_add_f64 v[60:61], v[60:61], -v[73:74]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[58:59], v[71:72], -v[58:59]
	v_add_f64 v[60:61], v[60:61], -v[62:63]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[58:59], v[58:59], v[60:61]
	v_add_f64 v[58:59], v[73:74], v[58:59]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[58:59], v[64:65], v[58:59]
	v_add_f64 v[60:61], v[69:70], v[58:59]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[62:63], v[60:61], -v[69:70]
	v_ldexp_f64 v[69:70], v[60:61], 1
	v_add_f64 v[58:59], v[58:59], -v[62:63]
	v_mul_f64 v[62:63], v[60:61], v[60:61]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[58:59], v[58:59], 1
	v_fma_f64 v[64:65], v[62:63], s[40:41], s[38:39]
	v_mul_f64 v[60:61], v[60:61], v[62:63]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[64:65], v[62:63], v[64:65], s[42:43]
	v_fma_f64 v[64:65], v[62:63], v[64:65], s[44:45]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[64:65], v[62:63], v[64:65], s[46:47]
	v_fma_f64 v[64:65], v[62:63], v[64:65], s[48:49]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[64:65], v[62:63], v[64:65], s[74:75]
	v_mul_f64 v[60:61], v[60:61], v[64:65]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[62:63], v[69:70], v[60:61]
	v_add_f64 v[64:65], v[62:63], -v[69:70]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[60:61], v[60:61], -v[64:65]
	v_add_f64 v[58:59], v[58:59], v[60:61]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[60:61], v[62:63], v[58:59]
	v_add_f64 v[62:63], v[60:61], -v[62:63]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[58:59], v[58:59], -v[62:63]
	v_cvt_f64_i32_e32 v[62:63], v75
	v_mul_f64 v[64:65], v[62:63], s[50:51]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[69:70], v[62:63], s[50:51], -v[64:65]
	v_fma_f64 v[62:63], v[62:63], s[52:53], v[69:70]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[69:70], v[64:65], v[62:63]
	v_add_f64 v[64:65], v[69:70], -v[64:65]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[62:63], v[62:63], -v[64:65]
	v_add_f64 v[64:65], v[69:70], v[60:61]
	v_add_f64 v[71:72], v[64:65], -v[69:70]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[73:74], v[64:65], -v[71:72]
	v_add_f64 v[60:61], v[60:61], -v[71:72]
	v_add_f64 v[69:70], v[69:70], -v[73:74]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[60:61], v[60:61], v[69:70]
	v_add_f64 v[69:70], v[62:63], v[58:59]
	v_add_f64 v[71:72], v[69:70], -v[62:63]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[60:61], v[69:70], v[60:61]
	v_add_f64 v[73:74], v[69:70], -v[71:72]
	v_add_f64 v[58:59], v[58:59], -v[71:72]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[62:63], v[62:63], -v[73:74]
	v_add_f64 v[58:59], v[58:59], v[62:63]
	v_add_f64 v[62:63], v[64:65], v[60:61]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[64:65], v[62:63], -v[64:65]
	v_add_f64 v[60:61], v[60:61], -v[64:65]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[58:59], v[58:59], v[60:61]
	v_add_f64 v[58:59], v[62:63], v[58:59]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v59, v59, v57, s4
	v_cndmask_b32_e64 v58, v58, v56, s4
	v_cmp_ngt_f64_e64 s4, 0, v[56:57]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[58:59], v[58:59], -2.0
	v_cndmask_b32_e64 v59, 0x7ff80000, v59, s4
	v_cmp_nge_f64_e64 s4, 0, v[56:57]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v58, 0, v58, s4
	v_cmp_neq_f64_e64 s4, 0, v[56:57]
	v_cndmask_b32_e64 v59, 0x7ff00000, v59, s4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_f64_e64 s4, 0x10000000, v[58:59]
	v_cndmask_b32_e64 v56, 0, 1, s4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v56, 8, v56
	v_ldexp_f64 v[56:57], v[58:59], v56
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_rsq_f64_e32 v[58:59], v[56:57]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[60:61], v[56:57], v[58:59]
	v_mul_f64 v[58:59], v[58:59], 0.5
	v_fma_f64 v[62:63], -v[58:59], v[60:61], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[60:61], v[60:61], v[62:63], v[60:61]
	v_fma_f64 v[58:59], v[58:59], v[62:63], v[58:59]
	v_fma_f64 v[64:65], -v[60:61], v[60:61], v[56:57]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[60:61], v[64:65], v[58:59], v[60:61]
	v_fma_f64 v[62:63], -v[60:61], v[60:61], v[56:57]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[58:59], v[62:63], v[58:59], v[60:61]
	v_cndmask_b32_e64 v60, 0, 0xffffff80, s4
	v_cmp_class_f64_e64 s4, v[56:57], 0x260
	v_ldexp_f64 v[58:59], v[58:59], v60
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v57, v59, v57, s4
	v_cndmask_b32_e64 v56, v58, v56, s4
	v_mul_f64 v[58:59], v[41:42], v[41:42]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[60:61], v[58:59], 0.5
	v_fma_f64 v[69:70], v[58:59], s[56:57], s[54:55]
	v_add_f64 v[62:63], -v[60:61], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[69:70], v[58:59], v[69:70], s[58:59]
	v_add_f64 v[64:65], -v[62:63], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[69:70], v[58:59], v[69:70], s[60:61]
	v_add_f64 v[60:61], v[64:65], -v[60:61]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[69:70], v[58:59], v[69:70], s[62:63]
	v_mul_f64 v[64:65], v[58:59], v[58:59]
	v_fma_f64 v[60:61], v[41:42], -v[52:53], v[60:61]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[69:70], v[58:59], v[69:70], s[76:77]
	v_fma_f64 v[60:61], v[64:65], v[69:70], v[60:61]
	v_mul_f64 v[64:65], v[41:42], -v[58:59]
	v_mul_f64 v[69:70], v[52:53], 0.5
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[60:61], v[62:63], v[60:61]
	v_fma_f64 v[62:63], v[58:59], s[66:67], s[64:65]
	v_fma_f64 v[62:63], v[58:59], v[62:63], s[68:69]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[62:63], v[58:59], v[62:63], s[70:71]
	v_fma_f64 v[62:63], v[58:59], v[62:63], s[72:73]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[62:63], v[64:65], v[62:63], v[69:70]
	v_fma_f64 v[52:53], v[58:59], v[62:63], -v[52:53]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[52:53], v[64:65], s[78:79], v[52:53]
	v_add_f64 v[41:42], v[41:42], -v[52:53]
	v_and_b32_e32 v52, 1, v68
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s4, 0, v52
	v_lshlrev_b32_e32 v52, 30, v68
	v_and_b32_e32 v52, 0x80000000, v52
	v_xor_b32_e32 v42, 0x80000000, v42
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v41, v41, v60, s4
	v_cndmask_b32_e64 v42, v42, v61, s4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v41, 0, v41, s6
	s_cselect_b32 s4, -1, 0
	s_cmp_eq_u32 s82, 3
	v_xor_b32_e32 v42, v42, v52
	s_cselect_b32 s5, -1, 0
	s_cmp_eq_u32 s82, 2
	s_cselect_b32 s7, -1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v42, 0x7ff80000, v42, s6
	s_cmp_eq_u32 s82, 1
	s_cselect_b32 s8, -1, 0
	s_cmp_eq_u32 s82, 0
	v_mul_f64 v[41:42], v[56:57], v[41:42]
	s_cselect_b32 s9, -1, 0
	s_add_i32 s82, s82, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_cmp_lg_u32 s82, 5
	v_cndmask_b32_e64 v36, v36, v42, s4
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e64 v35, v35, v41, s4
	v_cndmask_b32_e64 v34, v34, v42, s5
	v_cndmask_b32_e64 v33, v33, v41, s5
	v_cndmask_b32_e64 v32, v32, v42, s7
	v_cndmask_b32_e64 v31, v31, v41, s7
	v_cndmask_b32_e64 v30, v30, v42, s8
	v_cndmask_b32_e64 v29, v29, v41, s8
	v_cndmask_b32_e64 v28, v28, v42, s9
	v_cndmask_b32_e64 v27, v27, v41, s9
	v_mul_f64 v[41:42], v[39:40], v[39:40]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[52:53], v[41:42], 0.5
	v_fma_f64 v[62:63], v[41:42], s[56:57], s[54:55]
	v_add_f64 v[58:59], -v[52:53], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[62:63], v[41:42], v[62:63], s[58:59]
	v_add_f64 v[60:61], -v[58:59], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[62:63], v[41:42], v[62:63], s[60:61]
	v_add_f64 v[52:53], v[60:61], -v[52:53]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[62:63], v[41:42], v[62:63], s[62:63]
	v_mul_f64 v[60:61], v[41:42], v[41:42]
	v_fma_f64 v[52:53], v[39:40], -v[54:55], v[52:53]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[62:63], v[41:42], v[62:63], s[76:77]
	v_fma_f64 v[52:53], v[60:61], v[62:63], v[52:53]
	v_mul_f64 v[60:61], v[39:40], -v[41:42]
	v_mul_f64 v[62:63], v[54:55], 0.5
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[52:53], v[58:59], v[52:53]
	v_fma_f64 v[58:59], v[41:42], s[66:67], s[64:65]
	v_fma_f64 v[58:59], v[41:42], v[58:59], s[68:69]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[58:59], v[41:42], v[58:59], s[70:71]
	v_fma_f64 v[58:59], v[41:42], v[58:59], s[72:73]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[58:59], v[60:61], v[58:59], v[62:63]
	v_fma_f64 v[41:42], v[41:42], v[58:59], -v[54:55]
	v_dual_mov_b32 v59, v51 :: v_dual_mov_b32 v58, v50
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[41:42], v[60:61], s[78:79], v[41:42]
	v_add_f64 v[39:40], v[39:40], -v[41:42]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v37, v52, v39, s10
	v_cndmask_b32_e64 v39, v53, v40, s10
	v_lshlrev_b32_e32 v40, 30, v67
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v37, 0, v37, s6
	v_xor_b32_e32 v38, v40, v38
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v38, 0x80000000, v38
	v_xor_b32_e32 v38, v39, v38
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v38, 0x7ff80000, v38, s6
	v_mul_f64 v[37:38], v[56:57], v[37:38]
	v_dual_mov_b32 v57, v49 :: v_dual_mov_b32 v56, v48
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v26, v26, v38, s4
	v_cndmask_b32_e64 v25, v25, v37, s4
	v_cndmask_b32_e64 v24, v24, v38, s5
	v_cndmask_b32_e64 v23, v23, v37, s5
	v_cndmask_b32_e64 v22, v22, v38, s7
	v_cndmask_b32_e64 v21, v21, v37, s7
	v_cndmask_b32_e64 v20, v20, v38, s8
	v_cndmask_b32_e64 v19, v19, v37, s8
	v_cndmask_b32_e64 v18, v18, v38, s9
	v_cndmask_b32_e64 v17, v17, v37, s9
	s_cbranch_scc1 .LBB2_257
; %bb.266:                              ; %.lr.ph.i.i.5.i.i.preheader
                                        ;   in Loop: Header=BB2_256 Depth=1
	v_mov_b32_e32 v37, 0
	v_mov_b32_e32 v38, 0
	s_mov_b32 s8, 0
.LBB2_267:                              ; %.lr.ph.i.i.5.i.i
                                        ;   Parent Loop BB2_256 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB2_268 Depth 3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s8, 1
	s_mov_b32 s9, s8
	s_cselect_b32 s4, -1, 0
	s_cmp_eq_u32 s8, 2
	v_cndmask_b32_e64 v39, v28, v30, s4
	v_cndmask_b32_e64 v40, v27, v29, s4
	v_cndmask_b32_e64 v41, v18, v20, s4
	v_cndmask_b32_e64 v42, v17, v19, s4
	s_cselect_b32 s4, -1, 0
	s_cmp_eq_u32 s8, 3
	v_cndmask_b32_e64 v39, v39, v32, s4
	v_cndmask_b32_e64 v40, v40, v31, s4
	v_cndmask_b32_e64 v41, v41, v22, s4
	v_cndmask_b32_e64 v42, v42, v21, s4
	s_cselect_b32 s4, -1, 0
	s_cmp_eq_u32 s8, 4
	v_cndmask_b32_e64 v39, v39, v34, s4
	v_cndmask_b32_e64 v52, v40, v33, s4
	v_cndmask_b32_e64 v41, v41, v24, s4
	v_cndmask_b32_e64 v53, v42, v23, s4
	s_cselect_b32 s4, -1, 0
	s_delay_alu instid0(SALU_CYCLE_1)
	v_cndmask_b32_e64 v40, v39, v36, s4
	v_cndmask_b32_e64 v39, v52, v35, s4
	v_cndmask_b32_e64 v42, v41, v26, s4
	v_cndmask_b32_e64 v41, v53, v25, s4
.LBB2_268:                              ;   Parent Loop BB2_256 Depth=1
                                        ;     Parent Loop BB2_267 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_add_i32 s9, s9, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s9, 1
	s_cselect_b32 s4, -1, 0
	s_cmp_eq_u32 s9, 2
	v_cndmask_b32_e64 v53, v18, v20, s4
	v_cndmask_b32_e64 v54, v17, v19, s4
	s_cselect_b32 s5, -1, 0
	s_cmp_eq_u32 s9, 3
	v_cndmask_b32_e64 v52, v28, v30, s4
	v_cndmask_b32_e64 v53, v53, v22, s5
	v_cndmask_b32_e64 v54, v54, v21, s5
	s_cselect_b32 s6, -1, 0
	s_cmp_eq_u32 s9, 4
	v_cndmask_b32_e64 v52, v52, v32, s5
	v_cndmask_b32_e64 v55, v53, v24, s6
	v_cndmask_b32_e64 v54, v54, v23, s6
	s_cselect_b32 s7, -1, 0
	s_cmp_lt_u32 s9, 4
	v_cndmask_b32_e64 v52, v52, v34, s6
	v_cndmask_b32_e64 v55, v55, v26, s7
	v_cndmask_b32_e64 v54, v54, v25, s7
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v53, v52, v36, s7
	v_cndmask_b32_e64 v52, v27, v29, s4
	v_add_f64 v[54:55], v[41:42], -v[54:55]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v52, v52, v31, s5
	v_cndmask_b32_e64 v52, v52, v33, s6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v52, v52, v35, s7
	v_add_f64 v[52:53], v[39:40], -v[52:53]
	v_mul_f64 v[54:55], v[54:55], v[54:55]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[52:53], v[52:53], v[52:53], v[54:55]
	v_cmp_lt_f64_e64 s4, v[37:38], v[52:53]
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e64 v38, v38, v53, s4
	v_cndmask_b32_e64 v37, v37, v52, s4
	s_cbranch_scc1 .LBB2_268
; %bb.269:                              ; %.loopexit.i.i.5.i.i
                                        ;   in Loop: Header=BB2_267 Depth=2
	s_add_i32 s8, s8, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s8, 4
	s_cbranch_scc1 .LBB2_267
; %bb.270:                              ;   in Loop: Header=BB2_256 Depth=1
	v_cmp_gt_f64_e64 s4, 0x10000000, v[37:38]
	s_add_i32 s81, s81, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_cmp_lg_u32 s81, 0x10000
	v_cndmask_b32_e64 v39, 0, 1, s4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v39, 8, v39
	v_ldexp_f64 v[37:38], v[37:38], v39
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_rsq_f64_e32 v[39:40], v[37:38]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[41:42], v[37:38], v[39:40]
	v_mul_f64 v[39:40], v[39:40], 0.5
	v_fma_f64 v[52:53], -v[39:40], v[41:42], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[41:42], v[41:42], v[52:53], v[41:42]
	v_fma_f64 v[39:40], v[39:40], v[52:53], v[39:40]
	v_fma_f64 v[52:53], -v[41:42], v[41:42], v[37:38]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[41:42], v[52:53], v[39:40], v[41:42]
	v_fma_f64 v[52:53], -v[41:42], v[41:42], v[37:38]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[39:40], v[52:53], v[39:40], v[41:42]
	v_cndmask_b32_e64 v41, 0, 0xffffff80, s4
	v_cmp_class_f64_e64 s4, v[37:38], 0x260
	v_ldexp_f64 v[39:40], v[39:40], v41
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v38, v40, v38, s4
	v_cndmask_b32_e64 v37, v39, v37, s4
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[45:46], v[45:46], v[37:38]
	s_cbranch_scc1 .LBB2_256
; %bb.271:                              ; %_ZNK6thrust11hip_rocprim26transform_input_iterator_tIdNS_17counting_iteratorIjNS_11use_defaultES3_S3_EE11estimate_esEixEl.exit.5.i.i
	s_delay_alu instid0(VALU_DEP_1)
	v_ldexp_f64 v[11:12], v[45:46], -16
.LBB2_272:                              ; %Flow1216
	s_or_b32 exec_lo, exec_lo, s80
	v_or_b32_e32 v17, 0x600, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s4, s33, v17
	s_and_saveexec_b32 s82, s4
	s_cbranch_execz .LBB2_292
; %bb.273:
	s_movk_i32 s5, 0x1001
	s_mov_b64 s[10:11], 0
	v_mad_u64_u32 v[13:14], null, v66, s5, 0x7f356316
                                        ; implicit-def: $vgpr48_vgpr49
                                        ; implicit-def: $vgpr43_vgpr44
                                        ; implicit-def: $vgpr50_vgpr51
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v14, 19, v13
	v_xor3_b32 v13, v13, v14, 0xc761c23c
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v13, v13, 5, v13
	v_add_nc_u32_e32 v14, 0xe9f8cc1d, v13
	v_lshl_add_u32 v13, v13, 9, 0xaccf6200
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v13, v14, v13
	v_lshlrev_b32_e32 v14, 3, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v13, v13, v14, 0xfd7046c5
	v_lshrrev_b32_e32 v14, 16, v13
	s_delay_alu instid0(VALU_DEP_1)
	v_xor3_b32 v17, v13, v14, 0xb55a4f09
                                        ; implicit-def: $vgpr13_vgpr14
.LBB2_274:                              ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v18, 12, v17
	s_cmp_eq_u32 s10, 0
	s_cselect_b32 s5, -1, 0
	s_cmp_eq_u32 s10, 1
	v_add3_u32 v17, v17, v18, 0x7ed55d16
	s_cselect_b32 s6, -1, 0
	s_cmp_eq_u32 s10, 2
	s_cselect_b32 s7, -1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v18, 19, v17
	s_cmp_eq_u32 s10, 3
	s_cselect_b32 s8, -1, 0
	s_add_u32 s10, s10, 1
	v_xor3_b32 v17, v17, v18, 0xc761c23c
	s_addc_u32 s11, s11, 0
	s_cmp_lg_u32 s10, 4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v17, v17, 5, v17
	v_add_nc_u32_e32 v18, 0xe9f8cc1d, v17
	v_lshl_add_u32 v17, v17, 9, 0xaccf6200
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v17, v18, v17
	v_lshlrev_b32_e32 v18, 3, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v17, v17, v18, 0xfd7046c5
	v_lshrrev_b32_e32 v18, 16, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor3_b32 v17, v17, v18, 0xb55a4f09
	v_lshlrev_b32_e32 v19, 12, v17
	v_xor_b32_e32 v18, s23, v17
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add3_u32 v17, v17, v19, 0x7ed55d16
	v_cndmask_b32_e64 v49, v49, v18, s5
	v_cndmask_b32_e64 v14, v14, v18, s6
	v_cndmask_b32_e64 v44, v44, v18, s7
	v_cndmask_b32_e64 v51, v51, v18, s8
	v_lshrrev_b32_e32 v19, 19, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor3_b32 v17, v17, v19, 0xc761c23c
	v_lshl_add_u32 v17, v17, 5, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v19, 0xe9f8cc1d, v17
	v_lshl_add_u32 v17, v17, 9, 0xaccf6200
	v_xor_b32_e32 v17, v19, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v19, 3, v17
	v_add3_u32 v17, v17, v19, 0xfd7046c5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v19, 16, v17
	v_xor3_b32 v17, v17, v19, 0xb55a4f09
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v18, s22, v17
	v_cndmask_b32_e64 v48, v48, v18, s5
	v_cndmask_b32_e64 v13, v13, v18, s6
	v_cndmask_b32_e64 v43, v43, v18, s7
	v_cndmask_b32_e64 v50, v50, v18, s8
	s_cbranch_scc1 .LBB2_274
; %bb.275:                              ; %.preheader55.i.i.6.i.i.preheader
	v_mov_b32_e32 v45, 0
	v_dual_mov_b32 v46, 0 :: v_dual_mov_b32 v47, 0
	s_mov_b32 s12, 0x54442d18
	s_mov_b32 s26, 0x33145c07
	s_mov_b32 s28, 0x6dc9c883
	s_mov_b32 s34, 0x33145c00
	s_mov_b32 s36, 0x252049c0
	s_mov_b32 s38, 0x55555555
	s_mov_b32 s40, 0x6b47b09a
	s_mov_b32 s42, 0xbf559e2b
	s_mov_b32 s44, 0xd7f4df2e
	s_mov_b32 s46, 0x16291751
	s_mov_b32 s48, 0x9b27acf1
	s_mov_b32 s50, 0x998ef7b6
	s_mov_b32 s52, 0xfefa39ef
	s_mov_b32 s54, 0x3b39803f
	s_mov_b32 s56, 0x9037ab78
	s_mov_b32 s58, 0x46cc5e42
	s_mov_b32 s60, 0xa17f65f6
	s_mov_b32 s62, 0x19f4ec90
	s_mov_b32 s64, 0x16c16967
	s_mov_b32 s66, 0xb42fdfa7
	s_mov_b32 s68, 0xf9a43bb8
	s_mov_b32 s70, 0x796cde01
	s_mov_b32 s72, 0x19e83e5c
	s_mov_b32 s74, 0x11110bb3
	s_mov_b32 s83, 0
	s_mov_b32 s13, 0x401921fb
	s_mov_b32 s25, 0x3ff921fb
	s_mov_b32 s27, 0x3c91a626
	s_mov_b32 s29, 0x3fe45f30
	s_mov_b32 s31, 0xbff921fb
	s_mov_b32 s35, 0xbc91a626
	s_mov_b32 s37, 0xb97b839a
	s_mov_b32 s39, 0x3fe55555
	s_mov_b32 s41, 0x3fc38538
	s_mov_b32 s43, 0x3fc3ab76
	s_mov_b32 s45, 0x3fc7474d
	s_mov_b32 s47, 0x3fcc71c0
	s_mov_b32 s49, 0x3fd24924
	s_mov_b32 s51, 0x3fd99999
	s_mov_b32 s53, 0x3fe62e42
	s_mov_b32 s55, 0x3c7abc9e
	s_mov_b32 s57, 0x3e21eeb6
	s_mov_b32 s59, 0xbda907db
	s_mov_b32 s61, 0xbe927e4f
	s_mov_b32 s63, 0x3efa01a0
	s_mov_b32 s65, 0xbf56c16c
	s_mov_b32 s67, 0xbe5ae600
	s_mov_b32 s69, 0x3de5e0b2
	s_mov_b32 s71, 0x3ec71de3
	s_mov_b32 s73, 0xbf2a01a0
	s_mov_b32 s75, 0x3f811111
	s_mov_b32 s76, 0x55555780
	s_mov_b32 s79, 0x3fa55555
	s_mov_b32 s81, 0xbfc55555
                                        ; implicit-def: $vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31_vgpr32
                                        ; implicit-def: $vgpr27_vgpr28_vgpr29_vgpr30_vgpr31_vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42
.LBB2_276:                              ; %.preheader55.i.i.6.i.i
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB2_277 Depth 2
                                        ;     Child Loop BB2_287 Depth 2
                                        ;       Child Loop BB2_288 Depth 3
	v_dual_mov_b32 v57, v49 :: v_dual_mov_b32 v56, v48
	v_dual_mov_b32 v59, v51 :: v_dual_mov_b32 v58, v50
	s_mov_b32 s84, 0
.LBB2_277:                              ;   Parent Loop BB2_276 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v38, v14, v59
	v_xor_b32_e32 v37, v13, v58
                                        ; implicit-def: $vgpr68
                                        ; implicit-def: $vgpr52_vgpr53
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v70, v38, v57
	v_lshrrev_b64 v[49:50], 19, v[37:38]
	v_lshlrev_b32_e32 v39, 13, v37
	v_xor_b32_e32 v69, v37, v56
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_or_b32_e32 v71, v39, v50
	v_add_co_u32 v37, s5, v49, v69
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v38, s5, v71, v70, s5
	v_lshrrev_b64 v[37:38], 11, v[37:38]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_u32_e32 v[38:39], v38
	v_cvt_f64_u32_e32 v[40:41], v37
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[37:38], v[38:39], 32
	v_add_f64 v[37:38], v[37:38], v[40:41]
                                        ; implicit-def: $vgpr41_vgpr42
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[37:38], v[37:38], 0xffffffcb
	v_mul_f64 v[37:38], v[37:38], s[12:13]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ngt_f64_e64 s5, 0x41d00000, v[37:38]
	v_trig_preop_f64 v[62:63], v[37:38], 0
	v_trig_preop_f64 v[60:61], v[37:38], 1
	v_ldexp_f64 v[64:65], v[37:38], 0xffffff80
	v_trig_preop_f64 v[50:51], v[37:38], 2
	s_and_saveexec_b32 s6, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s8, exec_lo, s6
	s_cbranch_execz .LBB2_279
; %bb.278:                              ;   in Loop: Header=BB2_277 Depth=2
	v_cmp_le_f64_e64 s6, 0x7b000000, v[37:38]
	s_mov_b32 s24, s12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v40, v38, v65, s6
	v_cndmask_b32_e64 v39, v37, v64, s6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_f64 v[41:42], v[62:63], v[39:40]
	v_mul_f64 v[52:53], v[60:61], v[39:40]
	v_mul_f64 v[78:79], v[50:51], v[39:40]
	v_fma_f64 v[54:55], v[62:63], v[39:40], -v[41:42]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[80:81], v[60:61], v[39:40], -v[52:53]
	v_fma_f64 v[39:40], v[50:51], v[39:40], -v[78:79]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[67:68], v[52:53], v[54:55]
	v_add_f64 v[72:73], v[67:68], -v[52:53]
	v_add_f64 v[76:77], v[41:42], v[67:68]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[74:75], v[67:68], -v[72:73]
	v_add_f64 v[54:55], v[54:55], -v[72:73]
	v_ldexp_f64 v[72:73], v[76:77], -2
	v_add_f64 v[41:42], v[76:77], -v[41:42]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[52:53], v[52:53], -v[74:75]
	v_add_f64 v[74:75], v[78:79], v[80:81]
	v_cmp_neq_f64_e64 s6, 0x7ff00000, |v[72:73]|
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[41:42], v[67:68], -v[41:42]
	v_add_f64 v[52:53], v[54:55], v[52:53]
	v_fract_f64_e32 v[54:55], v[72:73]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[67:68], v[74:75], v[52:53]
	v_cndmask_b32_e64 v55, 0, v55, s6
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v54, 0, v54, s6
	v_ldexp_f64 v[54:55], v[54:55], 2
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[72:73], v[41:42], v[67:68]
	v_add_f64 v[82:83], v[67:68], -v[74:75]
	v_add_f64 v[76:77], v[72:73], v[54:55]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[88:89], v[67:68], -v[82:83]
	v_add_f64 v[52:53], v[52:53], -v[82:83]
	v_add_f64 v[41:42], v[72:73], -v[41:42]
	v_cmp_gt_f64_e64 s6, 0, v[76:77]
	v_add_f64 v[76:77], v[74:75], -v[78:79]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[41:42], v[67:68], -v[41:42]
	v_cndmask_b32_e64 v48, 0, 0x40100000, s6
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[86:87], v[74:75], -v[76:77]
	v_add_f64 v[76:77], v[80:81], -v[76:77]
	v_add_f64 v[74:75], v[74:75], -v[88:89]
	v_add_f64 v[54:55], v[54:55], v[47:48]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[80:81], v[78:79], -v[86:87]
	v_add_f64 v[52:53], v[52:53], v[74:75]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[84:85], v[72:73], v[54:55]
	v_add_f64 v[76:77], v[76:77], v[80:81]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_i32_f64_e32 v48, v[84:85]
	v_add_f64 v[52:53], v[76:77], v[52:53]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_i32_e32 v[82:83], v48
	v_add_f64 v[39:40], v[39:40], v[52:53]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[54:55], v[54:55], -v[82:83]
	v_add_f64 v[39:40], v[41:42], v[39:40]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[74:75], v[72:73], v[54:55]
	v_add_f64 v[52:53], v[74:75], -v[54:55]
	v_cmp_le_f64_e64 s6, 0.5, v[74:75]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[41:42], v[72:73], -v[52:53]
	v_add_co_ci_u32_e64 v68, s7, 0, v48, s6
	v_cndmask_b32_e64 v48, 0, 0x3ff00000, s6
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[39:40], v[39:40], v[41:42]
	v_add_f64 v[41:42], v[74:75], -v[47:48]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[52:53], v[41:42], v[39:40]
	v_mul_f64 v[54:55], v[52:53], s[24:25]
	v_add_f64 v[41:42], v[52:53], -v[41:42]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[72:73], v[52:53], s[24:25], -v[54:55]
	v_add_f64 v[39:40], v[39:40], -v[41:42]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[41:42], v[52:53], s[26:27], v[72:73]
	v_fma_f64 v[39:40], v[39:40], s[24:25], v[41:42]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[41:42], v[54:55], v[39:40]
	v_add_f64 v[52:53], v[41:42], -v[54:55]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[52:53], v[39:40], -v[52:53]
.LBB2_279:                              ; %Flow1212
                                        ;   in Loop: Header=BB2_277 Depth=2
	s_and_not1_saveexec_b32 s6, s8
	s_cbranch_execz .LBB2_281
; %bb.280:                              ;   in Loop: Header=BB2_277 Depth=2
	v_mul_f64 v[39:40], v[37:38], s[28:29]
	s_mov_b32 s30, s12
	s_mov_b32 s8, s34
	s_mov_b32 s9, s27
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[39:40], v[39:40]
	v_fma_f64 v[41:42], v[39:40], s[30:31], v[37:38]
	v_mul_f64 v[52:53], v[39:40], s[34:35]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[67:68], v[39:40], s[34:35], v[41:42]
	v_add_f64 v[54:55], v[41:42], v[52:53]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[41:42], v[41:42], -v[54:55]
	v_add_f64 v[54:55], v[54:55], -v[67:68]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[41:42], v[41:42], v[52:53]
	v_fma_f64 v[52:53], v[39:40], s[8:9], v[52:53]
	v_add_f64 v[41:42], v[54:55], v[41:42]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[41:42], v[41:42], -v[52:53]
	v_fma_f64 v[52:53], v[39:40], s[36:37], v[41:42]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[41:42], v[67:68], v[52:53]
	v_add_f64 v[54:55], v[41:42], -v[67:68]
	v_cvt_i32_f64_e32 v68, v[39:40]
	s_delay_alu instid0(VALU_DEP_2)
	v_add_f64 v[52:53], v[52:53], -v[54:55]
.LBB2_281:                              ; %_ZL3cosd.exit.i.i.6.i.i
                                        ;   in Loop: Header=BB2_277 Depth=2
	s_or_b32 exec_lo, exec_lo, s6
                                        ; implicit-def: $vgpr67
                                        ; implicit-def: $vgpr39_vgpr40
                                        ; implicit-def: $vgpr54_vgpr55
	s_and_saveexec_b32 s6, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s7, exec_lo, s6
	s_cbranch_execz .LBB2_283
; %bb.282:                              ;   in Loop: Header=BB2_277 Depth=2
	v_cmp_le_f64_e64 s5, 0x7b000000, v[37:38]
	s_mov_b32 s24, s12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v40, v38, v65, s5
	v_cndmask_b32_e64 v39, v37, v64, s5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_f64 v[54:55], v[62:63], v[39:40]
	v_mul_f64 v[64:65], v[60:61], v[39:40]
	v_mul_f64 v[80:81], v[50:51], v[39:40]
	v_fma_f64 v[62:63], v[62:63], v[39:40], -v[54:55]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[60:61], v[60:61], v[39:40], -v[64:65]
	v_fma_f64 v[39:40], v[50:51], v[39:40], -v[80:81]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[72:73], v[64:65], v[62:63]
	v_add_f64 v[74:75], v[72:73], -v[64:65]
	v_add_f64 v[78:79], v[54:55], v[72:73]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[76:77], v[72:73], -v[74:75]
	v_add_f64 v[62:63], v[62:63], -v[74:75]
	v_ldexp_f64 v[74:75], v[78:79], -2
	v_add_f64 v[54:55], v[78:79], -v[54:55]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[64:65], v[64:65], -v[76:77]
	v_add_f64 v[76:77], v[80:81], v[60:61]
	v_cmp_neq_f64_e64 s5, 0x7ff00000, |v[74:75]|
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[54:55], v[72:73], -v[54:55]
	v_add_f64 v[62:63], v[62:63], v[64:65]
	v_fract_f64_e32 v[64:65], v[74:75]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[72:73], v[76:77], v[62:63]
	v_cndmask_b32_e64 v65, 0, v65, s5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v64, 0, v64, s5
	v_ldexp_f64 v[64:65], v[64:65], 2
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[74:75], v[54:55], v[72:73]
	v_add_f64 v[82:83], v[72:73], -v[76:77]
	v_add_f64 v[78:79], v[74:75], v[64:65]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[88:89], v[72:73], -v[82:83]
	v_add_f64 v[62:63], v[62:63], -v[82:83]
	v_add_f64 v[50:51], v[74:75], -v[54:55]
	v_cmp_gt_f64_e64 s5, 0, v[78:79]
	v_add_f64 v[78:79], v[76:77], -v[80:81]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[50:51], v[72:73], -v[50:51]
	v_cndmask_b32_e64 v48, 0, 0x40100000, s5
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[86:87], v[76:77], -v[78:79]
	v_add_f64 v[60:61], v[60:61], -v[78:79]
	v_add_f64 v[76:77], v[76:77], -v[88:89]
	v_add_f64 v[64:65], v[64:65], v[47:48]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[78:79], v[80:81], -v[86:87]
	v_add_f64 v[62:63], v[62:63], v[76:77]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[84:85], v[74:75], v[64:65]
	v_add_f64 v[60:61], v[60:61], v[78:79]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_i32_f64_e32 v48, v[84:85]
	v_add_f64 v[54:55], v[60:61], v[62:63]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_i32_e32 v[82:83], v48
	v_add_f64 v[39:40], v[39:40], v[54:55]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[64:65], v[64:65], -v[82:83]
	v_add_f64 v[39:40], v[50:51], v[39:40]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[60:61], v[74:75], v[64:65]
	v_add_f64 v[54:55], v[60:61], -v[64:65]
	v_cmp_le_f64_e64 s5, 0.5, v[60:61]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[50:51], v[74:75], -v[54:55]
	v_add_co_ci_u32_e64 v67, s6, 0, v48, s5
	v_cndmask_b32_e64 v48, 0, 0x3ff00000, s5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[39:40], v[39:40], v[50:51]
	v_add_f64 v[50:51], v[60:61], -v[47:48]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[54:55], v[50:51], v[39:40]
	v_mul_f64 v[60:61], v[54:55], s[24:25]
	v_add_f64 v[50:51], v[54:55], -v[50:51]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[62:63], v[54:55], s[24:25], -v[60:61]
	v_add_f64 v[39:40], v[39:40], -v[50:51]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[50:51], v[54:55], s[26:27], v[62:63]
	v_fma_f64 v[50:51], v[39:40], s[24:25], v[50:51]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[39:40], v[60:61], v[50:51]
	v_add_f64 v[54:55], v[39:40], -v[60:61]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[54:55], v[50:51], -v[54:55]
.LBB2_283:                              ; %Flow1211
                                        ;   in Loop: Header=BB2_277 Depth=2
	s_and_not1_saveexec_b32 s5, s7
	s_cbranch_execz .LBB2_285
; %bb.284:                              ;   in Loop: Header=BB2_277 Depth=2
	v_mul_f64 v[39:40], v[37:38], s[28:29]
	s_mov_b32 s30, s12
	s_mov_b32 s6, s34
	s_mov_b32 s7, s27
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[50:51], v[39:40]
	v_fma_f64 v[39:40], v[50:51], s[30:31], v[37:38]
	v_mul_f64 v[54:55], v[50:51], s[34:35]
	v_cvt_i32_f64_e32 v67, v[50:51]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[62:63], v[50:51], s[34:35], v[39:40]
	v_add_f64 v[60:61], v[39:40], v[54:55]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[39:40], v[39:40], -v[60:61]
	v_add_f64 v[60:61], v[60:61], -v[62:63]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[39:40], v[39:40], v[54:55]
	v_fma_f64 v[54:55], v[50:51], s[6:7], v[54:55]
	v_add_f64 v[39:40], v[60:61], v[39:40]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[39:40], v[39:40], -v[54:55]
	v_fma_f64 v[54:55], v[50:51], s[36:37], v[39:40]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[39:40], v[62:63], v[54:55]
	v_add_f64 v[60:61], v[39:40], -v[62:63]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[54:55], v[54:55], -v[60:61]
.LBB2_285:                              ; %_ZL3sind.exit.i.i.6.i.i
                                        ;   in Loop: Header=BB2_277 Depth=2
	s_or_b32 exec_lo, exec_lo, s5
	v_xor_b32_e32 v43, v43, v56
	v_add_co_u32 v56, s5, v58, v56
	v_xor_b32_e32 v44, v44, v57
	v_add_co_ci_u32_e64 v57, s5, v59, v57, s5
	v_lshlrev_b64 v[50:51], 17, v[13:14]
	v_xor_b32_e32 v13, v43, v13
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_xor_b32_e32 v14, v44, v14
	v_lshrrev_b64 v[56:57], 11, v[56:57]
	s_mov_b32 s77, s39
	s_mov_b32 s78, s38
	v_xor_b32_e32 v48, v44, v51
	v_xor_b32_e32 v50, v43, v50
	v_lshlrev_b64 v[43:44], 17, v[13:14]
	v_cvt_f64_u32_e32 v[57:58], v57
	v_xor_b32_e32 v61, v14, v71
	v_xor_b32_e32 v51, v48, v70
	v_xor_b32_e32 v50, v50, v69
	v_xor_b32_e32 v60, v13, v49
	s_mov_b32 s80, s38
	v_xor_b32_e32 v49, v61, v70
	v_xor_b32_e32 v14, v51, v14
	v_xor_b32_e32 v13, v50, v13
	v_xor_b32_e32 v44, v51, v44
	v_xor_b32_e32 v43, v50, v43
	v_lshrrev_b64 v[50:51], 19, v[60:61]
	v_xor_b32_e32 v48, v60, v69
	v_lshlrev_b32_e32 v60, 13, v60
	v_cmp_lg_f64_e64 s7, 0x7ff00000, v[37:38]
	s_cmp_eq_u32 s84, 4
	v_and_b32_e32 v37, 1, v67
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_or_b32_e32 v51, v60, v51
	v_cvt_f64_u32_e32 v[59:60], v56
	v_cmp_eq_u32_e64 s11, 0, v37
	v_ldexp_f64 v[57:58], v[57:58], 32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[56:57], v[57:58], v[59:60]
	v_ldexp_f64 v[56:57], v[56:57], 0xffffffcb
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_frexp_mant_f64_e32 v[58:59], v[56:57]
	v_cmp_gt_f64_e64 s5, s[38:39], v[58:59]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v60, 0, 1, s5
	v_ldexp_f64 v[58:59], v[58:59], v60
	v_frexp_exp_i32_f64_e32 v60, v[56:57]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[62:63], v[58:59], 1.0
	v_subrev_co_ci_u32_e64 v75, s5, 0, v60, s5
	v_add_f64 v[60:61], v[58:59], -1.0
	v_cmp_eq_f64_e64 s5, 0x7ff00000, v[56:57]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[64:65], v[62:63], -1.0
	v_add_f64 v[58:59], v[58:59], -v[64:65]
	v_rcp_f64_e32 v[64:65], v[62:63]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[69:70], -v[62:63], v[64:65], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[64:65], v[69:70], v[64:65], v[64:65]
	v_fma_f64 v[69:70], -v[62:63], v[64:65], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[64:65], v[69:70], v[64:65], v[64:65]
	v_mul_f64 v[69:70], v[60:61], v[64:65]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[71:72], v[62:63], v[69:70]
	v_fma_f64 v[62:63], v[69:70], v[62:63], -v[71:72]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[58:59], v[69:70], v[58:59], v[62:63]
	v_add_f64 v[62:63], v[71:72], v[58:59]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[73:74], v[60:61], -v[62:63]
	v_add_f64 v[71:72], v[62:63], -v[71:72]
	v_add_f64 v[60:61], v[60:61], -v[73:74]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[58:59], v[71:72], -v[58:59]
	v_add_f64 v[60:61], v[60:61], -v[62:63]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[58:59], v[58:59], v[60:61]
	v_add_f64 v[58:59], v[73:74], v[58:59]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[58:59], v[64:65], v[58:59]
	v_add_f64 v[60:61], v[69:70], v[58:59]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[62:63], v[60:61], -v[69:70]
	v_ldexp_f64 v[69:70], v[60:61], 1
	v_add_f64 v[58:59], v[58:59], -v[62:63]
	v_mul_f64 v[62:63], v[60:61], v[60:61]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[58:59], v[58:59], 1
	v_fma_f64 v[64:65], v[62:63], s[42:43], s[40:41]
	v_mul_f64 v[60:61], v[60:61], v[62:63]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[64:65], v[62:63], v[64:65], s[44:45]
	v_fma_f64 v[64:65], v[62:63], v[64:65], s[46:47]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[64:65], v[62:63], v[64:65], s[48:49]
	v_fma_f64 v[64:65], v[62:63], v[64:65], s[50:51]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[64:65], v[62:63], v[64:65], s[76:77]
	v_mul_f64 v[60:61], v[60:61], v[64:65]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[62:63], v[69:70], v[60:61]
	v_add_f64 v[64:65], v[62:63], -v[69:70]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[60:61], v[60:61], -v[64:65]
	v_add_f64 v[58:59], v[58:59], v[60:61]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[60:61], v[62:63], v[58:59]
	v_add_f64 v[62:63], v[60:61], -v[62:63]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[58:59], v[58:59], -v[62:63]
	v_cvt_f64_i32_e32 v[62:63], v75
	v_mul_f64 v[64:65], v[62:63], s[52:53]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[69:70], v[62:63], s[52:53], -v[64:65]
	v_fma_f64 v[62:63], v[62:63], s[54:55], v[69:70]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[69:70], v[64:65], v[62:63]
	v_add_f64 v[64:65], v[69:70], -v[64:65]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[62:63], v[62:63], -v[64:65]
	v_add_f64 v[64:65], v[69:70], v[60:61]
	v_add_f64 v[71:72], v[64:65], -v[69:70]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[73:74], v[64:65], -v[71:72]
	v_add_f64 v[60:61], v[60:61], -v[71:72]
	v_add_f64 v[69:70], v[69:70], -v[73:74]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[60:61], v[60:61], v[69:70]
	v_add_f64 v[69:70], v[62:63], v[58:59]
	v_add_f64 v[71:72], v[69:70], -v[62:63]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[60:61], v[69:70], v[60:61]
	v_add_f64 v[73:74], v[69:70], -v[71:72]
	v_add_f64 v[58:59], v[58:59], -v[71:72]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[62:63], v[62:63], -v[73:74]
	v_add_f64 v[58:59], v[58:59], v[62:63]
	v_add_f64 v[62:63], v[64:65], v[60:61]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[64:65], v[62:63], -v[64:65]
	v_add_f64 v[60:61], v[60:61], -v[64:65]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[58:59], v[58:59], v[60:61]
	v_add_f64 v[58:59], v[62:63], v[58:59]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v59, v59, v57, s5
	v_cndmask_b32_e64 v58, v58, v56, s5
	v_cmp_ngt_f64_e64 s5, 0, v[56:57]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[58:59], v[58:59], -2.0
	v_cndmask_b32_e64 v59, 0x7ff80000, v59, s5
	v_cmp_nge_f64_e64 s5, 0, v[56:57]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v58, 0, v58, s5
	v_cmp_neq_f64_e64 s5, 0, v[56:57]
	v_cndmask_b32_e64 v59, 0x7ff00000, v59, s5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_f64_e64 s5, 0x10000000, v[58:59]
	v_cndmask_b32_e64 v56, 0, 1, s5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v56, 8, v56
	v_ldexp_f64 v[56:57], v[58:59], v56
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_rsq_f64_e32 v[58:59], v[56:57]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[60:61], v[56:57], v[58:59]
	v_mul_f64 v[58:59], v[58:59], 0.5
	v_fma_f64 v[62:63], -v[58:59], v[60:61], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[60:61], v[60:61], v[62:63], v[60:61]
	v_fma_f64 v[58:59], v[58:59], v[62:63], v[58:59]
	v_fma_f64 v[64:65], -v[60:61], v[60:61], v[56:57]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[60:61], v[64:65], v[58:59], v[60:61]
	v_fma_f64 v[62:63], -v[60:61], v[60:61], v[56:57]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[58:59], v[62:63], v[58:59], v[60:61]
	v_cndmask_b32_e64 v60, 0, 0xffffff80, s5
	v_cmp_class_f64_e64 s5, v[56:57], 0x260
	v_ldexp_f64 v[58:59], v[58:59], v60
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v57, v59, v57, s5
	v_cndmask_b32_e64 v56, v58, v56, s5
	v_mul_f64 v[58:59], v[41:42], v[41:42]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[60:61], v[58:59], 0.5
	v_fma_f64 v[69:70], v[58:59], s[58:59], s[56:57]
	v_add_f64 v[62:63], -v[60:61], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[69:70], v[58:59], v[69:70], s[60:61]
	v_add_f64 v[64:65], -v[62:63], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[69:70], v[58:59], v[69:70], s[62:63]
	v_add_f64 v[60:61], v[64:65], -v[60:61]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[69:70], v[58:59], v[69:70], s[64:65]
	v_mul_f64 v[64:65], v[58:59], v[58:59]
	v_fma_f64 v[60:61], v[41:42], -v[52:53], v[60:61]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[69:70], v[58:59], v[69:70], s[78:79]
	v_fma_f64 v[60:61], v[64:65], v[69:70], v[60:61]
	v_mul_f64 v[64:65], v[41:42], -v[58:59]
	v_mul_f64 v[69:70], v[52:53], 0.5
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[60:61], v[62:63], v[60:61]
	v_fma_f64 v[62:63], v[58:59], s[68:69], s[66:67]
	v_fma_f64 v[62:63], v[58:59], v[62:63], s[70:71]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[62:63], v[58:59], v[62:63], s[72:73]
	v_fma_f64 v[62:63], v[58:59], v[62:63], s[74:75]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[62:63], v[64:65], v[62:63], v[69:70]
	v_fma_f64 v[52:53], v[58:59], v[62:63], -v[52:53]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[52:53], v[64:65], s[80:81], v[52:53]
	v_add_f64 v[41:42], v[41:42], -v[52:53]
	v_and_b32_e32 v52, 1, v68
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s5, 0, v52
	v_lshlrev_b32_e32 v52, 30, v68
	v_and_b32_e32 v52, 0x80000000, v52
	v_xor_b32_e32 v42, 0x80000000, v42
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v41, v41, v60, s5
	v_cndmask_b32_e64 v42, v42, v61, s5
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v41, 0, v41, s7
	s_cselect_b32 s5, -1, 0
	s_cmp_eq_u32 s84, 3
	v_xor_b32_e32 v42, v42, v52
	s_cselect_b32 s6, -1, 0
	s_cmp_eq_u32 s84, 2
	s_cselect_b32 s8, -1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v42, 0x7ff80000, v42, s7
	s_cmp_eq_u32 s84, 1
	s_cselect_b32 s9, -1, 0
	s_cmp_eq_u32 s84, 0
	v_mul_f64 v[41:42], v[56:57], v[41:42]
	s_cselect_b32 s10, -1, 0
	s_add_i32 s84, s84, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_cmp_lg_u32 s84, 5
	v_cndmask_b32_e64 v36, v36, v42, s5
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e64 v35, v35, v41, s5
	v_cndmask_b32_e64 v34, v34, v42, s6
	v_cndmask_b32_e64 v33, v33, v41, s6
	v_cndmask_b32_e64 v32, v32, v42, s8
	v_cndmask_b32_e64 v31, v31, v41, s8
	v_cndmask_b32_e64 v30, v30, v42, s9
	v_cndmask_b32_e64 v29, v29, v41, s9
	v_cndmask_b32_e64 v28, v28, v42, s10
	v_cndmask_b32_e64 v27, v27, v41, s10
	v_mul_f64 v[41:42], v[39:40], v[39:40]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[52:53], v[41:42], 0.5
	v_fma_f64 v[62:63], v[41:42], s[58:59], s[56:57]
	v_add_f64 v[58:59], -v[52:53], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[62:63], v[41:42], v[62:63], s[60:61]
	v_add_f64 v[60:61], -v[58:59], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[62:63], v[41:42], v[62:63], s[62:63]
	v_add_f64 v[52:53], v[60:61], -v[52:53]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[62:63], v[41:42], v[62:63], s[64:65]
	v_mul_f64 v[60:61], v[41:42], v[41:42]
	v_fma_f64 v[52:53], v[39:40], -v[54:55], v[52:53]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[62:63], v[41:42], v[62:63], s[78:79]
	v_fma_f64 v[52:53], v[60:61], v[62:63], v[52:53]
	v_mul_f64 v[60:61], v[39:40], -v[41:42]
	v_mul_f64 v[62:63], v[54:55], 0.5
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[52:53], v[58:59], v[52:53]
	v_fma_f64 v[58:59], v[41:42], s[68:69], s[66:67]
	v_fma_f64 v[58:59], v[41:42], v[58:59], s[70:71]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[58:59], v[41:42], v[58:59], s[72:73]
	v_fma_f64 v[58:59], v[41:42], v[58:59], s[74:75]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[58:59], v[60:61], v[58:59], v[62:63]
	v_fma_f64 v[41:42], v[41:42], v[58:59], -v[54:55]
	v_dual_mov_b32 v59, v51 :: v_dual_mov_b32 v58, v50
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[41:42], v[60:61], s[80:81], v[41:42]
	v_add_f64 v[39:40], v[39:40], -v[41:42]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v37, v52, v39, s11
	v_cndmask_b32_e64 v39, v53, v40, s11
	v_lshlrev_b32_e32 v40, 30, v67
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v37, 0, v37, s7
	v_xor_b32_e32 v38, v40, v38
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v38, 0x80000000, v38
	v_xor_b32_e32 v38, v39, v38
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v38, 0x7ff80000, v38, s7
	v_mul_f64 v[37:38], v[56:57], v[37:38]
	v_dual_mov_b32 v57, v49 :: v_dual_mov_b32 v56, v48
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v26, v26, v38, s5
	v_cndmask_b32_e64 v25, v25, v37, s5
	v_cndmask_b32_e64 v24, v24, v38, s6
	v_cndmask_b32_e64 v23, v23, v37, s6
	v_cndmask_b32_e64 v22, v22, v38, s8
	v_cndmask_b32_e64 v21, v21, v37, s8
	v_cndmask_b32_e64 v20, v20, v38, s9
	v_cndmask_b32_e64 v19, v19, v37, s9
	v_cndmask_b32_e64 v18, v18, v38, s10
	v_cndmask_b32_e64 v17, v17, v37, s10
	s_cbranch_scc1 .LBB2_277
; %bb.286:                              ; %.lr.ph.i.i.6.i.i.preheader
                                        ;   in Loop: Header=BB2_276 Depth=1
	v_mov_b32_e32 v37, 0
	v_mov_b32_e32 v38, 0
	s_mov_b32 s9, 0
.LBB2_287:                              ; %.lr.ph.i.i.6.i.i
                                        ;   Parent Loop BB2_276 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB2_288 Depth 3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s9, 1
	s_mov_b32 s10, s9
	s_cselect_b32 s5, -1, 0
	s_cmp_eq_u32 s9, 2
	v_cndmask_b32_e64 v39, v28, v30, s5
	v_cndmask_b32_e64 v40, v27, v29, s5
	v_cndmask_b32_e64 v41, v18, v20, s5
	v_cndmask_b32_e64 v42, v17, v19, s5
	s_cselect_b32 s5, -1, 0
	s_cmp_eq_u32 s9, 3
	v_cndmask_b32_e64 v39, v39, v32, s5
	v_cndmask_b32_e64 v40, v40, v31, s5
	v_cndmask_b32_e64 v41, v41, v22, s5
	v_cndmask_b32_e64 v42, v42, v21, s5
	s_cselect_b32 s5, -1, 0
	s_cmp_eq_u32 s9, 4
	v_cndmask_b32_e64 v39, v39, v34, s5
	v_cndmask_b32_e64 v52, v40, v33, s5
	v_cndmask_b32_e64 v41, v41, v24, s5
	v_cndmask_b32_e64 v53, v42, v23, s5
	s_cselect_b32 s5, -1, 0
	s_delay_alu instid0(SALU_CYCLE_1)
	v_cndmask_b32_e64 v40, v39, v36, s5
	v_cndmask_b32_e64 v39, v52, v35, s5
	v_cndmask_b32_e64 v42, v41, v26, s5
	v_cndmask_b32_e64 v41, v53, v25, s5
.LBB2_288:                              ;   Parent Loop BB2_276 Depth=1
                                        ;     Parent Loop BB2_287 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_add_i32 s10, s10, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s10, 1
	s_cselect_b32 s5, -1, 0
	s_cmp_eq_u32 s10, 2
	v_cndmask_b32_e64 v53, v18, v20, s5
	v_cndmask_b32_e64 v54, v17, v19, s5
	s_cselect_b32 s6, -1, 0
	s_cmp_eq_u32 s10, 3
	v_cndmask_b32_e64 v52, v28, v30, s5
	v_cndmask_b32_e64 v53, v53, v22, s6
	v_cndmask_b32_e64 v54, v54, v21, s6
	s_cselect_b32 s7, -1, 0
	s_cmp_eq_u32 s10, 4
	v_cndmask_b32_e64 v52, v52, v32, s6
	v_cndmask_b32_e64 v55, v53, v24, s7
	v_cndmask_b32_e64 v54, v54, v23, s7
	s_cselect_b32 s8, -1, 0
	s_cmp_lt_u32 s10, 4
	v_cndmask_b32_e64 v52, v52, v34, s7
	v_cndmask_b32_e64 v55, v55, v26, s8
	v_cndmask_b32_e64 v54, v54, v25, s8
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v53, v52, v36, s8
	v_cndmask_b32_e64 v52, v27, v29, s5
	v_add_f64 v[54:55], v[41:42], -v[54:55]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v52, v52, v31, s6
	v_cndmask_b32_e64 v52, v52, v33, s7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v52, v52, v35, s8
	v_add_f64 v[52:53], v[39:40], -v[52:53]
	v_mul_f64 v[54:55], v[54:55], v[54:55]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[52:53], v[52:53], v[52:53], v[54:55]
	v_cmp_lt_f64_e64 s5, v[37:38], v[52:53]
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e64 v38, v38, v53, s5
	v_cndmask_b32_e64 v37, v37, v52, s5
	s_cbranch_scc1 .LBB2_288
; %bb.289:                              ; %.loopexit.i.i.6.i.i
                                        ;   in Loop: Header=BB2_287 Depth=2
	s_add_i32 s9, s9, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s9, 4
	s_cbranch_scc1 .LBB2_287
; %bb.290:                              ;   in Loop: Header=BB2_276 Depth=1
	v_cmp_gt_f64_e64 s5, 0x10000000, v[37:38]
	s_add_i32 s83, s83, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_cmp_lg_u32 s83, 0x10000
	v_cndmask_b32_e64 v39, 0, 1, s5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v39, 8, v39
	v_ldexp_f64 v[37:38], v[37:38], v39
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_rsq_f64_e32 v[39:40], v[37:38]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[41:42], v[37:38], v[39:40]
	v_mul_f64 v[39:40], v[39:40], 0.5
	v_fma_f64 v[52:53], -v[39:40], v[41:42], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[41:42], v[41:42], v[52:53], v[41:42]
	v_fma_f64 v[39:40], v[39:40], v[52:53], v[39:40]
	v_fma_f64 v[52:53], -v[41:42], v[41:42], v[37:38]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[41:42], v[52:53], v[39:40], v[41:42]
	v_fma_f64 v[52:53], -v[41:42], v[41:42], v[37:38]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[39:40], v[52:53], v[39:40], v[41:42]
	v_cndmask_b32_e64 v41, 0, 0xffffff80, s5
	v_cmp_class_f64_e64 s5, v[37:38], 0x260
	v_ldexp_f64 v[39:40], v[39:40], v41
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v38, v40, v38, s5
	v_cndmask_b32_e64 v37, v39, v37, s5
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[45:46], v[45:46], v[37:38]
	s_cbranch_scc1 .LBB2_276
; %bb.291:                              ; %_ZNK6thrust11hip_rocprim26transform_input_iterator_tIdNS_17counting_iteratorIjNS_11use_defaultES3_S3_EE11estimate_esEixEl.exit.6.i.i
	s_delay_alu instid0(VALU_DEP_1)
	v_ldexp_f64 v[13:14], v[45:46], -16
.LBB2_292:                              ; %Flow1213
	s_or_b32 exec_lo, exec_lo, s82
	v_or_b32_e32 v17, 0x700, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s5, s33, v17
	s_and_saveexec_b32 s80, s5
	s_cbranch_execz .LBB2_312
; %bb.293:
	s_movk_i32 s6, 0x1001
	s_mov_b64 s[10:11], 0
	v_mad_u64_u32 v[15:16], null, v66, s6, 0x7f456416
                                        ; implicit-def: $vgpr48_vgpr49
                                        ; implicit-def: $vgpr41_vgpr42
                                        ; implicit-def: $vgpr43_vgpr44
                                        ; implicit-def: $vgpr50_vgpr51
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v16, 19, v15
	v_xor3_b32 v15, v15, v16, 0xc761c23c
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v15, v15, 5, v15
	v_add_nc_u32_e32 v16, 0xe9f8cc1d, v15
	v_lshl_add_u32 v15, v15, 9, 0xaccf6200
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v15, v16, v15
	v_lshlrev_b32_e32 v16, 3, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v15, v15, v16, 0xfd7046c5
	v_lshrrev_b32_e32 v16, 16, v15
	s_delay_alu instid0(VALU_DEP_1)
	v_xor3_b32 v15, v15, v16, 0xb55a4f09
.LBB2_294:                              ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v16, 12, v15
	s_cmp_eq_u32 s10, 0
	s_cselect_b32 s6, -1, 0
	s_cmp_eq_u32 s10, 1
	v_add3_u32 v15, v15, v16, 0x7ed55d16
	s_cselect_b32 s7, -1, 0
	s_cmp_eq_u32 s10, 2
	s_cselect_b32 s8, -1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v16, 19, v15
	s_cmp_eq_u32 s10, 3
	s_cselect_b32 s9, -1, 0
	s_add_u32 s10, s10, 1
	v_xor3_b32 v15, v15, v16, 0xc761c23c
	s_addc_u32 s11, s11, 0
	s_cmp_lg_u32 s10, 4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v15, v15, 5, v15
	v_add_nc_u32_e32 v16, 0xe9f8cc1d, v15
	v_lshl_add_u32 v15, v15, 9, 0xaccf6200
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v15, v16, v15
	v_lshlrev_b32_e32 v16, 3, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v15, v15, v16, 0xfd7046c5
	v_lshrrev_b32_e32 v16, 16, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor3_b32 v15, v15, v16, 0xb55a4f09
	v_lshlrev_b32_e32 v17, 12, v15
	v_xor_b32_e32 v16, s23, v15
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add3_u32 v15, v15, v17, 0x7ed55d16
	v_cndmask_b32_e64 v49, v49, v16, s6
	v_cndmask_b32_e64 v42, v42, v16, s7
	v_cndmask_b32_e64 v44, v44, v16, s8
	v_cndmask_b32_e64 v51, v51, v16, s9
	v_lshrrev_b32_e32 v17, 19, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor3_b32 v15, v15, v17, 0xc761c23c
	v_lshl_add_u32 v15, v15, 5, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v17, 0xe9f8cc1d, v15
	v_lshl_add_u32 v15, v15, 9, 0xaccf6200
	v_xor_b32_e32 v15, v17, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v17, 3, v15
	v_add3_u32 v15, v15, v17, 0xfd7046c5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v17, 16, v15
	v_xor3_b32 v15, v15, v17, 0xb55a4f09
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v16, s22, v15
	v_cndmask_b32_e64 v48, v48, v16, s6
	v_cndmask_b32_e64 v41, v41, v16, s7
	v_cndmask_b32_e64 v43, v43, v16, s8
	v_cndmask_b32_e64 v50, v50, v16, s9
	s_cbranch_scc1 .LBB2_294
; %bb.295:                              ; %.preheader55.i.i.7.i.i.preheader
	v_mov_b32_e32 v45, 0
	v_dual_mov_b32 v46, 0 :: v_dual_mov_b32 v47, 0
	s_mov_b32 s22, 0x54442d18
	s_mov_b32 s24, 0x33145c07
	s_mov_b32 s26, 0x6dc9c883
	s_mov_b32 s30, 0x33145c00
	s_mov_b32 s34, 0x252049c0
	s_mov_b32 s36, 0x55555555
	s_mov_b32 s38, 0x6b47b09a
	s_mov_b32 s40, 0xbf559e2b
	s_mov_b32 s42, 0xd7f4df2e
	s_mov_b32 s44, 0x16291751
	s_mov_b32 s46, 0x9b27acf1
	s_mov_b32 s48, 0x998ef7b6
	s_mov_b32 s50, 0xfefa39ef
	s_mov_b32 s52, 0x3b39803f
	s_mov_b32 s54, 0x9037ab78
	s_mov_b32 s56, 0x46cc5e42
	s_mov_b32 s58, 0xa17f65f6
	s_mov_b32 s60, 0x19f4ec90
	s_mov_b32 s62, 0x16c16967
	s_mov_b32 s64, 0xb42fdfa7
	s_mov_b32 s66, 0xf9a43bb8
	s_mov_b32 s68, 0x796cde01
	s_mov_b32 s70, 0x19e83e5c
	s_mov_b32 s72, 0x11110bb3
	s_mov_b32 s81, 0
	s_mov_b32 s23, 0x401921fb
	s_mov_b32 s13, 0x3ff921fb
	s_mov_b32 s25, 0x3c91a626
	s_mov_b32 s27, 0x3fe45f30
	s_mov_b32 s29, 0xbff921fb
	s_mov_b32 s31, 0xbc91a626
	s_mov_b32 s35, 0xb97b839a
	s_mov_b32 s37, 0x3fe55555
	s_mov_b32 s39, 0x3fc38538
	s_mov_b32 s41, 0x3fc3ab76
	s_mov_b32 s43, 0x3fc7474d
	s_mov_b32 s45, 0x3fcc71c0
	s_mov_b32 s47, 0x3fd24924
	s_mov_b32 s49, 0x3fd99999
	s_mov_b32 s51, 0x3fe62e42
	s_mov_b32 s53, 0x3c7abc9e
	s_mov_b32 s55, 0x3e21eeb6
	s_mov_b32 s57, 0xbda907db
	s_mov_b32 s59, 0xbe927e4f
	s_mov_b32 s61, 0x3efa01a0
	s_mov_b32 s63, 0xbf56c16c
	s_mov_b32 s65, 0xbe5ae600
	s_mov_b32 s67, 0x3de5e0b2
	s_mov_b32 s69, 0x3ec71de3
	s_mov_b32 s71, 0xbf2a01a0
	s_mov_b32 s73, 0x3f811111
	s_mov_b32 s74, 0x55555780
	s_mov_b32 s77, 0x3fa55555
	s_mov_b32 s79, 0xbfc55555
                                        ; implicit-def: $vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30
                                        ; implicit-def: $vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31_vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40
.LBB2_296:                              ; %.preheader55.i.i.7.i.i
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB2_297 Depth 2
                                        ;     Child Loop BB2_307 Depth 2
                                        ;       Child Loop BB2_308 Depth 3
	v_dual_mov_b32 v57, v49 :: v_dual_mov_b32 v56, v48
	v_dual_mov_b32 v59, v51 :: v_dual_mov_b32 v58, v50
	s_mov_b32 s82, 0
.LBB2_297:                              ;   Parent Loop BB2_296 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v36, v42, v59
	v_xor_b32_e32 v35, v41, v58
                                        ; implicit-def: $vgpr67
                                        ; implicit-def: $vgpr52_vgpr53
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v69, v36, v57
	v_lshrrev_b64 v[49:50], 19, v[35:36]
	v_lshlrev_b32_e32 v37, 13, v35
	v_xor_b32_e32 v68, v35, v56
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_or_b32_e32 v70, v37, v50
	v_add_co_u32 v35, s6, v49, v68
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v36, s6, v70, v69, s6
	v_lshrrev_b64 v[35:36], 11, v[35:36]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_u32_e32 v[36:37], v36
	v_cvt_f64_u32_e32 v[38:39], v35
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[35:36], v[36:37], 32
	v_add_f64 v[35:36], v[35:36], v[38:39]
                                        ; implicit-def: $vgpr39_vgpr40
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[35:36], v[35:36], 0xffffffcb
	v_mul_f64 v[35:36], v[35:36], s[22:23]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ngt_f64_e64 s6, 0x41d00000, v[35:36]
	v_trig_preop_f64 v[62:63], v[35:36], 0
	v_trig_preop_f64 v[60:61], v[35:36], 1
	v_ldexp_f64 v[64:65], v[35:36], 0xffffff80
	v_trig_preop_f64 v[50:51], v[35:36], 2
	s_and_saveexec_b32 s7, s6
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s9, exec_lo, s7
	s_cbranch_execz .LBB2_299
; %bb.298:                              ;   in Loop: Header=BB2_297 Depth=2
	v_cmp_le_f64_e64 s7, 0x7b000000, v[35:36]
	s_mov_b32 s12, s22
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v38, v36, v65, s7
	v_cndmask_b32_e64 v37, v35, v64, s7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_f64 v[39:40], v[62:63], v[37:38]
	v_mul_f64 v[52:53], v[60:61], v[37:38]
	v_mul_f64 v[77:78], v[50:51], v[37:38]
	v_fma_f64 v[54:55], v[62:63], v[37:38], -v[39:40]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[79:80], v[60:61], v[37:38], -v[52:53]
	v_fma_f64 v[37:38], v[50:51], v[37:38], -v[77:78]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[66:67], v[52:53], v[54:55]
	v_add_f64 v[71:72], v[66:67], -v[52:53]
	v_add_f64 v[75:76], v[39:40], v[66:67]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[73:74], v[66:67], -v[71:72]
	v_add_f64 v[54:55], v[54:55], -v[71:72]
	v_ldexp_f64 v[71:72], v[75:76], -2
	v_add_f64 v[39:40], v[75:76], -v[39:40]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[52:53], v[52:53], -v[73:74]
	v_add_f64 v[73:74], v[77:78], v[79:80]
	v_cmp_neq_f64_e64 s7, 0x7ff00000, |v[71:72]|
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[39:40], v[66:67], -v[39:40]
	v_add_f64 v[52:53], v[54:55], v[52:53]
	v_fract_f64_e32 v[54:55], v[71:72]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[66:67], v[73:74], v[52:53]
	v_cndmask_b32_e64 v55, 0, v55, s7
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v54, 0, v54, s7
	v_ldexp_f64 v[54:55], v[54:55], 2
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[71:72], v[39:40], v[66:67]
	v_add_f64 v[81:82], v[66:67], -v[73:74]
	v_add_f64 v[75:76], v[71:72], v[54:55]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[87:88], v[66:67], -v[81:82]
	v_add_f64 v[52:53], v[52:53], -v[81:82]
	v_add_f64 v[39:40], v[71:72], -v[39:40]
	v_cmp_gt_f64_e64 s7, 0, v[75:76]
	v_add_f64 v[75:76], v[73:74], -v[77:78]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[39:40], v[66:67], -v[39:40]
	v_cndmask_b32_e64 v48, 0, 0x40100000, s7
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[85:86], v[73:74], -v[75:76]
	v_add_f64 v[75:76], v[79:80], -v[75:76]
	v_add_f64 v[73:74], v[73:74], -v[87:88]
	v_add_f64 v[54:55], v[54:55], v[47:48]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[79:80], v[77:78], -v[85:86]
	v_add_f64 v[52:53], v[52:53], v[73:74]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[83:84], v[71:72], v[54:55]
	v_add_f64 v[75:76], v[75:76], v[79:80]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_i32_f64_e32 v48, v[83:84]
	v_add_f64 v[52:53], v[75:76], v[52:53]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_i32_e32 v[81:82], v48
	v_add_f64 v[37:38], v[37:38], v[52:53]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[54:55], v[54:55], -v[81:82]
	v_add_f64 v[37:38], v[39:40], v[37:38]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[73:74], v[71:72], v[54:55]
	v_add_f64 v[52:53], v[73:74], -v[54:55]
	v_cmp_le_f64_e64 s7, 0.5, v[73:74]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[39:40], v[71:72], -v[52:53]
	v_add_co_ci_u32_e64 v67, s8, 0, v48, s7
	v_cndmask_b32_e64 v48, 0, 0x3ff00000, s7
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[37:38], v[37:38], v[39:40]
	v_add_f64 v[39:40], v[73:74], -v[47:48]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[52:53], v[39:40], v[37:38]
	v_mul_f64 v[54:55], v[52:53], s[12:13]
	v_add_f64 v[39:40], v[52:53], -v[39:40]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[71:72], v[52:53], s[12:13], -v[54:55]
	v_add_f64 v[37:38], v[37:38], -v[39:40]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[39:40], v[52:53], s[24:25], v[71:72]
	v_fma_f64 v[37:38], v[37:38], s[12:13], v[39:40]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[39:40], v[54:55], v[37:38]
	v_add_f64 v[52:53], v[39:40], -v[54:55]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[52:53], v[37:38], -v[52:53]
.LBB2_299:                              ; %Flow1209
                                        ;   in Loop: Header=BB2_297 Depth=2
	s_and_not1_saveexec_b32 s7, s9
	s_cbranch_execz .LBB2_301
; %bb.300:                              ;   in Loop: Header=BB2_297 Depth=2
	v_mul_f64 v[37:38], v[35:36], s[26:27]
	s_mov_b32 s28, s22
	s_mov_b32 s8, s30
	s_mov_b32 s9, s25
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[37:38], v[37:38]
	v_fma_f64 v[39:40], v[37:38], s[28:29], v[35:36]
	v_mul_f64 v[52:53], v[37:38], s[30:31]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[66:67], v[37:38], s[30:31], v[39:40]
	v_add_f64 v[54:55], v[39:40], v[52:53]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[39:40], v[39:40], -v[54:55]
	v_add_f64 v[54:55], v[54:55], -v[66:67]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[39:40], v[39:40], v[52:53]
	v_fma_f64 v[52:53], v[37:38], s[8:9], v[52:53]
	v_add_f64 v[39:40], v[54:55], v[39:40]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[39:40], v[39:40], -v[52:53]
	v_fma_f64 v[52:53], v[37:38], s[34:35], v[39:40]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[39:40], v[66:67], v[52:53]
	v_add_f64 v[54:55], v[39:40], -v[66:67]
	v_cvt_i32_f64_e32 v67, v[37:38]
	s_delay_alu instid0(VALU_DEP_2)
	v_add_f64 v[52:53], v[52:53], -v[54:55]
.LBB2_301:                              ; %_ZL3cosd.exit.i.i.7.i.i
                                        ;   in Loop: Header=BB2_297 Depth=2
	s_or_b32 exec_lo, exec_lo, s7
                                        ; implicit-def: $vgpr66
                                        ; implicit-def: $vgpr37_vgpr38
                                        ; implicit-def: $vgpr54_vgpr55
	s_and_saveexec_b32 s7, s6
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s8, exec_lo, s7
	s_cbranch_execz .LBB2_303
; %bb.302:                              ;   in Loop: Header=BB2_297 Depth=2
	v_cmp_le_f64_e64 s6, 0x7b000000, v[35:36]
	s_mov_b32 s12, s22
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v38, v36, v65, s6
	v_cndmask_b32_e64 v37, v35, v64, s6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_f64 v[54:55], v[62:63], v[37:38]
	v_mul_f64 v[64:65], v[60:61], v[37:38]
	v_mul_f64 v[79:80], v[50:51], v[37:38]
	v_fma_f64 v[62:63], v[62:63], v[37:38], -v[54:55]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[60:61], v[60:61], v[37:38], -v[64:65]
	v_fma_f64 v[37:38], v[50:51], v[37:38], -v[79:80]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[71:72], v[64:65], v[62:63]
	v_add_f64 v[73:74], v[71:72], -v[64:65]
	v_add_f64 v[77:78], v[54:55], v[71:72]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[75:76], v[71:72], -v[73:74]
	v_add_f64 v[62:63], v[62:63], -v[73:74]
	v_ldexp_f64 v[73:74], v[77:78], -2
	v_add_f64 v[54:55], v[77:78], -v[54:55]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[64:65], v[64:65], -v[75:76]
	v_add_f64 v[75:76], v[79:80], v[60:61]
	v_cmp_neq_f64_e64 s6, 0x7ff00000, |v[73:74]|
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[54:55], v[71:72], -v[54:55]
	v_add_f64 v[62:63], v[62:63], v[64:65]
	v_fract_f64_e32 v[64:65], v[73:74]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[71:72], v[75:76], v[62:63]
	v_cndmask_b32_e64 v65, 0, v65, s6
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v64, 0, v64, s6
	v_ldexp_f64 v[64:65], v[64:65], 2
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[73:74], v[54:55], v[71:72]
	v_add_f64 v[81:82], v[71:72], -v[75:76]
	v_add_f64 v[77:78], v[73:74], v[64:65]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[87:88], v[71:72], -v[81:82]
	v_add_f64 v[62:63], v[62:63], -v[81:82]
	v_add_f64 v[50:51], v[73:74], -v[54:55]
	v_cmp_gt_f64_e64 s6, 0, v[77:78]
	v_add_f64 v[77:78], v[75:76], -v[79:80]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[50:51], v[71:72], -v[50:51]
	v_cndmask_b32_e64 v48, 0, 0x40100000, s6
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[85:86], v[75:76], -v[77:78]
	v_add_f64 v[60:61], v[60:61], -v[77:78]
	v_add_f64 v[75:76], v[75:76], -v[87:88]
	v_add_f64 v[64:65], v[64:65], v[47:48]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[77:78], v[79:80], -v[85:86]
	v_add_f64 v[62:63], v[62:63], v[75:76]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[83:84], v[73:74], v[64:65]
	v_add_f64 v[60:61], v[60:61], v[77:78]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_i32_f64_e32 v48, v[83:84]
	v_add_f64 v[54:55], v[60:61], v[62:63]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_i32_e32 v[81:82], v48
	v_add_f64 v[37:38], v[37:38], v[54:55]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[64:65], v[64:65], -v[81:82]
	v_add_f64 v[37:38], v[50:51], v[37:38]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[60:61], v[73:74], v[64:65]
	v_add_f64 v[54:55], v[60:61], -v[64:65]
	v_cmp_le_f64_e64 s6, 0.5, v[60:61]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[50:51], v[73:74], -v[54:55]
	v_add_co_ci_u32_e64 v66, s7, 0, v48, s6
	v_cndmask_b32_e64 v48, 0, 0x3ff00000, s6
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[37:38], v[37:38], v[50:51]
	v_add_f64 v[50:51], v[60:61], -v[47:48]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[54:55], v[50:51], v[37:38]
	v_mul_f64 v[60:61], v[54:55], s[12:13]
	v_add_f64 v[50:51], v[54:55], -v[50:51]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[62:63], v[54:55], s[12:13], -v[60:61]
	v_add_f64 v[37:38], v[37:38], -v[50:51]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[50:51], v[54:55], s[24:25], v[62:63]
	v_fma_f64 v[50:51], v[37:38], s[12:13], v[50:51]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[37:38], v[60:61], v[50:51]
	v_add_f64 v[54:55], v[37:38], -v[60:61]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[54:55], v[50:51], -v[54:55]
.LBB2_303:                              ; %Flow1208
                                        ;   in Loop: Header=BB2_297 Depth=2
	s_and_not1_saveexec_b32 s6, s8
	s_cbranch_execz .LBB2_305
; %bb.304:                              ;   in Loop: Header=BB2_297 Depth=2
	v_mul_f64 v[37:38], v[35:36], s[26:27]
	s_mov_b32 s28, s22
	s_mov_b32 s8, s30
	s_mov_b32 s9, s25
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[50:51], v[37:38]
	v_fma_f64 v[37:38], v[50:51], s[28:29], v[35:36]
	v_mul_f64 v[54:55], v[50:51], s[30:31]
	v_cvt_i32_f64_e32 v66, v[50:51]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[62:63], v[50:51], s[30:31], v[37:38]
	v_add_f64 v[60:61], v[37:38], v[54:55]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[37:38], v[37:38], -v[60:61]
	v_add_f64 v[60:61], v[60:61], -v[62:63]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[37:38], v[37:38], v[54:55]
	v_fma_f64 v[54:55], v[50:51], s[8:9], v[54:55]
	v_add_f64 v[37:38], v[60:61], v[37:38]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[37:38], v[37:38], -v[54:55]
	v_fma_f64 v[54:55], v[50:51], s[34:35], v[37:38]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[37:38], v[62:63], v[54:55]
	v_add_f64 v[60:61], v[37:38], -v[62:63]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[54:55], v[54:55], -v[60:61]
.LBB2_305:                              ; %_ZL3sind.exit.i.i.7.i.i
                                        ;   in Loop: Header=BB2_297 Depth=2
	s_or_b32 exec_lo, exec_lo, s6
	v_xor_b32_e32 v43, v43, v56
	v_add_co_u32 v56, s6, v58, v56
	v_xor_b32_e32 v44, v44, v57
	v_add_co_ci_u32_e64 v57, s6, v59, v57, s6
	v_lshlrev_b64 v[50:51], 17, v[41:42]
	v_xor_b32_e32 v41, v43, v41
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_xor_b32_e32 v42, v44, v42
	v_lshrrev_b64 v[56:57], 11, v[56:57]
	s_mov_b32 s75, s37
	s_mov_b32 s76, s36
	v_xor_b32_e32 v48, v44, v51
	v_xor_b32_e32 v50, v43, v50
	v_lshlrev_b64 v[43:44], 17, v[41:42]
	v_cvt_f64_u32_e32 v[57:58], v57
	v_xor_b32_e32 v61, v42, v70
	v_xor_b32_e32 v51, v48, v69
	v_xor_b32_e32 v50, v50, v68
	v_xor_b32_e32 v60, v41, v49
	s_mov_b32 s78, s36
	v_xor_b32_e32 v49, v61, v69
	v_xor_b32_e32 v42, v51, v42
	v_xor_b32_e32 v41, v50, v41
	v_xor_b32_e32 v44, v51, v44
	v_xor_b32_e32 v43, v50, v43
	v_lshrrev_b64 v[50:51], 19, v[60:61]
	v_xor_b32_e32 v48, v60, v68
	v_lshlrev_b32_e32 v60, 13, v60
	v_cmp_lg_f64_e64 s8, 0x7ff00000, v[35:36]
	s_cmp_eq_u32 s82, 4
	v_and_b32_e32 v35, 1, v66
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_or_b32_e32 v51, v60, v51
	v_cvt_f64_u32_e32 v[59:60], v56
	v_cmp_eq_u32_e64 s12, 0, v35
	v_ldexp_f64 v[57:58], v[57:58], 32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[56:57], v[57:58], v[59:60]
	v_ldexp_f64 v[56:57], v[56:57], 0xffffffcb
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_frexp_mant_f64_e32 v[58:59], v[56:57]
	v_cmp_gt_f64_e64 s6, s[36:37], v[58:59]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v60, 0, 1, s6
	v_ldexp_f64 v[58:59], v[58:59], v60
	v_frexp_exp_i32_f64_e32 v60, v[56:57]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[62:63], v[58:59], 1.0
	v_subrev_co_ci_u32_e64 v74, s6, 0, v60, s6
	v_add_f64 v[60:61], v[58:59], -1.0
	v_cmp_eq_f64_e64 s6, 0x7ff00000, v[56:57]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[64:65], v[62:63], -1.0
	v_add_f64 v[58:59], v[58:59], -v[64:65]
	v_rcp_f64_e32 v[64:65], v[62:63]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[68:69], -v[62:63], v[64:65], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[64:65], v[68:69], v[64:65], v[64:65]
	v_fma_f64 v[68:69], -v[62:63], v[64:65], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[64:65], v[68:69], v[64:65], v[64:65]
	v_mul_f64 v[68:69], v[60:61], v[64:65]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[70:71], v[62:63], v[68:69]
	v_fma_f64 v[62:63], v[68:69], v[62:63], -v[70:71]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[58:59], v[68:69], v[58:59], v[62:63]
	v_add_f64 v[62:63], v[70:71], v[58:59]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[72:73], v[60:61], -v[62:63]
	v_add_f64 v[70:71], v[62:63], -v[70:71]
	v_add_f64 v[60:61], v[60:61], -v[72:73]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[58:59], v[70:71], -v[58:59]
	v_add_f64 v[60:61], v[60:61], -v[62:63]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[58:59], v[58:59], v[60:61]
	v_add_f64 v[58:59], v[72:73], v[58:59]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[58:59], v[64:65], v[58:59]
	v_add_f64 v[60:61], v[68:69], v[58:59]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[62:63], v[60:61], -v[68:69]
	v_ldexp_f64 v[68:69], v[60:61], 1
	v_add_f64 v[58:59], v[58:59], -v[62:63]
	v_mul_f64 v[62:63], v[60:61], v[60:61]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[58:59], v[58:59], 1
	v_fma_f64 v[64:65], v[62:63], s[40:41], s[38:39]
	v_mul_f64 v[60:61], v[60:61], v[62:63]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[64:65], v[62:63], v[64:65], s[42:43]
	v_fma_f64 v[64:65], v[62:63], v[64:65], s[44:45]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[64:65], v[62:63], v[64:65], s[46:47]
	v_fma_f64 v[64:65], v[62:63], v[64:65], s[48:49]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[64:65], v[62:63], v[64:65], s[74:75]
	v_mul_f64 v[60:61], v[60:61], v[64:65]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[62:63], v[68:69], v[60:61]
	v_add_f64 v[64:65], v[62:63], -v[68:69]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[60:61], v[60:61], -v[64:65]
	v_add_f64 v[58:59], v[58:59], v[60:61]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[60:61], v[62:63], v[58:59]
	v_add_f64 v[62:63], v[60:61], -v[62:63]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[58:59], v[58:59], -v[62:63]
	v_cvt_f64_i32_e32 v[62:63], v74
	v_mul_f64 v[64:65], v[62:63], s[50:51]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[68:69], v[62:63], s[50:51], -v[64:65]
	v_fma_f64 v[62:63], v[62:63], s[52:53], v[68:69]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[68:69], v[64:65], v[62:63]
	v_add_f64 v[64:65], v[68:69], -v[64:65]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[62:63], v[62:63], -v[64:65]
	v_add_f64 v[64:65], v[68:69], v[60:61]
	v_add_f64 v[70:71], v[64:65], -v[68:69]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[72:73], v[64:65], -v[70:71]
	v_add_f64 v[60:61], v[60:61], -v[70:71]
	v_add_f64 v[68:69], v[68:69], -v[72:73]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[60:61], v[60:61], v[68:69]
	v_add_f64 v[68:69], v[62:63], v[58:59]
	v_add_f64 v[70:71], v[68:69], -v[62:63]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[60:61], v[68:69], v[60:61]
	v_add_f64 v[72:73], v[68:69], -v[70:71]
	v_add_f64 v[58:59], v[58:59], -v[70:71]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[62:63], v[62:63], -v[72:73]
	v_add_f64 v[58:59], v[58:59], v[62:63]
	v_add_f64 v[62:63], v[64:65], v[60:61]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[64:65], v[62:63], -v[64:65]
	v_add_f64 v[60:61], v[60:61], -v[64:65]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[58:59], v[58:59], v[60:61]
	v_add_f64 v[58:59], v[62:63], v[58:59]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v59, v59, v57, s6
	v_cndmask_b32_e64 v58, v58, v56, s6
	v_cmp_ngt_f64_e64 s6, 0, v[56:57]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[58:59], v[58:59], -2.0
	v_cndmask_b32_e64 v59, 0x7ff80000, v59, s6
	v_cmp_nge_f64_e64 s6, 0, v[56:57]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v58, 0, v58, s6
	v_cmp_neq_f64_e64 s6, 0, v[56:57]
	v_cndmask_b32_e64 v59, 0x7ff00000, v59, s6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_f64_e64 s6, 0x10000000, v[58:59]
	v_cndmask_b32_e64 v56, 0, 1, s6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v56, 8, v56
	v_ldexp_f64 v[56:57], v[58:59], v56
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_rsq_f64_e32 v[58:59], v[56:57]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[60:61], v[56:57], v[58:59]
	v_mul_f64 v[58:59], v[58:59], 0.5
	v_fma_f64 v[62:63], -v[58:59], v[60:61], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[60:61], v[60:61], v[62:63], v[60:61]
	v_fma_f64 v[58:59], v[58:59], v[62:63], v[58:59]
	v_fma_f64 v[64:65], -v[60:61], v[60:61], v[56:57]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[60:61], v[64:65], v[58:59], v[60:61]
	v_fma_f64 v[62:63], -v[60:61], v[60:61], v[56:57]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[58:59], v[62:63], v[58:59], v[60:61]
	v_cndmask_b32_e64 v60, 0, 0xffffff80, s6
	v_cmp_class_f64_e64 s6, v[56:57], 0x260
	v_ldexp_f64 v[58:59], v[58:59], v60
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v57, v59, v57, s6
	v_cndmask_b32_e64 v56, v58, v56, s6
	v_mul_f64 v[58:59], v[39:40], v[39:40]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[60:61], v[58:59], 0.5
	v_fma_f64 v[68:69], v[58:59], s[56:57], s[54:55]
	v_add_f64 v[62:63], -v[60:61], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[68:69], v[58:59], v[68:69], s[58:59]
	v_add_f64 v[64:65], -v[62:63], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[68:69], v[58:59], v[68:69], s[60:61]
	v_add_f64 v[60:61], v[64:65], -v[60:61]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[68:69], v[58:59], v[68:69], s[62:63]
	v_mul_f64 v[64:65], v[58:59], v[58:59]
	v_fma_f64 v[60:61], v[39:40], -v[52:53], v[60:61]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[68:69], v[58:59], v[68:69], s[76:77]
	v_fma_f64 v[60:61], v[64:65], v[68:69], v[60:61]
	v_mul_f64 v[64:65], v[39:40], -v[58:59]
	v_mul_f64 v[68:69], v[52:53], 0.5
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[60:61], v[62:63], v[60:61]
	v_fma_f64 v[62:63], v[58:59], s[66:67], s[64:65]
	v_fma_f64 v[62:63], v[58:59], v[62:63], s[68:69]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[62:63], v[58:59], v[62:63], s[70:71]
	v_fma_f64 v[62:63], v[58:59], v[62:63], s[72:73]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[62:63], v[64:65], v[62:63], v[68:69]
	v_fma_f64 v[52:53], v[58:59], v[62:63], -v[52:53]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[52:53], v[64:65], s[78:79], v[52:53]
	v_add_f64 v[39:40], v[39:40], -v[52:53]
	v_and_b32_e32 v52, 1, v67
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s6, 0, v52
	v_lshlrev_b32_e32 v52, 30, v67
	v_and_b32_e32 v52, 0x80000000, v52
	v_xor_b32_e32 v40, 0x80000000, v40
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v39, v39, v60, s6
	v_cndmask_b32_e64 v40, v40, v61, s6
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v39, 0, v39, s8
	s_cselect_b32 s6, -1, 0
	s_cmp_eq_u32 s82, 3
	v_xor_b32_e32 v40, v40, v52
	s_cselect_b32 s7, -1, 0
	s_cmp_eq_u32 s82, 2
	s_cselect_b32 s9, -1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v40, 0x7ff80000, v40, s8
	s_cmp_eq_u32 s82, 1
	s_cselect_b32 s10, -1, 0
	s_cmp_eq_u32 s82, 0
	v_mul_f64 v[39:40], v[56:57], v[39:40]
	s_cselect_b32 s11, -1, 0
	s_add_i32 s82, s82, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_cmp_lg_u32 s82, 5
	v_cndmask_b32_e64 v34, v34, v40, s6
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e64 v33, v33, v39, s6
	v_cndmask_b32_e64 v32, v32, v40, s7
	v_cndmask_b32_e64 v31, v31, v39, s7
	v_cndmask_b32_e64 v30, v30, v40, s9
	v_cndmask_b32_e64 v29, v29, v39, s9
	v_cndmask_b32_e64 v28, v28, v40, s10
	v_cndmask_b32_e64 v27, v27, v39, s10
	v_cndmask_b32_e64 v26, v26, v40, s11
	v_cndmask_b32_e64 v25, v25, v39, s11
	v_mul_f64 v[39:40], v[37:38], v[37:38]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[52:53], v[39:40], 0.5
	v_fma_f64 v[62:63], v[39:40], s[56:57], s[54:55]
	v_add_f64 v[58:59], -v[52:53], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[62:63], v[39:40], v[62:63], s[58:59]
	v_add_f64 v[60:61], -v[58:59], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[62:63], v[39:40], v[62:63], s[60:61]
	v_add_f64 v[52:53], v[60:61], -v[52:53]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[62:63], v[39:40], v[62:63], s[62:63]
	v_mul_f64 v[60:61], v[39:40], v[39:40]
	v_fma_f64 v[52:53], v[37:38], -v[54:55], v[52:53]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[62:63], v[39:40], v[62:63], s[76:77]
	v_fma_f64 v[52:53], v[60:61], v[62:63], v[52:53]
	v_mul_f64 v[60:61], v[37:38], -v[39:40]
	v_mul_f64 v[62:63], v[54:55], 0.5
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[52:53], v[58:59], v[52:53]
	v_fma_f64 v[58:59], v[39:40], s[66:67], s[64:65]
	v_fma_f64 v[58:59], v[39:40], v[58:59], s[68:69]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[58:59], v[39:40], v[58:59], s[70:71]
	v_fma_f64 v[58:59], v[39:40], v[58:59], s[72:73]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[58:59], v[60:61], v[58:59], v[62:63]
	v_fma_f64 v[39:40], v[39:40], v[58:59], -v[54:55]
	v_dual_mov_b32 v59, v51 :: v_dual_mov_b32 v58, v50
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[39:40], v[60:61], s[78:79], v[39:40]
	v_add_f64 v[37:38], v[37:38], -v[39:40]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v35, v52, v37, s12
	v_cndmask_b32_e64 v37, v53, v38, s12
	v_lshlrev_b32_e32 v38, 30, v66
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v35, 0, v35, s8
	v_xor_b32_e32 v36, v38, v36
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v36, 0x80000000, v36
	v_xor_b32_e32 v36, v37, v36
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v36, 0x7ff80000, v36, s8
	v_mul_f64 v[35:36], v[56:57], v[35:36]
	v_dual_mov_b32 v57, v49 :: v_dual_mov_b32 v56, v48
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v24, v24, v36, s6
	v_cndmask_b32_e64 v23, v23, v35, s6
	v_cndmask_b32_e64 v22, v22, v36, s7
	v_cndmask_b32_e64 v21, v21, v35, s7
	v_cndmask_b32_e64 v20, v20, v36, s9
	v_cndmask_b32_e64 v19, v19, v35, s9
	v_cndmask_b32_e64 v18, v18, v36, s10
	v_cndmask_b32_e64 v17, v17, v35, s10
	v_cndmask_b32_e64 v16, v16, v36, s11
	v_cndmask_b32_e64 v15, v15, v35, s11
	s_cbranch_scc1 .LBB2_297
; %bb.306:                              ; %.lr.ph.i.i.7.i.i.preheader
                                        ;   in Loop: Header=BB2_296 Depth=1
	v_mov_b32_e32 v35, 0
	v_mov_b32_e32 v36, 0
	s_mov_b32 s10, 0
.LBB2_307:                              ; %.lr.ph.i.i.7.i.i
                                        ;   Parent Loop BB2_296 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB2_308 Depth 3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s10, 1
	s_mov_b32 s11, s10
	s_cselect_b32 s6, -1, 0
	s_cmp_eq_u32 s10, 2
	v_cndmask_b32_e64 v37, v26, v28, s6
	v_cndmask_b32_e64 v38, v25, v27, s6
	v_cndmask_b32_e64 v39, v16, v18, s6
	v_cndmask_b32_e64 v40, v15, v17, s6
	s_cselect_b32 s6, -1, 0
	s_cmp_eq_u32 s10, 3
	v_cndmask_b32_e64 v37, v37, v30, s6
	v_cndmask_b32_e64 v38, v38, v29, s6
	v_cndmask_b32_e64 v39, v39, v20, s6
	v_cndmask_b32_e64 v40, v40, v19, s6
	s_cselect_b32 s6, -1, 0
	s_cmp_eq_u32 s10, 4
	v_cndmask_b32_e64 v37, v37, v32, s6
	v_cndmask_b32_e64 v52, v38, v31, s6
	v_cndmask_b32_e64 v39, v39, v22, s6
	v_cndmask_b32_e64 v53, v40, v21, s6
	s_cselect_b32 s6, -1, 0
	s_delay_alu instid0(SALU_CYCLE_1)
	v_cndmask_b32_e64 v38, v37, v34, s6
	v_cndmask_b32_e64 v37, v52, v33, s6
	v_cndmask_b32_e64 v40, v39, v24, s6
	v_cndmask_b32_e64 v39, v53, v23, s6
.LBB2_308:                              ;   Parent Loop BB2_296 Depth=1
                                        ;     Parent Loop BB2_307 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_add_i32 s11, s11, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s11, 1
	s_cselect_b32 s6, -1, 0
	s_cmp_eq_u32 s11, 2
	v_cndmask_b32_e64 v53, v16, v18, s6
	v_cndmask_b32_e64 v54, v15, v17, s6
	s_cselect_b32 s7, -1, 0
	s_cmp_eq_u32 s11, 3
	v_cndmask_b32_e64 v52, v26, v28, s6
	v_cndmask_b32_e64 v53, v53, v20, s7
	v_cndmask_b32_e64 v54, v54, v19, s7
	s_cselect_b32 s8, -1, 0
	s_cmp_eq_u32 s11, 4
	v_cndmask_b32_e64 v52, v52, v30, s7
	v_cndmask_b32_e64 v55, v53, v22, s8
	v_cndmask_b32_e64 v54, v54, v21, s8
	s_cselect_b32 s9, -1, 0
	s_cmp_lt_u32 s11, 4
	v_cndmask_b32_e64 v52, v52, v32, s8
	v_cndmask_b32_e64 v55, v55, v24, s9
	v_cndmask_b32_e64 v54, v54, v23, s9
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v53, v52, v34, s9
	v_cndmask_b32_e64 v52, v25, v27, s6
	v_add_f64 v[54:55], v[39:40], -v[54:55]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v52, v52, v29, s7
	v_cndmask_b32_e64 v52, v52, v31, s8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v52, v52, v33, s9
	v_add_f64 v[52:53], v[37:38], -v[52:53]
	v_mul_f64 v[54:55], v[54:55], v[54:55]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[52:53], v[52:53], v[52:53], v[54:55]
	v_cmp_lt_f64_e64 s6, v[35:36], v[52:53]
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e64 v36, v36, v53, s6
	v_cndmask_b32_e64 v35, v35, v52, s6
	s_cbranch_scc1 .LBB2_308
; %bb.309:                              ; %.loopexit.i.i.7.i.i
                                        ;   in Loop: Header=BB2_307 Depth=2
	s_add_i32 s10, s10, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s10, 4
	s_cbranch_scc1 .LBB2_307
; %bb.310:                              ;   in Loop: Header=BB2_296 Depth=1
	v_cmp_gt_f64_e64 s6, 0x10000000, v[35:36]
	s_add_i32 s81, s81, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_cmp_lg_u32 s81, 0x10000
	v_cndmask_b32_e64 v37, 0, 1, s6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v37, 8, v37
	v_ldexp_f64 v[35:36], v[35:36], v37
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_rsq_f64_e32 v[37:38], v[35:36]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[39:40], v[35:36], v[37:38]
	v_mul_f64 v[37:38], v[37:38], 0.5
	v_fma_f64 v[52:53], -v[37:38], v[39:40], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[39:40], v[39:40], v[52:53], v[39:40]
	v_fma_f64 v[37:38], v[37:38], v[52:53], v[37:38]
	v_fma_f64 v[52:53], -v[39:40], v[39:40], v[35:36]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[39:40], v[52:53], v[37:38], v[39:40]
	v_fma_f64 v[52:53], -v[39:40], v[39:40], v[35:36]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[37:38], v[52:53], v[37:38], v[39:40]
	v_cndmask_b32_e64 v39, 0, 0xffffff80, s6
	v_cmp_class_f64_e64 s6, v[35:36], 0x260
	v_ldexp_f64 v[37:38], v[37:38], v39
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v36, v38, v36, s6
	v_cndmask_b32_e64 v35, v37, v35, s6
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[45:46], v[45:46], v[35:36]
	s_cbranch_scc1 .LBB2_296
; %bb.311:                              ; %_ZNK6thrust11hip_rocprim26transform_input_iterator_tIdNS_17counting_iteratorIjNS_11use_defaultES3_S3_EE11estimate_esEixEl.exit.7.i.i
	s_delay_alu instid0(VALU_DEP_1)
	v_ldexp_f64 v[15:16], v[45:46], -16
.LBB2_312:                              ; %Flow1210
	s_or_b32 exec_lo, exec_lo, s80
	v_cndmask_b32_e32 v4, 0x80000000, v4, vcc_lo
	v_cndmask_b32_e32 v3, 0, v3, vcc_lo
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[1:2], v[1:2], v[3:4]
	v_cndmask_b32_e64 v4, 0x80000000, v6, s0
	v_and_b32_e32 v6, 0xe0, v0
	v_cndmask_b32_e64 v3, 0, v5, s0
	v_mbcnt_lo_u32_b32 v5, -1, 0
	s_min_u32 s0, s33, 0x100
	s_delay_alu instid0(VALU_DEP_3) | instid1(SALU_CYCLE_1)
	v_sub_nc_u32_e64 v6, s0, v6 clamp
	s_delay_alu instid0(VALU_DEP_2)
	v_cmp_ne_u32_e32 vcc_lo, 31, v5
	v_add_f64 v[1:2], v[3:4], v[1:2]
	v_cndmask_b32_e64 v4, 0x80000000, v8, s1
	v_cndmask_b32_e64 v3, 0, v7, s1
	v_add_nc_u32_e32 v7, 1, v5
	s_mov_b32 s1, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_f64 v[1:2], v[3:4], v[1:2]
	v_cndmask_b32_e64 v4, 0x80000000, v10, s2
	v_cndmask_b32_e64 v3, 0, v9, s2
	v_add_f64 v[1:2], v[3:4], v[1:2]
	v_cndmask_b32_e64 v4, 0x80000000, v12, s3
	v_cndmask_b32_e64 v3, 0, v11, s3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_f64 v[1:2], v[3:4], v[1:2]
	v_cndmask_b32_e64 v4, 0x80000000, v14, s4
	v_cndmask_b32_e64 v3, 0, v13, s4
	v_add_f64 v[1:2], v[3:4], v[1:2]
	v_cndmask_b32_e64 v4, 0x80000000, v16, s5
	v_cndmask_b32_e64 v3, 0, v15, s5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[1:2], v[3:4], v[1:2]
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v5, vcc_lo
	v_lshlrev_b32_e32 v4, 2, v3
	ds_bpermute_b32 v3, v4, v1
	ds_bpermute_b32 v4, v4, v2
	v_cmpx_lt_u32_e64 v7, v6
	s_cbranch_execz .LBB2_314
; %bb.313:
	s_waitcnt lgkmcnt(0)
	v_add_f64 v[1:2], v[1:2], v[3:4]
.LBB2_314:
	s_or_b32 exec_lo, exec_lo, s1
	v_cmp_gt_u32_e32 vcc_lo, 30, v5
	v_add_nc_u32_e32 v7, 2, v5
	s_mov_b32 s1, exec_lo
	s_waitcnt lgkmcnt(1)
	v_cndmask_b32_e64 v3, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v3, 1, v3
	s_waitcnt lgkmcnt(0)
	v_add_lshl_u32 v4, v3, v5, 2
	ds_bpermute_b32 v3, v4, v1
	ds_bpermute_b32 v4, v4, v2
	v_cmpx_lt_u32_e64 v7, v6
	s_cbranch_execz .LBB2_316
; %bb.315:
	s_waitcnt lgkmcnt(0)
	v_add_f64 v[1:2], v[1:2], v[3:4]
.LBB2_316:
	s_or_b32 exec_lo, exec_lo, s1
	v_cmp_gt_u32_e32 vcc_lo, 28, v5
	v_add_nc_u32_e32 v7, 4, v5
	s_mov_b32 s1, exec_lo
	s_waitcnt lgkmcnt(1)
	v_cndmask_b32_e64 v3, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v3, 2, v3
	s_waitcnt lgkmcnt(0)
	v_add_lshl_u32 v4, v3, v5, 2
	ds_bpermute_b32 v3, v4, v1
	ds_bpermute_b32 v4, v4, v2
	v_cmpx_lt_u32_e64 v7, v6
	s_cbranch_execz .LBB2_318
; %bb.317:
	s_waitcnt lgkmcnt(0)
	v_add_f64 v[1:2], v[1:2], v[3:4]
.LBB2_318:
	s_or_b32 exec_lo, exec_lo, s1
	v_cmp_gt_u32_e32 vcc_lo, 24, v5
	v_add_nc_u32_e32 v7, 8, v5
	s_mov_b32 s1, exec_lo
	s_waitcnt lgkmcnt(1)
	v_cndmask_b32_e64 v3, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v3, 3, v3
	s_waitcnt lgkmcnt(0)
	v_add_lshl_u32 v4, v3, v5, 2
	ds_bpermute_b32 v3, v4, v1
	ds_bpermute_b32 v4, v4, v2
	v_cmpx_lt_u32_e64 v7, v6
	s_cbranch_execz .LBB2_320
; %bb.319:
	s_waitcnt lgkmcnt(0)
	v_add_f64 v[1:2], v[1:2], v[3:4]
.LBB2_320:
	s_or_b32 exec_lo, exec_lo, s1
	v_cmp_gt_u32_e32 vcc_lo, 16, v5
	v_add_nc_u32_e32 v7, 16, v5
	s_mov_b32 s1, exec_lo
	s_waitcnt lgkmcnt(1)
	v_cndmask_b32_e64 v3, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v3, 4, v3
	s_waitcnt lgkmcnt(0)
	v_add_lshl_u32 v4, v3, v5, 2
	ds_bpermute_b32 v3, v4, v1
	ds_bpermute_b32 v4, v4, v2
	v_cmpx_lt_u32_e64 v7, v6
	s_cbranch_execz .LBB2_322
; %bb.321:
	s_waitcnt lgkmcnt(0)
	v_add_f64 v[1:2], v[1:2], v[3:4]
.LBB2_322:                              ; %_ZN7rocprim6detail15warp_reduce_dppIdLj32ELb0EE6reduceIN6thrust4plusIdEEEEvdRdjT_.exit.i.i.i.i.i
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s1, exec_lo
	v_cmpx_eq_u32_e32 0, v5
	s_cbranch_execz .LBB2_324
; %bb.323:
	s_waitcnt lgkmcnt(1)
	v_lshrrev_b32_e32 v3, 2, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v3, 56, v3
	ds_store_b64 v3, v[1:2] offset:64
.LBB2_324:
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s1, exec_lo
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmpx_gt_u32_e32 8, v0
	s_cbranch_execz .LBB2_332
; %bb.325:
	v_lshlrev_b32_e32 v1, 3, v5
	v_and_b32_e32 v6, 7, v5
	s_add_i32 s0, s0, 31
	s_mov_b32 s2, exec_lo
	s_lshr_b32 s0, s0, 5
	ds_load_b64 v[1:2], v1 offset:64
	v_cmp_ne_u32_e32 vcc_lo, 7, v6
	v_add_nc_u32_e32 v7, 1, v6
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_lshlrev_b32_e32 v4, 2, v3
	s_waitcnt lgkmcnt(0)
	ds_bpermute_b32 v3, v4, v1
	ds_bpermute_b32 v4, v4, v2
	v_cmpx_gt_u32_e64 s0, v7
	s_cbranch_execz .LBB2_327
; %bb.326:
	s_waitcnt lgkmcnt(0)
	v_add_f64 v[1:2], v[1:2], v[3:4]
.LBB2_327:
	s_or_b32 exec_lo, exec_lo, s2
	v_cmp_gt_u32_e32 vcc_lo, 6, v6
	v_add_nc_u32_e32 v7, 2, v6
	s_mov_b32 s2, exec_lo
	s_waitcnt lgkmcnt(1)
	v_cndmask_b32_e64 v3, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v3, 1, v3
	s_waitcnt lgkmcnt(0)
	v_add_lshl_u32 v4, v3, v5, 2
	ds_bpermute_b32 v3, v4, v1
	ds_bpermute_b32 v4, v4, v2
	v_cmpx_gt_u32_e64 s0, v7
	s_cbranch_execz .LBB2_329
; %bb.328:
	s_waitcnt lgkmcnt(0)
	v_add_f64 v[1:2], v[1:2], v[3:4]
.LBB2_329:
	s_or_b32 exec_lo, exec_lo, s2
	v_cmp_gt_u32_e32 vcc_lo, 4, v6
	s_waitcnt lgkmcnt(1)
	v_cndmask_b32_e64 v3, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v3, 2, v3
	s_waitcnt lgkmcnt(0)
	v_add_lshl_u32 v4, v3, v5, 2
	v_add_nc_u32_e32 v5, 4, v6
	ds_bpermute_b32 v3, v4, v1
	ds_bpermute_b32 v4, v4, v2
	v_cmp_gt_u32_e32 vcc_lo, s0, v5
	s_and_saveexec_b32 s0, vcc_lo
	s_cbranch_execz .LBB2_331
; %bb.330:
	s_waitcnt lgkmcnt(0)
	v_add_f64 v[1:2], v[1:2], v[3:4]
.LBB2_331:                              ; %Flow1206
	s_or_b32 exec_lo, exec_lo, s0
.LBB2_332:                              ; %Flow1207
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
.LBB2_333:                              ; %_ZN7rocprim12block_reduceIdLj256ELNS_22block_reduce_algorithmE0ELj1ELj1EE6reduceIN6thrust4plusIdEEEEvdRdjT_.exit.i
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB2_335
; %bb.334:
	s_lshl_b64 s[0:1], s[20:21], 3
	v_mov_b32_e32 v0, 0
	s_add_u32 s0, s16, s0
	s_addc_u32 s1, s17, s1
	s_cmp_eq_u64 s[14:15], 0
	s_cselect_b32 s2, -1, 0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v2, v2, s19, s2
	v_cndmask_b32_e64 v1, v1, s18, s2
	global_store_b64 v0, v[1:2], s[0:1]
.LBB2_335:                              ; %_ZN7rocprim6detail24block_reduce_kernel_implILb0ENS0_21wrapped_reduce_configINS_14default_configEdEEdN6thrust11hip_rocprim26transform_input_iterator_tIdNS5_17counting_iteratorIjNS5_11use_defaultES9_S9_EE11estimate_esEEPddNS5_4plusIdEEEEvT2_mT3_T4_T5_.exit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _ZN7rocprim6detail19block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEdEEdN6thrust11hip_rocprim26transform_input_iterator_tIdNS5_17counting_iteratorIjNS5_11use_defaultES9_S9_EE11estimate_esEEPddNS5_4plusIdEEEEvT2_mT3_T4_T5_
		.amdhsa_group_segment_fixed_size 128
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 36
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 95
		.amdhsa_next_free_sgpr 85
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._ZN7rocprim6detail19block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEdEEdN6thrust11hip_rocprim26transform_input_iterator_tIdNS5_17counting_iteratorIjNS5_11use_defaultES9_S9_EE11estimate_esEEPddNS5_4plusIdEEEEvT2_mT3_T4_T5_,"axG",@progbits,_ZN7rocprim6detail19block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEdEEdN6thrust11hip_rocprim26transform_input_iterator_tIdNS5_17counting_iteratorIjNS5_11use_defaultES9_S9_EE11estimate_esEEPddNS5_4plusIdEEEEvT2_mT3_T4_T5_,comdat
.Lfunc_end2:
	.size	_ZN7rocprim6detail19block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEdEEdN6thrust11hip_rocprim26transform_input_iterator_tIdNS5_17counting_iteratorIjNS5_11use_defaultES9_S9_EE11estimate_esEEPddNS5_4plusIdEEEEvT2_mT3_T4_T5_, .Lfunc_end2-_ZN7rocprim6detail19block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEdEEdN6thrust11hip_rocprim26transform_input_iterator_tIdNS5_17counting_iteratorIjNS5_11use_defaultES9_S9_EE11estimate_esEEPddNS5_4plusIdEEEEvT2_mT3_T4_T5_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 88196
; NumSgprs: 87
; NumVgprs: 95
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 128 bytes/workgroup (compile time only)
; SGPRBlocks: 10
; VGPRBlocks: 11
; NumSGPRsForWavesPerEU: 87
; NumVGPRsForWavesPerEU: 95
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._ZN7rocprim6detail19block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEdEEdN6thrust11hip_rocprim26transform_input_iterator_tIdNS5_17counting_iteratorIjNS5_11use_defaultES9_S9_EE11estimate_esEEPddNS5_4plusIdEEEEvT2_mT3_T4_T5_,"axG",@progbits,_ZN7rocprim6detail19block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEdEEdN6thrust11hip_rocprim26transform_input_iterator_tIdNS5_17counting_iteratorIjNS5_11use_defaultES9_S9_EE11estimate_esEEPddNS5_4plusIdEEEEvT2_mT3_T4_T5_,comdat
	.protected	_ZN7rocprim6detail19block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEdEEdN6thrust11hip_rocprim26transform_input_iterator_tIdNS5_17counting_iteratorIjNS5_11use_defaultES9_S9_EE11estimate_esEEPddNS5_4plusIdEEEEvT2_mT3_T4_T5_ ; -- Begin function _ZN7rocprim6detail19block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEdEEdN6thrust11hip_rocprim26transform_input_iterator_tIdNS5_17counting_iteratorIjNS5_11use_defaultES9_S9_EE11estimate_esEEPddNS5_4plusIdEEEEvT2_mT3_T4_T5_
	.globl	_ZN7rocprim6detail19block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEdEEdN6thrust11hip_rocprim26transform_input_iterator_tIdNS5_17counting_iteratorIjNS5_11use_defaultES9_S9_EE11estimate_esEEPddNS5_4plusIdEEEEvT2_mT3_T4_T5_
	.p2align	8
	.type	_ZN7rocprim6detail19block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEdEEdN6thrust11hip_rocprim26transform_input_iterator_tIdNS5_17counting_iteratorIjNS5_11use_defaultES9_S9_EE11estimate_esEEPddNS5_4plusIdEEEEvT2_mT3_T4_T5_,@function
_ZN7rocprim6detail19block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEdEEdN6thrust11hip_rocprim26transform_input_iterator_tIdNS5_17counting_iteratorIjNS5_11use_defaultES9_S9_EE11estimate_esEEPddNS5_4plusIdEEEEvT2_mT3_T4_T5_: ; @_ZN7rocprim6detail19block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEdEEdN6thrust11hip_rocprim26transform_input_iterator_tIdNS5_17counting_iteratorIjNS5_11use_defaultES9_S9_EE11estimate_esEEPddNS5_4plusIdEEEEvT2_mT3_T4_T5_
; %bb.0:
	s_mov_b32 s20, s15
	s_load_b256 s[12:19], s[0:1], 0x0
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, g_seed@rel32@lo+4
	s_addc_u32 s1, s1, g_seed@rel32@hi+12
	s_lshl_b32 s33, s20, 11
	s_load_b64 s[22:23], s[0:1], 0x0
	v_or_b32_e32 v1, s33, v0
	s_mov_b32 s21, 0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_add_nc_u32_e32 v66, s12, v1
	s_lshr_b64 s[0:1], s[14:15], 11
	s_cmp_lg_u64 s[0:1], s[20:21]
	s_cbranch_scc0 .LBB3_150
; %bb.1:
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v1, 12, v66
	s_mov_b64 s[4:5], 0
                                        ; implicit-def: $vgpr34_vgpr35
                                        ; implicit-def: $vgpr29_vgpr30
                                        ; implicit-def: $vgpr31_vgpr32
                                        ; implicit-def: $vgpr36_vgpr37
	v_add3_u32 v1, v66, v1, 0x7ed55d16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v2, 19, v1
	v_xor3_b32 v1, v1, v2, 0xc761c23c
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v1, v1, 5, v1
	v_add_nc_u32_e32 v2, 0xe9f8cc1d, v1
	v_lshl_add_u32 v1, v1, 9, 0xaccf6200
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v1, v2, v1
	v_lshlrev_b32_e32 v2, 3, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v1, v1, v2, 0xfd7046c5
	v_lshrrev_b32_e32 v2, 16, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_xor3_b32 v1, v1, v2, 0xb55a4f09
.LBB3_2:                                ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v2, 12, v1
	s_cmp_eq_u32 s4, 0
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s4, 1
	v_add3_u32 v1, v1, v2, 0x7ed55d16
	s_cselect_b32 s0, -1, 0
	s_cmp_eq_u32 s4, 2
	s_cselect_b32 s1, -1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v2, 19, v1
	s_cmp_eq_u32 s4, 3
	s_cselect_b32 s2, -1, 0
	s_add_u32 s4, s4, 1
	v_xor3_b32 v1, v1, v2, 0xc761c23c
	s_addc_u32 s5, s5, 0
	s_cmp_lg_u32 s4, 4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v1, v1, 5, v1
	v_add_nc_u32_e32 v2, 0xe9f8cc1d, v1
	v_lshl_add_u32 v1, v1, 9, 0xaccf6200
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v1, v2, v1
	v_lshlrev_b32_e32 v2, 3, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v1, v1, v2, 0xfd7046c5
	v_lshrrev_b32_e32 v2, 16, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor3_b32 v1, v1, v2, 0xb55a4f09
	v_lshlrev_b32_e32 v3, 12, v1
	v_xor_b32_e32 v2, s23, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add3_u32 v1, v1, v3, 0x7ed55d16
	v_cndmask_b32_e32 v35, v35, v2, vcc_lo
	v_cndmask_b32_e64 v30, v30, v2, s0
	v_cndmask_b32_e64 v32, v32, v2, s1
	v_cndmask_b32_e64 v37, v37, v2, s2
	v_lshrrev_b32_e32 v3, 19, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor3_b32 v1, v1, v3, 0xc761c23c
	v_lshl_add_u32 v1, v1, 5, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v3, 0xe9f8cc1d, v1
	v_lshl_add_u32 v1, v1, 9, 0xaccf6200
	v_xor_b32_e32 v1, v3, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v3, 3, v1
	v_add3_u32 v1, v1, v3, 0xfd7046c5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v3, 16, v1
	v_xor3_b32 v1, v1, v3, 0xb55a4f09
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v2, s22, v1
	v_cndmask_b32_e32 v34, v34, v2, vcc_lo
	v_cndmask_b32_e64 v29, v29, v2, s0
	v_cndmask_b32_e64 v31, v31, v2, s1
	v_cndmask_b32_e64 v36, v36, v2, s2
	s_cbranch_scc1 .LBB3_2
; %bb.3:                                ; %.preheader55.i.i.i28.i.preheader
	v_mov_b32_e32 v27, 0
	v_dual_mov_b32 v28, 0 :: v_dual_mov_b32 v33, 0
	s_mov_b32 s4, 0x54442d18
	s_mov_b32 s12, 0x6dc9c883
	s_mov_b32 s26, 0x33145c00
	s_mov_b32 s28, 0x252049c0
	s_mov_b32 s30, 0x55555555
	s_mov_b32 s34, 0x6b47b09a
	s_mov_b32 s36, 0xbf559e2b
	s_mov_b32 s38, 0xd7f4df2e
	s_mov_b32 s40, 0x16291751
	s_mov_b32 s42, 0x9b27acf1
	s_mov_b32 s44, 0x998ef7b6
	s_mov_b32 s46, 0xfefa39ef
	s_mov_b32 s48, 0x3b39803f
	s_mov_b32 s50, 0x9037ab78
	s_mov_b32 s52, 0x46cc5e42
	s_mov_b32 s54, 0xa17f65f6
	s_mov_b32 s56, 0x19f4ec90
	s_mov_b32 s58, 0x16c16967
	s_mov_b32 s60, 0xb42fdfa7
	s_mov_b32 s62, 0xf9a43bb8
	s_mov_b32 s64, 0x796cde01
	s_mov_b32 s66, 0x19e83e5c
	s_mov_b32 s68, 0x11110bb3
	s_mov_b32 s76, 0
	s_mov_b32 s5, 0x401921fb
	s_mov_b32 s7, 0x3ff921fb
	s_mov_b32 s9, 0x3c91a626
	s_mov_b32 s10, 0x33145c07
	s_mov_b32 s13, 0x3fe45f30
	s_mov_b32 s25, 0xbff921fb
	s_mov_b32 s27, 0xbc91a626
	s_mov_b32 s29, 0xb97b839a
	s_mov_b32 s31, 0x3fe55555
	s_mov_b32 s35, 0x3fc38538
	s_mov_b32 s37, 0x3fc3ab76
	s_mov_b32 s39, 0x3fc7474d
	s_mov_b32 s41, 0x3fcc71c0
	s_mov_b32 s43, 0x3fd24924
	s_mov_b32 s45, 0x3fd99999
	s_mov_b32 s47, 0x3fe62e42
	s_mov_b32 s49, 0x3c7abc9e
	s_mov_b32 s51, 0x3e21eeb6
	s_mov_b32 s53, 0xbda907db
	s_mov_b32 s55, 0xbe927e4f
	s_mov_b32 s57, 0x3efa01a0
	s_mov_b32 s59, 0xbf56c16c
	s_mov_b32 s61, 0xbe5ae600
	s_mov_b32 s63, 0x3de5e0b2
	s_mov_b32 s65, 0x3ec71de3
	s_mov_b32 s67, 0xbf2a01a0
	s_mov_b32 s69, 0x3f811111
	s_mov_b32 s70, 0x55555780
	s_mov_b32 s73, 0x3fa55555
	s_mov_b32 s75, 0xbfc55555
                                        ; implicit-def: $vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16
                                        ; implicit-def: $vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26
.LBB3_4:                                ; %.preheader55.i.i.i28.i
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB3_5 Depth 2
                                        ;     Child Loop BB3_15 Depth 2
                                        ;       Child Loop BB3_16 Depth 3
	v_dual_mov_b32 v21, v34 :: v_dual_mov_b32 v22, v35
	v_dual_mov_b32 v40, v37 :: v_dual_mov_b32 v39, v36
	s_mov_b32 s77, 0
.LBB3_5:                                ;   Parent Loop BB3_4 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v35, v30, v40
	v_xor_b32_e32 v34, v29, v39
                                        ; implicit-def: $vgpr55
                                        ; implicit-def: $vgpr37_vgpr38
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v53, v35, v22
	v_lshrrev_b64 v[23:24], 19, v[34:35]
	v_lshlrev_b32_e32 v25, 13, v34
	v_xor_b32_e32 v26, v34, v21
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_or_b32_e32 v54, v25, v24
	v_add_co_u32 v24, vcc_lo, v23, v26
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v25, vcc_lo, v54, v53, vcc_lo
	v_lshrrev_b64 v[24:25], 11, v[24:25]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_u32_e32 v[34:35], v25
	v_cvt_f64_u32_e32 v[24:25], v24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[34:35], v[34:35], 32
	v_add_f64 v[24:25], v[34:35], v[24:25]
                                        ; implicit-def: $vgpr35_vgpr36
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[24:25], v[24:25], 0xffffffcb
	v_mul_f64 v[24:25], v[24:25], s[4:5]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ngt_f64_e32 vcc_lo, 0x41d00000, v[24:25]
	v_trig_preop_f64 v[49:50], v[24:25], 0
	v_trig_preop_f64 v[47:48], v[24:25], 1
	v_ldexp_f64 v[51:52], v[24:25], 0xffffff80
	v_trig_preop_f64 v[45:46], v[24:25], 2
	s_and_saveexec_b32 s0, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s2, exec_lo, s0
	s_cbranch_execz .LBB3_7
; %bb.6:                                ;   in Loop: Header=BB3_5 Depth=2
	v_cmp_le_f64_e64 s0, 0x7b000000, v[24:25]
	s_mov_b32 s6, s4
	s_mov_b32 s11, s9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v36, v25, v52, s0
	v_cndmask_b32_e64 v35, v24, v51, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_f64 v[37:38], v[49:50], v[35:36]
	v_mul_f64 v[41:42], v[47:48], v[35:36]
	v_mul_f64 v[63:64], v[45:46], v[35:36]
	v_fma_f64 v[43:44], v[49:50], v[35:36], -v[37:38]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[67:68], v[47:48], v[35:36], -v[41:42]
	v_add_f64 v[55:56], v[41:42], v[43:44]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[57:58], v[55:56], -v[41:42]
	v_add_f64 v[61:62], v[37:38], v[55:56]
	v_add_f64 v[59:60], v[55:56], -v[57:58]
	v_add_f64 v[43:44], v[43:44], -v[57:58]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[57:58], v[61:62], -2
	v_add_f64 v[37:38], v[61:62], -v[37:38]
	v_add_f64 v[41:42], v[41:42], -v[59:60]
	v_add_f64 v[59:60], v[63:64], v[67:68]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cmp_neq_f64_e64 s0, 0x7ff00000, |v[57:58]|
	v_add_f64 v[37:38], v[55:56], -v[37:38]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[41:42], v[43:44], v[41:42]
	v_fract_f64_e32 v[43:44], v[57:58]
	v_add_f64 v[55:56], v[59:60], v[41:42]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v44, 0, v44, s0
	v_cndmask_b32_e64 v43, 0, v43, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[43:44], v[43:44], 2
	v_add_f64 v[57:58], v[37:38], v[55:56]
	v_add_f64 v[69:70], v[55:56], -v[59:60]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[61:62], v[57:58], v[43:44]
	v_add_f64 v[75:76], v[55:56], -v[69:70]
	v_add_f64 v[41:42], v[41:42], -v[69:70]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cmp_gt_f64_e64 s0, 0, v[61:62]
	v_add_f64 v[61:62], v[59:60], -v[63:64]
	v_cndmask_b32_e64 v34, 0, 0x40100000, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[73:74], v[59:60], -v[61:62]
	v_add_f64 v[61:62], v[67:68], -v[61:62]
	v_add_f64 v[59:60], v[59:60], -v[75:76]
	v_add_f64 v[43:44], v[43:44], v[33:34]
	v_fma_f64 v[34:35], v[45:46], v[35:36], -v[63:64]
	v_add_f64 v[36:37], v[57:58], -v[37:38]
	v_add_f64 v[67:68], v[63:64], -v[73:74]
	v_add_f64 v[41:42], v[41:42], v[59:60]
	v_add_f64 v[71:72], v[57:58], v[43:44]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[36:37], v[55:56], -v[36:37]
	v_add_f64 v[61:62], v[61:62], v[67:68]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_i32_f64_e32 v65, v[71:72]
	v_add_f64 v[41:42], v[61:62], v[41:42]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_i32_e32 v[69:70], v65
	v_add_f64 v[34:35], v[34:35], v[41:42]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[43:44], v[43:44], -v[69:70]
	v_add_f64 v[35:36], v[36:37], v[34:35]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[59:60], v[57:58], v[43:44]
	v_add_f64 v[41:42], v[59:60], -v[43:44]
	v_cmp_le_f64_e64 s0, 0.5, v[59:60]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[37:38], v[57:58], -v[41:42]
	v_cndmask_b32_e64 v34, 0, 0x3ff00000, s0
	v_add_co_ci_u32_e64 v55, s1, 0, v65, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[35:36], v[35:36], v[37:38]
	v_add_f64 v[37:38], v[59:60], -v[33:34]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[41:42], v[37:38], v[35:36]
	v_mul_f64 v[43:44], v[41:42], s[6:7]
	v_add_f64 v[37:38], v[41:42], -v[37:38]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[56:57], v[41:42], s[6:7], -v[43:44]
	v_add_f64 v[34:35], v[35:36], -v[37:38]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[36:37], v[41:42], s[10:11], v[56:57]
	v_fma_f64 v[37:38], v[34:35], s[6:7], v[36:37]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[35:36], v[43:44], v[37:38]
	v_add_f64 v[41:42], v[35:36], -v[43:44]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[37:38], v[37:38], -v[41:42]
.LBB3_7:                                ; %Flow1205
                                        ;   in Loop: Header=BB3_5 Depth=2
	s_and_not1_saveexec_b32 s0, s2
	s_cbranch_execz .LBB3_9
; %bb.8:                                ;   in Loop: Header=BB3_5 Depth=2
	v_mul_f64 v[34:35], v[24:25], s[12:13]
	s_mov_b32 s24, s4
	s_mov_b32 s8, s26
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[41:42], v[34:35]
	v_fma_f64 v[34:35], v[41:42], s[24:25], v[24:25]
	v_mul_f64 v[36:37], v[41:42], s[26:27]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[55:56], v[41:42], s[26:27], v[34:35]
	v_add_f64 v[43:44], v[34:35], v[36:37]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[34:35], v[34:35], -v[43:44]
	v_add_f64 v[43:44], v[43:44], -v[55:56]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[34:35], v[34:35], v[36:37]
	v_fma_f64 v[36:37], v[41:42], s[8:9], v[36:37]
	v_add_f64 v[34:35], v[43:44], v[34:35]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[34:35], v[34:35], -v[36:37]
	v_fma_f64 v[37:38], v[41:42], s[28:29], v[34:35]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[35:36], v[55:56], v[37:38]
	v_add_f64 v[43:44], v[35:36], -v[55:56]
	v_cvt_i32_f64_e32 v55, v[41:42]
	s_delay_alu instid0(VALU_DEP_2)
	v_add_f64 v[37:38], v[37:38], -v[43:44]
.LBB3_9:                                ; %_ZL3cosd.exit.i.i.i38.i
                                        ;   in Loop: Header=BB3_5 Depth=2
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $vgpr56
                                        ; implicit-def: $vgpr41_vgpr42
                                        ; implicit-def: $vgpr43_vgpr44
	s_and_saveexec_b32 s0, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s1, exec_lo, s0
	s_cbranch_execz .LBB3_11
; %bb.10:                               ;   in Loop: Header=BB3_5 Depth=2
	v_cmp_le_f64_e32 vcc_lo, 0x7b000000, v[24:25]
	s_mov_b32 s6, s4
	s_mov_b32 s11, s9
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v42, v25, v52 :: v_dual_cndmask_b32 v41, v24, v51
	v_mul_f64 v[43:44], v[49:50], v[41:42]
	v_mul_f64 v[51:52], v[47:48], v[41:42]
	v_mul_f64 v[64:65], v[45:46], v[41:42]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[49:50], v[49:50], v[41:42], -v[43:44]
	v_fma_f64 v[47:48], v[47:48], v[41:42], -v[51:52]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[41:42], v[45:46], v[41:42], -v[64:65]
	v_add_f64 v[56:57], v[51:52], v[49:50]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[58:59], v[56:57], -v[51:52]
	v_add_f64 v[62:63], v[43:44], v[56:57]
	v_add_f64 v[60:61], v[56:57], -v[58:59]
	v_add_f64 v[49:50], v[49:50], -v[58:59]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[58:59], v[62:63], -2
	v_add_f64 v[43:44], v[62:63], -v[43:44]
	v_add_f64 v[51:52], v[51:52], -v[60:61]
	v_add_f64 v[60:61], v[64:65], v[47:48]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[58:59]|
	v_add_f64 v[43:44], v[56:57], -v[43:44]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[49:50], v[49:50], v[51:52]
	v_fract_f64_e32 v[51:52], v[58:59]
	v_add_f64 v[56:57], v[60:61], v[49:50]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v52, 0, v52 :: v_dual_cndmask_b32 v51, 0, v51
	v_ldexp_f64 v[51:52], v[51:52], 2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[58:59], v[43:44], v[56:57]
	v_add_f64 v[67:68], v[56:57], -v[60:61]
	v_add_f64 v[62:63], v[58:59], v[51:52]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[73:74], v[56:57], -v[67:68]
	v_add_f64 v[49:50], v[49:50], -v[67:68]
	v_add_f64 v[43:44], v[58:59], -v[43:44]
	v_cmp_gt_f64_e32 vcc_lo, 0, v[62:63]
	v_add_f64 v[62:63], v[60:61], -v[64:65]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[43:44], v[56:57], -v[43:44]
	v_cndmask_b32_e64 v34, 0, 0x40100000, vcc_lo
	v_add_f64 v[71:72], v[60:61], -v[62:63]
	v_add_f64 v[47:48], v[47:48], -v[62:63]
	v_add_f64 v[60:61], v[60:61], -v[73:74]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[51:52], v[51:52], v[33:34]
	v_add_f64 v[62:63], v[64:65], -v[71:72]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[49:50], v[49:50], v[60:61]
	v_add_f64 v[69:70], v[58:59], v[51:52]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[47:48], v[47:48], v[62:63]
	v_cvt_i32_f64_e32 v34, v[69:70]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[45:46], v[47:48], v[49:50]
	v_cvt_f64_i32_e32 v[67:68], v34
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[41:42], v[41:42], v[45:46]
	v_add_f64 v[51:52], v[51:52], -v[67:68]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[41:42], v[43:44], v[41:42]
	v_add_f64 v[47:48], v[58:59], v[51:52]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[45:46], v[47:48], -v[51:52]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[47:48]
	v_add_f64 v[43:44], v[58:59], -v[45:46]
	v_add_co_ci_u32_e64 v56, s0, 0, v34, vcc_lo
	v_cndmask_b32_e64 v34, 0, 0x3ff00000, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[41:42], v[41:42], v[43:44]
	v_add_f64 v[43:44], v[47:48], -v[33:34]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[45:46], v[43:44], v[41:42]
	v_mul_f64 v[47:48], v[45:46], s[6:7]
	v_add_f64 v[43:44], v[45:46], -v[43:44]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[49:50], v[45:46], s[6:7], -v[47:48]
	v_add_f64 v[41:42], v[41:42], -v[43:44]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[43:44], v[45:46], s[10:11], v[49:50]
	v_fma_f64 v[43:44], v[41:42], s[6:7], v[43:44]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[41:42], v[47:48], v[43:44]
	v_add_f64 v[45:46], v[41:42], -v[47:48]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[43:44], v[43:44], -v[45:46]
.LBB3_11:                               ; %Flow1204
                                        ;   in Loop: Header=BB3_5 Depth=2
	s_and_not1_saveexec_b32 s0, s1
	s_cbranch_execz .LBB3_13
; %bb.12:                               ;   in Loop: Header=BB3_5 Depth=2
	v_mul_f64 v[41:42], v[24:25], s[12:13]
	s_mov_b32 s24, s4
	s_mov_b32 s8, s26
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[45:46], v[41:42]
	v_fma_f64 v[41:42], v[45:46], s[24:25], v[24:25]
	v_mul_f64 v[43:44], v[45:46], s[26:27]
	v_cvt_i32_f64_e32 v56, v[45:46]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[49:50], v[45:46], s[26:27], v[41:42]
	v_add_f64 v[47:48], v[41:42], v[43:44]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[41:42], v[41:42], -v[47:48]
	v_add_f64 v[47:48], v[47:48], -v[49:50]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[41:42], v[41:42], v[43:44]
	v_fma_f64 v[43:44], v[45:46], s[8:9], v[43:44]
	v_add_f64 v[41:42], v[47:48], v[41:42]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[41:42], v[41:42], -v[43:44]
	v_fma_f64 v[43:44], v[45:46], s[28:29], v[41:42]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[41:42], v[49:50], v[43:44]
	v_add_f64 v[47:48], v[41:42], -v[49:50]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[43:44], v[43:44], -v[47:48]
.LBB3_13:                               ; %_ZL3sind.exit.i.i.i43.i
                                        ;   in Loop: Header=BB3_5 Depth=2
	s_or_b32 exec_lo, exec_lo, s0
	v_add_co_u32 v39, vcc_lo, v39, v21
	v_add_co_ci_u32_e32 v40, vcc_lo, v40, v22, vcc_lo
	s_mov_b32 s71, s31
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_f64 v[75:76], v[37:38], 0.5
	v_mul_f64 v[83:84], v[43:44], 0.5
	s_delay_alu instid0(VALU_DEP_3)
	v_lshrrev_b64 v[39:40], 11, v[39:40]
	s_mov_b32 s72, s30
	s_mov_b32 s74, s30
	v_cmp_lg_f64_e64 s0, 0x7ff00000, v[24:25]
	s_cmp_eq_u32 s77, 4
	v_xor_b32_e32 v32, v32, v22
	v_cvt_f64_u32_e32 v[45:46], v40
	v_cvt_f64_u32_e32 v[39:40], v39
	v_xor_b32_e32 v31, v31, v21
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[45:46], v[45:46], 32
	v_add_f64 v[39:40], v[45:46], v[39:40]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[39:40], v[39:40], 0xffffffcb
	v_frexp_mant_f64_e32 v[45:46], v[39:40]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f64_e32 vcc_lo, s[30:31], v[45:46]
	v_cndmask_b32_e64 v34, 0, 1, vcc_lo
	v_ldexp_f64 v[45:46], v[45:46], v34
	v_frexp_exp_i32_f64_e32 v34, v[39:40]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[47:48], v[45:46], 1.0
	v_add_f64 v[57:58], v[45:46], -1.0
	v_subrev_co_ci_u32_e32 v34, vcc_lo, 0, v34, vcc_lo
	v_cmp_eq_f64_e32 vcc_lo, 0x7ff00000, v[39:40]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[49:50], v[47:48]
	v_add_f64 v[59:60], v[47:48], -1.0
	v_add_f64 v[45:46], v[45:46], -v[59:60]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[51:52], -v[47:48], v[49:50], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[49:50], v[51:52], v[49:50], v[49:50]
	v_fma_f64 v[51:52], -v[47:48], v[49:50], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[49:50], v[51:52], v[49:50], v[49:50]
	v_mul_f64 v[51:52], v[57:58], v[49:50]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[61:62], v[47:48], v[51:52]
	v_fma_f64 v[47:48], v[51:52], v[47:48], -v[61:62]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[45:46], v[51:52], v[45:46], v[47:48]
	v_add_f64 v[47:48], v[61:62], v[45:46]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[59:60], v[57:58], -v[47:48]
	v_add_f64 v[61:62], v[47:48], -v[61:62]
	v_add_f64 v[57:58], v[57:58], -v[59:60]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[45:46], v[61:62], -v[45:46]
	v_add_f64 v[47:48], v[57:58], -v[47:48]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[45:46], v[45:46], v[47:48]
	v_add_f64 v[45:46], v[59:60], v[45:46]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[45:46], v[49:50], v[45:46]
	v_add_f64 v[47:48], v[51:52], v[45:46]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[49:50], v[47:48], v[47:48]
	v_fma_f64 v[57:58], v[49:50], s[36:37], s[34:35]
	v_mul_f64 v[59:60], v[47:48], v[49:50]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[57:58], v[49:50], v[57:58], s[38:39]
	v_fma_f64 v[57:58], v[49:50], v[57:58], s[40:41]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[57:58], v[49:50], v[57:58], s[42:43]
	v_fma_f64 v[57:58], v[49:50], v[57:58], s[44:45]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[49:50], v[49:50], v[57:58], s[70:71]
	v_ldexp_f64 v[57:58], v[47:48], 1
	v_add_f64 v[47:48], v[47:48], -v[51:52]
	v_mul_f64 v[49:50], v[59:60], v[49:50]
	v_cvt_f64_i32_e32 v[59:60], v34
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[45:46], v[45:46], -v[47:48]
	v_add_f64 v[51:52], v[57:58], v[49:50]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[61:62], v[59:60], s[46:47]
	v_ldexp_f64 v[45:46], v[45:46], 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[47:48], v[51:52], -v[57:58]
	v_fma_f64 v[57:58], v[59:60], s[46:47], -v[61:62]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[47:48], v[49:50], -v[47:48]
	v_fma_f64 v[49:50], v[59:60], s[48:49], v[57:58]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[45:46], v[45:46], v[47:48]
	v_add_f64 v[47:48], v[61:62], v[49:50]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[57:58], v[51:52], v[45:46]
	v_add_f64 v[61:62], v[47:48], -v[61:62]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[59:60], v[47:48], v[57:58]
	v_add_f64 v[51:52], v[57:58], -v[51:52]
	v_add_f64 v[49:50], v[49:50], -v[61:62]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[63:64], v[59:60], -v[47:48]
	v_add_f64 v[45:46], v[45:46], -v[51:52]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[67:68], v[59:60], -v[63:64]
	v_add_f64 v[51:52], v[57:58], -v[63:64]
	v_add_f64 v[57:58], v[49:50], v[45:46]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[47:48], v[47:48], -v[67:68]
	v_add_f64 v[47:48], v[51:52], v[47:48]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[51:52], v[57:58], -v[49:50]
	v_add_f64 v[47:48], v[57:58], v[47:48]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[57:58], v[57:58], -v[51:52]
	v_add_f64 v[45:46], v[45:46], -v[51:52]
	v_add_f64 v[61:62], v[59:60], v[47:48]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[49:50], v[49:50], -v[57:58]
	v_add_f64 v[51:52], v[61:62], -v[59:60]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[45:46], v[45:46], v[49:50]
	v_mul_f64 v[49:50], v[41:42], v[41:42]
	v_add_f64 v[47:48], v[47:48], -v[51:52]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mul_f64 v[69:70], v[49:50], 0.5
	v_fma_f64 v[71:72], v[49:50], s[52:53], s[50:51]
	v_add_f64 v[45:46], v[45:46], v[47:48]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[81:82], -v[69:70], 1.0
	v_fma_f64 v[71:72], v[49:50], v[71:72], s[54:55]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[45:46], v[61:62], v[45:46]
	v_fma_f64 v[61:62], v[49:50], s[62:63], s[60:61]
	v_fma_f64 v[71:72], v[49:50], v[71:72], s[56:57]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_dual_cndmask_b32 v46, v46, v40 :: v_dual_cndmask_b32 v45, v45, v39
	v_cmp_ngt_f64_e32 vcc_lo, 0, v[39:40]
	v_fma_f64 v[61:62], v[49:50], v[61:62], s[64:65]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[71:72], v[49:50], v[71:72], s[58:59]
	v_mul_f64 v[45:46], v[45:46], -2.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[61:62], v[49:50], v[61:62], s[66:67]
	v_cndmask_b32_e32 v34, 0x7ff80000, v46, vcc_lo
	v_cmp_nge_f64_e32 vcc_lo, 0, v[39:40]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_fma_f64 v[61:62], v[49:50], v[61:62], s[68:69]
	v_cndmask_b32_e32 v45, 0, v45, vcc_lo
	v_cmp_neq_f64_e32 vcc_lo, 0, v[39:40]
	v_mul_f64 v[39:40], v[35:36], v[35:36]
	v_cndmask_b32_e32 v46, 0x7ff00000, v34, vcc_lo
	v_fma_f64 v[47:48], v[39:40], s[62:63], s[60:61]
	v_mul_f64 v[57:58], v[39:40], 0.5
	v_fma_f64 v[59:60], v[39:40], s[52:53], s[50:51]
	v_mul_f64 v[77:78], v[35:36], -v[39:40]
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[45:46]
	v_fma_f64 v[47:48], v[39:40], v[47:48], s[64:65]
	v_add_f64 v[67:68], -v[57:58], 1.0
	v_fma_f64 v[59:60], v[39:40], v[59:60], s[54:55]
	v_cndmask_b32_e64 v34, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v34, 8, v34
	v_ldexp_f64 v[45:46], v[45:46], v34
	v_fma_f64 v[47:48], v[39:40], v[47:48], s[66:67]
	v_add_f64 v[79:80], -v[67:68], 1.0
	v_fma_f64 v[59:60], v[39:40], v[59:60], s[56:57]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_rsq_f64_e32 v[51:52], v[45:46]
	v_cmp_class_f64_e64 s1, v[45:46], 0x260
	v_fma_f64 v[47:48], v[39:40], v[47:48], s[68:69]
	s_delay_alu instid0(VALU_DEP_4)
	v_add_f64 v[57:58], v[79:80], -v[57:58]
	v_add_f64 v[79:80], -v[81:82], 1.0
	v_fma_f64 v[59:60], v[39:40], v[59:60], s[58:59]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[63:64], v[45:46], v[51:52]
	v_mul_f64 v[51:52], v[51:52], 0.5
	v_fma_f64 v[47:48], v[77:78], v[47:48], v[75:76]
	v_mul_f64 v[75:76], v[41:42], -v[49:50]
	v_add_f64 v[69:70], v[79:80], -v[69:70]
	v_mul_f64 v[79:80], v[39:40], v[39:40]
	v_fma_f64 v[59:60], v[39:40], v[59:60], s[72:73]
	v_fma_f64 v[57:58], v[35:36], -v[37:38], v[57:58]
	v_fma_f64 v[73:74], -v[51:52], v[63:64], 0.5
	v_fma_f64 v[37:38], v[39:40], v[47:48], -v[37:38]
	v_fma_f64 v[61:62], v[75:76], v[61:62], v[83:84]
	v_mul_f64 v[47:48], v[49:50], v[49:50]
	v_fma_f64 v[69:70], v[41:42], -v[43:44], v[69:70]
	v_fma_f64 v[63:64], v[63:64], v[73:74], v[63:64]
	v_fma_f64 v[51:52], v[51:52], v[73:74], v[51:52]
	v_fma_f64 v[37:38], v[77:78], s[74:75], v[37:38]
	v_fma_f64 v[43:44], v[49:50], v[61:62], -v[43:44]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[73:74], -v[63:64], v[63:64], v[45:46]
	v_add_f64 v[34:35], v[35:36], -v[37:38]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[43:44], v[75:76], s[74:75], v[43:44]
	v_fma_f64 v[39:40], v[73:74], v[51:52], v[63:64]
	v_fma_f64 v[63:64], v[49:50], v[71:72], s[72:73]
	v_fma_f64 v[49:50], v[79:80], v[59:60], v[57:58]
	v_xor_b32_e32 v35, 0x80000000, v35
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[57:58], -v[39:40], v[39:40], v[45:46]
	v_fma_f64 v[47:48], v[47:48], v[63:64], v[69:70]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[49:50], v[67:68], v[49:50]
	v_fma_f64 v[36:37], v[57:58], v[51:52], v[39:40]
	s_delay_alu instid0(VALU_DEP_3)
	v_add_f64 v[38:39], v[81:82], v[47:48]
	v_add_f64 v[40:41], v[41:42], -v[43:44]
	v_and_b32_e32 v43, 1, v56
	v_cndmask_b32_e64 v47, 0, 0xffffff80, vcc_lo
	v_and_b32_e32 v51, 1, v55
	v_lshlrev_b32_e32 v42, 30, v56
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_eq_u32_e32 vcc_lo, 0, v51
	v_xor_b32_e32 v25, v42, v25
	v_dual_cndmask_b32 v34, v34, v49 :: v_dual_cndmask_b32 v35, v35, v50
	v_cmp_eq_u32_e32 vcc_lo, 0, v43
	v_lshlrev_b32_e32 v24, 30, v55
	v_ldexp_f64 v[36:37], v[36:37], v47
	v_dual_cndmask_b32 v39, v39, v41 :: v_dual_cndmask_b32 v38, v38, v40
	s_cselect_b32 vcc_lo, -1, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_and_b32_e32 v24, 0x80000000, v24
	v_and_b32_e32 v42, 0x80000000, v25
	s_cmp_eq_u32 s77, 3
	v_cndmask_b32_e64 v21, 0, v38, s0
	v_xor_b32_e32 v35, v35, v24
	v_cndmask_b32_e64 v24, 0, v34, s0
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e64 v25, 0x7ff80000, v35, s0
	v_cndmask_b32_e64 v35, v37, v46, s1
	v_cndmask_b32_e64 v34, v36, v45, s1
	v_lshlrev_b64 v[36:37], 17, v[29:30]
	v_xor_b32_e32 v30, v32, v30
	v_xor_b32_e32 v29, v31, v29
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[24:25], v[34:35], v[24:25]
	v_cndmask_b32_e32 v19, v19, v24, vcc_lo
	v_xor_b32_e32 v39, v39, v42
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v20, v20, v25, vcc_lo
	v_cndmask_b32_e64 v22, 0x7ff80000, v39, s0
	s_cselect_b32 s0, -1, 0
	s_cmp_eq_u32 s77, 2
	v_cndmask_b32_e64 v18, v18, v25, s0
	s_cselect_b32 s1, -1, 0
	v_mul_f64 v[38:39], v[34:35], v[21:22]
	v_xor_b32_e32 v22, v30, v54
	v_xor_b32_e32 v21, v29, v23
	v_xor_b32_e32 v34, v32, v37
	v_xor_b32_e32 v35, v31, v36
	v_lshlrev_b64 v[31:32], 17, v[29:30]
	s_cmp_eq_u32 s77, 1
	v_lshrrev_b64 v[36:37], 19, v[21:22]
	v_xor_b32_e32 v23, v34, v53
	v_xor_b32_e32 v40, v35, v26
	v_xor_b32_e32 v34, v21, v26
	v_lshlrev_b32_e32 v26, 13, v21
	v_xor_b32_e32 v35, v22, v53
	s_cselect_b32 s2, -1, 0
	s_cmp_eq_u32 s77, 0
	v_xor_b32_e32 v29, v40, v29
	v_or_b32_e32 v37, v26, v37
	s_cselect_b32 s3, -1, 0
	v_xor_b32_e32 v31, v40, v31
	v_mov_b32_e32 v21, v34
	v_xor_b32_e32 v30, v23, v30
	v_xor_b32_e32 v32, v23, v32
	v_mov_b32_e32 v22, v35
	v_cndmask_b32_e64 v17, v17, v24, s0
	v_cndmask_b32_e64 v16, v16, v25, s1
	v_cndmask_b32_e64 v15, v15, v24, s1
	v_cndmask_b32_e64 v14, v14, v25, s2
	v_cndmask_b32_e64 v13, v13, v24, s2
	v_cndmask_b32_e64 v12, v12, v25, s3
	v_cndmask_b32_e64 v11, v11, v24, s3
	s_add_i32 s77, s77, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s77, 5
	v_cndmask_b32_e32 v10, v10, v39, vcc_lo
	v_cndmask_b32_e64 v8, v8, v39, s0
	v_cndmask_b32_e64 v6, v6, v39, s1
	v_cndmask_b32_e64 v4, v4, v39, s2
	v_cndmask_b32_e64 v2, v2, v39, s3
	v_mov_b32_e32 v40, v37
	v_cndmask_b32_e32 v9, v9, v38, vcc_lo
	v_cndmask_b32_e64 v7, v7, v38, s0
	v_cndmask_b32_e64 v5, v5, v38, s1
	v_cndmask_b32_e64 v3, v3, v38, s2
	v_cndmask_b32_e64 v1, v1, v38, s3
	v_mov_b32_e32 v39, v36
	s_cbranch_scc1 .LBB3_5
; %bb.14:                               ; %.lr.ph.i.i.i50.i.preheader
                                        ;   in Loop: Header=BB3_4 Depth=1
	v_mov_b32_e32 v21, 0
	v_mov_b32_e32 v22, 0
	s_mov_b32 s3, 0
.LBB3_15:                               ; %.lr.ph.i.i.i50.i
                                        ;   Parent Loop BB3_4 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB3_16 Depth 3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s3, 1
	s_mov_b32 s6, s3
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s3, 2
	v_dual_cndmask_b32 v23, v12, v14 :: v_dual_cndmask_b32 v24, v11, v13
	v_dual_cndmask_b32 v25, v2, v4 :: v_dual_cndmask_b32 v26, v1, v3
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s3, 3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v23, v23, v16 :: v_dual_cndmask_b32 v24, v24, v15
	v_dual_cndmask_b32 v25, v25, v6 :: v_dual_cndmask_b32 v26, v26, v5
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s3, 4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v23, v23, v18 :: v_dual_cndmask_b32 v38, v24, v17
	v_cndmask_b32_e32 v25, v25, v8, vcc_lo
	v_cndmask_b32_e32 v39, v26, v7, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v24, v23, v20 :: v_dual_cndmask_b32 v23, v38, v19
	v_dual_cndmask_b32 v26, v25, v10 :: v_dual_cndmask_b32 v25, v39, v9
.LBB3_16:                               ;   Parent Loop BB3_4 Depth=1
                                        ;     Parent Loop BB3_15 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_add_i32 s6, s6, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s6, 1
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s6, 2
	v_dual_cndmask_b32 v38, v12, v14 :: v_dual_cndmask_b32 v39, v2, v4
	v_cndmask_b32_e32 v40, v1, v3, vcc_lo
	s_cselect_b32 s0, -1, 0
	s_cmp_eq_u32 s6, 3
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e64 v38, v38, v16, s0
	v_cndmask_b32_e64 v39, v39, v6, s0
	v_cndmask_b32_e64 v40, v40, v5, s0
	s_cselect_b32 s1, -1, 0
	s_cmp_eq_u32 s6, 4
	v_cndmask_b32_e64 v38, v38, v18, s1
	v_cndmask_b32_e64 v41, v39, v8, s1
	v_cndmask_b32_e64 v40, v40, v7, s1
	s_cselect_b32 s2, -1, 0
	s_cmp_gt_u32 s6, 3
	v_cndmask_b32_e64 v39, v38, v20, s2
	v_cndmask_b32_e64 v41, v41, v10, s2
	v_cndmask_b32_e64 v40, v40, v9, s2
	v_cndmask_b32_e32 v38, v11, v13, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[40:41], v[25:26], -v[40:41]
	v_cndmask_b32_e64 v38, v38, v15, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v38, v38, v17, s1
	v_cndmask_b32_e64 v38, v38, v19, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[38:39], v[23:24], -v[38:39]
	v_mul_f64 v[40:41], v[40:41], v[40:41]
	v_fma_f64 v[38:39], v[38:39], v[38:39], v[40:41]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_lt_f64_e32 vcc_lo, v[21:22], v[38:39]
	v_dual_cndmask_b32 v22, v22, v39 :: v_dual_cndmask_b32 v21, v21, v38
	s_cbranch_scc0 .LBB3_16
; %bb.17:                               ; %.loopexit.i.i.i56.i
                                        ;   in Loop: Header=BB3_15 Depth=2
	s_add_i32 s3, s3, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s3, 4
	s_cbranch_scc1 .LBB3_15
; %bb.18:                               ;   in Loop: Header=BB3_4 Depth=1
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[21:22]
	s_add_i32 s76, s76, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	s_cmp_eq_u32 s76, 0x10000
	v_cndmask_b32_e64 v23, 0, 1, vcc_lo
	v_lshlrev_b32_e32 v23, 8, v23
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[21:22], v[21:22], v23
	v_rsq_f64_e32 v[23:24], v[21:22]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[25:26], v[21:22], v[23:24]
	v_mul_f64 v[23:24], v[23:24], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[38:39], -v[23:24], v[25:26], 0.5
	v_fma_f64 v[25:26], v[25:26], v[38:39], v[25:26]
	v_fma_f64 v[23:24], v[23:24], v[38:39], v[23:24]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[38:39], -v[25:26], v[25:26], v[21:22]
	v_fma_f64 v[25:26], v[38:39], v[23:24], v[25:26]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[38:39], -v[25:26], v[25:26], v[21:22]
	v_fma_f64 v[23:24], v[38:39], v[23:24], v[25:26]
	v_cndmask_b32_e64 v25, 0, 0xffffff80, vcc_lo
	v_cmp_class_f64_e64 vcc_lo, v[21:22], 0x260
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[23:24], v[23:24], v25
	v_dual_cndmask_b32 v22, v24, v22 :: v_dual_cndmask_b32 v21, v23, v21
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[27:28], v[27:28], v[21:22]
	s_cbranch_scc0 .LBB3_4
; %bb.19:                               ; %_ZNK6thrust11hip_rocprim26transform_input_iterator_tIdNS_17counting_iteratorIjNS_11use_defaultES3_S3_EE11estimate_esEixEl.exit.i59.i
	v_lshl_add_u32 v64, v66, 12, v66
	s_mov_b64 s[4:5], 0
                                        ; implicit-def: $vgpr36_vgpr37
                                        ; implicit-def: $vgpr31_vgpr32
                                        ; implicit-def: $vgpr33_vgpr34
                                        ; implicit-def: $vgpr38_vgpr39
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v1, 0x7ee55e16, v64
	v_lshrrev_b32_e32 v2, 19, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor3_b32 v1, v1, v2, 0xc761c23c
	v_lshl_add_u32 v1, v1, 5, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v2, 0xe9f8cc1d, v1
	v_lshl_add_u32 v1, v1, 9, 0xaccf6200
	v_xor_b32_e32 v1, v2, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v2, 3, v1
	v_add3_u32 v1, v1, v2, 0xfd7046c5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v2, 16, v1
	v_xor3_b32 v1, v1, v2, 0xb55a4f09
.LBB3_20:                               ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v2, 12, v1
	s_cmp_eq_u32 s4, 0
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s4, 1
	v_add3_u32 v1, v1, v2, 0x7ed55d16
	s_cselect_b32 s0, -1, 0
	s_cmp_eq_u32 s4, 2
	s_cselect_b32 s1, -1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v2, 19, v1
	s_cmp_eq_u32 s4, 3
	s_cselect_b32 s2, -1, 0
	s_add_u32 s4, s4, 1
	v_xor3_b32 v1, v1, v2, 0xc761c23c
	s_addc_u32 s5, s5, 0
	s_cmp_lg_u32 s4, 4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v1, v1, 5, v1
	v_add_nc_u32_e32 v2, 0xe9f8cc1d, v1
	v_lshl_add_u32 v1, v1, 9, 0xaccf6200
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v1, v2, v1
	v_lshlrev_b32_e32 v2, 3, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v1, v1, v2, 0xfd7046c5
	v_lshrrev_b32_e32 v2, 16, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor3_b32 v1, v1, v2, 0xb55a4f09
	v_lshlrev_b32_e32 v3, 12, v1
	v_xor_b32_e32 v2, s23, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add3_u32 v1, v1, v3, 0x7ed55d16
	v_cndmask_b32_e32 v37, v37, v2, vcc_lo
	v_cndmask_b32_e64 v32, v32, v2, s0
	v_cndmask_b32_e64 v34, v34, v2, s1
	v_cndmask_b32_e64 v39, v39, v2, s2
	v_lshrrev_b32_e32 v3, 19, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor3_b32 v1, v1, v3, 0xc761c23c
	v_lshl_add_u32 v1, v1, 5, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v3, 0xe9f8cc1d, v1
	v_lshl_add_u32 v1, v1, 9, 0xaccf6200
	v_xor_b32_e32 v1, v3, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v3, 3, v1
	v_add3_u32 v1, v1, v3, 0xfd7046c5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v3, 16, v1
	v_xor3_b32 v1, v1, v3, 0xb55a4f09
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v2, s22, v1
	v_cndmask_b32_e32 v36, v36, v2, vcc_lo
	v_cndmask_b32_e64 v31, v31, v2, s0
	v_cndmask_b32_e64 v33, v33, v2, s1
	v_cndmask_b32_e64 v38, v38, v2, s2
	s_cbranch_scc1 .LBB3_20
; %bb.21:                               ; %.preheader55.i.i.1.i64.i.preheader
	v_mov_b32_e32 v29, 0
	v_dual_mov_b32 v30, 0 :: v_dual_mov_b32 v35, 0
	s_mov_b32 s4, 0x54442d18
	s_mov_b32 s8, 0x33145c07
	s_mov_b32 s10, 0x6dc9c883
	s_mov_b32 s24, 0x33145c00
	s_mov_b32 s26, 0x252049c0
	s_mov_b32 s28, 0x55555555
	s_mov_b32 s30, 0x6b47b09a
	s_mov_b32 s34, 0xbf559e2b
	s_mov_b32 s36, 0xd7f4df2e
	s_mov_b32 s38, 0x16291751
	s_mov_b32 s40, 0x9b27acf1
	s_mov_b32 s42, 0x998ef7b6
	s_mov_b32 s44, 0xfefa39ef
	s_mov_b32 s46, 0x3b39803f
	s_mov_b32 s48, 0x9037ab78
	s_mov_b32 s50, 0x46cc5e42
	s_mov_b32 s52, 0xa17f65f6
	s_mov_b32 s54, 0x19f4ec90
	s_mov_b32 s56, 0x16c16967
	s_mov_b32 s58, 0xb42fdfa7
	s_mov_b32 s60, 0xf9a43bb8
	s_mov_b32 s62, 0x796cde01
	s_mov_b32 s64, 0x19e83e5c
	s_mov_b32 s66, 0x11110bb3
	s_mov_b32 s74, 0
	s_mov_b32 s5, 0x401921fb
	s_mov_b32 s7, 0x3ff921fb
	s_mov_b32 s9, 0x3c91a626
	s_mov_b32 s11, 0x3fe45f30
	s_mov_b32 s13, 0xbff921fb
	s_mov_b32 s25, 0xbc91a626
	s_mov_b32 s27, 0xb97b839a
	s_mov_b32 s29, 0x3fe55555
	s_mov_b32 s31, 0x3fc38538
	s_mov_b32 s35, 0x3fc3ab76
	s_mov_b32 s37, 0x3fc7474d
	s_mov_b32 s39, 0x3fcc71c0
	s_mov_b32 s41, 0x3fd24924
	s_mov_b32 s43, 0x3fd99999
	s_mov_b32 s45, 0x3fe62e42
	s_mov_b32 s47, 0x3c7abc9e
	s_mov_b32 s49, 0x3e21eeb6
	s_mov_b32 s51, 0xbda907db
	s_mov_b32 s53, 0xbe927e4f
	s_mov_b32 s55, 0x3efa01a0
	s_mov_b32 s57, 0xbf56c16c
	s_mov_b32 s59, 0xbe5ae600
	s_mov_b32 s61, 0x3de5e0b2
	s_mov_b32 s63, 0x3ec71de3
	s_mov_b32 s65, 0xbf2a01a0
	s_mov_b32 s67, 0x3f811111
	s_mov_b32 s68, 0x55555780
	s_mov_b32 s71, 0x3fa55555
	s_mov_b32 s73, 0xbfc55555
                                        ; implicit-def: $vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16
                                        ; implicit-def: $vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26
.LBB3_22:                               ; %.preheader55.i.i.1.i64.i
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB3_23 Depth 2
                                        ;     Child Loop BB3_33 Depth 2
                                        ;       Child Loop BB3_34 Depth 3
	v_dual_mov_b32 v21, v36 :: v_dual_mov_b32 v22, v37
	v_dual_mov_b32 v42, v39 :: v_dual_mov_b32 v41, v38
	s_mov_b32 s75, 0
.LBB3_23:                               ;   Parent Loop BB3_22 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v37, v32, v42
	v_xor_b32_e32 v36, v31, v41
                                        ; implicit-def: $vgpr57
                                        ; implicit-def: $vgpr39_vgpr40
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v55, v37, v22
	v_lshrrev_b64 v[23:24], 19, v[36:37]
	v_lshlrev_b32_e32 v25, 13, v36
	v_xor_b32_e32 v26, v36, v21
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_or_b32_e32 v56, v25, v24
	v_add_co_u32 v24, vcc_lo, v23, v26
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v25, vcc_lo, v56, v55, vcc_lo
	v_lshrrev_b64 v[24:25], 11, v[24:25]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_u32_e32 v[36:37], v25
	v_cvt_f64_u32_e32 v[24:25], v24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[36:37], v[36:37], 32
	v_add_f64 v[24:25], v[36:37], v[24:25]
                                        ; implicit-def: $vgpr37_vgpr38
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[24:25], v[24:25], 0xffffffcb
	v_mul_f64 v[24:25], v[24:25], s[4:5]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ngt_f64_e32 vcc_lo, 0x41d00000, v[24:25]
	v_trig_preop_f64 v[51:52], v[24:25], 0
	v_trig_preop_f64 v[49:50], v[24:25], 1
	v_ldexp_f64 v[53:54], v[24:25], 0xffffff80
	v_trig_preop_f64 v[47:48], v[24:25], 2
	s_and_saveexec_b32 s0, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s2, exec_lo, s0
	s_cbranch_execz .LBB3_25
; %bb.24:                               ;   in Loop: Header=BB3_23 Depth=2
	v_cmp_le_f64_e64 s0, 0x7b000000, v[24:25]
	s_mov_b32 s6, s4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v38, v25, v54, s0
	v_cndmask_b32_e64 v37, v24, v53, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_f64 v[39:40], v[51:52], v[37:38]
	v_mul_f64 v[43:44], v[49:50], v[37:38]
	v_mul_f64 v[69:70], v[47:48], v[37:38]
	v_fma_f64 v[45:46], v[51:52], v[37:38], -v[39:40]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[71:72], v[49:50], v[37:38], -v[43:44]
	v_add_f64 v[57:58], v[43:44], v[45:46]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[59:60], v[57:58], -v[43:44]
	v_add_f64 v[67:68], v[39:40], v[57:58]
	v_add_f64 v[61:62], v[57:58], -v[59:60]
	v_add_f64 v[45:46], v[45:46], -v[59:60]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[59:60], v[67:68], -2
	v_add_f64 v[39:40], v[67:68], -v[39:40]
	v_add_f64 v[43:44], v[43:44], -v[61:62]
	v_add_f64 v[61:62], v[69:70], v[71:72]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cmp_neq_f64_e64 s0, 0x7ff00000, |v[59:60]|
	v_add_f64 v[39:40], v[57:58], -v[39:40]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[43:44], v[45:46], v[43:44]
	v_fract_f64_e32 v[45:46], v[59:60]
	v_add_f64 v[57:58], v[61:62], v[43:44]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v46, 0, v46, s0
	v_cndmask_b32_e64 v45, 0, v45, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[45:46], v[45:46], 2
	v_add_f64 v[59:60], v[39:40], v[57:58]
	v_add_f64 v[73:74], v[57:58], -v[61:62]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[67:68], v[59:60], v[45:46]
	v_add_f64 v[79:80], v[57:58], -v[73:74]
	v_add_f64 v[43:44], v[43:44], -v[73:74]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cmp_gt_f64_e64 s0, 0, v[67:68]
	v_add_f64 v[67:68], v[61:62], -v[69:70]
	v_cndmask_b32_e64 v36, 0, 0x40100000, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[77:78], v[61:62], -v[67:68]
	v_add_f64 v[67:68], v[71:72], -v[67:68]
	v_add_f64 v[61:62], v[61:62], -v[79:80]
	v_add_f64 v[45:46], v[45:46], v[35:36]
	v_fma_f64 v[36:37], v[47:48], v[37:38], -v[69:70]
	v_add_f64 v[38:39], v[59:60], -v[39:40]
	v_add_f64 v[71:72], v[69:70], -v[77:78]
	v_add_f64 v[43:44], v[43:44], v[61:62]
	v_add_f64 v[75:76], v[59:60], v[45:46]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[38:39], v[57:58], -v[38:39]
	v_add_f64 v[67:68], v[67:68], v[71:72]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_i32_f64_e32 v63, v[75:76]
	v_add_f64 v[43:44], v[67:68], v[43:44]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_i32_e32 v[73:74], v63
	v_add_f64 v[36:37], v[36:37], v[43:44]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[45:46], v[45:46], -v[73:74]
	v_add_f64 v[37:38], v[38:39], v[36:37]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[61:62], v[59:60], v[45:46]
	v_add_f64 v[43:44], v[61:62], -v[45:46]
	v_cmp_le_f64_e64 s0, 0.5, v[61:62]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[39:40], v[59:60], -v[43:44]
	v_cndmask_b32_e64 v36, 0, 0x3ff00000, s0
	v_add_co_ci_u32_e64 v57, s1, 0, v63, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[37:38], v[37:38], v[39:40]
	v_add_f64 v[39:40], v[61:62], -v[35:36]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[43:44], v[39:40], v[37:38]
	v_mul_f64 v[45:46], v[43:44], s[6:7]
	v_add_f64 v[39:40], v[43:44], -v[39:40]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[58:59], v[43:44], s[6:7], -v[45:46]
	v_add_f64 v[36:37], v[37:38], -v[39:40]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[38:39], v[43:44], s[8:9], v[58:59]
	v_fma_f64 v[39:40], v[36:37], s[6:7], v[38:39]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[37:38], v[45:46], v[39:40]
	v_add_f64 v[43:44], v[37:38], -v[45:46]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[39:40], v[39:40], -v[43:44]
.LBB3_25:                               ; %Flow1203
                                        ;   in Loop: Header=BB3_23 Depth=2
	s_and_not1_saveexec_b32 s0, s2
	s_cbranch_execz .LBB3_27
; %bb.26:                               ;   in Loop: Header=BB3_23 Depth=2
	v_mul_f64 v[36:37], v[24:25], s[10:11]
	s_mov_b32 s12, s4
	s_mov_b32 s2, s24
	s_mov_b32 s3, s9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[43:44], v[36:37]
	v_fma_f64 v[36:37], v[43:44], s[12:13], v[24:25]
	v_mul_f64 v[38:39], v[43:44], s[24:25]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[57:58], v[43:44], s[24:25], v[36:37]
	v_add_f64 v[45:46], v[36:37], v[38:39]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[36:37], v[36:37], -v[45:46]
	v_add_f64 v[45:46], v[45:46], -v[57:58]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[36:37], v[36:37], v[38:39]
	v_fma_f64 v[38:39], v[43:44], s[2:3], v[38:39]
	v_add_f64 v[36:37], v[45:46], v[36:37]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[36:37], v[36:37], -v[38:39]
	v_fma_f64 v[39:40], v[43:44], s[26:27], v[36:37]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[37:38], v[57:58], v[39:40]
	v_add_f64 v[45:46], v[37:38], -v[57:58]
	v_cvt_i32_f64_e32 v57, v[43:44]
	s_delay_alu instid0(VALU_DEP_2)
	v_add_f64 v[39:40], v[39:40], -v[45:46]
.LBB3_27:                               ; %_ZL3cosd.exit.i.i.1.i74.i
                                        ;   in Loop: Header=BB3_23 Depth=2
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $vgpr58
                                        ; implicit-def: $vgpr43_vgpr44
                                        ; implicit-def: $vgpr45_vgpr46
	s_and_saveexec_b32 s0, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s1, exec_lo, s0
	s_cbranch_execz .LBB3_29
; %bb.28:                               ;   in Loop: Header=BB3_23 Depth=2
	v_cmp_le_f64_e32 vcc_lo, 0x7b000000, v[24:25]
	s_mov_b32 s6, s4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v44, v25, v54 :: v_dual_cndmask_b32 v43, v24, v53
	v_mul_f64 v[45:46], v[51:52], v[43:44]
	v_mul_f64 v[53:54], v[49:50], v[43:44]
	v_mul_f64 v[69:70], v[47:48], v[43:44]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[51:52], v[51:52], v[43:44], -v[45:46]
	v_fma_f64 v[49:50], v[49:50], v[43:44], -v[53:54]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[43:44], v[47:48], v[43:44], -v[69:70]
	v_add_f64 v[58:59], v[53:54], v[51:52]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[60:61], v[58:59], -v[53:54]
	v_add_f64 v[67:68], v[45:46], v[58:59]
	v_add_f64 v[62:63], v[58:59], -v[60:61]
	v_add_f64 v[51:52], v[51:52], -v[60:61]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[60:61], v[67:68], -2
	v_add_f64 v[45:46], v[67:68], -v[45:46]
	v_add_f64 v[53:54], v[53:54], -v[62:63]
	v_add_f64 v[62:63], v[69:70], v[49:50]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[60:61]|
	v_add_f64 v[45:46], v[58:59], -v[45:46]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[51:52], v[51:52], v[53:54]
	v_fract_f64_e32 v[53:54], v[60:61]
	v_add_f64 v[58:59], v[62:63], v[51:52]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v54, 0, v54 :: v_dual_cndmask_b32 v53, 0, v53
	v_ldexp_f64 v[53:54], v[53:54], 2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[60:61], v[45:46], v[58:59]
	v_add_f64 v[71:72], v[58:59], -v[62:63]
	v_add_f64 v[67:68], v[60:61], v[53:54]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[77:78], v[58:59], -v[71:72]
	v_add_f64 v[51:52], v[51:52], -v[71:72]
	v_add_f64 v[45:46], v[60:61], -v[45:46]
	v_cmp_gt_f64_e32 vcc_lo, 0, v[67:68]
	v_add_f64 v[67:68], v[62:63], -v[69:70]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[45:46], v[58:59], -v[45:46]
	v_cndmask_b32_e64 v36, 0, 0x40100000, vcc_lo
	v_add_f64 v[75:76], v[62:63], -v[67:68]
	v_add_f64 v[49:50], v[49:50], -v[67:68]
	v_add_f64 v[62:63], v[62:63], -v[77:78]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[53:54], v[53:54], v[35:36]
	v_add_f64 v[67:68], v[69:70], -v[75:76]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[51:52], v[51:52], v[62:63]
	v_add_f64 v[73:74], v[60:61], v[53:54]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[49:50], v[49:50], v[67:68]
	v_cvt_i32_f64_e32 v36, v[73:74]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[47:48], v[49:50], v[51:52]
	v_cvt_f64_i32_e32 v[71:72], v36
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[43:44], v[43:44], v[47:48]
	v_add_f64 v[53:54], v[53:54], -v[71:72]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[43:44], v[45:46], v[43:44]
	v_add_f64 v[49:50], v[60:61], v[53:54]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[47:48], v[49:50], -v[53:54]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[49:50]
	v_add_f64 v[45:46], v[60:61], -v[47:48]
	v_add_co_ci_u32_e64 v58, s0, 0, v36, vcc_lo
	v_cndmask_b32_e64 v36, 0, 0x3ff00000, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[43:44], v[43:44], v[45:46]
	v_add_f64 v[45:46], v[49:50], -v[35:36]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[47:48], v[45:46], v[43:44]
	v_mul_f64 v[49:50], v[47:48], s[6:7]
	v_add_f64 v[45:46], v[47:48], -v[45:46]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[51:52], v[47:48], s[6:7], -v[49:50]
	v_add_f64 v[43:44], v[43:44], -v[45:46]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[45:46], v[47:48], s[8:9], v[51:52]
	v_fma_f64 v[45:46], v[43:44], s[6:7], v[45:46]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[43:44], v[49:50], v[45:46]
	v_add_f64 v[47:48], v[43:44], -v[49:50]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[45:46], v[45:46], -v[47:48]
.LBB3_29:                               ; %Flow1202
                                        ;   in Loop: Header=BB3_23 Depth=2
	s_and_not1_saveexec_b32 s0, s1
	s_cbranch_execz .LBB3_31
; %bb.30:                               ;   in Loop: Header=BB3_23 Depth=2
	v_mul_f64 v[43:44], v[24:25], s[10:11]
	s_mov_b32 s12, s4
	s_mov_b32 s2, s24
	s_mov_b32 s3, s9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[47:48], v[43:44]
	v_fma_f64 v[43:44], v[47:48], s[12:13], v[24:25]
	v_mul_f64 v[45:46], v[47:48], s[24:25]
	v_cvt_i32_f64_e32 v58, v[47:48]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[51:52], v[47:48], s[24:25], v[43:44]
	v_add_f64 v[49:50], v[43:44], v[45:46]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[43:44], v[43:44], -v[49:50]
	v_add_f64 v[49:50], v[49:50], -v[51:52]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[43:44], v[43:44], v[45:46]
	v_fma_f64 v[45:46], v[47:48], s[2:3], v[45:46]
	v_add_f64 v[43:44], v[49:50], v[43:44]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[43:44], v[43:44], -v[45:46]
	v_fma_f64 v[45:46], v[47:48], s[26:27], v[43:44]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[43:44], v[51:52], v[45:46]
	v_add_f64 v[49:50], v[43:44], -v[51:52]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[45:46], v[45:46], -v[49:50]
.LBB3_31:                               ; %_ZL3sind.exit.i.i.1.i79.i
                                        ;   in Loop: Header=BB3_23 Depth=2
	s_or_b32 exec_lo, exec_lo, s0
	v_add_co_u32 v41, vcc_lo, v41, v21
	v_add_co_ci_u32_e32 v42, vcc_lo, v42, v22, vcc_lo
	s_mov_b32 s69, s29
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_f64 v[79:80], v[39:40], 0.5
	v_mul_f64 v[87:88], v[45:46], 0.5
	s_delay_alu instid0(VALU_DEP_3)
	v_lshrrev_b64 v[41:42], 11, v[41:42]
	s_mov_b32 s70, s28
	s_mov_b32 s72, s28
	v_cmp_lg_f64_e64 s0, 0x7ff00000, v[24:25]
	s_cmp_eq_u32 s75, 4
	v_xor_b32_e32 v34, v34, v22
	v_cvt_f64_u32_e32 v[47:48], v42
	v_cvt_f64_u32_e32 v[41:42], v41
	v_xor_b32_e32 v33, v33, v21
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[47:48], v[47:48], 32
	v_add_f64 v[41:42], v[47:48], v[41:42]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[41:42], v[41:42], 0xffffffcb
	v_frexp_mant_f64_e32 v[47:48], v[41:42]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f64_e32 vcc_lo, s[28:29], v[47:48]
	v_cndmask_b32_e64 v36, 0, 1, vcc_lo
	v_ldexp_f64 v[47:48], v[47:48], v36
	v_frexp_exp_i32_f64_e32 v36, v[41:42]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[49:50], v[47:48], 1.0
	v_add_f64 v[59:60], v[47:48], -1.0
	v_subrev_co_ci_u32_e32 v36, vcc_lo, 0, v36, vcc_lo
	v_cmp_eq_f64_e32 vcc_lo, 0x7ff00000, v[41:42]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[51:52], v[49:50]
	v_add_f64 v[61:62], v[49:50], -1.0
	v_add_f64 v[47:48], v[47:48], -v[61:62]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[53:54], -v[49:50], v[51:52], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[51:52], v[53:54], v[51:52], v[51:52]
	v_fma_f64 v[53:54], -v[49:50], v[51:52], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[51:52], v[53:54], v[51:52], v[51:52]
	v_mul_f64 v[53:54], v[59:60], v[51:52]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[67:68], v[49:50], v[53:54]
	v_fma_f64 v[49:50], v[53:54], v[49:50], -v[67:68]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[47:48], v[53:54], v[47:48], v[49:50]
	v_add_f64 v[49:50], v[67:68], v[47:48]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[61:62], v[59:60], -v[49:50]
	v_add_f64 v[67:68], v[49:50], -v[67:68]
	v_add_f64 v[59:60], v[59:60], -v[61:62]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[47:48], v[67:68], -v[47:48]
	v_add_f64 v[49:50], v[59:60], -v[49:50]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[47:48], v[47:48], v[49:50]
	v_add_f64 v[47:48], v[61:62], v[47:48]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[47:48], v[51:52], v[47:48]
	v_add_f64 v[49:50], v[53:54], v[47:48]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[51:52], v[49:50], v[49:50]
	v_fma_f64 v[59:60], v[51:52], s[34:35], s[30:31]
	v_mul_f64 v[61:62], v[49:50], v[51:52]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[59:60], v[51:52], v[59:60], s[36:37]
	v_fma_f64 v[59:60], v[51:52], v[59:60], s[38:39]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[59:60], v[51:52], v[59:60], s[40:41]
	v_fma_f64 v[59:60], v[51:52], v[59:60], s[42:43]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[51:52], v[51:52], v[59:60], s[68:69]
	v_ldexp_f64 v[59:60], v[49:50], 1
	v_add_f64 v[49:50], v[49:50], -v[53:54]
	v_mul_f64 v[51:52], v[61:62], v[51:52]
	v_cvt_f64_i32_e32 v[61:62], v36
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[47:48], v[47:48], -v[49:50]
	v_add_f64 v[53:54], v[59:60], v[51:52]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[67:68], v[61:62], s[44:45]
	v_ldexp_f64 v[47:48], v[47:48], 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[49:50], v[53:54], -v[59:60]
	v_fma_f64 v[59:60], v[61:62], s[44:45], -v[67:68]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[49:50], v[51:52], -v[49:50]
	v_fma_f64 v[51:52], v[61:62], s[46:47], v[59:60]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[47:48], v[47:48], v[49:50]
	v_add_f64 v[49:50], v[67:68], v[51:52]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[59:60], v[53:54], v[47:48]
	v_add_f64 v[67:68], v[49:50], -v[67:68]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[61:62], v[49:50], v[59:60]
	v_add_f64 v[53:54], v[59:60], -v[53:54]
	v_add_f64 v[51:52], v[51:52], -v[67:68]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[69:70], v[61:62], -v[49:50]
	v_add_f64 v[47:48], v[47:48], -v[53:54]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[71:72], v[61:62], -v[69:70]
	v_add_f64 v[53:54], v[59:60], -v[69:70]
	v_add_f64 v[59:60], v[51:52], v[47:48]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[49:50], v[49:50], -v[71:72]
	v_add_f64 v[49:50], v[53:54], v[49:50]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[53:54], v[59:60], -v[51:52]
	v_add_f64 v[49:50], v[59:60], v[49:50]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[59:60], v[59:60], -v[53:54]
	v_add_f64 v[47:48], v[47:48], -v[53:54]
	v_add_f64 v[67:68], v[61:62], v[49:50]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[51:52], v[51:52], -v[59:60]
	v_add_f64 v[53:54], v[67:68], -v[61:62]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[47:48], v[47:48], v[51:52]
	v_mul_f64 v[51:52], v[43:44], v[43:44]
	v_add_f64 v[49:50], v[49:50], -v[53:54]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mul_f64 v[73:74], v[51:52], 0.5
	v_fma_f64 v[75:76], v[51:52], s[50:51], s[48:49]
	v_add_f64 v[47:48], v[47:48], v[49:50]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[85:86], -v[73:74], 1.0
	v_fma_f64 v[75:76], v[51:52], v[75:76], s[52:53]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[47:48], v[67:68], v[47:48]
	v_fma_f64 v[67:68], v[51:52], s[60:61], s[58:59]
	v_fma_f64 v[75:76], v[51:52], v[75:76], s[54:55]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_dual_cndmask_b32 v48, v48, v42 :: v_dual_cndmask_b32 v47, v47, v41
	v_cmp_ngt_f64_e32 vcc_lo, 0, v[41:42]
	v_fma_f64 v[67:68], v[51:52], v[67:68], s[62:63]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[75:76], v[51:52], v[75:76], s[56:57]
	v_mul_f64 v[47:48], v[47:48], -2.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[67:68], v[51:52], v[67:68], s[64:65]
	v_cndmask_b32_e32 v36, 0x7ff80000, v48, vcc_lo
	v_cmp_nge_f64_e32 vcc_lo, 0, v[41:42]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_fma_f64 v[67:68], v[51:52], v[67:68], s[66:67]
	v_cndmask_b32_e32 v47, 0, v47, vcc_lo
	v_cmp_neq_f64_e32 vcc_lo, 0, v[41:42]
	v_mul_f64 v[41:42], v[37:38], v[37:38]
	v_cndmask_b32_e32 v48, 0x7ff00000, v36, vcc_lo
	v_fma_f64 v[49:50], v[41:42], s[60:61], s[58:59]
	v_mul_f64 v[59:60], v[41:42], 0.5
	v_fma_f64 v[61:62], v[41:42], s[50:51], s[48:49]
	v_mul_f64 v[81:82], v[37:38], -v[41:42]
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[47:48]
	v_fma_f64 v[49:50], v[41:42], v[49:50], s[62:63]
	v_add_f64 v[71:72], -v[59:60], 1.0
	v_fma_f64 v[61:62], v[41:42], v[61:62], s[52:53]
	v_cndmask_b32_e64 v36, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v36, 8, v36
	v_ldexp_f64 v[47:48], v[47:48], v36
	v_fma_f64 v[49:50], v[41:42], v[49:50], s[64:65]
	v_add_f64 v[83:84], -v[71:72], 1.0
	v_fma_f64 v[61:62], v[41:42], v[61:62], s[54:55]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_rsq_f64_e32 v[53:54], v[47:48]
	v_cmp_class_f64_e64 s1, v[47:48], 0x260
	v_fma_f64 v[49:50], v[41:42], v[49:50], s[66:67]
	s_delay_alu instid0(VALU_DEP_4)
	v_add_f64 v[59:60], v[83:84], -v[59:60]
	v_add_f64 v[83:84], -v[85:86], 1.0
	v_fma_f64 v[61:62], v[41:42], v[61:62], s[56:57]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[69:70], v[47:48], v[53:54]
	v_mul_f64 v[53:54], v[53:54], 0.5
	v_fma_f64 v[49:50], v[81:82], v[49:50], v[79:80]
	v_mul_f64 v[79:80], v[43:44], -v[51:52]
	v_add_f64 v[73:74], v[83:84], -v[73:74]
	v_mul_f64 v[83:84], v[41:42], v[41:42]
	v_fma_f64 v[61:62], v[41:42], v[61:62], s[70:71]
	v_fma_f64 v[59:60], v[37:38], -v[39:40], v[59:60]
	v_fma_f64 v[77:78], -v[53:54], v[69:70], 0.5
	v_fma_f64 v[39:40], v[41:42], v[49:50], -v[39:40]
	v_fma_f64 v[67:68], v[79:80], v[67:68], v[87:88]
	v_mul_f64 v[49:50], v[51:52], v[51:52]
	v_fma_f64 v[73:74], v[43:44], -v[45:46], v[73:74]
	v_fma_f64 v[69:70], v[69:70], v[77:78], v[69:70]
	v_fma_f64 v[53:54], v[53:54], v[77:78], v[53:54]
	v_fma_f64 v[39:40], v[81:82], s[72:73], v[39:40]
	v_fma_f64 v[45:46], v[51:52], v[67:68], -v[45:46]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[77:78], -v[69:70], v[69:70], v[47:48]
	v_add_f64 v[36:37], v[37:38], -v[39:40]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[45:46], v[79:80], s[72:73], v[45:46]
	v_fma_f64 v[41:42], v[77:78], v[53:54], v[69:70]
	v_fma_f64 v[69:70], v[51:52], v[75:76], s[70:71]
	v_fma_f64 v[51:52], v[83:84], v[61:62], v[59:60]
	v_xor_b32_e32 v37, 0x80000000, v37
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[59:60], -v[41:42], v[41:42], v[47:48]
	v_fma_f64 v[49:50], v[49:50], v[69:70], v[73:74]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[51:52], v[71:72], v[51:52]
	v_fma_f64 v[38:39], v[59:60], v[53:54], v[41:42]
	s_delay_alu instid0(VALU_DEP_3)
	v_add_f64 v[40:41], v[85:86], v[49:50]
	v_add_f64 v[42:43], v[43:44], -v[45:46]
	v_and_b32_e32 v45, 1, v58
	v_cndmask_b32_e64 v49, 0, 0xffffff80, vcc_lo
	v_and_b32_e32 v53, 1, v57
	v_lshlrev_b32_e32 v44, 30, v58
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_eq_u32_e32 vcc_lo, 0, v53
	v_xor_b32_e32 v25, v44, v25
	v_dual_cndmask_b32 v36, v36, v51 :: v_dual_cndmask_b32 v37, v37, v52
	v_cmp_eq_u32_e32 vcc_lo, 0, v45
	v_lshlrev_b32_e32 v24, 30, v57
	v_ldexp_f64 v[38:39], v[38:39], v49
	s_delay_alu instid0(VALU_DEP_2)
	v_dual_cndmask_b32 v41, v41, v43 :: v_dual_and_b32 v24, 0x80000000, v24
	v_cndmask_b32_e32 v40, v40, v42, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	v_and_b32_e32 v44, 0x80000000, v25
	s_cmp_eq_u32 s75, 3
	v_xor_b32_e32 v37, v37, v24
	v_cndmask_b32_e64 v24, 0, v36, s0
	v_cndmask_b32_e64 v21, 0, v40, s0
	s_delay_alu instid0(VALU_DEP_3)
	v_cndmask_b32_e64 v25, 0x7ff80000, v37, s0
	v_cndmask_b32_e64 v37, v39, v48, s1
	v_cndmask_b32_e64 v36, v38, v47, s1
	v_lshlrev_b64 v[38:39], 17, v[31:32]
	v_xor_b32_e32 v32, v34, v32
	v_xor_b32_e32 v31, v33, v31
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[24:25], v[36:37], v[24:25]
	v_cndmask_b32_e32 v19, v19, v24, vcc_lo
	v_xor_b32_e32 v41, v41, v44
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v20, v20, v25, vcc_lo
	v_cndmask_b32_e64 v22, 0x7ff80000, v41, s0
	s_cselect_b32 s0, -1, 0
	s_cmp_eq_u32 s75, 2
	v_cndmask_b32_e64 v18, v18, v25, s0
	s_cselect_b32 s1, -1, 0
	v_mul_f64 v[40:41], v[36:37], v[21:22]
	v_xor_b32_e32 v22, v32, v56
	v_xor_b32_e32 v21, v31, v23
	v_xor_b32_e32 v36, v34, v39
	v_xor_b32_e32 v37, v33, v38
	v_lshlrev_b64 v[33:34], 17, v[31:32]
	s_cmp_eq_u32 s75, 1
	v_lshrrev_b64 v[38:39], 19, v[21:22]
	v_xor_b32_e32 v23, v36, v55
	v_xor_b32_e32 v42, v37, v26
	v_xor_b32_e32 v36, v21, v26
	v_lshlrev_b32_e32 v26, 13, v21
	v_xor_b32_e32 v37, v22, v55
	s_cselect_b32 s2, -1, 0
	s_cmp_eq_u32 s75, 0
	v_xor_b32_e32 v31, v42, v31
	s_cselect_b32 s3, -1, 0
	v_xor_b32_e32 v33, v42, v33
	v_mov_b32_e32 v21, v36
	v_xor_b32_e32 v32, v23, v32
	v_xor_b32_e32 v34, v23, v34
	v_mov_b32_e32 v22, v37
	v_cndmask_b32_e64 v17, v17, v24, s0
	v_cndmask_b32_e64 v16, v16, v25, s1
	v_cndmask_b32_e64 v15, v15, v24, s1
	v_cndmask_b32_e64 v14, v14, v25, s2
	v_cndmask_b32_e64 v13, v13, v24, s2
	v_cndmask_b32_e64 v12, v12, v25, s3
	v_cndmask_b32_e64 v11, v11, v24, s3
	s_add_i32 s75, s75, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s75, 5
	v_cndmask_b32_e32 v9, v9, v40, vcc_lo
	v_or_b32_e32 v39, v26, v39
	v_cndmask_b32_e32 v10, v10, v41, vcc_lo
	v_cndmask_b32_e64 v8, v8, v41, s0
	v_cndmask_b32_e64 v6, v6, v41, s1
	v_cndmask_b32_e64 v4, v4, v41, s2
	v_cndmask_b32_e64 v2, v2, v41, s3
	v_mov_b32_e32 v42, v39
	v_cndmask_b32_e64 v7, v7, v40, s0
	v_cndmask_b32_e64 v5, v5, v40, s1
	v_cndmask_b32_e64 v3, v3, v40, s2
	v_cndmask_b32_e64 v1, v1, v40, s3
	v_mov_b32_e32 v41, v38
	s_cbranch_scc1 .LBB3_23
; %bb.32:                               ; %.lr.ph.i.i.1.i86.i.preheader
                                        ;   in Loop: Header=BB3_22 Depth=1
	v_mov_b32_e32 v21, 0
	v_mov_b32_e32 v22, 0
	s_mov_b32 s3, 0
.LBB3_33:                               ; %.lr.ph.i.i.1.i86.i
                                        ;   Parent Loop BB3_22 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB3_34 Depth 3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s3, 1
	s_mov_b32 s6, s3
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s3, 2
	v_dual_cndmask_b32 v23, v12, v14 :: v_dual_cndmask_b32 v24, v11, v13
	v_dual_cndmask_b32 v25, v2, v4 :: v_dual_cndmask_b32 v26, v1, v3
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s3, 3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v23, v23, v16 :: v_dual_cndmask_b32 v24, v24, v15
	v_dual_cndmask_b32 v25, v25, v6 :: v_dual_cndmask_b32 v26, v26, v5
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s3, 4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v23, v23, v18 :: v_dual_cndmask_b32 v40, v24, v17
	v_cndmask_b32_e32 v25, v25, v8, vcc_lo
	v_cndmask_b32_e32 v41, v26, v7, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_cndmask_b32 v24, v23, v20 :: v_dual_cndmask_b32 v23, v40, v19
	v_cndmask_b32_e32 v26, v25, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_cndmask_b32_e32 v25, v41, v9, vcc_lo
.LBB3_34:                               ;   Parent Loop BB3_22 Depth=1
                                        ;     Parent Loop BB3_33 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_add_i32 s6, s6, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s6, 1
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s6, 2
	v_dual_cndmask_b32 v40, v12, v14 :: v_dual_cndmask_b32 v41, v2, v4
	v_cndmask_b32_e32 v42, v1, v3, vcc_lo
	s_cselect_b32 s0, -1, 0
	s_cmp_eq_u32 s6, 3
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e64 v40, v40, v16, s0
	v_cndmask_b32_e64 v41, v41, v6, s0
	v_cndmask_b32_e64 v42, v42, v5, s0
	s_cselect_b32 s1, -1, 0
	s_cmp_eq_u32 s6, 4
	v_cndmask_b32_e64 v40, v40, v18, s1
	v_cndmask_b32_e64 v43, v41, v8, s1
	v_cndmask_b32_e64 v42, v42, v7, s1
	s_cselect_b32 s2, -1, 0
	s_cmp_lt_u32 s6, 4
	v_cndmask_b32_e64 v41, v40, v20, s2
	v_cndmask_b32_e64 v43, v43, v10, s2
	v_cndmask_b32_e64 v42, v42, v9, s2
	v_cndmask_b32_e32 v40, v11, v13, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[42:43], v[25:26], -v[42:43]
	v_cndmask_b32_e64 v40, v40, v15, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v40, v40, v17, s1
	v_cndmask_b32_e64 v40, v40, v19, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[40:41], v[23:24], -v[40:41]
	v_mul_f64 v[42:43], v[42:43], v[42:43]
	v_fma_f64 v[40:41], v[40:41], v[40:41], v[42:43]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_lt_f64_e32 vcc_lo, v[21:22], v[40:41]
	v_dual_cndmask_b32 v22, v22, v41 :: v_dual_cndmask_b32 v21, v21, v40
	s_cbranch_scc1 .LBB3_34
; %bb.35:                               ; %.loopexit.i.i.1.i92.i
                                        ;   in Loop: Header=BB3_33 Depth=2
	s_add_i32 s3, s3, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s3, 4
	s_cbranch_scc1 .LBB3_33
; %bb.36:                               ;   in Loop: Header=BB3_22 Depth=1
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[21:22]
	s_add_i32 s74, s74, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	s_cmp_lg_u32 s74, 0x10000
	v_cndmask_b32_e64 v23, 0, 1, vcc_lo
	v_lshlrev_b32_e32 v23, 8, v23
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[21:22], v[21:22], v23
	v_rsq_f64_e32 v[23:24], v[21:22]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[25:26], v[21:22], v[23:24]
	v_mul_f64 v[23:24], v[23:24], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[40:41], -v[23:24], v[25:26], 0.5
	v_fma_f64 v[25:26], v[25:26], v[40:41], v[25:26]
	v_fma_f64 v[23:24], v[23:24], v[40:41], v[23:24]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[40:41], -v[25:26], v[25:26], v[21:22]
	v_fma_f64 v[25:26], v[40:41], v[23:24], v[25:26]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[40:41], -v[25:26], v[25:26], v[21:22]
	v_fma_f64 v[23:24], v[40:41], v[23:24], v[25:26]
	v_cndmask_b32_e64 v25, 0, 0xffffff80, vcc_lo
	v_cmp_class_f64_e64 vcc_lo, v[21:22], 0x260
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[23:24], v[23:24], v25
	v_dual_cndmask_b32 v22, v24, v22 :: v_dual_cndmask_b32 v21, v23, v21
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[29:30], v[29:30], v[21:22]
	s_cbranch_scc1 .LBB3_22
; %bb.37:                               ; %_ZNK6thrust11hip_rocprim26transform_input_iterator_tIdNS_17counting_iteratorIjNS_11use_defaultES3_S3_EE11estimate_esEixEl.exit.1.i95.i
	v_add_nc_u32_e32 v1, 0x7ef55f16, v64
	s_mov_b64 s[4:5], 0
                                        ; implicit-def: $vgpr38_vgpr39
                                        ; implicit-def: $vgpr33_vgpr34
                                        ; implicit-def: $vgpr35_vgpr36
                                        ; implicit-def: $vgpr40_vgpr41
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v2, 19, v1
	v_xor3_b32 v1, v1, v2, 0xc761c23c
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v1, v1, 5, v1
	v_add_nc_u32_e32 v2, 0xe9f8cc1d, v1
	v_lshl_add_u32 v1, v1, 9, 0xaccf6200
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v1, v2, v1
	v_lshlrev_b32_e32 v2, 3, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v1, v1, v2, 0xfd7046c5
	v_lshrrev_b32_e32 v2, 16, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_xor3_b32 v1, v1, v2, 0xb55a4f09
.LBB3_38:                               ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v2, 12, v1
	s_cmp_eq_u32 s4, 0
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s4, 1
	v_add3_u32 v1, v1, v2, 0x7ed55d16
	s_cselect_b32 s0, -1, 0
	s_cmp_eq_u32 s4, 2
	s_cselect_b32 s1, -1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v2, 19, v1
	s_cmp_eq_u32 s4, 3
	s_cselect_b32 s2, -1, 0
	s_add_u32 s4, s4, 1
	v_xor3_b32 v1, v1, v2, 0xc761c23c
	s_addc_u32 s5, s5, 0
	s_cmp_lg_u32 s4, 4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v1, v1, 5, v1
	v_add_nc_u32_e32 v2, 0xe9f8cc1d, v1
	v_lshl_add_u32 v1, v1, 9, 0xaccf6200
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v1, v2, v1
	v_lshlrev_b32_e32 v2, 3, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v1, v1, v2, 0xfd7046c5
	v_lshrrev_b32_e32 v2, 16, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor3_b32 v1, v1, v2, 0xb55a4f09
	v_lshlrev_b32_e32 v3, 12, v1
	v_xor_b32_e32 v2, s23, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add3_u32 v1, v1, v3, 0x7ed55d16
	v_cndmask_b32_e32 v39, v39, v2, vcc_lo
	v_cndmask_b32_e64 v34, v34, v2, s0
	v_cndmask_b32_e64 v36, v36, v2, s1
	v_cndmask_b32_e64 v41, v41, v2, s2
	v_lshrrev_b32_e32 v3, 19, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor3_b32 v1, v1, v3, 0xc761c23c
	v_lshl_add_u32 v1, v1, 5, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v3, 0xe9f8cc1d, v1
	v_lshl_add_u32 v1, v1, 9, 0xaccf6200
	v_xor_b32_e32 v1, v3, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v3, 3, v1
	v_add3_u32 v1, v1, v3, 0xfd7046c5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v3, 16, v1
	v_xor3_b32 v1, v1, v3, 0xb55a4f09
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v2, s22, v1
	v_cndmask_b32_e32 v38, v38, v2, vcc_lo
	v_cndmask_b32_e64 v33, v33, v2, s0
	v_cndmask_b32_e64 v35, v35, v2, s1
	v_cndmask_b32_e64 v40, v40, v2, s2
	s_cbranch_scc1 .LBB3_38
; %bb.39:                               ; %.preheader55.i.i.2.i100.i.preheader
	v_mov_b32_e32 v31, 0
	v_dual_mov_b32 v32, 0 :: v_dual_mov_b32 v37, 0
	s_mov_b32 s4, 0x54442d18
	s_mov_b32 s8, 0x33145c07
	s_mov_b32 s10, 0x6dc9c883
	s_mov_b32 s24, 0x33145c00
	s_mov_b32 s26, 0x252049c0
	s_mov_b32 s28, 0x55555555
	s_mov_b32 s30, 0x6b47b09a
	s_mov_b32 s34, 0xbf559e2b
	s_mov_b32 s36, 0xd7f4df2e
	s_mov_b32 s38, 0x16291751
	s_mov_b32 s40, 0x9b27acf1
	s_mov_b32 s42, 0x998ef7b6
	s_mov_b32 s44, 0xfefa39ef
	s_mov_b32 s46, 0x3b39803f
	s_mov_b32 s48, 0x9037ab78
	s_mov_b32 s50, 0x46cc5e42
	s_mov_b32 s52, 0xa17f65f6
	s_mov_b32 s54, 0x19f4ec90
	s_mov_b32 s56, 0x16c16967
	s_mov_b32 s58, 0xb42fdfa7
	s_mov_b32 s60, 0xf9a43bb8
	s_mov_b32 s62, 0x796cde01
	s_mov_b32 s64, 0x19e83e5c
	s_mov_b32 s66, 0x11110bb3
	s_mov_b32 s74, 0
	s_mov_b32 s5, 0x401921fb
	s_mov_b32 s7, 0x3ff921fb
	s_mov_b32 s9, 0x3c91a626
	s_mov_b32 s11, 0x3fe45f30
	s_mov_b32 s13, 0xbff921fb
	s_mov_b32 s25, 0xbc91a626
	s_mov_b32 s27, 0xb97b839a
	s_mov_b32 s29, 0x3fe55555
	s_mov_b32 s31, 0x3fc38538
	s_mov_b32 s35, 0x3fc3ab76
	s_mov_b32 s37, 0x3fc7474d
	s_mov_b32 s39, 0x3fcc71c0
	s_mov_b32 s41, 0x3fd24924
	s_mov_b32 s43, 0x3fd99999
	s_mov_b32 s45, 0x3fe62e42
	s_mov_b32 s47, 0x3c7abc9e
	s_mov_b32 s49, 0x3e21eeb6
	s_mov_b32 s51, 0xbda907db
	s_mov_b32 s53, 0xbe927e4f
	s_mov_b32 s55, 0x3efa01a0
	s_mov_b32 s57, 0xbf56c16c
	s_mov_b32 s59, 0xbe5ae600
	s_mov_b32 s61, 0x3de5e0b2
	s_mov_b32 s63, 0x3ec71de3
	s_mov_b32 s65, 0xbf2a01a0
	s_mov_b32 s67, 0x3f811111
	s_mov_b32 s68, 0x55555780
	s_mov_b32 s71, 0x3fa55555
	s_mov_b32 s73, 0xbfc55555
                                        ; implicit-def: $vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16
                                        ; implicit-def: $vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26
.LBB3_40:                               ; %.preheader55.i.i.2.i100.i
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB3_41 Depth 2
                                        ;     Child Loop BB3_51 Depth 2
                                        ;       Child Loop BB3_52 Depth 3
	v_dual_mov_b32 v21, v38 :: v_dual_mov_b32 v22, v39
	v_dual_mov_b32 v44, v41 :: v_dual_mov_b32 v43, v40
	s_mov_b32 s75, 0
.LBB3_41:                               ;   Parent Loop BB3_40 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v39, v34, v44
	v_xor_b32_e32 v38, v33, v43
                                        ; implicit-def: $vgpr59
                                        ; implicit-def: $vgpr41_vgpr42
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v57, v39, v22
	v_lshrrev_b64 v[23:24], 19, v[38:39]
	v_lshlrev_b32_e32 v25, 13, v38
	v_xor_b32_e32 v26, v38, v21
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_or_b32_e32 v58, v25, v24
	v_add_co_u32 v24, vcc_lo, v23, v26
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v25, vcc_lo, v58, v57, vcc_lo
	v_lshrrev_b64 v[24:25], 11, v[24:25]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_u32_e32 v[38:39], v25
	v_cvt_f64_u32_e32 v[24:25], v24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[38:39], v[38:39], 32
	v_add_f64 v[24:25], v[38:39], v[24:25]
                                        ; implicit-def: $vgpr39_vgpr40
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[24:25], v[24:25], 0xffffffcb
	v_mul_f64 v[24:25], v[24:25], s[4:5]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ngt_f64_e32 vcc_lo, 0x41d00000, v[24:25]
	v_trig_preop_f64 v[53:54], v[24:25], 0
	v_trig_preop_f64 v[51:52], v[24:25], 1
	v_ldexp_f64 v[55:56], v[24:25], 0xffffff80
	v_trig_preop_f64 v[49:50], v[24:25], 2
	s_and_saveexec_b32 s0, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s2, exec_lo, s0
	s_cbranch_execz .LBB3_43
; %bb.42:                               ;   in Loop: Header=BB3_41 Depth=2
	v_cmp_le_f64_e64 s0, 0x7b000000, v[24:25]
	s_mov_b32 s6, s4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v40, v25, v56, s0
	v_cndmask_b32_e64 v39, v24, v55, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_f64 v[41:42], v[53:54], v[39:40]
	v_mul_f64 v[45:46], v[51:52], v[39:40]
	v_mul_f64 v[71:72], v[49:50], v[39:40]
	v_fma_f64 v[47:48], v[53:54], v[39:40], -v[41:42]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[73:74], v[51:52], v[39:40], -v[45:46]
	v_add_f64 v[59:60], v[45:46], v[47:48]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[61:62], v[59:60], -v[45:46]
	v_add_f64 v[69:70], v[41:42], v[59:60]
	v_add_f64 v[67:68], v[59:60], -v[61:62]
	v_add_f64 v[47:48], v[47:48], -v[61:62]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[61:62], v[69:70], -2
	v_add_f64 v[41:42], v[69:70], -v[41:42]
	v_add_f64 v[45:46], v[45:46], -v[67:68]
	v_add_f64 v[67:68], v[71:72], v[73:74]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cmp_neq_f64_e64 s0, 0x7ff00000, |v[61:62]|
	v_add_f64 v[41:42], v[59:60], -v[41:42]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[45:46], v[47:48], v[45:46]
	v_fract_f64_e32 v[47:48], v[61:62]
	v_add_f64 v[59:60], v[67:68], v[45:46]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v48, 0, v48, s0
	v_cndmask_b32_e64 v47, 0, v47, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[47:48], v[47:48], 2
	v_add_f64 v[61:62], v[41:42], v[59:60]
	v_add_f64 v[75:76], v[59:60], -v[67:68]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[69:70], v[61:62], v[47:48]
	v_add_f64 v[81:82], v[59:60], -v[75:76]
	v_add_f64 v[45:46], v[45:46], -v[75:76]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cmp_gt_f64_e64 s0, 0, v[69:70]
	v_add_f64 v[69:70], v[67:68], -v[71:72]
	v_cndmask_b32_e64 v38, 0, 0x40100000, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[79:80], v[67:68], -v[69:70]
	v_add_f64 v[69:70], v[73:74], -v[69:70]
	v_add_f64 v[67:68], v[67:68], -v[81:82]
	v_add_f64 v[47:48], v[47:48], v[37:38]
	v_fma_f64 v[38:39], v[49:50], v[39:40], -v[71:72]
	v_add_f64 v[40:41], v[61:62], -v[41:42]
	v_add_f64 v[73:74], v[71:72], -v[79:80]
	v_add_f64 v[45:46], v[45:46], v[67:68]
	v_add_f64 v[77:78], v[61:62], v[47:48]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[40:41], v[59:60], -v[40:41]
	v_add_f64 v[69:70], v[69:70], v[73:74]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_i32_f64_e32 v63, v[77:78]
	v_add_f64 v[45:46], v[69:70], v[45:46]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_i32_e32 v[75:76], v63
	v_add_f64 v[38:39], v[38:39], v[45:46]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[47:48], v[47:48], -v[75:76]
	v_add_f64 v[39:40], v[40:41], v[38:39]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[67:68], v[61:62], v[47:48]
	v_add_f64 v[45:46], v[67:68], -v[47:48]
	v_cmp_le_f64_e64 s0, 0.5, v[67:68]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[41:42], v[61:62], -v[45:46]
	v_cndmask_b32_e64 v38, 0, 0x3ff00000, s0
	v_add_co_ci_u32_e64 v59, s1, 0, v63, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[39:40], v[39:40], v[41:42]
	v_add_f64 v[41:42], v[67:68], -v[37:38]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[45:46], v[41:42], v[39:40]
	v_mul_f64 v[47:48], v[45:46], s[6:7]
	v_add_f64 v[41:42], v[45:46], -v[41:42]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[60:61], v[45:46], s[6:7], -v[47:48]
	v_add_f64 v[38:39], v[39:40], -v[41:42]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[40:41], v[45:46], s[8:9], v[60:61]
	v_fma_f64 v[41:42], v[38:39], s[6:7], v[40:41]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[39:40], v[47:48], v[41:42]
	v_add_f64 v[45:46], v[39:40], -v[47:48]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[41:42], v[41:42], -v[45:46]
.LBB3_43:                               ; %Flow1201
                                        ;   in Loop: Header=BB3_41 Depth=2
	s_and_not1_saveexec_b32 s0, s2
	s_cbranch_execz .LBB3_45
; %bb.44:                               ;   in Loop: Header=BB3_41 Depth=2
	v_mul_f64 v[38:39], v[24:25], s[10:11]
	s_mov_b32 s12, s4
	s_mov_b32 s2, s24
	s_mov_b32 s3, s9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[45:46], v[38:39]
	v_fma_f64 v[38:39], v[45:46], s[12:13], v[24:25]
	v_mul_f64 v[40:41], v[45:46], s[24:25]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[59:60], v[45:46], s[24:25], v[38:39]
	v_add_f64 v[47:48], v[38:39], v[40:41]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[38:39], v[38:39], -v[47:48]
	v_add_f64 v[47:48], v[47:48], -v[59:60]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[38:39], v[38:39], v[40:41]
	v_fma_f64 v[40:41], v[45:46], s[2:3], v[40:41]
	v_add_f64 v[38:39], v[47:48], v[38:39]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[38:39], v[38:39], -v[40:41]
	v_fma_f64 v[41:42], v[45:46], s[26:27], v[38:39]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[39:40], v[59:60], v[41:42]
	v_add_f64 v[47:48], v[39:40], -v[59:60]
	v_cvt_i32_f64_e32 v59, v[45:46]
	s_delay_alu instid0(VALU_DEP_2)
	v_add_f64 v[41:42], v[41:42], -v[47:48]
.LBB3_45:                               ; %_ZL3cosd.exit.i.i.2.i110.i
                                        ;   in Loop: Header=BB3_41 Depth=2
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $vgpr60
                                        ; implicit-def: $vgpr45_vgpr46
                                        ; implicit-def: $vgpr47_vgpr48
	s_and_saveexec_b32 s0, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s1, exec_lo, s0
	s_cbranch_execz .LBB3_47
; %bb.46:                               ;   in Loop: Header=BB3_41 Depth=2
	v_cmp_le_f64_e32 vcc_lo, 0x7b000000, v[24:25]
	s_mov_b32 s6, s4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v46, v25, v56 :: v_dual_cndmask_b32 v45, v24, v55
	v_mul_f64 v[47:48], v[53:54], v[45:46]
	v_mul_f64 v[55:56], v[51:52], v[45:46]
	v_mul_f64 v[71:72], v[49:50], v[45:46]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[53:54], v[53:54], v[45:46], -v[47:48]
	v_fma_f64 v[51:52], v[51:52], v[45:46], -v[55:56]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[45:46], v[49:50], v[45:46], -v[71:72]
	v_add_f64 v[60:61], v[55:56], v[53:54]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[62:63], v[60:61], -v[55:56]
	v_add_f64 v[69:70], v[47:48], v[60:61]
	v_add_f64 v[67:68], v[60:61], -v[62:63]
	v_add_f64 v[53:54], v[53:54], -v[62:63]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[62:63], v[69:70], -2
	v_add_f64 v[47:48], v[69:70], -v[47:48]
	v_add_f64 v[55:56], v[55:56], -v[67:68]
	v_add_f64 v[67:68], v[71:72], v[51:52]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[62:63]|
	v_add_f64 v[47:48], v[60:61], -v[47:48]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[53:54], v[53:54], v[55:56]
	v_fract_f64_e32 v[55:56], v[62:63]
	v_add_f64 v[60:61], v[67:68], v[53:54]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v56, 0, v56 :: v_dual_cndmask_b32 v55, 0, v55
	v_ldexp_f64 v[55:56], v[55:56], 2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[62:63], v[47:48], v[60:61]
	v_add_f64 v[73:74], v[60:61], -v[67:68]
	v_add_f64 v[69:70], v[62:63], v[55:56]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[79:80], v[60:61], -v[73:74]
	v_add_f64 v[53:54], v[53:54], -v[73:74]
	v_add_f64 v[47:48], v[62:63], -v[47:48]
	v_cmp_gt_f64_e32 vcc_lo, 0, v[69:70]
	v_add_f64 v[69:70], v[67:68], -v[71:72]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[47:48], v[60:61], -v[47:48]
	v_cndmask_b32_e64 v38, 0, 0x40100000, vcc_lo
	v_add_f64 v[77:78], v[67:68], -v[69:70]
	v_add_f64 v[51:52], v[51:52], -v[69:70]
	v_add_f64 v[67:68], v[67:68], -v[79:80]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[55:56], v[55:56], v[37:38]
	v_add_f64 v[69:70], v[71:72], -v[77:78]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[53:54], v[53:54], v[67:68]
	v_add_f64 v[75:76], v[62:63], v[55:56]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[51:52], v[51:52], v[69:70]
	v_cvt_i32_f64_e32 v38, v[75:76]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[49:50], v[51:52], v[53:54]
	v_cvt_f64_i32_e32 v[73:74], v38
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[45:46], v[45:46], v[49:50]
	v_add_f64 v[55:56], v[55:56], -v[73:74]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[45:46], v[47:48], v[45:46]
	v_add_f64 v[51:52], v[62:63], v[55:56]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[49:50], v[51:52], -v[55:56]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[51:52]
	v_add_f64 v[47:48], v[62:63], -v[49:50]
	v_add_co_ci_u32_e64 v60, s0, 0, v38, vcc_lo
	v_cndmask_b32_e64 v38, 0, 0x3ff00000, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[45:46], v[45:46], v[47:48]
	v_add_f64 v[47:48], v[51:52], -v[37:38]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[49:50], v[47:48], v[45:46]
	v_mul_f64 v[51:52], v[49:50], s[6:7]
	v_add_f64 v[47:48], v[49:50], -v[47:48]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[53:54], v[49:50], s[6:7], -v[51:52]
	v_add_f64 v[45:46], v[45:46], -v[47:48]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[47:48], v[49:50], s[8:9], v[53:54]
	v_fma_f64 v[47:48], v[45:46], s[6:7], v[47:48]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[45:46], v[51:52], v[47:48]
	v_add_f64 v[49:50], v[45:46], -v[51:52]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[47:48], v[47:48], -v[49:50]
.LBB3_47:                               ; %Flow1200
                                        ;   in Loop: Header=BB3_41 Depth=2
	s_and_not1_saveexec_b32 s0, s1
	s_cbranch_execz .LBB3_49
; %bb.48:                               ;   in Loop: Header=BB3_41 Depth=2
	v_mul_f64 v[45:46], v[24:25], s[10:11]
	s_mov_b32 s12, s4
	s_mov_b32 s2, s24
	s_mov_b32 s3, s9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[49:50], v[45:46]
	v_fma_f64 v[45:46], v[49:50], s[12:13], v[24:25]
	v_mul_f64 v[47:48], v[49:50], s[24:25]
	v_cvt_i32_f64_e32 v60, v[49:50]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[53:54], v[49:50], s[24:25], v[45:46]
	v_add_f64 v[51:52], v[45:46], v[47:48]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[45:46], v[45:46], -v[51:52]
	v_add_f64 v[51:52], v[51:52], -v[53:54]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[45:46], v[45:46], v[47:48]
	v_fma_f64 v[47:48], v[49:50], s[2:3], v[47:48]
	v_add_f64 v[45:46], v[51:52], v[45:46]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[45:46], v[45:46], -v[47:48]
	v_fma_f64 v[47:48], v[49:50], s[26:27], v[45:46]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[45:46], v[53:54], v[47:48]
	v_add_f64 v[51:52], v[45:46], -v[53:54]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[47:48], v[47:48], -v[51:52]
.LBB3_49:                               ; %_ZL3sind.exit.i.i.2.i115.i
                                        ;   in Loop: Header=BB3_41 Depth=2
	s_or_b32 exec_lo, exec_lo, s0
	v_add_co_u32 v43, vcc_lo, v43, v21
	v_add_co_ci_u32_e32 v44, vcc_lo, v44, v22, vcc_lo
	s_mov_b32 s69, s29
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_f64 v[81:82], v[41:42], 0.5
	v_mul_f64 v[89:90], v[47:48], 0.5
	s_delay_alu instid0(VALU_DEP_3)
	v_lshrrev_b64 v[43:44], 11, v[43:44]
	s_mov_b32 s70, s28
	s_mov_b32 s72, s28
	v_cmp_lg_f64_e64 s0, 0x7ff00000, v[24:25]
	s_cmp_eq_u32 s75, 4
	v_xor_b32_e32 v36, v36, v22
	v_cvt_f64_u32_e32 v[49:50], v44
	v_cvt_f64_u32_e32 v[43:44], v43
	v_xor_b32_e32 v35, v35, v21
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[49:50], v[49:50], 32
	v_add_f64 v[43:44], v[49:50], v[43:44]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[43:44], v[43:44], 0xffffffcb
	v_frexp_mant_f64_e32 v[49:50], v[43:44]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f64_e32 vcc_lo, s[28:29], v[49:50]
	v_cndmask_b32_e64 v38, 0, 1, vcc_lo
	v_ldexp_f64 v[49:50], v[49:50], v38
	v_frexp_exp_i32_f64_e32 v38, v[43:44]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[51:52], v[49:50], 1.0
	v_add_f64 v[61:62], v[49:50], -1.0
	v_subrev_co_ci_u32_e32 v38, vcc_lo, 0, v38, vcc_lo
	v_cmp_eq_f64_e32 vcc_lo, 0x7ff00000, v[43:44]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[53:54], v[51:52]
	v_add_f64 v[67:68], v[51:52], -1.0
	v_add_f64 v[49:50], v[49:50], -v[67:68]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[55:56], -v[51:52], v[53:54], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[53:54], v[55:56], v[53:54], v[53:54]
	v_fma_f64 v[55:56], -v[51:52], v[53:54], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[53:54], v[55:56], v[53:54], v[53:54]
	v_mul_f64 v[55:56], v[61:62], v[53:54]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[69:70], v[51:52], v[55:56]
	v_fma_f64 v[51:52], v[55:56], v[51:52], -v[69:70]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[49:50], v[55:56], v[49:50], v[51:52]
	v_add_f64 v[51:52], v[69:70], v[49:50]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[67:68], v[61:62], -v[51:52]
	v_add_f64 v[69:70], v[51:52], -v[69:70]
	v_add_f64 v[61:62], v[61:62], -v[67:68]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[49:50], v[69:70], -v[49:50]
	v_add_f64 v[51:52], v[61:62], -v[51:52]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[49:50], v[49:50], v[51:52]
	v_add_f64 v[49:50], v[67:68], v[49:50]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[49:50], v[53:54], v[49:50]
	v_add_f64 v[51:52], v[55:56], v[49:50]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[53:54], v[51:52], v[51:52]
	v_fma_f64 v[61:62], v[53:54], s[34:35], s[30:31]
	v_mul_f64 v[67:68], v[51:52], v[53:54]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[61:62], v[53:54], v[61:62], s[36:37]
	v_fma_f64 v[61:62], v[53:54], v[61:62], s[38:39]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[61:62], v[53:54], v[61:62], s[40:41]
	v_fma_f64 v[61:62], v[53:54], v[61:62], s[42:43]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[53:54], v[53:54], v[61:62], s[68:69]
	v_ldexp_f64 v[61:62], v[51:52], 1
	v_add_f64 v[51:52], v[51:52], -v[55:56]
	v_mul_f64 v[53:54], v[67:68], v[53:54]
	v_cvt_f64_i32_e32 v[67:68], v38
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[49:50], v[49:50], -v[51:52]
	v_add_f64 v[55:56], v[61:62], v[53:54]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[69:70], v[67:68], s[44:45]
	v_ldexp_f64 v[49:50], v[49:50], 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[51:52], v[55:56], -v[61:62]
	v_fma_f64 v[61:62], v[67:68], s[44:45], -v[69:70]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[51:52], v[53:54], -v[51:52]
	v_fma_f64 v[53:54], v[67:68], s[46:47], v[61:62]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[49:50], v[49:50], v[51:52]
	v_add_f64 v[51:52], v[69:70], v[53:54]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[61:62], v[55:56], v[49:50]
	v_add_f64 v[69:70], v[51:52], -v[69:70]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[67:68], v[51:52], v[61:62]
	v_add_f64 v[55:56], v[61:62], -v[55:56]
	v_add_f64 v[53:54], v[53:54], -v[69:70]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[71:72], v[67:68], -v[51:52]
	v_add_f64 v[49:50], v[49:50], -v[55:56]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[73:74], v[67:68], -v[71:72]
	v_add_f64 v[55:56], v[61:62], -v[71:72]
	v_add_f64 v[61:62], v[53:54], v[49:50]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[51:52], v[51:52], -v[73:74]
	v_add_f64 v[51:52], v[55:56], v[51:52]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[55:56], v[61:62], -v[53:54]
	v_add_f64 v[51:52], v[61:62], v[51:52]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[61:62], v[61:62], -v[55:56]
	v_add_f64 v[49:50], v[49:50], -v[55:56]
	v_add_f64 v[69:70], v[67:68], v[51:52]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[53:54], v[53:54], -v[61:62]
	v_add_f64 v[55:56], v[69:70], -v[67:68]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[49:50], v[49:50], v[53:54]
	v_mul_f64 v[53:54], v[45:46], v[45:46]
	v_add_f64 v[51:52], v[51:52], -v[55:56]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mul_f64 v[75:76], v[53:54], 0.5
	v_fma_f64 v[77:78], v[53:54], s[50:51], s[48:49]
	v_add_f64 v[49:50], v[49:50], v[51:52]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[87:88], -v[75:76], 1.0
	v_fma_f64 v[77:78], v[53:54], v[77:78], s[52:53]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[49:50], v[69:70], v[49:50]
	v_fma_f64 v[69:70], v[53:54], s[60:61], s[58:59]
	v_fma_f64 v[77:78], v[53:54], v[77:78], s[54:55]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_dual_cndmask_b32 v50, v50, v44 :: v_dual_cndmask_b32 v49, v49, v43
	v_cmp_ngt_f64_e32 vcc_lo, 0, v[43:44]
	v_fma_f64 v[69:70], v[53:54], v[69:70], s[62:63]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[77:78], v[53:54], v[77:78], s[56:57]
	v_mul_f64 v[49:50], v[49:50], -2.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[69:70], v[53:54], v[69:70], s[64:65]
	v_cndmask_b32_e32 v38, 0x7ff80000, v50, vcc_lo
	v_cmp_nge_f64_e32 vcc_lo, 0, v[43:44]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_fma_f64 v[69:70], v[53:54], v[69:70], s[66:67]
	v_cndmask_b32_e32 v49, 0, v49, vcc_lo
	v_cmp_neq_f64_e32 vcc_lo, 0, v[43:44]
	v_mul_f64 v[43:44], v[39:40], v[39:40]
	v_cndmask_b32_e32 v50, 0x7ff00000, v38, vcc_lo
	v_fma_f64 v[51:52], v[43:44], s[60:61], s[58:59]
	v_mul_f64 v[61:62], v[43:44], 0.5
	v_fma_f64 v[67:68], v[43:44], s[50:51], s[48:49]
	v_mul_f64 v[83:84], v[39:40], -v[43:44]
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[49:50]
	v_fma_f64 v[51:52], v[43:44], v[51:52], s[62:63]
	v_add_f64 v[73:74], -v[61:62], 1.0
	v_fma_f64 v[67:68], v[43:44], v[67:68], s[52:53]
	v_cndmask_b32_e64 v38, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v38, 8, v38
	v_ldexp_f64 v[49:50], v[49:50], v38
	v_fma_f64 v[51:52], v[43:44], v[51:52], s[64:65]
	v_add_f64 v[85:86], -v[73:74], 1.0
	v_fma_f64 v[67:68], v[43:44], v[67:68], s[54:55]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_rsq_f64_e32 v[55:56], v[49:50]
	v_cmp_class_f64_e64 s1, v[49:50], 0x260
	v_fma_f64 v[51:52], v[43:44], v[51:52], s[66:67]
	s_delay_alu instid0(VALU_DEP_4)
	v_add_f64 v[61:62], v[85:86], -v[61:62]
	v_add_f64 v[85:86], -v[87:88], 1.0
	v_fma_f64 v[67:68], v[43:44], v[67:68], s[56:57]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[71:72], v[49:50], v[55:56]
	v_mul_f64 v[55:56], v[55:56], 0.5
	v_fma_f64 v[51:52], v[83:84], v[51:52], v[81:82]
	v_mul_f64 v[81:82], v[45:46], -v[53:54]
	v_add_f64 v[75:76], v[85:86], -v[75:76]
	v_mul_f64 v[85:86], v[43:44], v[43:44]
	v_fma_f64 v[67:68], v[43:44], v[67:68], s[70:71]
	v_fma_f64 v[61:62], v[39:40], -v[41:42], v[61:62]
	v_fma_f64 v[79:80], -v[55:56], v[71:72], 0.5
	v_fma_f64 v[41:42], v[43:44], v[51:52], -v[41:42]
	v_fma_f64 v[69:70], v[81:82], v[69:70], v[89:90]
	v_mul_f64 v[51:52], v[53:54], v[53:54]
	v_fma_f64 v[75:76], v[45:46], -v[47:48], v[75:76]
	v_fma_f64 v[71:72], v[71:72], v[79:80], v[71:72]
	v_fma_f64 v[55:56], v[55:56], v[79:80], v[55:56]
	v_fma_f64 v[41:42], v[83:84], s[72:73], v[41:42]
	v_fma_f64 v[47:48], v[53:54], v[69:70], -v[47:48]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[79:80], -v[71:72], v[71:72], v[49:50]
	v_add_f64 v[38:39], v[39:40], -v[41:42]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[47:48], v[81:82], s[72:73], v[47:48]
	v_fma_f64 v[43:44], v[79:80], v[55:56], v[71:72]
	v_fma_f64 v[71:72], v[53:54], v[77:78], s[70:71]
	v_fma_f64 v[53:54], v[85:86], v[67:68], v[61:62]
	v_xor_b32_e32 v39, 0x80000000, v39
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[61:62], -v[43:44], v[43:44], v[49:50]
	v_fma_f64 v[51:52], v[51:52], v[71:72], v[75:76]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[53:54], v[73:74], v[53:54]
	v_fma_f64 v[40:41], v[61:62], v[55:56], v[43:44]
	s_delay_alu instid0(VALU_DEP_3)
	v_add_f64 v[42:43], v[87:88], v[51:52]
	v_add_f64 v[44:45], v[45:46], -v[47:48]
	v_and_b32_e32 v47, 1, v60
	v_cndmask_b32_e64 v51, 0, 0xffffff80, vcc_lo
	v_and_b32_e32 v55, 1, v59
	v_lshlrev_b32_e32 v46, 30, v60
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_eq_u32_e32 vcc_lo, 0, v55
	v_xor_b32_e32 v25, v46, v25
	v_dual_cndmask_b32 v38, v38, v53 :: v_dual_cndmask_b32 v39, v39, v54
	v_cmp_eq_u32_e32 vcc_lo, 0, v47
	v_lshlrev_b32_e32 v24, 30, v59
	v_ldexp_f64 v[40:41], v[40:41], v51
	v_dual_cndmask_b32 v43, v43, v45 :: v_dual_cndmask_b32 v42, v42, v44
	s_cselect_b32 vcc_lo, -1, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_and_b32_e32 v24, 0x80000000, v24
	v_and_b32_e32 v46, 0x80000000, v25
	s_cmp_eq_u32 s75, 3
	v_cndmask_b32_e64 v21, 0, v42, s0
	v_xor_b32_e32 v39, v39, v24
	v_cndmask_b32_e64 v24, 0, v38, s0
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e64 v25, 0x7ff80000, v39, s0
	v_cndmask_b32_e64 v39, v41, v50, s1
	v_cndmask_b32_e64 v38, v40, v49, s1
	v_lshlrev_b64 v[40:41], 17, v[33:34]
	v_xor_b32_e32 v34, v36, v34
	v_xor_b32_e32 v33, v35, v33
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[24:25], v[38:39], v[24:25]
	v_cndmask_b32_e32 v19, v19, v24, vcc_lo
	v_xor_b32_e32 v43, v43, v46
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v20, v20, v25, vcc_lo
	v_cndmask_b32_e64 v22, 0x7ff80000, v43, s0
	s_cselect_b32 s0, -1, 0
	s_cmp_eq_u32 s75, 2
	v_cndmask_b32_e64 v18, v18, v25, s0
	s_cselect_b32 s1, -1, 0
	v_mul_f64 v[42:43], v[38:39], v[21:22]
	v_xor_b32_e32 v22, v34, v58
	v_xor_b32_e32 v21, v33, v23
	v_xor_b32_e32 v38, v36, v41
	v_xor_b32_e32 v39, v35, v40
	v_lshlrev_b64 v[35:36], 17, v[33:34]
	s_cmp_eq_u32 s75, 1
	v_lshrrev_b64 v[40:41], 19, v[21:22]
	v_xor_b32_e32 v23, v38, v57
	v_xor_b32_e32 v44, v39, v26
	v_xor_b32_e32 v38, v21, v26
	v_lshlrev_b32_e32 v26, 13, v21
	v_xor_b32_e32 v39, v22, v57
	s_cselect_b32 s2, -1, 0
	s_cmp_eq_u32 s75, 0
	v_xor_b32_e32 v33, v44, v33
	v_or_b32_e32 v41, v26, v41
	s_cselect_b32 s3, -1, 0
	v_xor_b32_e32 v35, v44, v35
	v_mov_b32_e32 v21, v38
	v_xor_b32_e32 v34, v23, v34
	v_xor_b32_e32 v36, v23, v36
	v_mov_b32_e32 v22, v39
	v_cndmask_b32_e64 v17, v17, v24, s0
	v_cndmask_b32_e64 v16, v16, v25, s1
	v_cndmask_b32_e64 v15, v15, v24, s1
	v_cndmask_b32_e64 v14, v14, v25, s2
	v_cndmask_b32_e64 v13, v13, v24, s2
	v_cndmask_b32_e64 v12, v12, v25, s3
	v_cndmask_b32_e64 v11, v11, v24, s3
	s_add_i32 s75, s75, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s75, 5
	v_cndmask_b32_e32 v10, v10, v43, vcc_lo
	v_cndmask_b32_e64 v8, v8, v43, s0
	v_cndmask_b32_e64 v6, v6, v43, s1
	v_cndmask_b32_e64 v4, v4, v43, s2
	v_cndmask_b32_e64 v2, v2, v43, s3
	v_mov_b32_e32 v44, v41
	v_cndmask_b32_e32 v9, v9, v42, vcc_lo
	v_cndmask_b32_e64 v7, v7, v42, s0
	v_cndmask_b32_e64 v5, v5, v42, s1
	v_cndmask_b32_e64 v3, v3, v42, s2
	v_cndmask_b32_e64 v1, v1, v42, s3
	v_mov_b32_e32 v43, v40
	s_cbranch_scc1 .LBB3_41
; %bb.50:                               ; %.lr.ph.i.i.2.i122.i.preheader
                                        ;   in Loop: Header=BB3_40 Depth=1
	v_mov_b32_e32 v21, 0
	v_mov_b32_e32 v22, 0
	s_mov_b32 s3, 0
.LBB3_51:                               ; %.lr.ph.i.i.2.i122.i
                                        ;   Parent Loop BB3_40 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB3_52 Depth 3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s3, 1
	s_mov_b32 s6, s3
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s3, 2
	v_dual_cndmask_b32 v23, v12, v14 :: v_dual_cndmask_b32 v24, v11, v13
	v_dual_cndmask_b32 v25, v2, v4 :: v_dual_cndmask_b32 v26, v1, v3
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s3, 3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v23, v23, v16 :: v_dual_cndmask_b32 v24, v24, v15
	v_dual_cndmask_b32 v25, v25, v6 :: v_dual_cndmask_b32 v26, v26, v5
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s3, 4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v23, v23, v18 :: v_dual_cndmask_b32 v42, v24, v17
	v_cndmask_b32_e32 v25, v25, v8, vcc_lo
	v_cndmask_b32_e32 v43, v26, v7, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v24, v23, v20 :: v_dual_cndmask_b32 v23, v42, v19
	v_dual_cndmask_b32 v26, v25, v10 :: v_dual_cndmask_b32 v25, v43, v9
.LBB3_52:                               ;   Parent Loop BB3_40 Depth=1
                                        ;     Parent Loop BB3_51 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_add_i32 s6, s6, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s6, 1
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s6, 2
	v_dual_cndmask_b32 v42, v12, v14 :: v_dual_cndmask_b32 v43, v2, v4
	v_cndmask_b32_e32 v44, v1, v3, vcc_lo
	s_cselect_b32 s0, -1, 0
	s_cmp_eq_u32 s6, 3
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e64 v42, v42, v16, s0
	v_cndmask_b32_e64 v43, v43, v6, s0
	v_cndmask_b32_e64 v44, v44, v5, s0
	s_cselect_b32 s1, -1, 0
	s_cmp_eq_u32 s6, 4
	v_cndmask_b32_e64 v42, v42, v18, s1
	v_cndmask_b32_e64 v45, v43, v8, s1
	v_cndmask_b32_e64 v44, v44, v7, s1
	s_cselect_b32 s2, -1, 0
	s_cmp_lt_u32 s6, 4
	v_cndmask_b32_e64 v43, v42, v20, s2
	v_cndmask_b32_e64 v45, v45, v10, s2
	v_cndmask_b32_e64 v44, v44, v9, s2
	v_cndmask_b32_e32 v42, v11, v13, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[44:45], v[25:26], -v[44:45]
	v_cndmask_b32_e64 v42, v42, v15, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v42, v42, v17, s1
	v_cndmask_b32_e64 v42, v42, v19, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[42:43], v[23:24], -v[42:43]
	v_mul_f64 v[44:45], v[44:45], v[44:45]
	v_fma_f64 v[42:43], v[42:43], v[42:43], v[44:45]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_lt_f64_e32 vcc_lo, v[21:22], v[42:43]
	v_dual_cndmask_b32 v22, v22, v43 :: v_dual_cndmask_b32 v21, v21, v42
	s_cbranch_scc1 .LBB3_52
; %bb.53:                               ; %.loopexit.i.i.2.i128.i
                                        ;   in Loop: Header=BB3_51 Depth=2
	s_add_i32 s3, s3, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s3, 4
	s_cbranch_scc1 .LBB3_51
; %bb.54:                               ;   in Loop: Header=BB3_40 Depth=1
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[21:22]
	s_add_i32 s74, s74, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	s_cmp_lg_u32 s74, 0x10000
	v_cndmask_b32_e64 v23, 0, 1, vcc_lo
	v_lshlrev_b32_e32 v23, 8, v23
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[21:22], v[21:22], v23
	v_rsq_f64_e32 v[23:24], v[21:22]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[25:26], v[21:22], v[23:24]
	v_mul_f64 v[23:24], v[23:24], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[42:43], -v[23:24], v[25:26], 0.5
	v_fma_f64 v[25:26], v[25:26], v[42:43], v[25:26]
	v_fma_f64 v[23:24], v[23:24], v[42:43], v[23:24]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[42:43], -v[25:26], v[25:26], v[21:22]
	v_fma_f64 v[25:26], v[42:43], v[23:24], v[25:26]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[42:43], -v[25:26], v[25:26], v[21:22]
	v_fma_f64 v[23:24], v[42:43], v[23:24], v[25:26]
	v_cndmask_b32_e64 v25, 0, 0xffffff80, vcc_lo
	v_cmp_class_f64_e64 vcc_lo, v[21:22], 0x260
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[23:24], v[23:24], v25
	v_dual_cndmask_b32 v22, v24, v22 :: v_dual_cndmask_b32 v21, v23, v21
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[31:32], v[31:32], v[21:22]
	s_cbranch_scc1 .LBB3_40
; %bb.55:                               ; %_ZNK6thrust11hip_rocprim26transform_input_iterator_tIdNS_17counting_iteratorIjNS_11use_defaultES3_S3_EE11estimate_esEixEl.exit.2.i131.i
	v_add_nc_u32_e32 v1, 0x7f056016, v64
	s_mov_b64 s[4:5], 0
                                        ; implicit-def: $vgpr40_vgpr41
                                        ; implicit-def: $vgpr35_vgpr36
                                        ; implicit-def: $vgpr37_vgpr38
                                        ; implicit-def: $vgpr42_vgpr43
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v2, 19, v1
	v_xor3_b32 v1, v1, v2, 0xc761c23c
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v1, v1, 5, v1
	v_add_nc_u32_e32 v2, 0xe9f8cc1d, v1
	v_lshl_add_u32 v1, v1, 9, 0xaccf6200
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v1, v2, v1
	v_lshlrev_b32_e32 v2, 3, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v1, v1, v2, 0xfd7046c5
	v_lshrrev_b32_e32 v2, 16, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_xor3_b32 v1, v1, v2, 0xb55a4f09
.LBB3_56:                               ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v2, 12, v1
	s_cmp_eq_u32 s4, 0
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s4, 1
	v_add3_u32 v1, v1, v2, 0x7ed55d16
	s_cselect_b32 s0, -1, 0
	s_cmp_eq_u32 s4, 2
	s_cselect_b32 s1, -1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v2, 19, v1
	s_cmp_eq_u32 s4, 3
	s_cselect_b32 s2, -1, 0
	s_add_u32 s4, s4, 1
	v_xor3_b32 v1, v1, v2, 0xc761c23c
	s_addc_u32 s5, s5, 0
	s_cmp_lg_u32 s4, 4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v1, v1, 5, v1
	v_add_nc_u32_e32 v2, 0xe9f8cc1d, v1
	v_lshl_add_u32 v1, v1, 9, 0xaccf6200
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v1, v2, v1
	v_lshlrev_b32_e32 v2, 3, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v1, v1, v2, 0xfd7046c5
	v_lshrrev_b32_e32 v2, 16, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor3_b32 v1, v1, v2, 0xb55a4f09
	v_lshlrev_b32_e32 v3, 12, v1
	v_xor_b32_e32 v2, s23, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add3_u32 v1, v1, v3, 0x7ed55d16
	v_cndmask_b32_e32 v41, v41, v2, vcc_lo
	v_cndmask_b32_e64 v36, v36, v2, s0
	v_cndmask_b32_e64 v38, v38, v2, s1
	v_cndmask_b32_e64 v43, v43, v2, s2
	v_lshrrev_b32_e32 v3, 19, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor3_b32 v1, v1, v3, 0xc761c23c
	v_lshl_add_u32 v1, v1, 5, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v3, 0xe9f8cc1d, v1
	v_lshl_add_u32 v1, v1, 9, 0xaccf6200
	v_xor_b32_e32 v1, v3, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v3, 3, v1
	v_add3_u32 v1, v1, v3, 0xfd7046c5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v3, 16, v1
	v_xor3_b32 v1, v1, v3, 0xb55a4f09
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v2, s22, v1
	v_cndmask_b32_e32 v40, v40, v2, vcc_lo
	v_cndmask_b32_e64 v35, v35, v2, s0
	v_cndmask_b32_e64 v37, v37, v2, s1
	v_cndmask_b32_e64 v42, v42, v2, s2
	s_cbranch_scc1 .LBB3_56
; %bb.57:                               ; %.preheader55.i.i.3.i136.i.preheader
	v_mov_b32_e32 v33, 0
	v_dual_mov_b32 v34, 0 :: v_dual_mov_b32 v39, 0
	s_mov_b32 s4, 0x54442d18
	s_mov_b32 s8, 0x33145c07
	s_mov_b32 s10, 0x6dc9c883
	s_mov_b32 s24, 0x33145c00
	s_mov_b32 s26, 0x252049c0
	s_mov_b32 s28, 0x55555555
	s_mov_b32 s30, 0x6b47b09a
	s_mov_b32 s34, 0xbf559e2b
	s_mov_b32 s36, 0xd7f4df2e
	s_mov_b32 s38, 0x16291751
	s_mov_b32 s40, 0x9b27acf1
	s_mov_b32 s42, 0x998ef7b6
	s_mov_b32 s44, 0xfefa39ef
	s_mov_b32 s46, 0x3b39803f
	s_mov_b32 s48, 0x9037ab78
	s_mov_b32 s50, 0x46cc5e42
	s_mov_b32 s52, 0xa17f65f6
	s_mov_b32 s54, 0x19f4ec90
	s_mov_b32 s56, 0x16c16967
	s_mov_b32 s58, 0xb42fdfa7
	s_mov_b32 s60, 0xf9a43bb8
	s_mov_b32 s62, 0x796cde01
	s_mov_b32 s64, 0x19e83e5c
	s_mov_b32 s66, 0x11110bb3
	s_mov_b32 s74, 0
	s_mov_b32 s5, 0x401921fb
	s_mov_b32 s7, 0x3ff921fb
	s_mov_b32 s9, 0x3c91a626
	s_mov_b32 s11, 0x3fe45f30
	s_mov_b32 s13, 0xbff921fb
	s_mov_b32 s25, 0xbc91a626
	s_mov_b32 s27, 0xb97b839a
	s_mov_b32 s29, 0x3fe55555
	s_mov_b32 s31, 0x3fc38538
	s_mov_b32 s35, 0x3fc3ab76
	s_mov_b32 s37, 0x3fc7474d
	s_mov_b32 s39, 0x3fcc71c0
	s_mov_b32 s41, 0x3fd24924
	s_mov_b32 s43, 0x3fd99999
	s_mov_b32 s45, 0x3fe62e42
	s_mov_b32 s47, 0x3c7abc9e
	s_mov_b32 s49, 0x3e21eeb6
	s_mov_b32 s51, 0xbda907db
	s_mov_b32 s53, 0xbe927e4f
	s_mov_b32 s55, 0x3efa01a0
	s_mov_b32 s57, 0xbf56c16c
	s_mov_b32 s59, 0xbe5ae600
	s_mov_b32 s61, 0x3de5e0b2
	s_mov_b32 s63, 0x3ec71de3
	s_mov_b32 s65, 0xbf2a01a0
	s_mov_b32 s67, 0x3f811111
	s_mov_b32 s68, 0x55555780
	s_mov_b32 s71, 0x3fa55555
	s_mov_b32 s73, 0xbfc55555
                                        ; implicit-def: $vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16
                                        ; implicit-def: $vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26
.LBB3_58:                               ; %.preheader55.i.i.3.i136.i
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB3_59 Depth 2
                                        ;     Child Loop BB3_69 Depth 2
                                        ;       Child Loop BB3_70 Depth 3
	v_dual_mov_b32 v21, v40 :: v_dual_mov_b32 v22, v41
	v_dual_mov_b32 v46, v43 :: v_dual_mov_b32 v45, v42
	s_mov_b32 s75, 0
.LBB3_59:                               ;   Parent Loop BB3_58 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v41, v36, v46
	v_xor_b32_e32 v40, v35, v45
                                        ; implicit-def: $vgpr61
                                        ; implicit-def: $vgpr43_vgpr44
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v59, v41, v22
	v_lshrrev_b64 v[23:24], 19, v[40:41]
	v_lshlrev_b32_e32 v25, 13, v40
	v_xor_b32_e32 v26, v40, v21
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_or_b32_e32 v60, v25, v24
	v_add_co_u32 v24, vcc_lo, v23, v26
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v25, vcc_lo, v60, v59, vcc_lo
	v_lshrrev_b64 v[24:25], 11, v[24:25]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_u32_e32 v[40:41], v25
	v_cvt_f64_u32_e32 v[24:25], v24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[40:41], v[40:41], 32
	v_add_f64 v[24:25], v[40:41], v[24:25]
                                        ; implicit-def: $vgpr41_vgpr42
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[24:25], v[24:25], 0xffffffcb
	v_mul_f64 v[24:25], v[24:25], s[4:5]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ngt_f64_e32 vcc_lo, 0x41d00000, v[24:25]
	v_trig_preop_f64 v[55:56], v[24:25], 0
	v_trig_preop_f64 v[53:54], v[24:25], 1
	v_ldexp_f64 v[57:58], v[24:25], 0xffffff80
	v_trig_preop_f64 v[51:52], v[24:25], 2
	s_and_saveexec_b32 s0, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s2, exec_lo, s0
	s_cbranch_execz .LBB3_61
; %bb.60:                               ;   in Loop: Header=BB3_59 Depth=2
	v_cmp_le_f64_e64 s0, 0x7b000000, v[24:25]
	s_mov_b32 s6, s4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v42, v25, v58, s0
	v_cndmask_b32_e64 v41, v24, v57, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_f64 v[43:44], v[55:56], v[41:42]
	v_mul_f64 v[47:48], v[53:54], v[41:42]
	v_mul_f64 v[73:74], v[51:52], v[41:42]
	v_fma_f64 v[49:50], v[55:56], v[41:42], -v[43:44]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[75:76], v[53:54], v[41:42], -v[47:48]
	v_add_f64 v[61:62], v[47:48], v[49:50]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[67:68], v[61:62], -v[47:48]
	v_add_f64 v[71:72], v[43:44], v[61:62]
	v_add_f64 v[69:70], v[61:62], -v[67:68]
	v_add_f64 v[49:50], v[49:50], -v[67:68]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[67:68], v[71:72], -2
	v_add_f64 v[43:44], v[71:72], -v[43:44]
	v_add_f64 v[47:48], v[47:48], -v[69:70]
	v_add_f64 v[69:70], v[73:74], v[75:76]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cmp_neq_f64_e64 s0, 0x7ff00000, |v[67:68]|
	v_add_f64 v[43:44], v[61:62], -v[43:44]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[47:48], v[49:50], v[47:48]
	v_fract_f64_e32 v[49:50], v[67:68]
	v_add_f64 v[61:62], v[69:70], v[47:48]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v50, 0, v50, s0
	v_cndmask_b32_e64 v49, 0, v49, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[49:50], v[49:50], 2
	v_add_f64 v[67:68], v[43:44], v[61:62]
	v_add_f64 v[77:78], v[61:62], -v[69:70]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[71:72], v[67:68], v[49:50]
	v_add_f64 v[83:84], v[61:62], -v[77:78]
	v_add_f64 v[47:48], v[47:48], -v[77:78]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cmp_gt_f64_e64 s0, 0, v[71:72]
	v_add_f64 v[71:72], v[69:70], -v[73:74]
	v_cndmask_b32_e64 v40, 0, 0x40100000, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[81:82], v[69:70], -v[71:72]
	v_add_f64 v[71:72], v[75:76], -v[71:72]
	v_add_f64 v[69:70], v[69:70], -v[83:84]
	v_add_f64 v[49:50], v[49:50], v[39:40]
	v_fma_f64 v[40:41], v[51:52], v[41:42], -v[73:74]
	v_add_f64 v[42:43], v[67:68], -v[43:44]
	v_add_f64 v[75:76], v[73:74], -v[81:82]
	v_add_f64 v[47:48], v[47:48], v[69:70]
	v_add_f64 v[79:80], v[67:68], v[49:50]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[42:43], v[61:62], -v[42:43]
	v_add_f64 v[71:72], v[71:72], v[75:76]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_i32_f64_e32 v63, v[79:80]
	v_add_f64 v[47:48], v[71:72], v[47:48]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_i32_e32 v[77:78], v63
	v_add_f64 v[40:41], v[40:41], v[47:48]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[49:50], v[49:50], -v[77:78]
	v_add_f64 v[41:42], v[42:43], v[40:41]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[69:70], v[67:68], v[49:50]
	v_add_f64 v[47:48], v[69:70], -v[49:50]
	v_cmp_le_f64_e64 s0, 0.5, v[69:70]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[43:44], v[67:68], -v[47:48]
	v_cndmask_b32_e64 v40, 0, 0x3ff00000, s0
	v_add_co_ci_u32_e64 v61, s1, 0, v63, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[41:42], v[41:42], v[43:44]
	v_add_f64 v[43:44], v[69:70], -v[39:40]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[47:48], v[43:44], v[41:42]
	v_mul_f64 v[49:50], v[47:48], s[6:7]
	v_add_f64 v[43:44], v[47:48], -v[43:44]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[62:63], v[47:48], s[6:7], -v[49:50]
	v_add_f64 v[40:41], v[41:42], -v[43:44]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[42:43], v[47:48], s[8:9], v[62:63]
	v_fma_f64 v[43:44], v[40:41], s[6:7], v[42:43]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[41:42], v[49:50], v[43:44]
	v_add_f64 v[47:48], v[41:42], -v[49:50]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[43:44], v[43:44], -v[47:48]
.LBB3_61:                               ; %Flow1199
                                        ;   in Loop: Header=BB3_59 Depth=2
	s_and_not1_saveexec_b32 s0, s2
	s_cbranch_execz .LBB3_63
; %bb.62:                               ;   in Loop: Header=BB3_59 Depth=2
	v_mul_f64 v[40:41], v[24:25], s[10:11]
	s_mov_b32 s12, s4
	s_mov_b32 s2, s24
	s_mov_b32 s3, s9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[47:48], v[40:41]
	v_fma_f64 v[40:41], v[47:48], s[12:13], v[24:25]
	v_mul_f64 v[42:43], v[47:48], s[24:25]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[61:62], v[47:48], s[24:25], v[40:41]
	v_add_f64 v[49:50], v[40:41], v[42:43]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[40:41], v[40:41], -v[49:50]
	v_add_f64 v[49:50], v[49:50], -v[61:62]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[40:41], v[40:41], v[42:43]
	v_fma_f64 v[42:43], v[47:48], s[2:3], v[42:43]
	v_add_f64 v[40:41], v[49:50], v[40:41]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[40:41], v[40:41], -v[42:43]
	v_fma_f64 v[43:44], v[47:48], s[26:27], v[40:41]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[41:42], v[61:62], v[43:44]
	v_add_f64 v[49:50], v[41:42], -v[61:62]
	v_cvt_i32_f64_e32 v61, v[47:48]
	s_delay_alu instid0(VALU_DEP_2)
	v_add_f64 v[43:44], v[43:44], -v[49:50]
.LBB3_63:                               ; %_ZL3cosd.exit.i.i.3.i146.i
                                        ;   in Loop: Header=BB3_59 Depth=2
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $vgpr62
                                        ; implicit-def: $vgpr47_vgpr48
                                        ; implicit-def: $vgpr49_vgpr50
	s_and_saveexec_b32 s0, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s1, exec_lo, s0
	s_cbranch_execz .LBB3_65
; %bb.64:                               ;   in Loop: Header=BB3_59 Depth=2
	v_cmp_le_f64_e32 vcc_lo, 0x7b000000, v[24:25]
	s_mov_b32 s6, s4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v48, v25, v58 :: v_dual_cndmask_b32 v47, v24, v57
	v_mul_f64 v[49:50], v[55:56], v[47:48]
	v_mul_f64 v[57:58], v[53:54], v[47:48]
	v_mul_f64 v[73:74], v[51:52], v[47:48]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[55:56], v[55:56], v[47:48], -v[49:50]
	v_fma_f64 v[53:54], v[53:54], v[47:48], -v[57:58]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[47:48], v[51:52], v[47:48], -v[73:74]
	v_add_f64 v[62:63], v[57:58], v[55:56]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[67:68], v[62:63], -v[57:58]
	v_add_f64 v[71:72], v[49:50], v[62:63]
	v_add_f64 v[69:70], v[62:63], -v[67:68]
	v_add_f64 v[55:56], v[55:56], -v[67:68]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[67:68], v[71:72], -2
	v_add_f64 v[49:50], v[71:72], -v[49:50]
	v_add_f64 v[57:58], v[57:58], -v[69:70]
	v_add_f64 v[69:70], v[73:74], v[53:54]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[67:68]|
	v_add_f64 v[49:50], v[62:63], -v[49:50]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[55:56], v[55:56], v[57:58]
	v_fract_f64_e32 v[57:58], v[67:68]
	v_add_f64 v[62:63], v[69:70], v[55:56]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v58, 0, v58 :: v_dual_cndmask_b32 v57, 0, v57
	v_ldexp_f64 v[57:58], v[57:58], 2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[67:68], v[49:50], v[62:63]
	v_add_f64 v[75:76], v[62:63], -v[69:70]
	v_add_f64 v[71:72], v[67:68], v[57:58]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[81:82], v[62:63], -v[75:76]
	v_add_f64 v[55:56], v[55:56], -v[75:76]
	v_add_f64 v[49:50], v[67:68], -v[49:50]
	v_cmp_gt_f64_e32 vcc_lo, 0, v[71:72]
	v_add_f64 v[71:72], v[69:70], -v[73:74]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[49:50], v[62:63], -v[49:50]
	v_cndmask_b32_e64 v40, 0, 0x40100000, vcc_lo
	v_add_f64 v[79:80], v[69:70], -v[71:72]
	v_add_f64 v[53:54], v[53:54], -v[71:72]
	v_add_f64 v[69:70], v[69:70], -v[81:82]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[57:58], v[57:58], v[39:40]
	v_add_f64 v[71:72], v[73:74], -v[79:80]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[55:56], v[55:56], v[69:70]
	v_add_f64 v[77:78], v[67:68], v[57:58]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[53:54], v[53:54], v[71:72]
	v_cvt_i32_f64_e32 v40, v[77:78]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[51:52], v[53:54], v[55:56]
	v_cvt_f64_i32_e32 v[75:76], v40
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[47:48], v[47:48], v[51:52]
	v_add_f64 v[57:58], v[57:58], -v[75:76]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[47:48], v[49:50], v[47:48]
	v_add_f64 v[53:54], v[67:68], v[57:58]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[51:52], v[53:54], -v[57:58]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[53:54]
	v_add_f64 v[49:50], v[67:68], -v[51:52]
	v_add_co_ci_u32_e64 v62, s0, 0, v40, vcc_lo
	v_cndmask_b32_e64 v40, 0, 0x3ff00000, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[47:48], v[47:48], v[49:50]
	v_add_f64 v[49:50], v[53:54], -v[39:40]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[51:52], v[49:50], v[47:48]
	v_mul_f64 v[53:54], v[51:52], s[6:7]
	v_add_f64 v[49:50], v[51:52], -v[49:50]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[55:56], v[51:52], s[6:7], -v[53:54]
	v_add_f64 v[47:48], v[47:48], -v[49:50]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[49:50], v[51:52], s[8:9], v[55:56]
	v_fma_f64 v[49:50], v[47:48], s[6:7], v[49:50]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[47:48], v[53:54], v[49:50]
	v_add_f64 v[51:52], v[47:48], -v[53:54]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[49:50], v[49:50], -v[51:52]
.LBB3_65:                               ; %Flow1198
                                        ;   in Loop: Header=BB3_59 Depth=2
	s_and_not1_saveexec_b32 s0, s1
	s_cbranch_execz .LBB3_67
; %bb.66:                               ;   in Loop: Header=BB3_59 Depth=2
	v_mul_f64 v[47:48], v[24:25], s[10:11]
	s_mov_b32 s12, s4
	s_mov_b32 s2, s24
	s_mov_b32 s3, s9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[51:52], v[47:48]
	v_fma_f64 v[47:48], v[51:52], s[12:13], v[24:25]
	v_mul_f64 v[49:50], v[51:52], s[24:25]
	v_cvt_i32_f64_e32 v62, v[51:52]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[55:56], v[51:52], s[24:25], v[47:48]
	v_add_f64 v[53:54], v[47:48], v[49:50]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[47:48], v[47:48], -v[53:54]
	v_add_f64 v[53:54], v[53:54], -v[55:56]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[47:48], v[47:48], v[49:50]
	v_fma_f64 v[49:50], v[51:52], s[2:3], v[49:50]
	v_add_f64 v[47:48], v[53:54], v[47:48]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[47:48], v[47:48], -v[49:50]
	v_fma_f64 v[49:50], v[51:52], s[26:27], v[47:48]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[47:48], v[55:56], v[49:50]
	v_add_f64 v[53:54], v[47:48], -v[55:56]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[49:50], v[49:50], -v[53:54]
.LBB3_67:                               ; %_ZL3sind.exit.i.i.3.i151.i
                                        ;   in Loop: Header=BB3_59 Depth=2
	s_or_b32 exec_lo, exec_lo, s0
	v_add_co_u32 v45, vcc_lo, v45, v21
	v_add_co_ci_u32_e32 v46, vcc_lo, v46, v22, vcc_lo
	s_mov_b32 s69, s29
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_f64 v[83:84], v[43:44], 0.5
	v_mul_f64 v[91:92], v[49:50], 0.5
	s_delay_alu instid0(VALU_DEP_3)
	v_lshrrev_b64 v[45:46], 11, v[45:46]
	s_mov_b32 s70, s28
	s_mov_b32 s72, s28
	v_cmp_lg_f64_e64 s0, 0x7ff00000, v[24:25]
	s_cmp_eq_u32 s75, 4
	v_xor_b32_e32 v38, v38, v22
	v_cvt_f64_u32_e32 v[51:52], v46
	v_cvt_f64_u32_e32 v[45:46], v45
	v_xor_b32_e32 v37, v37, v21
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[51:52], v[51:52], 32
	v_add_f64 v[45:46], v[51:52], v[45:46]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[45:46], v[45:46], 0xffffffcb
	v_frexp_mant_f64_e32 v[51:52], v[45:46]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f64_e32 vcc_lo, s[28:29], v[51:52]
	v_cndmask_b32_e64 v40, 0, 1, vcc_lo
	v_ldexp_f64 v[51:52], v[51:52], v40
	v_frexp_exp_i32_f64_e32 v40, v[45:46]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[53:54], v[51:52], 1.0
	v_add_f64 v[67:68], v[51:52], -1.0
	v_subrev_co_ci_u32_e32 v40, vcc_lo, 0, v40, vcc_lo
	v_cmp_eq_f64_e32 vcc_lo, 0x7ff00000, v[45:46]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[55:56], v[53:54]
	v_add_f64 v[69:70], v[53:54], -1.0
	v_add_f64 v[51:52], v[51:52], -v[69:70]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[57:58], -v[53:54], v[55:56], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[55:56], v[57:58], v[55:56], v[55:56]
	v_fma_f64 v[57:58], -v[53:54], v[55:56], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[55:56], v[57:58], v[55:56], v[55:56]
	v_mul_f64 v[57:58], v[67:68], v[55:56]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[71:72], v[53:54], v[57:58]
	v_fma_f64 v[53:54], v[57:58], v[53:54], -v[71:72]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[51:52], v[57:58], v[51:52], v[53:54]
	v_add_f64 v[53:54], v[71:72], v[51:52]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[69:70], v[67:68], -v[53:54]
	v_add_f64 v[71:72], v[53:54], -v[71:72]
	v_add_f64 v[67:68], v[67:68], -v[69:70]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[51:52], v[71:72], -v[51:52]
	v_add_f64 v[53:54], v[67:68], -v[53:54]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[51:52], v[51:52], v[53:54]
	v_add_f64 v[51:52], v[69:70], v[51:52]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[51:52], v[55:56], v[51:52]
	v_add_f64 v[53:54], v[57:58], v[51:52]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[55:56], v[53:54], v[53:54]
	v_fma_f64 v[67:68], v[55:56], s[34:35], s[30:31]
	v_mul_f64 v[69:70], v[53:54], v[55:56]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[67:68], v[55:56], v[67:68], s[36:37]
	v_fma_f64 v[67:68], v[55:56], v[67:68], s[38:39]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[67:68], v[55:56], v[67:68], s[40:41]
	v_fma_f64 v[67:68], v[55:56], v[67:68], s[42:43]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[55:56], v[55:56], v[67:68], s[68:69]
	v_ldexp_f64 v[67:68], v[53:54], 1
	v_add_f64 v[53:54], v[53:54], -v[57:58]
	v_mul_f64 v[55:56], v[69:70], v[55:56]
	v_cvt_f64_i32_e32 v[69:70], v40
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[51:52], v[51:52], -v[53:54]
	v_add_f64 v[57:58], v[67:68], v[55:56]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[71:72], v[69:70], s[44:45]
	v_ldexp_f64 v[51:52], v[51:52], 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[53:54], v[57:58], -v[67:68]
	v_fma_f64 v[67:68], v[69:70], s[44:45], -v[71:72]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[53:54], v[55:56], -v[53:54]
	v_fma_f64 v[55:56], v[69:70], s[46:47], v[67:68]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[51:52], v[51:52], v[53:54]
	v_add_f64 v[53:54], v[71:72], v[55:56]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[67:68], v[57:58], v[51:52]
	v_add_f64 v[71:72], v[53:54], -v[71:72]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[69:70], v[53:54], v[67:68]
	v_add_f64 v[57:58], v[67:68], -v[57:58]
	v_add_f64 v[55:56], v[55:56], -v[71:72]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[73:74], v[69:70], -v[53:54]
	v_add_f64 v[51:52], v[51:52], -v[57:58]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[75:76], v[69:70], -v[73:74]
	v_add_f64 v[57:58], v[67:68], -v[73:74]
	v_add_f64 v[67:68], v[55:56], v[51:52]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[53:54], v[53:54], -v[75:76]
	v_add_f64 v[53:54], v[57:58], v[53:54]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[57:58], v[67:68], -v[55:56]
	v_add_f64 v[53:54], v[67:68], v[53:54]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[67:68], v[67:68], -v[57:58]
	v_add_f64 v[51:52], v[51:52], -v[57:58]
	v_add_f64 v[71:72], v[69:70], v[53:54]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[55:56], v[55:56], -v[67:68]
	v_add_f64 v[57:58], v[71:72], -v[69:70]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[51:52], v[51:52], v[55:56]
	v_mul_f64 v[55:56], v[47:48], v[47:48]
	v_add_f64 v[53:54], v[53:54], -v[57:58]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mul_f64 v[77:78], v[55:56], 0.5
	v_fma_f64 v[79:80], v[55:56], s[50:51], s[48:49]
	v_add_f64 v[51:52], v[51:52], v[53:54]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[89:90], -v[77:78], 1.0
	v_fma_f64 v[79:80], v[55:56], v[79:80], s[52:53]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[51:52], v[71:72], v[51:52]
	v_fma_f64 v[71:72], v[55:56], s[60:61], s[58:59]
	v_fma_f64 v[79:80], v[55:56], v[79:80], s[54:55]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_dual_cndmask_b32 v52, v52, v46 :: v_dual_cndmask_b32 v51, v51, v45
	v_cmp_ngt_f64_e32 vcc_lo, 0, v[45:46]
	v_fma_f64 v[71:72], v[55:56], v[71:72], s[62:63]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[79:80], v[55:56], v[79:80], s[56:57]
	v_mul_f64 v[51:52], v[51:52], -2.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[71:72], v[55:56], v[71:72], s[64:65]
	v_cndmask_b32_e32 v40, 0x7ff80000, v52, vcc_lo
	v_cmp_nge_f64_e32 vcc_lo, 0, v[45:46]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_fma_f64 v[71:72], v[55:56], v[71:72], s[66:67]
	v_cndmask_b32_e32 v51, 0, v51, vcc_lo
	v_cmp_neq_f64_e32 vcc_lo, 0, v[45:46]
	v_mul_f64 v[45:46], v[41:42], v[41:42]
	v_cndmask_b32_e32 v52, 0x7ff00000, v40, vcc_lo
	v_fma_f64 v[53:54], v[45:46], s[60:61], s[58:59]
	v_mul_f64 v[67:68], v[45:46], 0.5
	v_fma_f64 v[69:70], v[45:46], s[50:51], s[48:49]
	v_mul_f64 v[85:86], v[41:42], -v[45:46]
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[51:52]
	v_fma_f64 v[53:54], v[45:46], v[53:54], s[62:63]
	v_add_f64 v[75:76], -v[67:68], 1.0
	v_fma_f64 v[69:70], v[45:46], v[69:70], s[52:53]
	v_cndmask_b32_e64 v40, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v40, 8, v40
	v_ldexp_f64 v[51:52], v[51:52], v40
	v_fma_f64 v[53:54], v[45:46], v[53:54], s[64:65]
	v_add_f64 v[87:88], -v[75:76], 1.0
	v_fma_f64 v[69:70], v[45:46], v[69:70], s[54:55]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_rsq_f64_e32 v[57:58], v[51:52]
	v_cmp_class_f64_e64 s1, v[51:52], 0x260
	v_fma_f64 v[53:54], v[45:46], v[53:54], s[66:67]
	s_delay_alu instid0(VALU_DEP_4)
	v_add_f64 v[67:68], v[87:88], -v[67:68]
	v_add_f64 v[87:88], -v[89:90], 1.0
	v_fma_f64 v[69:70], v[45:46], v[69:70], s[56:57]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[73:74], v[51:52], v[57:58]
	v_mul_f64 v[57:58], v[57:58], 0.5
	v_fma_f64 v[53:54], v[85:86], v[53:54], v[83:84]
	v_mul_f64 v[83:84], v[47:48], -v[55:56]
	v_add_f64 v[77:78], v[87:88], -v[77:78]
	v_mul_f64 v[87:88], v[45:46], v[45:46]
	v_fma_f64 v[69:70], v[45:46], v[69:70], s[70:71]
	v_fma_f64 v[67:68], v[41:42], -v[43:44], v[67:68]
	v_fma_f64 v[81:82], -v[57:58], v[73:74], 0.5
	v_fma_f64 v[43:44], v[45:46], v[53:54], -v[43:44]
	v_fma_f64 v[71:72], v[83:84], v[71:72], v[91:92]
	v_mul_f64 v[53:54], v[55:56], v[55:56]
	v_fma_f64 v[77:78], v[47:48], -v[49:50], v[77:78]
	v_fma_f64 v[73:74], v[73:74], v[81:82], v[73:74]
	v_fma_f64 v[57:58], v[57:58], v[81:82], v[57:58]
	v_fma_f64 v[43:44], v[85:86], s[72:73], v[43:44]
	v_fma_f64 v[49:50], v[55:56], v[71:72], -v[49:50]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[81:82], -v[73:74], v[73:74], v[51:52]
	v_add_f64 v[40:41], v[41:42], -v[43:44]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[49:50], v[83:84], s[72:73], v[49:50]
	v_fma_f64 v[45:46], v[81:82], v[57:58], v[73:74]
	v_fma_f64 v[73:74], v[55:56], v[79:80], s[70:71]
	v_fma_f64 v[55:56], v[87:88], v[69:70], v[67:68]
	v_xor_b32_e32 v41, 0x80000000, v41
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[67:68], -v[45:46], v[45:46], v[51:52]
	v_fma_f64 v[53:54], v[53:54], v[73:74], v[77:78]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[55:56], v[75:76], v[55:56]
	v_fma_f64 v[42:43], v[67:68], v[57:58], v[45:46]
	s_delay_alu instid0(VALU_DEP_3)
	v_add_f64 v[44:45], v[89:90], v[53:54]
	v_add_f64 v[46:47], v[47:48], -v[49:50]
	v_and_b32_e32 v49, 1, v62
	v_cndmask_b32_e64 v53, 0, 0xffffff80, vcc_lo
	v_and_b32_e32 v57, 1, v61
	v_lshlrev_b32_e32 v48, 30, v62
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_eq_u32_e32 vcc_lo, 0, v57
	v_xor_b32_e32 v25, v48, v25
	v_dual_cndmask_b32 v40, v40, v55 :: v_dual_cndmask_b32 v41, v41, v56
	v_cmp_eq_u32_e32 vcc_lo, 0, v49
	v_lshlrev_b32_e32 v24, 30, v61
	v_ldexp_f64 v[42:43], v[42:43], v53
	s_delay_alu instid0(VALU_DEP_2)
	v_dual_cndmask_b32 v45, v45, v47 :: v_dual_and_b32 v24, 0x80000000, v24
	v_cndmask_b32_e32 v44, v44, v46, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	v_and_b32_e32 v48, 0x80000000, v25
	s_cmp_eq_u32 s75, 3
	v_xor_b32_e32 v41, v41, v24
	v_cndmask_b32_e64 v24, 0, v40, s0
	v_cndmask_b32_e64 v21, 0, v44, s0
	s_delay_alu instid0(VALU_DEP_3)
	v_cndmask_b32_e64 v25, 0x7ff80000, v41, s0
	v_cndmask_b32_e64 v41, v43, v52, s1
	v_cndmask_b32_e64 v40, v42, v51, s1
	v_lshlrev_b64 v[42:43], 17, v[35:36]
	v_xor_b32_e32 v36, v38, v36
	v_xor_b32_e32 v35, v37, v35
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[24:25], v[40:41], v[24:25]
	v_cndmask_b32_e32 v19, v19, v24, vcc_lo
	v_xor_b32_e32 v45, v45, v48
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v20, v20, v25, vcc_lo
	v_cndmask_b32_e64 v22, 0x7ff80000, v45, s0
	s_cselect_b32 s0, -1, 0
	s_cmp_eq_u32 s75, 2
	v_cndmask_b32_e64 v18, v18, v25, s0
	s_cselect_b32 s1, -1, 0
	v_mul_f64 v[44:45], v[40:41], v[21:22]
	v_xor_b32_e32 v22, v36, v60
	v_xor_b32_e32 v21, v35, v23
	v_xor_b32_e32 v40, v38, v43
	v_xor_b32_e32 v41, v37, v42
	v_lshlrev_b64 v[37:38], 17, v[35:36]
	s_cmp_eq_u32 s75, 1
	v_lshrrev_b64 v[42:43], 19, v[21:22]
	v_xor_b32_e32 v23, v40, v59
	v_xor_b32_e32 v46, v41, v26
	v_xor_b32_e32 v40, v21, v26
	v_lshlrev_b32_e32 v26, 13, v21
	v_xor_b32_e32 v41, v22, v59
	s_cselect_b32 s2, -1, 0
	s_cmp_eq_u32 s75, 0
	v_xor_b32_e32 v35, v46, v35
	s_cselect_b32 s3, -1, 0
	v_xor_b32_e32 v37, v46, v37
	v_mov_b32_e32 v21, v40
	v_xor_b32_e32 v36, v23, v36
	v_xor_b32_e32 v38, v23, v38
	v_mov_b32_e32 v22, v41
	v_cndmask_b32_e64 v17, v17, v24, s0
	v_cndmask_b32_e64 v16, v16, v25, s1
	v_cndmask_b32_e64 v15, v15, v24, s1
	v_cndmask_b32_e64 v14, v14, v25, s2
	v_cndmask_b32_e64 v13, v13, v24, s2
	v_cndmask_b32_e64 v12, v12, v25, s3
	v_cndmask_b32_e64 v11, v11, v24, s3
	s_add_i32 s75, s75, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s75, 5
	v_cndmask_b32_e32 v9, v9, v44, vcc_lo
	v_or_b32_e32 v43, v26, v43
	v_cndmask_b32_e32 v10, v10, v45, vcc_lo
	v_cndmask_b32_e64 v8, v8, v45, s0
	v_cndmask_b32_e64 v6, v6, v45, s1
	v_cndmask_b32_e64 v4, v4, v45, s2
	v_cndmask_b32_e64 v2, v2, v45, s3
	v_mov_b32_e32 v46, v43
	v_cndmask_b32_e64 v7, v7, v44, s0
	v_cndmask_b32_e64 v5, v5, v44, s1
	v_cndmask_b32_e64 v3, v3, v44, s2
	v_cndmask_b32_e64 v1, v1, v44, s3
	v_mov_b32_e32 v45, v42
	s_cbranch_scc1 .LBB3_59
; %bb.68:                               ; %.lr.ph.i.i.3.i158.i.preheader
                                        ;   in Loop: Header=BB3_58 Depth=1
	v_mov_b32_e32 v21, 0
	v_mov_b32_e32 v22, 0
	s_mov_b32 s3, 0
.LBB3_69:                               ; %.lr.ph.i.i.3.i158.i
                                        ;   Parent Loop BB3_58 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB3_70 Depth 3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s3, 1
	s_mov_b32 s6, s3
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s3, 2
	v_dual_cndmask_b32 v23, v12, v14 :: v_dual_cndmask_b32 v24, v11, v13
	v_dual_cndmask_b32 v25, v2, v4 :: v_dual_cndmask_b32 v26, v1, v3
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s3, 3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v23, v23, v16 :: v_dual_cndmask_b32 v24, v24, v15
	v_dual_cndmask_b32 v25, v25, v6 :: v_dual_cndmask_b32 v26, v26, v5
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s3, 4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v23, v23, v18 :: v_dual_cndmask_b32 v44, v24, v17
	v_cndmask_b32_e32 v25, v25, v8, vcc_lo
	v_cndmask_b32_e32 v45, v26, v7, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_cndmask_b32 v24, v23, v20 :: v_dual_cndmask_b32 v23, v44, v19
	v_cndmask_b32_e32 v26, v25, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_cndmask_b32_e32 v25, v45, v9, vcc_lo
.LBB3_70:                               ;   Parent Loop BB3_58 Depth=1
                                        ;     Parent Loop BB3_69 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_add_i32 s6, s6, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s6, 1
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s6, 2
	v_dual_cndmask_b32 v44, v12, v14 :: v_dual_cndmask_b32 v45, v2, v4
	v_cndmask_b32_e32 v46, v1, v3, vcc_lo
	s_cselect_b32 s0, -1, 0
	s_cmp_eq_u32 s6, 3
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e64 v44, v44, v16, s0
	v_cndmask_b32_e64 v45, v45, v6, s0
	v_cndmask_b32_e64 v46, v46, v5, s0
	s_cselect_b32 s1, -1, 0
	s_cmp_eq_u32 s6, 4
	v_cndmask_b32_e64 v44, v44, v18, s1
	v_cndmask_b32_e64 v47, v45, v8, s1
	v_cndmask_b32_e64 v46, v46, v7, s1
	s_cselect_b32 s2, -1, 0
	s_cmp_lt_u32 s6, 4
	v_cndmask_b32_e64 v45, v44, v20, s2
	v_cndmask_b32_e64 v47, v47, v10, s2
	v_cndmask_b32_e64 v46, v46, v9, s2
	v_cndmask_b32_e32 v44, v11, v13, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[46:47], v[25:26], -v[46:47]
	v_cndmask_b32_e64 v44, v44, v15, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v44, v44, v17, s1
	v_cndmask_b32_e64 v44, v44, v19, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[44:45], v[23:24], -v[44:45]
	v_mul_f64 v[46:47], v[46:47], v[46:47]
	v_fma_f64 v[44:45], v[44:45], v[44:45], v[46:47]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_lt_f64_e32 vcc_lo, v[21:22], v[44:45]
	v_dual_cndmask_b32 v22, v22, v45 :: v_dual_cndmask_b32 v21, v21, v44
	s_cbranch_scc1 .LBB3_70
; %bb.71:                               ; %.loopexit.i.i.3.i164.i
                                        ;   in Loop: Header=BB3_69 Depth=2
	s_add_i32 s3, s3, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s3, 4
	s_cbranch_scc1 .LBB3_69
; %bb.72:                               ;   in Loop: Header=BB3_58 Depth=1
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[21:22]
	s_add_i32 s74, s74, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	s_cmp_lg_u32 s74, 0x10000
	v_cndmask_b32_e64 v23, 0, 1, vcc_lo
	v_lshlrev_b32_e32 v23, 8, v23
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[21:22], v[21:22], v23
	v_rsq_f64_e32 v[23:24], v[21:22]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[25:26], v[21:22], v[23:24]
	v_mul_f64 v[23:24], v[23:24], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[44:45], -v[23:24], v[25:26], 0.5
	v_fma_f64 v[25:26], v[25:26], v[44:45], v[25:26]
	v_fma_f64 v[23:24], v[23:24], v[44:45], v[23:24]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[44:45], -v[25:26], v[25:26], v[21:22]
	v_fma_f64 v[25:26], v[44:45], v[23:24], v[25:26]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[44:45], -v[25:26], v[25:26], v[21:22]
	v_fma_f64 v[23:24], v[44:45], v[23:24], v[25:26]
	v_cndmask_b32_e64 v25, 0, 0xffffff80, vcc_lo
	v_cmp_class_f64_e64 vcc_lo, v[21:22], 0x260
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[23:24], v[23:24], v25
	v_dual_cndmask_b32 v22, v24, v22 :: v_dual_cndmask_b32 v21, v23, v21
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[33:34], v[33:34], v[21:22]
	s_cbranch_scc1 .LBB3_58
; %bb.73:                               ; %_ZNK6thrust11hip_rocprim26transform_input_iterator_tIdNS_17counting_iteratorIjNS_11use_defaultES3_S3_EE11estimate_esEixEl.exit.3.i167.i
	v_add_nc_u32_e32 v1, 0x7f156116, v64
	s_mov_b64 s[4:5], 0
                                        ; implicit-def: $vgpr42_vgpr43
                                        ; implicit-def: $vgpr37_vgpr38
                                        ; implicit-def: $vgpr39_vgpr40
                                        ; implicit-def: $vgpr44_vgpr45
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v2, 19, v1
	v_xor3_b32 v1, v1, v2, 0xc761c23c
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v1, v1, 5, v1
	v_add_nc_u32_e32 v2, 0xe9f8cc1d, v1
	v_lshl_add_u32 v1, v1, 9, 0xaccf6200
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v1, v2, v1
	v_lshlrev_b32_e32 v2, 3, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v1, v1, v2, 0xfd7046c5
	v_lshrrev_b32_e32 v2, 16, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_xor3_b32 v1, v1, v2, 0xb55a4f09
.LBB3_74:                               ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v2, 12, v1
	s_cmp_eq_u32 s4, 0
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s4, 1
	v_add3_u32 v1, v1, v2, 0x7ed55d16
	s_cselect_b32 s0, -1, 0
	s_cmp_eq_u32 s4, 2
	s_cselect_b32 s1, -1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v2, 19, v1
	s_cmp_eq_u32 s4, 3
	s_cselect_b32 s2, -1, 0
	s_add_u32 s4, s4, 1
	v_xor3_b32 v1, v1, v2, 0xc761c23c
	s_addc_u32 s5, s5, 0
	s_cmp_lg_u32 s4, 4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v1, v1, 5, v1
	v_add_nc_u32_e32 v2, 0xe9f8cc1d, v1
	v_lshl_add_u32 v1, v1, 9, 0xaccf6200
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v1, v2, v1
	v_lshlrev_b32_e32 v2, 3, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v1, v1, v2, 0xfd7046c5
	v_lshrrev_b32_e32 v2, 16, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor3_b32 v1, v1, v2, 0xb55a4f09
	v_lshlrev_b32_e32 v3, 12, v1
	v_xor_b32_e32 v2, s23, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add3_u32 v1, v1, v3, 0x7ed55d16
	v_cndmask_b32_e32 v43, v43, v2, vcc_lo
	v_cndmask_b32_e64 v38, v38, v2, s0
	v_cndmask_b32_e64 v40, v40, v2, s1
	v_cndmask_b32_e64 v45, v45, v2, s2
	v_lshrrev_b32_e32 v3, 19, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor3_b32 v1, v1, v3, 0xc761c23c
	v_lshl_add_u32 v1, v1, 5, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v3, 0xe9f8cc1d, v1
	v_lshl_add_u32 v1, v1, 9, 0xaccf6200
	v_xor_b32_e32 v1, v3, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v3, 3, v1
	v_add3_u32 v1, v1, v3, 0xfd7046c5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v3, 16, v1
	v_xor3_b32 v1, v1, v3, 0xb55a4f09
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v2, s22, v1
	v_cndmask_b32_e32 v42, v42, v2, vcc_lo
	v_cndmask_b32_e64 v37, v37, v2, s0
	v_cndmask_b32_e64 v39, v39, v2, s1
	v_cndmask_b32_e64 v44, v44, v2, s2
	s_cbranch_scc1 .LBB3_74
; %bb.75:                               ; %.preheader55.i.i.4.i172.i.preheader
	v_mov_b32_e32 v35, 0
	v_dual_mov_b32 v36, 0 :: v_dual_mov_b32 v41, 0
	s_mov_b32 s4, 0x54442d18
	s_mov_b32 s8, 0x33145c07
	s_mov_b32 s10, 0x6dc9c883
	s_mov_b32 s24, 0x33145c00
	s_mov_b32 s26, 0x252049c0
	s_mov_b32 s28, 0x55555555
	s_mov_b32 s30, 0x6b47b09a
	s_mov_b32 s34, 0xbf559e2b
	s_mov_b32 s36, 0xd7f4df2e
	s_mov_b32 s38, 0x16291751
	s_mov_b32 s40, 0x9b27acf1
	s_mov_b32 s42, 0x998ef7b6
	s_mov_b32 s44, 0xfefa39ef
	s_mov_b32 s46, 0x3b39803f
	s_mov_b32 s48, 0x9037ab78
	s_mov_b32 s50, 0x46cc5e42
	s_mov_b32 s52, 0xa17f65f6
	s_mov_b32 s54, 0x19f4ec90
	s_mov_b32 s56, 0x16c16967
	s_mov_b32 s58, 0xb42fdfa7
	s_mov_b32 s60, 0xf9a43bb8
	s_mov_b32 s62, 0x796cde01
	s_mov_b32 s64, 0x19e83e5c
	s_mov_b32 s66, 0x11110bb3
	s_mov_b32 s74, 0
	s_mov_b32 s5, 0x401921fb
	s_mov_b32 s7, 0x3ff921fb
	s_mov_b32 s9, 0x3c91a626
	s_mov_b32 s11, 0x3fe45f30
	s_mov_b32 s13, 0xbff921fb
	s_mov_b32 s25, 0xbc91a626
	s_mov_b32 s27, 0xb97b839a
	s_mov_b32 s29, 0x3fe55555
	s_mov_b32 s31, 0x3fc38538
	s_mov_b32 s35, 0x3fc3ab76
	s_mov_b32 s37, 0x3fc7474d
	s_mov_b32 s39, 0x3fcc71c0
	s_mov_b32 s41, 0x3fd24924
	s_mov_b32 s43, 0x3fd99999
	s_mov_b32 s45, 0x3fe62e42
	s_mov_b32 s47, 0x3c7abc9e
	s_mov_b32 s49, 0x3e21eeb6
	s_mov_b32 s51, 0xbda907db
	s_mov_b32 s53, 0xbe927e4f
	s_mov_b32 s55, 0x3efa01a0
	s_mov_b32 s57, 0xbf56c16c
	s_mov_b32 s59, 0xbe5ae600
	s_mov_b32 s61, 0x3de5e0b2
	s_mov_b32 s63, 0x3ec71de3
	s_mov_b32 s65, 0xbf2a01a0
	s_mov_b32 s67, 0x3f811111
	s_mov_b32 s68, 0x55555780
	s_mov_b32 s71, 0x3fa55555
	s_mov_b32 s73, 0xbfc55555
                                        ; implicit-def: $vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16
                                        ; implicit-def: $vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26
.LBB3_76:                               ; %.preheader55.i.i.4.i172.i
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB3_77 Depth 2
                                        ;     Child Loop BB3_87 Depth 2
                                        ;       Child Loop BB3_88 Depth 3
	v_dual_mov_b32 v21, v42 :: v_dual_mov_b32 v22, v43
	v_dual_mov_b32 v48, v45 :: v_dual_mov_b32 v47, v44
	s_mov_b32 s75, 0
.LBB3_77:                               ;   Parent Loop BB3_76 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v43, v38, v48
	v_xor_b32_e32 v42, v37, v47
                                        ; implicit-def: $vgpr63
                                        ; implicit-def: $vgpr45_vgpr46
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v61, v43, v22
	v_lshrrev_b64 v[23:24], 19, v[42:43]
	v_lshlrev_b32_e32 v25, 13, v42
	v_xor_b32_e32 v26, v42, v21
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_or_b32_e32 v62, v25, v24
	v_add_co_u32 v24, vcc_lo, v23, v26
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v25, vcc_lo, v62, v61, vcc_lo
	v_lshrrev_b64 v[24:25], 11, v[24:25]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_u32_e32 v[42:43], v25
	v_cvt_f64_u32_e32 v[24:25], v24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[42:43], v[42:43], 32
	v_add_f64 v[24:25], v[42:43], v[24:25]
                                        ; implicit-def: $vgpr43_vgpr44
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[24:25], v[24:25], 0xffffffcb
	v_mul_f64 v[24:25], v[24:25], s[4:5]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ngt_f64_e32 vcc_lo, 0x41d00000, v[24:25]
	v_trig_preop_f64 v[57:58], v[24:25], 0
	v_trig_preop_f64 v[55:56], v[24:25], 1
	v_ldexp_f64 v[59:60], v[24:25], 0xffffff80
	v_trig_preop_f64 v[53:54], v[24:25], 2
	s_and_saveexec_b32 s0, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s2, exec_lo, s0
	s_cbranch_execz .LBB3_79
; %bb.78:                               ;   in Loop: Header=BB3_77 Depth=2
	v_cmp_le_f64_e64 s0, 0x7b000000, v[24:25]
	s_mov_b32 s6, s4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v44, v25, v60, s0
	v_cndmask_b32_e64 v43, v24, v59, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_f64 v[45:46], v[57:58], v[43:44]
	v_mul_f64 v[49:50], v[55:56], v[43:44]
	v_mul_f64 v[75:76], v[53:54], v[43:44]
	v_fma_f64 v[51:52], v[57:58], v[43:44], -v[45:46]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[77:78], v[55:56], v[43:44], -v[49:50]
	v_add_f64 v[67:68], v[49:50], v[51:52]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[69:70], v[67:68], -v[49:50]
	v_add_f64 v[73:74], v[45:46], v[67:68]
	v_add_f64 v[71:72], v[67:68], -v[69:70]
	v_add_f64 v[51:52], v[51:52], -v[69:70]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[69:70], v[73:74], -2
	v_add_f64 v[45:46], v[73:74], -v[45:46]
	v_add_f64 v[49:50], v[49:50], -v[71:72]
	v_add_f64 v[71:72], v[75:76], v[77:78]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cmp_neq_f64_e64 s0, 0x7ff00000, |v[69:70]|
	v_add_f64 v[45:46], v[67:68], -v[45:46]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[49:50], v[51:52], v[49:50]
	v_fract_f64_e32 v[51:52], v[69:70]
	v_add_f64 v[67:68], v[71:72], v[49:50]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v52, 0, v52, s0
	v_cndmask_b32_e64 v51, 0, v51, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[51:52], v[51:52], 2
	v_add_f64 v[69:70], v[45:46], v[67:68]
	v_add_f64 v[79:80], v[67:68], -v[71:72]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[73:74], v[69:70], v[51:52]
	v_add_f64 v[85:86], v[67:68], -v[79:80]
	v_add_f64 v[49:50], v[49:50], -v[79:80]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cmp_gt_f64_e64 s0, 0, v[73:74]
	v_add_f64 v[73:74], v[71:72], -v[75:76]
	v_cndmask_b32_e64 v42, 0, 0x40100000, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[83:84], v[71:72], -v[73:74]
	v_add_f64 v[73:74], v[77:78], -v[73:74]
	v_add_f64 v[71:72], v[71:72], -v[85:86]
	v_add_f64 v[51:52], v[51:52], v[41:42]
	v_fma_f64 v[42:43], v[53:54], v[43:44], -v[75:76]
	v_add_f64 v[44:45], v[69:70], -v[45:46]
	v_add_f64 v[77:78], v[75:76], -v[83:84]
	v_add_f64 v[49:50], v[49:50], v[71:72]
	v_add_f64 v[81:82], v[69:70], v[51:52]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[44:45], v[67:68], -v[44:45]
	v_add_f64 v[73:74], v[73:74], v[77:78]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_i32_f64_e32 v63, v[81:82]
	v_add_f64 v[49:50], v[73:74], v[49:50]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_i32_e32 v[79:80], v63
	v_add_f64 v[42:43], v[42:43], v[49:50]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[51:52], v[51:52], -v[79:80]
	v_add_f64 v[43:44], v[44:45], v[42:43]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[71:72], v[69:70], v[51:52]
	v_add_f64 v[49:50], v[71:72], -v[51:52]
	v_cmp_le_f64_e64 s0, 0.5, v[71:72]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[45:46], v[69:70], -v[49:50]
	v_cndmask_b32_e64 v42, 0, 0x3ff00000, s0
	v_add_co_ci_u32_e64 v63, s1, 0, v63, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[43:44], v[43:44], v[45:46]
	v_add_f64 v[45:46], v[71:72], -v[41:42]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[49:50], v[45:46], v[43:44]
	v_mul_f64 v[51:52], v[49:50], s[6:7]
	v_add_f64 v[45:46], v[49:50], -v[45:46]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[67:68], v[49:50], s[6:7], -v[51:52]
	v_add_f64 v[42:43], v[43:44], -v[45:46]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[44:45], v[49:50], s[8:9], v[67:68]
	v_fma_f64 v[45:46], v[42:43], s[6:7], v[44:45]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[43:44], v[51:52], v[45:46]
	v_add_f64 v[49:50], v[43:44], -v[51:52]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[45:46], v[45:46], -v[49:50]
.LBB3_79:                               ; %Flow1197
                                        ;   in Loop: Header=BB3_77 Depth=2
	s_and_not1_saveexec_b32 s0, s2
	s_cbranch_execz .LBB3_81
; %bb.80:                               ;   in Loop: Header=BB3_77 Depth=2
	v_mul_f64 v[42:43], v[24:25], s[10:11]
	s_mov_b32 s12, s4
	s_mov_b32 s2, s24
	s_mov_b32 s3, s9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[49:50], v[42:43]
	v_fma_f64 v[42:43], v[49:50], s[12:13], v[24:25]
	v_mul_f64 v[44:45], v[49:50], s[24:25]
	v_cvt_i32_f64_e32 v63, v[49:50]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[67:68], v[49:50], s[24:25], v[42:43]
	v_add_f64 v[51:52], v[42:43], v[44:45]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[42:43], v[42:43], -v[51:52]
	v_add_f64 v[51:52], v[51:52], -v[67:68]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[42:43], v[42:43], v[44:45]
	v_fma_f64 v[44:45], v[49:50], s[2:3], v[44:45]
	v_add_f64 v[42:43], v[51:52], v[42:43]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[42:43], v[42:43], -v[44:45]
	v_fma_f64 v[45:46], v[49:50], s[26:27], v[42:43]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[43:44], v[67:68], v[45:46]
	v_add_f64 v[51:52], v[43:44], -v[67:68]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[45:46], v[45:46], -v[51:52]
.LBB3_81:                               ; %_ZL3cosd.exit.i.i.4.i182.i
                                        ;   in Loop: Header=BB3_77 Depth=2
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $vgpr65
                                        ; implicit-def: $vgpr49_vgpr50
                                        ; implicit-def: $vgpr51_vgpr52
	s_and_saveexec_b32 s0, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s1, exec_lo, s0
	s_cbranch_execz .LBB3_83
; %bb.82:                               ;   in Loop: Header=BB3_77 Depth=2
	v_cmp_le_f64_e32 vcc_lo, 0x7b000000, v[24:25]
	s_mov_b32 s6, s4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v50, v25, v60 :: v_dual_cndmask_b32 v49, v24, v59
	v_mul_f64 v[51:52], v[57:58], v[49:50]
	v_mul_f64 v[59:60], v[55:56], v[49:50]
	v_mul_f64 v[75:76], v[53:54], v[49:50]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[57:58], v[57:58], v[49:50], -v[51:52]
	v_fma_f64 v[55:56], v[55:56], v[49:50], -v[59:60]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[49:50], v[53:54], v[49:50], -v[75:76]
	v_add_f64 v[67:68], v[59:60], v[57:58]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[69:70], v[67:68], -v[59:60]
	v_add_f64 v[73:74], v[51:52], v[67:68]
	v_add_f64 v[71:72], v[67:68], -v[69:70]
	v_add_f64 v[57:58], v[57:58], -v[69:70]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[69:70], v[73:74], -2
	v_add_f64 v[51:52], v[73:74], -v[51:52]
	v_add_f64 v[59:60], v[59:60], -v[71:72]
	v_add_f64 v[71:72], v[75:76], v[55:56]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[69:70]|
	v_add_f64 v[51:52], v[67:68], -v[51:52]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[57:58], v[57:58], v[59:60]
	v_fract_f64_e32 v[59:60], v[69:70]
	v_add_f64 v[67:68], v[71:72], v[57:58]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v60, 0, v60 :: v_dual_cndmask_b32 v59, 0, v59
	v_ldexp_f64 v[59:60], v[59:60], 2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[69:70], v[51:52], v[67:68]
	v_add_f64 v[77:78], v[67:68], -v[71:72]
	v_add_f64 v[73:74], v[69:70], v[59:60]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[83:84], v[67:68], -v[77:78]
	v_add_f64 v[57:58], v[57:58], -v[77:78]
	v_add_f64 v[51:52], v[69:70], -v[51:52]
	v_cmp_gt_f64_e32 vcc_lo, 0, v[73:74]
	v_add_f64 v[73:74], v[71:72], -v[75:76]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[51:52], v[67:68], -v[51:52]
	v_cndmask_b32_e64 v42, 0, 0x40100000, vcc_lo
	v_add_f64 v[81:82], v[71:72], -v[73:74]
	v_add_f64 v[55:56], v[55:56], -v[73:74]
	v_add_f64 v[71:72], v[71:72], -v[83:84]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[59:60], v[59:60], v[41:42]
	v_add_f64 v[73:74], v[75:76], -v[81:82]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[57:58], v[57:58], v[71:72]
	v_add_f64 v[79:80], v[69:70], v[59:60]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[55:56], v[55:56], v[73:74]
	v_cvt_i32_f64_e32 v42, v[79:80]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[53:54], v[55:56], v[57:58]
	v_cvt_f64_i32_e32 v[77:78], v42
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[49:50], v[49:50], v[53:54]
	v_add_f64 v[59:60], v[59:60], -v[77:78]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[49:50], v[51:52], v[49:50]
	v_add_f64 v[55:56], v[69:70], v[59:60]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[53:54], v[55:56], -v[59:60]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[55:56]
	v_add_f64 v[51:52], v[69:70], -v[53:54]
	v_add_co_ci_u32_e64 v65, s0, 0, v42, vcc_lo
	v_cndmask_b32_e64 v42, 0, 0x3ff00000, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[49:50], v[49:50], v[51:52]
	v_add_f64 v[51:52], v[55:56], -v[41:42]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[53:54], v[51:52], v[49:50]
	v_mul_f64 v[55:56], v[53:54], s[6:7]
	v_add_f64 v[51:52], v[53:54], -v[51:52]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[57:58], v[53:54], s[6:7], -v[55:56]
	v_add_f64 v[49:50], v[49:50], -v[51:52]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[51:52], v[53:54], s[8:9], v[57:58]
	v_fma_f64 v[51:52], v[49:50], s[6:7], v[51:52]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[49:50], v[55:56], v[51:52]
	v_add_f64 v[53:54], v[49:50], -v[55:56]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[51:52], v[51:52], -v[53:54]
.LBB3_83:                               ; %Flow1196
                                        ;   in Loop: Header=BB3_77 Depth=2
	s_and_not1_saveexec_b32 s0, s1
	s_cbranch_execz .LBB3_85
; %bb.84:                               ;   in Loop: Header=BB3_77 Depth=2
	v_mul_f64 v[49:50], v[24:25], s[10:11]
	s_mov_b32 s12, s4
	s_mov_b32 s2, s24
	s_mov_b32 s3, s9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[53:54], v[49:50]
	v_fma_f64 v[49:50], v[53:54], s[12:13], v[24:25]
	v_mul_f64 v[51:52], v[53:54], s[24:25]
	v_cvt_i32_f64_e32 v65, v[53:54]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[57:58], v[53:54], s[24:25], v[49:50]
	v_add_f64 v[55:56], v[49:50], v[51:52]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[49:50], v[49:50], -v[55:56]
	v_add_f64 v[55:56], v[55:56], -v[57:58]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[49:50], v[49:50], v[51:52]
	v_fma_f64 v[51:52], v[53:54], s[2:3], v[51:52]
	v_add_f64 v[49:50], v[55:56], v[49:50]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[49:50], v[49:50], -v[51:52]
	v_fma_f64 v[51:52], v[53:54], s[26:27], v[49:50]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[49:50], v[57:58], v[51:52]
	v_add_f64 v[55:56], v[49:50], -v[57:58]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[51:52], v[51:52], -v[55:56]
.LBB3_85:                               ; %_ZL3sind.exit.i.i.4.i187.i
                                        ;   in Loop: Header=BB3_77 Depth=2
	s_or_b32 exec_lo, exec_lo, s0
	v_add_co_u32 v47, vcc_lo, v47, v21
	v_add_co_ci_u32_e32 v48, vcc_lo, v48, v22, vcc_lo
	s_mov_b32 s69, s29
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_f64 v[83:84], v[45:46], 0.5
	v_mul_f64 v[91:92], v[51:52], 0.5
	s_delay_alu instid0(VALU_DEP_3)
	v_lshrrev_b64 v[47:48], 11, v[47:48]
	s_mov_b32 s70, s28
	s_mov_b32 s72, s28
	v_cmp_lg_f64_e64 s0, 0x7ff00000, v[24:25]
	s_cmp_eq_u32 s75, 4
	v_xor_b32_e32 v40, v40, v22
	v_cvt_f64_u32_e32 v[53:54], v48
	v_cvt_f64_u32_e32 v[47:48], v47
	v_xor_b32_e32 v39, v39, v21
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[53:54], v[53:54], 32
	v_add_f64 v[47:48], v[53:54], v[47:48]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[47:48], v[47:48], 0xffffffcb
	v_frexp_mant_f64_e32 v[53:54], v[47:48]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f64_e32 vcc_lo, s[28:29], v[53:54]
	v_cndmask_b32_e64 v42, 0, 1, vcc_lo
	v_ldexp_f64 v[53:54], v[53:54], v42
	v_frexp_exp_i32_f64_e32 v42, v[47:48]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[55:56], v[53:54], 1.0
	v_add_f64 v[67:68], v[53:54], -1.0
	v_subrev_co_ci_u32_e32 v42, vcc_lo, 0, v42, vcc_lo
	v_cmp_eq_f64_e32 vcc_lo, 0x7ff00000, v[47:48]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[57:58], v[55:56]
	v_add_f64 v[69:70], v[55:56], -1.0
	v_add_f64 v[53:54], v[53:54], -v[69:70]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[59:60], -v[55:56], v[57:58], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[57:58], v[59:60], v[57:58], v[57:58]
	v_fma_f64 v[59:60], -v[55:56], v[57:58], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[57:58], v[59:60], v[57:58], v[57:58]
	v_mul_f64 v[59:60], v[67:68], v[57:58]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[71:72], v[55:56], v[59:60]
	v_fma_f64 v[55:56], v[59:60], v[55:56], -v[71:72]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[53:54], v[59:60], v[53:54], v[55:56]
	v_add_f64 v[55:56], v[71:72], v[53:54]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[69:70], v[67:68], -v[55:56]
	v_add_f64 v[71:72], v[55:56], -v[71:72]
	v_add_f64 v[67:68], v[67:68], -v[69:70]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[53:54], v[71:72], -v[53:54]
	v_add_f64 v[55:56], v[67:68], -v[55:56]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[53:54], v[53:54], v[55:56]
	v_add_f64 v[53:54], v[69:70], v[53:54]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[53:54], v[57:58], v[53:54]
	v_add_f64 v[55:56], v[59:60], v[53:54]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[57:58], v[55:56], v[55:56]
	v_fma_f64 v[67:68], v[57:58], s[34:35], s[30:31]
	v_mul_f64 v[69:70], v[55:56], v[57:58]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[67:68], v[57:58], v[67:68], s[36:37]
	v_fma_f64 v[67:68], v[57:58], v[67:68], s[38:39]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[67:68], v[57:58], v[67:68], s[40:41]
	v_fma_f64 v[67:68], v[57:58], v[67:68], s[42:43]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[57:58], v[57:58], v[67:68], s[68:69]
	v_ldexp_f64 v[67:68], v[55:56], 1
	v_add_f64 v[55:56], v[55:56], -v[59:60]
	v_mul_f64 v[57:58], v[69:70], v[57:58]
	v_cvt_f64_i32_e32 v[69:70], v42
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[53:54], v[53:54], -v[55:56]
	v_add_f64 v[59:60], v[67:68], v[57:58]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[71:72], v[69:70], s[44:45]
	v_ldexp_f64 v[53:54], v[53:54], 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[55:56], v[59:60], -v[67:68]
	v_fma_f64 v[67:68], v[69:70], s[44:45], -v[71:72]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[55:56], v[57:58], -v[55:56]
	v_fma_f64 v[57:58], v[69:70], s[46:47], v[67:68]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[53:54], v[53:54], v[55:56]
	v_add_f64 v[55:56], v[71:72], v[57:58]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[67:68], v[59:60], v[53:54]
	v_add_f64 v[71:72], v[55:56], -v[71:72]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[69:70], v[55:56], v[67:68]
	v_add_f64 v[59:60], v[67:68], -v[59:60]
	v_add_f64 v[57:58], v[57:58], -v[71:72]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[73:74], v[69:70], -v[55:56]
	v_add_f64 v[53:54], v[53:54], -v[59:60]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[75:76], v[69:70], -v[73:74]
	v_add_f64 v[59:60], v[67:68], -v[73:74]
	v_add_f64 v[67:68], v[57:58], v[53:54]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[55:56], v[55:56], -v[75:76]
	v_add_f64 v[55:56], v[59:60], v[55:56]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[59:60], v[67:68], -v[57:58]
	v_add_f64 v[55:56], v[67:68], v[55:56]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[67:68], v[67:68], -v[59:60]
	v_add_f64 v[53:54], v[53:54], -v[59:60]
	v_add_f64 v[71:72], v[69:70], v[55:56]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[57:58], v[57:58], -v[67:68]
	v_add_f64 v[59:60], v[71:72], -v[69:70]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[53:54], v[53:54], v[57:58]
	v_mul_f64 v[57:58], v[49:50], v[49:50]
	v_add_f64 v[55:56], v[55:56], -v[59:60]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mul_f64 v[77:78], v[57:58], 0.5
	v_fma_f64 v[79:80], v[57:58], s[50:51], s[48:49]
	v_add_f64 v[53:54], v[53:54], v[55:56]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[89:90], -v[77:78], 1.0
	v_fma_f64 v[79:80], v[57:58], v[79:80], s[52:53]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[53:54], v[71:72], v[53:54]
	v_fma_f64 v[71:72], v[57:58], s[60:61], s[58:59]
	v_fma_f64 v[79:80], v[57:58], v[79:80], s[54:55]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_dual_cndmask_b32 v54, v54, v48 :: v_dual_cndmask_b32 v53, v53, v47
	v_cmp_ngt_f64_e32 vcc_lo, 0, v[47:48]
	v_fma_f64 v[71:72], v[57:58], v[71:72], s[62:63]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[79:80], v[57:58], v[79:80], s[56:57]
	v_mul_f64 v[53:54], v[53:54], -2.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[71:72], v[57:58], v[71:72], s[64:65]
	v_cndmask_b32_e32 v42, 0x7ff80000, v54, vcc_lo
	v_cmp_nge_f64_e32 vcc_lo, 0, v[47:48]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_fma_f64 v[71:72], v[57:58], v[71:72], s[66:67]
	v_cndmask_b32_e32 v53, 0, v53, vcc_lo
	v_cmp_neq_f64_e32 vcc_lo, 0, v[47:48]
	v_mul_f64 v[47:48], v[43:44], v[43:44]
	v_cndmask_b32_e32 v54, 0x7ff00000, v42, vcc_lo
	v_fma_f64 v[55:56], v[47:48], s[60:61], s[58:59]
	v_mul_f64 v[67:68], v[47:48], 0.5
	v_fma_f64 v[69:70], v[47:48], s[50:51], s[48:49]
	v_mul_f64 v[85:86], v[43:44], -v[47:48]
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[53:54]
	v_fma_f64 v[55:56], v[47:48], v[55:56], s[62:63]
	v_add_f64 v[75:76], -v[67:68], 1.0
	v_fma_f64 v[69:70], v[47:48], v[69:70], s[52:53]
	v_cndmask_b32_e64 v42, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v42, 8, v42
	v_ldexp_f64 v[53:54], v[53:54], v42
	v_fma_f64 v[55:56], v[47:48], v[55:56], s[64:65]
	v_add_f64 v[87:88], -v[75:76], 1.0
	v_fma_f64 v[69:70], v[47:48], v[69:70], s[54:55]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_rsq_f64_e32 v[59:60], v[53:54]
	v_cmp_class_f64_e64 s1, v[53:54], 0x260
	v_fma_f64 v[55:56], v[47:48], v[55:56], s[66:67]
	s_delay_alu instid0(VALU_DEP_4)
	v_add_f64 v[67:68], v[87:88], -v[67:68]
	v_add_f64 v[87:88], -v[89:90], 1.0
	v_fma_f64 v[69:70], v[47:48], v[69:70], s[56:57]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[73:74], v[53:54], v[59:60]
	v_mul_f64 v[59:60], v[59:60], 0.5
	v_fma_f64 v[55:56], v[85:86], v[55:56], v[83:84]
	v_mul_f64 v[83:84], v[49:50], -v[57:58]
	v_add_f64 v[77:78], v[87:88], -v[77:78]
	v_mul_f64 v[87:88], v[47:48], v[47:48]
	v_fma_f64 v[69:70], v[47:48], v[69:70], s[70:71]
	v_fma_f64 v[67:68], v[43:44], -v[45:46], v[67:68]
	v_fma_f64 v[81:82], -v[59:60], v[73:74], 0.5
	v_fma_f64 v[45:46], v[47:48], v[55:56], -v[45:46]
	v_fma_f64 v[71:72], v[83:84], v[71:72], v[91:92]
	v_mul_f64 v[55:56], v[57:58], v[57:58]
	v_fma_f64 v[77:78], v[49:50], -v[51:52], v[77:78]
	v_fma_f64 v[73:74], v[73:74], v[81:82], v[73:74]
	v_fma_f64 v[59:60], v[59:60], v[81:82], v[59:60]
	v_fma_f64 v[45:46], v[85:86], s[72:73], v[45:46]
	v_fma_f64 v[51:52], v[57:58], v[71:72], -v[51:52]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[81:82], -v[73:74], v[73:74], v[53:54]
	v_add_f64 v[42:43], v[43:44], -v[45:46]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[51:52], v[83:84], s[72:73], v[51:52]
	v_fma_f64 v[47:48], v[81:82], v[59:60], v[73:74]
	v_fma_f64 v[73:74], v[57:58], v[79:80], s[70:71]
	v_fma_f64 v[57:58], v[87:88], v[69:70], v[67:68]
	v_xor_b32_e32 v43, 0x80000000, v43
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[67:68], -v[47:48], v[47:48], v[53:54]
	v_fma_f64 v[55:56], v[55:56], v[73:74], v[77:78]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[57:58], v[75:76], v[57:58]
	v_fma_f64 v[44:45], v[67:68], v[59:60], v[47:48]
	s_delay_alu instid0(VALU_DEP_3)
	v_add_f64 v[46:47], v[89:90], v[55:56]
	v_add_f64 v[48:49], v[49:50], -v[51:52]
	v_and_b32_e32 v51, 1, v65
	v_cndmask_b32_e64 v55, 0, 0xffffff80, vcc_lo
	v_and_b32_e32 v59, 1, v63
	v_lshlrev_b32_e32 v50, 30, v65
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_eq_u32_e32 vcc_lo, 0, v59
	v_xor_b32_e32 v25, v50, v25
	v_dual_cndmask_b32 v42, v42, v57 :: v_dual_cndmask_b32 v43, v43, v58
	v_cmp_eq_u32_e32 vcc_lo, 0, v51
	v_lshlrev_b32_e32 v24, 30, v63
	v_ldexp_f64 v[44:45], v[44:45], v55
	v_dual_cndmask_b32 v47, v47, v49 :: v_dual_cndmask_b32 v46, v46, v48
	s_cselect_b32 vcc_lo, -1, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_and_b32_e32 v24, 0x80000000, v24
	v_and_b32_e32 v50, 0x80000000, v25
	s_cmp_eq_u32 s75, 3
	v_cndmask_b32_e64 v21, 0, v46, s0
	v_xor_b32_e32 v43, v43, v24
	v_cndmask_b32_e64 v24, 0, v42, s0
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e64 v25, 0x7ff80000, v43, s0
	v_cndmask_b32_e64 v43, v45, v54, s1
	v_cndmask_b32_e64 v42, v44, v53, s1
	v_lshlrev_b64 v[44:45], 17, v[37:38]
	v_xor_b32_e32 v38, v40, v38
	v_xor_b32_e32 v37, v39, v37
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[24:25], v[42:43], v[24:25]
	v_cndmask_b32_e32 v19, v19, v24, vcc_lo
	v_xor_b32_e32 v47, v47, v50
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v20, v20, v25, vcc_lo
	v_cndmask_b32_e64 v22, 0x7ff80000, v47, s0
	s_cselect_b32 s0, -1, 0
	s_cmp_eq_u32 s75, 2
	v_cndmask_b32_e64 v18, v18, v25, s0
	s_cselect_b32 s1, -1, 0
	v_mul_f64 v[46:47], v[42:43], v[21:22]
	v_xor_b32_e32 v22, v38, v62
	v_xor_b32_e32 v21, v37, v23
	v_xor_b32_e32 v42, v40, v45
	v_xor_b32_e32 v43, v39, v44
	v_lshlrev_b64 v[39:40], 17, v[37:38]
	s_cmp_eq_u32 s75, 1
	v_lshrrev_b64 v[44:45], 19, v[21:22]
	v_xor_b32_e32 v23, v42, v61
	v_xor_b32_e32 v48, v43, v26
	v_xor_b32_e32 v42, v21, v26
	v_lshlrev_b32_e32 v26, 13, v21
	v_xor_b32_e32 v43, v22, v61
	s_cselect_b32 s2, -1, 0
	s_cmp_eq_u32 s75, 0
	v_xor_b32_e32 v37, v48, v37
	v_or_b32_e32 v45, v26, v45
	s_cselect_b32 s3, -1, 0
	v_xor_b32_e32 v39, v48, v39
	v_mov_b32_e32 v21, v42
	v_xor_b32_e32 v38, v23, v38
	v_xor_b32_e32 v40, v23, v40
	v_mov_b32_e32 v22, v43
	v_cndmask_b32_e64 v17, v17, v24, s0
	v_cndmask_b32_e64 v16, v16, v25, s1
	v_cndmask_b32_e64 v15, v15, v24, s1
	v_cndmask_b32_e64 v14, v14, v25, s2
	v_cndmask_b32_e64 v13, v13, v24, s2
	v_cndmask_b32_e64 v12, v12, v25, s3
	v_cndmask_b32_e64 v11, v11, v24, s3
	s_add_i32 s75, s75, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s75, 5
	v_cndmask_b32_e32 v10, v10, v47, vcc_lo
	v_cndmask_b32_e64 v8, v8, v47, s0
	v_cndmask_b32_e64 v6, v6, v47, s1
	v_cndmask_b32_e64 v4, v4, v47, s2
	v_cndmask_b32_e64 v2, v2, v47, s3
	v_mov_b32_e32 v48, v45
	v_cndmask_b32_e32 v9, v9, v46, vcc_lo
	v_cndmask_b32_e64 v7, v7, v46, s0
	v_cndmask_b32_e64 v5, v5, v46, s1
	v_cndmask_b32_e64 v3, v3, v46, s2
	v_cndmask_b32_e64 v1, v1, v46, s3
	v_mov_b32_e32 v47, v44
	s_cbranch_scc1 .LBB3_77
; %bb.86:                               ; %.lr.ph.i.i.4.i194.i.preheader
                                        ;   in Loop: Header=BB3_76 Depth=1
	v_mov_b32_e32 v21, 0
	v_mov_b32_e32 v22, 0
	s_mov_b32 s3, 0
.LBB3_87:                               ; %.lr.ph.i.i.4.i194.i
                                        ;   Parent Loop BB3_76 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB3_88 Depth 3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s3, 1
	s_mov_b32 s6, s3
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s3, 2
	v_dual_cndmask_b32 v23, v12, v14 :: v_dual_cndmask_b32 v24, v11, v13
	v_dual_cndmask_b32 v25, v2, v4 :: v_dual_cndmask_b32 v26, v1, v3
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s3, 3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v23, v23, v16 :: v_dual_cndmask_b32 v24, v24, v15
	v_dual_cndmask_b32 v25, v25, v6 :: v_dual_cndmask_b32 v26, v26, v5
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s3, 4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v23, v23, v18 :: v_dual_cndmask_b32 v46, v24, v17
	v_cndmask_b32_e32 v25, v25, v8, vcc_lo
	v_cndmask_b32_e32 v47, v26, v7, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v24, v23, v20 :: v_dual_cndmask_b32 v23, v46, v19
	v_dual_cndmask_b32 v26, v25, v10 :: v_dual_cndmask_b32 v25, v47, v9
.LBB3_88:                               ;   Parent Loop BB3_76 Depth=1
                                        ;     Parent Loop BB3_87 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_add_i32 s6, s6, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s6, 1
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s6, 2
	v_dual_cndmask_b32 v46, v12, v14 :: v_dual_cndmask_b32 v47, v2, v4
	v_cndmask_b32_e32 v48, v1, v3, vcc_lo
	s_cselect_b32 s0, -1, 0
	s_cmp_eq_u32 s6, 3
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e64 v46, v46, v16, s0
	v_cndmask_b32_e64 v47, v47, v6, s0
	v_cndmask_b32_e64 v48, v48, v5, s0
	s_cselect_b32 s1, -1, 0
	s_cmp_eq_u32 s6, 4
	v_cndmask_b32_e64 v46, v46, v18, s1
	v_cndmask_b32_e64 v49, v47, v8, s1
	v_cndmask_b32_e64 v48, v48, v7, s1
	s_cselect_b32 s2, -1, 0
	s_cmp_lt_u32 s6, 4
	v_cndmask_b32_e64 v47, v46, v20, s2
	v_cndmask_b32_e64 v49, v49, v10, s2
	v_cndmask_b32_e64 v48, v48, v9, s2
	v_cndmask_b32_e32 v46, v11, v13, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[48:49], v[25:26], -v[48:49]
	v_cndmask_b32_e64 v46, v46, v15, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v46, v46, v17, s1
	v_cndmask_b32_e64 v46, v46, v19, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[46:47], v[23:24], -v[46:47]
	v_mul_f64 v[48:49], v[48:49], v[48:49]
	v_fma_f64 v[46:47], v[46:47], v[46:47], v[48:49]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_lt_f64_e32 vcc_lo, v[21:22], v[46:47]
	v_dual_cndmask_b32 v22, v22, v47 :: v_dual_cndmask_b32 v21, v21, v46
	s_cbranch_scc1 .LBB3_88
; %bb.89:                               ; %.loopexit.i.i.4.i200.i
                                        ;   in Loop: Header=BB3_87 Depth=2
	s_add_i32 s3, s3, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s3, 4
	s_cbranch_scc1 .LBB3_87
; %bb.90:                               ;   in Loop: Header=BB3_76 Depth=1
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[21:22]
	s_add_i32 s74, s74, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	s_cmp_lg_u32 s74, 0x10000
	v_cndmask_b32_e64 v23, 0, 1, vcc_lo
	v_lshlrev_b32_e32 v23, 8, v23
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[21:22], v[21:22], v23
	v_rsq_f64_e32 v[23:24], v[21:22]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[25:26], v[21:22], v[23:24]
	v_mul_f64 v[23:24], v[23:24], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[46:47], -v[23:24], v[25:26], 0.5
	v_fma_f64 v[25:26], v[25:26], v[46:47], v[25:26]
	v_fma_f64 v[23:24], v[23:24], v[46:47], v[23:24]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[46:47], -v[25:26], v[25:26], v[21:22]
	v_fma_f64 v[25:26], v[46:47], v[23:24], v[25:26]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[46:47], -v[25:26], v[25:26], v[21:22]
	v_fma_f64 v[23:24], v[46:47], v[23:24], v[25:26]
	v_cndmask_b32_e64 v25, 0, 0xffffff80, vcc_lo
	v_cmp_class_f64_e64 vcc_lo, v[21:22], 0x260
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[23:24], v[23:24], v25
	v_dual_cndmask_b32 v22, v24, v22 :: v_dual_cndmask_b32 v21, v23, v21
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[35:36], v[35:36], v[21:22]
	s_cbranch_scc1 .LBB3_76
; %bb.91:                               ; %_ZNK6thrust11hip_rocprim26transform_input_iterator_tIdNS_17counting_iteratorIjNS_11use_defaultES3_S3_EE11estimate_esEixEl.exit.4.i203.i
	v_add_nc_u32_e32 v1, 0x7f256216, v64
	s_mov_b64 s[4:5], 0
                                        ; implicit-def: $vgpr44_vgpr45
                                        ; implicit-def: $vgpr39_vgpr40
                                        ; implicit-def: $vgpr41_vgpr42
                                        ; implicit-def: $vgpr46_vgpr47
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v2, 19, v1
	v_xor3_b32 v1, v1, v2, 0xc761c23c
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v1, v1, 5, v1
	v_add_nc_u32_e32 v2, 0xe9f8cc1d, v1
	v_lshl_add_u32 v1, v1, 9, 0xaccf6200
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v1, v2, v1
	v_lshlrev_b32_e32 v2, 3, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v1, v1, v2, 0xfd7046c5
	v_lshrrev_b32_e32 v2, 16, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_xor3_b32 v1, v1, v2, 0xb55a4f09
.LBB3_92:                               ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v2, 12, v1
	s_cmp_eq_u32 s4, 0
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s4, 1
	v_add3_u32 v1, v1, v2, 0x7ed55d16
	s_cselect_b32 s0, -1, 0
	s_cmp_eq_u32 s4, 2
	s_cselect_b32 s1, -1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v2, 19, v1
	s_cmp_eq_u32 s4, 3
	s_cselect_b32 s2, -1, 0
	s_add_u32 s4, s4, 1
	v_xor3_b32 v1, v1, v2, 0xc761c23c
	s_addc_u32 s5, s5, 0
	s_cmp_lg_u32 s4, 4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v1, v1, 5, v1
	v_add_nc_u32_e32 v2, 0xe9f8cc1d, v1
	v_lshl_add_u32 v1, v1, 9, 0xaccf6200
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v1, v2, v1
	v_lshlrev_b32_e32 v2, 3, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v1, v1, v2, 0xfd7046c5
	v_lshrrev_b32_e32 v2, 16, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor3_b32 v1, v1, v2, 0xb55a4f09
	v_lshlrev_b32_e32 v3, 12, v1
	v_xor_b32_e32 v2, s23, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add3_u32 v1, v1, v3, 0x7ed55d16
	v_cndmask_b32_e32 v45, v45, v2, vcc_lo
	v_cndmask_b32_e64 v40, v40, v2, s0
	v_cndmask_b32_e64 v42, v42, v2, s1
	v_cndmask_b32_e64 v47, v47, v2, s2
	v_lshrrev_b32_e32 v3, 19, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor3_b32 v1, v1, v3, 0xc761c23c
	v_lshl_add_u32 v1, v1, 5, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v3, 0xe9f8cc1d, v1
	v_lshl_add_u32 v1, v1, 9, 0xaccf6200
	v_xor_b32_e32 v1, v3, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v3, 3, v1
	v_add3_u32 v1, v1, v3, 0xfd7046c5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v3, 16, v1
	v_xor3_b32 v1, v1, v3, 0xb55a4f09
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v2, s22, v1
	v_cndmask_b32_e32 v44, v44, v2, vcc_lo
	v_cndmask_b32_e64 v39, v39, v2, s0
	v_cndmask_b32_e64 v41, v41, v2, s1
	v_cndmask_b32_e64 v46, v46, v2, s2
	s_cbranch_scc1 .LBB3_92
; %bb.93:                               ; %.preheader55.i.i.5.i208.i.preheader
	v_mov_b32_e32 v37, 0
	v_dual_mov_b32 v38, 0 :: v_dual_mov_b32 v43, 0
	s_mov_b32 s4, 0x54442d18
	s_mov_b32 s8, 0x33145c07
	s_mov_b32 s10, 0x6dc9c883
	s_mov_b32 s24, 0x33145c00
	s_mov_b32 s26, 0x252049c0
	s_mov_b32 s28, 0x55555555
	s_mov_b32 s30, 0x6b47b09a
	s_mov_b32 s34, 0xbf559e2b
	s_mov_b32 s36, 0xd7f4df2e
	s_mov_b32 s38, 0x16291751
	s_mov_b32 s40, 0x9b27acf1
	s_mov_b32 s42, 0x998ef7b6
	s_mov_b32 s44, 0xfefa39ef
	s_mov_b32 s46, 0x3b39803f
	s_mov_b32 s48, 0x9037ab78
	s_mov_b32 s50, 0x46cc5e42
	s_mov_b32 s52, 0xa17f65f6
	s_mov_b32 s54, 0x19f4ec90
	s_mov_b32 s56, 0x16c16967
	s_mov_b32 s58, 0xb42fdfa7
	s_mov_b32 s60, 0xf9a43bb8
	s_mov_b32 s62, 0x796cde01
	s_mov_b32 s64, 0x19e83e5c
	s_mov_b32 s66, 0x11110bb3
	s_mov_b32 s74, 0
	s_mov_b32 s5, 0x401921fb
	s_mov_b32 s7, 0x3ff921fb
	s_mov_b32 s9, 0x3c91a626
	s_mov_b32 s11, 0x3fe45f30
	s_mov_b32 s13, 0xbff921fb
	s_mov_b32 s25, 0xbc91a626
	s_mov_b32 s27, 0xb97b839a
	s_mov_b32 s29, 0x3fe55555
	s_mov_b32 s31, 0x3fc38538
	s_mov_b32 s35, 0x3fc3ab76
	s_mov_b32 s37, 0x3fc7474d
	s_mov_b32 s39, 0x3fcc71c0
	s_mov_b32 s41, 0x3fd24924
	s_mov_b32 s43, 0x3fd99999
	s_mov_b32 s45, 0x3fe62e42
	s_mov_b32 s47, 0x3c7abc9e
	s_mov_b32 s49, 0x3e21eeb6
	s_mov_b32 s51, 0xbda907db
	s_mov_b32 s53, 0xbe927e4f
	s_mov_b32 s55, 0x3efa01a0
	s_mov_b32 s57, 0xbf56c16c
	s_mov_b32 s59, 0xbe5ae600
	s_mov_b32 s61, 0x3de5e0b2
	s_mov_b32 s63, 0x3ec71de3
	s_mov_b32 s65, 0xbf2a01a0
	s_mov_b32 s67, 0x3f811111
	s_mov_b32 s68, 0x55555780
	s_mov_b32 s71, 0x3fa55555
	s_mov_b32 s73, 0xbfc55555
                                        ; implicit-def: $vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16
                                        ; implicit-def: $vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26
.LBB3_94:                               ; %.preheader55.i.i.5.i208.i
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB3_95 Depth 2
                                        ;     Child Loop BB3_105 Depth 2
                                        ;       Child Loop BB3_106 Depth 3
	v_dual_mov_b32 v21, v44 :: v_dual_mov_b32 v22, v45
	v_dual_mov_b32 v50, v47 :: v_dual_mov_b32 v49, v46
	s_mov_b32 s75, 0
.LBB3_95:                               ;   Parent Loop BB3_94 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v45, v40, v50
	v_xor_b32_e32 v44, v39, v49
                                        ; implicit-def: $vgpr67
                                        ; implicit-def: $vgpr47_vgpr48
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v63, v45, v22
	v_lshrrev_b64 v[23:24], 19, v[44:45]
	v_lshlrev_b32_e32 v25, 13, v44
	v_xor_b32_e32 v26, v44, v21
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_or_b32_e32 v65, v25, v24
	v_add_co_u32 v24, vcc_lo, v23, v26
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v25, vcc_lo, v65, v63, vcc_lo
	v_lshrrev_b64 v[24:25], 11, v[24:25]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_u32_e32 v[44:45], v25
	v_cvt_f64_u32_e32 v[24:25], v24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[44:45], v[44:45], 32
	v_add_f64 v[24:25], v[44:45], v[24:25]
                                        ; implicit-def: $vgpr45_vgpr46
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[24:25], v[24:25], 0xffffffcb
	v_mul_f64 v[24:25], v[24:25], s[4:5]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ngt_f64_e32 vcc_lo, 0x41d00000, v[24:25]
	v_trig_preop_f64 v[59:60], v[24:25], 0
	v_trig_preop_f64 v[57:58], v[24:25], 1
	v_ldexp_f64 v[61:62], v[24:25], 0xffffff80
	v_trig_preop_f64 v[55:56], v[24:25], 2
	s_and_saveexec_b32 s0, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s2, exec_lo, s0
	s_cbranch_execz .LBB3_97
; %bb.96:                               ;   in Loop: Header=BB3_95 Depth=2
	v_cmp_le_f64_e64 s0, 0x7b000000, v[24:25]
	s_mov_b32 s6, s4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v46, v25, v62, s0
	v_cndmask_b32_e64 v45, v24, v61, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_f64 v[47:48], v[59:60], v[45:46]
	v_mul_f64 v[51:52], v[57:58], v[45:46]
	v_mul_f64 v[75:76], v[55:56], v[45:46]
	v_fma_f64 v[53:54], v[59:60], v[45:46], -v[47:48]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[77:78], v[57:58], v[45:46], -v[51:52]
	v_add_f64 v[67:68], v[51:52], v[53:54]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[69:70], v[67:68], -v[51:52]
	v_add_f64 v[73:74], v[47:48], v[67:68]
	v_add_f64 v[71:72], v[67:68], -v[69:70]
	v_add_f64 v[53:54], v[53:54], -v[69:70]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[69:70], v[73:74], -2
	v_add_f64 v[47:48], v[73:74], -v[47:48]
	v_add_f64 v[51:52], v[51:52], -v[71:72]
	v_add_f64 v[71:72], v[75:76], v[77:78]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cmp_neq_f64_e64 s0, 0x7ff00000, |v[69:70]|
	v_add_f64 v[47:48], v[67:68], -v[47:48]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[51:52], v[53:54], v[51:52]
	v_fract_f64_e32 v[53:54], v[69:70]
	v_add_f64 v[67:68], v[71:72], v[51:52]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v54, 0, v54, s0
	v_cndmask_b32_e64 v53, 0, v53, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[53:54], v[53:54], 2
	v_add_f64 v[69:70], v[47:48], v[67:68]
	v_add_f64 v[79:80], v[67:68], -v[71:72]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[73:74], v[69:70], v[53:54]
	v_add_f64 v[85:86], v[67:68], -v[79:80]
	v_add_f64 v[51:52], v[51:52], -v[79:80]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cmp_gt_f64_e64 s0, 0, v[73:74]
	v_add_f64 v[73:74], v[71:72], -v[75:76]
	v_cndmask_b32_e64 v44, 0, 0x40100000, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[83:84], v[71:72], -v[73:74]
	v_add_f64 v[73:74], v[77:78], -v[73:74]
	v_add_f64 v[71:72], v[71:72], -v[85:86]
	v_add_f64 v[53:54], v[53:54], v[43:44]
	v_fma_f64 v[44:45], v[55:56], v[45:46], -v[75:76]
	v_add_f64 v[46:47], v[69:70], -v[47:48]
	v_add_f64 v[77:78], v[75:76], -v[83:84]
	v_add_f64 v[51:52], v[51:52], v[71:72]
	v_add_f64 v[81:82], v[69:70], v[53:54]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[46:47], v[67:68], -v[46:47]
	v_add_f64 v[73:74], v[73:74], v[77:78]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_i32_f64_e32 v81, v[81:82]
	v_add_f64 v[51:52], v[73:74], v[51:52]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_i32_e32 v[79:80], v81
	v_add_f64 v[44:45], v[44:45], v[51:52]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[53:54], v[53:54], -v[79:80]
	v_add_f64 v[45:46], v[46:47], v[44:45]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[71:72], v[69:70], v[53:54]
	v_add_f64 v[51:52], v[71:72], -v[53:54]
	v_cmp_le_f64_e64 s0, 0.5, v[71:72]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[47:48], v[69:70], -v[51:52]
	v_cndmask_b32_e64 v44, 0, 0x3ff00000, s0
	v_add_co_ci_u32_e64 v67, s1, 0, v81, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[45:46], v[45:46], v[47:48]
	v_add_f64 v[47:48], v[71:72], -v[43:44]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[51:52], v[47:48], v[45:46]
	v_mul_f64 v[53:54], v[51:52], s[6:7]
	v_add_f64 v[47:48], v[51:52], -v[47:48]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[68:69], v[51:52], s[6:7], -v[53:54]
	v_add_f64 v[44:45], v[45:46], -v[47:48]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[46:47], v[51:52], s[8:9], v[68:69]
	v_fma_f64 v[47:48], v[44:45], s[6:7], v[46:47]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[45:46], v[53:54], v[47:48]
	v_add_f64 v[51:52], v[45:46], -v[53:54]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[47:48], v[47:48], -v[51:52]
.LBB3_97:                               ; %Flow1195
                                        ;   in Loop: Header=BB3_95 Depth=2
	s_and_not1_saveexec_b32 s0, s2
	s_cbranch_execz .LBB3_99
; %bb.98:                               ;   in Loop: Header=BB3_95 Depth=2
	v_mul_f64 v[44:45], v[24:25], s[10:11]
	s_mov_b32 s12, s4
	s_mov_b32 s2, s24
	s_mov_b32 s3, s9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[51:52], v[44:45]
	v_fma_f64 v[44:45], v[51:52], s[12:13], v[24:25]
	v_mul_f64 v[46:47], v[51:52], s[24:25]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[67:68], v[51:52], s[24:25], v[44:45]
	v_add_f64 v[53:54], v[44:45], v[46:47]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[44:45], v[44:45], -v[53:54]
	v_add_f64 v[53:54], v[53:54], -v[67:68]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[44:45], v[44:45], v[46:47]
	v_fma_f64 v[46:47], v[51:52], s[2:3], v[46:47]
	v_add_f64 v[44:45], v[53:54], v[44:45]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[44:45], v[44:45], -v[46:47]
	v_fma_f64 v[47:48], v[51:52], s[26:27], v[44:45]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[45:46], v[67:68], v[47:48]
	v_add_f64 v[53:54], v[45:46], -v[67:68]
	v_cvt_i32_f64_e32 v67, v[51:52]
	s_delay_alu instid0(VALU_DEP_2)
	v_add_f64 v[47:48], v[47:48], -v[53:54]
.LBB3_99:                               ; %_ZL3cosd.exit.i.i.5.i218.i
                                        ;   in Loop: Header=BB3_95 Depth=2
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $vgpr68
                                        ; implicit-def: $vgpr51_vgpr52
                                        ; implicit-def: $vgpr53_vgpr54
	s_and_saveexec_b32 s0, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s1, exec_lo, s0
	s_cbranch_execz .LBB3_101
; %bb.100:                              ;   in Loop: Header=BB3_95 Depth=2
	v_cmp_le_f64_e32 vcc_lo, 0x7b000000, v[24:25]
	s_mov_b32 s6, s4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v52, v25, v62 :: v_dual_cndmask_b32 v51, v24, v61
	v_mul_f64 v[53:54], v[59:60], v[51:52]
	v_mul_f64 v[61:62], v[57:58], v[51:52]
	v_mul_f64 v[76:77], v[55:56], v[51:52]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[59:60], v[59:60], v[51:52], -v[53:54]
	v_fma_f64 v[57:58], v[57:58], v[51:52], -v[61:62]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[51:52], v[55:56], v[51:52], -v[76:77]
	v_add_f64 v[68:69], v[61:62], v[59:60]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[70:71], v[68:69], -v[61:62]
	v_add_f64 v[74:75], v[53:54], v[68:69]
	v_add_f64 v[72:73], v[68:69], -v[70:71]
	v_add_f64 v[59:60], v[59:60], -v[70:71]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[70:71], v[74:75], -2
	v_add_f64 v[53:54], v[74:75], -v[53:54]
	v_add_f64 v[61:62], v[61:62], -v[72:73]
	v_add_f64 v[72:73], v[76:77], v[57:58]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[70:71]|
	v_add_f64 v[53:54], v[68:69], -v[53:54]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[59:60], v[59:60], v[61:62]
	v_fract_f64_e32 v[61:62], v[70:71]
	v_add_f64 v[68:69], v[72:73], v[59:60]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v62, 0, v62 :: v_dual_cndmask_b32 v61, 0, v61
	v_ldexp_f64 v[61:62], v[61:62], 2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[70:71], v[53:54], v[68:69]
	v_add_f64 v[78:79], v[68:69], -v[72:73]
	v_add_f64 v[74:75], v[70:71], v[61:62]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[84:85], v[68:69], -v[78:79]
	v_add_f64 v[59:60], v[59:60], -v[78:79]
	v_add_f64 v[53:54], v[70:71], -v[53:54]
	v_cmp_gt_f64_e32 vcc_lo, 0, v[74:75]
	v_add_f64 v[74:75], v[72:73], -v[76:77]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[53:54], v[68:69], -v[53:54]
	v_cndmask_b32_e64 v44, 0, 0x40100000, vcc_lo
	v_add_f64 v[82:83], v[72:73], -v[74:75]
	v_add_f64 v[57:58], v[57:58], -v[74:75]
	v_add_f64 v[72:73], v[72:73], -v[84:85]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[61:62], v[61:62], v[43:44]
	v_add_f64 v[74:75], v[76:77], -v[82:83]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[59:60], v[59:60], v[72:73]
	v_add_f64 v[80:81], v[70:71], v[61:62]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[57:58], v[57:58], v[74:75]
	v_cvt_i32_f64_e32 v44, v[80:81]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[55:56], v[57:58], v[59:60]
	v_cvt_f64_i32_e32 v[78:79], v44
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[51:52], v[51:52], v[55:56]
	v_add_f64 v[61:62], v[61:62], -v[78:79]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[51:52], v[53:54], v[51:52]
	v_add_f64 v[57:58], v[70:71], v[61:62]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[55:56], v[57:58], -v[61:62]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[57:58]
	v_add_f64 v[53:54], v[70:71], -v[55:56]
	v_add_co_ci_u32_e64 v68, s0, 0, v44, vcc_lo
	v_cndmask_b32_e64 v44, 0, 0x3ff00000, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[51:52], v[51:52], v[53:54]
	v_add_f64 v[53:54], v[57:58], -v[43:44]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[55:56], v[53:54], v[51:52]
	v_mul_f64 v[57:58], v[55:56], s[6:7]
	v_add_f64 v[53:54], v[55:56], -v[53:54]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[59:60], v[55:56], s[6:7], -v[57:58]
	v_add_f64 v[51:52], v[51:52], -v[53:54]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[53:54], v[55:56], s[8:9], v[59:60]
	v_fma_f64 v[53:54], v[51:52], s[6:7], v[53:54]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[51:52], v[57:58], v[53:54]
	v_add_f64 v[55:56], v[51:52], -v[57:58]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[53:54], v[53:54], -v[55:56]
.LBB3_101:                              ; %Flow1194
                                        ;   in Loop: Header=BB3_95 Depth=2
	s_and_not1_saveexec_b32 s0, s1
	s_cbranch_execz .LBB3_103
; %bb.102:                              ;   in Loop: Header=BB3_95 Depth=2
	v_mul_f64 v[51:52], v[24:25], s[10:11]
	s_mov_b32 s12, s4
	s_mov_b32 s2, s24
	s_mov_b32 s3, s9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[55:56], v[51:52]
	v_fma_f64 v[51:52], v[55:56], s[12:13], v[24:25]
	v_mul_f64 v[53:54], v[55:56], s[24:25]
	v_cvt_i32_f64_e32 v68, v[55:56]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[59:60], v[55:56], s[24:25], v[51:52]
	v_add_f64 v[57:58], v[51:52], v[53:54]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[51:52], v[51:52], -v[57:58]
	v_add_f64 v[57:58], v[57:58], -v[59:60]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[51:52], v[51:52], v[53:54]
	v_fma_f64 v[53:54], v[55:56], s[2:3], v[53:54]
	v_add_f64 v[51:52], v[57:58], v[51:52]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[51:52], v[51:52], -v[53:54]
	v_fma_f64 v[53:54], v[55:56], s[26:27], v[51:52]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[51:52], v[59:60], v[53:54]
	v_add_f64 v[57:58], v[51:52], -v[59:60]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[53:54], v[53:54], -v[57:58]
.LBB3_103:                              ; %_ZL3sind.exit.i.i.5.i223.i
                                        ;   in Loop: Header=BB3_95 Depth=2
	s_or_b32 exec_lo, exec_lo, s0
	v_add_co_u32 v49, vcc_lo, v49, v21
	v_add_co_ci_u32_e32 v50, vcc_lo, v50, v22, vcc_lo
	s_mov_b32 s69, s29
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_f64 v[85:86], v[47:48], 0.5
	v_mul_f64 v[93:94], v[53:54], 0.5
	s_delay_alu instid0(VALU_DEP_3)
	v_lshrrev_b64 v[49:50], 11, v[49:50]
	s_mov_b32 s70, s28
	s_mov_b32 s72, s28
	v_cmp_lg_f64_e64 s0, 0x7ff00000, v[24:25]
	s_cmp_eq_u32 s75, 4
	v_xor_b32_e32 v42, v42, v22
	v_cvt_f64_u32_e32 v[55:56], v50
	v_cvt_f64_u32_e32 v[49:50], v49
	v_xor_b32_e32 v41, v41, v21
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[55:56], v[55:56], 32
	v_add_f64 v[49:50], v[55:56], v[49:50]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[49:50], v[49:50], 0xffffffcb
	v_frexp_mant_f64_e32 v[55:56], v[49:50]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f64_e32 vcc_lo, s[28:29], v[55:56]
	v_cndmask_b32_e64 v44, 0, 1, vcc_lo
	v_ldexp_f64 v[55:56], v[55:56], v44
	v_frexp_exp_i32_f64_e32 v44, v[49:50]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[57:58], v[55:56], 1.0
	v_add_f64 v[69:70], v[55:56], -1.0
	v_subrev_co_ci_u32_e32 v44, vcc_lo, 0, v44, vcc_lo
	v_cmp_eq_f64_e32 vcc_lo, 0x7ff00000, v[49:50]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[59:60], v[57:58]
	v_add_f64 v[71:72], v[57:58], -1.0
	v_add_f64 v[55:56], v[55:56], -v[71:72]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[61:62], -v[57:58], v[59:60], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[59:60], v[61:62], v[59:60], v[59:60]
	v_fma_f64 v[61:62], -v[57:58], v[59:60], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[59:60], v[61:62], v[59:60], v[59:60]
	v_mul_f64 v[61:62], v[69:70], v[59:60]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[73:74], v[57:58], v[61:62]
	v_fma_f64 v[57:58], v[61:62], v[57:58], -v[73:74]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[55:56], v[61:62], v[55:56], v[57:58]
	v_add_f64 v[57:58], v[73:74], v[55:56]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[71:72], v[69:70], -v[57:58]
	v_add_f64 v[73:74], v[57:58], -v[73:74]
	v_add_f64 v[69:70], v[69:70], -v[71:72]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[55:56], v[73:74], -v[55:56]
	v_add_f64 v[57:58], v[69:70], -v[57:58]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[55:56], v[55:56], v[57:58]
	v_add_f64 v[55:56], v[71:72], v[55:56]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[55:56], v[59:60], v[55:56]
	v_add_f64 v[57:58], v[61:62], v[55:56]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[59:60], v[57:58], v[57:58]
	v_fma_f64 v[69:70], v[59:60], s[34:35], s[30:31]
	v_mul_f64 v[71:72], v[57:58], v[59:60]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[69:70], v[59:60], v[69:70], s[36:37]
	v_fma_f64 v[69:70], v[59:60], v[69:70], s[38:39]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[69:70], v[59:60], v[69:70], s[40:41]
	v_fma_f64 v[69:70], v[59:60], v[69:70], s[42:43]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[59:60], v[59:60], v[69:70], s[68:69]
	v_ldexp_f64 v[69:70], v[57:58], 1
	v_add_f64 v[57:58], v[57:58], -v[61:62]
	v_mul_f64 v[59:60], v[71:72], v[59:60]
	v_cvt_f64_i32_e32 v[71:72], v44
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[55:56], v[55:56], -v[57:58]
	v_add_f64 v[61:62], v[69:70], v[59:60]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[73:74], v[71:72], s[44:45]
	v_ldexp_f64 v[55:56], v[55:56], 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[57:58], v[61:62], -v[69:70]
	v_fma_f64 v[69:70], v[71:72], s[44:45], -v[73:74]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[57:58], v[59:60], -v[57:58]
	v_fma_f64 v[59:60], v[71:72], s[46:47], v[69:70]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[55:56], v[55:56], v[57:58]
	v_add_f64 v[57:58], v[73:74], v[59:60]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[69:70], v[61:62], v[55:56]
	v_add_f64 v[73:74], v[57:58], -v[73:74]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[71:72], v[57:58], v[69:70]
	v_add_f64 v[61:62], v[69:70], -v[61:62]
	v_add_f64 v[59:60], v[59:60], -v[73:74]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[75:76], v[71:72], -v[57:58]
	v_add_f64 v[55:56], v[55:56], -v[61:62]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[77:78], v[71:72], -v[75:76]
	v_add_f64 v[61:62], v[69:70], -v[75:76]
	v_add_f64 v[69:70], v[59:60], v[55:56]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[57:58], v[57:58], -v[77:78]
	v_add_f64 v[57:58], v[61:62], v[57:58]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[61:62], v[69:70], -v[59:60]
	v_add_f64 v[57:58], v[69:70], v[57:58]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[69:70], v[69:70], -v[61:62]
	v_add_f64 v[55:56], v[55:56], -v[61:62]
	v_add_f64 v[73:74], v[71:72], v[57:58]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[59:60], v[59:60], -v[69:70]
	v_add_f64 v[61:62], v[73:74], -v[71:72]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[55:56], v[55:56], v[59:60]
	v_mul_f64 v[59:60], v[51:52], v[51:52]
	v_add_f64 v[57:58], v[57:58], -v[61:62]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mul_f64 v[79:80], v[59:60], 0.5
	v_fma_f64 v[81:82], v[59:60], s[50:51], s[48:49]
	v_add_f64 v[55:56], v[55:56], v[57:58]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[91:92], -v[79:80], 1.0
	v_fma_f64 v[81:82], v[59:60], v[81:82], s[52:53]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[55:56], v[73:74], v[55:56]
	v_fma_f64 v[73:74], v[59:60], s[60:61], s[58:59]
	v_fma_f64 v[81:82], v[59:60], v[81:82], s[54:55]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_dual_cndmask_b32 v56, v56, v50 :: v_dual_cndmask_b32 v55, v55, v49
	v_cmp_ngt_f64_e32 vcc_lo, 0, v[49:50]
	v_fma_f64 v[73:74], v[59:60], v[73:74], s[62:63]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[81:82], v[59:60], v[81:82], s[56:57]
	v_mul_f64 v[55:56], v[55:56], -2.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[73:74], v[59:60], v[73:74], s[64:65]
	v_cndmask_b32_e32 v44, 0x7ff80000, v56, vcc_lo
	v_cmp_nge_f64_e32 vcc_lo, 0, v[49:50]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_fma_f64 v[73:74], v[59:60], v[73:74], s[66:67]
	v_cndmask_b32_e32 v55, 0, v55, vcc_lo
	v_cmp_neq_f64_e32 vcc_lo, 0, v[49:50]
	v_mul_f64 v[49:50], v[45:46], v[45:46]
	v_cndmask_b32_e32 v56, 0x7ff00000, v44, vcc_lo
	v_fma_f64 v[57:58], v[49:50], s[60:61], s[58:59]
	v_mul_f64 v[69:70], v[49:50], 0.5
	v_fma_f64 v[71:72], v[49:50], s[50:51], s[48:49]
	v_mul_f64 v[87:88], v[45:46], -v[49:50]
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[55:56]
	v_fma_f64 v[57:58], v[49:50], v[57:58], s[62:63]
	v_add_f64 v[77:78], -v[69:70], 1.0
	v_fma_f64 v[71:72], v[49:50], v[71:72], s[52:53]
	v_cndmask_b32_e64 v44, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v44, 8, v44
	v_ldexp_f64 v[55:56], v[55:56], v44
	v_fma_f64 v[57:58], v[49:50], v[57:58], s[64:65]
	v_add_f64 v[89:90], -v[77:78], 1.0
	v_fma_f64 v[71:72], v[49:50], v[71:72], s[54:55]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_rsq_f64_e32 v[61:62], v[55:56]
	v_cmp_class_f64_e64 s1, v[55:56], 0x260
	v_fma_f64 v[57:58], v[49:50], v[57:58], s[66:67]
	s_delay_alu instid0(VALU_DEP_4)
	v_add_f64 v[69:70], v[89:90], -v[69:70]
	v_add_f64 v[89:90], -v[91:92], 1.0
	v_fma_f64 v[71:72], v[49:50], v[71:72], s[56:57]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[75:76], v[55:56], v[61:62]
	v_mul_f64 v[61:62], v[61:62], 0.5
	v_fma_f64 v[57:58], v[87:88], v[57:58], v[85:86]
	v_mul_f64 v[85:86], v[51:52], -v[59:60]
	v_add_f64 v[79:80], v[89:90], -v[79:80]
	v_mul_f64 v[89:90], v[49:50], v[49:50]
	v_fma_f64 v[71:72], v[49:50], v[71:72], s[70:71]
	v_fma_f64 v[69:70], v[45:46], -v[47:48], v[69:70]
	v_fma_f64 v[83:84], -v[61:62], v[75:76], 0.5
	v_fma_f64 v[47:48], v[49:50], v[57:58], -v[47:48]
	v_fma_f64 v[73:74], v[85:86], v[73:74], v[93:94]
	v_mul_f64 v[57:58], v[59:60], v[59:60]
	v_fma_f64 v[79:80], v[51:52], -v[53:54], v[79:80]
	v_fma_f64 v[75:76], v[75:76], v[83:84], v[75:76]
	v_fma_f64 v[61:62], v[61:62], v[83:84], v[61:62]
	v_fma_f64 v[47:48], v[87:88], s[72:73], v[47:48]
	v_fma_f64 v[53:54], v[59:60], v[73:74], -v[53:54]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[83:84], -v[75:76], v[75:76], v[55:56]
	v_add_f64 v[44:45], v[45:46], -v[47:48]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[53:54], v[85:86], s[72:73], v[53:54]
	v_fma_f64 v[49:50], v[83:84], v[61:62], v[75:76]
	v_fma_f64 v[75:76], v[59:60], v[81:82], s[70:71]
	v_fma_f64 v[59:60], v[89:90], v[71:72], v[69:70]
	v_xor_b32_e32 v45, 0x80000000, v45
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[69:70], -v[49:50], v[49:50], v[55:56]
	v_fma_f64 v[57:58], v[57:58], v[75:76], v[79:80]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[59:60], v[77:78], v[59:60]
	v_fma_f64 v[46:47], v[69:70], v[61:62], v[49:50]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_add_f64 v[48:49], v[91:92], v[57:58]
	v_cndmask_b32_e64 v57, 0, 0xffffff80, vcc_lo
	v_add_f64 v[50:51], v[51:52], -v[53:54]
	v_and_b32_e32 v61, 1, v67
	v_and_b32_e32 v53, 1, v68
	v_cmp_eq_u32_e32 vcc_lo, 0, v61
	v_dual_cndmask_b32 v45, v45, v60 :: v_dual_lshlrev_b32 v24, 30, v67
	v_cndmask_b32_e32 v44, v44, v59, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_and_b32_e32 v24, 0x80000000, v24
	v_cmp_eq_u32_e32 vcc_lo, 0, v53
	v_lshlrev_b32_e32 v52, 30, v68
	v_xor_b32_e32 v45, v45, v24
	v_cndmask_b32_e64 v24, 0, v44, s0
	v_ldexp_f64 v[46:47], v[46:47], v57
	v_cndmask_b32_e32 v49, v49, v51, vcc_lo
	v_xor_b32_e32 v25, v52, v25
	v_cndmask_b32_e32 v48, v48, v50, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s75, 3
	s_delay_alu instid0(VALU_DEP_2)
	v_and_b32_e32 v52, 0x80000000, v25
	v_cndmask_b32_e64 v25, 0x7ff80000, v45, s0
	v_cndmask_b32_e64 v21, 0, v48, s0
	v_cndmask_b32_e64 v45, v47, v56, s1
	v_cndmask_b32_e64 v44, v46, v55, s1
	v_lshlrev_b64 v[46:47], 17, v[39:40]
	v_xor_b32_e32 v40, v42, v40
	v_xor_b32_e32 v39, v41, v39
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[24:25], v[44:45], v[24:25]
	v_cndmask_b32_e32 v19, v19, v24, vcc_lo
	v_xor_b32_e32 v49, v49, v52
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v20, v20, v25, vcc_lo
	v_cndmask_b32_e64 v22, 0x7ff80000, v49, s0
	s_cselect_b32 s0, -1, 0
	s_cmp_eq_u32 s75, 2
	v_cndmask_b32_e64 v18, v18, v25, s0
	s_cselect_b32 s1, -1, 0
	v_mul_f64 v[48:49], v[44:45], v[21:22]
	v_xor_b32_e32 v22, v40, v65
	v_xor_b32_e32 v21, v39, v23
	v_xor_b32_e32 v44, v42, v47
	v_xor_b32_e32 v45, v41, v46
	v_lshlrev_b64 v[41:42], 17, v[39:40]
	s_cmp_eq_u32 s75, 1
	v_lshrrev_b64 v[46:47], 19, v[21:22]
	v_xor_b32_e32 v23, v44, v63
	v_xor_b32_e32 v50, v45, v26
	v_xor_b32_e32 v44, v21, v26
	v_lshlrev_b32_e32 v26, 13, v21
	v_xor_b32_e32 v45, v22, v63
	s_cselect_b32 s2, -1, 0
	s_cmp_eq_u32 s75, 0
	v_xor_b32_e32 v39, v50, v39
	s_cselect_b32 s3, -1, 0
	v_xor_b32_e32 v41, v50, v41
	v_mov_b32_e32 v21, v44
	v_xor_b32_e32 v40, v23, v40
	v_xor_b32_e32 v42, v23, v42
	v_mov_b32_e32 v22, v45
	v_cndmask_b32_e64 v17, v17, v24, s0
	v_cndmask_b32_e64 v16, v16, v25, s1
	v_cndmask_b32_e64 v15, v15, v24, s1
	v_cndmask_b32_e64 v14, v14, v25, s2
	v_cndmask_b32_e64 v13, v13, v24, s2
	v_cndmask_b32_e64 v12, v12, v25, s3
	v_cndmask_b32_e64 v11, v11, v24, s3
	s_add_i32 s75, s75, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s75, 5
	v_cndmask_b32_e32 v9, v9, v48, vcc_lo
	v_or_b32_e32 v47, v26, v47
	v_cndmask_b32_e32 v10, v10, v49, vcc_lo
	v_cndmask_b32_e64 v8, v8, v49, s0
	v_cndmask_b32_e64 v6, v6, v49, s1
	v_cndmask_b32_e64 v4, v4, v49, s2
	v_cndmask_b32_e64 v2, v2, v49, s3
	v_mov_b32_e32 v50, v47
	v_cndmask_b32_e64 v7, v7, v48, s0
	v_cndmask_b32_e64 v5, v5, v48, s1
	v_cndmask_b32_e64 v3, v3, v48, s2
	v_cndmask_b32_e64 v1, v1, v48, s3
	v_mov_b32_e32 v49, v46
	s_cbranch_scc1 .LBB3_95
; %bb.104:                              ; %.lr.ph.i.i.5.i230.i.preheader
                                        ;   in Loop: Header=BB3_94 Depth=1
	v_mov_b32_e32 v21, 0
	v_mov_b32_e32 v22, 0
	s_mov_b32 s3, 0
.LBB3_105:                              ; %.lr.ph.i.i.5.i230.i
                                        ;   Parent Loop BB3_94 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB3_106 Depth 3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s3, 1
	s_mov_b32 s6, s3
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s3, 2
	v_dual_cndmask_b32 v23, v12, v14 :: v_dual_cndmask_b32 v24, v11, v13
	v_dual_cndmask_b32 v25, v2, v4 :: v_dual_cndmask_b32 v26, v1, v3
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s3, 3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v23, v23, v16 :: v_dual_cndmask_b32 v24, v24, v15
	v_dual_cndmask_b32 v25, v25, v6 :: v_dual_cndmask_b32 v26, v26, v5
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s3, 4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v23, v23, v18 :: v_dual_cndmask_b32 v48, v24, v17
	v_cndmask_b32_e32 v25, v25, v8, vcc_lo
	v_cndmask_b32_e32 v49, v26, v7, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_cndmask_b32 v24, v23, v20 :: v_dual_cndmask_b32 v23, v48, v19
	v_cndmask_b32_e32 v26, v25, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_cndmask_b32_e32 v25, v49, v9, vcc_lo
.LBB3_106:                              ;   Parent Loop BB3_94 Depth=1
                                        ;     Parent Loop BB3_105 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_add_i32 s6, s6, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s6, 1
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s6, 2
	v_dual_cndmask_b32 v48, v12, v14 :: v_dual_cndmask_b32 v49, v2, v4
	v_cndmask_b32_e32 v50, v1, v3, vcc_lo
	s_cselect_b32 s0, -1, 0
	s_cmp_eq_u32 s6, 3
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e64 v48, v48, v16, s0
	v_cndmask_b32_e64 v49, v49, v6, s0
	v_cndmask_b32_e64 v50, v50, v5, s0
	s_cselect_b32 s1, -1, 0
	s_cmp_eq_u32 s6, 4
	v_cndmask_b32_e64 v48, v48, v18, s1
	v_cndmask_b32_e64 v51, v49, v8, s1
	v_cndmask_b32_e64 v50, v50, v7, s1
	s_cselect_b32 s2, -1, 0
	s_cmp_lt_u32 s6, 4
	v_cndmask_b32_e64 v49, v48, v20, s2
	v_cndmask_b32_e64 v51, v51, v10, s2
	v_cndmask_b32_e64 v50, v50, v9, s2
	v_cndmask_b32_e32 v48, v11, v13, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[50:51], v[25:26], -v[50:51]
	v_cndmask_b32_e64 v48, v48, v15, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v48, v48, v17, s1
	v_cndmask_b32_e64 v48, v48, v19, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[48:49], v[23:24], -v[48:49]
	v_mul_f64 v[50:51], v[50:51], v[50:51]
	v_fma_f64 v[48:49], v[48:49], v[48:49], v[50:51]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_lt_f64_e32 vcc_lo, v[21:22], v[48:49]
	v_dual_cndmask_b32 v22, v22, v49 :: v_dual_cndmask_b32 v21, v21, v48
	s_cbranch_scc1 .LBB3_106
; %bb.107:                              ; %.loopexit.i.i.5.i236.i
                                        ;   in Loop: Header=BB3_105 Depth=2
	s_add_i32 s3, s3, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s3, 4
	s_cbranch_scc1 .LBB3_105
; %bb.108:                              ;   in Loop: Header=BB3_94 Depth=1
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[21:22]
	s_add_i32 s74, s74, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	s_cmp_lg_u32 s74, 0x10000
	v_cndmask_b32_e64 v23, 0, 1, vcc_lo
	v_lshlrev_b32_e32 v23, 8, v23
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[21:22], v[21:22], v23
	v_rsq_f64_e32 v[23:24], v[21:22]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[25:26], v[21:22], v[23:24]
	v_mul_f64 v[23:24], v[23:24], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[48:49], -v[23:24], v[25:26], 0.5
	v_fma_f64 v[25:26], v[25:26], v[48:49], v[25:26]
	v_fma_f64 v[23:24], v[23:24], v[48:49], v[23:24]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[48:49], -v[25:26], v[25:26], v[21:22]
	v_fma_f64 v[25:26], v[48:49], v[23:24], v[25:26]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[48:49], -v[25:26], v[25:26], v[21:22]
	v_fma_f64 v[23:24], v[48:49], v[23:24], v[25:26]
	v_cndmask_b32_e64 v25, 0, 0xffffff80, vcc_lo
	v_cmp_class_f64_e64 vcc_lo, v[21:22], 0x260
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[23:24], v[23:24], v25
	v_dual_cndmask_b32 v22, v24, v22 :: v_dual_cndmask_b32 v21, v23, v21
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[37:38], v[37:38], v[21:22]
	s_cbranch_scc1 .LBB3_94
; %bb.109:                              ; %_ZNK6thrust11hip_rocprim26transform_input_iterator_tIdNS_17counting_iteratorIjNS_11use_defaultES3_S3_EE11estimate_esEixEl.exit.5.i239.i
	v_add_nc_u32_e32 v1, 0x7f356316, v64
	s_mov_b64 s[4:5], 0
                                        ; implicit-def: $vgpr46_vgpr47
                                        ; implicit-def: $vgpr41_vgpr42
                                        ; implicit-def: $vgpr43_vgpr44
                                        ; implicit-def: $vgpr48_vgpr49
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v2, 19, v1
	v_xor3_b32 v1, v1, v2, 0xc761c23c
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v1, v1, 5, v1
	v_add_nc_u32_e32 v2, 0xe9f8cc1d, v1
	v_lshl_add_u32 v1, v1, 9, 0xaccf6200
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v1, v2, v1
	v_lshlrev_b32_e32 v2, 3, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v1, v1, v2, 0xfd7046c5
	v_lshrrev_b32_e32 v2, 16, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_xor3_b32 v1, v1, v2, 0xb55a4f09
.LBB3_110:                              ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v2, 12, v1
	s_cmp_eq_u32 s4, 0
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s4, 1
	v_add3_u32 v1, v1, v2, 0x7ed55d16
	s_cselect_b32 s0, -1, 0
	s_cmp_eq_u32 s4, 2
	s_cselect_b32 s1, -1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v2, 19, v1
	s_cmp_eq_u32 s4, 3
	s_cselect_b32 s2, -1, 0
	s_add_u32 s4, s4, 1
	v_xor3_b32 v1, v1, v2, 0xc761c23c
	s_addc_u32 s5, s5, 0
	s_cmp_lg_u32 s4, 4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v1, v1, 5, v1
	v_add_nc_u32_e32 v2, 0xe9f8cc1d, v1
	v_lshl_add_u32 v1, v1, 9, 0xaccf6200
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v1, v2, v1
	v_lshlrev_b32_e32 v2, 3, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v1, v1, v2, 0xfd7046c5
	v_lshrrev_b32_e32 v2, 16, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor3_b32 v1, v1, v2, 0xb55a4f09
	v_lshlrev_b32_e32 v3, 12, v1
	v_xor_b32_e32 v2, s23, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add3_u32 v1, v1, v3, 0x7ed55d16
	v_cndmask_b32_e32 v47, v47, v2, vcc_lo
	v_cndmask_b32_e64 v42, v42, v2, s0
	v_cndmask_b32_e64 v44, v44, v2, s1
	v_cndmask_b32_e64 v49, v49, v2, s2
	v_lshrrev_b32_e32 v3, 19, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor3_b32 v1, v1, v3, 0xc761c23c
	v_lshl_add_u32 v1, v1, 5, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v3, 0xe9f8cc1d, v1
	v_lshl_add_u32 v1, v1, 9, 0xaccf6200
	v_xor_b32_e32 v1, v3, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v3, 3, v1
	v_add3_u32 v1, v1, v3, 0xfd7046c5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v3, 16, v1
	v_xor3_b32 v1, v1, v3, 0xb55a4f09
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v2, s22, v1
	v_cndmask_b32_e32 v46, v46, v2, vcc_lo
	v_cndmask_b32_e64 v41, v41, v2, s0
	v_cndmask_b32_e64 v43, v43, v2, s1
	v_cndmask_b32_e64 v48, v48, v2, s2
	s_cbranch_scc1 .LBB3_110
; %bb.111:                              ; %.preheader55.i.i.6.i244.i.preheader
	v_mov_b32_e32 v39, 0
	v_dual_mov_b32 v40, 0 :: v_dual_mov_b32 v45, 0
	s_mov_b32 s6, 0x54442d18
	s_mov_b32 s10, 0x33145c07
	s_mov_b32 s12, 0x6dc9c883
	s_mov_b32 s26, 0x33145c00
	s_mov_b32 s28, 0x252049c0
	s_mov_b32 s30, 0x55555555
	s_mov_b32 s34, 0x6b47b09a
	s_mov_b32 s36, 0xbf559e2b
	s_mov_b32 s38, 0xd7f4df2e
	s_mov_b32 s40, 0x16291751
	s_mov_b32 s42, 0x9b27acf1
	s_mov_b32 s44, 0x998ef7b6
	s_mov_b32 s46, 0xfefa39ef
	s_mov_b32 s48, 0x3b39803f
	s_mov_b32 s50, 0x9037ab78
	s_mov_b32 s52, 0x46cc5e42
	s_mov_b32 s54, 0xa17f65f6
	s_mov_b32 s56, 0x19f4ec90
	s_mov_b32 s58, 0x16c16967
	s_mov_b32 s60, 0xb42fdfa7
	s_mov_b32 s62, 0xf9a43bb8
	s_mov_b32 s64, 0x796cde01
	s_mov_b32 s66, 0x19e83e5c
	s_mov_b32 s68, 0x11110bb3
	s_mov_b32 s76, 0
	s_mov_b32 s7, 0x401921fb
	s_mov_b32 s9, 0x3ff921fb
	s_mov_b32 s11, 0x3c91a626
	s_mov_b32 s13, 0x3fe45f30
	s_mov_b32 s25, 0xbff921fb
	s_mov_b32 s27, 0xbc91a626
	s_mov_b32 s29, 0xb97b839a
	s_mov_b32 s31, 0x3fe55555
	s_mov_b32 s35, 0x3fc38538
	s_mov_b32 s37, 0x3fc3ab76
	s_mov_b32 s39, 0x3fc7474d
	s_mov_b32 s41, 0x3fcc71c0
	s_mov_b32 s43, 0x3fd24924
	s_mov_b32 s45, 0x3fd99999
	s_mov_b32 s47, 0x3fe62e42
	s_mov_b32 s49, 0x3c7abc9e
	s_mov_b32 s51, 0x3e21eeb6
	s_mov_b32 s53, 0xbda907db
	s_mov_b32 s55, 0xbe927e4f
	s_mov_b32 s57, 0x3efa01a0
	s_mov_b32 s59, 0xbf56c16c
	s_mov_b32 s61, 0xbe5ae600
	s_mov_b32 s63, 0x3de5e0b2
	s_mov_b32 s65, 0x3ec71de3
	s_mov_b32 s67, 0xbf2a01a0
	s_mov_b32 s69, 0x3f811111
	s_mov_b32 s70, 0x55555780
	s_mov_b32 s73, 0x3fa55555
	s_mov_b32 s75, 0xbfc55555
                                        ; implicit-def: $vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16
                                        ; implicit-def: $vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26
.LBB3_112:                              ; %.preheader55.i.i.6.i244.i
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB3_113 Depth 2
                                        ;     Child Loop BB3_123 Depth 2
                                        ;       Child Loop BB3_124 Depth 3
	v_dual_mov_b32 v55, v47 :: v_dual_mov_b32 v54, v46
	v_dual_mov_b32 v57, v49 :: v_dual_mov_b32 v56, v48
	s_mov_b32 s77, 0
.LBB3_113:                              ;   Parent Loop BB3_112 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v22, v42, v57
	v_xor_b32_e32 v21, v41, v56
                                        ; implicit-def: $vgpr67
                                        ; implicit-def: $vgpr50_vgpr51
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v69, v22, v55
	v_lshrrev_b64 v[47:48], 19, v[21:22]
	v_lshlrev_b32_e32 v23, 13, v21
	v_xor_b32_e32 v68, v21, v54
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_or_b32_e32 v70, v23, v48
	v_add_co_u32 v21, vcc_lo, v47, v68
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v22, vcc_lo, v70, v69, vcc_lo
	v_lshrrev_b64 v[21:22], 11, v[21:22]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_u32_e32 v[22:23], v22
	v_cvt_f64_u32_e32 v[24:25], v21
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[21:22], v[22:23], 32
	v_add_f64 v[21:22], v[21:22], v[24:25]
                                        ; implicit-def: $vgpr25_vgpr26
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[21:22], v[21:22], 0xffffffcb
	v_mul_f64 v[21:22], v[21:22], s[6:7]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ngt_f64_e32 vcc_lo, 0x41d00000, v[21:22]
	v_trig_preop_f64 v[60:61], v[21:22], 0
	v_trig_preop_f64 v[58:59], v[21:22], 1
	v_ldexp_f64 v[62:63], v[21:22], 0xffffff80
	v_trig_preop_f64 v[48:49], v[21:22], 2
	s_and_saveexec_b32 s0, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s2, exec_lo, s0
	s_cbranch_execz .LBB3_115
; %bb.114:                              ;   in Loop: Header=BB3_113 Depth=2
	v_cmp_le_f64_e64 s0, 0x7b000000, v[21:22]
	s_mov_b32 s8, s6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v24, v22, v63, s0
	v_cndmask_b32_e64 v23, v21, v62, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_f64 v[25:26], v[60:61], v[23:24]
	v_mul_f64 v[50:51], v[58:59], v[23:24]
	v_mul_f64 v[79:80], v[48:49], v[23:24]
	v_fma_f64 v[52:53], v[60:61], v[23:24], -v[25:26]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[81:82], v[58:59], v[23:24], -v[50:51]
	v_fma_f64 v[23:24], v[48:49], v[23:24], -v[79:80]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[71:72], v[50:51], v[52:53]
	v_add_f64 v[73:74], v[71:72], -v[50:51]
	v_add_f64 v[77:78], v[25:26], v[71:72]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[75:76], v[71:72], -v[73:74]
	v_add_f64 v[52:53], v[52:53], -v[73:74]
	v_ldexp_f64 v[73:74], v[77:78], -2
	v_add_f64 v[25:26], v[77:78], -v[25:26]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[50:51], v[50:51], -v[75:76]
	v_add_f64 v[75:76], v[79:80], v[81:82]
	v_cmp_neq_f64_e64 s0, 0x7ff00000, |v[73:74]|
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[25:26], v[71:72], -v[25:26]
	v_add_f64 v[50:51], v[52:53], v[50:51]
	v_fract_f64_e32 v[52:53], v[73:74]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[71:72], v[75:76], v[50:51]
	v_cndmask_b32_e64 v53, 0, v53, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v52, 0, v52, s0
	v_ldexp_f64 v[52:53], v[52:53], 2
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[73:74], v[25:26], v[71:72]
	v_add_f64 v[83:84], v[71:72], -v[75:76]
	v_add_f64 v[77:78], v[73:74], v[52:53]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[89:90], v[71:72], -v[83:84]
	v_add_f64 v[50:51], v[50:51], -v[83:84]
	v_add_f64 v[25:26], v[73:74], -v[25:26]
	v_cmp_gt_f64_e64 s0, 0, v[77:78]
	v_add_f64 v[77:78], v[75:76], -v[79:80]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[25:26], v[71:72], -v[25:26]
	v_cndmask_b32_e64 v46, 0, 0x40100000, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[87:88], v[75:76], -v[77:78]
	v_add_f64 v[77:78], v[81:82], -v[77:78]
	v_add_f64 v[75:76], v[75:76], -v[89:90]
	v_add_f64 v[52:53], v[52:53], v[45:46]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[81:82], v[79:80], -v[87:88]
	v_add_f64 v[50:51], v[50:51], v[75:76]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[85:86], v[73:74], v[52:53]
	v_add_f64 v[77:78], v[77:78], v[81:82]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_i32_f64_e32 v46, v[85:86]
	v_add_f64 v[50:51], v[77:78], v[50:51]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_i32_e32 v[83:84], v46
	v_add_f64 v[23:24], v[23:24], v[50:51]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[52:53], v[52:53], -v[83:84]
	v_add_f64 v[23:24], v[25:26], v[23:24]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[75:76], v[73:74], v[52:53]
	v_add_f64 v[50:51], v[75:76], -v[52:53]
	v_cmp_le_f64_e64 s0, 0.5, v[75:76]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[25:26], v[73:74], -v[50:51]
	v_add_co_ci_u32_e64 v67, s1, 0, v46, s0
	v_cndmask_b32_e64 v46, 0, 0x3ff00000, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[23:24], v[23:24], v[25:26]
	v_add_f64 v[25:26], v[75:76], -v[45:46]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[50:51], v[25:26], v[23:24]
	v_mul_f64 v[52:53], v[50:51], s[8:9]
	v_add_f64 v[25:26], v[50:51], -v[25:26]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[71:72], v[50:51], s[8:9], -v[52:53]
	v_add_f64 v[23:24], v[23:24], -v[25:26]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[25:26], v[50:51], s[10:11], v[71:72]
	v_fma_f64 v[23:24], v[23:24], s[8:9], v[25:26]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[25:26], v[52:53], v[23:24]
	v_add_f64 v[50:51], v[25:26], -v[52:53]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[50:51], v[23:24], -v[50:51]
.LBB3_115:                              ; %Flow1193
                                        ;   in Loop: Header=BB3_113 Depth=2
	s_and_not1_saveexec_b32 s0, s2
	s_cbranch_execz .LBB3_117
; %bb.116:                              ;   in Loop: Header=BB3_113 Depth=2
	v_mul_f64 v[23:24], v[21:22], s[12:13]
	s_mov_b32 s24, s6
	s_mov_b32 s2, s26
	s_mov_b32 s3, s11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[23:24], v[23:24]
	v_fma_f64 v[25:26], v[23:24], s[24:25], v[21:22]
	v_mul_f64 v[50:51], v[23:24], s[26:27]
	v_cvt_i32_f64_e32 v67, v[23:24]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[71:72], v[23:24], s[26:27], v[25:26]
	v_add_f64 v[52:53], v[25:26], v[50:51]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[25:26], v[25:26], -v[52:53]
	v_add_f64 v[52:53], v[52:53], -v[71:72]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[25:26], v[25:26], v[50:51]
	v_fma_f64 v[50:51], v[23:24], s[2:3], v[50:51]
	v_add_f64 v[25:26], v[52:53], v[25:26]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[25:26], v[25:26], -v[50:51]
	v_fma_f64 v[50:51], v[23:24], s[28:29], v[25:26]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[25:26], v[71:72], v[50:51]
	v_add_f64 v[52:53], v[25:26], -v[71:72]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[50:51], v[50:51], -v[52:53]
.LBB3_117:                              ; %_ZL3cosd.exit.i.i.6.i254.i
                                        ;   in Loop: Header=BB3_113 Depth=2
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $vgpr65
                                        ; implicit-def: $vgpr23_vgpr24
                                        ; implicit-def: $vgpr52_vgpr53
	s_and_saveexec_b32 s0, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s1, exec_lo, s0
	s_cbranch_execz .LBB3_119
; %bb.118:                              ;   in Loop: Header=BB3_113 Depth=2
	v_cmp_le_f64_e32 vcc_lo, 0x7b000000, v[21:22]
	s_mov_b32 s8, s6
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v24, v22, v63 :: v_dual_cndmask_b32 v23, v21, v62
	v_mul_f64 v[52:53], v[60:61], v[23:24]
	v_mul_f64 v[62:63], v[58:59], v[23:24]
	v_mul_f64 v[79:80], v[48:49], v[23:24]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[60:61], v[60:61], v[23:24], -v[52:53]
	v_fma_f64 v[58:59], v[58:59], v[23:24], -v[62:63]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[23:24], v[48:49], v[23:24], -v[79:80]
	v_add_f64 v[71:72], v[62:63], v[60:61]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[73:74], v[71:72], -v[62:63]
	v_add_f64 v[77:78], v[52:53], v[71:72]
	v_add_f64 v[75:76], v[71:72], -v[73:74]
	v_add_f64 v[60:61], v[60:61], -v[73:74]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[73:74], v[77:78], -2
	v_add_f64 v[52:53], v[77:78], -v[52:53]
	v_add_f64 v[62:63], v[62:63], -v[75:76]
	v_add_f64 v[75:76], v[79:80], v[58:59]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[73:74]|
	v_add_f64 v[52:53], v[71:72], -v[52:53]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[60:61], v[60:61], v[62:63]
	v_fract_f64_e32 v[62:63], v[73:74]
	v_add_f64 v[71:72], v[75:76], v[60:61]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v63, 0, v63 :: v_dual_cndmask_b32 v62, 0, v62
	v_ldexp_f64 v[62:63], v[62:63], 2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[73:74], v[52:53], v[71:72]
	v_add_f64 v[81:82], v[71:72], -v[75:76]
	v_add_f64 v[77:78], v[73:74], v[62:63]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[87:88], v[71:72], -v[81:82]
	v_add_f64 v[60:61], v[60:61], -v[81:82]
	v_add_f64 v[48:49], v[73:74], -v[52:53]
	v_cmp_gt_f64_e32 vcc_lo, 0, v[77:78]
	v_add_f64 v[77:78], v[75:76], -v[79:80]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[48:49], v[71:72], -v[48:49]
	v_cndmask_b32_e64 v46, 0, 0x40100000, vcc_lo
	v_add_f64 v[85:86], v[75:76], -v[77:78]
	v_add_f64 v[58:59], v[58:59], -v[77:78]
	v_add_f64 v[75:76], v[75:76], -v[87:88]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[62:63], v[62:63], v[45:46]
	v_add_f64 v[77:78], v[79:80], -v[85:86]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[60:61], v[60:61], v[75:76]
	v_add_f64 v[83:84], v[73:74], v[62:63]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[58:59], v[58:59], v[77:78]
	v_cvt_i32_f64_e32 v46, v[83:84]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[52:53], v[58:59], v[60:61]
	v_cvt_f64_i32_e32 v[81:82], v46
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[23:24], v[23:24], v[52:53]
	v_add_f64 v[62:63], v[62:63], -v[81:82]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[23:24], v[48:49], v[23:24]
	v_add_f64 v[58:59], v[73:74], v[62:63]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[52:53], v[58:59], -v[62:63]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[58:59]
	v_add_f64 v[48:49], v[73:74], -v[52:53]
	v_add_co_ci_u32_e64 v65, s0, 0, v46, vcc_lo
	v_cndmask_b32_e64 v46, 0, 0x3ff00000, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[23:24], v[23:24], v[48:49]
	v_add_f64 v[48:49], v[58:59], -v[45:46]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[52:53], v[48:49], v[23:24]
	v_mul_f64 v[58:59], v[52:53], s[8:9]
	v_add_f64 v[48:49], v[52:53], -v[48:49]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[60:61], v[52:53], s[8:9], -v[58:59]
	v_add_f64 v[23:24], v[23:24], -v[48:49]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[48:49], v[52:53], s[10:11], v[60:61]
	v_fma_f64 v[48:49], v[23:24], s[8:9], v[48:49]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[23:24], v[58:59], v[48:49]
	v_add_f64 v[52:53], v[23:24], -v[58:59]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[52:53], v[48:49], -v[52:53]
.LBB3_119:                              ; %Flow1192
                                        ;   in Loop: Header=BB3_113 Depth=2
	s_and_not1_saveexec_b32 s0, s1
	s_cbranch_execz .LBB3_121
; %bb.120:                              ;   in Loop: Header=BB3_113 Depth=2
	v_mul_f64 v[23:24], v[21:22], s[12:13]
	s_mov_b32 s24, s6
	s_mov_b32 s2, s26
	s_mov_b32 s3, s11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[48:49], v[23:24]
	v_fma_f64 v[23:24], v[48:49], s[24:25], v[21:22]
	v_mul_f64 v[52:53], v[48:49], s[26:27]
	v_cvt_i32_f64_e32 v65, v[48:49]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[60:61], v[48:49], s[26:27], v[23:24]
	v_add_f64 v[58:59], v[23:24], v[52:53]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[23:24], v[23:24], -v[58:59]
	v_add_f64 v[58:59], v[58:59], -v[60:61]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[23:24], v[23:24], v[52:53]
	v_fma_f64 v[52:53], v[48:49], s[2:3], v[52:53]
	v_add_f64 v[23:24], v[58:59], v[23:24]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[23:24], v[23:24], -v[52:53]
	v_fma_f64 v[52:53], v[48:49], s[28:29], v[23:24]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[23:24], v[60:61], v[52:53]
	v_add_f64 v[58:59], v[23:24], -v[60:61]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[52:53], v[52:53], -v[58:59]
.LBB3_121:                              ; %_ZL3sind.exit.i.i.6.i259.i
                                        ;   in Loop: Header=BB3_113 Depth=2
	s_or_b32 exec_lo, exec_lo, s0
	v_xor_b32_e32 v43, v43, v54
	v_add_co_u32 v54, vcc_lo, v56, v54
	v_xor_b32_e32 v44, v44, v55
	v_add_co_ci_u32_e32 v55, vcc_lo, v57, v55, vcc_lo
	v_lshlrev_b64 v[48:49], 17, v[41:42]
	v_xor_b32_e32 v41, v43, v41
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_xor_b32_e32 v42, v44, v42
	v_lshrrev_b64 v[54:55], 11, v[54:55]
	s_mov_b32 s71, s31
	s_mov_b32 s72, s30
	v_xor_b32_e32 v46, v44, v49
	v_xor_b32_e32 v48, v43, v48
	v_lshlrev_b64 v[43:44], 17, v[41:42]
	v_cvt_f64_u32_e32 v[55:56], v55
	v_xor_b32_e32 v59, v42, v70
	v_xor_b32_e32 v49, v46, v69
	v_xor_b32_e32 v48, v48, v68
	v_xor_b32_e32 v58, v41, v47
	s_mov_b32 s74, s30
	v_xor_b32_e32 v47, v59, v69
	v_xor_b32_e32 v42, v49, v42
	v_xor_b32_e32 v41, v48, v41
	v_xor_b32_e32 v44, v49, v44
	v_xor_b32_e32 v43, v48, v43
	v_lshrrev_b64 v[48:49], 19, v[58:59]
	v_xor_b32_e32 v46, v58, v68
	v_lshlrev_b32_e32 v58, 13, v58
	v_cmp_lg_f64_e64 s1, 0x7ff00000, v[21:22]
	s_cmp_eq_u32 s77, 4
	v_and_b32_e32 v21, 1, v65
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_or_b32_e32 v49, v58, v49
	v_cvt_f64_u32_e32 v[57:58], v54
	v_cmp_eq_u32_e64 s5, 0, v21
	v_ldexp_f64 v[55:56], v[55:56], 32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[54:55], v[55:56], v[57:58]
	v_ldexp_f64 v[54:55], v[54:55], 0xffffffcb
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_frexp_mant_f64_e32 v[56:57], v[54:55]
	v_cmp_gt_f64_e32 vcc_lo, s[30:31], v[56:57]
	v_cndmask_b32_e64 v58, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[56:57], v[56:57], v58
	v_frexp_exp_i32_f64_e32 v58, v[54:55]
	v_add_f64 v[60:61], v[56:57], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_subrev_co_ci_u32_e32 v74, vcc_lo, 0, v58, vcc_lo
	v_add_f64 v[58:59], v[56:57], -1.0
	v_cmp_eq_f64_e32 vcc_lo, 0x7ff00000, v[54:55]
	v_add_f64 v[62:63], v[60:61], -1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_f64 v[56:57], v[56:57], -v[62:63]
	v_rcp_f64_e32 v[62:63], v[60:61]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[68:69], -v[60:61], v[62:63], 1.0
	v_fma_f64 v[62:63], v[68:69], v[62:63], v[62:63]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[68:69], -v[60:61], v[62:63], 1.0
	v_fma_f64 v[62:63], v[68:69], v[62:63], v[62:63]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[68:69], v[58:59], v[62:63]
	v_mul_f64 v[70:71], v[60:61], v[68:69]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[60:61], v[68:69], v[60:61], -v[70:71]
	v_fma_f64 v[56:57], v[68:69], v[56:57], v[60:61]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[60:61], v[70:71], v[56:57]
	v_add_f64 v[72:73], v[58:59], -v[60:61]
	v_add_f64 v[70:71], v[60:61], -v[70:71]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[58:59], v[58:59], -v[72:73]
	v_add_f64 v[56:57], v[70:71], -v[56:57]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[58:59], v[58:59], -v[60:61]
	v_add_f64 v[56:57], v[56:57], v[58:59]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[56:57], v[72:73], v[56:57]
	v_mul_f64 v[56:57], v[62:63], v[56:57]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[58:59], v[68:69], v[56:57]
	v_add_f64 v[60:61], v[58:59], -v[68:69]
	v_ldexp_f64 v[68:69], v[58:59], 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[56:57], v[56:57], -v[60:61]
	v_mul_f64 v[60:61], v[58:59], v[58:59]
	v_ldexp_f64 v[56:57], v[56:57], 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[62:63], v[60:61], s[36:37], s[34:35]
	v_mul_f64 v[58:59], v[58:59], v[60:61]
	v_fma_f64 v[62:63], v[60:61], v[62:63], s[38:39]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[62:63], v[60:61], v[62:63], s[40:41]
	v_fma_f64 v[62:63], v[60:61], v[62:63], s[42:43]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[62:63], v[60:61], v[62:63], s[44:45]
	v_fma_f64 v[62:63], v[60:61], v[62:63], s[70:71]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[58:59], v[58:59], v[62:63]
	v_add_f64 v[60:61], v[68:69], v[58:59]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[62:63], v[60:61], -v[68:69]
	v_add_f64 v[58:59], v[58:59], -v[62:63]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[56:57], v[56:57], v[58:59]
	v_add_f64 v[58:59], v[60:61], v[56:57]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[60:61], v[58:59], -v[60:61]
	v_add_f64 v[56:57], v[56:57], -v[60:61]
	v_cvt_f64_i32_e32 v[60:61], v74
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[62:63], v[60:61], s[46:47]
	v_fma_f64 v[68:69], v[60:61], s[46:47], -v[62:63]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[60:61], v[60:61], s[48:49], v[68:69]
	v_add_f64 v[68:69], v[62:63], v[60:61]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[62:63], v[68:69], -v[62:63]
	v_add_f64 v[60:61], v[60:61], -v[62:63]
	v_add_f64 v[62:63], v[68:69], v[58:59]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[70:71], v[62:63], -v[68:69]
	v_add_f64 v[72:73], v[62:63], -v[70:71]
	v_add_f64 v[58:59], v[58:59], -v[70:71]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[68:69], v[68:69], -v[72:73]
	v_add_f64 v[58:59], v[58:59], v[68:69]
	v_add_f64 v[68:69], v[60:61], v[56:57]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[70:71], v[68:69], -v[60:61]
	v_add_f64 v[58:59], v[68:69], v[58:59]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[72:73], v[68:69], -v[70:71]
	v_add_f64 v[56:57], v[56:57], -v[70:71]
	v_add_f64 v[60:61], v[60:61], -v[72:73]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[56:57], v[56:57], v[60:61]
	v_add_f64 v[60:61], v[62:63], v[58:59]
	v_add_f64 v[62:63], v[60:61], -v[62:63]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[58:59], v[58:59], -v[62:63]
	v_add_f64 v[56:57], v[56:57], v[58:59]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[56:57], v[60:61], v[56:57]
	v_dual_cndmask_b32 v57, v57, v55 :: v_dual_cndmask_b32 v56, v56, v54
	v_cmp_ngt_f64_e32 vcc_lo, 0, v[54:55]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[56:57], v[56:57], -2.0
	v_cndmask_b32_e32 v57, 0x7ff80000, v57, vcc_lo
	v_cmp_nge_f64_e32 vcc_lo, 0, v[54:55]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_cndmask_b32_e32 v56, 0, v56, vcc_lo
	v_cmp_neq_f64_e32 vcc_lo, 0, v[54:55]
	v_cndmask_b32_e32 v57, 0x7ff00000, v57, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[56:57]
	v_cndmask_b32_e64 v54, 0, 1, vcc_lo
	v_lshlrev_b32_e32 v54, 8, v54
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[54:55], v[56:57], v54
	v_rsq_f64_e32 v[56:57], v[54:55]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[58:59], v[54:55], v[56:57]
	v_mul_f64 v[56:57], v[56:57], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[60:61], -v[56:57], v[58:59], 0.5
	v_fma_f64 v[58:59], v[58:59], v[60:61], v[58:59]
	v_fma_f64 v[56:57], v[56:57], v[60:61], v[56:57]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[62:63], -v[58:59], v[58:59], v[54:55]
	v_fma_f64 v[58:59], v[62:63], v[56:57], v[58:59]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[60:61], -v[58:59], v[58:59], v[54:55]
	v_fma_f64 v[56:57], v[60:61], v[56:57], v[58:59]
	v_cndmask_b32_e64 v58, 0, 0xffffff80, vcc_lo
	v_cmp_class_f64_e64 vcc_lo, v[54:55], 0x260
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[56:57], v[56:57], v58
	v_dual_cndmask_b32 v55, v57, v55 :: v_dual_cndmask_b32 v54, v56, v54
	v_mul_f64 v[56:57], v[25:26], v[25:26]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[58:59], v[56:57], 0.5
	v_fma_f64 v[68:69], v[56:57], s[52:53], s[50:51]
	v_add_f64 v[60:61], -v[58:59], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[68:69], v[56:57], v[68:69], s[54:55]
	v_add_f64 v[62:63], -v[60:61], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[68:69], v[56:57], v[68:69], s[56:57]
	v_add_f64 v[58:59], v[62:63], -v[58:59]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[68:69], v[56:57], v[68:69], s[58:59]
	v_mul_f64 v[62:63], v[56:57], v[56:57]
	v_fma_f64 v[58:59], v[25:26], -v[50:51], v[58:59]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[68:69], v[56:57], v[68:69], s[72:73]
	v_fma_f64 v[58:59], v[62:63], v[68:69], v[58:59]
	v_mul_f64 v[62:63], v[25:26], -v[56:57]
	v_mul_f64 v[68:69], v[50:51], 0.5
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[58:59], v[60:61], v[58:59]
	v_fma_f64 v[60:61], v[56:57], s[62:63], s[60:61]
	v_fma_f64 v[60:61], v[56:57], v[60:61], s[64:65]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[60:61], v[56:57], v[60:61], s[66:67]
	v_fma_f64 v[60:61], v[56:57], v[60:61], s[68:69]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[60:61], v[62:63], v[60:61], v[68:69]
	v_fma_f64 v[50:51], v[56:57], v[60:61], -v[50:51]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[50:51], v[62:63], s[74:75], v[50:51]
	v_add_f64 v[25:26], v[25:26], -v[50:51]
	v_and_b32_e32 v50, 1, v67
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_eq_u32_e32 vcc_lo, 0, v50
	v_xor_b32_e32 v26, 0x80000000, v26
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v25, v25, v58 :: v_dual_cndmask_b32 v26, v26, v59
	s_cselect_b32 vcc_lo, -1, 0
	v_lshlrev_b32_e32 v50, 30, v67
	v_cndmask_b32_e64 v25, 0, v25, s1
	s_cmp_eq_u32 s77, 3
	s_cselect_b32 s0, -1, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_and_b32_e32 v50, 0x80000000, v50
	s_cmp_eq_u32 s77, 2
	s_cselect_b32 s2, -1, 0
	s_cmp_eq_u32 s77, 1
	v_xor_b32_e32 v26, v26, v50
	s_cselect_b32 s3, -1, 0
	s_cmp_eq_u32 s77, 0
	s_cselect_b32 s4, -1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cndmask_b32_e64 v26, 0x7ff80000, v26, s1
	s_add_i32 s77, s77, 1
	s_cmp_lg_u32 s77, 5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[25:26], v[54:55], v[25:26]
	v_dual_cndmask_b32 v20, v20, v26 :: v_dual_cndmask_b32 v19, v19, v25
	v_cndmask_b32_e64 v18, v18, v26, s0
	v_cndmask_b32_e64 v17, v17, v25, s0
	v_cndmask_b32_e64 v16, v16, v26, s2
	v_cndmask_b32_e64 v15, v15, v25, s2
	v_cndmask_b32_e64 v14, v14, v26, s3
	v_cndmask_b32_e64 v13, v13, v25, s3
	v_cndmask_b32_e64 v12, v12, v26, s4
	v_cndmask_b32_e64 v11, v11, v25, s4
	v_mul_f64 v[25:26], v[23:24], v[23:24]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[50:51], v[25:26], 0.5
	v_fma_f64 v[60:61], v[25:26], s[52:53], s[50:51]
	v_add_f64 v[56:57], -v[50:51], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[60:61], v[25:26], v[60:61], s[54:55]
	v_add_f64 v[58:59], -v[56:57], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[60:61], v[25:26], v[60:61], s[56:57]
	v_add_f64 v[50:51], v[58:59], -v[50:51]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[60:61], v[25:26], v[60:61], s[58:59]
	v_mul_f64 v[58:59], v[25:26], v[25:26]
	v_fma_f64 v[50:51], v[23:24], -v[52:53], v[50:51]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[60:61], v[25:26], v[60:61], s[72:73]
	v_fma_f64 v[50:51], v[58:59], v[60:61], v[50:51]
	v_mul_f64 v[58:59], v[23:24], -v[25:26]
	v_mul_f64 v[60:61], v[52:53], 0.5
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[50:51], v[56:57], v[50:51]
	v_fma_f64 v[56:57], v[25:26], s[62:63], s[60:61]
	v_fma_f64 v[56:57], v[25:26], v[56:57], s[64:65]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[56:57], v[25:26], v[56:57], s[66:67]
	v_fma_f64 v[56:57], v[25:26], v[56:57], s[68:69]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[56:57], v[58:59], v[56:57], v[60:61]
	v_fma_f64 v[25:26], v[25:26], v[56:57], -v[52:53]
	v_dual_mov_b32 v57, v49 :: v_dual_mov_b32 v56, v48
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[25:26], v[58:59], s[74:75], v[25:26]
	v_add_f64 v[23:24], v[23:24], -v[25:26]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v21, v50, v23, s5
	v_cndmask_b32_e64 v23, v51, v24, s5
	v_lshlrev_b32_e32 v24, 30, v65
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v21, 0, v21, s1
	v_xor_b32_e32 v22, v24, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v22, 0x80000000, v22
	v_xor_b32_e32 v22, v23, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v22, 0x7ff80000, v22, s1
	v_mul_f64 v[21:22], v[54:55], v[21:22]
	v_dual_mov_b32 v55, v47 :: v_dual_mov_b32 v54, v46
	s_delay_alu instid0(VALU_DEP_2)
	v_dual_cndmask_b32 v10, v10, v22 :: v_dual_cndmask_b32 v9, v9, v21
	v_cndmask_b32_e64 v8, v8, v22, s0
	v_cndmask_b32_e64 v7, v7, v21, s0
	v_cndmask_b32_e64 v6, v6, v22, s2
	v_cndmask_b32_e64 v5, v5, v21, s2
	v_cndmask_b32_e64 v4, v4, v22, s3
	v_cndmask_b32_e64 v3, v3, v21, s3
	v_cndmask_b32_e64 v2, v2, v22, s4
	v_cndmask_b32_e64 v1, v1, v21, s4
	s_cbranch_scc1 .LBB3_113
; %bb.122:                              ; %.lr.ph.i.i.6.i266.i.preheader
                                        ;   in Loop: Header=BB3_112 Depth=1
	v_mov_b32_e32 v21, 0
	v_mov_b32_e32 v22, 0
	s_mov_b32 s3, 0
.LBB3_123:                              ; %.lr.ph.i.i.6.i266.i
                                        ;   Parent Loop BB3_112 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB3_124 Depth 3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s3, 1
	s_mov_b32 s4, s3
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s3, 2
	v_dual_cndmask_b32 v23, v12, v14 :: v_dual_cndmask_b32 v24, v11, v13
	v_dual_cndmask_b32 v25, v2, v4 :: v_dual_cndmask_b32 v26, v1, v3
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s3, 3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v23, v23, v16 :: v_dual_cndmask_b32 v24, v24, v15
	v_dual_cndmask_b32 v25, v25, v6 :: v_dual_cndmask_b32 v26, v26, v5
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s3, 4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v23, v23, v18 :: v_dual_cndmask_b32 v50, v24, v17
	v_cndmask_b32_e32 v25, v25, v8, vcc_lo
	v_cndmask_b32_e32 v51, v26, v7, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v24, v23, v20 :: v_dual_cndmask_b32 v23, v50, v19
	v_dual_cndmask_b32 v26, v25, v10 :: v_dual_cndmask_b32 v25, v51, v9
.LBB3_124:                              ;   Parent Loop BB3_112 Depth=1
                                        ;     Parent Loop BB3_123 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_add_i32 s4, s4, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s4, 1
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s4, 2
	v_dual_cndmask_b32 v50, v12, v14 :: v_dual_cndmask_b32 v51, v2, v4
	v_cndmask_b32_e32 v52, v1, v3, vcc_lo
	s_cselect_b32 s0, -1, 0
	s_cmp_eq_u32 s4, 3
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e64 v50, v50, v16, s0
	v_cndmask_b32_e64 v51, v51, v6, s0
	v_cndmask_b32_e64 v52, v52, v5, s0
	s_cselect_b32 s1, -1, 0
	s_cmp_eq_u32 s4, 4
	v_cndmask_b32_e64 v50, v50, v18, s1
	v_cndmask_b32_e64 v53, v51, v8, s1
	v_cndmask_b32_e64 v52, v52, v7, s1
	s_cselect_b32 s2, -1, 0
	s_cmp_lt_u32 s4, 4
	v_cndmask_b32_e64 v51, v50, v20, s2
	v_cndmask_b32_e64 v53, v53, v10, s2
	v_cndmask_b32_e64 v52, v52, v9, s2
	v_cndmask_b32_e32 v50, v11, v13, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[52:53], v[25:26], -v[52:53]
	v_cndmask_b32_e64 v50, v50, v15, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v50, v50, v17, s1
	v_cndmask_b32_e64 v50, v50, v19, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[50:51], v[23:24], -v[50:51]
	v_mul_f64 v[52:53], v[52:53], v[52:53]
	v_fma_f64 v[50:51], v[50:51], v[50:51], v[52:53]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_lt_f64_e32 vcc_lo, v[21:22], v[50:51]
	v_dual_cndmask_b32 v22, v22, v51 :: v_dual_cndmask_b32 v21, v21, v50
	s_cbranch_scc1 .LBB3_124
; %bb.125:                              ; %.loopexit.i.i.6.i272.i
                                        ;   in Loop: Header=BB3_123 Depth=2
	s_add_i32 s3, s3, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s3, 4
	s_cbranch_scc1 .LBB3_123
; %bb.126:                              ;   in Loop: Header=BB3_112 Depth=1
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[21:22]
	s_add_i32 s76, s76, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	s_cmp_lg_u32 s76, 0x10000
	v_cndmask_b32_e64 v23, 0, 1, vcc_lo
	v_lshlrev_b32_e32 v23, 8, v23
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[21:22], v[21:22], v23
	v_rsq_f64_e32 v[23:24], v[21:22]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[25:26], v[21:22], v[23:24]
	v_mul_f64 v[23:24], v[23:24], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[50:51], -v[23:24], v[25:26], 0.5
	v_fma_f64 v[25:26], v[25:26], v[50:51], v[25:26]
	v_fma_f64 v[23:24], v[23:24], v[50:51], v[23:24]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[50:51], -v[25:26], v[25:26], v[21:22]
	v_fma_f64 v[25:26], v[50:51], v[23:24], v[25:26]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[50:51], -v[25:26], v[25:26], v[21:22]
	v_fma_f64 v[23:24], v[50:51], v[23:24], v[25:26]
	v_cndmask_b32_e64 v25, 0, 0xffffff80, vcc_lo
	v_cmp_class_f64_e64 vcc_lo, v[21:22], 0x260
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[23:24], v[23:24], v25
	v_dual_cndmask_b32 v22, v24, v22 :: v_dual_cndmask_b32 v21, v23, v21
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[39:40], v[39:40], v[21:22]
	s_cbranch_scc1 .LBB3_112
; %bb.127:                              ; %_ZNK6thrust11hip_rocprim26transform_input_iterator_tIdNS_17counting_iteratorIjNS_11use_defaultES3_S3_EE11estimate_esEixEl.exit.6.i275.i
	v_add_nc_u32_e32 v1, 0x7f456416, v64
	s_mov_b64 s[4:5], 0
                                        ; implicit-def: $vgpr48_vgpr49
                                        ; implicit-def: $vgpr41_vgpr42
                                        ; implicit-def: $vgpr43_vgpr44
                                        ; implicit-def: $vgpr50_vgpr51
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v2, 19, v1
	v_xor3_b32 v1, v1, v2, 0xc761c23c
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v1, v1, 5, v1
	v_add_nc_u32_e32 v2, 0xe9f8cc1d, v1
	v_lshl_add_u32 v1, v1, 9, 0xaccf6200
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v1, v2, v1
	v_lshlrev_b32_e32 v2, 3, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v1, v1, v2, 0xfd7046c5
	v_lshrrev_b32_e32 v2, 16, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_xor3_b32 v1, v1, v2, 0xb55a4f09
.LBB3_128:                              ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v2, 12, v1
	s_cmp_eq_u32 s4, 0
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s4, 1
	v_add3_u32 v1, v1, v2, 0x7ed55d16
	s_cselect_b32 s0, -1, 0
	s_cmp_eq_u32 s4, 2
	s_cselect_b32 s1, -1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v2, 19, v1
	s_cmp_eq_u32 s4, 3
	s_cselect_b32 s2, -1, 0
	s_add_u32 s4, s4, 1
	v_xor3_b32 v1, v1, v2, 0xc761c23c
	s_addc_u32 s5, s5, 0
	s_cmp_lg_u32 s4, 4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v1, v1, 5, v1
	v_add_nc_u32_e32 v2, 0xe9f8cc1d, v1
	v_lshl_add_u32 v1, v1, 9, 0xaccf6200
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v1, v2, v1
	v_lshlrev_b32_e32 v2, 3, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v1, v1, v2, 0xfd7046c5
	v_lshrrev_b32_e32 v2, 16, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor3_b32 v1, v1, v2, 0xb55a4f09
	v_lshlrev_b32_e32 v3, 12, v1
	v_xor_b32_e32 v2, s23, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add3_u32 v1, v1, v3, 0x7ed55d16
	v_cndmask_b32_e32 v49, v49, v2, vcc_lo
	v_cndmask_b32_e64 v42, v42, v2, s0
	v_cndmask_b32_e64 v44, v44, v2, s1
	v_cndmask_b32_e64 v51, v51, v2, s2
	v_lshrrev_b32_e32 v3, 19, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor3_b32 v1, v1, v3, 0xc761c23c
	v_lshl_add_u32 v1, v1, 5, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v3, 0xe9f8cc1d, v1
	v_lshl_add_u32 v1, v1, 9, 0xaccf6200
	v_xor_b32_e32 v1, v3, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v3, 3, v1
	v_add3_u32 v1, v1, v3, 0xfd7046c5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v3, 16, v1
	v_xor3_b32 v1, v1, v3, 0xb55a4f09
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v2, s22, v1
	v_cndmask_b32_e32 v48, v48, v2, vcc_lo
	v_cndmask_b32_e64 v41, v41, v2, s0
	v_cndmask_b32_e64 v43, v43, v2, s1
	v_cndmask_b32_e64 v50, v50, v2, s2
	s_cbranch_scc1 .LBB3_128
; %bb.129:                              ; %.preheader55.i.i.7.i280.i.preheader
	v_mov_b32_e32 v45, 0
	v_dual_mov_b32 v46, 0 :: v_dual_mov_b32 v47, 0
	s_mov_b32 s6, 0x54442d18
	s_mov_b32 s10, 0x33145c07
	s_mov_b32 s12, 0x6dc9c883
	s_mov_b32 s26, 0x33145c00
	s_mov_b32 s28, 0x252049c0
	s_mov_b32 s30, 0x55555555
	s_mov_b32 s34, 0x6b47b09a
	s_mov_b32 s36, 0xbf559e2b
	s_mov_b32 s38, 0xd7f4df2e
	s_mov_b32 s40, 0x16291751
	s_mov_b32 s42, 0x9b27acf1
	s_mov_b32 s44, 0x998ef7b6
	s_mov_b32 s46, 0xfefa39ef
	s_mov_b32 s48, 0x3b39803f
	s_mov_b32 s50, 0x9037ab78
	s_mov_b32 s52, 0x46cc5e42
	s_mov_b32 s54, 0xa17f65f6
	s_mov_b32 s56, 0x19f4ec90
	s_mov_b32 s58, 0x16c16967
	s_mov_b32 s60, 0xb42fdfa7
	s_mov_b32 s62, 0xf9a43bb8
	s_mov_b32 s64, 0x796cde01
	s_mov_b32 s66, 0x19e83e5c
	s_mov_b32 s68, 0x11110bb3
	s_mov_b32 s76, 0
	s_mov_b32 s7, 0x401921fb
	s_mov_b32 s9, 0x3ff921fb
	s_mov_b32 s11, 0x3c91a626
	s_mov_b32 s13, 0x3fe45f30
	s_mov_b32 s25, 0xbff921fb
	s_mov_b32 s27, 0xbc91a626
	s_mov_b32 s29, 0xb97b839a
	s_mov_b32 s31, 0x3fe55555
	s_mov_b32 s35, 0x3fc38538
	s_mov_b32 s37, 0x3fc3ab76
	s_mov_b32 s39, 0x3fc7474d
	s_mov_b32 s41, 0x3fcc71c0
	s_mov_b32 s43, 0x3fd24924
	s_mov_b32 s45, 0x3fd99999
	s_mov_b32 s47, 0x3fe62e42
	s_mov_b32 s49, 0x3c7abc9e
	s_mov_b32 s51, 0x3e21eeb6
	s_mov_b32 s53, 0xbda907db
	s_mov_b32 s55, 0xbe927e4f
	s_mov_b32 s57, 0x3efa01a0
	s_mov_b32 s59, 0xbf56c16c
	s_mov_b32 s61, 0xbe5ae600
	s_mov_b32 s63, 0x3de5e0b2
	s_mov_b32 s65, 0x3ec71de3
	s_mov_b32 s67, 0xbf2a01a0
	s_mov_b32 s69, 0x3f811111
	s_mov_b32 s70, 0x55555780
	s_mov_b32 s73, 0x3fa55555
	s_mov_b32 s75, 0xbfc55555
                                        ; implicit-def: $vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16
                                        ; implicit-def: $vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26
.LBB3_130:                              ; %.preheader55.i.i.7.i280.i
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB3_131 Depth 2
                                        ;     Child Loop BB3_141 Depth 2
                                        ;       Child Loop BB3_142 Depth 3
	v_dual_mov_b32 v57, v49 :: v_dual_mov_b32 v56, v48
	v_dual_mov_b32 v59, v51 :: v_dual_mov_b32 v58, v50
	s_mov_b32 s77, 0
.LBB3_131:                              ;   Parent Loop BB3_130 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v22, v42, v59
	v_xor_b32_e32 v21, v41, v58
                                        ; implicit-def: $vgpr68
                                        ; implicit-def: $vgpr52_vgpr53
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v70, v22, v57
	v_lshrrev_b64 v[49:50], 19, v[21:22]
	v_lshlrev_b32_e32 v23, 13, v21
	v_xor_b32_e32 v69, v21, v56
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_or_b32_e32 v71, v23, v50
	v_add_co_u32 v21, vcc_lo, v49, v69
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v22, vcc_lo, v71, v70, vcc_lo
	v_lshrrev_b64 v[21:22], 11, v[21:22]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_u32_e32 v[22:23], v22
	v_cvt_f64_u32_e32 v[24:25], v21
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[21:22], v[22:23], 32
	v_add_f64 v[21:22], v[21:22], v[24:25]
                                        ; implicit-def: $vgpr25_vgpr26
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[21:22], v[21:22], 0xffffffcb
	v_mul_f64 v[21:22], v[21:22], s[6:7]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ngt_f64_e32 vcc_lo, 0x41d00000, v[21:22]
	v_trig_preop_f64 v[62:63], v[21:22], 0
	v_trig_preop_f64 v[60:61], v[21:22], 1
	v_ldexp_f64 v[64:65], v[21:22], 0xffffff80
	v_trig_preop_f64 v[50:51], v[21:22], 2
	s_and_saveexec_b32 s0, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s2, exec_lo, s0
	s_cbranch_execz .LBB3_133
; %bb.132:                              ;   in Loop: Header=BB3_131 Depth=2
	v_cmp_le_f64_e64 s0, 0x7b000000, v[21:22]
	s_mov_b32 s8, s6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v24, v22, v65, s0
	v_cndmask_b32_e64 v23, v21, v64, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_f64 v[25:26], v[62:63], v[23:24]
	v_mul_f64 v[52:53], v[60:61], v[23:24]
	v_mul_f64 v[78:79], v[50:51], v[23:24]
	v_fma_f64 v[54:55], v[62:63], v[23:24], -v[25:26]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[80:81], v[60:61], v[23:24], -v[52:53]
	v_fma_f64 v[23:24], v[50:51], v[23:24], -v[78:79]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[67:68], v[52:53], v[54:55]
	v_add_f64 v[72:73], v[67:68], -v[52:53]
	v_add_f64 v[76:77], v[25:26], v[67:68]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[74:75], v[67:68], -v[72:73]
	v_add_f64 v[54:55], v[54:55], -v[72:73]
	v_ldexp_f64 v[72:73], v[76:77], -2
	v_add_f64 v[25:26], v[76:77], -v[25:26]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[52:53], v[52:53], -v[74:75]
	v_add_f64 v[74:75], v[78:79], v[80:81]
	v_cmp_neq_f64_e64 s0, 0x7ff00000, |v[72:73]|
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[25:26], v[67:68], -v[25:26]
	v_add_f64 v[52:53], v[54:55], v[52:53]
	v_fract_f64_e32 v[54:55], v[72:73]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[67:68], v[74:75], v[52:53]
	v_cndmask_b32_e64 v55, 0, v55, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v54, 0, v54, s0
	v_ldexp_f64 v[54:55], v[54:55], 2
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[72:73], v[25:26], v[67:68]
	v_add_f64 v[82:83], v[67:68], -v[74:75]
	v_add_f64 v[76:77], v[72:73], v[54:55]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[88:89], v[67:68], -v[82:83]
	v_add_f64 v[52:53], v[52:53], -v[82:83]
	v_add_f64 v[25:26], v[72:73], -v[25:26]
	v_cmp_gt_f64_e64 s0, 0, v[76:77]
	v_add_f64 v[76:77], v[74:75], -v[78:79]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[25:26], v[67:68], -v[25:26]
	v_cndmask_b32_e64 v48, 0, 0x40100000, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[86:87], v[74:75], -v[76:77]
	v_add_f64 v[76:77], v[80:81], -v[76:77]
	v_add_f64 v[74:75], v[74:75], -v[88:89]
	v_add_f64 v[54:55], v[54:55], v[47:48]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[80:81], v[78:79], -v[86:87]
	v_add_f64 v[52:53], v[52:53], v[74:75]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[84:85], v[72:73], v[54:55]
	v_add_f64 v[76:77], v[76:77], v[80:81]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_i32_f64_e32 v48, v[84:85]
	v_add_f64 v[52:53], v[76:77], v[52:53]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_i32_e32 v[82:83], v48
	v_add_f64 v[23:24], v[23:24], v[52:53]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[54:55], v[54:55], -v[82:83]
	v_add_f64 v[23:24], v[25:26], v[23:24]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[74:75], v[72:73], v[54:55]
	v_add_f64 v[52:53], v[74:75], -v[54:55]
	v_cmp_le_f64_e64 s0, 0.5, v[74:75]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[25:26], v[72:73], -v[52:53]
	v_add_co_ci_u32_e64 v68, s1, 0, v48, s0
	v_cndmask_b32_e64 v48, 0, 0x3ff00000, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[23:24], v[23:24], v[25:26]
	v_add_f64 v[25:26], v[74:75], -v[47:48]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[52:53], v[25:26], v[23:24]
	v_mul_f64 v[54:55], v[52:53], s[8:9]
	v_add_f64 v[25:26], v[52:53], -v[25:26]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[72:73], v[52:53], s[8:9], -v[54:55]
	v_add_f64 v[23:24], v[23:24], -v[25:26]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[25:26], v[52:53], s[10:11], v[72:73]
	v_fma_f64 v[23:24], v[23:24], s[8:9], v[25:26]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[25:26], v[54:55], v[23:24]
	v_add_f64 v[52:53], v[25:26], -v[54:55]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[52:53], v[23:24], -v[52:53]
.LBB3_133:                              ; %Flow1191
                                        ;   in Loop: Header=BB3_131 Depth=2
	s_and_not1_saveexec_b32 s0, s2
	s_cbranch_execz .LBB3_135
; %bb.134:                              ;   in Loop: Header=BB3_131 Depth=2
	v_mul_f64 v[23:24], v[21:22], s[12:13]
	s_mov_b32 s24, s6
	s_mov_b32 s2, s26
	s_mov_b32 s3, s11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[23:24], v[23:24]
	v_fma_f64 v[25:26], v[23:24], s[24:25], v[21:22]
	v_mul_f64 v[52:53], v[23:24], s[26:27]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[67:68], v[23:24], s[26:27], v[25:26]
	v_add_f64 v[54:55], v[25:26], v[52:53]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[25:26], v[25:26], -v[54:55]
	v_add_f64 v[54:55], v[54:55], -v[67:68]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[25:26], v[25:26], v[52:53]
	v_fma_f64 v[52:53], v[23:24], s[2:3], v[52:53]
	v_add_f64 v[25:26], v[54:55], v[25:26]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[25:26], v[25:26], -v[52:53]
	v_fma_f64 v[52:53], v[23:24], s[28:29], v[25:26]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[25:26], v[67:68], v[52:53]
	v_add_f64 v[54:55], v[25:26], -v[67:68]
	v_cvt_i32_f64_e32 v68, v[23:24]
	s_delay_alu instid0(VALU_DEP_2)
	v_add_f64 v[52:53], v[52:53], -v[54:55]
.LBB3_135:                              ; %_ZL3cosd.exit.i.i.7.i290.i
                                        ;   in Loop: Header=BB3_131 Depth=2
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $vgpr67
                                        ; implicit-def: $vgpr23_vgpr24
                                        ; implicit-def: $vgpr54_vgpr55
	s_and_saveexec_b32 s0, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s1, exec_lo, s0
	s_cbranch_execz .LBB3_137
; %bb.136:                              ;   in Loop: Header=BB3_131 Depth=2
	v_cmp_le_f64_e32 vcc_lo, 0x7b000000, v[21:22]
	s_mov_b32 s8, s6
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v24, v22, v65 :: v_dual_cndmask_b32 v23, v21, v64
	v_mul_f64 v[54:55], v[62:63], v[23:24]
	v_mul_f64 v[64:65], v[60:61], v[23:24]
	v_mul_f64 v[80:81], v[50:51], v[23:24]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[62:63], v[62:63], v[23:24], -v[54:55]
	v_fma_f64 v[60:61], v[60:61], v[23:24], -v[64:65]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[23:24], v[50:51], v[23:24], -v[80:81]
	v_add_f64 v[72:73], v[64:65], v[62:63]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[74:75], v[72:73], -v[64:65]
	v_add_f64 v[78:79], v[54:55], v[72:73]
	v_add_f64 v[76:77], v[72:73], -v[74:75]
	v_add_f64 v[62:63], v[62:63], -v[74:75]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[74:75], v[78:79], -2
	v_add_f64 v[54:55], v[78:79], -v[54:55]
	v_add_f64 v[64:65], v[64:65], -v[76:77]
	v_add_f64 v[76:77], v[80:81], v[60:61]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[74:75]|
	v_add_f64 v[54:55], v[72:73], -v[54:55]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[62:63], v[62:63], v[64:65]
	v_fract_f64_e32 v[64:65], v[74:75]
	v_add_f64 v[72:73], v[76:77], v[62:63]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v65, 0, v65 :: v_dual_cndmask_b32 v64, 0, v64
	v_ldexp_f64 v[64:65], v[64:65], 2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[74:75], v[54:55], v[72:73]
	v_add_f64 v[82:83], v[72:73], -v[76:77]
	v_add_f64 v[78:79], v[74:75], v[64:65]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[88:89], v[72:73], -v[82:83]
	v_add_f64 v[62:63], v[62:63], -v[82:83]
	v_add_f64 v[50:51], v[74:75], -v[54:55]
	v_cmp_gt_f64_e32 vcc_lo, 0, v[78:79]
	v_add_f64 v[78:79], v[76:77], -v[80:81]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[50:51], v[72:73], -v[50:51]
	v_cndmask_b32_e64 v48, 0, 0x40100000, vcc_lo
	v_add_f64 v[86:87], v[76:77], -v[78:79]
	v_add_f64 v[60:61], v[60:61], -v[78:79]
	v_add_f64 v[76:77], v[76:77], -v[88:89]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[64:65], v[64:65], v[47:48]
	v_add_f64 v[78:79], v[80:81], -v[86:87]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[62:63], v[62:63], v[76:77]
	v_add_f64 v[84:85], v[74:75], v[64:65]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[60:61], v[60:61], v[78:79]
	v_cvt_i32_f64_e32 v48, v[84:85]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[54:55], v[60:61], v[62:63]
	v_cvt_f64_i32_e32 v[82:83], v48
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[23:24], v[23:24], v[54:55]
	v_add_f64 v[64:65], v[64:65], -v[82:83]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[23:24], v[50:51], v[23:24]
	v_add_f64 v[60:61], v[74:75], v[64:65]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[54:55], v[60:61], -v[64:65]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[60:61]
	v_add_f64 v[50:51], v[74:75], -v[54:55]
	v_add_co_ci_u32_e64 v67, s0, 0, v48, vcc_lo
	v_cndmask_b32_e64 v48, 0, 0x3ff00000, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[23:24], v[23:24], v[50:51]
	v_add_f64 v[50:51], v[60:61], -v[47:48]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[54:55], v[50:51], v[23:24]
	v_mul_f64 v[60:61], v[54:55], s[8:9]
	v_add_f64 v[50:51], v[54:55], -v[50:51]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[62:63], v[54:55], s[8:9], -v[60:61]
	v_add_f64 v[23:24], v[23:24], -v[50:51]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[50:51], v[54:55], s[10:11], v[62:63]
	v_fma_f64 v[50:51], v[23:24], s[8:9], v[50:51]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[23:24], v[60:61], v[50:51]
	v_add_f64 v[54:55], v[23:24], -v[60:61]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[54:55], v[50:51], -v[54:55]
.LBB3_137:                              ; %Flow1190
                                        ;   in Loop: Header=BB3_131 Depth=2
	s_and_not1_saveexec_b32 s0, s1
	s_cbranch_execz .LBB3_139
; %bb.138:                              ;   in Loop: Header=BB3_131 Depth=2
	v_mul_f64 v[23:24], v[21:22], s[12:13]
	s_mov_b32 s24, s6
	s_mov_b32 s2, s26
	s_mov_b32 s3, s11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[50:51], v[23:24]
	v_fma_f64 v[23:24], v[50:51], s[24:25], v[21:22]
	v_mul_f64 v[54:55], v[50:51], s[26:27]
	v_cvt_i32_f64_e32 v67, v[50:51]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[62:63], v[50:51], s[26:27], v[23:24]
	v_add_f64 v[60:61], v[23:24], v[54:55]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[23:24], v[23:24], -v[60:61]
	v_add_f64 v[60:61], v[60:61], -v[62:63]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[23:24], v[23:24], v[54:55]
	v_fma_f64 v[54:55], v[50:51], s[2:3], v[54:55]
	v_add_f64 v[23:24], v[60:61], v[23:24]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[23:24], v[23:24], -v[54:55]
	v_fma_f64 v[54:55], v[50:51], s[28:29], v[23:24]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[23:24], v[62:63], v[54:55]
	v_add_f64 v[60:61], v[23:24], -v[62:63]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[54:55], v[54:55], -v[60:61]
.LBB3_139:                              ; %_ZL3sind.exit.i.i.7.i295.i
                                        ;   in Loop: Header=BB3_131 Depth=2
	s_or_b32 exec_lo, exec_lo, s0
	v_xor_b32_e32 v43, v43, v56
	v_add_co_u32 v56, vcc_lo, v58, v56
	v_xor_b32_e32 v44, v44, v57
	v_add_co_ci_u32_e32 v57, vcc_lo, v59, v57, vcc_lo
	v_lshlrev_b64 v[50:51], 17, v[41:42]
	v_xor_b32_e32 v41, v43, v41
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_xor_b32_e32 v42, v44, v42
	v_lshrrev_b64 v[56:57], 11, v[56:57]
	s_mov_b32 s71, s31
	s_mov_b32 s72, s30
	v_xor_b32_e32 v48, v44, v51
	v_xor_b32_e32 v50, v43, v50
	v_lshlrev_b64 v[43:44], 17, v[41:42]
	v_cvt_f64_u32_e32 v[57:58], v57
	v_xor_b32_e32 v61, v42, v71
	v_xor_b32_e32 v51, v48, v70
	v_xor_b32_e32 v50, v50, v69
	v_xor_b32_e32 v60, v41, v49
	s_mov_b32 s74, s30
	v_xor_b32_e32 v49, v61, v70
	v_xor_b32_e32 v42, v51, v42
	v_xor_b32_e32 v41, v50, v41
	v_xor_b32_e32 v44, v51, v44
	v_xor_b32_e32 v43, v50, v43
	v_lshrrev_b64 v[50:51], 19, v[60:61]
	v_xor_b32_e32 v48, v60, v69
	v_lshlrev_b32_e32 v60, 13, v60
	v_cmp_lg_f64_e64 s1, 0x7ff00000, v[21:22]
	s_cmp_eq_u32 s77, 4
	v_and_b32_e32 v21, 1, v67
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_or_b32_e32 v51, v60, v51
	v_cvt_f64_u32_e32 v[59:60], v56
	v_cmp_eq_u32_e64 s5, 0, v21
	v_ldexp_f64 v[57:58], v[57:58], 32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[56:57], v[57:58], v[59:60]
	v_ldexp_f64 v[56:57], v[56:57], 0xffffffcb
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_frexp_mant_f64_e32 v[58:59], v[56:57]
	v_cmp_gt_f64_e32 vcc_lo, s[30:31], v[58:59]
	v_cndmask_b32_e64 v60, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[58:59], v[58:59], v60
	v_frexp_exp_i32_f64_e32 v60, v[56:57]
	v_add_f64 v[62:63], v[58:59], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_subrev_co_ci_u32_e32 v75, vcc_lo, 0, v60, vcc_lo
	v_add_f64 v[60:61], v[58:59], -1.0
	v_cmp_eq_f64_e32 vcc_lo, 0x7ff00000, v[56:57]
	v_add_f64 v[64:65], v[62:63], -1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_f64 v[58:59], v[58:59], -v[64:65]
	v_rcp_f64_e32 v[64:65], v[62:63]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[69:70], -v[62:63], v[64:65], 1.0
	v_fma_f64 v[64:65], v[69:70], v[64:65], v[64:65]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[69:70], -v[62:63], v[64:65], 1.0
	v_fma_f64 v[64:65], v[69:70], v[64:65], v[64:65]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[69:70], v[60:61], v[64:65]
	v_mul_f64 v[71:72], v[62:63], v[69:70]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[62:63], v[69:70], v[62:63], -v[71:72]
	v_fma_f64 v[58:59], v[69:70], v[58:59], v[62:63]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[62:63], v[71:72], v[58:59]
	v_add_f64 v[73:74], v[60:61], -v[62:63]
	v_add_f64 v[71:72], v[62:63], -v[71:72]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[60:61], v[60:61], -v[73:74]
	v_add_f64 v[58:59], v[71:72], -v[58:59]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[60:61], v[60:61], -v[62:63]
	v_add_f64 v[58:59], v[58:59], v[60:61]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[58:59], v[73:74], v[58:59]
	v_mul_f64 v[58:59], v[64:65], v[58:59]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[60:61], v[69:70], v[58:59]
	v_add_f64 v[62:63], v[60:61], -v[69:70]
	v_ldexp_f64 v[69:70], v[60:61], 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[58:59], v[58:59], -v[62:63]
	v_mul_f64 v[62:63], v[60:61], v[60:61]
	v_ldexp_f64 v[58:59], v[58:59], 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[64:65], v[62:63], s[36:37], s[34:35]
	v_mul_f64 v[60:61], v[60:61], v[62:63]
	v_fma_f64 v[64:65], v[62:63], v[64:65], s[38:39]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[64:65], v[62:63], v[64:65], s[40:41]
	v_fma_f64 v[64:65], v[62:63], v[64:65], s[42:43]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[64:65], v[62:63], v[64:65], s[44:45]
	v_fma_f64 v[64:65], v[62:63], v[64:65], s[70:71]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[60:61], v[60:61], v[64:65]
	v_add_f64 v[62:63], v[69:70], v[60:61]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[64:65], v[62:63], -v[69:70]
	v_add_f64 v[60:61], v[60:61], -v[64:65]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[58:59], v[58:59], v[60:61]
	v_add_f64 v[60:61], v[62:63], v[58:59]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[62:63], v[60:61], -v[62:63]
	v_add_f64 v[58:59], v[58:59], -v[62:63]
	v_cvt_f64_i32_e32 v[62:63], v75
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[64:65], v[62:63], s[46:47]
	v_fma_f64 v[69:70], v[62:63], s[46:47], -v[64:65]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[62:63], v[62:63], s[48:49], v[69:70]
	v_add_f64 v[69:70], v[64:65], v[62:63]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[64:65], v[69:70], -v[64:65]
	v_add_f64 v[62:63], v[62:63], -v[64:65]
	v_add_f64 v[64:65], v[69:70], v[60:61]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[71:72], v[64:65], -v[69:70]
	v_add_f64 v[73:74], v[64:65], -v[71:72]
	v_add_f64 v[60:61], v[60:61], -v[71:72]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[69:70], v[69:70], -v[73:74]
	v_add_f64 v[60:61], v[60:61], v[69:70]
	v_add_f64 v[69:70], v[62:63], v[58:59]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[71:72], v[69:70], -v[62:63]
	v_add_f64 v[60:61], v[69:70], v[60:61]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[73:74], v[69:70], -v[71:72]
	v_add_f64 v[58:59], v[58:59], -v[71:72]
	v_add_f64 v[62:63], v[62:63], -v[73:74]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[58:59], v[58:59], v[62:63]
	v_add_f64 v[62:63], v[64:65], v[60:61]
	v_add_f64 v[64:65], v[62:63], -v[64:65]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[60:61], v[60:61], -v[64:65]
	v_add_f64 v[58:59], v[58:59], v[60:61]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[58:59], v[62:63], v[58:59]
	v_dual_cndmask_b32 v59, v59, v57 :: v_dual_cndmask_b32 v58, v58, v56
	v_cmp_ngt_f64_e32 vcc_lo, 0, v[56:57]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[58:59], v[58:59], -2.0
	v_cndmask_b32_e32 v59, 0x7ff80000, v59, vcc_lo
	v_cmp_nge_f64_e32 vcc_lo, 0, v[56:57]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_cndmask_b32_e32 v58, 0, v58, vcc_lo
	v_cmp_neq_f64_e32 vcc_lo, 0, v[56:57]
	v_cndmask_b32_e32 v59, 0x7ff00000, v59, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[58:59]
	v_cndmask_b32_e64 v56, 0, 1, vcc_lo
	v_lshlrev_b32_e32 v56, 8, v56
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[56:57], v[58:59], v56
	v_rsq_f64_e32 v[58:59], v[56:57]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[60:61], v[56:57], v[58:59]
	v_mul_f64 v[58:59], v[58:59], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[62:63], -v[58:59], v[60:61], 0.5
	v_fma_f64 v[60:61], v[60:61], v[62:63], v[60:61]
	v_fma_f64 v[58:59], v[58:59], v[62:63], v[58:59]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[64:65], -v[60:61], v[60:61], v[56:57]
	v_fma_f64 v[60:61], v[64:65], v[58:59], v[60:61]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[62:63], -v[60:61], v[60:61], v[56:57]
	v_fma_f64 v[58:59], v[62:63], v[58:59], v[60:61]
	v_cndmask_b32_e64 v60, 0, 0xffffff80, vcc_lo
	v_cmp_class_f64_e64 vcc_lo, v[56:57], 0x260
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[58:59], v[58:59], v60
	v_dual_cndmask_b32 v57, v59, v57 :: v_dual_cndmask_b32 v56, v58, v56
	v_mul_f64 v[58:59], v[25:26], v[25:26]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[60:61], v[58:59], 0.5
	v_fma_f64 v[69:70], v[58:59], s[52:53], s[50:51]
	v_add_f64 v[62:63], -v[60:61], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[69:70], v[58:59], v[69:70], s[54:55]
	v_add_f64 v[64:65], -v[62:63], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[69:70], v[58:59], v[69:70], s[56:57]
	v_add_f64 v[60:61], v[64:65], -v[60:61]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[69:70], v[58:59], v[69:70], s[58:59]
	v_mul_f64 v[64:65], v[58:59], v[58:59]
	v_fma_f64 v[60:61], v[25:26], -v[52:53], v[60:61]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[69:70], v[58:59], v[69:70], s[72:73]
	v_fma_f64 v[60:61], v[64:65], v[69:70], v[60:61]
	v_mul_f64 v[64:65], v[25:26], -v[58:59]
	v_mul_f64 v[69:70], v[52:53], 0.5
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[60:61], v[62:63], v[60:61]
	v_fma_f64 v[62:63], v[58:59], s[62:63], s[60:61]
	v_fma_f64 v[62:63], v[58:59], v[62:63], s[64:65]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[62:63], v[58:59], v[62:63], s[66:67]
	v_fma_f64 v[62:63], v[58:59], v[62:63], s[68:69]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[62:63], v[64:65], v[62:63], v[69:70]
	v_fma_f64 v[52:53], v[58:59], v[62:63], -v[52:53]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[52:53], v[64:65], s[74:75], v[52:53]
	v_add_f64 v[25:26], v[25:26], -v[52:53]
	v_and_b32_e32 v52, 1, v68
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_eq_u32_e32 vcc_lo, 0, v52
	v_xor_b32_e32 v26, 0x80000000, v26
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v25, v25, v60 :: v_dual_cndmask_b32 v26, v26, v61
	s_cselect_b32 vcc_lo, -1, 0
	v_lshlrev_b32_e32 v52, 30, v68
	v_cndmask_b32_e64 v25, 0, v25, s1
	s_cmp_eq_u32 s77, 3
	s_cselect_b32 s0, -1, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_and_b32_e32 v52, 0x80000000, v52
	s_cmp_eq_u32 s77, 2
	s_cselect_b32 s2, -1, 0
	s_cmp_eq_u32 s77, 1
	v_xor_b32_e32 v26, v26, v52
	s_cselect_b32 s3, -1, 0
	s_cmp_eq_u32 s77, 0
	s_cselect_b32 s4, -1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cndmask_b32_e64 v26, 0x7ff80000, v26, s1
	s_add_i32 s77, s77, 1
	s_cmp_lg_u32 s77, 5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[25:26], v[56:57], v[25:26]
	v_dual_cndmask_b32 v20, v20, v26 :: v_dual_cndmask_b32 v19, v19, v25
	v_cndmask_b32_e64 v18, v18, v26, s0
	v_cndmask_b32_e64 v17, v17, v25, s0
	v_cndmask_b32_e64 v16, v16, v26, s2
	v_cndmask_b32_e64 v15, v15, v25, s2
	v_cndmask_b32_e64 v14, v14, v26, s3
	v_cndmask_b32_e64 v13, v13, v25, s3
	v_cndmask_b32_e64 v12, v12, v26, s4
	v_cndmask_b32_e64 v11, v11, v25, s4
	v_mul_f64 v[25:26], v[23:24], v[23:24]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[52:53], v[25:26], 0.5
	v_fma_f64 v[62:63], v[25:26], s[52:53], s[50:51]
	v_add_f64 v[58:59], -v[52:53], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[62:63], v[25:26], v[62:63], s[54:55]
	v_add_f64 v[60:61], -v[58:59], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[62:63], v[25:26], v[62:63], s[56:57]
	v_add_f64 v[52:53], v[60:61], -v[52:53]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[62:63], v[25:26], v[62:63], s[58:59]
	v_mul_f64 v[60:61], v[25:26], v[25:26]
	v_fma_f64 v[52:53], v[23:24], -v[54:55], v[52:53]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[62:63], v[25:26], v[62:63], s[72:73]
	v_fma_f64 v[52:53], v[60:61], v[62:63], v[52:53]
	v_mul_f64 v[60:61], v[23:24], -v[25:26]
	v_mul_f64 v[62:63], v[54:55], 0.5
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[52:53], v[58:59], v[52:53]
	v_fma_f64 v[58:59], v[25:26], s[62:63], s[60:61]
	v_fma_f64 v[58:59], v[25:26], v[58:59], s[64:65]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[58:59], v[25:26], v[58:59], s[66:67]
	v_fma_f64 v[58:59], v[25:26], v[58:59], s[68:69]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[58:59], v[60:61], v[58:59], v[62:63]
	v_fma_f64 v[25:26], v[25:26], v[58:59], -v[54:55]
	v_dual_mov_b32 v59, v51 :: v_dual_mov_b32 v58, v50
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[25:26], v[60:61], s[74:75], v[25:26]
	v_add_f64 v[23:24], v[23:24], -v[25:26]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v21, v52, v23, s5
	v_cndmask_b32_e64 v23, v53, v24, s5
	v_lshlrev_b32_e32 v24, 30, v67
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v21, 0, v21, s1
	v_xor_b32_e32 v22, v24, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v22, 0x80000000, v22
	v_xor_b32_e32 v22, v23, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v22, 0x7ff80000, v22, s1
	v_mul_f64 v[21:22], v[56:57], v[21:22]
	v_dual_mov_b32 v57, v49 :: v_dual_mov_b32 v56, v48
	s_delay_alu instid0(VALU_DEP_2)
	v_dual_cndmask_b32 v10, v10, v22 :: v_dual_cndmask_b32 v9, v9, v21
	v_cndmask_b32_e64 v8, v8, v22, s0
	v_cndmask_b32_e64 v7, v7, v21, s0
	v_cndmask_b32_e64 v6, v6, v22, s2
	v_cndmask_b32_e64 v5, v5, v21, s2
	v_cndmask_b32_e64 v4, v4, v22, s3
	v_cndmask_b32_e64 v3, v3, v21, s3
	v_cndmask_b32_e64 v2, v2, v22, s4
	v_cndmask_b32_e64 v1, v1, v21, s4
	s_cbranch_scc1 .LBB3_131
; %bb.140:                              ; %.lr.ph.i.i.7.i302.i.preheader
                                        ;   in Loop: Header=BB3_130 Depth=1
	v_mov_b32_e32 v21, 0
	v_mov_b32_e32 v22, 0
	s_mov_b32 s3, 0
.LBB3_141:                              ; %.lr.ph.i.i.7.i302.i
                                        ;   Parent Loop BB3_130 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB3_142 Depth 3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s3, 1
	s_mov_b32 s4, s3
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s3, 2
	v_dual_cndmask_b32 v23, v12, v14 :: v_dual_cndmask_b32 v24, v11, v13
	v_dual_cndmask_b32 v25, v2, v4 :: v_dual_cndmask_b32 v26, v1, v3
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s3, 3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v23, v23, v16 :: v_dual_cndmask_b32 v24, v24, v15
	v_dual_cndmask_b32 v25, v25, v6 :: v_dual_cndmask_b32 v26, v26, v5
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s3, 4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v23, v23, v18 :: v_dual_cndmask_b32 v52, v24, v17
	v_cndmask_b32_e32 v25, v25, v8, vcc_lo
	v_cndmask_b32_e32 v53, v26, v7, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_cndmask_b32 v24, v23, v20 :: v_dual_cndmask_b32 v23, v52, v19
	v_cndmask_b32_e32 v26, v25, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_cndmask_b32_e32 v25, v53, v9, vcc_lo
.LBB3_142:                              ;   Parent Loop BB3_130 Depth=1
                                        ;     Parent Loop BB3_141 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_add_i32 s4, s4, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s4, 1
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s4, 2
	v_dual_cndmask_b32 v52, v12, v14 :: v_dual_cndmask_b32 v53, v2, v4
	v_cndmask_b32_e32 v54, v1, v3, vcc_lo
	s_cselect_b32 s0, -1, 0
	s_cmp_eq_u32 s4, 3
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e64 v52, v52, v16, s0
	v_cndmask_b32_e64 v53, v53, v6, s0
	v_cndmask_b32_e64 v54, v54, v5, s0
	s_cselect_b32 s1, -1, 0
	s_cmp_eq_u32 s4, 4
	v_cndmask_b32_e64 v52, v52, v18, s1
	v_cndmask_b32_e64 v55, v53, v8, s1
	v_cndmask_b32_e64 v54, v54, v7, s1
	s_cselect_b32 s2, -1, 0
	s_cmp_lt_u32 s4, 4
	v_cndmask_b32_e64 v53, v52, v20, s2
	v_cndmask_b32_e64 v55, v55, v10, s2
	v_cndmask_b32_e64 v54, v54, v9, s2
	v_cndmask_b32_e32 v52, v11, v13, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[54:55], v[25:26], -v[54:55]
	v_cndmask_b32_e64 v52, v52, v15, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v52, v52, v17, s1
	v_cndmask_b32_e64 v52, v52, v19, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[52:53], v[23:24], -v[52:53]
	v_mul_f64 v[54:55], v[54:55], v[54:55]
	v_fma_f64 v[52:53], v[52:53], v[52:53], v[54:55]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_lt_f64_e32 vcc_lo, v[21:22], v[52:53]
	v_dual_cndmask_b32 v22, v22, v53 :: v_dual_cndmask_b32 v21, v21, v52
	s_cbranch_scc1 .LBB3_142
; %bb.143:                              ; %.loopexit.i.i.7.i308.i
                                        ;   in Loop: Header=BB3_141 Depth=2
	s_add_i32 s3, s3, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s3, 4
	s_cbranch_scc1 .LBB3_141
; %bb.144:                              ;   in Loop: Header=BB3_130 Depth=1
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[21:22]
	s_add_i32 s76, s76, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	s_cmp_lg_u32 s76, 0x10000
	v_cndmask_b32_e64 v23, 0, 1, vcc_lo
	v_lshlrev_b32_e32 v23, 8, v23
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[21:22], v[21:22], v23
	v_rsq_f64_e32 v[23:24], v[21:22]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[25:26], v[21:22], v[23:24]
	v_mul_f64 v[23:24], v[23:24], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[52:53], -v[23:24], v[25:26], 0.5
	v_fma_f64 v[25:26], v[25:26], v[52:53], v[25:26]
	v_fma_f64 v[23:24], v[23:24], v[52:53], v[23:24]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[52:53], -v[25:26], v[25:26], v[21:22]
	v_fma_f64 v[25:26], v[52:53], v[23:24], v[25:26]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[52:53], -v[25:26], v[25:26], v[21:22]
	v_fma_f64 v[23:24], v[52:53], v[23:24], v[25:26]
	v_cndmask_b32_e64 v25, 0, 0xffffff80, vcc_lo
	v_cmp_class_f64_e64 vcc_lo, v[21:22], 0x260
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[23:24], v[23:24], v25
	v_dual_cndmask_b32 v22, v24, v22 :: v_dual_cndmask_b32 v21, v23, v21
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[45:46], v[45:46], v[21:22]
	s_cbranch_scc1 .LBB3_130
; %bb.145:                              ; %_ZN7rocprim25block_load_direct_stripedILj256EN6thrust11hip_rocprim26transform_input_iterator_tIdNS1_17counting_iteratorIjNS1_11use_defaultES5_S5_EE11estimate_esEEdLj8EEEvjT0_RAT2__T1_.exit.i
	v_ldexp_f64 v[1:2], v[29:30], -16
	s_mov_b32 s0, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[1:2], 0x3ef00000, v[27:28], v[1:2]
	v_fma_f64 v[1:2], 0x3ef00000, v[31:32], v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[1:2], 0x3ef00000, v[33:34], v[1:2]
	v_fma_f64 v[1:2], 0x3ef00000, v[35:36], v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[1:2], 0x3ef00000, v[37:38], v[1:2]
	v_fma_f64 v[1:2], 0x3ef00000, v[39:40], v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[1:2], 0x3ef00000, v[45:46], v[1:2]
	v_mov_b32_dpp v3, v1 quad_perm:[1,0,3,2] row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_dpp v4, v2 quad_perm:[1,0,3,2] row_mask:0xf bank_mask:0xf
	v_add_f64 v[1:2], v[1:2], v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mov_b32_dpp v3, v1 quad_perm:[2,3,0,1] row_mask:0xf bank_mask:0xf
	v_mov_b32_dpp v4, v2 quad_perm:[2,3,0,1] row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[1:2], v[1:2], v[3:4]
	v_mov_b32_dpp v3, v1 row_shr:4 row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_dpp v4, v2 row_shr:4 row_mask:0xf bank_mask:0xf
	v_add_f64 v[1:2], v[1:2], v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mov_b32_dpp v3, v1 row_shr:8 row_mask:0xf bank_mask:0xf
	v_mov_b32_dpp v4, v2 row_shr:8 row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[1:2], v[1:2], v[3:4]
	ds_swizzle_b32 v3, v1 offset:swizzle(BROADCAST,32,15)
	ds_swizzle_b32 v4, v2 offset:swizzle(BROADCAST,32,15)
	s_waitcnt lgkmcnt(0)
	v_add_f64 v[1:2], v[1:2], v[3:4]
	v_mov_b32_e32 v3, 0
	ds_bpermute_b32 v1, v3, v1 offset:124
	ds_bpermute_b32 v2, v3, v2 offset:124
	v_mbcnt_lo_u32_b32 v3, -1, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v3
	s_cbranch_execz .LBB3_147
; %bb.146:
	v_lshrrev_b32_e32 v4, 2, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v4, 56, v4
	s_waitcnt lgkmcnt(0)
	ds_store_b64 v4, v[1:2]
.LBB3_147:
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmpx_gt_u32_e32 8, v0
	s_cbranch_execz .LBB3_149
; %bb.148:
	v_lshlrev_b32_e32 v1, 3, v3
	v_lshlrev_b32_e32 v3, 2, v3
	ds_load_b64 v[1:2], v1
	v_or_b32_e32 v3, 28, v3
	s_waitcnt lgkmcnt(0)
	v_mov_b32_dpp v4, v1 quad_perm:[1,0,3,2] row_mask:0xf bank_mask:0xf
	v_mov_b32_dpp v5, v2 quad_perm:[1,0,3,2] row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[1:2], v[1:2], v[4:5]
	v_mov_b32_dpp v4, v1 quad_perm:[2,3,0,1] row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_dpp v5, v2 quad_perm:[2,3,0,1] row_mask:0xf bank_mask:0xf
	v_add_f64 v[1:2], v[1:2], v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mov_b32_dpp v4, v1 row_shr:4 row_mask:0xf bank_mask:0xf
	v_mov_b32_dpp v5, v2 row_shr:4 row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[1:2], v[1:2], v[4:5]
	ds_bpermute_b32 v1, v3, v1
	ds_bpermute_b32 v2, v3, v2
.LBB3_149:                              ; %Flow
	s_or_b32 exec_lo, exec_lo, s0
	s_mov_b32 s0, 0
	s_branch .LBB3_151
.LBB3_150:
	s_mov_b32 s0, -1
                                        ; implicit-def: $vgpr1_vgpr2
.LBB3_151:                              ; %Flow1232
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccz .LBB3_333
; %bb.152:
	s_sub_i32 s33, s14, s33
	s_mov_b32 s76, exec_lo
                                        ; implicit-def: $vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16
	v_cmpx_gt_u32_e64 s33, v0
	s_cbranch_execz .LBB3_172
; %bb.153:
	s_waitcnt lgkmcnt(1)
	v_lshlrev_b32_e32 v1, 12, v66
	s_mov_b64 s[4:5], 0
                                        ; implicit-def: $vgpr34_vgpr35
                                        ; implicit-def: $vgpr27_vgpr28
                                        ; implicit-def: $vgpr29_vgpr30
                                        ; implicit-def: $vgpr36_vgpr37
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add3_u32 v1, v66, v1, 0x7ed55d16
	s_waitcnt lgkmcnt(0)
	v_lshrrev_b32_e32 v2, 19, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor3_b32 v1, v1, v2, 0xc761c23c
	v_lshl_add_u32 v1, v1, 5, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v2, 0xe9f8cc1d, v1
	v_lshl_add_u32 v1, v1, 9, 0xaccf6200
	v_xor_b32_e32 v1, v2, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v2, 3, v1
	v_add3_u32 v1, v1, v2, 0xfd7046c5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v2, 16, v1
	v_xor3_b32 v1, v1, v2, 0xb55a4f09
.LBB3_154:                              ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v2, 12, v1
	s_cmp_eq_u32 s4, 0
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s4, 1
	v_add3_u32 v1, v1, v2, 0x7ed55d16
	s_cselect_b32 s0, -1, 0
	s_cmp_eq_u32 s4, 2
	s_cselect_b32 s1, -1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v2, 19, v1
	s_cmp_eq_u32 s4, 3
	s_cselect_b32 s2, -1, 0
	s_add_u32 s4, s4, 1
	v_xor3_b32 v1, v1, v2, 0xc761c23c
	s_addc_u32 s5, s5, 0
	s_cmp_lg_u32 s4, 4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v1, v1, 5, v1
	v_add_nc_u32_e32 v2, 0xe9f8cc1d, v1
	v_lshl_add_u32 v1, v1, 9, 0xaccf6200
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v1, v2, v1
	v_lshlrev_b32_e32 v2, 3, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v1, v1, v2, 0xfd7046c5
	v_lshrrev_b32_e32 v2, 16, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor3_b32 v1, v1, v2, 0xb55a4f09
	v_lshlrev_b32_e32 v3, 12, v1
	v_xor_b32_e32 v2, s23, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add3_u32 v1, v1, v3, 0x7ed55d16
	v_cndmask_b32_e32 v35, v35, v2, vcc_lo
	v_cndmask_b32_e64 v28, v28, v2, s0
	v_cndmask_b32_e64 v30, v30, v2, s1
	v_cndmask_b32_e64 v37, v37, v2, s2
	v_lshrrev_b32_e32 v3, 19, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor3_b32 v1, v1, v3, 0xc761c23c
	v_lshl_add_u32 v1, v1, 5, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v3, 0xe9f8cc1d, v1
	v_lshl_add_u32 v1, v1, 9, 0xaccf6200
	v_xor_b32_e32 v1, v3, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v3, 3, v1
	v_add3_u32 v1, v1, v3, 0xfd7046c5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v3, 16, v1
	v_xor3_b32 v1, v1, v3, 0xb55a4f09
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v2, s22, v1
	v_cndmask_b32_e32 v34, v34, v2, vcc_lo
	v_cndmask_b32_e64 v27, v27, v2, s0
	v_cndmask_b32_e64 v29, v29, v2, s1
	v_cndmask_b32_e64 v36, v36, v2, s2
	s_cbranch_scc1 .LBB3_154
; %bb.155:                              ; %.preheader55.i.i.i.i.preheader
	v_mov_b32_e32 v31, 0
	v_dual_mov_b32 v32, 0 :: v_dual_mov_b32 v33, 0
	s_mov_b32 s4, 0x54442d18
	s_mov_b32 s12, 0x6dc9c883
	s_mov_b32 s26, 0x33145c00
	s_mov_b32 s28, 0x252049c0
	s_mov_b32 s30, 0x55555555
	s_mov_b32 s34, 0x6b47b09a
	s_mov_b32 s36, 0xbf559e2b
	s_mov_b32 s38, 0xd7f4df2e
	s_mov_b32 s40, 0x16291751
	s_mov_b32 s42, 0x9b27acf1
	s_mov_b32 s44, 0x998ef7b6
	s_mov_b32 s46, 0xfefa39ef
	s_mov_b32 s48, 0x3b39803f
	s_mov_b32 s50, 0x9037ab78
	s_mov_b32 s52, 0x46cc5e42
	s_mov_b32 s54, 0xa17f65f6
	s_mov_b32 s56, 0x19f4ec90
	s_mov_b32 s58, 0x16c16967
	s_mov_b32 s60, 0xb42fdfa7
	s_mov_b32 s62, 0xf9a43bb8
	s_mov_b32 s64, 0x796cde01
	s_mov_b32 s66, 0x19e83e5c
	s_mov_b32 s68, 0x11110bb3
	s_mov_b32 s77, 0
	s_mov_b32 s5, 0x401921fb
	s_mov_b32 s7, 0x3ff921fb
	s_mov_b32 s9, 0x3c91a626
	s_mov_b32 s10, 0x33145c07
	s_mov_b32 s13, 0x3fe45f30
	s_mov_b32 s25, 0xbff921fb
	s_mov_b32 s27, 0xbc91a626
	s_mov_b32 s29, 0xb97b839a
	s_mov_b32 s31, 0x3fe55555
	s_mov_b32 s35, 0x3fc38538
	s_mov_b32 s37, 0x3fc3ab76
	s_mov_b32 s39, 0x3fc7474d
	s_mov_b32 s41, 0x3fcc71c0
	s_mov_b32 s43, 0x3fd24924
	s_mov_b32 s45, 0x3fd99999
	s_mov_b32 s47, 0x3fe62e42
	s_mov_b32 s49, 0x3c7abc9e
	s_mov_b32 s51, 0x3e21eeb6
	s_mov_b32 s53, 0xbda907db
	s_mov_b32 s55, 0xbe927e4f
	s_mov_b32 s57, 0x3efa01a0
	s_mov_b32 s59, 0xbf56c16c
	s_mov_b32 s61, 0xbe5ae600
	s_mov_b32 s63, 0x3de5e0b2
	s_mov_b32 s65, 0x3ec71de3
	s_mov_b32 s67, 0xbf2a01a0
	s_mov_b32 s69, 0x3f811111
	s_mov_b32 s70, 0x55555780
	s_mov_b32 s73, 0x3fa55555
	s_mov_b32 s75, 0xbfc55555
                                        ; implicit-def: $vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16
                                        ; implicit-def: $vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26
.LBB3_156:                              ; %.preheader55.i.i.i.i
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB3_157 Depth 2
                                        ;     Child Loop BB3_167 Depth 2
                                        ;       Child Loop BB3_168 Depth 3
	v_dual_mov_b32 v21, v34 :: v_dual_mov_b32 v22, v35
	v_dual_mov_b32 v40, v37 :: v_dual_mov_b32 v39, v36
	s_mov_b32 s78, 0
.LBB3_157:                              ;   Parent Loop BB3_156 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v35, v28, v40
	v_xor_b32_e32 v34, v27, v39
                                        ; implicit-def: $vgpr55
                                        ; implicit-def: $vgpr37_vgpr38
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v53, v35, v22
	v_lshrrev_b64 v[23:24], 19, v[34:35]
	v_lshlrev_b32_e32 v25, 13, v34
	v_xor_b32_e32 v26, v34, v21
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_or_b32_e32 v54, v25, v24
	v_add_co_u32 v24, vcc_lo, v23, v26
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v25, vcc_lo, v54, v53, vcc_lo
	v_lshrrev_b64 v[24:25], 11, v[24:25]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_u32_e32 v[34:35], v25
	v_cvt_f64_u32_e32 v[24:25], v24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[34:35], v[34:35], 32
	v_add_f64 v[24:25], v[34:35], v[24:25]
                                        ; implicit-def: $vgpr35_vgpr36
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[24:25], v[24:25], 0xffffffcb
	v_mul_f64 v[24:25], v[24:25], s[4:5]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ngt_f64_e32 vcc_lo, 0x41d00000, v[24:25]
	v_trig_preop_f64 v[49:50], v[24:25], 0
	v_trig_preop_f64 v[47:48], v[24:25], 1
	v_ldexp_f64 v[51:52], v[24:25], 0xffffff80
	v_trig_preop_f64 v[45:46], v[24:25], 2
	s_and_saveexec_b32 s0, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s2, exec_lo, s0
	s_cbranch_execz .LBB3_159
; %bb.158:                              ;   in Loop: Header=BB3_157 Depth=2
	v_cmp_le_f64_e64 s0, 0x7b000000, v[24:25]
	s_mov_b32 s6, s4
	s_mov_b32 s11, s9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v36, v25, v52, s0
	v_cndmask_b32_e64 v35, v24, v51, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_f64 v[37:38], v[49:50], v[35:36]
	v_mul_f64 v[41:42], v[47:48], v[35:36]
	v_mul_f64 v[63:64], v[45:46], v[35:36]
	v_fma_f64 v[43:44], v[49:50], v[35:36], -v[37:38]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[67:68], v[47:48], v[35:36], -v[41:42]
	v_add_f64 v[55:56], v[41:42], v[43:44]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[57:58], v[55:56], -v[41:42]
	v_add_f64 v[61:62], v[37:38], v[55:56]
	v_add_f64 v[59:60], v[55:56], -v[57:58]
	v_add_f64 v[43:44], v[43:44], -v[57:58]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[57:58], v[61:62], -2
	v_add_f64 v[37:38], v[61:62], -v[37:38]
	v_add_f64 v[41:42], v[41:42], -v[59:60]
	v_add_f64 v[59:60], v[63:64], v[67:68]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cmp_neq_f64_e64 s0, 0x7ff00000, |v[57:58]|
	v_add_f64 v[37:38], v[55:56], -v[37:38]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[41:42], v[43:44], v[41:42]
	v_fract_f64_e32 v[43:44], v[57:58]
	v_add_f64 v[55:56], v[59:60], v[41:42]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v44, 0, v44, s0
	v_cndmask_b32_e64 v43, 0, v43, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[43:44], v[43:44], 2
	v_add_f64 v[57:58], v[37:38], v[55:56]
	v_add_f64 v[69:70], v[55:56], -v[59:60]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[61:62], v[57:58], v[43:44]
	v_add_f64 v[75:76], v[55:56], -v[69:70]
	v_add_f64 v[41:42], v[41:42], -v[69:70]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cmp_gt_f64_e64 s0, 0, v[61:62]
	v_add_f64 v[61:62], v[59:60], -v[63:64]
	v_cndmask_b32_e64 v34, 0, 0x40100000, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[73:74], v[59:60], -v[61:62]
	v_add_f64 v[61:62], v[67:68], -v[61:62]
	v_add_f64 v[59:60], v[59:60], -v[75:76]
	v_add_f64 v[43:44], v[43:44], v[33:34]
	v_fma_f64 v[34:35], v[45:46], v[35:36], -v[63:64]
	v_add_f64 v[36:37], v[57:58], -v[37:38]
	v_add_f64 v[67:68], v[63:64], -v[73:74]
	v_add_f64 v[41:42], v[41:42], v[59:60]
	v_add_f64 v[71:72], v[57:58], v[43:44]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[36:37], v[55:56], -v[36:37]
	v_add_f64 v[61:62], v[61:62], v[67:68]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_i32_f64_e32 v65, v[71:72]
	v_add_f64 v[41:42], v[61:62], v[41:42]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_i32_e32 v[69:70], v65
	v_add_f64 v[34:35], v[34:35], v[41:42]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[43:44], v[43:44], -v[69:70]
	v_add_f64 v[35:36], v[36:37], v[34:35]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[59:60], v[57:58], v[43:44]
	v_add_f64 v[41:42], v[59:60], -v[43:44]
	v_cmp_le_f64_e64 s0, 0.5, v[59:60]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[37:38], v[57:58], -v[41:42]
	v_cndmask_b32_e64 v34, 0, 0x3ff00000, s0
	v_add_co_ci_u32_e64 v55, s1, 0, v65, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[35:36], v[35:36], v[37:38]
	v_add_f64 v[37:38], v[59:60], -v[33:34]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[41:42], v[37:38], v[35:36]
	v_mul_f64 v[43:44], v[41:42], s[6:7]
	v_add_f64 v[37:38], v[41:42], -v[37:38]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[56:57], v[41:42], s[6:7], -v[43:44]
	v_add_f64 v[34:35], v[35:36], -v[37:38]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[36:37], v[41:42], s[10:11], v[56:57]
	v_fma_f64 v[37:38], v[34:35], s[6:7], v[36:37]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[35:36], v[43:44], v[37:38]
	v_add_f64 v[41:42], v[35:36], -v[43:44]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[37:38], v[37:38], -v[41:42]
.LBB3_159:                              ; %Flow1230
                                        ;   in Loop: Header=BB3_157 Depth=2
	s_and_not1_saveexec_b32 s0, s2
	s_cbranch_execz .LBB3_161
; %bb.160:                              ;   in Loop: Header=BB3_157 Depth=2
	v_mul_f64 v[34:35], v[24:25], s[12:13]
	s_mov_b32 s24, s4
	s_mov_b32 s8, s26
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[41:42], v[34:35]
	v_fma_f64 v[34:35], v[41:42], s[24:25], v[24:25]
	v_mul_f64 v[36:37], v[41:42], s[26:27]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[55:56], v[41:42], s[26:27], v[34:35]
	v_add_f64 v[43:44], v[34:35], v[36:37]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[34:35], v[34:35], -v[43:44]
	v_add_f64 v[43:44], v[43:44], -v[55:56]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[34:35], v[34:35], v[36:37]
	v_fma_f64 v[36:37], v[41:42], s[8:9], v[36:37]
	v_add_f64 v[34:35], v[43:44], v[34:35]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[34:35], v[34:35], -v[36:37]
	v_fma_f64 v[37:38], v[41:42], s[28:29], v[34:35]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[35:36], v[55:56], v[37:38]
	v_add_f64 v[43:44], v[35:36], -v[55:56]
	v_cvt_i32_f64_e32 v55, v[41:42]
	s_delay_alu instid0(VALU_DEP_2)
	v_add_f64 v[37:38], v[37:38], -v[43:44]
.LBB3_161:                              ; %_ZL3cosd.exit.i.i.i.i
                                        ;   in Loop: Header=BB3_157 Depth=2
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $vgpr56
                                        ; implicit-def: $vgpr41_vgpr42
                                        ; implicit-def: $vgpr43_vgpr44
	s_and_saveexec_b32 s0, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s1, exec_lo, s0
	s_cbranch_execz .LBB3_163
; %bb.162:                              ;   in Loop: Header=BB3_157 Depth=2
	v_cmp_le_f64_e32 vcc_lo, 0x7b000000, v[24:25]
	s_mov_b32 s6, s4
	s_mov_b32 s11, s9
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v42, v25, v52 :: v_dual_cndmask_b32 v41, v24, v51
	v_mul_f64 v[43:44], v[49:50], v[41:42]
	v_mul_f64 v[51:52], v[47:48], v[41:42]
	v_mul_f64 v[64:65], v[45:46], v[41:42]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[49:50], v[49:50], v[41:42], -v[43:44]
	v_fma_f64 v[47:48], v[47:48], v[41:42], -v[51:52]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[41:42], v[45:46], v[41:42], -v[64:65]
	v_add_f64 v[56:57], v[51:52], v[49:50]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[58:59], v[56:57], -v[51:52]
	v_add_f64 v[62:63], v[43:44], v[56:57]
	v_add_f64 v[60:61], v[56:57], -v[58:59]
	v_add_f64 v[49:50], v[49:50], -v[58:59]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[58:59], v[62:63], -2
	v_add_f64 v[43:44], v[62:63], -v[43:44]
	v_add_f64 v[51:52], v[51:52], -v[60:61]
	v_add_f64 v[60:61], v[64:65], v[47:48]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[58:59]|
	v_add_f64 v[43:44], v[56:57], -v[43:44]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[49:50], v[49:50], v[51:52]
	v_fract_f64_e32 v[51:52], v[58:59]
	v_add_f64 v[56:57], v[60:61], v[49:50]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v52, 0, v52 :: v_dual_cndmask_b32 v51, 0, v51
	v_ldexp_f64 v[51:52], v[51:52], 2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[58:59], v[43:44], v[56:57]
	v_add_f64 v[67:68], v[56:57], -v[60:61]
	v_add_f64 v[62:63], v[58:59], v[51:52]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[73:74], v[56:57], -v[67:68]
	v_add_f64 v[49:50], v[49:50], -v[67:68]
	v_add_f64 v[43:44], v[58:59], -v[43:44]
	v_cmp_gt_f64_e32 vcc_lo, 0, v[62:63]
	v_add_f64 v[62:63], v[60:61], -v[64:65]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[43:44], v[56:57], -v[43:44]
	v_cndmask_b32_e64 v34, 0, 0x40100000, vcc_lo
	v_add_f64 v[71:72], v[60:61], -v[62:63]
	v_add_f64 v[47:48], v[47:48], -v[62:63]
	v_add_f64 v[60:61], v[60:61], -v[73:74]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[51:52], v[51:52], v[33:34]
	v_add_f64 v[62:63], v[64:65], -v[71:72]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[49:50], v[49:50], v[60:61]
	v_add_f64 v[69:70], v[58:59], v[51:52]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[47:48], v[47:48], v[62:63]
	v_cvt_i32_f64_e32 v34, v[69:70]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[45:46], v[47:48], v[49:50]
	v_cvt_f64_i32_e32 v[67:68], v34
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[41:42], v[41:42], v[45:46]
	v_add_f64 v[51:52], v[51:52], -v[67:68]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[41:42], v[43:44], v[41:42]
	v_add_f64 v[47:48], v[58:59], v[51:52]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[45:46], v[47:48], -v[51:52]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[47:48]
	v_add_f64 v[43:44], v[58:59], -v[45:46]
	v_add_co_ci_u32_e64 v56, s0, 0, v34, vcc_lo
	v_cndmask_b32_e64 v34, 0, 0x3ff00000, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[41:42], v[41:42], v[43:44]
	v_add_f64 v[43:44], v[47:48], -v[33:34]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[45:46], v[43:44], v[41:42]
	v_mul_f64 v[47:48], v[45:46], s[6:7]
	v_add_f64 v[43:44], v[45:46], -v[43:44]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[49:50], v[45:46], s[6:7], -v[47:48]
	v_add_f64 v[41:42], v[41:42], -v[43:44]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[43:44], v[45:46], s[10:11], v[49:50]
	v_fma_f64 v[43:44], v[41:42], s[6:7], v[43:44]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[41:42], v[47:48], v[43:44]
	v_add_f64 v[45:46], v[41:42], -v[47:48]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[43:44], v[43:44], -v[45:46]
.LBB3_163:                              ; %Flow1229
                                        ;   in Loop: Header=BB3_157 Depth=2
	s_and_not1_saveexec_b32 s0, s1
	s_cbranch_execz .LBB3_165
; %bb.164:                              ;   in Loop: Header=BB3_157 Depth=2
	v_mul_f64 v[41:42], v[24:25], s[12:13]
	s_mov_b32 s24, s4
	s_mov_b32 s8, s26
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[45:46], v[41:42]
	v_fma_f64 v[41:42], v[45:46], s[24:25], v[24:25]
	v_mul_f64 v[43:44], v[45:46], s[26:27]
	v_cvt_i32_f64_e32 v56, v[45:46]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[49:50], v[45:46], s[26:27], v[41:42]
	v_add_f64 v[47:48], v[41:42], v[43:44]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[41:42], v[41:42], -v[47:48]
	v_add_f64 v[47:48], v[47:48], -v[49:50]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[41:42], v[41:42], v[43:44]
	v_fma_f64 v[43:44], v[45:46], s[8:9], v[43:44]
	v_add_f64 v[41:42], v[47:48], v[41:42]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[41:42], v[41:42], -v[43:44]
	v_fma_f64 v[43:44], v[45:46], s[28:29], v[41:42]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[41:42], v[49:50], v[43:44]
	v_add_f64 v[47:48], v[41:42], -v[49:50]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[43:44], v[43:44], -v[47:48]
.LBB3_165:                              ; %_ZL3sind.exit.i.i.i.i
                                        ;   in Loop: Header=BB3_157 Depth=2
	s_or_b32 exec_lo, exec_lo, s0
	v_add_co_u32 v39, vcc_lo, v39, v21
	v_add_co_ci_u32_e32 v40, vcc_lo, v40, v22, vcc_lo
	s_mov_b32 s71, s31
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_f64 v[75:76], v[37:38], 0.5
	v_mul_f64 v[83:84], v[43:44], 0.5
	s_delay_alu instid0(VALU_DEP_3)
	v_lshrrev_b64 v[39:40], 11, v[39:40]
	s_mov_b32 s72, s30
	s_mov_b32 s74, s30
	v_cmp_lg_f64_e64 s0, 0x7ff00000, v[24:25]
	s_cmp_eq_u32 s78, 4
	v_xor_b32_e32 v30, v30, v22
	v_cvt_f64_u32_e32 v[45:46], v40
	v_cvt_f64_u32_e32 v[39:40], v39
	v_xor_b32_e32 v29, v29, v21
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[45:46], v[45:46], 32
	v_add_f64 v[39:40], v[45:46], v[39:40]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[39:40], v[39:40], 0xffffffcb
	v_frexp_mant_f64_e32 v[45:46], v[39:40]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f64_e32 vcc_lo, s[30:31], v[45:46]
	v_cndmask_b32_e64 v34, 0, 1, vcc_lo
	v_ldexp_f64 v[45:46], v[45:46], v34
	v_frexp_exp_i32_f64_e32 v34, v[39:40]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[47:48], v[45:46], 1.0
	v_add_f64 v[57:58], v[45:46], -1.0
	v_subrev_co_ci_u32_e32 v34, vcc_lo, 0, v34, vcc_lo
	v_cmp_eq_f64_e32 vcc_lo, 0x7ff00000, v[39:40]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[49:50], v[47:48]
	v_add_f64 v[59:60], v[47:48], -1.0
	v_add_f64 v[45:46], v[45:46], -v[59:60]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[51:52], -v[47:48], v[49:50], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[49:50], v[51:52], v[49:50], v[49:50]
	v_fma_f64 v[51:52], -v[47:48], v[49:50], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[49:50], v[51:52], v[49:50], v[49:50]
	v_mul_f64 v[51:52], v[57:58], v[49:50]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[61:62], v[47:48], v[51:52]
	v_fma_f64 v[47:48], v[51:52], v[47:48], -v[61:62]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[45:46], v[51:52], v[45:46], v[47:48]
	v_add_f64 v[47:48], v[61:62], v[45:46]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[59:60], v[57:58], -v[47:48]
	v_add_f64 v[61:62], v[47:48], -v[61:62]
	v_add_f64 v[57:58], v[57:58], -v[59:60]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[45:46], v[61:62], -v[45:46]
	v_add_f64 v[47:48], v[57:58], -v[47:48]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[45:46], v[45:46], v[47:48]
	v_add_f64 v[45:46], v[59:60], v[45:46]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[45:46], v[49:50], v[45:46]
	v_add_f64 v[47:48], v[51:52], v[45:46]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[49:50], v[47:48], v[47:48]
	v_fma_f64 v[57:58], v[49:50], s[36:37], s[34:35]
	v_mul_f64 v[59:60], v[47:48], v[49:50]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[57:58], v[49:50], v[57:58], s[38:39]
	v_fma_f64 v[57:58], v[49:50], v[57:58], s[40:41]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[57:58], v[49:50], v[57:58], s[42:43]
	v_fma_f64 v[57:58], v[49:50], v[57:58], s[44:45]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[49:50], v[49:50], v[57:58], s[70:71]
	v_ldexp_f64 v[57:58], v[47:48], 1
	v_add_f64 v[47:48], v[47:48], -v[51:52]
	v_mul_f64 v[49:50], v[59:60], v[49:50]
	v_cvt_f64_i32_e32 v[59:60], v34
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[45:46], v[45:46], -v[47:48]
	v_add_f64 v[51:52], v[57:58], v[49:50]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[61:62], v[59:60], s[46:47]
	v_ldexp_f64 v[45:46], v[45:46], 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[47:48], v[51:52], -v[57:58]
	v_fma_f64 v[57:58], v[59:60], s[46:47], -v[61:62]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[47:48], v[49:50], -v[47:48]
	v_fma_f64 v[49:50], v[59:60], s[48:49], v[57:58]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[45:46], v[45:46], v[47:48]
	v_add_f64 v[47:48], v[61:62], v[49:50]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[57:58], v[51:52], v[45:46]
	v_add_f64 v[61:62], v[47:48], -v[61:62]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[59:60], v[47:48], v[57:58]
	v_add_f64 v[51:52], v[57:58], -v[51:52]
	v_add_f64 v[49:50], v[49:50], -v[61:62]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[63:64], v[59:60], -v[47:48]
	v_add_f64 v[45:46], v[45:46], -v[51:52]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[67:68], v[59:60], -v[63:64]
	v_add_f64 v[51:52], v[57:58], -v[63:64]
	v_add_f64 v[57:58], v[49:50], v[45:46]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[47:48], v[47:48], -v[67:68]
	v_add_f64 v[47:48], v[51:52], v[47:48]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[51:52], v[57:58], -v[49:50]
	v_add_f64 v[47:48], v[57:58], v[47:48]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[57:58], v[57:58], -v[51:52]
	v_add_f64 v[45:46], v[45:46], -v[51:52]
	v_add_f64 v[61:62], v[59:60], v[47:48]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[49:50], v[49:50], -v[57:58]
	v_add_f64 v[51:52], v[61:62], -v[59:60]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[45:46], v[45:46], v[49:50]
	v_mul_f64 v[49:50], v[41:42], v[41:42]
	v_add_f64 v[47:48], v[47:48], -v[51:52]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mul_f64 v[69:70], v[49:50], 0.5
	v_fma_f64 v[71:72], v[49:50], s[52:53], s[50:51]
	v_add_f64 v[45:46], v[45:46], v[47:48]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[81:82], -v[69:70], 1.0
	v_fma_f64 v[71:72], v[49:50], v[71:72], s[54:55]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[45:46], v[61:62], v[45:46]
	v_fma_f64 v[61:62], v[49:50], s[62:63], s[60:61]
	v_fma_f64 v[71:72], v[49:50], v[71:72], s[56:57]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_dual_cndmask_b32 v46, v46, v40 :: v_dual_cndmask_b32 v45, v45, v39
	v_cmp_ngt_f64_e32 vcc_lo, 0, v[39:40]
	v_fma_f64 v[61:62], v[49:50], v[61:62], s[64:65]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[71:72], v[49:50], v[71:72], s[58:59]
	v_mul_f64 v[45:46], v[45:46], -2.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[61:62], v[49:50], v[61:62], s[66:67]
	v_cndmask_b32_e32 v34, 0x7ff80000, v46, vcc_lo
	v_cmp_nge_f64_e32 vcc_lo, 0, v[39:40]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_fma_f64 v[61:62], v[49:50], v[61:62], s[68:69]
	v_cndmask_b32_e32 v45, 0, v45, vcc_lo
	v_cmp_neq_f64_e32 vcc_lo, 0, v[39:40]
	v_mul_f64 v[39:40], v[35:36], v[35:36]
	v_cndmask_b32_e32 v46, 0x7ff00000, v34, vcc_lo
	v_fma_f64 v[47:48], v[39:40], s[62:63], s[60:61]
	v_mul_f64 v[57:58], v[39:40], 0.5
	v_fma_f64 v[59:60], v[39:40], s[52:53], s[50:51]
	v_mul_f64 v[77:78], v[35:36], -v[39:40]
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[45:46]
	v_fma_f64 v[47:48], v[39:40], v[47:48], s[64:65]
	v_add_f64 v[67:68], -v[57:58], 1.0
	v_fma_f64 v[59:60], v[39:40], v[59:60], s[54:55]
	v_cndmask_b32_e64 v34, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v34, 8, v34
	v_ldexp_f64 v[45:46], v[45:46], v34
	v_fma_f64 v[47:48], v[39:40], v[47:48], s[66:67]
	v_add_f64 v[79:80], -v[67:68], 1.0
	v_fma_f64 v[59:60], v[39:40], v[59:60], s[56:57]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_rsq_f64_e32 v[51:52], v[45:46]
	v_cmp_class_f64_e64 s1, v[45:46], 0x260
	v_fma_f64 v[47:48], v[39:40], v[47:48], s[68:69]
	s_delay_alu instid0(VALU_DEP_4)
	v_add_f64 v[57:58], v[79:80], -v[57:58]
	v_add_f64 v[79:80], -v[81:82], 1.0
	v_fma_f64 v[59:60], v[39:40], v[59:60], s[58:59]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[63:64], v[45:46], v[51:52]
	v_mul_f64 v[51:52], v[51:52], 0.5
	v_fma_f64 v[47:48], v[77:78], v[47:48], v[75:76]
	v_mul_f64 v[75:76], v[41:42], -v[49:50]
	v_add_f64 v[69:70], v[79:80], -v[69:70]
	v_mul_f64 v[79:80], v[39:40], v[39:40]
	v_fma_f64 v[59:60], v[39:40], v[59:60], s[72:73]
	v_fma_f64 v[57:58], v[35:36], -v[37:38], v[57:58]
	v_fma_f64 v[73:74], -v[51:52], v[63:64], 0.5
	v_fma_f64 v[37:38], v[39:40], v[47:48], -v[37:38]
	v_fma_f64 v[61:62], v[75:76], v[61:62], v[83:84]
	v_mul_f64 v[47:48], v[49:50], v[49:50]
	v_fma_f64 v[69:70], v[41:42], -v[43:44], v[69:70]
	v_fma_f64 v[63:64], v[63:64], v[73:74], v[63:64]
	v_fma_f64 v[51:52], v[51:52], v[73:74], v[51:52]
	v_fma_f64 v[37:38], v[77:78], s[74:75], v[37:38]
	v_fma_f64 v[43:44], v[49:50], v[61:62], -v[43:44]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[73:74], -v[63:64], v[63:64], v[45:46]
	v_add_f64 v[34:35], v[35:36], -v[37:38]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[43:44], v[75:76], s[74:75], v[43:44]
	v_fma_f64 v[39:40], v[73:74], v[51:52], v[63:64]
	v_fma_f64 v[63:64], v[49:50], v[71:72], s[72:73]
	v_fma_f64 v[49:50], v[79:80], v[59:60], v[57:58]
	v_xor_b32_e32 v35, 0x80000000, v35
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[57:58], -v[39:40], v[39:40], v[45:46]
	v_fma_f64 v[47:48], v[47:48], v[63:64], v[69:70]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[49:50], v[67:68], v[49:50]
	v_fma_f64 v[36:37], v[57:58], v[51:52], v[39:40]
	s_delay_alu instid0(VALU_DEP_3)
	v_add_f64 v[38:39], v[81:82], v[47:48]
	v_add_f64 v[40:41], v[41:42], -v[43:44]
	v_and_b32_e32 v43, 1, v56
	v_cndmask_b32_e64 v47, 0, 0xffffff80, vcc_lo
	v_and_b32_e32 v51, 1, v55
	v_lshlrev_b32_e32 v42, 30, v56
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_eq_u32_e32 vcc_lo, 0, v51
	v_xor_b32_e32 v25, v42, v25
	v_dual_cndmask_b32 v34, v34, v49 :: v_dual_cndmask_b32 v35, v35, v50
	v_cmp_eq_u32_e32 vcc_lo, 0, v43
	v_lshlrev_b32_e32 v24, 30, v55
	v_ldexp_f64 v[36:37], v[36:37], v47
	v_dual_cndmask_b32 v39, v39, v41 :: v_dual_cndmask_b32 v38, v38, v40
	s_cselect_b32 vcc_lo, -1, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_and_b32_e32 v24, 0x80000000, v24
	v_and_b32_e32 v42, 0x80000000, v25
	s_cmp_eq_u32 s78, 3
	v_cndmask_b32_e64 v21, 0, v38, s0
	v_xor_b32_e32 v35, v35, v24
	v_cndmask_b32_e64 v24, 0, v34, s0
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e64 v25, 0x7ff80000, v35, s0
	v_cndmask_b32_e64 v35, v37, v46, s1
	v_cndmask_b32_e64 v34, v36, v45, s1
	v_lshlrev_b64 v[36:37], 17, v[27:28]
	v_xor_b32_e32 v28, v30, v28
	v_xor_b32_e32 v27, v29, v27
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[24:25], v[34:35], v[24:25]
	v_cndmask_b32_e32 v19, v19, v24, vcc_lo
	v_xor_b32_e32 v39, v39, v42
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v20, v20, v25, vcc_lo
	v_cndmask_b32_e64 v22, 0x7ff80000, v39, s0
	s_cselect_b32 s0, -1, 0
	s_cmp_eq_u32 s78, 2
	v_cndmask_b32_e64 v18, v18, v25, s0
	s_cselect_b32 s1, -1, 0
	v_mul_f64 v[38:39], v[34:35], v[21:22]
	v_xor_b32_e32 v22, v28, v54
	v_xor_b32_e32 v21, v27, v23
	v_xor_b32_e32 v34, v30, v37
	v_xor_b32_e32 v35, v29, v36
	v_lshlrev_b64 v[29:30], 17, v[27:28]
	s_cmp_eq_u32 s78, 1
	v_lshrrev_b64 v[36:37], 19, v[21:22]
	v_xor_b32_e32 v23, v34, v53
	v_xor_b32_e32 v40, v35, v26
	v_xor_b32_e32 v34, v21, v26
	v_lshlrev_b32_e32 v26, 13, v21
	v_xor_b32_e32 v35, v22, v53
	s_cselect_b32 s2, -1, 0
	s_cmp_eq_u32 s78, 0
	v_xor_b32_e32 v27, v40, v27
	v_or_b32_e32 v37, v26, v37
	s_cselect_b32 s3, -1, 0
	v_xor_b32_e32 v29, v40, v29
	v_mov_b32_e32 v21, v34
	v_xor_b32_e32 v28, v23, v28
	v_xor_b32_e32 v30, v23, v30
	v_mov_b32_e32 v22, v35
	v_cndmask_b32_e64 v17, v17, v24, s0
	v_cndmask_b32_e64 v16, v16, v25, s1
	v_cndmask_b32_e64 v15, v15, v24, s1
	v_cndmask_b32_e64 v14, v14, v25, s2
	v_cndmask_b32_e64 v13, v13, v24, s2
	v_cndmask_b32_e64 v12, v12, v25, s3
	v_cndmask_b32_e64 v11, v11, v24, s3
	s_add_i32 s78, s78, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s78, 5
	v_cndmask_b32_e32 v10, v10, v39, vcc_lo
	v_cndmask_b32_e64 v8, v8, v39, s0
	v_cndmask_b32_e64 v6, v6, v39, s1
	v_cndmask_b32_e64 v4, v4, v39, s2
	v_cndmask_b32_e64 v2, v2, v39, s3
	v_mov_b32_e32 v40, v37
	v_cndmask_b32_e32 v9, v9, v38, vcc_lo
	v_cndmask_b32_e64 v7, v7, v38, s0
	v_cndmask_b32_e64 v5, v5, v38, s1
	v_cndmask_b32_e64 v3, v3, v38, s2
	v_cndmask_b32_e64 v1, v1, v38, s3
	v_mov_b32_e32 v39, v36
	s_cbranch_scc1 .LBB3_157
; %bb.166:                              ; %.lr.ph.i.i.i.i.preheader
                                        ;   in Loop: Header=BB3_156 Depth=1
	v_mov_b32_e32 v21, 0
	v_mov_b32_e32 v22, 0
	s_mov_b32 s3, 0
.LBB3_167:                              ; %.lr.ph.i.i.i.i
                                        ;   Parent Loop BB3_156 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB3_168 Depth 3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s3, 1
	s_mov_b32 s6, s3
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s3, 2
	v_dual_cndmask_b32 v23, v12, v14 :: v_dual_cndmask_b32 v24, v11, v13
	v_dual_cndmask_b32 v25, v2, v4 :: v_dual_cndmask_b32 v26, v1, v3
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s3, 3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v23, v23, v16 :: v_dual_cndmask_b32 v24, v24, v15
	v_dual_cndmask_b32 v25, v25, v6 :: v_dual_cndmask_b32 v26, v26, v5
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s3, 4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v23, v23, v18 :: v_dual_cndmask_b32 v38, v24, v17
	v_cndmask_b32_e32 v25, v25, v8, vcc_lo
	v_cndmask_b32_e32 v39, v26, v7, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v24, v23, v20 :: v_dual_cndmask_b32 v23, v38, v19
	v_dual_cndmask_b32 v26, v25, v10 :: v_dual_cndmask_b32 v25, v39, v9
.LBB3_168:                              ;   Parent Loop BB3_156 Depth=1
                                        ;     Parent Loop BB3_167 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_add_i32 s6, s6, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s6, 1
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s6, 2
	v_dual_cndmask_b32 v38, v12, v14 :: v_dual_cndmask_b32 v39, v2, v4
	v_cndmask_b32_e32 v40, v1, v3, vcc_lo
	s_cselect_b32 s0, -1, 0
	s_cmp_eq_u32 s6, 3
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e64 v38, v38, v16, s0
	v_cndmask_b32_e64 v39, v39, v6, s0
	v_cndmask_b32_e64 v40, v40, v5, s0
	s_cselect_b32 s1, -1, 0
	s_cmp_eq_u32 s6, 4
	v_cndmask_b32_e64 v38, v38, v18, s1
	v_cndmask_b32_e64 v41, v39, v8, s1
	v_cndmask_b32_e64 v40, v40, v7, s1
	s_cselect_b32 s2, -1, 0
	s_cmp_gt_u32 s6, 3
	v_cndmask_b32_e64 v39, v38, v20, s2
	v_cndmask_b32_e64 v41, v41, v10, s2
	v_cndmask_b32_e64 v40, v40, v9, s2
	v_cndmask_b32_e32 v38, v11, v13, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[40:41], v[25:26], -v[40:41]
	v_cndmask_b32_e64 v38, v38, v15, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v38, v38, v17, s1
	v_cndmask_b32_e64 v38, v38, v19, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[38:39], v[23:24], -v[38:39]
	v_mul_f64 v[40:41], v[40:41], v[40:41]
	v_fma_f64 v[38:39], v[38:39], v[38:39], v[40:41]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_lt_f64_e32 vcc_lo, v[21:22], v[38:39]
	v_dual_cndmask_b32 v22, v22, v39 :: v_dual_cndmask_b32 v21, v21, v38
	s_cbranch_scc0 .LBB3_168
; %bb.169:                              ; %.loopexit.i.i.i.i
                                        ;   in Loop: Header=BB3_167 Depth=2
	s_add_i32 s3, s3, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s3, 4
	s_cbranch_scc1 .LBB3_167
; %bb.170:                              ;   in Loop: Header=BB3_156 Depth=1
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[21:22]
	s_add_i32 s77, s77, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	s_cmp_eq_u32 s77, 0x10000
	v_cndmask_b32_e64 v23, 0, 1, vcc_lo
	v_lshlrev_b32_e32 v23, 8, v23
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[21:22], v[21:22], v23
	v_rsq_f64_e32 v[23:24], v[21:22]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[25:26], v[21:22], v[23:24]
	v_mul_f64 v[23:24], v[23:24], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[38:39], -v[23:24], v[25:26], 0.5
	v_fma_f64 v[25:26], v[25:26], v[38:39], v[25:26]
	v_fma_f64 v[23:24], v[23:24], v[38:39], v[23:24]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[38:39], -v[25:26], v[25:26], v[21:22]
	v_fma_f64 v[25:26], v[38:39], v[23:24], v[25:26]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[38:39], -v[25:26], v[25:26], v[21:22]
	v_fma_f64 v[23:24], v[38:39], v[23:24], v[25:26]
	v_cndmask_b32_e64 v25, 0, 0xffffff80, vcc_lo
	v_cmp_class_f64_e64 vcc_lo, v[21:22], 0x260
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[23:24], v[23:24], v25
	v_dual_cndmask_b32 v22, v24, v22 :: v_dual_cndmask_b32 v21, v23, v21
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[31:32], v[31:32], v[21:22]
	s_cbranch_scc0 .LBB3_156
; %bb.171:                              ; %_ZNK6thrust11hip_rocprim26transform_input_iterator_tIdNS_17counting_iteratorIjNS_11use_defaultES3_S3_EE11estimate_esEixEl.exit.i.i
	s_delay_alu instid0(VALU_DEP_1)
	v_ldexp_f64 v[1:2], v[31:32], -16
.LBB3_172:                              ; %Flow1231
	s_or_b32 exec_lo, exec_lo, s76
	v_or_b32_e32 v17, 0x100, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_u32_e32 vcc_lo, s33, v17
	s_and_saveexec_b32 s76, vcc_lo
	s_cbranch_execz .LBB3_192
; %bb.173:
	s_movk_i32 s0, 0x1001
	s_mov_b64 s[4:5], 0
	v_mad_u64_u32 v[3:4], null, v66, s0, 0x7ee55e16
                                        ; implicit-def: $vgpr48_vgpr49
                                        ; implicit-def: $vgpr43_vgpr44
                                        ; implicit-def: $vgpr50_vgpr51
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v4, 19, v3
	v_xor3_b32 v3, v3, v4, 0xc761c23c
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v3, v3, 5, v3
	v_add_nc_u32_e32 v4, 0xe9f8cc1d, v3
	v_lshl_add_u32 v3, v3, 9, 0xaccf6200
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v3, v4, v3
	v_lshlrev_b32_e32 v4, 3, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v3, v3, v4, 0xfd7046c5
	v_lshrrev_b32_e32 v4, 16, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_xor3_b32 v17, v3, v4, 0xb55a4f09
                                        ; implicit-def: $vgpr3_vgpr4
.LBB3_174:                              ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v18, 12, v17
	s_cmp_eq_u32 s4, 0
	s_cselect_b32 s0, -1, 0
	s_cmp_eq_u32 s4, 1
	v_add3_u32 v17, v17, v18, 0x7ed55d16
	s_cselect_b32 s1, -1, 0
	s_cmp_eq_u32 s4, 2
	s_cselect_b32 s2, -1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v18, 19, v17
	s_cmp_eq_u32 s4, 3
	s_cselect_b32 s3, -1, 0
	s_add_u32 s4, s4, 1
	v_xor3_b32 v17, v17, v18, 0xc761c23c
	s_addc_u32 s5, s5, 0
	s_cmp_lg_u32 s4, 4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v17, v17, 5, v17
	v_add_nc_u32_e32 v18, 0xe9f8cc1d, v17
	v_lshl_add_u32 v17, v17, 9, 0xaccf6200
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v17, v18, v17
	v_lshlrev_b32_e32 v18, 3, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v17, v17, v18, 0xfd7046c5
	v_lshrrev_b32_e32 v18, 16, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor3_b32 v17, v17, v18, 0xb55a4f09
	v_lshlrev_b32_e32 v19, 12, v17
	v_xor_b32_e32 v18, s23, v17
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add3_u32 v17, v17, v19, 0x7ed55d16
	v_cndmask_b32_e64 v49, v49, v18, s0
	v_cndmask_b32_e64 v4, v4, v18, s1
	v_cndmask_b32_e64 v44, v44, v18, s2
	v_cndmask_b32_e64 v51, v51, v18, s3
	v_lshrrev_b32_e32 v19, 19, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor3_b32 v17, v17, v19, 0xc761c23c
	v_lshl_add_u32 v17, v17, 5, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v19, 0xe9f8cc1d, v17
	v_lshl_add_u32 v17, v17, 9, 0xaccf6200
	v_xor_b32_e32 v17, v19, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v19, 3, v17
	v_add3_u32 v17, v17, v19, 0xfd7046c5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v19, 16, v17
	v_xor3_b32 v17, v17, v19, 0xb55a4f09
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v18, s22, v17
	v_cndmask_b32_e64 v48, v48, v18, s0
	v_cndmask_b32_e64 v3, v3, v18, s1
	v_cndmask_b32_e64 v43, v43, v18, s2
	v_cndmask_b32_e64 v50, v50, v18, s3
	s_cbranch_scc1 .LBB3_174
; %bb.175:                              ; %.preheader55.i.i.1.i.i.preheader
	v_mov_b32_e32 v45, 0
	v_dual_mov_b32 v46, 0 :: v_dual_mov_b32 v47, 0
	s_mov_b32 s8, 0x54442d18
	s_mov_b32 s10, 0x33145c07
	s_mov_b32 s12, 0x6dc9c883
	s_mov_b32 s26, 0x33145c00
	s_mov_b32 s28, 0x252049c0
	s_mov_b32 s30, 0x55555555
	s_mov_b32 s34, 0x6b47b09a
	s_mov_b32 s36, 0xbf559e2b
	s_mov_b32 s38, 0xd7f4df2e
	s_mov_b32 s40, 0x16291751
	s_mov_b32 s42, 0x9b27acf1
	s_mov_b32 s44, 0x998ef7b6
	s_mov_b32 s46, 0xfefa39ef
	s_mov_b32 s48, 0x3b39803f
	s_mov_b32 s50, 0x9037ab78
	s_mov_b32 s52, 0x46cc5e42
	s_mov_b32 s54, 0xa17f65f6
	s_mov_b32 s56, 0x19f4ec90
	s_mov_b32 s58, 0x16c16967
	s_mov_b32 s60, 0xb42fdfa7
	s_mov_b32 s62, 0xf9a43bb8
	s_mov_b32 s64, 0x796cde01
	s_mov_b32 s66, 0x19e83e5c
	s_mov_b32 s68, 0x11110bb3
	s_mov_b32 s77, 0
	s_mov_b32 s9, 0x401921fb
	s_mov_b32 s7, 0x3ff921fb
	s_mov_b32 s11, 0x3c91a626
	s_mov_b32 s13, 0x3fe45f30
	s_mov_b32 s25, 0xbff921fb
	s_mov_b32 s27, 0xbc91a626
	s_mov_b32 s29, 0xb97b839a
	s_mov_b32 s31, 0x3fe55555
	s_mov_b32 s35, 0x3fc38538
	s_mov_b32 s37, 0x3fc3ab76
	s_mov_b32 s39, 0x3fc7474d
	s_mov_b32 s41, 0x3fcc71c0
	s_mov_b32 s43, 0x3fd24924
	s_mov_b32 s45, 0x3fd99999
	s_mov_b32 s47, 0x3fe62e42
	s_mov_b32 s49, 0x3c7abc9e
	s_mov_b32 s51, 0x3e21eeb6
	s_mov_b32 s53, 0xbda907db
	s_mov_b32 s55, 0xbe927e4f
	s_mov_b32 s57, 0x3efa01a0
	s_mov_b32 s59, 0xbf56c16c
	s_mov_b32 s61, 0xbe5ae600
	s_mov_b32 s63, 0x3de5e0b2
	s_mov_b32 s65, 0x3ec71de3
	s_mov_b32 s67, 0xbf2a01a0
	s_mov_b32 s69, 0x3f811111
	s_mov_b32 s70, 0x55555780
	s_mov_b32 s73, 0x3fa55555
	s_mov_b32 s75, 0xbfc55555
                                        ; implicit-def: $vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31_vgpr32
                                        ; implicit-def: $vgpr27_vgpr28_vgpr29_vgpr30_vgpr31_vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42
.LBB3_176:                              ; %.preheader55.i.i.1.i.i
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB3_177 Depth 2
                                        ;     Child Loop BB3_187 Depth 2
                                        ;       Child Loop BB3_188 Depth 3
	v_dual_mov_b32 v57, v49 :: v_dual_mov_b32 v56, v48
	v_dual_mov_b32 v59, v51 :: v_dual_mov_b32 v58, v50
	s_mov_b32 s78, 0
.LBB3_177:                              ;   Parent Loop BB3_176 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v38, v4, v59
	v_xor_b32_e32 v37, v3, v58
                                        ; implicit-def: $vgpr68
                                        ; implicit-def: $vgpr52_vgpr53
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v70, v38, v57
	v_lshrrev_b64 v[49:50], 19, v[37:38]
	v_lshlrev_b32_e32 v39, 13, v37
	v_xor_b32_e32 v69, v37, v56
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_or_b32_e32 v71, v39, v50
	v_add_co_u32 v37, s0, v49, v69
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v38, s0, v71, v70, s0
	v_lshrrev_b64 v[37:38], 11, v[37:38]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_u32_e32 v[38:39], v38
	v_cvt_f64_u32_e32 v[40:41], v37
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[37:38], v[38:39], 32
	v_add_f64 v[37:38], v[37:38], v[40:41]
                                        ; implicit-def: $vgpr41_vgpr42
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[37:38], v[37:38], 0xffffffcb
	v_mul_f64 v[37:38], v[37:38], s[8:9]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ngt_f64_e64 s0, 0x41d00000, v[37:38]
	v_trig_preop_f64 v[62:63], v[37:38], 0
	v_trig_preop_f64 v[60:61], v[37:38], 1
	v_ldexp_f64 v[64:65], v[37:38], 0xffffff80
	v_trig_preop_f64 v[50:51], v[37:38], 2
	s_and_saveexec_b32 s1, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s3, exec_lo, s1
	s_cbranch_execz .LBB3_179
; %bb.178:                              ;   in Loop: Header=BB3_177 Depth=2
	v_cmp_le_f64_e64 s1, 0x7b000000, v[37:38]
	s_mov_b32 s6, s8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v40, v38, v65, s1
	v_cndmask_b32_e64 v39, v37, v64, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_f64 v[41:42], v[62:63], v[39:40]
	v_mul_f64 v[52:53], v[60:61], v[39:40]
	v_mul_f64 v[78:79], v[50:51], v[39:40]
	v_fma_f64 v[54:55], v[62:63], v[39:40], -v[41:42]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[80:81], v[60:61], v[39:40], -v[52:53]
	v_fma_f64 v[39:40], v[50:51], v[39:40], -v[78:79]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[67:68], v[52:53], v[54:55]
	v_add_f64 v[72:73], v[67:68], -v[52:53]
	v_add_f64 v[76:77], v[41:42], v[67:68]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[74:75], v[67:68], -v[72:73]
	v_add_f64 v[54:55], v[54:55], -v[72:73]
	v_ldexp_f64 v[72:73], v[76:77], -2
	v_add_f64 v[41:42], v[76:77], -v[41:42]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[52:53], v[52:53], -v[74:75]
	v_add_f64 v[74:75], v[78:79], v[80:81]
	v_cmp_neq_f64_e64 s1, 0x7ff00000, |v[72:73]|
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[41:42], v[67:68], -v[41:42]
	v_add_f64 v[52:53], v[54:55], v[52:53]
	v_fract_f64_e32 v[54:55], v[72:73]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[67:68], v[74:75], v[52:53]
	v_cndmask_b32_e64 v55, 0, v55, s1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v54, 0, v54, s1
	v_ldexp_f64 v[54:55], v[54:55], 2
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[72:73], v[41:42], v[67:68]
	v_add_f64 v[82:83], v[67:68], -v[74:75]
	v_add_f64 v[76:77], v[72:73], v[54:55]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[88:89], v[67:68], -v[82:83]
	v_add_f64 v[52:53], v[52:53], -v[82:83]
	v_add_f64 v[41:42], v[72:73], -v[41:42]
	v_cmp_gt_f64_e64 s1, 0, v[76:77]
	v_add_f64 v[76:77], v[74:75], -v[78:79]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[41:42], v[67:68], -v[41:42]
	v_cndmask_b32_e64 v48, 0, 0x40100000, s1
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[86:87], v[74:75], -v[76:77]
	v_add_f64 v[76:77], v[80:81], -v[76:77]
	v_add_f64 v[74:75], v[74:75], -v[88:89]
	v_add_f64 v[54:55], v[54:55], v[47:48]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[80:81], v[78:79], -v[86:87]
	v_add_f64 v[52:53], v[52:53], v[74:75]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[84:85], v[72:73], v[54:55]
	v_add_f64 v[76:77], v[76:77], v[80:81]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_i32_f64_e32 v48, v[84:85]
	v_add_f64 v[52:53], v[76:77], v[52:53]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_i32_e32 v[82:83], v48
	v_add_f64 v[39:40], v[39:40], v[52:53]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[54:55], v[54:55], -v[82:83]
	v_add_f64 v[39:40], v[41:42], v[39:40]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[74:75], v[72:73], v[54:55]
	v_add_f64 v[52:53], v[74:75], -v[54:55]
	v_cmp_le_f64_e64 s1, 0.5, v[74:75]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[41:42], v[72:73], -v[52:53]
	v_add_co_ci_u32_e64 v68, s2, 0, v48, s1
	v_cndmask_b32_e64 v48, 0, 0x3ff00000, s1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[39:40], v[39:40], v[41:42]
	v_add_f64 v[41:42], v[74:75], -v[47:48]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[52:53], v[41:42], v[39:40]
	v_mul_f64 v[54:55], v[52:53], s[6:7]
	v_add_f64 v[41:42], v[52:53], -v[41:42]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[72:73], v[52:53], s[6:7], -v[54:55]
	v_add_f64 v[39:40], v[39:40], -v[41:42]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[41:42], v[52:53], s[10:11], v[72:73]
	v_fma_f64 v[39:40], v[39:40], s[6:7], v[41:42]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[41:42], v[54:55], v[39:40]
	v_add_f64 v[52:53], v[41:42], -v[54:55]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[52:53], v[39:40], -v[52:53]
.LBB3_179:                              ; %Flow1227
                                        ;   in Loop: Header=BB3_177 Depth=2
	s_and_not1_saveexec_b32 s1, s3
	s_cbranch_execz .LBB3_181
; %bb.180:                              ;   in Loop: Header=BB3_177 Depth=2
	v_mul_f64 v[39:40], v[37:38], s[12:13]
	s_mov_b32 s24, s8
	s_mov_b32 s2, s26
	s_mov_b32 s3, s11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[39:40], v[39:40]
	v_fma_f64 v[41:42], v[39:40], s[24:25], v[37:38]
	v_mul_f64 v[52:53], v[39:40], s[26:27]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[67:68], v[39:40], s[26:27], v[41:42]
	v_add_f64 v[54:55], v[41:42], v[52:53]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[41:42], v[41:42], -v[54:55]
	v_add_f64 v[54:55], v[54:55], -v[67:68]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[41:42], v[41:42], v[52:53]
	v_fma_f64 v[52:53], v[39:40], s[2:3], v[52:53]
	v_add_f64 v[41:42], v[54:55], v[41:42]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[41:42], v[41:42], -v[52:53]
	v_fma_f64 v[52:53], v[39:40], s[28:29], v[41:42]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[41:42], v[67:68], v[52:53]
	v_add_f64 v[54:55], v[41:42], -v[67:68]
	v_cvt_i32_f64_e32 v68, v[39:40]
	s_delay_alu instid0(VALU_DEP_2)
	v_add_f64 v[52:53], v[52:53], -v[54:55]
.LBB3_181:                              ; %_ZL3cosd.exit.i.i.1.i.i
                                        ;   in Loop: Header=BB3_177 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
                                        ; implicit-def: $vgpr67
                                        ; implicit-def: $vgpr39_vgpr40
                                        ; implicit-def: $vgpr54_vgpr55
	s_and_saveexec_b32 s1, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s2, exec_lo, s1
	s_cbranch_execz .LBB3_183
; %bb.182:                              ;   in Loop: Header=BB3_177 Depth=2
	v_cmp_le_f64_e64 s0, 0x7b000000, v[37:38]
	s_mov_b32 s6, s8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v40, v38, v65, s0
	v_cndmask_b32_e64 v39, v37, v64, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_f64 v[54:55], v[62:63], v[39:40]
	v_mul_f64 v[64:65], v[60:61], v[39:40]
	v_mul_f64 v[80:81], v[50:51], v[39:40]
	v_fma_f64 v[62:63], v[62:63], v[39:40], -v[54:55]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[60:61], v[60:61], v[39:40], -v[64:65]
	v_fma_f64 v[39:40], v[50:51], v[39:40], -v[80:81]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[72:73], v[64:65], v[62:63]
	v_add_f64 v[74:75], v[72:73], -v[64:65]
	v_add_f64 v[78:79], v[54:55], v[72:73]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[76:77], v[72:73], -v[74:75]
	v_add_f64 v[62:63], v[62:63], -v[74:75]
	v_ldexp_f64 v[74:75], v[78:79], -2
	v_add_f64 v[54:55], v[78:79], -v[54:55]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[64:65], v[64:65], -v[76:77]
	v_add_f64 v[76:77], v[80:81], v[60:61]
	v_cmp_neq_f64_e64 s0, 0x7ff00000, |v[74:75]|
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[54:55], v[72:73], -v[54:55]
	v_add_f64 v[62:63], v[62:63], v[64:65]
	v_fract_f64_e32 v[64:65], v[74:75]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[72:73], v[76:77], v[62:63]
	v_cndmask_b32_e64 v65, 0, v65, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v64, 0, v64, s0
	v_ldexp_f64 v[64:65], v[64:65], 2
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[74:75], v[54:55], v[72:73]
	v_add_f64 v[82:83], v[72:73], -v[76:77]
	v_add_f64 v[78:79], v[74:75], v[64:65]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[88:89], v[72:73], -v[82:83]
	v_add_f64 v[62:63], v[62:63], -v[82:83]
	v_add_f64 v[50:51], v[74:75], -v[54:55]
	v_cmp_gt_f64_e64 s0, 0, v[78:79]
	v_add_f64 v[78:79], v[76:77], -v[80:81]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[50:51], v[72:73], -v[50:51]
	v_cndmask_b32_e64 v48, 0, 0x40100000, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[86:87], v[76:77], -v[78:79]
	v_add_f64 v[60:61], v[60:61], -v[78:79]
	v_add_f64 v[76:77], v[76:77], -v[88:89]
	v_add_f64 v[64:65], v[64:65], v[47:48]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[78:79], v[80:81], -v[86:87]
	v_add_f64 v[62:63], v[62:63], v[76:77]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[84:85], v[74:75], v[64:65]
	v_add_f64 v[60:61], v[60:61], v[78:79]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_i32_f64_e32 v48, v[84:85]
	v_add_f64 v[54:55], v[60:61], v[62:63]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_i32_e32 v[82:83], v48
	v_add_f64 v[39:40], v[39:40], v[54:55]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[64:65], v[64:65], -v[82:83]
	v_add_f64 v[39:40], v[50:51], v[39:40]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[60:61], v[74:75], v[64:65]
	v_add_f64 v[54:55], v[60:61], -v[64:65]
	v_cmp_le_f64_e64 s0, 0.5, v[60:61]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[50:51], v[74:75], -v[54:55]
	v_add_co_ci_u32_e64 v67, s1, 0, v48, s0
	v_cndmask_b32_e64 v48, 0, 0x3ff00000, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[39:40], v[39:40], v[50:51]
	v_add_f64 v[50:51], v[60:61], -v[47:48]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[54:55], v[50:51], v[39:40]
	v_mul_f64 v[60:61], v[54:55], s[6:7]
	v_add_f64 v[50:51], v[54:55], -v[50:51]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[62:63], v[54:55], s[6:7], -v[60:61]
	v_add_f64 v[39:40], v[39:40], -v[50:51]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[50:51], v[54:55], s[10:11], v[62:63]
	v_fma_f64 v[50:51], v[39:40], s[6:7], v[50:51]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[39:40], v[60:61], v[50:51]
	v_add_f64 v[54:55], v[39:40], -v[60:61]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[54:55], v[50:51], -v[54:55]
.LBB3_183:                              ; %Flow1226
                                        ;   in Loop: Header=BB3_177 Depth=2
	s_and_not1_saveexec_b32 s0, s2
	s_cbranch_execz .LBB3_185
; %bb.184:                              ;   in Loop: Header=BB3_177 Depth=2
	v_mul_f64 v[39:40], v[37:38], s[12:13]
	s_mov_b32 s24, s8
	s_mov_b32 s2, s26
	s_mov_b32 s3, s11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[50:51], v[39:40]
	v_fma_f64 v[39:40], v[50:51], s[24:25], v[37:38]
	v_mul_f64 v[54:55], v[50:51], s[26:27]
	v_cvt_i32_f64_e32 v67, v[50:51]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[62:63], v[50:51], s[26:27], v[39:40]
	v_add_f64 v[60:61], v[39:40], v[54:55]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[39:40], v[39:40], -v[60:61]
	v_add_f64 v[60:61], v[60:61], -v[62:63]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[39:40], v[39:40], v[54:55]
	v_fma_f64 v[54:55], v[50:51], s[2:3], v[54:55]
	v_add_f64 v[39:40], v[60:61], v[39:40]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[39:40], v[39:40], -v[54:55]
	v_fma_f64 v[54:55], v[50:51], s[28:29], v[39:40]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[39:40], v[62:63], v[54:55]
	v_add_f64 v[60:61], v[39:40], -v[62:63]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[54:55], v[54:55], -v[60:61]
.LBB3_185:                              ; %_ZL3sind.exit.i.i.1.i.i
                                        ;   in Loop: Header=BB3_177 Depth=2
	s_or_b32 exec_lo, exec_lo, s0
	v_xor_b32_e32 v43, v43, v56
	v_add_co_u32 v56, s0, v58, v56
	v_xor_b32_e32 v44, v44, v57
	v_add_co_ci_u32_e64 v57, s0, v59, v57, s0
	v_lshlrev_b64 v[50:51], 17, v[3:4]
	v_xor_b32_e32 v3, v43, v3
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_xor_b32_e32 v4, v44, v4
	v_lshrrev_b64 v[56:57], 11, v[56:57]
	s_mov_b32 s71, s31
	s_mov_b32 s72, s30
	v_xor_b32_e32 v48, v44, v51
	v_xor_b32_e32 v50, v43, v50
	v_lshlrev_b64 v[43:44], 17, v[3:4]
	v_cvt_f64_u32_e32 v[57:58], v57
	v_xor_b32_e32 v61, v4, v71
	v_xor_b32_e32 v51, v48, v70
	v_xor_b32_e32 v50, v50, v69
	v_xor_b32_e32 v60, v3, v49
	s_mov_b32 s74, s30
	v_xor_b32_e32 v49, v61, v70
	v_xor_b32_e32 v4, v51, v4
	v_xor_b32_e32 v3, v50, v3
	v_xor_b32_e32 v44, v51, v44
	v_xor_b32_e32 v43, v50, v43
	v_lshrrev_b64 v[50:51], 19, v[60:61]
	v_xor_b32_e32 v48, v60, v69
	v_lshlrev_b32_e32 v60, 13, v60
	v_cmp_lg_f64_e64 s2, 0x7ff00000, v[37:38]
	s_cmp_eq_u32 s78, 4
	v_and_b32_e32 v37, 1, v67
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_or_b32_e32 v51, v60, v51
	v_cvt_f64_u32_e32 v[59:60], v56
	v_cmp_eq_u32_e64 s6, 0, v37
	v_ldexp_f64 v[57:58], v[57:58], 32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[56:57], v[57:58], v[59:60]
	v_ldexp_f64 v[56:57], v[56:57], 0xffffffcb
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_frexp_mant_f64_e32 v[58:59], v[56:57]
	v_cmp_gt_f64_e64 s0, s[30:31], v[58:59]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v60, 0, 1, s0
	v_ldexp_f64 v[58:59], v[58:59], v60
	v_frexp_exp_i32_f64_e32 v60, v[56:57]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[62:63], v[58:59], 1.0
	v_subrev_co_ci_u32_e64 v75, s0, 0, v60, s0
	v_add_f64 v[60:61], v[58:59], -1.0
	v_cmp_eq_f64_e64 s0, 0x7ff00000, v[56:57]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[64:65], v[62:63], -1.0
	v_add_f64 v[58:59], v[58:59], -v[64:65]
	v_rcp_f64_e32 v[64:65], v[62:63]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[69:70], -v[62:63], v[64:65], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[64:65], v[69:70], v[64:65], v[64:65]
	v_fma_f64 v[69:70], -v[62:63], v[64:65], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[64:65], v[69:70], v[64:65], v[64:65]
	v_mul_f64 v[69:70], v[60:61], v[64:65]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[71:72], v[62:63], v[69:70]
	v_fma_f64 v[62:63], v[69:70], v[62:63], -v[71:72]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[58:59], v[69:70], v[58:59], v[62:63]
	v_add_f64 v[62:63], v[71:72], v[58:59]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[73:74], v[60:61], -v[62:63]
	v_add_f64 v[71:72], v[62:63], -v[71:72]
	v_add_f64 v[60:61], v[60:61], -v[73:74]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[58:59], v[71:72], -v[58:59]
	v_add_f64 v[60:61], v[60:61], -v[62:63]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[58:59], v[58:59], v[60:61]
	v_add_f64 v[58:59], v[73:74], v[58:59]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[58:59], v[64:65], v[58:59]
	v_add_f64 v[60:61], v[69:70], v[58:59]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[62:63], v[60:61], -v[69:70]
	v_ldexp_f64 v[69:70], v[60:61], 1
	v_add_f64 v[58:59], v[58:59], -v[62:63]
	v_mul_f64 v[62:63], v[60:61], v[60:61]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[58:59], v[58:59], 1
	v_fma_f64 v[64:65], v[62:63], s[36:37], s[34:35]
	v_mul_f64 v[60:61], v[60:61], v[62:63]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[64:65], v[62:63], v[64:65], s[38:39]
	v_fma_f64 v[64:65], v[62:63], v[64:65], s[40:41]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[64:65], v[62:63], v[64:65], s[42:43]
	v_fma_f64 v[64:65], v[62:63], v[64:65], s[44:45]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[64:65], v[62:63], v[64:65], s[70:71]
	v_mul_f64 v[60:61], v[60:61], v[64:65]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[62:63], v[69:70], v[60:61]
	v_add_f64 v[64:65], v[62:63], -v[69:70]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[60:61], v[60:61], -v[64:65]
	v_add_f64 v[58:59], v[58:59], v[60:61]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[60:61], v[62:63], v[58:59]
	v_add_f64 v[62:63], v[60:61], -v[62:63]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[58:59], v[58:59], -v[62:63]
	v_cvt_f64_i32_e32 v[62:63], v75
	v_mul_f64 v[64:65], v[62:63], s[46:47]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[69:70], v[62:63], s[46:47], -v[64:65]
	v_fma_f64 v[62:63], v[62:63], s[48:49], v[69:70]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[69:70], v[64:65], v[62:63]
	v_add_f64 v[64:65], v[69:70], -v[64:65]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[62:63], v[62:63], -v[64:65]
	v_add_f64 v[64:65], v[69:70], v[60:61]
	v_add_f64 v[71:72], v[64:65], -v[69:70]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[73:74], v[64:65], -v[71:72]
	v_add_f64 v[60:61], v[60:61], -v[71:72]
	v_add_f64 v[69:70], v[69:70], -v[73:74]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[60:61], v[60:61], v[69:70]
	v_add_f64 v[69:70], v[62:63], v[58:59]
	v_add_f64 v[71:72], v[69:70], -v[62:63]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[60:61], v[69:70], v[60:61]
	v_add_f64 v[73:74], v[69:70], -v[71:72]
	v_add_f64 v[58:59], v[58:59], -v[71:72]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[62:63], v[62:63], -v[73:74]
	v_add_f64 v[58:59], v[58:59], v[62:63]
	v_add_f64 v[62:63], v[64:65], v[60:61]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[64:65], v[62:63], -v[64:65]
	v_add_f64 v[60:61], v[60:61], -v[64:65]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[58:59], v[58:59], v[60:61]
	v_add_f64 v[58:59], v[62:63], v[58:59]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v59, v59, v57, s0
	v_cndmask_b32_e64 v58, v58, v56, s0
	v_cmp_ngt_f64_e64 s0, 0, v[56:57]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[58:59], v[58:59], -2.0
	v_cndmask_b32_e64 v59, 0x7ff80000, v59, s0
	v_cmp_nge_f64_e64 s0, 0, v[56:57]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v58, 0, v58, s0
	v_cmp_neq_f64_e64 s0, 0, v[56:57]
	v_cndmask_b32_e64 v59, 0x7ff00000, v59, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_f64_e64 s0, 0x10000000, v[58:59]
	v_cndmask_b32_e64 v56, 0, 1, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v56, 8, v56
	v_ldexp_f64 v[56:57], v[58:59], v56
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_rsq_f64_e32 v[58:59], v[56:57]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[60:61], v[56:57], v[58:59]
	v_mul_f64 v[58:59], v[58:59], 0.5
	v_fma_f64 v[62:63], -v[58:59], v[60:61], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[60:61], v[60:61], v[62:63], v[60:61]
	v_fma_f64 v[58:59], v[58:59], v[62:63], v[58:59]
	v_fma_f64 v[64:65], -v[60:61], v[60:61], v[56:57]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[60:61], v[64:65], v[58:59], v[60:61]
	v_fma_f64 v[62:63], -v[60:61], v[60:61], v[56:57]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[58:59], v[62:63], v[58:59], v[60:61]
	v_cndmask_b32_e64 v60, 0, 0xffffff80, s0
	v_cmp_class_f64_e64 s0, v[56:57], 0x260
	v_ldexp_f64 v[58:59], v[58:59], v60
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v57, v59, v57, s0
	v_cndmask_b32_e64 v56, v58, v56, s0
	v_mul_f64 v[58:59], v[41:42], v[41:42]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[60:61], v[58:59], 0.5
	v_fma_f64 v[69:70], v[58:59], s[52:53], s[50:51]
	v_add_f64 v[62:63], -v[60:61], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[69:70], v[58:59], v[69:70], s[54:55]
	v_add_f64 v[64:65], -v[62:63], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[69:70], v[58:59], v[69:70], s[56:57]
	v_add_f64 v[60:61], v[64:65], -v[60:61]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[69:70], v[58:59], v[69:70], s[58:59]
	v_mul_f64 v[64:65], v[58:59], v[58:59]
	v_fma_f64 v[60:61], v[41:42], -v[52:53], v[60:61]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[69:70], v[58:59], v[69:70], s[72:73]
	v_fma_f64 v[60:61], v[64:65], v[69:70], v[60:61]
	v_mul_f64 v[64:65], v[41:42], -v[58:59]
	v_mul_f64 v[69:70], v[52:53], 0.5
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[60:61], v[62:63], v[60:61]
	v_fma_f64 v[62:63], v[58:59], s[62:63], s[60:61]
	v_fma_f64 v[62:63], v[58:59], v[62:63], s[64:65]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[62:63], v[58:59], v[62:63], s[66:67]
	v_fma_f64 v[62:63], v[58:59], v[62:63], s[68:69]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[62:63], v[64:65], v[62:63], v[69:70]
	v_fma_f64 v[52:53], v[58:59], v[62:63], -v[52:53]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[52:53], v[64:65], s[74:75], v[52:53]
	v_add_f64 v[41:42], v[41:42], -v[52:53]
	v_and_b32_e32 v52, 1, v68
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, 0, v52
	v_lshlrev_b32_e32 v52, 30, v68
	v_and_b32_e32 v52, 0x80000000, v52
	v_xor_b32_e32 v42, 0x80000000, v42
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v41, v41, v60, s0
	v_cndmask_b32_e64 v42, v42, v61, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v41, 0, v41, s2
	s_cselect_b32 s0, -1, 0
	s_cmp_eq_u32 s78, 3
	v_xor_b32_e32 v42, v42, v52
	s_cselect_b32 s1, -1, 0
	s_cmp_eq_u32 s78, 2
	s_cselect_b32 s3, -1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v42, 0x7ff80000, v42, s2
	s_cmp_eq_u32 s78, 1
	s_cselect_b32 s4, -1, 0
	s_cmp_eq_u32 s78, 0
	v_mul_f64 v[41:42], v[56:57], v[41:42]
	s_cselect_b32 s5, -1, 0
	s_add_i32 s78, s78, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_cmp_lg_u32 s78, 5
	v_cndmask_b32_e64 v36, v36, v42, s0
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e64 v35, v35, v41, s0
	v_cndmask_b32_e64 v34, v34, v42, s1
	v_cndmask_b32_e64 v33, v33, v41, s1
	v_cndmask_b32_e64 v32, v32, v42, s3
	v_cndmask_b32_e64 v31, v31, v41, s3
	v_cndmask_b32_e64 v30, v30, v42, s4
	v_cndmask_b32_e64 v29, v29, v41, s4
	v_cndmask_b32_e64 v28, v28, v42, s5
	v_cndmask_b32_e64 v27, v27, v41, s5
	v_mul_f64 v[41:42], v[39:40], v[39:40]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[52:53], v[41:42], 0.5
	v_fma_f64 v[62:63], v[41:42], s[52:53], s[50:51]
	v_add_f64 v[58:59], -v[52:53], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[62:63], v[41:42], v[62:63], s[54:55]
	v_add_f64 v[60:61], -v[58:59], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[62:63], v[41:42], v[62:63], s[56:57]
	v_add_f64 v[52:53], v[60:61], -v[52:53]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[62:63], v[41:42], v[62:63], s[58:59]
	v_mul_f64 v[60:61], v[41:42], v[41:42]
	v_fma_f64 v[52:53], v[39:40], -v[54:55], v[52:53]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[62:63], v[41:42], v[62:63], s[72:73]
	v_fma_f64 v[52:53], v[60:61], v[62:63], v[52:53]
	v_mul_f64 v[60:61], v[39:40], -v[41:42]
	v_mul_f64 v[62:63], v[54:55], 0.5
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[52:53], v[58:59], v[52:53]
	v_fma_f64 v[58:59], v[41:42], s[62:63], s[60:61]
	v_fma_f64 v[58:59], v[41:42], v[58:59], s[64:65]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[58:59], v[41:42], v[58:59], s[66:67]
	v_fma_f64 v[58:59], v[41:42], v[58:59], s[68:69]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[58:59], v[60:61], v[58:59], v[62:63]
	v_fma_f64 v[41:42], v[41:42], v[58:59], -v[54:55]
	v_dual_mov_b32 v59, v51 :: v_dual_mov_b32 v58, v50
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[41:42], v[60:61], s[74:75], v[41:42]
	v_add_f64 v[39:40], v[39:40], -v[41:42]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v37, v52, v39, s6
	v_cndmask_b32_e64 v39, v53, v40, s6
	v_lshlrev_b32_e32 v40, 30, v67
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v37, 0, v37, s2
	v_xor_b32_e32 v38, v40, v38
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v38, 0x80000000, v38
	v_xor_b32_e32 v38, v39, v38
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v38, 0x7ff80000, v38, s2
	v_mul_f64 v[37:38], v[56:57], v[37:38]
	v_dual_mov_b32 v57, v49 :: v_dual_mov_b32 v56, v48
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v26, v26, v38, s0
	v_cndmask_b32_e64 v25, v25, v37, s0
	v_cndmask_b32_e64 v24, v24, v38, s1
	v_cndmask_b32_e64 v23, v23, v37, s1
	v_cndmask_b32_e64 v22, v22, v38, s3
	v_cndmask_b32_e64 v21, v21, v37, s3
	v_cndmask_b32_e64 v20, v20, v38, s4
	v_cndmask_b32_e64 v19, v19, v37, s4
	v_cndmask_b32_e64 v18, v18, v38, s5
	v_cndmask_b32_e64 v17, v17, v37, s5
	s_cbranch_scc1 .LBB3_177
; %bb.186:                              ; %.lr.ph.i.i.1.i.i.preheader
                                        ;   in Loop: Header=BB3_176 Depth=1
	v_mov_b32_e32 v37, 0
	v_mov_b32_e32 v38, 0
	s_mov_b32 s4, 0
.LBB3_187:                              ; %.lr.ph.i.i.1.i.i
                                        ;   Parent Loop BB3_176 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB3_188 Depth 3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s4, 1
	s_mov_b32 s5, s4
	s_cselect_b32 s0, -1, 0
	s_cmp_eq_u32 s4, 2
	v_cndmask_b32_e64 v39, v28, v30, s0
	v_cndmask_b32_e64 v40, v27, v29, s0
	v_cndmask_b32_e64 v41, v18, v20, s0
	v_cndmask_b32_e64 v42, v17, v19, s0
	s_cselect_b32 s0, -1, 0
	s_cmp_eq_u32 s4, 3
	v_cndmask_b32_e64 v39, v39, v32, s0
	v_cndmask_b32_e64 v40, v40, v31, s0
	v_cndmask_b32_e64 v41, v41, v22, s0
	v_cndmask_b32_e64 v42, v42, v21, s0
	s_cselect_b32 s0, -1, 0
	s_cmp_eq_u32 s4, 4
	v_cndmask_b32_e64 v39, v39, v34, s0
	v_cndmask_b32_e64 v52, v40, v33, s0
	v_cndmask_b32_e64 v41, v41, v24, s0
	v_cndmask_b32_e64 v53, v42, v23, s0
	s_cselect_b32 s0, -1, 0
	s_delay_alu instid0(SALU_CYCLE_1)
	v_cndmask_b32_e64 v40, v39, v36, s0
	v_cndmask_b32_e64 v39, v52, v35, s0
	v_cndmask_b32_e64 v42, v41, v26, s0
	v_cndmask_b32_e64 v41, v53, v25, s0
.LBB3_188:                              ;   Parent Loop BB3_176 Depth=1
                                        ;     Parent Loop BB3_187 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_add_i32 s5, s5, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s5, 1
	s_cselect_b32 s0, -1, 0
	s_cmp_eq_u32 s5, 2
	v_cndmask_b32_e64 v53, v18, v20, s0
	v_cndmask_b32_e64 v54, v17, v19, s0
	s_cselect_b32 s1, -1, 0
	s_cmp_eq_u32 s5, 3
	v_cndmask_b32_e64 v52, v28, v30, s0
	v_cndmask_b32_e64 v53, v53, v22, s1
	v_cndmask_b32_e64 v54, v54, v21, s1
	s_cselect_b32 s2, -1, 0
	s_cmp_eq_u32 s5, 4
	v_cndmask_b32_e64 v52, v52, v32, s1
	v_cndmask_b32_e64 v55, v53, v24, s2
	v_cndmask_b32_e64 v54, v54, v23, s2
	s_cselect_b32 s3, -1, 0
	s_cmp_lt_u32 s5, 4
	v_cndmask_b32_e64 v52, v52, v34, s2
	v_cndmask_b32_e64 v55, v55, v26, s3
	v_cndmask_b32_e64 v54, v54, v25, s3
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v53, v52, v36, s3
	v_cndmask_b32_e64 v52, v27, v29, s0
	v_add_f64 v[54:55], v[41:42], -v[54:55]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v52, v52, v31, s1
	v_cndmask_b32_e64 v52, v52, v33, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v52, v52, v35, s3
	v_add_f64 v[52:53], v[39:40], -v[52:53]
	v_mul_f64 v[54:55], v[54:55], v[54:55]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[52:53], v[52:53], v[52:53], v[54:55]
	v_cmp_lt_f64_e64 s0, v[37:38], v[52:53]
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e64 v38, v38, v53, s0
	v_cndmask_b32_e64 v37, v37, v52, s0
	s_cbranch_scc1 .LBB3_188
; %bb.189:                              ; %.loopexit.i.i.1.i.i
                                        ;   in Loop: Header=BB3_187 Depth=2
	s_add_i32 s4, s4, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s4, 4
	s_cbranch_scc1 .LBB3_187
; %bb.190:                              ;   in Loop: Header=BB3_176 Depth=1
	v_cmp_gt_f64_e64 s0, 0x10000000, v[37:38]
	s_add_i32 s77, s77, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_cmp_lg_u32 s77, 0x10000
	v_cndmask_b32_e64 v39, 0, 1, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v39, 8, v39
	v_ldexp_f64 v[37:38], v[37:38], v39
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_rsq_f64_e32 v[39:40], v[37:38]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[41:42], v[37:38], v[39:40]
	v_mul_f64 v[39:40], v[39:40], 0.5
	v_fma_f64 v[52:53], -v[39:40], v[41:42], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[41:42], v[41:42], v[52:53], v[41:42]
	v_fma_f64 v[39:40], v[39:40], v[52:53], v[39:40]
	v_fma_f64 v[52:53], -v[41:42], v[41:42], v[37:38]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[41:42], v[52:53], v[39:40], v[41:42]
	v_fma_f64 v[52:53], -v[41:42], v[41:42], v[37:38]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[39:40], v[52:53], v[39:40], v[41:42]
	v_cndmask_b32_e64 v41, 0, 0xffffff80, s0
	v_cmp_class_f64_e64 s0, v[37:38], 0x260
	v_ldexp_f64 v[39:40], v[39:40], v41
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v38, v40, v38, s0
	v_cndmask_b32_e64 v37, v39, v37, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[45:46], v[45:46], v[37:38]
	s_cbranch_scc1 .LBB3_176
; %bb.191:                              ; %_ZNK6thrust11hip_rocprim26transform_input_iterator_tIdNS_17counting_iteratorIjNS_11use_defaultES3_S3_EE11estimate_esEixEl.exit.1.i.i
	s_delay_alu instid0(VALU_DEP_1)
	v_ldexp_f64 v[3:4], v[45:46], -16
.LBB3_192:                              ; %Flow1228
	s_or_b32 exec_lo, exec_lo, s76
	v_or_b32_e32 v17, 0x200, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s0, s33, v17
	s_and_saveexec_b32 s78, s0
	s_cbranch_execz .LBB3_212
; %bb.193:
	s_movk_i32 s1, 0x1001
	s_mov_b64 s[6:7], 0
	v_mad_u64_u32 v[5:6], null, v66, s1, 0x7ef55f16
                                        ; implicit-def: $vgpr48_vgpr49
                                        ; implicit-def: $vgpr43_vgpr44
                                        ; implicit-def: $vgpr50_vgpr51
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v6, 19, v5
	v_xor3_b32 v5, v5, v6, 0xc761c23c
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v5, v5, 5, v5
	v_add_nc_u32_e32 v6, 0xe9f8cc1d, v5
	v_lshl_add_u32 v5, v5, 9, 0xaccf6200
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v5, v6, v5
	v_lshlrev_b32_e32 v6, 3, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v5, v5, v6, 0xfd7046c5
	v_lshrrev_b32_e32 v6, 16, v5
	s_delay_alu instid0(VALU_DEP_1)
	v_xor3_b32 v17, v5, v6, 0xb55a4f09
                                        ; implicit-def: $vgpr5_vgpr6
.LBB3_194:                              ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v18, 12, v17
	s_cmp_eq_u32 s6, 0
	s_cselect_b32 s1, -1, 0
	s_cmp_eq_u32 s6, 1
	v_add3_u32 v17, v17, v18, 0x7ed55d16
	s_cselect_b32 s2, -1, 0
	s_cmp_eq_u32 s6, 2
	s_cselect_b32 s3, -1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v18, 19, v17
	s_cmp_eq_u32 s6, 3
	s_cselect_b32 s4, -1, 0
	s_add_u32 s6, s6, 1
	v_xor3_b32 v17, v17, v18, 0xc761c23c
	s_addc_u32 s7, s7, 0
	s_cmp_lg_u32 s6, 4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v17, v17, 5, v17
	v_add_nc_u32_e32 v18, 0xe9f8cc1d, v17
	v_lshl_add_u32 v17, v17, 9, 0xaccf6200
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v17, v18, v17
	v_lshlrev_b32_e32 v18, 3, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v17, v17, v18, 0xfd7046c5
	v_lshrrev_b32_e32 v18, 16, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor3_b32 v17, v17, v18, 0xb55a4f09
	v_lshlrev_b32_e32 v19, 12, v17
	v_xor_b32_e32 v18, s23, v17
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add3_u32 v17, v17, v19, 0x7ed55d16
	v_cndmask_b32_e64 v49, v49, v18, s1
	v_cndmask_b32_e64 v6, v6, v18, s2
	v_cndmask_b32_e64 v44, v44, v18, s3
	v_cndmask_b32_e64 v51, v51, v18, s4
	v_lshrrev_b32_e32 v19, 19, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor3_b32 v17, v17, v19, 0xc761c23c
	v_lshl_add_u32 v17, v17, 5, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v19, 0xe9f8cc1d, v17
	v_lshl_add_u32 v17, v17, 9, 0xaccf6200
	v_xor_b32_e32 v17, v19, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v19, 3, v17
	v_add3_u32 v17, v17, v19, 0xfd7046c5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v19, 16, v17
	v_xor3_b32 v17, v17, v19, 0xb55a4f09
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v18, s22, v17
	v_cndmask_b32_e64 v48, v48, v18, s1
	v_cndmask_b32_e64 v5, v5, v18, s2
	v_cndmask_b32_e64 v43, v43, v18, s3
	v_cndmask_b32_e64 v50, v50, v18, s4
	s_cbranch_scc1 .LBB3_194
; %bb.195:                              ; %.preheader55.i.i.2.i.i.preheader
	v_mov_b32_e32 v45, 0
	v_dual_mov_b32 v46, 0 :: v_dual_mov_b32 v47, 0
	s_mov_b32 s8, 0x54442d18
	s_mov_b32 s12, 0x33145c07
	s_mov_b32 s24, 0x6dc9c883
	s_mov_b32 s28, 0x33145c00
	s_mov_b32 s30, 0x252049c0
	s_mov_b32 s34, 0x55555555
	s_mov_b32 s36, 0x6b47b09a
	s_mov_b32 s38, 0xbf559e2b
	s_mov_b32 s40, 0xd7f4df2e
	s_mov_b32 s42, 0x16291751
	s_mov_b32 s44, 0x9b27acf1
	s_mov_b32 s46, 0x998ef7b6
	s_mov_b32 s48, 0xfefa39ef
	s_mov_b32 s50, 0x3b39803f
	s_mov_b32 s52, 0x9037ab78
	s_mov_b32 s54, 0x46cc5e42
	s_mov_b32 s56, 0xa17f65f6
	s_mov_b32 s58, 0x19f4ec90
	s_mov_b32 s60, 0x16c16967
	s_mov_b32 s62, 0xb42fdfa7
	s_mov_b32 s64, 0xf9a43bb8
	s_mov_b32 s66, 0x796cde01
	s_mov_b32 s68, 0x19e83e5c
	s_mov_b32 s70, 0x11110bb3
	s_mov_b32 s79, 0
	s_mov_b32 s9, 0x401921fb
	s_mov_b32 s11, 0x3ff921fb
	s_mov_b32 s13, 0x3c91a626
	s_mov_b32 s25, 0x3fe45f30
	s_mov_b32 s27, 0xbff921fb
	s_mov_b32 s29, 0xbc91a626
	s_mov_b32 s31, 0xb97b839a
	s_mov_b32 s35, 0x3fe55555
	s_mov_b32 s37, 0x3fc38538
	s_mov_b32 s39, 0x3fc3ab76
	s_mov_b32 s41, 0x3fc7474d
	s_mov_b32 s43, 0x3fcc71c0
	s_mov_b32 s45, 0x3fd24924
	s_mov_b32 s47, 0x3fd99999
	s_mov_b32 s49, 0x3fe62e42
	s_mov_b32 s51, 0x3c7abc9e
	s_mov_b32 s53, 0x3e21eeb6
	s_mov_b32 s55, 0xbda907db
	s_mov_b32 s57, 0xbe927e4f
	s_mov_b32 s59, 0x3efa01a0
	s_mov_b32 s61, 0xbf56c16c
	s_mov_b32 s63, 0xbe5ae600
	s_mov_b32 s65, 0x3de5e0b2
	s_mov_b32 s67, 0x3ec71de3
	s_mov_b32 s69, 0xbf2a01a0
	s_mov_b32 s71, 0x3f811111
	s_mov_b32 s72, 0x55555780
	s_mov_b32 s75, 0x3fa55555
	s_mov_b32 s77, 0xbfc55555
                                        ; implicit-def: $vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31_vgpr32
                                        ; implicit-def: $vgpr27_vgpr28_vgpr29_vgpr30_vgpr31_vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42
.LBB3_196:                              ; %.preheader55.i.i.2.i.i
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB3_197 Depth 2
                                        ;     Child Loop BB3_207 Depth 2
                                        ;       Child Loop BB3_208 Depth 3
	v_dual_mov_b32 v57, v49 :: v_dual_mov_b32 v56, v48
	v_dual_mov_b32 v59, v51 :: v_dual_mov_b32 v58, v50
	s_mov_b32 s80, 0
.LBB3_197:                              ;   Parent Loop BB3_196 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v38, v6, v59
	v_xor_b32_e32 v37, v5, v58
                                        ; implicit-def: $vgpr68
                                        ; implicit-def: $vgpr52_vgpr53
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v70, v38, v57
	v_lshrrev_b64 v[49:50], 19, v[37:38]
	v_lshlrev_b32_e32 v39, 13, v37
	v_xor_b32_e32 v69, v37, v56
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_or_b32_e32 v71, v39, v50
	v_add_co_u32 v37, s1, v49, v69
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v38, s1, v71, v70, s1
	v_lshrrev_b64 v[37:38], 11, v[37:38]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_u32_e32 v[38:39], v38
	v_cvt_f64_u32_e32 v[40:41], v37
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[37:38], v[38:39], 32
	v_add_f64 v[37:38], v[37:38], v[40:41]
                                        ; implicit-def: $vgpr41_vgpr42
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[37:38], v[37:38], 0xffffffcb
	v_mul_f64 v[37:38], v[37:38], s[8:9]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ngt_f64_e64 s1, 0x41d00000, v[37:38]
	v_trig_preop_f64 v[62:63], v[37:38], 0
	v_trig_preop_f64 v[60:61], v[37:38], 1
	v_ldexp_f64 v[64:65], v[37:38], 0xffffff80
	v_trig_preop_f64 v[50:51], v[37:38], 2
	s_and_saveexec_b32 s2, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s4, exec_lo, s2
	s_cbranch_execz .LBB3_199
; %bb.198:                              ;   in Loop: Header=BB3_197 Depth=2
	v_cmp_le_f64_e64 s2, 0x7b000000, v[37:38]
	s_mov_b32 s10, s8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v40, v38, v65, s2
	v_cndmask_b32_e64 v39, v37, v64, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_f64 v[41:42], v[62:63], v[39:40]
	v_mul_f64 v[52:53], v[60:61], v[39:40]
	v_mul_f64 v[78:79], v[50:51], v[39:40]
	v_fma_f64 v[54:55], v[62:63], v[39:40], -v[41:42]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[80:81], v[60:61], v[39:40], -v[52:53]
	v_fma_f64 v[39:40], v[50:51], v[39:40], -v[78:79]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[67:68], v[52:53], v[54:55]
	v_add_f64 v[72:73], v[67:68], -v[52:53]
	v_add_f64 v[76:77], v[41:42], v[67:68]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[74:75], v[67:68], -v[72:73]
	v_add_f64 v[54:55], v[54:55], -v[72:73]
	v_ldexp_f64 v[72:73], v[76:77], -2
	v_add_f64 v[41:42], v[76:77], -v[41:42]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[52:53], v[52:53], -v[74:75]
	v_add_f64 v[74:75], v[78:79], v[80:81]
	v_cmp_neq_f64_e64 s2, 0x7ff00000, |v[72:73]|
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[41:42], v[67:68], -v[41:42]
	v_add_f64 v[52:53], v[54:55], v[52:53]
	v_fract_f64_e32 v[54:55], v[72:73]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[67:68], v[74:75], v[52:53]
	v_cndmask_b32_e64 v55, 0, v55, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v54, 0, v54, s2
	v_ldexp_f64 v[54:55], v[54:55], 2
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[72:73], v[41:42], v[67:68]
	v_add_f64 v[82:83], v[67:68], -v[74:75]
	v_add_f64 v[76:77], v[72:73], v[54:55]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[88:89], v[67:68], -v[82:83]
	v_add_f64 v[52:53], v[52:53], -v[82:83]
	v_add_f64 v[41:42], v[72:73], -v[41:42]
	v_cmp_gt_f64_e64 s2, 0, v[76:77]
	v_add_f64 v[76:77], v[74:75], -v[78:79]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[41:42], v[67:68], -v[41:42]
	v_cndmask_b32_e64 v48, 0, 0x40100000, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[86:87], v[74:75], -v[76:77]
	v_add_f64 v[76:77], v[80:81], -v[76:77]
	v_add_f64 v[74:75], v[74:75], -v[88:89]
	v_add_f64 v[54:55], v[54:55], v[47:48]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[80:81], v[78:79], -v[86:87]
	v_add_f64 v[52:53], v[52:53], v[74:75]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[84:85], v[72:73], v[54:55]
	v_add_f64 v[76:77], v[76:77], v[80:81]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_i32_f64_e32 v48, v[84:85]
	v_add_f64 v[52:53], v[76:77], v[52:53]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_i32_e32 v[82:83], v48
	v_add_f64 v[39:40], v[39:40], v[52:53]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[54:55], v[54:55], -v[82:83]
	v_add_f64 v[39:40], v[41:42], v[39:40]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[74:75], v[72:73], v[54:55]
	v_add_f64 v[52:53], v[74:75], -v[54:55]
	v_cmp_le_f64_e64 s2, 0.5, v[74:75]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[41:42], v[72:73], -v[52:53]
	v_add_co_ci_u32_e64 v68, s3, 0, v48, s2
	v_cndmask_b32_e64 v48, 0, 0x3ff00000, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[39:40], v[39:40], v[41:42]
	v_add_f64 v[41:42], v[74:75], -v[47:48]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[52:53], v[41:42], v[39:40]
	v_mul_f64 v[54:55], v[52:53], s[10:11]
	v_add_f64 v[41:42], v[52:53], -v[41:42]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[72:73], v[52:53], s[10:11], -v[54:55]
	v_add_f64 v[39:40], v[39:40], -v[41:42]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[41:42], v[52:53], s[12:13], v[72:73]
	v_fma_f64 v[39:40], v[39:40], s[10:11], v[41:42]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[41:42], v[54:55], v[39:40]
	v_add_f64 v[52:53], v[41:42], -v[54:55]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[52:53], v[39:40], -v[52:53]
.LBB3_199:                              ; %Flow1224
                                        ;   in Loop: Header=BB3_197 Depth=2
	s_and_not1_saveexec_b32 s2, s4
	s_cbranch_execz .LBB3_201
; %bb.200:                              ;   in Loop: Header=BB3_197 Depth=2
	v_mul_f64 v[39:40], v[37:38], s[24:25]
	s_mov_b32 s26, s8
	s_mov_b32 s4, s28
	s_mov_b32 s5, s13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[39:40], v[39:40]
	v_fma_f64 v[41:42], v[39:40], s[26:27], v[37:38]
	v_mul_f64 v[52:53], v[39:40], s[28:29]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[67:68], v[39:40], s[28:29], v[41:42]
	v_add_f64 v[54:55], v[41:42], v[52:53]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[41:42], v[41:42], -v[54:55]
	v_add_f64 v[54:55], v[54:55], -v[67:68]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[41:42], v[41:42], v[52:53]
	v_fma_f64 v[52:53], v[39:40], s[4:5], v[52:53]
	v_add_f64 v[41:42], v[54:55], v[41:42]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[41:42], v[41:42], -v[52:53]
	v_fma_f64 v[52:53], v[39:40], s[30:31], v[41:42]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[41:42], v[67:68], v[52:53]
	v_add_f64 v[54:55], v[41:42], -v[67:68]
	v_cvt_i32_f64_e32 v68, v[39:40]
	s_delay_alu instid0(VALU_DEP_2)
	v_add_f64 v[52:53], v[52:53], -v[54:55]
.LBB3_201:                              ; %_ZL3cosd.exit.i.i.2.i.i
                                        ;   in Loop: Header=BB3_197 Depth=2
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr67
                                        ; implicit-def: $vgpr39_vgpr40
                                        ; implicit-def: $vgpr54_vgpr55
	s_and_saveexec_b32 s2, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s3, exec_lo, s2
	s_cbranch_execz .LBB3_203
; %bb.202:                              ;   in Loop: Header=BB3_197 Depth=2
	v_cmp_le_f64_e64 s1, 0x7b000000, v[37:38]
	s_mov_b32 s10, s8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v40, v38, v65, s1
	v_cndmask_b32_e64 v39, v37, v64, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_f64 v[54:55], v[62:63], v[39:40]
	v_mul_f64 v[64:65], v[60:61], v[39:40]
	v_mul_f64 v[80:81], v[50:51], v[39:40]
	v_fma_f64 v[62:63], v[62:63], v[39:40], -v[54:55]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[60:61], v[60:61], v[39:40], -v[64:65]
	v_fma_f64 v[39:40], v[50:51], v[39:40], -v[80:81]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[72:73], v[64:65], v[62:63]
	v_add_f64 v[74:75], v[72:73], -v[64:65]
	v_add_f64 v[78:79], v[54:55], v[72:73]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[76:77], v[72:73], -v[74:75]
	v_add_f64 v[62:63], v[62:63], -v[74:75]
	v_ldexp_f64 v[74:75], v[78:79], -2
	v_add_f64 v[54:55], v[78:79], -v[54:55]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[64:65], v[64:65], -v[76:77]
	v_add_f64 v[76:77], v[80:81], v[60:61]
	v_cmp_neq_f64_e64 s1, 0x7ff00000, |v[74:75]|
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[54:55], v[72:73], -v[54:55]
	v_add_f64 v[62:63], v[62:63], v[64:65]
	v_fract_f64_e32 v[64:65], v[74:75]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[72:73], v[76:77], v[62:63]
	v_cndmask_b32_e64 v65, 0, v65, s1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v64, 0, v64, s1
	v_ldexp_f64 v[64:65], v[64:65], 2
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[74:75], v[54:55], v[72:73]
	v_add_f64 v[82:83], v[72:73], -v[76:77]
	v_add_f64 v[78:79], v[74:75], v[64:65]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[88:89], v[72:73], -v[82:83]
	v_add_f64 v[62:63], v[62:63], -v[82:83]
	v_add_f64 v[50:51], v[74:75], -v[54:55]
	v_cmp_gt_f64_e64 s1, 0, v[78:79]
	v_add_f64 v[78:79], v[76:77], -v[80:81]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[50:51], v[72:73], -v[50:51]
	v_cndmask_b32_e64 v48, 0, 0x40100000, s1
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[86:87], v[76:77], -v[78:79]
	v_add_f64 v[60:61], v[60:61], -v[78:79]
	v_add_f64 v[76:77], v[76:77], -v[88:89]
	v_add_f64 v[64:65], v[64:65], v[47:48]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[78:79], v[80:81], -v[86:87]
	v_add_f64 v[62:63], v[62:63], v[76:77]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[84:85], v[74:75], v[64:65]
	v_add_f64 v[60:61], v[60:61], v[78:79]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_i32_f64_e32 v48, v[84:85]
	v_add_f64 v[54:55], v[60:61], v[62:63]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_i32_e32 v[82:83], v48
	v_add_f64 v[39:40], v[39:40], v[54:55]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[64:65], v[64:65], -v[82:83]
	v_add_f64 v[39:40], v[50:51], v[39:40]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[60:61], v[74:75], v[64:65]
	v_add_f64 v[54:55], v[60:61], -v[64:65]
	v_cmp_le_f64_e64 s1, 0.5, v[60:61]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[50:51], v[74:75], -v[54:55]
	v_add_co_ci_u32_e64 v67, s2, 0, v48, s1
	v_cndmask_b32_e64 v48, 0, 0x3ff00000, s1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[39:40], v[39:40], v[50:51]
	v_add_f64 v[50:51], v[60:61], -v[47:48]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[54:55], v[50:51], v[39:40]
	v_mul_f64 v[60:61], v[54:55], s[10:11]
	v_add_f64 v[50:51], v[54:55], -v[50:51]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[62:63], v[54:55], s[10:11], -v[60:61]
	v_add_f64 v[39:40], v[39:40], -v[50:51]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[50:51], v[54:55], s[12:13], v[62:63]
	v_fma_f64 v[50:51], v[39:40], s[10:11], v[50:51]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[39:40], v[60:61], v[50:51]
	v_add_f64 v[54:55], v[39:40], -v[60:61]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[54:55], v[50:51], -v[54:55]
.LBB3_203:                              ; %Flow1223
                                        ;   in Loop: Header=BB3_197 Depth=2
	s_and_not1_saveexec_b32 s1, s3
	s_cbranch_execz .LBB3_205
; %bb.204:                              ;   in Loop: Header=BB3_197 Depth=2
	v_mul_f64 v[39:40], v[37:38], s[24:25]
	s_mov_b32 s26, s8
	s_mov_b32 s2, s28
	s_mov_b32 s3, s13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[50:51], v[39:40]
	v_fma_f64 v[39:40], v[50:51], s[26:27], v[37:38]
	v_mul_f64 v[54:55], v[50:51], s[28:29]
	v_cvt_i32_f64_e32 v67, v[50:51]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[62:63], v[50:51], s[28:29], v[39:40]
	v_add_f64 v[60:61], v[39:40], v[54:55]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[39:40], v[39:40], -v[60:61]
	v_add_f64 v[60:61], v[60:61], -v[62:63]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[39:40], v[39:40], v[54:55]
	v_fma_f64 v[54:55], v[50:51], s[2:3], v[54:55]
	v_add_f64 v[39:40], v[60:61], v[39:40]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[39:40], v[39:40], -v[54:55]
	v_fma_f64 v[54:55], v[50:51], s[30:31], v[39:40]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[39:40], v[62:63], v[54:55]
	v_add_f64 v[60:61], v[39:40], -v[62:63]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[54:55], v[54:55], -v[60:61]
.LBB3_205:                              ; %_ZL3sind.exit.i.i.2.i.i
                                        ;   in Loop: Header=BB3_197 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	v_xor_b32_e32 v43, v43, v56
	v_add_co_u32 v56, s1, v58, v56
	v_xor_b32_e32 v44, v44, v57
	v_add_co_ci_u32_e64 v57, s1, v59, v57, s1
	v_lshlrev_b64 v[50:51], 17, v[5:6]
	v_xor_b32_e32 v5, v43, v5
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_xor_b32_e32 v6, v44, v6
	v_lshrrev_b64 v[56:57], 11, v[56:57]
	s_mov_b32 s73, s35
	s_mov_b32 s74, s34
	v_xor_b32_e32 v48, v44, v51
	v_xor_b32_e32 v50, v43, v50
	v_lshlrev_b64 v[43:44], 17, v[5:6]
	v_cvt_f64_u32_e32 v[57:58], v57
	v_xor_b32_e32 v61, v6, v71
	v_xor_b32_e32 v51, v48, v70
	v_xor_b32_e32 v50, v50, v69
	v_xor_b32_e32 v60, v5, v49
	s_mov_b32 s76, s34
	v_xor_b32_e32 v49, v61, v70
	v_xor_b32_e32 v6, v51, v6
	v_xor_b32_e32 v5, v50, v5
	v_xor_b32_e32 v44, v51, v44
	v_xor_b32_e32 v43, v50, v43
	v_lshrrev_b64 v[50:51], 19, v[60:61]
	v_xor_b32_e32 v48, v60, v69
	v_lshlrev_b32_e32 v60, 13, v60
	v_cmp_lg_f64_e64 s3, 0x7ff00000, v[37:38]
	s_cmp_eq_u32 s80, 4
	v_and_b32_e32 v37, 1, v67
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_or_b32_e32 v51, v60, v51
	v_cvt_f64_u32_e32 v[59:60], v56
	v_cmp_eq_u32_e64 s7, 0, v37
	v_ldexp_f64 v[57:58], v[57:58], 32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[56:57], v[57:58], v[59:60]
	v_ldexp_f64 v[56:57], v[56:57], 0xffffffcb
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_frexp_mant_f64_e32 v[58:59], v[56:57]
	v_cmp_gt_f64_e64 s1, s[34:35], v[58:59]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v60, 0, 1, s1
	v_ldexp_f64 v[58:59], v[58:59], v60
	v_frexp_exp_i32_f64_e32 v60, v[56:57]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[62:63], v[58:59], 1.0
	v_subrev_co_ci_u32_e64 v75, s1, 0, v60, s1
	v_add_f64 v[60:61], v[58:59], -1.0
	v_cmp_eq_f64_e64 s1, 0x7ff00000, v[56:57]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[64:65], v[62:63], -1.0
	v_add_f64 v[58:59], v[58:59], -v[64:65]
	v_rcp_f64_e32 v[64:65], v[62:63]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[69:70], -v[62:63], v[64:65], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[64:65], v[69:70], v[64:65], v[64:65]
	v_fma_f64 v[69:70], -v[62:63], v[64:65], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[64:65], v[69:70], v[64:65], v[64:65]
	v_mul_f64 v[69:70], v[60:61], v[64:65]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[71:72], v[62:63], v[69:70]
	v_fma_f64 v[62:63], v[69:70], v[62:63], -v[71:72]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[58:59], v[69:70], v[58:59], v[62:63]
	v_add_f64 v[62:63], v[71:72], v[58:59]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[73:74], v[60:61], -v[62:63]
	v_add_f64 v[71:72], v[62:63], -v[71:72]
	v_add_f64 v[60:61], v[60:61], -v[73:74]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[58:59], v[71:72], -v[58:59]
	v_add_f64 v[60:61], v[60:61], -v[62:63]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[58:59], v[58:59], v[60:61]
	v_add_f64 v[58:59], v[73:74], v[58:59]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[58:59], v[64:65], v[58:59]
	v_add_f64 v[60:61], v[69:70], v[58:59]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[62:63], v[60:61], -v[69:70]
	v_ldexp_f64 v[69:70], v[60:61], 1
	v_add_f64 v[58:59], v[58:59], -v[62:63]
	v_mul_f64 v[62:63], v[60:61], v[60:61]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[58:59], v[58:59], 1
	v_fma_f64 v[64:65], v[62:63], s[38:39], s[36:37]
	v_mul_f64 v[60:61], v[60:61], v[62:63]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[64:65], v[62:63], v[64:65], s[40:41]
	v_fma_f64 v[64:65], v[62:63], v[64:65], s[42:43]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[64:65], v[62:63], v[64:65], s[44:45]
	v_fma_f64 v[64:65], v[62:63], v[64:65], s[46:47]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[64:65], v[62:63], v[64:65], s[72:73]
	v_mul_f64 v[60:61], v[60:61], v[64:65]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[62:63], v[69:70], v[60:61]
	v_add_f64 v[64:65], v[62:63], -v[69:70]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[60:61], v[60:61], -v[64:65]
	v_add_f64 v[58:59], v[58:59], v[60:61]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[60:61], v[62:63], v[58:59]
	v_add_f64 v[62:63], v[60:61], -v[62:63]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[58:59], v[58:59], -v[62:63]
	v_cvt_f64_i32_e32 v[62:63], v75
	v_mul_f64 v[64:65], v[62:63], s[48:49]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[69:70], v[62:63], s[48:49], -v[64:65]
	v_fma_f64 v[62:63], v[62:63], s[50:51], v[69:70]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[69:70], v[64:65], v[62:63]
	v_add_f64 v[64:65], v[69:70], -v[64:65]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[62:63], v[62:63], -v[64:65]
	v_add_f64 v[64:65], v[69:70], v[60:61]
	v_add_f64 v[71:72], v[64:65], -v[69:70]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[73:74], v[64:65], -v[71:72]
	v_add_f64 v[60:61], v[60:61], -v[71:72]
	v_add_f64 v[69:70], v[69:70], -v[73:74]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[60:61], v[60:61], v[69:70]
	v_add_f64 v[69:70], v[62:63], v[58:59]
	v_add_f64 v[71:72], v[69:70], -v[62:63]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[60:61], v[69:70], v[60:61]
	v_add_f64 v[73:74], v[69:70], -v[71:72]
	v_add_f64 v[58:59], v[58:59], -v[71:72]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[62:63], v[62:63], -v[73:74]
	v_add_f64 v[58:59], v[58:59], v[62:63]
	v_add_f64 v[62:63], v[64:65], v[60:61]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[64:65], v[62:63], -v[64:65]
	v_add_f64 v[60:61], v[60:61], -v[64:65]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[58:59], v[58:59], v[60:61]
	v_add_f64 v[58:59], v[62:63], v[58:59]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v59, v59, v57, s1
	v_cndmask_b32_e64 v58, v58, v56, s1
	v_cmp_ngt_f64_e64 s1, 0, v[56:57]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[58:59], v[58:59], -2.0
	v_cndmask_b32_e64 v59, 0x7ff80000, v59, s1
	v_cmp_nge_f64_e64 s1, 0, v[56:57]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v58, 0, v58, s1
	v_cmp_neq_f64_e64 s1, 0, v[56:57]
	v_cndmask_b32_e64 v59, 0x7ff00000, v59, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_f64_e64 s1, 0x10000000, v[58:59]
	v_cndmask_b32_e64 v56, 0, 1, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v56, 8, v56
	v_ldexp_f64 v[56:57], v[58:59], v56
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_rsq_f64_e32 v[58:59], v[56:57]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[60:61], v[56:57], v[58:59]
	v_mul_f64 v[58:59], v[58:59], 0.5
	v_fma_f64 v[62:63], -v[58:59], v[60:61], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[60:61], v[60:61], v[62:63], v[60:61]
	v_fma_f64 v[58:59], v[58:59], v[62:63], v[58:59]
	v_fma_f64 v[64:65], -v[60:61], v[60:61], v[56:57]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[60:61], v[64:65], v[58:59], v[60:61]
	v_fma_f64 v[62:63], -v[60:61], v[60:61], v[56:57]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[58:59], v[62:63], v[58:59], v[60:61]
	v_cndmask_b32_e64 v60, 0, 0xffffff80, s1
	v_cmp_class_f64_e64 s1, v[56:57], 0x260
	v_ldexp_f64 v[58:59], v[58:59], v60
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v57, v59, v57, s1
	v_cndmask_b32_e64 v56, v58, v56, s1
	v_mul_f64 v[58:59], v[41:42], v[41:42]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[60:61], v[58:59], 0.5
	v_fma_f64 v[69:70], v[58:59], s[54:55], s[52:53]
	v_add_f64 v[62:63], -v[60:61], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[69:70], v[58:59], v[69:70], s[56:57]
	v_add_f64 v[64:65], -v[62:63], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[69:70], v[58:59], v[69:70], s[58:59]
	v_add_f64 v[60:61], v[64:65], -v[60:61]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[69:70], v[58:59], v[69:70], s[60:61]
	v_mul_f64 v[64:65], v[58:59], v[58:59]
	v_fma_f64 v[60:61], v[41:42], -v[52:53], v[60:61]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[69:70], v[58:59], v[69:70], s[74:75]
	v_fma_f64 v[60:61], v[64:65], v[69:70], v[60:61]
	v_mul_f64 v[64:65], v[41:42], -v[58:59]
	v_mul_f64 v[69:70], v[52:53], 0.5
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[60:61], v[62:63], v[60:61]
	v_fma_f64 v[62:63], v[58:59], s[64:65], s[62:63]
	v_fma_f64 v[62:63], v[58:59], v[62:63], s[66:67]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[62:63], v[58:59], v[62:63], s[68:69]
	v_fma_f64 v[62:63], v[58:59], v[62:63], s[70:71]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[62:63], v[64:65], v[62:63], v[69:70]
	v_fma_f64 v[52:53], v[58:59], v[62:63], -v[52:53]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[52:53], v[64:65], s[76:77], v[52:53]
	v_add_f64 v[41:42], v[41:42], -v[52:53]
	v_and_b32_e32 v52, 1, v68
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s1, 0, v52
	v_lshlrev_b32_e32 v52, 30, v68
	v_and_b32_e32 v52, 0x80000000, v52
	v_xor_b32_e32 v42, 0x80000000, v42
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v41, v41, v60, s1
	v_cndmask_b32_e64 v42, v42, v61, s1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v41, 0, v41, s3
	s_cselect_b32 s1, -1, 0
	s_cmp_eq_u32 s80, 3
	v_xor_b32_e32 v42, v42, v52
	s_cselect_b32 s2, -1, 0
	s_cmp_eq_u32 s80, 2
	s_cselect_b32 s4, -1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v42, 0x7ff80000, v42, s3
	s_cmp_eq_u32 s80, 1
	s_cselect_b32 s5, -1, 0
	s_cmp_eq_u32 s80, 0
	v_mul_f64 v[41:42], v[56:57], v[41:42]
	s_cselect_b32 s6, -1, 0
	s_add_i32 s80, s80, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_cmp_lg_u32 s80, 5
	v_cndmask_b32_e64 v36, v36, v42, s1
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e64 v35, v35, v41, s1
	v_cndmask_b32_e64 v34, v34, v42, s2
	v_cndmask_b32_e64 v33, v33, v41, s2
	v_cndmask_b32_e64 v32, v32, v42, s4
	v_cndmask_b32_e64 v31, v31, v41, s4
	v_cndmask_b32_e64 v30, v30, v42, s5
	v_cndmask_b32_e64 v29, v29, v41, s5
	v_cndmask_b32_e64 v28, v28, v42, s6
	v_cndmask_b32_e64 v27, v27, v41, s6
	v_mul_f64 v[41:42], v[39:40], v[39:40]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[52:53], v[41:42], 0.5
	v_fma_f64 v[62:63], v[41:42], s[54:55], s[52:53]
	v_add_f64 v[58:59], -v[52:53], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[62:63], v[41:42], v[62:63], s[56:57]
	v_add_f64 v[60:61], -v[58:59], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[62:63], v[41:42], v[62:63], s[58:59]
	v_add_f64 v[52:53], v[60:61], -v[52:53]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[62:63], v[41:42], v[62:63], s[60:61]
	v_mul_f64 v[60:61], v[41:42], v[41:42]
	v_fma_f64 v[52:53], v[39:40], -v[54:55], v[52:53]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[62:63], v[41:42], v[62:63], s[74:75]
	v_fma_f64 v[52:53], v[60:61], v[62:63], v[52:53]
	v_mul_f64 v[60:61], v[39:40], -v[41:42]
	v_mul_f64 v[62:63], v[54:55], 0.5
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[52:53], v[58:59], v[52:53]
	v_fma_f64 v[58:59], v[41:42], s[64:65], s[62:63]
	v_fma_f64 v[58:59], v[41:42], v[58:59], s[66:67]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[58:59], v[41:42], v[58:59], s[68:69]
	v_fma_f64 v[58:59], v[41:42], v[58:59], s[70:71]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[58:59], v[60:61], v[58:59], v[62:63]
	v_fma_f64 v[41:42], v[41:42], v[58:59], -v[54:55]
	v_dual_mov_b32 v59, v51 :: v_dual_mov_b32 v58, v50
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[41:42], v[60:61], s[76:77], v[41:42]
	v_add_f64 v[39:40], v[39:40], -v[41:42]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v37, v52, v39, s7
	v_cndmask_b32_e64 v39, v53, v40, s7
	v_lshlrev_b32_e32 v40, 30, v67
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v37, 0, v37, s3
	v_xor_b32_e32 v38, v40, v38
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v38, 0x80000000, v38
	v_xor_b32_e32 v38, v39, v38
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v38, 0x7ff80000, v38, s3
	v_mul_f64 v[37:38], v[56:57], v[37:38]
	v_dual_mov_b32 v57, v49 :: v_dual_mov_b32 v56, v48
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v26, v26, v38, s1
	v_cndmask_b32_e64 v25, v25, v37, s1
	v_cndmask_b32_e64 v24, v24, v38, s2
	v_cndmask_b32_e64 v23, v23, v37, s2
	v_cndmask_b32_e64 v22, v22, v38, s4
	v_cndmask_b32_e64 v21, v21, v37, s4
	v_cndmask_b32_e64 v20, v20, v38, s5
	v_cndmask_b32_e64 v19, v19, v37, s5
	v_cndmask_b32_e64 v18, v18, v38, s6
	v_cndmask_b32_e64 v17, v17, v37, s6
	s_cbranch_scc1 .LBB3_197
; %bb.206:                              ; %.lr.ph.i.i.2.i.i.preheader
                                        ;   in Loop: Header=BB3_196 Depth=1
	v_mov_b32_e32 v37, 0
	v_mov_b32_e32 v38, 0
	s_mov_b32 s5, 0
.LBB3_207:                              ; %.lr.ph.i.i.2.i.i
                                        ;   Parent Loop BB3_196 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB3_208 Depth 3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s5, 1
	s_mov_b32 s6, s5
	s_cselect_b32 s1, -1, 0
	s_cmp_eq_u32 s5, 2
	v_cndmask_b32_e64 v39, v28, v30, s1
	v_cndmask_b32_e64 v40, v27, v29, s1
	v_cndmask_b32_e64 v41, v18, v20, s1
	v_cndmask_b32_e64 v42, v17, v19, s1
	s_cselect_b32 s1, -1, 0
	s_cmp_eq_u32 s5, 3
	v_cndmask_b32_e64 v39, v39, v32, s1
	v_cndmask_b32_e64 v40, v40, v31, s1
	v_cndmask_b32_e64 v41, v41, v22, s1
	v_cndmask_b32_e64 v42, v42, v21, s1
	s_cselect_b32 s1, -1, 0
	s_cmp_eq_u32 s5, 4
	v_cndmask_b32_e64 v39, v39, v34, s1
	v_cndmask_b32_e64 v52, v40, v33, s1
	v_cndmask_b32_e64 v41, v41, v24, s1
	v_cndmask_b32_e64 v53, v42, v23, s1
	s_cselect_b32 s1, -1, 0
	s_delay_alu instid0(SALU_CYCLE_1)
	v_cndmask_b32_e64 v40, v39, v36, s1
	v_cndmask_b32_e64 v39, v52, v35, s1
	v_cndmask_b32_e64 v42, v41, v26, s1
	v_cndmask_b32_e64 v41, v53, v25, s1
.LBB3_208:                              ;   Parent Loop BB3_196 Depth=1
                                        ;     Parent Loop BB3_207 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_add_i32 s6, s6, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s6, 1
	s_cselect_b32 s1, -1, 0
	s_cmp_eq_u32 s6, 2
	v_cndmask_b32_e64 v53, v18, v20, s1
	v_cndmask_b32_e64 v54, v17, v19, s1
	s_cselect_b32 s2, -1, 0
	s_cmp_eq_u32 s6, 3
	v_cndmask_b32_e64 v52, v28, v30, s1
	v_cndmask_b32_e64 v53, v53, v22, s2
	v_cndmask_b32_e64 v54, v54, v21, s2
	s_cselect_b32 s3, -1, 0
	s_cmp_eq_u32 s6, 4
	v_cndmask_b32_e64 v52, v52, v32, s2
	v_cndmask_b32_e64 v55, v53, v24, s3
	v_cndmask_b32_e64 v54, v54, v23, s3
	s_cselect_b32 s4, -1, 0
	s_cmp_lt_u32 s6, 4
	v_cndmask_b32_e64 v52, v52, v34, s3
	v_cndmask_b32_e64 v55, v55, v26, s4
	v_cndmask_b32_e64 v54, v54, v25, s4
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v53, v52, v36, s4
	v_cndmask_b32_e64 v52, v27, v29, s1
	v_add_f64 v[54:55], v[41:42], -v[54:55]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v52, v52, v31, s2
	v_cndmask_b32_e64 v52, v52, v33, s3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v52, v52, v35, s4
	v_add_f64 v[52:53], v[39:40], -v[52:53]
	v_mul_f64 v[54:55], v[54:55], v[54:55]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[52:53], v[52:53], v[52:53], v[54:55]
	v_cmp_lt_f64_e64 s1, v[37:38], v[52:53]
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e64 v38, v38, v53, s1
	v_cndmask_b32_e64 v37, v37, v52, s1
	s_cbranch_scc1 .LBB3_208
; %bb.209:                              ; %.loopexit.i.i.2.i.i
                                        ;   in Loop: Header=BB3_207 Depth=2
	s_add_i32 s5, s5, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s5, 4
	s_cbranch_scc1 .LBB3_207
; %bb.210:                              ;   in Loop: Header=BB3_196 Depth=1
	v_cmp_gt_f64_e64 s1, 0x10000000, v[37:38]
	s_add_i32 s79, s79, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_cmp_lg_u32 s79, 0x10000
	v_cndmask_b32_e64 v39, 0, 1, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v39, 8, v39
	v_ldexp_f64 v[37:38], v[37:38], v39
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_rsq_f64_e32 v[39:40], v[37:38]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[41:42], v[37:38], v[39:40]
	v_mul_f64 v[39:40], v[39:40], 0.5
	v_fma_f64 v[52:53], -v[39:40], v[41:42], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[41:42], v[41:42], v[52:53], v[41:42]
	v_fma_f64 v[39:40], v[39:40], v[52:53], v[39:40]
	v_fma_f64 v[52:53], -v[41:42], v[41:42], v[37:38]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[41:42], v[52:53], v[39:40], v[41:42]
	v_fma_f64 v[52:53], -v[41:42], v[41:42], v[37:38]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[39:40], v[52:53], v[39:40], v[41:42]
	v_cndmask_b32_e64 v41, 0, 0xffffff80, s1
	v_cmp_class_f64_e64 s1, v[37:38], 0x260
	v_ldexp_f64 v[39:40], v[39:40], v41
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v38, v40, v38, s1
	v_cndmask_b32_e64 v37, v39, v37, s1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[45:46], v[45:46], v[37:38]
	s_cbranch_scc1 .LBB3_196
; %bb.211:                              ; %_ZNK6thrust11hip_rocprim26transform_input_iterator_tIdNS_17counting_iteratorIjNS_11use_defaultES3_S3_EE11estimate_esEixEl.exit.2.i.i
	s_delay_alu instid0(VALU_DEP_1)
	v_ldexp_f64 v[5:6], v[45:46], -16
.LBB3_212:                              ; %Flow1225
	s_or_b32 exec_lo, exec_lo, s78
	v_or_b32_e32 v17, 0x300, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s1, s33, v17
	s_and_saveexec_b32 s78, s1
	s_cbranch_execz .LBB3_232
; %bb.213:
	s_movk_i32 s2, 0x1001
	s_mov_b64 s[6:7], 0
	v_mad_u64_u32 v[7:8], null, v66, s2, 0x7f056016
                                        ; implicit-def: $vgpr48_vgpr49
                                        ; implicit-def: $vgpr43_vgpr44
                                        ; implicit-def: $vgpr50_vgpr51
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v8, 19, v7
	v_xor3_b32 v7, v7, v8, 0xc761c23c
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v7, v7, 5, v7
	v_add_nc_u32_e32 v8, 0xe9f8cc1d, v7
	v_lshl_add_u32 v7, v7, 9, 0xaccf6200
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v7, v8, v7
	v_lshlrev_b32_e32 v8, 3, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v7, v7, v8, 0xfd7046c5
	v_lshrrev_b32_e32 v8, 16, v7
	s_delay_alu instid0(VALU_DEP_1)
	v_xor3_b32 v17, v7, v8, 0xb55a4f09
                                        ; implicit-def: $vgpr7_vgpr8
.LBB3_214:                              ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v18, 12, v17
	s_cmp_eq_u32 s6, 0
	s_cselect_b32 s2, -1, 0
	s_cmp_eq_u32 s6, 1
	v_add3_u32 v17, v17, v18, 0x7ed55d16
	s_cselect_b32 s3, -1, 0
	s_cmp_eq_u32 s6, 2
	s_cselect_b32 s4, -1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v18, 19, v17
	s_cmp_eq_u32 s6, 3
	s_cselect_b32 s5, -1, 0
	s_add_u32 s6, s6, 1
	v_xor3_b32 v17, v17, v18, 0xc761c23c
	s_addc_u32 s7, s7, 0
	s_cmp_lg_u32 s6, 4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v17, v17, 5, v17
	v_add_nc_u32_e32 v18, 0xe9f8cc1d, v17
	v_lshl_add_u32 v17, v17, 9, 0xaccf6200
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v17, v18, v17
	v_lshlrev_b32_e32 v18, 3, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v17, v17, v18, 0xfd7046c5
	v_lshrrev_b32_e32 v18, 16, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor3_b32 v17, v17, v18, 0xb55a4f09
	v_lshlrev_b32_e32 v19, 12, v17
	v_xor_b32_e32 v18, s23, v17
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add3_u32 v17, v17, v19, 0x7ed55d16
	v_cndmask_b32_e64 v49, v49, v18, s2
	v_cndmask_b32_e64 v8, v8, v18, s3
	v_cndmask_b32_e64 v44, v44, v18, s4
	v_cndmask_b32_e64 v51, v51, v18, s5
	v_lshrrev_b32_e32 v19, 19, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor3_b32 v17, v17, v19, 0xc761c23c
	v_lshl_add_u32 v17, v17, 5, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v19, 0xe9f8cc1d, v17
	v_lshl_add_u32 v17, v17, 9, 0xaccf6200
	v_xor_b32_e32 v17, v19, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v19, 3, v17
	v_add3_u32 v17, v17, v19, 0xfd7046c5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v19, 16, v17
	v_xor3_b32 v17, v17, v19, 0xb55a4f09
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v18, s22, v17
	v_cndmask_b32_e64 v48, v48, v18, s2
	v_cndmask_b32_e64 v7, v7, v18, s3
	v_cndmask_b32_e64 v43, v43, v18, s4
	v_cndmask_b32_e64 v50, v50, v18, s5
	s_cbranch_scc1 .LBB3_214
; %bb.215:                              ; %.preheader55.i.i.3.i.i.preheader
	v_mov_b32_e32 v45, 0
	v_dual_mov_b32 v46, 0 :: v_dual_mov_b32 v47, 0
	s_mov_b32 s10, 0x54442d18
	s_mov_b32 s12, 0x33145c07
	s_mov_b32 s24, 0x6dc9c883
	s_mov_b32 s28, 0x33145c00
	s_mov_b32 s30, 0x252049c0
	s_mov_b32 s34, 0x55555555
	s_mov_b32 s36, 0x6b47b09a
	s_mov_b32 s38, 0xbf559e2b
	s_mov_b32 s40, 0xd7f4df2e
	s_mov_b32 s42, 0x16291751
	s_mov_b32 s44, 0x9b27acf1
	s_mov_b32 s46, 0x998ef7b6
	s_mov_b32 s48, 0xfefa39ef
	s_mov_b32 s50, 0x3b39803f
	s_mov_b32 s52, 0x9037ab78
	s_mov_b32 s54, 0x46cc5e42
	s_mov_b32 s56, 0xa17f65f6
	s_mov_b32 s58, 0x19f4ec90
	s_mov_b32 s60, 0x16c16967
	s_mov_b32 s62, 0xb42fdfa7
	s_mov_b32 s64, 0xf9a43bb8
	s_mov_b32 s66, 0x796cde01
	s_mov_b32 s68, 0x19e83e5c
	s_mov_b32 s70, 0x11110bb3
	s_mov_b32 s79, 0
	s_mov_b32 s11, 0x401921fb
	s_mov_b32 s9, 0x3ff921fb
	s_mov_b32 s13, 0x3c91a626
	s_mov_b32 s25, 0x3fe45f30
	s_mov_b32 s27, 0xbff921fb
	s_mov_b32 s29, 0xbc91a626
	s_mov_b32 s31, 0xb97b839a
	s_mov_b32 s35, 0x3fe55555
	s_mov_b32 s37, 0x3fc38538
	s_mov_b32 s39, 0x3fc3ab76
	s_mov_b32 s41, 0x3fc7474d
	s_mov_b32 s43, 0x3fcc71c0
	s_mov_b32 s45, 0x3fd24924
	s_mov_b32 s47, 0x3fd99999
	s_mov_b32 s49, 0x3fe62e42
	s_mov_b32 s51, 0x3c7abc9e
	s_mov_b32 s53, 0x3e21eeb6
	s_mov_b32 s55, 0xbda907db
	s_mov_b32 s57, 0xbe927e4f
	s_mov_b32 s59, 0x3efa01a0
	s_mov_b32 s61, 0xbf56c16c
	s_mov_b32 s63, 0xbe5ae600
	s_mov_b32 s65, 0x3de5e0b2
	s_mov_b32 s67, 0x3ec71de3
	s_mov_b32 s69, 0xbf2a01a0
	s_mov_b32 s71, 0x3f811111
	s_mov_b32 s72, 0x55555780
	s_mov_b32 s75, 0x3fa55555
	s_mov_b32 s77, 0xbfc55555
                                        ; implicit-def: $vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31_vgpr32
                                        ; implicit-def: $vgpr27_vgpr28_vgpr29_vgpr30_vgpr31_vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42
.LBB3_216:                              ; %.preheader55.i.i.3.i.i
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB3_217 Depth 2
                                        ;     Child Loop BB3_227 Depth 2
                                        ;       Child Loop BB3_228 Depth 3
	v_dual_mov_b32 v57, v49 :: v_dual_mov_b32 v56, v48
	v_dual_mov_b32 v59, v51 :: v_dual_mov_b32 v58, v50
	s_mov_b32 s80, 0
.LBB3_217:                              ;   Parent Loop BB3_216 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v38, v8, v59
	v_xor_b32_e32 v37, v7, v58
                                        ; implicit-def: $vgpr68
                                        ; implicit-def: $vgpr52_vgpr53
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v70, v38, v57
	v_lshrrev_b64 v[49:50], 19, v[37:38]
	v_lshlrev_b32_e32 v39, 13, v37
	v_xor_b32_e32 v69, v37, v56
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_or_b32_e32 v71, v39, v50
	v_add_co_u32 v37, s2, v49, v69
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v38, s2, v71, v70, s2
	v_lshrrev_b64 v[37:38], 11, v[37:38]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_u32_e32 v[38:39], v38
	v_cvt_f64_u32_e32 v[40:41], v37
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[37:38], v[38:39], 32
	v_add_f64 v[37:38], v[37:38], v[40:41]
                                        ; implicit-def: $vgpr41_vgpr42
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[37:38], v[37:38], 0xffffffcb
	v_mul_f64 v[37:38], v[37:38], s[10:11]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ngt_f64_e64 s2, 0x41d00000, v[37:38]
	v_trig_preop_f64 v[62:63], v[37:38], 0
	v_trig_preop_f64 v[60:61], v[37:38], 1
	v_ldexp_f64 v[64:65], v[37:38], 0xffffff80
	v_trig_preop_f64 v[50:51], v[37:38], 2
	s_and_saveexec_b32 s3, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s5, exec_lo, s3
	s_cbranch_execz .LBB3_219
; %bb.218:                              ;   in Loop: Header=BB3_217 Depth=2
	v_cmp_le_f64_e64 s3, 0x7b000000, v[37:38]
	s_mov_b32 s8, s10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v40, v38, v65, s3
	v_cndmask_b32_e64 v39, v37, v64, s3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_f64 v[41:42], v[62:63], v[39:40]
	v_mul_f64 v[52:53], v[60:61], v[39:40]
	v_mul_f64 v[78:79], v[50:51], v[39:40]
	v_fma_f64 v[54:55], v[62:63], v[39:40], -v[41:42]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[80:81], v[60:61], v[39:40], -v[52:53]
	v_fma_f64 v[39:40], v[50:51], v[39:40], -v[78:79]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[67:68], v[52:53], v[54:55]
	v_add_f64 v[72:73], v[67:68], -v[52:53]
	v_add_f64 v[76:77], v[41:42], v[67:68]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[74:75], v[67:68], -v[72:73]
	v_add_f64 v[54:55], v[54:55], -v[72:73]
	v_ldexp_f64 v[72:73], v[76:77], -2
	v_add_f64 v[41:42], v[76:77], -v[41:42]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[52:53], v[52:53], -v[74:75]
	v_add_f64 v[74:75], v[78:79], v[80:81]
	v_cmp_neq_f64_e64 s3, 0x7ff00000, |v[72:73]|
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[41:42], v[67:68], -v[41:42]
	v_add_f64 v[52:53], v[54:55], v[52:53]
	v_fract_f64_e32 v[54:55], v[72:73]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[67:68], v[74:75], v[52:53]
	v_cndmask_b32_e64 v55, 0, v55, s3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v54, 0, v54, s3
	v_ldexp_f64 v[54:55], v[54:55], 2
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[72:73], v[41:42], v[67:68]
	v_add_f64 v[82:83], v[67:68], -v[74:75]
	v_add_f64 v[76:77], v[72:73], v[54:55]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[88:89], v[67:68], -v[82:83]
	v_add_f64 v[52:53], v[52:53], -v[82:83]
	v_add_f64 v[41:42], v[72:73], -v[41:42]
	v_cmp_gt_f64_e64 s3, 0, v[76:77]
	v_add_f64 v[76:77], v[74:75], -v[78:79]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[41:42], v[67:68], -v[41:42]
	v_cndmask_b32_e64 v48, 0, 0x40100000, s3
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[86:87], v[74:75], -v[76:77]
	v_add_f64 v[76:77], v[80:81], -v[76:77]
	v_add_f64 v[74:75], v[74:75], -v[88:89]
	v_add_f64 v[54:55], v[54:55], v[47:48]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[80:81], v[78:79], -v[86:87]
	v_add_f64 v[52:53], v[52:53], v[74:75]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[84:85], v[72:73], v[54:55]
	v_add_f64 v[76:77], v[76:77], v[80:81]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_i32_f64_e32 v48, v[84:85]
	v_add_f64 v[52:53], v[76:77], v[52:53]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_i32_e32 v[82:83], v48
	v_add_f64 v[39:40], v[39:40], v[52:53]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[54:55], v[54:55], -v[82:83]
	v_add_f64 v[39:40], v[41:42], v[39:40]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[74:75], v[72:73], v[54:55]
	v_add_f64 v[52:53], v[74:75], -v[54:55]
	v_cmp_le_f64_e64 s3, 0.5, v[74:75]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[41:42], v[72:73], -v[52:53]
	v_add_co_ci_u32_e64 v68, s4, 0, v48, s3
	v_cndmask_b32_e64 v48, 0, 0x3ff00000, s3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[39:40], v[39:40], v[41:42]
	v_add_f64 v[41:42], v[74:75], -v[47:48]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[52:53], v[41:42], v[39:40]
	v_mul_f64 v[54:55], v[52:53], s[8:9]
	v_add_f64 v[41:42], v[52:53], -v[41:42]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[72:73], v[52:53], s[8:9], -v[54:55]
	v_add_f64 v[39:40], v[39:40], -v[41:42]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[41:42], v[52:53], s[12:13], v[72:73]
	v_fma_f64 v[39:40], v[39:40], s[8:9], v[41:42]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[41:42], v[54:55], v[39:40]
	v_add_f64 v[52:53], v[41:42], -v[54:55]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[52:53], v[39:40], -v[52:53]
.LBB3_219:                              ; %Flow1221
                                        ;   in Loop: Header=BB3_217 Depth=2
	s_and_not1_saveexec_b32 s3, s5
	s_cbranch_execz .LBB3_221
; %bb.220:                              ;   in Loop: Header=BB3_217 Depth=2
	v_mul_f64 v[39:40], v[37:38], s[24:25]
	s_mov_b32 s26, s10
	s_mov_b32 s4, s28
	s_mov_b32 s5, s13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[39:40], v[39:40]
	v_fma_f64 v[41:42], v[39:40], s[26:27], v[37:38]
	v_mul_f64 v[52:53], v[39:40], s[28:29]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[67:68], v[39:40], s[28:29], v[41:42]
	v_add_f64 v[54:55], v[41:42], v[52:53]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[41:42], v[41:42], -v[54:55]
	v_add_f64 v[54:55], v[54:55], -v[67:68]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[41:42], v[41:42], v[52:53]
	v_fma_f64 v[52:53], v[39:40], s[4:5], v[52:53]
	v_add_f64 v[41:42], v[54:55], v[41:42]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[41:42], v[41:42], -v[52:53]
	v_fma_f64 v[52:53], v[39:40], s[30:31], v[41:42]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[41:42], v[67:68], v[52:53]
	v_add_f64 v[54:55], v[41:42], -v[67:68]
	v_cvt_i32_f64_e32 v68, v[39:40]
	s_delay_alu instid0(VALU_DEP_2)
	v_add_f64 v[52:53], v[52:53], -v[54:55]
.LBB3_221:                              ; %_ZL3cosd.exit.i.i.3.i.i
                                        ;   in Loop: Header=BB3_217 Depth=2
	s_or_b32 exec_lo, exec_lo, s3
                                        ; implicit-def: $vgpr67
                                        ; implicit-def: $vgpr39_vgpr40
                                        ; implicit-def: $vgpr54_vgpr55
	s_and_saveexec_b32 s3, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s4, exec_lo, s3
	s_cbranch_execz .LBB3_223
; %bb.222:                              ;   in Loop: Header=BB3_217 Depth=2
	v_cmp_le_f64_e64 s2, 0x7b000000, v[37:38]
	s_mov_b32 s8, s10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v40, v38, v65, s2
	v_cndmask_b32_e64 v39, v37, v64, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_f64 v[54:55], v[62:63], v[39:40]
	v_mul_f64 v[64:65], v[60:61], v[39:40]
	v_mul_f64 v[80:81], v[50:51], v[39:40]
	v_fma_f64 v[62:63], v[62:63], v[39:40], -v[54:55]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[60:61], v[60:61], v[39:40], -v[64:65]
	v_fma_f64 v[39:40], v[50:51], v[39:40], -v[80:81]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[72:73], v[64:65], v[62:63]
	v_add_f64 v[74:75], v[72:73], -v[64:65]
	v_add_f64 v[78:79], v[54:55], v[72:73]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[76:77], v[72:73], -v[74:75]
	v_add_f64 v[62:63], v[62:63], -v[74:75]
	v_ldexp_f64 v[74:75], v[78:79], -2
	v_add_f64 v[54:55], v[78:79], -v[54:55]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[64:65], v[64:65], -v[76:77]
	v_add_f64 v[76:77], v[80:81], v[60:61]
	v_cmp_neq_f64_e64 s2, 0x7ff00000, |v[74:75]|
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[54:55], v[72:73], -v[54:55]
	v_add_f64 v[62:63], v[62:63], v[64:65]
	v_fract_f64_e32 v[64:65], v[74:75]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[72:73], v[76:77], v[62:63]
	v_cndmask_b32_e64 v65, 0, v65, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v64, 0, v64, s2
	v_ldexp_f64 v[64:65], v[64:65], 2
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[74:75], v[54:55], v[72:73]
	v_add_f64 v[82:83], v[72:73], -v[76:77]
	v_add_f64 v[78:79], v[74:75], v[64:65]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[88:89], v[72:73], -v[82:83]
	v_add_f64 v[62:63], v[62:63], -v[82:83]
	v_add_f64 v[50:51], v[74:75], -v[54:55]
	v_cmp_gt_f64_e64 s2, 0, v[78:79]
	v_add_f64 v[78:79], v[76:77], -v[80:81]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[50:51], v[72:73], -v[50:51]
	v_cndmask_b32_e64 v48, 0, 0x40100000, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[86:87], v[76:77], -v[78:79]
	v_add_f64 v[60:61], v[60:61], -v[78:79]
	v_add_f64 v[76:77], v[76:77], -v[88:89]
	v_add_f64 v[64:65], v[64:65], v[47:48]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[78:79], v[80:81], -v[86:87]
	v_add_f64 v[62:63], v[62:63], v[76:77]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[84:85], v[74:75], v[64:65]
	v_add_f64 v[60:61], v[60:61], v[78:79]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_i32_f64_e32 v48, v[84:85]
	v_add_f64 v[54:55], v[60:61], v[62:63]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_i32_e32 v[82:83], v48
	v_add_f64 v[39:40], v[39:40], v[54:55]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[64:65], v[64:65], -v[82:83]
	v_add_f64 v[39:40], v[50:51], v[39:40]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[60:61], v[74:75], v[64:65]
	v_add_f64 v[54:55], v[60:61], -v[64:65]
	v_cmp_le_f64_e64 s2, 0.5, v[60:61]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[50:51], v[74:75], -v[54:55]
	v_add_co_ci_u32_e64 v67, s3, 0, v48, s2
	v_cndmask_b32_e64 v48, 0, 0x3ff00000, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[39:40], v[39:40], v[50:51]
	v_add_f64 v[50:51], v[60:61], -v[47:48]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[54:55], v[50:51], v[39:40]
	v_mul_f64 v[60:61], v[54:55], s[8:9]
	v_add_f64 v[50:51], v[54:55], -v[50:51]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[62:63], v[54:55], s[8:9], -v[60:61]
	v_add_f64 v[39:40], v[39:40], -v[50:51]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[50:51], v[54:55], s[12:13], v[62:63]
	v_fma_f64 v[50:51], v[39:40], s[8:9], v[50:51]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[39:40], v[60:61], v[50:51]
	v_add_f64 v[54:55], v[39:40], -v[60:61]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[54:55], v[50:51], -v[54:55]
.LBB3_223:                              ; %Flow1220
                                        ;   in Loop: Header=BB3_217 Depth=2
	s_and_not1_saveexec_b32 s2, s4
	s_cbranch_execz .LBB3_225
; %bb.224:                              ;   in Loop: Header=BB3_217 Depth=2
	v_mul_f64 v[39:40], v[37:38], s[24:25]
	s_mov_b32 s26, s10
	s_mov_b32 s4, s28
	s_mov_b32 s5, s13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[50:51], v[39:40]
	v_fma_f64 v[39:40], v[50:51], s[26:27], v[37:38]
	v_mul_f64 v[54:55], v[50:51], s[28:29]
	v_cvt_i32_f64_e32 v67, v[50:51]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[62:63], v[50:51], s[28:29], v[39:40]
	v_add_f64 v[60:61], v[39:40], v[54:55]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[39:40], v[39:40], -v[60:61]
	v_add_f64 v[60:61], v[60:61], -v[62:63]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[39:40], v[39:40], v[54:55]
	v_fma_f64 v[54:55], v[50:51], s[4:5], v[54:55]
	v_add_f64 v[39:40], v[60:61], v[39:40]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[39:40], v[39:40], -v[54:55]
	v_fma_f64 v[54:55], v[50:51], s[30:31], v[39:40]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[39:40], v[62:63], v[54:55]
	v_add_f64 v[60:61], v[39:40], -v[62:63]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[54:55], v[54:55], -v[60:61]
.LBB3_225:                              ; %_ZL3sind.exit.i.i.3.i.i
                                        ;   in Loop: Header=BB3_217 Depth=2
	s_or_b32 exec_lo, exec_lo, s2
	v_xor_b32_e32 v43, v43, v56
	v_add_co_u32 v56, s2, v58, v56
	v_xor_b32_e32 v44, v44, v57
	v_add_co_ci_u32_e64 v57, s2, v59, v57, s2
	v_lshlrev_b64 v[50:51], 17, v[7:8]
	v_xor_b32_e32 v7, v43, v7
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_xor_b32_e32 v8, v44, v8
	v_lshrrev_b64 v[56:57], 11, v[56:57]
	s_mov_b32 s73, s35
	s_mov_b32 s74, s34
	v_xor_b32_e32 v48, v44, v51
	v_xor_b32_e32 v50, v43, v50
	v_lshlrev_b64 v[43:44], 17, v[7:8]
	v_cvt_f64_u32_e32 v[57:58], v57
	v_xor_b32_e32 v61, v8, v71
	v_xor_b32_e32 v51, v48, v70
	v_xor_b32_e32 v50, v50, v69
	v_xor_b32_e32 v60, v7, v49
	s_mov_b32 s76, s34
	v_xor_b32_e32 v49, v61, v70
	v_xor_b32_e32 v8, v51, v8
	v_xor_b32_e32 v7, v50, v7
	v_xor_b32_e32 v44, v51, v44
	v_xor_b32_e32 v43, v50, v43
	v_lshrrev_b64 v[50:51], 19, v[60:61]
	v_xor_b32_e32 v48, v60, v69
	v_lshlrev_b32_e32 v60, 13, v60
	v_cmp_lg_f64_e64 s4, 0x7ff00000, v[37:38]
	s_cmp_eq_u32 s80, 4
	v_and_b32_e32 v37, 1, v67
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_or_b32_e32 v51, v60, v51
	v_cvt_f64_u32_e32 v[59:60], v56
	v_cmp_eq_u32_e64 s8, 0, v37
	v_ldexp_f64 v[57:58], v[57:58], 32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[56:57], v[57:58], v[59:60]
	v_ldexp_f64 v[56:57], v[56:57], 0xffffffcb
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_frexp_mant_f64_e32 v[58:59], v[56:57]
	v_cmp_gt_f64_e64 s2, s[34:35], v[58:59]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v60, 0, 1, s2
	v_ldexp_f64 v[58:59], v[58:59], v60
	v_frexp_exp_i32_f64_e32 v60, v[56:57]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[62:63], v[58:59], 1.0
	v_subrev_co_ci_u32_e64 v75, s2, 0, v60, s2
	v_add_f64 v[60:61], v[58:59], -1.0
	v_cmp_eq_f64_e64 s2, 0x7ff00000, v[56:57]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[64:65], v[62:63], -1.0
	v_add_f64 v[58:59], v[58:59], -v[64:65]
	v_rcp_f64_e32 v[64:65], v[62:63]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[69:70], -v[62:63], v[64:65], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[64:65], v[69:70], v[64:65], v[64:65]
	v_fma_f64 v[69:70], -v[62:63], v[64:65], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[64:65], v[69:70], v[64:65], v[64:65]
	v_mul_f64 v[69:70], v[60:61], v[64:65]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[71:72], v[62:63], v[69:70]
	v_fma_f64 v[62:63], v[69:70], v[62:63], -v[71:72]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[58:59], v[69:70], v[58:59], v[62:63]
	v_add_f64 v[62:63], v[71:72], v[58:59]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[73:74], v[60:61], -v[62:63]
	v_add_f64 v[71:72], v[62:63], -v[71:72]
	v_add_f64 v[60:61], v[60:61], -v[73:74]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[58:59], v[71:72], -v[58:59]
	v_add_f64 v[60:61], v[60:61], -v[62:63]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[58:59], v[58:59], v[60:61]
	v_add_f64 v[58:59], v[73:74], v[58:59]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[58:59], v[64:65], v[58:59]
	v_add_f64 v[60:61], v[69:70], v[58:59]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[62:63], v[60:61], -v[69:70]
	v_ldexp_f64 v[69:70], v[60:61], 1
	v_add_f64 v[58:59], v[58:59], -v[62:63]
	v_mul_f64 v[62:63], v[60:61], v[60:61]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[58:59], v[58:59], 1
	v_fma_f64 v[64:65], v[62:63], s[38:39], s[36:37]
	v_mul_f64 v[60:61], v[60:61], v[62:63]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[64:65], v[62:63], v[64:65], s[40:41]
	v_fma_f64 v[64:65], v[62:63], v[64:65], s[42:43]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[64:65], v[62:63], v[64:65], s[44:45]
	v_fma_f64 v[64:65], v[62:63], v[64:65], s[46:47]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[64:65], v[62:63], v[64:65], s[72:73]
	v_mul_f64 v[60:61], v[60:61], v[64:65]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[62:63], v[69:70], v[60:61]
	v_add_f64 v[64:65], v[62:63], -v[69:70]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[60:61], v[60:61], -v[64:65]
	v_add_f64 v[58:59], v[58:59], v[60:61]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[60:61], v[62:63], v[58:59]
	v_add_f64 v[62:63], v[60:61], -v[62:63]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[58:59], v[58:59], -v[62:63]
	v_cvt_f64_i32_e32 v[62:63], v75
	v_mul_f64 v[64:65], v[62:63], s[48:49]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[69:70], v[62:63], s[48:49], -v[64:65]
	v_fma_f64 v[62:63], v[62:63], s[50:51], v[69:70]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[69:70], v[64:65], v[62:63]
	v_add_f64 v[64:65], v[69:70], -v[64:65]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[62:63], v[62:63], -v[64:65]
	v_add_f64 v[64:65], v[69:70], v[60:61]
	v_add_f64 v[71:72], v[64:65], -v[69:70]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[73:74], v[64:65], -v[71:72]
	v_add_f64 v[60:61], v[60:61], -v[71:72]
	v_add_f64 v[69:70], v[69:70], -v[73:74]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[60:61], v[60:61], v[69:70]
	v_add_f64 v[69:70], v[62:63], v[58:59]
	v_add_f64 v[71:72], v[69:70], -v[62:63]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[60:61], v[69:70], v[60:61]
	v_add_f64 v[73:74], v[69:70], -v[71:72]
	v_add_f64 v[58:59], v[58:59], -v[71:72]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[62:63], v[62:63], -v[73:74]
	v_add_f64 v[58:59], v[58:59], v[62:63]
	v_add_f64 v[62:63], v[64:65], v[60:61]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[64:65], v[62:63], -v[64:65]
	v_add_f64 v[60:61], v[60:61], -v[64:65]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[58:59], v[58:59], v[60:61]
	v_add_f64 v[58:59], v[62:63], v[58:59]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v59, v59, v57, s2
	v_cndmask_b32_e64 v58, v58, v56, s2
	v_cmp_ngt_f64_e64 s2, 0, v[56:57]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[58:59], v[58:59], -2.0
	v_cndmask_b32_e64 v59, 0x7ff80000, v59, s2
	v_cmp_nge_f64_e64 s2, 0, v[56:57]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v58, 0, v58, s2
	v_cmp_neq_f64_e64 s2, 0, v[56:57]
	v_cndmask_b32_e64 v59, 0x7ff00000, v59, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_f64_e64 s2, 0x10000000, v[58:59]
	v_cndmask_b32_e64 v56, 0, 1, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v56, 8, v56
	v_ldexp_f64 v[56:57], v[58:59], v56
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_rsq_f64_e32 v[58:59], v[56:57]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[60:61], v[56:57], v[58:59]
	v_mul_f64 v[58:59], v[58:59], 0.5
	v_fma_f64 v[62:63], -v[58:59], v[60:61], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[60:61], v[60:61], v[62:63], v[60:61]
	v_fma_f64 v[58:59], v[58:59], v[62:63], v[58:59]
	v_fma_f64 v[64:65], -v[60:61], v[60:61], v[56:57]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[60:61], v[64:65], v[58:59], v[60:61]
	v_fma_f64 v[62:63], -v[60:61], v[60:61], v[56:57]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[58:59], v[62:63], v[58:59], v[60:61]
	v_cndmask_b32_e64 v60, 0, 0xffffff80, s2
	v_cmp_class_f64_e64 s2, v[56:57], 0x260
	v_ldexp_f64 v[58:59], v[58:59], v60
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v57, v59, v57, s2
	v_cndmask_b32_e64 v56, v58, v56, s2
	v_mul_f64 v[58:59], v[41:42], v[41:42]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[60:61], v[58:59], 0.5
	v_fma_f64 v[69:70], v[58:59], s[54:55], s[52:53]
	v_add_f64 v[62:63], -v[60:61], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[69:70], v[58:59], v[69:70], s[56:57]
	v_add_f64 v[64:65], -v[62:63], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[69:70], v[58:59], v[69:70], s[58:59]
	v_add_f64 v[60:61], v[64:65], -v[60:61]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[69:70], v[58:59], v[69:70], s[60:61]
	v_mul_f64 v[64:65], v[58:59], v[58:59]
	v_fma_f64 v[60:61], v[41:42], -v[52:53], v[60:61]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[69:70], v[58:59], v[69:70], s[74:75]
	v_fma_f64 v[60:61], v[64:65], v[69:70], v[60:61]
	v_mul_f64 v[64:65], v[41:42], -v[58:59]
	v_mul_f64 v[69:70], v[52:53], 0.5
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[60:61], v[62:63], v[60:61]
	v_fma_f64 v[62:63], v[58:59], s[64:65], s[62:63]
	v_fma_f64 v[62:63], v[58:59], v[62:63], s[66:67]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[62:63], v[58:59], v[62:63], s[68:69]
	v_fma_f64 v[62:63], v[58:59], v[62:63], s[70:71]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[62:63], v[64:65], v[62:63], v[69:70]
	v_fma_f64 v[52:53], v[58:59], v[62:63], -v[52:53]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[52:53], v[64:65], s[76:77], v[52:53]
	v_add_f64 v[41:42], v[41:42], -v[52:53]
	v_and_b32_e32 v52, 1, v68
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s2, 0, v52
	v_lshlrev_b32_e32 v52, 30, v68
	v_and_b32_e32 v52, 0x80000000, v52
	v_xor_b32_e32 v42, 0x80000000, v42
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v41, v41, v60, s2
	v_cndmask_b32_e64 v42, v42, v61, s2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v41, 0, v41, s4
	s_cselect_b32 s2, -1, 0
	s_cmp_eq_u32 s80, 3
	v_xor_b32_e32 v42, v42, v52
	s_cselect_b32 s3, -1, 0
	s_cmp_eq_u32 s80, 2
	s_cselect_b32 s5, -1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v42, 0x7ff80000, v42, s4
	s_cmp_eq_u32 s80, 1
	s_cselect_b32 s6, -1, 0
	s_cmp_eq_u32 s80, 0
	v_mul_f64 v[41:42], v[56:57], v[41:42]
	s_cselect_b32 s7, -1, 0
	s_add_i32 s80, s80, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_cmp_lg_u32 s80, 5
	v_cndmask_b32_e64 v36, v36, v42, s2
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e64 v35, v35, v41, s2
	v_cndmask_b32_e64 v34, v34, v42, s3
	v_cndmask_b32_e64 v33, v33, v41, s3
	v_cndmask_b32_e64 v32, v32, v42, s5
	v_cndmask_b32_e64 v31, v31, v41, s5
	v_cndmask_b32_e64 v30, v30, v42, s6
	v_cndmask_b32_e64 v29, v29, v41, s6
	v_cndmask_b32_e64 v28, v28, v42, s7
	v_cndmask_b32_e64 v27, v27, v41, s7
	v_mul_f64 v[41:42], v[39:40], v[39:40]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[52:53], v[41:42], 0.5
	v_fma_f64 v[62:63], v[41:42], s[54:55], s[52:53]
	v_add_f64 v[58:59], -v[52:53], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[62:63], v[41:42], v[62:63], s[56:57]
	v_add_f64 v[60:61], -v[58:59], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[62:63], v[41:42], v[62:63], s[58:59]
	v_add_f64 v[52:53], v[60:61], -v[52:53]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[62:63], v[41:42], v[62:63], s[60:61]
	v_mul_f64 v[60:61], v[41:42], v[41:42]
	v_fma_f64 v[52:53], v[39:40], -v[54:55], v[52:53]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[62:63], v[41:42], v[62:63], s[74:75]
	v_fma_f64 v[52:53], v[60:61], v[62:63], v[52:53]
	v_mul_f64 v[60:61], v[39:40], -v[41:42]
	v_mul_f64 v[62:63], v[54:55], 0.5
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[52:53], v[58:59], v[52:53]
	v_fma_f64 v[58:59], v[41:42], s[64:65], s[62:63]
	v_fma_f64 v[58:59], v[41:42], v[58:59], s[66:67]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[58:59], v[41:42], v[58:59], s[68:69]
	v_fma_f64 v[58:59], v[41:42], v[58:59], s[70:71]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[58:59], v[60:61], v[58:59], v[62:63]
	v_fma_f64 v[41:42], v[41:42], v[58:59], -v[54:55]
	v_dual_mov_b32 v59, v51 :: v_dual_mov_b32 v58, v50
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[41:42], v[60:61], s[76:77], v[41:42]
	v_add_f64 v[39:40], v[39:40], -v[41:42]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v37, v52, v39, s8
	v_cndmask_b32_e64 v39, v53, v40, s8
	v_lshlrev_b32_e32 v40, 30, v67
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v37, 0, v37, s4
	v_xor_b32_e32 v38, v40, v38
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v38, 0x80000000, v38
	v_xor_b32_e32 v38, v39, v38
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v38, 0x7ff80000, v38, s4
	v_mul_f64 v[37:38], v[56:57], v[37:38]
	v_dual_mov_b32 v57, v49 :: v_dual_mov_b32 v56, v48
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v26, v26, v38, s2
	v_cndmask_b32_e64 v25, v25, v37, s2
	v_cndmask_b32_e64 v24, v24, v38, s3
	v_cndmask_b32_e64 v23, v23, v37, s3
	v_cndmask_b32_e64 v22, v22, v38, s5
	v_cndmask_b32_e64 v21, v21, v37, s5
	v_cndmask_b32_e64 v20, v20, v38, s6
	v_cndmask_b32_e64 v19, v19, v37, s6
	v_cndmask_b32_e64 v18, v18, v38, s7
	v_cndmask_b32_e64 v17, v17, v37, s7
	s_cbranch_scc1 .LBB3_217
; %bb.226:                              ; %.lr.ph.i.i.3.i.i.preheader
                                        ;   in Loop: Header=BB3_216 Depth=1
	v_mov_b32_e32 v37, 0
	v_mov_b32_e32 v38, 0
	s_mov_b32 s6, 0
.LBB3_227:                              ; %.lr.ph.i.i.3.i.i
                                        ;   Parent Loop BB3_216 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB3_228 Depth 3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s6, 1
	s_mov_b32 s7, s6
	s_cselect_b32 s2, -1, 0
	s_cmp_eq_u32 s6, 2
	v_cndmask_b32_e64 v39, v28, v30, s2
	v_cndmask_b32_e64 v40, v27, v29, s2
	v_cndmask_b32_e64 v41, v18, v20, s2
	v_cndmask_b32_e64 v42, v17, v19, s2
	s_cselect_b32 s2, -1, 0
	s_cmp_eq_u32 s6, 3
	v_cndmask_b32_e64 v39, v39, v32, s2
	v_cndmask_b32_e64 v40, v40, v31, s2
	v_cndmask_b32_e64 v41, v41, v22, s2
	v_cndmask_b32_e64 v42, v42, v21, s2
	s_cselect_b32 s2, -1, 0
	s_cmp_eq_u32 s6, 4
	v_cndmask_b32_e64 v39, v39, v34, s2
	v_cndmask_b32_e64 v52, v40, v33, s2
	v_cndmask_b32_e64 v41, v41, v24, s2
	v_cndmask_b32_e64 v53, v42, v23, s2
	s_cselect_b32 s2, -1, 0
	s_delay_alu instid0(SALU_CYCLE_1)
	v_cndmask_b32_e64 v40, v39, v36, s2
	v_cndmask_b32_e64 v39, v52, v35, s2
	v_cndmask_b32_e64 v42, v41, v26, s2
	v_cndmask_b32_e64 v41, v53, v25, s2
.LBB3_228:                              ;   Parent Loop BB3_216 Depth=1
                                        ;     Parent Loop BB3_227 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_add_i32 s7, s7, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s7, 1
	s_cselect_b32 s2, -1, 0
	s_cmp_eq_u32 s7, 2
	v_cndmask_b32_e64 v53, v18, v20, s2
	v_cndmask_b32_e64 v54, v17, v19, s2
	s_cselect_b32 s3, -1, 0
	s_cmp_eq_u32 s7, 3
	v_cndmask_b32_e64 v52, v28, v30, s2
	v_cndmask_b32_e64 v53, v53, v22, s3
	v_cndmask_b32_e64 v54, v54, v21, s3
	s_cselect_b32 s4, -1, 0
	s_cmp_eq_u32 s7, 4
	v_cndmask_b32_e64 v52, v52, v32, s3
	v_cndmask_b32_e64 v55, v53, v24, s4
	v_cndmask_b32_e64 v54, v54, v23, s4
	s_cselect_b32 s5, -1, 0
	s_cmp_lt_u32 s7, 4
	v_cndmask_b32_e64 v52, v52, v34, s4
	v_cndmask_b32_e64 v55, v55, v26, s5
	v_cndmask_b32_e64 v54, v54, v25, s5
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v53, v52, v36, s5
	v_cndmask_b32_e64 v52, v27, v29, s2
	v_add_f64 v[54:55], v[41:42], -v[54:55]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v52, v52, v31, s3
	v_cndmask_b32_e64 v52, v52, v33, s4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v52, v52, v35, s5
	v_add_f64 v[52:53], v[39:40], -v[52:53]
	v_mul_f64 v[54:55], v[54:55], v[54:55]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[52:53], v[52:53], v[52:53], v[54:55]
	v_cmp_lt_f64_e64 s2, v[37:38], v[52:53]
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e64 v38, v38, v53, s2
	v_cndmask_b32_e64 v37, v37, v52, s2
	s_cbranch_scc1 .LBB3_228
; %bb.229:                              ; %.loopexit.i.i.3.i.i
                                        ;   in Loop: Header=BB3_227 Depth=2
	s_add_i32 s6, s6, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s6, 4
	s_cbranch_scc1 .LBB3_227
; %bb.230:                              ;   in Loop: Header=BB3_216 Depth=1
	v_cmp_gt_f64_e64 s2, 0x10000000, v[37:38]
	s_add_i32 s79, s79, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_cmp_lg_u32 s79, 0x10000
	v_cndmask_b32_e64 v39, 0, 1, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v39, 8, v39
	v_ldexp_f64 v[37:38], v[37:38], v39
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_rsq_f64_e32 v[39:40], v[37:38]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[41:42], v[37:38], v[39:40]
	v_mul_f64 v[39:40], v[39:40], 0.5
	v_fma_f64 v[52:53], -v[39:40], v[41:42], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[41:42], v[41:42], v[52:53], v[41:42]
	v_fma_f64 v[39:40], v[39:40], v[52:53], v[39:40]
	v_fma_f64 v[52:53], -v[41:42], v[41:42], v[37:38]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[41:42], v[52:53], v[39:40], v[41:42]
	v_fma_f64 v[52:53], -v[41:42], v[41:42], v[37:38]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[39:40], v[52:53], v[39:40], v[41:42]
	v_cndmask_b32_e64 v41, 0, 0xffffff80, s2
	v_cmp_class_f64_e64 s2, v[37:38], 0x260
	v_ldexp_f64 v[39:40], v[39:40], v41
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v38, v40, v38, s2
	v_cndmask_b32_e64 v37, v39, v37, s2
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[45:46], v[45:46], v[37:38]
	s_cbranch_scc1 .LBB3_216
; %bb.231:                              ; %_ZNK6thrust11hip_rocprim26transform_input_iterator_tIdNS_17counting_iteratorIjNS_11use_defaultES3_S3_EE11estimate_esEixEl.exit.3.i.i
	s_delay_alu instid0(VALU_DEP_1)
	v_ldexp_f64 v[7:8], v[45:46], -16
.LBB3_232:                              ; %Flow1222
	s_or_b32 exec_lo, exec_lo, s78
	v_or_b32_e32 v17, 0x400, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s2, s33, v17
	s_and_saveexec_b32 s80, s2
	s_cbranch_execz .LBB3_252
; %bb.233:
	s_movk_i32 s3, 0x1001
	s_mov_b64 s[8:9], 0
	v_mad_u64_u32 v[9:10], null, v66, s3, 0x7f156116
                                        ; implicit-def: $vgpr48_vgpr49
                                        ; implicit-def: $vgpr43_vgpr44
                                        ; implicit-def: $vgpr50_vgpr51
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v10, 19, v9
	v_xor3_b32 v9, v9, v10, 0xc761c23c
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v9, v9, 5, v9
	v_add_nc_u32_e32 v10, 0xe9f8cc1d, v9
	v_lshl_add_u32 v9, v9, 9, 0xaccf6200
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v9, v10, v9
	v_lshlrev_b32_e32 v10, 3, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v9, v9, v10, 0xfd7046c5
	v_lshrrev_b32_e32 v10, 16, v9
	s_delay_alu instid0(VALU_DEP_1)
	v_xor3_b32 v17, v9, v10, 0xb55a4f09
                                        ; implicit-def: $vgpr9_vgpr10
.LBB3_234:                              ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v18, 12, v17
	s_cmp_eq_u32 s8, 0
	s_cselect_b32 s3, -1, 0
	s_cmp_eq_u32 s8, 1
	v_add3_u32 v17, v17, v18, 0x7ed55d16
	s_cselect_b32 s4, -1, 0
	s_cmp_eq_u32 s8, 2
	s_cselect_b32 s5, -1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v18, 19, v17
	s_cmp_eq_u32 s8, 3
	s_cselect_b32 s6, -1, 0
	s_add_u32 s8, s8, 1
	v_xor3_b32 v17, v17, v18, 0xc761c23c
	s_addc_u32 s9, s9, 0
	s_cmp_lg_u32 s8, 4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v17, v17, 5, v17
	v_add_nc_u32_e32 v18, 0xe9f8cc1d, v17
	v_lshl_add_u32 v17, v17, 9, 0xaccf6200
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v17, v18, v17
	v_lshlrev_b32_e32 v18, 3, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v17, v17, v18, 0xfd7046c5
	v_lshrrev_b32_e32 v18, 16, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor3_b32 v17, v17, v18, 0xb55a4f09
	v_lshlrev_b32_e32 v19, 12, v17
	v_xor_b32_e32 v18, s23, v17
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add3_u32 v17, v17, v19, 0x7ed55d16
	v_cndmask_b32_e64 v49, v49, v18, s3
	v_cndmask_b32_e64 v10, v10, v18, s4
	v_cndmask_b32_e64 v44, v44, v18, s5
	v_cndmask_b32_e64 v51, v51, v18, s6
	v_lshrrev_b32_e32 v19, 19, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor3_b32 v17, v17, v19, 0xc761c23c
	v_lshl_add_u32 v17, v17, 5, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v19, 0xe9f8cc1d, v17
	v_lshl_add_u32 v17, v17, 9, 0xaccf6200
	v_xor_b32_e32 v17, v19, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v19, 3, v17
	v_add3_u32 v17, v17, v19, 0xfd7046c5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v19, 16, v17
	v_xor3_b32 v17, v17, v19, 0xb55a4f09
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v18, s22, v17
	v_cndmask_b32_e64 v48, v48, v18, s3
	v_cndmask_b32_e64 v9, v9, v18, s4
	v_cndmask_b32_e64 v43, v43, v18, s5
	v_cndmask_b32_e64 v50, v50, v18, s6
	s_cbranch_scc1 .LBB3_234
; %bb.235:                              ; %.preheader55.i.i.4.i.i.preheader
	v_mov_b32_e32 v45, 0
	v_dual_mov_b32 v46, 0 :: v_dual_mov_b32 v47, 0
	s_mov_b32 s10, 0x54442d18
	s_mov_b32 s24, 0x33145c07
	s_mov_b32 s26, 0x6dc9c883
	s_mov_b32 s30, 0x33145c00
	s_mov_b32 s34, 0x252049c0
	s_mov_b32 s36, 0x55555555
	s_mov_b32 s38, 0x6b47b09a
	s_mov_b32 s40, 0xbf559e2b
	s_mov_b32 s42, 0xd7f4df2e
	s_mov_b32 s44, 0x16291751
	s_mov_b32 s46, 0x9b27acf1
	s_mov_b32 s48, 0x998ef7b6
	s_mov_b32 s50, 0xfefa39ef
	s_mov_b32 s52, 0x3b39803f
	s_mov_b32 s54, 0x9037ab78
	s_mov_b32 s56, 0x46cc5e42
	s_mov_b32 s58, 0xa17f65f6
	s_mov_b32 s60, 0x19f4ec90
	s_mov_b32 s62, 0x16c16967
	s_mov_b32 s64, 0xb42fdfa7
	s_mov_b32 s66, 0xf9a43bb8
	s_mov_b32 s68, 0x796cde01
	s_mov_b32 s70, 0x19e83e5c
	s_mov_b32 s72, 0x11110bb3
	s_mov_b32 s81, 0
	s_mov_b32 s11, 0x401921fb
	s_mov_b32 s13, 0x3ff921fb
	s_mov_b32 s25, 0x3c91a626
	s_mov_b32 s27, 0x3fe45f30
	s_mov_b32 s29, 0xbff921fb
	s_mov_b32 s31, 0xbc91a626
	s_mov_b32 s35, 0xb97b839a
	s_mov_b32 s37, 0x3fe55555
	s_mov_b32 s39, 0x3fc38538
	s_mov_b32 s41, 0x3fc3ab76
	s_mov_b32 s43, 0x3fc7474d
	s_mov_b32 s45, 0x3fcc71c0
	s_mov_b32 s47, 0x3fd24924
	s_mov_b32 s49, 0x3fd99999
	s_mov_b32 s51, 0x3fe62e42
	s_mov_b32 s53, 0x3c7abc9e
	s_mov_b32 s55, 0x3e21eeb6
	s_mov_b32 s57, 0xbda907db
	s_mov_b32 s59, 0xbe927e4f
	s_mov_b32 s61, 0x3efa01a0
	s_mov_b32 s63, 0xbf56c16c
	s_mov_b32 s65, 0xbe5ae600
	s_mov_b32 s67, 0x3de5e0b2
	s_mov_b32 s69, 0x3ec71de3
	s_mov_b32 s71, 0xbf2a01a0
	s_mov_b32 s73, 0x3f811111
	s_mov_b32 s74, 0x55555780
	s_mov_b32 s77, 0x3fa55555
	s_mov_b32 s79, 0xbfc55555
                                        ; implicit-def: $vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31_vgpr32
                                        ; implicit-def: $vgpr27_vgpr28_vgpr29_vgpr30_vgpr31_vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42
.LBB3_236:                              ; %.preheader55.i.i.4.i.i
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB3_237 Depth 2
                                        ;     Child Loop BB3_247 Depth 2
                                        ;       Child Loop BB3_248 Depth 3
	v_dual_mov_b32 v57, v49 :: v_dual_mov_b32 v56, v48
	v_dual_mov_b32 v59, v51 :: v_dual_mov_b32 v58, v50
	s_mov_b32 s82, 0
.LBB3_237:                              ;   Parent Loop BB3_236 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v38, v10, v59
	v_xor_b32_e32 v37, v9, v58
                                        ; implicit-def: $vgpr68
                                        ; implicit-def: $vgpr52_vgpr53
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v70, v38, v57
	v_lshrrev_b64 v[49:50], 19, v[37:38]
	v_lshlrev_b32_e32 v39, 13, v37
	v_xor_b32_e32 v69, v37, v56
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_or_b32_e32 v71, v39, v50
	v_add_co_u32 v37, s3, v49, v69
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v38, s3, v71, v70, s3
	v_lshrrev_b64 v[37:38], 11, v[37:38]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_u32_e32 v[38:39], v38
	v_cvt_f64_u32_e32 v[40:41], v37
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[37:38], v[38:39], 32
	v_add_f64 v[37:38], v[37:38], v[40:41]
                                        ; implicit-def: $vgpr41_vgpr42
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[37:38], v[37:38], 0xffffffcb
	v_mul_f64 v[37:38], v[37:38], s[10:11]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ngt_f64_e64 s3, 0x41d00000, v[37:38]
	v_trig_preop_f64 v[62:63], v[37:38], 0
	v_trig_preop_f64 v[60:61], v[37:38], 1
	v_ldexp_f64 v[64:65], v[37:38], 0xffffff80
	v_trig_preop_f64 v[50:51], v[37:38], 2
	s_and_saveexec_b32 s4, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s6, exec_lo, s4
	s_cbranch_execz .LBB3_239
; %bb.238:                              ;   in Loop: Header=BB3_237 Depth=2
	v_cmp_le_f64_e64 s4, 0x7b000000, v[37:38]
	s_mov_b32 s12, s10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v40, v38, v65, s4
	v_cndmask_b32_e64 v39, v37, v64, s4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_f64 v[41:42], v[62:63], v[39:40]
	v_mul_f64 v[52:53], v[60:61], v[39:40]
	v_mul_f64 v[78:79], v[50:51], v[39:40]
	v_fma_f64 v[54:55], v[62:63], v[39:40], -v[41:42]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[80:81], v[60:61], v[39:40], -v[52:53]
	v_fma_f64 v[39:40], v[50:51], v[39:40], -v[78:79]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[67:68], v[52:53], v[54:55]
	v_add_f64 v[72:73], v[67:68], -v[52:53]
	v_add_f64 v[76:77], v[41:42], v[67:68]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[74:75], v[67:68], -v[72:73]
	v_add_f64 v[54:55], v[54:55], -v[72:73]
	v_ldexp_f64 v[72:73], v[76:77], -2
	v_add_f64 v[41:42], v[76:77], -v[41:42]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[52:53], v[52:53], -v[74:75]
	v_add_f64 v[74:75], v[78:79], v[80:81]
	v_cmp_neq_f64_e64 s4, 0x7ff00000, |v[72:73]|
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[41:42], v[67:68], -v[41:42]
	v_add_f64 v[52:53], v[54:55], v[52:53]
	v_fract_f64_e32 v[54:55], v[72:73]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[67:68], v[74:75], v[52:53]
	v_cndmask_b32_e64 v55, 0, v55, s4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v54, 0, v54, s4
	v_ldexp_f64 v[54:55], v[54:55], 2
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[72:73], v[41:42], v[67:68]
	v_add_f64 v[82:83], v[67:68], -v[74:75]
	v_add_f64 v[76:77], v[72:73], v[54:55]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[88:89], v[67:68], -v[82:83]
	v_add_f64 v[52:53], v[52:53], -v[82:83]
	v_add_f64 v[41:42], v[72:73], -v[41:42]
	v_cmp_gt_f64_e64 s4, 0, v[76:77]
	v_add_f64 v[76:77], v[74:75], -v[78:79]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[41:42], v[67:68], -v[41:42]
	v_cndmask_b32_e64 v48, 0, 0x40100000, s4
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[86:87], v[74:75], -v[76:77]
	v_add_f64 v[76:77], v[80:81], -v[76:77]
	v_add_f64 v[74:75], v[74:75], -v[88:89]
	v_add_f64 v[54:55], v[54:55], v[47:48]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[80:81], v[78:79], -v[86:87]
	v_add_f64 v[52:53], v[52:53], v[74:75]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[84:85], v[72:73], v[54:55]
	v_add_f64 v[76:77], v[76:77], v[80:81]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_i32_f64_e32 v48, v[84:85]
	v_add_f64 v[52:53], v[76:77], v[52:53]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_i32_e32 v[82:83], v48
	v_add_f64 v[39:40], v[39:40], v[52:53]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[54:55], v[54:55], -v[82:83]
	v_add_f64 v[39:40], v[41:42], v[39:40]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[74:75], v[72:73], v[54:55]
	v_add_f64 v[52:53], v[74:75], -v[54:55]
	v_cmp_le_f64_e64 s4, 0.5, v[74:75]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[41:42], v[72:73], -v[52:53]
	v_add_co_ci_u32_e64 v68, s5, 0, v48, s4
	v_cndmask_b32_e64 v48, 0, 0x3ff00000, s4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[39:40], v[39:40], v[41:42]
	v_add_f64 v[41:42], v[74:75], -v[47:48]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[52:53], v[41:42], v[39:40]
	v_mul_f64 v[54:55], v[52:53], s[12:13]
	v_add_f64 v[41:42], v[52:53], -v[41:42]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[72:73], v[52:53], s[12:13], -v[54:55]
	v_add_f64 v[39:40], v[39:40], -v[41:42]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[41:42], v[52:53], s[24:25], v[72:73]
	v_fma_f64 v[39:40], v[39:40], s[12:13], v[41:42]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[41:42], v[54:55], v[39:40]
	v_add_f64 v[52:53], v[41:42], -v[54:55]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[52:53], v[39:40], -v[52:53]
.LBB3_239:                              ; %Flow1218
                                        ;   in Loop: Header=BB3_237 Depth=2
	s_and_not1_saveexec_b32 s4, s6
	s_cbranch_execz .LBB3_241
; %bb.240:                              ;   in Loop: Header=BB3_237 Depth=2
	v_mul_f64 v[39:40], v[37:38], s[26:27]
	s_mov_b32 s28, s10
	s_mov_b32 s6, s30
	s_mov_b32 s7, s25
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[39:40], v[39:40]
	v_fma_f64 v[41:42], v[39:40], s[28:29], v[37:38]
	v_mul_f64 v[52:53], v[39:40], s[30:31]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[67:68], v[39:40], s[30:31], v[41:42]
	v_add_f64 v[54:55], v[41:42], v[52:53]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[41:42], v[41:42], -v[54:55]
	v_add_f64 v[54:55], v[54:55], -v[67:68]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[41:42], v[41:42], v[52:53]
	v_fma_f64 v[52:53], v[39:40], s[6:7], v[52:53]
	v_add_f64 v[41:42], v[54:55], v[41:42]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[41:42], v[41:42], -v[52:53]
	v_fma_f64 v[52:53], v[39:40], s[34:35], v[41:42]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[41:42], v[67:68], v[52:53]
	v_add_f64 v[54:55], v[41:42], -v[67:68]
	v_cvt_i32_f64_e32 v68, v[39:40]
	s_delay_alu instid0(VALU_DEP_2)
	v_add_f64 v[52:53], v[52:53], -v[54:55]
.LBB3_241:                              ; %_ZL3cosd.exit.i.i.4.i.i
                                        ;   in Loop: Header=BB3_237 Depth=2
	s_or_b32 exec_lo, exec_lo, s4
                                        ; implicit-def: $vgpr67
                                        ; implicit-def: $vgpr39_vgpr40
                                        ; implicit-def: $vgpr54_vgpr55
	s_and_saveexec_b32 s4, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s5, exec_lo, s4
	s_cbranch_execz .LBB3_243
; %bb.242:                              ;   in Loop: Header=BB3_237 Depth=2
	v_cmp_le_f64_e64 s3, 0x7b000000, v[37:38]
	s_mov_b32 s12, s10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v40, v38, v65, s3
	v_cndmask_b32_e64 v39, v37, v64, s3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_f64 v[54:55], v[62:63], v[39:40]
	v_mul_f64 v[64:65], v[60:61], v[39:40]
	v_mul_f64 v[80:81], v[50:51], v[39:40]
	v_fma_f64 v[62:63], v[62:63], v[39:40], -v[54:55]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[60:61], v[60:61], v[39:40], -v[64:65]
	v_fma_f64 v[39:40], v[50:51], v[39:40], -v[80:81]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[72:73], v[64:65], v[62:63]
	v_add_f64 v[74:75], v[72:73], -v[64:65]
	v_add_f64 v[78:79], v[54:55], v[72:73]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[76:77], v[72:73], -v[74:75]
	v_add_f64 v[62:63], v[62:63], -v[74:75]
	v_ldexp_f64 v[74:75], v[78:79], -2
	v_add_f64 v[54:55], v[78:79], -v[54:55]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[64:65], v[64:65], -v[76:77]
	v_add_f64 v[76:77], v[80:81], v[60:61]
	v_cmp_neq_f64_e64 s3, 0x7ff00000, |v[74:75]|
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[54:55], v[72:73], -v[54:55]
	v_add_f64 v[62:63], v[62:63], v[64:65]
	v_fract_f64_e32 v[64:65], v[74:75]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[72:73], v[76:77], v[62:63]
	v_cndmask_b32_e64 v65, 0, v65, s3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v64, 0, v64, s3
	v_ldexp_f64 v[64:65], v[64:65], 2
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[74:75], v[54:55], v[72:73]
	v_add_f64 v[82:83], v[72:73], -v[76:77]
	v_add_f64 v[78:79], v[74:75], v[64:65]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[88:89], v[72:73], -v[82:83]
	v_add_f64 v[62:63], v[62:63], -v[82:83]
	v_add_f64 v[50:51], v[74:75], -v[54:55]
	v_cmp_gt_f64_e64 s3, 0, v[78:79]
	v_add_f64 v[78:79], v[76:77], -v[80:81]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[50:51], v[72:73], -v[50:51]
	v_cndmask_b32_e64 v48, 0, 0x40100000, s3
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[86:87], v[76:77], -v[78:79]
	v_add_f64 v[60:61], v[60:61], -v[78:79]
	v_add_f64 v[76:77], v[76:77], -v[88:89]
	v_add_f64 v[64:65], v[64:65], v[47:48]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[78:79], v[80:81], -v[86:87]
	v_add_f64 v[62:63], v[62:63], v[76:77]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[84:85], v[74:75], v[64:65]
	v_add_f64 v[60:61], v[60:61], v[78:79]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_i32_f64_e32 v48, v[84:85]
	v_add_f64 v[54:55], v[60:61], v[62:63]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_i32_e32 v[82:83], v48
	v_add_f64 v[39:40], v[39:40], v[54:55]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[64:65], v[64:65], -v[82:83]
	v_add_f64 v[39:40], v[50:51], v[39:40]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[60:61], v[74:75], v[64:65]
	v_add_f64 v[54:55], v[60:61], -v[64:65]
	v_cmp_le_f64_e64 s3, 0.5, v[60:61]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[50:51], v[74:75], -v[54:55]
	v_add_co_ci_u32_e64 v67, s4, 0, v48, s3
	v_cndmask_b32_e64 v48, 0, 0x3ff00000, s3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[39:40], v[39:40], v[50:51]
	v_add_f64 v[50:51], v[60:61], -v[47:48]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[54:55], v[50:51], v[39:40]
	v_mul_f64 v[60:61], v[54:55], s[12:13]
	v_add_f64 v[50:51], v[54:55], -v[50:51]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[62:63], v[54:55], s[12:13], -v[60:61]
	v_add_f64 v[39:40], v[39:40], -v[50:51]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[50:51], v[54:55], s[24:25], v[62:63]
	v_fma_f64 v[50:51], v[39:40], s[12:13], v[50:51]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[39:40], v[60:61], v[50:51]
	v_add_f64 v[54:55], v[39:40], -v[60:61]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[54:55], v[50:51], -v[54:55]
.LBB3_243:                              ; %Flow1217
                                        ;   in Loop: Header=BB3_237 Depth=2
	s_and_not1_saveexec_b32 s3, s5
	s_cbranch_execz .LBB3_245
; %bb.244:                              ;   in Loop: Header=BB3_237 Depth=2
	v_mul_f64 v[39:40], v[37:38], s[26:27]
	s_mov_b32 s28, s10
	s_mov_b32 s4, s30
	s_mov_b32 s5, s25
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[50:51], v[39:40]
	v_fma_f64 v[39:40], v[50:51], s[28:29], v[37:38]
	v_mul_f64 v[54:55], v[50:51], s[30:31]
	v_cvt_i32_f64_e32 v67, v[50:51]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[62:63], v[50:51], s[30:31], v[39:40]
	v_add_f64 v[60:61], v[39:40], v[54:55]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[39:40], v[39:40], -v[60:61]
	v_add_f64 v[60:61], v[60:61], -v[62:63]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[39:40], v[39:40], v[54:55]
	v_fma_f64 v[54:55], v[50:51], s[4:5], v[54:55]
	v_add_f64 v[39:40], v[60:61], v[39:40]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[39:40], v[39:40], -v[54:55]
	v_fma_f64 v[54:55], v[50:51], s[34:35], v[39:40]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[39:40], v[62:63], v[54:55]
	v_add_f64 v[60:61], v[39:40], -v[62:63]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[54:55], v[54:55], -v[60:61]
.LBB3_245:                              ; %_ZL3sind.exit.i.i.4.i.i
                                        ;   in Loop: Header=BB3_237 Depth=2
	s_or_b32 exec_lo, exec_lo, s3
	v_xor_b32_e32 v43, v43, v56
	v_add_co_u32 v56, s3, v58, v56
	v_xor_b32_e32 v44, v44, v57
	v_add_co_ci_u32_e64 v57, s3, v59, v57, s3
	v_lshlrev_b64 v[50:51], 17, v[9:10]
	v_xor_b32_e32 v9, v43, v9
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_xor_b32_e32 v10, v44, v10
	v_lshrrev_b64 v[56:57], 11, v[56:57]
	s_mov_b32 s75, s37
	s_mov_b32 s76, s36
	v_xor_b32_e32 v48, v44, v51
	v_xor_b32_e32 v50, v43, v50
	v_lshlrev_b64 v[43:44], 17, v[9:10]
	v_cvt_f64_u32_e32 v[57:58], v57
	v_xor_b32_e32 v61, v10, v71
	v_xor_b32_e32 v51, v48, v70
	v_xor_b32_e32 v50, v50, v69
	v_xor_b32_e32 v60, v9, v49
	s_mov_b32 s78, s36
	v_xor_b32_e32 v49, v61, v70
	v_xor_b32_e32 v10, v51, v10
	v_xor_b32_e32 v9, v50, v9
	v_xor_b32_e32 v44, v51, v44
	v_xor_b32_e32 v43, v50, v43
	v_lshrrev_b64 v[50:51], 19, v[60:61]
	v_xor_b32_e32 v48, v60, v69
	v_lshlrev_b32_e32 v60, 13, v60
	v_cmp_lg_f64_e64 s5, 0x7ff00000, v[37:38]
	s_cmp_eq_u32 s82, 4
	v_and_b32_e32 v37, 1, v67
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_or_b32_e32 v51, v60, v51
	v_cvt_f64_u32_e32 v[59:60], v56
	v_cmp_eq_u32_e64 s9, 0, v37
	v_ldexp_f64 v[57:58], v[57:58], 32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[56:57], v[57:58], v[59:60]
	v_ldexp_f64 v[56:57], v[56:57], 0xffffffcb
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_frexp_mant_f64_e32 v[58:59], v[56:57]
	v_cmp_gt_f64_e64 s3, s[36:37], v[58:59]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v60, 0, 1, s3
	v_ldexp_f64 v[58:59], v[58:59], v60
	v_frexp_exp_i32_f64_e32 v60, v[56:57]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[62:63], v[58:59], 1.0
	v_subrev_co_ci_u32_e64 v75, s3, 0, v60, s3
	v_add_f64 v[60:61], v[58:59], -1.0
	v_cmp_eq_f64_e64 s3, 0x7ff00000, v[56:57]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[64:65], v[62:63], -1.0
	v_add_f64 v[58:59], v[58:59], -v[64:65]
	v_rcp_f64_e32 v[64:65], v[62:63]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[69:70], -v[62:63], v[64:65], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[64:65], v[69:70], v[64:65], v[64:65]
	v_fma_f64 v[69:70], -v[62:63], v[64:65], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[64:65], v[69:70], v[64:65], v[64:65]
	v_mul_f64 v[69:70], v[60:61], v[64:65]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[71:72], v[62:63], v[69:70]
	v_fma_f64 v[62:63], v[69:70], v[62:63], -v[71:72]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[58:59], v[69:70], v[58:59], v[62:63]
	v_add_f64 v[62:63], v[71:72], v[58:59]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[73:74], v[60:61], -v[62:63]
	v_add_f64 v[71:72], v[62:63], -v[71:72]
	v_add_f64 v[60:61], v[60:61], -v[73:74]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[58:59], v[71:72], -v[58:59]
	v_add_f64 v[60:61], v[60:61], -v[62:63]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[58:59], v[58:59], v[60:61]
	v_add_f64 v[58:59], v[73:74], v[58:59]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[58:59], v[64:65], v[58:59]
	v_add_f64 v[60:61], v[69:70], v[58:59]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[62:63], v[60:61], -v[69:70]
	v_ldexp_f64 v[69:70], v[60:61], 1
	v_add_f64 v[58:59], v[58:59], -v[62:63]
	v_mul_f64 v[62:63], v[60:61], v[60:61]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[58:59], v[58:59], 1
	v_fma_f64 v[64:65], v[62:63], s[40:41], s[38:39]
	v_mul_f64 v[60:61], v[60:61], v[62:63]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[64:65], v[62:63], v[64:65], s[42:43]
	v_fma_f64 v[64:65], v[62:63], v[64:65], s[44:45]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[64:65], v[62:63], v[64:65], s[46:47]
	v_fma_f64 v[64:65], v[62:63], v[64:65], s[48:49]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[64:65], v[62:63], v[64:65], s[74:75]
	v_mul_f64 v[60:61], v[60:61], v[64:65]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[62:63], v[69:70], v[60:61]
	v_add_f64 v[64:65], v[62:63], -v[69:70]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[60:61], v[60:61], -v[64:65]
	v_add_f64 v[58:59], v[58:59], v[60:61]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[60:61], v[62:63], v[58:59]
	v_add_f64 v[62:63], v[60:61], -v[62:63]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[58:59], v[58:59], -v[62:63]
	v_cvt_f64_i32_e32 v[62:63], v75
	v_mul_f64 v[64:65], v[62:63], s[50:51]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[69:70], v[62:63], s[50:51], -v[64:65]
	v_fma_f64 v[62:63], v[62:63], s[52:53], v[69:70]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[69:70], v[64:65], v[62:63]
	v_add_f64 v[64:65], v[69:70], -v[64:65]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[62:63], v[62:63], -v[64:65]
	v_add_f64 v[64:65], v[69:70], v[60:61]
	v_add_f64 v[71:72], v[64:65], -v[69:70]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[73:74], v[64:65], -v[71:72]
	v_add_f64 v[60:61], v[60:61], -v[71:72]
	v_add_f64 v[69:70], v[69:70], -v[73:74]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[60:61], v[60:61], v[69:70]
	v_add_f64 v[69:70], v[62:63], v[58:59]
	v_add_f64 v[71:72], v[69:70], -v[62:63]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[60:61], v[69:70], v[60:61]
	v_add_f64 v[73:74], v[69:70], -v[71:72]
	v_add_f64 v[58:59], v[58:59], -v[71:72]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[62:63], v[62:63], -v[73:74]
	v_add_f64 v[58:59], v[58:59], v[62:63]
	v_add_f64 v[62:63], v[64:65], v[60:61]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[64:65], v[62:63], -v[64:65]
	v_add_f64 v[60:61], v[60:61], -v[64:65]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[58:59], v[58:59], v[60:61]
	v_add_f64 v[58:59], v[62:63], v[58:59]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v59, v59, v57, s3
	v_cndmask_b32_e64 v58, v58, v56, s3
	v_cmp_ngt_f64_e64 s3, 0, v[56:57]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[58:59], v[58:59], -2.0
	v_cndmask_b32_e64 v59, 0x7ff80000, v59, s3
	v_cmp_nge_f64_e64 s3, 0, v[56:57]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v58, 0, v58, s3
	v_cmp_neq_f64_e64 s3, 0, v[56:57]
	v_cndmask_b32_e64 v59, 0x7ff00000, v59, s3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_f64_e64 s3, 0x10000000, v[58:59]
	v_cndmask_b32_e64 v56, 0, 1, s3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v56, 8, v56
	v_ldexp_f64 v[56:57], v[58:59], v56
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_rsq_f64_e32 v[58:59], v[56:57]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[60:61], v[56:57], v[58:59]
	v_mul_f64 v[58:59], v[58:59], 0.5
	v_fma_f64 v[62:63], -v[58:59], v[60:61], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[60:61], v[60:61], v[62:63], v[60:61]
	v_fma_f64 v[58:59], v[58:59], v[62:63], v[58:59]
	v_fma_f64 v[64:65], -v[60:61], v[60:61], v[56:57]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[60:61], v[64:65], v[58:59], v[60:61]
	v_fma_f64 v[62:63], -v[60:61], v[60:61], v[56:57]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[58:59], v[62:63], v[58:59], v[60:61]
	v_cndmask_b32_e64 v60, 0, 0xffffff80, s3
	v_cmp_class_f64_e64 s3, v[56:57], 0x260
	v_ldexp_f64 v[58:59], v[58:59], v60
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v57, v59, v57, s3
	v_cndmask_b32_e64 v56, v58, v56, s3
	v_mul_f64 v[58:59], v[41:42], v[41:42]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[60:61], v[58:59], 0.5
	v_fma_f64 v[69:70], v[58:59], s[56:57], s[54:55]
	v_add_f64 v[62:63], -v[60:61], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[69:70], v[58:59], v[69:70], s[58:59]
	v_add_f64 v[64:65], -v[62:63], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[69:70], v[58:59], v[69:70], s[60:61]
	v_add_f64 v[60:61], v[64:65], -v[60:61]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[69:70], v[58:59], v[69:70], s[62:63]
	v_mul_f64 v[64:65], v[58:59], v[58:59]
	v_fma_f64 v[60:61], v[41:42], -v[52:53], v[60:61]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[69:70], v[58:59], v[69:70], s[76:77]
	v_fma_f64 v[60:61], v[64:65], v[69:70], v[60:61]
	v_mul_f64 v[64:65], v[41:42], -v[58:59]
	v_mul_f64 v[69:70], v[52:53], 0.5
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[60:61], v[62:63], v[60:61]
	v_fma_f64 v[62:63], v[58:59], s[66:67], s[64:65]
	v_fma_f64 v[62:63], v[58:59], v[62:63], s[68:69]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[62:63], v[58:59], v[62:63], s[70:71]
	v_fma_f64 v[62:63], v[58:59], v[62:63], s[72:73]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[62:63], v[64:65], v[62:63], v[69:70]
	v_fma_f64 v[52:53], v[58:59], v[62:63], -v[52:53]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[52:53], v[64:65], s[78:79], v[52:53]
	v_add_f64 v[41:42], v[41:42], -v[52:53]
	v_and_b32_e32 v52, 1, v68
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s3, 0, v52
	v_lshlrev_b32_e32 v52, 30, v68
	v_and_b32_e32 v52, 0x80000000, v52
	v_xor_b32_e32 v42, 0x80000000, v42
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v41, v41, v60, s3
	v_cndmask_b32_e64 v42, v42, v61, s3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v41, 0, v41, s5
	s_cselect_b32 s3, -1, 0
	s_cmp_eq_u32 s82, 3
	v_xor_b32_e32 v42, v42, v52
	s_cselect_b32 s4, -1, 0
	s_cmp_eq_u32 s82, 2
	s_cselect_b32 s6, -1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v42, 0x7ff80000, v42, s5
	s_cmp_eq_u32 s82, 1
	s_cselect_b32 s7, -1, 0
	s_cmp_eq_u32 s82, 0
	v_mul_f64 v[41:42], v[56:57], v[41:42]
	s_cselect_b32 s8, -1, 0
	s_add_i32 s82, s82, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_cmp_lg_u32 s82, 5
	v_cndmask_b32_e64 v36, v36, v42, s3
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e64 v35, v35, v41, s3
	v_cndmask_b32_e64 v34, v34, v42, s4
	v_cndmask_b32_e64 v33, v33, v41, s4
	v_cndmask_b32_e64 v32, v32, v42, s6
	v_cndmask_b32_e64 v31, v31, v41, s6
	v_cndmask_b32_e64 v30, v30, v42, s7
	v_cndmask_b32_e64 v29, v29, v41, s7
	v_cndmask_b32_e64 v28, v28, v42, s8
	v_cndmask_b32_e64 v27, v27, v41, s8
	v_mul_f64 v[41:42], v[39:40], v[39:40]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[52:53], v[41:42], 0.5
	v_fma_f64 v[62:63], v[41:42], s[56:57], s[54:55]
	v_add_f64 v[58:59], -v[52:53], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[62:63], v[41:42], v[62:63], s[58:59]
	v_add_f64 v[60:61], -v[58:59], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[62:63], v[41:42], v[62:63], s[60:61]
	v_add_f64 v[52:53], v[60:61], -v[52:53]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[62:63], v[41:42], v[62:63], s[62:63]
	v_mul_f64 v[60:61], v[41:42], v[41:42]
	v_fma_f64 v[52:53], v[39:40], -v[54:55], v[52:53]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[62:63], v[41:42], v[62:63], s[76:77]
	v_fma_f64 v[52:53], v[60:61], v[62:63], v[52:53]
	v_mul_f64 v[60:61], v[39:40], -v[41:42]
	v_mul_f64 v[62:63], v[54:55], 0.5
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[52:53], v[58:59], v[52:53]
	v_fma_f64 v[58:59], v[41:42], s[66:67], s[64:65]
	v_fma_f64 v[58:59], v[41:42], v[58:59], s[68:69]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[58:59], v[41:42], v[58:59], s[70:71]
	v_fma_f64 v[58:59], v[41:42], v[58:59], s[72:73]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[58:59], v[60:61], v[58:59], v[62:63]
	v_fma_f64 v[41:42], v[41:42], v[58:59], -v[54:55]
	v_dual_mov_b32 v59, v51 :: v_dual_mov_b32 v58, v50
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[41:42], v[60:61], s[78:79], v[41:42]
	v_add_f64 v[39:40], v[39:40], -v[41:42]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v37, v52, v39, s9
	v_cndmask_b32_e64 v39, v53, v40, s9
	v_lshlrev_b32_e32 v40, 30, v67
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v37, 0, v37, s5
	v_xor_b32_e32 v38, v40, v38
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v38, 0x80000000, v38
	v_xor_b32_e32 v38, v39, v38
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v38, 0x7ff80000, v38, s5
	v_mul_f64 v[37:38], v[56:57], v[37:38]
	v_dual_mov_b32 v57, v49 :: v_dual_mov_b32 v56, v48
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v26, v26, v38, s3
	v_cndmask_b32_e64 v25, v25, v37, s3
	v_cndmask_b32_e64 v24, v24, v38, s4
	v_cndmask_b32_e64 v23, v23, v37, s4
	v_cndmask_b32_e64 v22, v22, v38, s6
	v_cndmask_b32_e64 v21, v21, v37, s6
	v_cndmask_b32_e64 v20, v20, v38, s7
	v_cndmask_b32_e64 v19, v19, v37, s7
	v_cndmask_b32_e64 v18, v18, v38, s8
	v_cndmask_b32_e64 v17, v17, v37, s8
	s_cbranch_scc1 .LBB3_237
; %bb.246:                              ; %.lr.ph.i.i.4.i.i.preheader
                                        ;   in Loop: Header=BB3_236 Depth=1
	v_mov_b32_e32 v37, 0
	v_mov_b32_e32 v38, 0
	s_mov_b32 s7, 0
.LBB3_247:                              ; %.lr.ph.i.i.4.i.i
                                        ;   Parent Loop BB3_236 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB3_248 Depth 3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s7, 1
	s_mov_b32 s8, s7
	s_cselect_b32 s3, -1, 0
	s_cmp_eq_u32 s7, 2
	v_cndmask_b32_e64 v39, v28, v30, s3
	v_cndmask_b32_e64 v40, v27, v29, s3
	v_cndmask_b32_e64 v41, v18, v20, s3
	v_cndmask_b32_e64 v42, v17, v19, s3
	s_cselect_b32 s3, -1, 0
	s_cmp_eq_u32 s7, 3
	v_cndmask_b32_e64 v39, v39, v32, s3
	v_cndmask_b32_e64 v40, v40, v31, s3
	v_cndmask_b32_e64 v41, v41, v22, s3
	v_cndmask_b32_e64 v42, v42, v21, s3
	s_cselect_b32 s3, -1, 0
	s_cmp_eq_u32 s7, 4
	v_cndmask_b32_e64 v39, v39, v34, s3
	v_cndmask_b32_e64 v52, v40, v33, s3
	v_cndmask_b32_e64 v41, v41, v24, s3
	v_cndmask_b32_e64 v53, v42, v23, s3
	s_cselect_b32 s3, -1, 0
	s_delay_alu instid0(SALU_CYCLE_1)
	v_cndmask_b32_e64 v40, v39, v36, s3
	v_cndmask_b32_e64 v39, v52, v35, s3
	v_cndmask_b32_e64 v42, v41, v26, s3
	v_cndmask_b32_e64 v41, v53, v25, s3
.LBB3_248:                              ;   Parent Loop BB3_236 Depth=1
                                        ;     Parent Loop BB3_247 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_add_i32 s8, s8, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s8, 1
	s_cselect_b32 s3, -1, 0
	s_cmp_eq_u32 s8, 2
	v_cndmask_b32_e64 v53, v18, v20, s3
	v_cndmask_b32_e64 v54, v17, v19, s3
	s_cselect_b32 s4, -1, 0
	s_cmp_eq_u32 s8, 3
	v_cndmask_b32_e64 v52, v28, v30, s3
	v_cndmask_b32_e64 v53, v53, v22, s4
	v_cndmask_b32_e64 v54, v54, v21, s4
	s_cselect_b32 s5, -1, 0
	s_cmp_eq_u32 s8, 4
	v_cndmask_b32_e64 v52, v52, v32, s4
	v_cndmask_b32_e64 v55, v53, v24, s5
	v_cndmask_b32_e64 v54, v54, v23, s5
	s_cselect_b32 s6, -1, 0
	s_cmp_lt_u32 s8, 4
	v_cndmask_b32_e64 v52, v52, v34, s5
	v_cndmask_b32_e64 v55, v55, v26, s6
	v_cndmask_b32_e64 v54, v54, v25, s6
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v53, v52, v36, s6
	v_cndmask_b32_e64 v52, v27, v29, s3
	v_add_f64 v[54:55], v[41:42], -v[54:55]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v52, v52, v31, s4
	v_cndmask_b32_e64 v52, v52, v33, s5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v52, v52, v35, s6
	v_add_f64 v[52:53], v[39:40], -v[52:53]
	v_mul_f64 v[54:55], v[54:55], v[54:55]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[52:53], v[52:53], v[52:53], v[54:55]
	v_cmp_lt_f64_e64 s3, v[37:38], v[52:53]
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e64 v38, v38, v53, s3
	v_cndmask_b32_e64 v37, v37, v52, s3
	s_cbranch_scc1 .LBB3_248
; %bb.249:                              ; %.loopexit.i.i.4.i.i
                                        ;   in Loop: Header=BB3_247 Depth=2
	s_add_i32 s7, s7, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s7, 4
	s_cbranch_scc1 .LBB3_247
; %bb.250:                              ;   in Loop: Header=BB3_236 Depth=1
	v_cmp_gt_f64_e64 s3, 0x10000000, v[37:38]
	s_add_i32 s81, s81, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_cmp_lg_u32 s81, 0x10000
	v_cndmask_b32_e64 v39, 0, 1, s3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v39, 8, v39
	v_ldexp_f64 v[37:38], v[37:38], v39
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_rsq_f64_e32 v[39:40], v[37:38]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[41:42], v[37:38], v[39:40]
	v_mul_f64 v[39:40], v[39:40], 0.5
	v_fma_f64 v[52:53], -v[39:40], v[41:42], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[41:42], v[41:42], v[52:53], v[41:42]
	v_fma_f64 v[39:40], v[39:40], v[52:53], v[39:40]
	v_fma_f64 v[52:53], -v[41:42], v[41:42], v[37:38]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[41:42], v[52:53], v[39:40], v[41:42]
	v_fma_f64 v[52:53], -v[41:42], v[41:42], v[37:38]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[39:40], v[52:53], v[39:40], v[41:42]
	v_cndmask_b32_e64 v41, 0, 0xffffff80, s3
	v_cmp_class_f64_e64 s3, v[37:38], 0x260
	v_ldexp_f64 v[39:40], v[39:40], v41
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v38, v40, v38, s3
	v_cndmask_b32_e64 v37, v39, v37, s3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[45:46], v[45:46], v[37:38]
	s_cbranch_scc1 .LBB3_236
; %bb.251:                              ; %_ZNK6thrust11hip_rocprim26transform_input_iterator_tIdNS_17counting_iteratorIjNS_11use_defaultES3_S3_EE11estimate_esEixEl.exit.4.i.i
	s_delay_alu instid0(VALU_DEP_1)
	v_ldexp_f64 v[9:10], v[45:46], -16
.LBB3_252:                              ; %Flow1219
	s_or_b32 exec_lo, exec_lo, s80
	v_or_b32_e32 v17, 0x500, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s3, s33, v17
	s_and_saveexec_b32 s80, s3
	s_cbranch_execz .LBB3_272
; %bb.253:
	s_movk_i32 s4, 0x1001
	s_mov_b64 s[8:9], 0
	v_mad_u64_u32 v[11:12], null, v66, s4, 0x7f256216
                                        ; implicit-def: $vgpr48_vgpr49
                                        ; implicit-def: $vgpr43_vgpr44
                                        ; implicit-def: $vgpr50_vgpr51
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v12, 19, v11
	v_xor3_b32 v11, v11, v12, 0xc761c23c
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v11, v11, 5, v11
	v_add_nc_u32_e32 v12, 0xe9f8cc1d, v11
	v_lshl_add_u32 v11, v11, 9, 0xaccf6200
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v11, v12, v11
	v_lshlrev_b32_e32 v12, 3, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v11, v11, v12, 0xfd7046c5
	v_lshrrev_b32_e32 v12, 16, v11
	s_delay_alu instid0(VALU_DEP_1)
	v_xor3_b32 v17, v11, v12, 0xb55a4f09
                                        ; implicit-def: $vgpr11_vgpr12
.LBB3_254:                              ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v18, 12, v17
	s_cmp_eq_u32 s8, 0
	s_cselect_b32 s4, -1, 0
	s_cmp_eq_u32 s8, 1
	v_add3_u32 v17, v17, v18, 0x7ed55d16
	s_cselect_b32 s5, -1, 0
	s_cmp_eq_u32 s8, 2
	s_cselect_b32 s6, -1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v18, 19, v17
	s_cmp_eq_u32 s8, 3
	s_cselect_b32 s7, -1, 0
	s_add_u32 s8, s8, 1
	v_xor3_b32 v17, v17, v18, 0xc761c23c
	s_addc_u32 s9, s9, 0
	s_cmp_lg_u32 s8, 4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v17, v17, 5, v17
	v_add_nc_u32_e32 v18, 0xe9f8cc1d, v17
	v_lshl_add_u32 v17, v17, 9, 0xaccf6200
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v17, v18, v17
	v_lshlrev_b32_e32 v18, 3, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v17, v17, v18, 0xfd7046c5
	v_lshrrev_b32_e32 v18, 16, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor3_b32 v17, v17, v18, 0xb55a4f09
	v_lshlrev_b32_e32 v19, 12, v17
	v_xor_b32_e32 v18, s23, v17
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add3_u32 v17, v17, v19, 0x7ed55d16
	v_cndmask_b32_e64 v49, v49, v18, s4
	v_cndmask_b32_e64 v12, v12, v18, s5
	v_cndmask_b32_e64 v44, v44, v18, s6
	v_cndmask_b32_e64 v51, v51, v18, s7
	v_lshrrev_b32_e32 v19, 19, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor3_b32 v17, v17, v19, 0xc761c23c
	v_lshl_add_u32 v17, v17, 5, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v19, 0xe9f8cc1d, v17
	v_lshl_add_u32 v17, v17, 9, 0xaccf6200
	v_xor_b32_e32 v17, v19, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v19, 3, v17
	v_add3_u32 v17, v17, v19, 0xfd7046c5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v19, 16, v17
	v_xor3_b32 v17, v17, v19, 0xb55a4f09
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v18, s22, v17
	v_cndmask_b32_e64 v48, v48, v18, s4
	v_cndmask_b32_e64 v11, v11, v18, s5
	v_cndmask_b32_e64 v43, v43, v18, s6
	v_cndmask_b32_e64 v50, v50, v18, s7
	s_cbranch_scc1 .LBB3_254
; %bb.255:                              ; %.preheader55.i.i.5.i.i.preheader
	v_mov_b32_e32 v45, 0
	v_dual_mov_b32 v46, 0 :: v_dual_mov_b32 v47, 0
	s_mov_b32 s12, 0x54442d18
	s_mov_b32 s24, 0x33145c07
	s_mov_b32 s26, 0x6dc9c883
	s_mov_b32 s30, 0x33145c00
	s_mov_b32 s34, 0x252049c0
	s_mov_b32 s36, 0x55555555
	s_mov_b32 s38, 0x6b47b09a
	s_mov_b32 s40, 0xbf559e2b
	s_mov_b32 s42, 0xd7f4df2e
	s_mov_b32 s44, 0x16291751
	s_mov_b32 s46, 0x9b27acf1
	s_mov_b32 s48, 0x998ef7b6
	s_mov_b32 s50, 0xfefa39ef
	s_mov_b32 s52, 0x3b39803f
	s_mov_b32 s54, 0x9037ab78
	s_mov_b32 s56, 0x46cc5e42
	s_mov_b32 s58, 0xa17f65f6
	s_mov_b32 s60, 0x19f4ec90
	s_mov_b32 s62, 0x16c16967
	s_mov_b32 s64, 0xb42fdfa7
	s_mov_b32 s66, 0xf9a43bb8
	s_mov_b32 s68, 0x796cde01
	s_mov_b32 s70, 0x19e83e5c
	s_mov_b32 s72, 0x11110bb3
	s_mov_b32 s81, 0
	s_mov_b32 s13, 0x401921fb
	s_mov_b32 s11, 0x3ff921fb
	s_mov_b32 s25, 0x3c91a626
	s_mov_b32 s27, 0x3fe45f30
	s_mov_b32 s29, 0xbff921fb
	s_mov_b32 s31, 0xbc91a626
	s_mov_b32 s35, 0xb97b839a
	s_mov_b32 s37, 0x3fe55555
	s_mov_b32 s39, 0x3fc38538
	s_mov_b32 s41, 0x3fc3ab76
	s_mov_b32 s43, 0x3fc7474d
	s_mov_b32 s45, 0x3fcc71c0
	s_mov_b32 s47, 0x3fd24924
	s_mov_b32 s49, 0x3fd99999
	s_mov_b32 s51, 0x3fe62e42
	s_mov_b32 s53, 0x3c7abc9e
	s_mov_b32 s55, 0x3e21eeb6
	s_mov_b32 s57, 0xbda907db
	s_mov_b32 s59, 0xbe927e4f
	s_mov_b32 s61, 0x3efa01a0
	s_mov_b32 s63, 0xbf56c16c
	s_mov_b32 s65, 0xbe5ae600
	s_mov_b32 s67, 0x3de5e0b2
	s_mov_b32 s69, 0x3ec71de3
	s_mov_b32 s71, 0xbf2a01a0
	s_mov_b32 s73, 0x3f811111
	s_mov_b32 s74, 0x55555780
	s_mov_b32 s77, 0x3fa55555
	s_mov_b32 s79, 0xbfc55555
                                        ; implicit-def: $vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31_vgpr32
                                        ; implicit-def: $vgpr27_vgpr28_vgpr29_vgpr30_vgpr31_vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42
.LBB3_256:                              ; %.preheader55.i.i.5.i.i
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB3_257 Depth 2
                                        ;     Child Loop BB3_267 Depth 2
                                        ;       Child Loop BB3_268 Depth 3
	v_dual_mov_b32 v57, v49 :: v_dual_mov_b32 v56, v48
	v_dual_mov_b32 v59, v51 :: v_dual_mov_b32 v58, v50
	s_mov_b32 s82, 0
.LBB3_257:                              ;   Parent Loop BB3_256 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v38, v12, v59
	v_xor_b32_e32 v37, v11, v58
                                        ; implicit-def: $vgpr68
                                        ; implicit-def: $vgpr52_vgpr53
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v70, v38, v57
	v_lshrrev_b64 v[49:50], 19, v[37:38]
	v_lshlrev_b32_e32 v39, 13, v37
	v_xor_b32_e32 v69, v37, v56
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_or_b32_e32 v71, v39, v50
	v_add_co_u32 v37, s4, v49, v69
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v38, s4, v71, v70, s4
	v_lshrrev_b64 v[37:38], 11, v[37:38]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_u32_e32 v[38:39], v38
	v_cvt_f64_u32_e32 v[40:41], v37
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[37:38], v[38:39], 32
	v_add_f64 v[37:38], v[37:38], v[40:41]
                                        ; implicit-def: $vgpr41_vgpr42
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[37:38], v[37:38], 0xffffffcb
	v_mul_f64 v[37:38], v[37:38], s[12:13]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ngt_f64_e64 s4, 0x41d00000, v[37:38]
	v_trig_preop_f64 v[62:63], v[37:38], 0
	v_trig_preop_f64 v[60:61], v[37:38], 1
	v_ldexp_f64 v[64:65], v[37:38], 0xffffff80
	v_trig_preop_f64 v[50:51], v[37:38], 2
	s_and_saveexec_b32 s5, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s7, exec_lo, s5
	s_cbranch_execz .LBB3_259
; %bb.258:                              ;   in Loop: Header=BB3_257 Depth=2
	v_cmp_le_f64_e64 s5, 0x7b000000, v[37:38]
	s_mov_b32 s10, s12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v40, v38, v65, s5
	v_cndmask_b32_e64 v39, v37, v64, s5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_f64 v[41:42], v[62:63], v[39:40]
	v_mul_f64 v[52:53], v[60:61], v[39:40]
	v_mul_f64 v[78:79], v[50:51], v[39:40]
	v_fma_f64 v[54:55], v[62:63], v[39:40], -v[41:42]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[80:81], v[60:61], v[39:40], -v[52:53]
	v_fma_f64 v[39:40], v[50:51], v[39:40], -v[78:79]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[67:68], v[52:53], v[54:55]
	v_add_f64 v[72:73], v[67:68], -v[52:53]
	v_add_f64 v[76:77], v[41:42], v[67:68]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[74:75], v[67:68], -v[72:73]
	v_add_f64 v[54:55], v[54:55], -v[72:73]
	v_ldexp_f64 v[72:73], v[76:77], -2
	v_add_f64 v[41:42], v[76:77], -v[41:42]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[52:53], v[52:53], -v[74:75]
	v_add_f64 v[74:75], v[78:79], v[80:81]
	v_cmp_neq_f64_e64 s5, 0x7ff00000, |v[72:73]|
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[41:42], v[67:68], -v[41:42]
	v_add_f64 v[52:53], v[54:55], v[52:53]
	v_fract_f64_e32 v[54:55], v[72:73]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[67:68], v[74:75], v[52:53]
	v_cndmask_b32_e64 v55, 0, v55, s5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v54, 0, v54, s5
	v_ldexp_f64 v[54:55], v[54:55], 2
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[72:73], v[41:42], v[67:68]
	v_add_f64 v[82:83], v[67:68], -v[74:75]
	v_add_f64 v[76:77], v[72:73], v[54:55]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[88:89], v[67:68], -v[82:83]
	v_add_f64 v[52:53], v[52:53], -v[82:83]
	v_add_f64 v[41:42], v[72:73], -v[41:42]
	v_cmp_gt_f64_e64 s5, 0, v[76:77]
	v_add_f64 v[76:77], v[74:75], -v[78:79]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[41:42], v[67:68], -v[41:42]
	v_cndmask_b32_e64 v48, 0, 0x40100000, s5
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[86:87], v[74:75], -v[76:77]
	v_add_f64 v[76:77], v[80:81], -v[76:77]
	v_add_f64 v[74:75], v[74:75], -v[88:89]
	v_add_f64 v[54:55], v[54:55], v[47:48]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[80:81], v[78:79], -v[86:87]
	v_add_f64 v[52:53], v[52:53], v[74:75]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[84:85], v[72:73], v[54:55]
	v_add_f64 v[76:77], v[76:77], v[80:81]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_i32_f64_e32 v48, v[84:85]
	v_add_f64 v[52:53], v[76:77], v[52:53]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_i32_e32 v[82:83], v48
	v_add_f64 v[39:40], v[39:40], v[52:53]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[54:55], v[54:55], -v[82:83]
	v_add_f64 v[39:40], v[41:42], v[39:40]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[74:75], v[72:73], v[54:55]
	v_add_f64 v[52:53], v[74:75], -v[54:55]
	v_cmp_le_f64_e64 s5, 0.5, v[74:75]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[41:42], v[72:73], -v[52:53]
	v_add_co_ci_u32_e64 v68, s6, 0, v48, s5
	v_cndmask_b32_e64 v48, 0, 0x3ff00000, s5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[39:40], v[39:40], v[41:42]
	v_add_f64 v[41:42], v[74:75], -v[47:48]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[52:53], v[41:42], v[39:40]
	v_mul_f64 v[54:55], v[52:53], s[10:11]
	v_add_f64 v[41:42], v[52:53], -v[41:42]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[72:73], v[52:53], s[10:11], -v[54:55]
	v_add_f64 v[39:40], v[39:40], -v[41:42]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[41:42], v[52:53], s[24:25], v[72:73]
	v_fma_f64 v[39:40], v[39:40], s[10:11], v[41:42]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[41:42], v[54:55], v[39:40]
	v_add_f64 v[52:53], v[41:42], -v[54:55]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[52:53], v[39:40], -v[52:53]
.LBB3_259:                              ; %Flow1215
                                        ;   in Loop: Header=BB3_257 Depth=2
	s_and_not1_saveexec_b32 s5, s7
	s_cbranch_execz .LBB3_261
; %bb.260:                              ;   in Loop: Header=BB3_257 Depth=2
	v_mul_f64 v[39:40], v[37:38], s[26:27]
	s_mov_b32 s28, s12
	s_mov_b32 s6, s30
	s_mov_b32 s7, s25
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[39:40], v[39:40]
	v_fma_f64 v[41:42], v[39:40], s[28:29], v[37:38]
	v_mul_f64 v[52:53], v[39:40], s[30:31]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[67:68], v[39:40], s[30:31], v[41:42]
	v_add_f64 v[54:55], v[41:42], v[52:53]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[41:42], v[41:42], -v[54:55]
	v_add_f64 v[54:55], v[54:55], -v[67:68]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[41:42], v[41:42], v[52:53]
	v_fma_f64 v[52:53], v[39:40], s[6:7], v[52:53]
	v_add_f64 v[41:42], v[54:55], v[41:42]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[41:42], v[41:42], -v[52:53]
	v_fma_f64 v[52:53], v[39:40], s[34:35], v[41:42]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[41:42], v[67:68], v[52:53]
	v_add_f64 v[54:55], v[41:42], -v[67:68]
	v_cvt_i32_f64_e32 v68, v[39:40]
	s_delay_alu instid0(VALU_DEP_2)
	v_add_f64 v[52:53], v[52:53], -v[54:55]
.LBB3_261:                              ; %_ZL3cosd.exit.i.i.5.i.i
                                        ;   in Loop: Header=BB3_257 Depth=2
	s_or_b32 exec_lo, exec_lo, s5
                                        ; implicit-def: $vgpr67
                                        ; implicit-def: $vgpr39_vgpr40
                                        ; implicit-def: $vgpr54_vgpr55
	s_and_saveexec_b32 s5, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s6, exec_lo, s5
	s_cbranch_execz .LBB3_263
; %bb.262:                              ;   in Loop: Header=BB3_257 Depth=2
	v_cmp_le_f64_e64 s4, 0x7b000000, v[37:38]
	s_mov_b32 s10, s12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v40, v38, v65, s4
	v_cndmask_b32_e64 v39, v37, v64, s4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_f64 v[54:55], v[62:63], v[39:40]
	v_mul_f64 v[64:65], v[60:61], v[39:40]
	v_mul_f64 v[80:81], v[50:51], v[39:40]
	v_fma_f64 v[62:63], v[62:63], v[39:40], -v[54:55]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[60:61], v[60:61], v[39:40], -v[64:65]
	v_fma_f64 v[39:40], v[50:51], v[39:40], -v[80:81]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[72:73], v[64:65], v[62:63]
	v_add_f64 v[74:75], v[72:73], -v[64:65]
	v_add_f64 v[78:79], v[54:55], v[72:73]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[76:77], v[72:73], -v[74:75]
	v_add_f64 v[62:63], v[62:63], -v[74:75]
	v_ldexp_f64 v[74:75], v[78:79], -2
	v_add_f64 v[54:55], v[78:79], -v[54:55]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[64:65], v[64:65], -v[76:77]
	v_add_f64 v[76:77], v[80:81], v[60:61]
	v_cmp_neq_f64_e64 s4, 0x7ff00000, |v[74:75]|
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[54:55], v[72:73], -v[54:55]
	v_add_f64 v[62:63], v[62:63], v[64:65]
	v_fract_f64_e32 v[64:65], v[74:75]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[72:73], v[76:77], v[62:63]
	v_cndmask_b32_e64 v65, 0, v65, s4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v64, 0, v64, s4
	v_ldexp_f64 v[64:65], v[64:65], 2
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[74:75], v[54:55], v[72:73]
	v_add_f64 v[82:83], v[72:73], -v[76:77]
	v_add_f64 v[78:79], v[74:75], v[64:65]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[88:89], v[72:73], -v[82:83]
	v_add_f64 v[62:63], v[62:63], -v[82:83]
	v_add_f64 v[50:51], v[74:75], -v[54:55]
	v_cmp_gt_f64_e64 s4, 0, v[78:79]
	v_add_f64 v[78:79], v[76:77], -v[80:81]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[50:51], v[72:73], -v[50:51]
	v_cndmask_b32_e64 v48, 0, 0x40100000, s4
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[86:87], v[76:77], -v[78:79]
	v_add_f64 v[60:61], v[60:61], -v[78:79]
	v_add_f64 v[76:77], v[76:77], -v[88:89]
	v_add_f64 v[64:65], v[64:65], v[47:48]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[78:79], v[80:81], -v[86:87]
	v_add_f64 v[62:63], v[62:63], v[76:77]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[84:85], v[74:75], v[64:65]
	v_add_f64 v[60:61], v[60:61], v[78:79]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_i32_f64_e32 v48, v[84:85]
	v_add_f64 v[54:55], v[60:61], v[62:63]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_i32_e32 v[82:83], v48
	v_add_f64 v[39:40], v[39:40], v[54:55]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[64:65], v[64:65], -v[82:83]
	v_add_f64 v[39:40], v[50:51], v[39:40]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[60:61], v[74:75], v[64:65]
	v_add_f64 v[54:55], v[60:61], -v[64:65]
	v_cmp_le_f64_e64 s4, 0.5, v[60:61]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[50:51], v[74:75], -v[54:55]
	v_add_co_ci_u32_e64 v67, s5, 0, v48, s4
	v_cndmask_b32_e64 v48, 0, 0x3ff00000, s4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[39:40], v[39:40], v[50:51]
	v_add_f64 v[50:51], v[60:61], -v[47:48]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[54:55], v[50:51], v[39:40]
	v_mul_f64 v[60:61], v[54:55], s[10:11]
	v_add_f64 v[50:51], v[54:55], -v[50:51]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[62:63], v[54:55], s[10:11], -v[60:61]
	v_add_f64 v[39:40], v[39:40], -v[50:51]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[50:51], v[54:55], s[24:25], v[62:63]
	v_fma_f64 v[50:51], v[39:40], s[10:11], v[50:51]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[39:40], v[60:61], v[50:51]
	v_add_f64 v[54:55], v[39:40], -v[60:61]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[54:55], v[50:51], -v[54:55]
.LBB3_263:                              ; %Flow1214
                                        ;   in Loop: Header=BB3_257 Depth=2
	s_and_not1_saveexec_b32 s4, s6
	s_cbranch_execz .LBB3_265
; %bb.264:                              ;   in Loop: Header=BB3_257 Depth=2
	v_mul_f64 v[39:40], v[37:38], s[26:27]
	s_mov_b32 s28, s12
	s_mov_b32 s6, s30
	s_mov_b32 s7, s25
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[50:51], v[39:40]
	v_fma_f64 v[39:40], v[50:51], s[28:29], v[37:38]
	v_mul_f64 v[54:55], v[50:51], s[30:31]
	v_cvt_i32_f64_e32 v67, v[50:51]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[62:63], v[50:51], s[30:31], v[39:40]
	v_add_f64 v[60:61], v[39:40], v[54:55]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[39:40], v[39:40], -v[60:61]
	v_add_f64 v[60:61], v[60:61], -v[62:63]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[39:40], v[39:40], v[54:55]
	v_fma_f64 v[54:55], v[50:51], s[6:7], v[54:55]
	v_add_f64 v[39:40], v[60:61], v[39:40]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[39:40], v[39:40], -v[54:55]
	v_fma_f64 v[54:55], v[50:51], s[34:35], v[39:40]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[39:40], v[62:63], v[54:55]
	v_add_f64 v[60:61], v[39:40], -v[62:63]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[54:55], v[54:55], -v[60:61]
.LBB3_265:                              ; %_ZL3sind.exit.i.i.5.i.i
                                        ;   in Loop: Header=BB3_257 Depth=2
	s_or_b32 exec_lo, exec_lo, s4
	v_xor_b32_e32 v43, v43, v56
	v_add_co_u32 v56, s4, v58, v56
	v_xor_b32_e32 v44, v44, v57
	v_add_co_ci_u32_e64 v57, s4, v59, v57, s4
	v_lshlrev_b64 v[50:51], 17, v[11:12]
	v_xor_b32_e32 v11, v43, v11
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_xor_b32_e32 v12, v44, v12
	v_lshrrev_b64 v[56:57], 11, v[56:57]
	s_mov_b32 s75, s37
	s_mov_b32 s76, s36
	v_xor_b32_e32 v48, v44, v51
	v_xor_b32_e32 v50, v43, v50
	v_lshlrev_b64 v[43:44], 17, v[11:12]
	v_cvt_f64_u32_e32 v[57:58], v57
	v_xor_b32_e32 v61, v12, v71
	v_xor_b32_e32 v51, v48, v70
	v_xor_b32_e32 v50, v50, v69
	v_xor_b32_e32 v60, v11, v49
	s_mov_b32 s78, s36
	v_xor_b32_e32 v49, v61, v70
	v_xor_b32_e32 v12, v51, v12
	v_xor_b32_e32 v11, v50, v11
	v_xor_b32_e32 v44, v51, v44
	v_xor_b32_e32 v43, v50, v43
	v_lshrrev_b64 v[50:51], 19, v[60:61]
	v_xor_b32_e32 v48, v60, v69
	v_lshlrev_b32_e32 v60, 13, v60
	v_cmp_lg_f64_e64 s6, 0x7ff00000, v[37:38]
	s_cmp_eq_u32 s82, 4
	v_and_b32_e32 v37, 1, v67
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_or_b32_e32 v51, v60, v51
	v_cvt_f64_u32_e32 v[59:60], v56
	v_cmp_eq_u32_e64 s10, 0, v37
	v_ldexp_f64 v[57:58], v[57:58], 32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[56:57], v[57:58], v[59:60]
	v_ldexp_f64 v[56:57], v[56:57], 0xffffffcb
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_frexp_mant_f64_e32 v[58:59], v[56:57]
	v_cmp_gt_f64_e64 s4, s[36:37], v[58:59]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v60, 0, 1, s4
	v_ldexp_f64 v[58:59], v[58:59], v60
	v_frexp_exp_i32_f64_e32 v60, v[56:57]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[62:63], v[58:59], 1.0
	v_subrev_co_ci_u32_e64 v75, s4, 0, v60, s4
	v_add_f64 v[60:61], v[58:59], -1.0
	v_cmp_eq_f64_e64 s4, 0x7ff00000, v[56:57]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[64:65], v[62:63], -1.0
	v_add_f64 v[58:59], v[58:59], -v[64:65]
	v_rcp_f64_e32 v[64:65], v[62:63]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[69:70], -v[62:63], v[64:65], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[64:65], v[69:70], v[64:65], v[64:65]
	v_fma_f64 v[69:70], -v[62:63], v[64:65], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[64:65], v[69:70], v[64:65], v[64:65]
	v_mul_f64 v[69:70], v[60:61], v[64:65]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[71:72], v[62:63], v[69:70]
	v_fma_f64 v[62:63], v[69:70], v[62:63], -v[71:72]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[58:59], v[69:70], v[58:59], v[62:63]
	v_add_f64 v[62:63], v[71:72], v[58:59]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[73:74], v[60:61], -v[62:63]
	v_add_f64 v[71:72], v[62:63], -v[71:72]
	v_add_f64 v[60:61], v[60:61], -v[73:74]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[58:59], v[71:72], -v[58:59]
	v_add_f64 v[60:61], v[60:61], -v[62:63]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[58:59], v[58:59], v[60:61]
	v_add_f64 v[58:59], v[73:74], v[58:59]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[58:59], v[64:65], v[58:59]
	v_add_f64 v[60:61], v[69:70], v[58:59]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[62:63], v[60:61], -v[69:70]
	v_ldexp_f64 v[69:70], v[60:61], 1
	v_add_f64 v[58:59], v[58:59], -v[62:63]
	v_mul_f64 v[62:63], v[60:61], v[60:61]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[58:59], v[58:59], 1
	v_fma_f64 v[64:65], v[62:63], s[40:41], s[38:39]
	v_mul_f64 v[60:61], v[60:61], v[62:63]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[64:65], v[62:63], v[64:65], s[42:43]
	v_fma_f64 v[64:65], v[62:63], v[64:65], s[44:45]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[64:65], v[62:63], v[64:65], s[46:47]
	v_fma_f64 v[64:65], v[62:63], v[64:65], s[48:49]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[64:65], v[62:63], v[64:65], s[74:75]
	v_mul_f64 v[60:61], v[60:61], v[64:65]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[62:63], v[69:70], v[60:61]
	v_add_f64 v[64:65], v[62:63], -v[69:70]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[60:61], v[60:61], -v[64:65]
	v_add_f64 v[58:59], v[58:59], v[60:61]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[60:61], v[62:63], v[58:59]
	v_add_f64 v[62:63], v[60:61], -v[62:63]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[58:59], v[58:59], -v[62:63]
	v_cvt_f64_i32_e32 v[62:63], v75
	v_mul_f64 v[64:65], v[62:63], s[50:51]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[69:70], v[62:63], s[50:51], -v[64:65]
	v_fma_f64 v[62:63], v[62:63], s[52:53], v[69:70]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[69:70], v[64:65], v[62:63]
	v_add_f64 v[64:65], v[69:70], -v[64:65]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[62:63], v[62:63], -v[64:65]
	v_add_f64 v[64:65], v[69:70], v[60:61]
	v_add_f64 v[71:72], v[64:65], -v[69:70]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[73:74], v[64:65], -v[71:72]
	v_add_f64 v[60:61], v[60:61], -v[71:72]
	v_add_f64 v[69:70], v[69:70], -v[73:74]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[60:61], v[60:61], v[69:70]
	v_add_f64 v[69:70], v[62:63], v[58:59]
	v_add_f64 v[71:72], v[69:70], -v[62:63]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[60:61], v[69:70], v[60:61]
	v_add_f64 v[73:74], v[69:70], -v[71:72]
	v_add_f64 v[58:59], v[58:59], -v[71:72]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[62:63], v[62:63], -v[73:74]
	v_add_f64 v[58:59], v[58:59], v[62:63]
	v_add_f64 v[62:63], v[64:65], v[60:61]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[64:65], v[62:63], -v[64:65]
	v_add_f64 v[60:61], v[60:61], -v[64:65]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[58:59], v[58:59], v[60:61]
	v_add_f64 v[58:59], v[62:63], v[58:59]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v59, v59, v57, s4
	v_cndmask_b32_e64 v58, v58, v56, s4
	v_cmp_ngt_f64_e64 s4, 0, v[56:57]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[58:59], v[58:59], -2.0
	v_cndmask_b32_e64 v59, 0x7ff80000, v59, s4
	v_cmp_nge_f64_e64 s4, 0, v[56:57]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v58, 0, v58, s4
	v_cmp_neq_f64_e64 s4, 0, v[56:57]
	v_cndmask_b32_e64 v59, 0x7ff00000, v59, s4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_f64_e64 s4, 0x10000000, v[58:59]
	v_cndmask_b32_e64 v56, 0, 1, s4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v56, 8, v56
	v_ldexp_f64 v[56:57], v[58:59], v56
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_rsq_f64_e32 v[58:59], v[56:57]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[60:61], v[56:57], v[58:59]
	v_mul_f64 v[58:59], v[58:59], 0.5
	v_fma_f64 v[62:63], -v[58:59], v[60:61], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[60:61], v[60:61], v[62:63], v[60:61]
	v_fma_f64 v[58:59], v[58:59], v[62:63], v[58:59]
	v_fma_f64 v[64:65], -v[60:61], v[60:61], v[56:57]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[60:61], v[64:65], v[58:59], v[60:61]
	v_fma_f64 v[62:63], -v[60:61], v[60:61], v[56:57]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[58:59], v[62:63], v[58:59], v[60:61]
	v_cndmask_b32_e64 v60, 0, 0xffffff80, s4
	v_cmp_class_f64_e64 s4, v[56:57], 0x260
	v_ldexp_f64 v[58:59], v[58:59], v60
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v57, v59, v57, s4
	v_cndmask_b32_e64 v56, v58, v56, s4
	v_mul_f64 v[58:59], v[41:42], v[41:42]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[60:61], v[58:59], 0.5
	v_fma_f64 v[69:70], v[58:59], s[56:57], s[54:55]
	v_add_f64 v[62:63], -v[60:61], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[69:70], v[58:59], v[69:70], s[58:59]
	v_add_f64 v[64:65], -v[62:63], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[69:70], v[58:59], v[69:70], s[60:61]
	v_add_f64 v[60:61], v[64:65], -v[60:61]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[69:70], v[58:59], v[69:70], s[62:63]
	v_mul_f64 v[64:65], v[58:59], v[58:59]
	v_fma_f64 v[60:61], v[41:42], -v[52:53], v[60:61]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[69:70], v[58:59], v[69:70], s[76:77]
	v_fma_f64 v[60:61], v[64:65], v[69:70], v[60:61]
	v_mul_f64 v[64:65], v[41:42], -v[58:59]
	v_mul_f64 v[69:70], v[52:53], 0.5
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[60:61], v[62:63], v[60:61]
	v_fma_f64 v[62:63], v[58:59], s[66:67], s[64:65]
	v_fma_f64 v[62:63], v[58:59], v[62:63], s[68:69]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[62:63], v[58:59], v[62:63], s[70:71]
	v_fma_f64 v[62:63], v[58:59], v[62:63], s[72:73]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[62:63], v[64:65], v[62:63], v[69:70]
	v_fma_f64 v[52:53], v[58:59], v[62:63], -v[52:53]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[52:53], v[64:65], s[78:79], v[52:53]
	v_add_f64 v[41:42], v[41:42], -v[52:53]
	v_and_b32_e32 v52, 1, v68
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s4, 0, v52
	v_lshlrev_b32_e32 v52, 30, v68
	v_and_b32_e32 v52, 0x80000000, v52
	v_xor_b32_e32 v42, 0x80000000, v42
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v41, v41, v60, s4
	v_cndmask_b32_e64 v42, v42, v61, s4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v41, 0, v41, s6
	s_cselect_b32 s4, -1, 0
	s_cmp_eq_u32 s82, 3
	v_xor_b32_e32 v42, v42, v52
	s_cselect_b32 s5, -1, 0
	s_cmp_eq_u32 s82, 2
	s_cselect_b32 s7, -1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v42, 0x7ff80000, v42, s6
	s_cmp_eq_u32 s82, 1
	s_cselect_b32 s8, -1, 0
	s_cmp_eq_u32 s82, 0
	v_mul_f64 v[41:42], v[56:57], v[41:42]
	s_cselect_b32 s9, -1, 0
	s_add_i32 s82, s82, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_cmp_lg_u32 s82, 5
	v_cndmask_b32_e64 v36, v36, v42, s4
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e64 v35, v35, v41, s4
	v_cndmask_b32_e64 v34, v34, v42, s5
	v_cndmask_b32_e64 v33, v33, v41, s5
	v_cndmask_b32_e64 v32, v32, v42, s7
	v_cndmask_b32_e64 v31, v31, v41, s7
	v_cndmask_b32_e64 v30, v30, v42, s8
	v_cndmask_b32_e64 v29, v29, v41, s8
	v_cndmask_b32_e64 v28, v28, v42, s9
	v_cndmask_b32_e64 v27, v27, v41, s9
	v_mul_f64 v[41:42], v[39:40], v[39:40]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[52:53], v[41:42], 0.5
	v_fma_f64 v[62:63], v[41:42], s[56:57], s[54:55]
	v_add_f64 v[58:59], -v[52:53], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[62:63], v[41:42], v[62:63], s[58:59]
	v_add_f64 v[60:61], -v[58:59], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[62:63], v[41:42], v[62:63], s[60:61]
	v_add_f64 v[52:53], v[60:61], -v[52:53]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[62:63], v[41:42], v[62:63], s[62:63]
	v_mul_f64 v[60:61], v[41:42], v[41:42]
	v_fma_f64 v[52:53], v[39:40], -v[54:55], v[52:53]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[62:63], v[41:42], v[62:63], s[76:77]
	v_fma_f64 v[52:53], v[60:61], v[62:63], v[52:53]
	v_mul_f64 v[60:61], v[39:40], -v[41:42]
	v_mul_f64 v[62:63], v[54:55], 0.5
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[52:53], v[58:59], v[52:53]
	v_fma_f64 v[58:59], v[41:42], s[66:67], s[64:65]
	v_fma_f64 v[58:59], v[41:42], v[58:59], s[68:69]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[58:59], v[41:42], v[58:59], s[70:71]
	v_fma_f64 v[58:59], v[41:42], v[58:59], s[72:73]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[58:59], v[60:61], v[58:59], v[62:63]
	v_fma_f64 v[41:42], v[41:42], v[58:59], -v[54:55]
	v_dual_mov_b32 v59, v51 :: v_dual_mov_b32 v58, v50
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[41:42], v[60:61], s[78:79], v[41:42]
	v_add_f64 v[39:40], v[39:40], -v[41:42]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v37, v52, v39, s10
	v_cndmask_b32_e64 v39, v53, v40, s10
	v_lshlrev_b32_e32 v40, 30, v67
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v37, 0, v37, s6
	v_xor_b32_e32 v38, v40, v38
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v38, 0x80000000, v38
	v_xor_b32_e32 v38, v39, v38
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v38, 0x7ff80000, v38, s6
	v_mul_f64 v[37:38], v[56:57], v[37:38]
	v_dual_mov_b32 v57, v49 :: v_dual_mov_b32 v56, v48
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v26, v26, v38, s4
	v_cndmask_b32_e64 v25, v25, v37, s4
	v_cndmask_b32_e64 v24, v24, v38, s5
	v_cndmask_b32_e64 v23, v23, v37, s5
	v_cndmask_b32_e64 v22, v22, v38, s7
	v_cndmask_b32_e64 v21, v21, v37, s7
	v_cndmask_b32_e64 v20, v20, v38, s8
	v_cndmask_b32_e64 v19, v19, v37, s8
	v_cndmask_b32_e64 v18, v18, v38, s9
	v_cndmask_b32_e64 v17, v17, v37, s9
	s_cbranch_scc1 .LBB3_257
; %bb.266:                              ; %.lr.ph.i.i.5.i.i.preheader
                                        ;   in Loop: Header=BB3_256 Depth=1
	v_mov_b32_e32 v37, 0
	v_mov_b32_e32 v38, 0
	s_mov_b32 s8, 0
.LBB3_267:                              ; %.lr.ph.i.i.5.i.i
                                        ;   Parent Loop BB3_256 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB3_268 Depth 3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s8, 1
	s_mov_b32 s9, s8
	s_cselect_b32 s4, -1, 0
	s_cmp_eq_u32 s8, 2
	v_cndmask_b32_e64 v39, v28, v30, s4
	v_cndmask_b32_e64 v40, v27, v29, s4
	v_cndmask_b32_e64 v41, v18, v20, s4
	v_cndmask_b32_e64 v42, v17, v19, s4
	s_cselect_b32 s4, -1, 0
	s_cmp_eq_u32 s8, 3
	v_cndmask_b32_e64 v39, v39, v32, s4
	v_cndmask_b32_e64 v40, v40, v31, s4
	v_cndmask_b32_e64 v41, v41, v22, s4
	v_cndmask_b32_e64 v42, v42, v21, s4
	s_cselect_b32 s4, -1, 0
	s_cmp_eq_u32 s8, 4
	v_cndmask_b32_e64 v39, v39, v34, s4
	v_cndmask_b32_e64 v52, v40, v33, s4
	v_cndmask_b32_e64 v41, v41, v24, s4
	v_cndmask_b32_e64 v53, v42, v23, s4
	s_cselect_b32 s4, -1, 0
	s_delay_alu instid0(SALU_CYCLE_1)
	v_cndmask_b32_e64 v40, v39, v36, s4
	v_cndmask_b32_e64 v39, v52, v35, s4
	v_cndmask_b32_e64 v42, v41, v26, s4
	v_cndmask_b32_e64 v41, v53, v25, s4
.LBB3_268:                              ;   Parent Loop BB3_256 Depth=1
                                        ;     Parent Loop BB3_267 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_add_i32 s9, s9, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s9, 1
	s_cselect_b32 s4, -1, 0
	s_cmp_eq_u32 s9, 2
	v_cndmask_b32_e64 v53, v18, v20, s4
	v_cndmask_b32_e64 v54, v17, v19, s4
	s_cselect_b32 s5, -1, 0
	s_cmp_eq_u32 s9, 3
	v_cndmask_b32_e64 v52, v28, v30, s4
	v_cndmask_b32_e64 v53, v53, v22, s5
	v_cndmask_b32_e64 v54, v54, v21, s5
	s_cselect_b32 s6, -1, 0
	s_cmp_eq_u32 s9, 4
	v_cndmask_b32_e64 v52, v52, v32, s5
	v_cndmask_b32_e64 v55, v53, v24, s6
	v_cndmask_b32_e64 v54, v54, v23, s6
	s_cselect_b32 s7, -1, 0
	s_cmp_lt_u32 s9, 4
	v_cndmask_b32_e64 v52, v52, v34, s6
	v_cndmask_b32_e64 v55, v55, v26, s7
	v_cndmask_b32_e64 v54, v54, v25, s7
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v53, v52, v36, s7
	v_cndmask_b32_e64 v52, v27, v29, s4
	v_add_f64 v[54:55], v[41:42], -v[54:55]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v52, v52, v31, s5
	v_cndmask_b32_e64 v52, v52, v33, s6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v52, v52, v35, s7
	v_add_f64 v[52:53], v[39:40], -v[52:53]
	v_mul_f64 v[54:55], v[54:55], v[54:55]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[52:53], v[52:53], v[52:53], v[54:55]
	v_cmp_lt_f64_e64 s4, v[37:38], v[52:53]
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e64 v38, v38, v53, s4
	v_cndmask_b32_e64 v37, v37, v52, s4
	s_cbranch_scc1 .LBB3_268
; %bb.269:                              ; %.loopexit.i.i.5.i.i
                                        ;   in Loop: Header=BB3_267 Depth=2
	s_add_i32 s8, s8, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s8, 4
	s_cbranch_scc1 .LBB3_267
; %bb.270:                              ;   in Loop: Header=BB3_256 Depth=1
	v_cmp_gt_f64_e64 s4, 0x10000000, v[37:38]
	s_add_i32 s81, s81, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_cmp_lg_u32 s81, 0x10000
	v_cndmask_b32_e64 v39, 0, 1, s4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v39, 8, v39
	v_ldexp_f64 v[37:38], v[37:38], v39
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_rsq_f64_e32 v[39:40], v[37:38]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[41:42], v[37:38], v[39:40]
	v_mul_f64 v[39:40], v[39:40], 0.5
	v_fma_f64 v[52:53], -v[39:40], v[41:42], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[41:42], v[41:42], v[52:53], v[41:42]
	v_fma_f64 v[39:40], v[39:40], v[52:53], v[39:40]
	v_fma_f64 v[52:53], -v[41:42], v[41:42], v[37:38]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[41:42], v[52:53], v[39:40], v[41:42]
	v_fma_f64 v[52:53], -v[41:42], v[41:42], v[37:38]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[39:40], v[52:53], v[39:40], v[41:42]
	v_cndmask_b32_e64 v41, 0, 0xffffff80, s4
	v_cmp_class_f64_e64 s4, v[37:38], 0x260
	v_ldexp_f64 v[39:40], v[39:40], v41
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v38, v40, v38, s4
	v_cndmask_b32_e64 v37, v39, v37, s4
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[45:46], v[45:46], v[37:38]
	s_cbranch_scc1 .LBB3_256
; %bb.271:                              ; %_ZNK6thrust11hip_rocprim26transform_input_iterator_tIdNS_17counting_iteratorIjNS_11use_defaultES3_S3_EE11estimate_esEixEl.exit.5.i.i
	s_delay_alu instid0(VALU_DEP_1)
	v_ldexp_f64 v[11:12], v[45:46], -16
.LBB3_272:                              ; %Flow1216
	s_or_b32 exec_lo, exec_lo, s80
	v_or_b32_e32 v17, 0x600, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s4, s33, v17
	s_and_saveexec_b32 s82, s4
	s_cbranch_execz .LBB3_292
; %bb.273:
	s_movk_i32 s5, 0x1001
	s_mov_b64 s[10:11], 0
	v_mad_u64_u32 v[13:14], null, v66, s5, 0x7f356316
                                        ; implicit-def: $vgpr48_vgpr49
                                        ; implicit-def: $vgpr43_vgpr44
                                        ; implicit-def: $vgpr50_vgpr51
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v14, 19, v13
	v_xor3_b32 v13, v13, v14, 0xc761c23c
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v13, v13, 5, v13
	v_add_nc_u32_e32 v14, 0xe9f8cc1d, v13
	v_lshl_add_u32 v13, v13, 9, 0xaccf6200
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v13, v14, v13
	v_lshlrev_b32_e32 v14, 3, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v13, v13, v14, 0xfd7046c5
	v_lshrrev_b32_e32 v14, 16, v13
	s_delay_alu instid0(VALU_DEP_1)
	v_xor3_b32 v17, v13, v14, 0xb55a4f09
                                        ; implicit-def: $vgpr13_vgpr14
.LBB3_274:                              ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v18, 12, v17
	s_cmp_eq_u32 s10, 0
	s_cselect_b32 s5, -1, 0
	s_cmp_eq_u32 s10, 1
	v_add3_u32 v17, v17, v18, 0x7ed55d16
	s_cselect_b32 s6, -1, 0
	s_cmp_eq_u32 s10, 2
	s_cselect_b32 s7, -1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v18, 19, v17
	s_cmp_eq_u32 s10, 3
	s_cselect_b32 s8, -1, 0
	s_add_u32 s10, s10, 1
	v_xor3_b32 v17, v17, v18, 0xc761c23c
	s_addc_u32 s11, s11, 0
	s_cmp_lg_u32 s10, 4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v17, v17, 5, v17
	v_add_nc_u32_e32 v18, 0xe9f8cc1d, v17
	v_lshl_add_u32 v17, v17, 9, 0xaccf6200
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v17, v18, v17
	v_lshlrev_b32_e32 v18, 3, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v17, v17, v18, 0xfd7046c5
	v_lshrrev_b32_e32 v18, 16, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor3_b32 v17, v17, v18, 0xb55a4f09
	v_lshlrev_b32_e32 v19, 12, v17
	v_xor_b32_e32 v18, s23, v17
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add3_u32 v17, v17, v19, 0x7ed55d16
	v_cndmask_b32_e64 v49, v49, v18, s5
	v_cndmask_b32_e64 v14, v14, v18, s6
	v_cndmask_b32_e64 v44, v44, v18, s7
	v_cndmask_b32_e64 v51, v51, v18, s8
	v_lshrrev_b32_e32 v19, 19, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor3_b32 v17, v17, v19, 0xc761c23c
	v_lshl_add_u32 v17, v17, 5, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v19, 0xe9f8cc1d, v17
	v_lshl_add_u32 v17, v17, 9, 0xaccf6200
	v_xor_b32_e32 v17, v19, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v19, 3, v17
	v_add3_u32 v17, v17, v19, 0xfd7046c5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v19, 16, v17
	v_xor3_b32 v17, v17, v19, 0xb55a4f09
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v18, s22, v17
	v_cndmask_b32_e64 v48, v48, v18, s5
	v_cndmask_b32_e64 v13, v13, v18, s6
	v_cndmask_b32_e64 v43, v43, v18, s7
	v_cndmask_b32_e64 v50, v50, v18, s8
	s_cbranch_scc1 .LBB3_274
; %bb.275:                              ; %.preheader55.i.i.6.i.i.preheader
	v_mov_b32_e32 v45, 0
	v_dual_mov_b32 v46, 0 :: v_dual_mov_b32 v47, 0
	s_mov_b32 s12, 0x54442d18
	s_mov_b32 s26, 0x33145c07
	s_mov_b32 s28, 0x6dc9c883
	s_mov_b32 s34, 0x33145c00
	s_mov_b32 s36, 0x252049c0
	s_mov_b32 s38, 0x55555555
	s_mov_b32 s40, 0x6b47b09a
	s_mov_b32 s42, 0xbf559e2b
	s_mov_b32 s44, 0xd7f4df2e
	s_mov_b32 s46, 0x16291751
	s_mov_b32 s48, 0x9b27acf1
	s_mov_b32 s50, 0x998ef7b6
	s_mov_b32 s52, 0xfefa39ef
	s_mov_b32 s54, 0x3b39803f
	s_mov_b32 s56, 0x9037ab78
	s_mov_b32 s58, 0x46cc5e42
	s_mov_b32 s60, 0xa17f65f6
	s_mov_b32 s62, 0x19f4ec90
	s_mov_b32 s64, 0x16c16967
	s_mov_b32 s66, 0xb42fdfa7
	s_mov_b32 s68, 0xf9a43bb8
	s_mov_b32 s70, 0x796cde01
	s_mov_b32 s72, 0x19e83e5c
	s_mov_b32 s74, 0x11110bb3
	s_mov_b32 s83, 0
	s_mov_b32 s13, 0x401921fb
	s_mov_b32 s25, 0x3ff921fb
	s_mov_b32 s27, 0x3c91a626
	s_mov_b32 s29, 0x3fe45f30
	s_mov_b32 s31, 0xbff921fb
	s_mov_b32 s35, 0xbc91a626
	s_mov_b32 s37, 0xb97b839a
	s_mov_b32 s39, 0x3fe55555
	s_mov_b32 s41, 0x3fc38538
	s_mov_b32 s43, 0x3fc3ab76
	s_mov_b32 s45, 0x3fc7474d
	s_mov_b32 s47, 0x3fcc71c0
	s_mov_b32 s49, 0x3fd24924
	s_mov_b32 s51, 0x3fd99999
	s_mov_b32 s53, 0x3fe62e42
	s_mov_b32 s55, 0x3c7abc9e
	s_mov_b32 s57, 0x3e21eeb6
	s_mov_b32 s59, 0xbda907db
	s_mov_b32 s61, 0xbe927e4f
	s_mov_b32 s63, 0x3efa01a0
	s_mov_b32 s65, 0xbf56c16c
	s_mov_b32 s67, 0xbe5ae600
	s_mov_b32 s69, 0x3de5e0b2
	s_mov_b32 s71, 0x3ec71de3
	s_mov_b32 s73, 0xbf2a01a0
	s_mov_b32 s75, 0x3f811111
	s_mov_b32 s76, 0x55555780
	s_mov_b32 s79, 0x3fa55555
	s_mov_b32 s81, 0xbfc55555
                                        ; implicit-def: $vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31_vgpr32
                                        ; implicit-def: $vgpr27_vgpr28_vgpr29_vgpr30_vgpr31_vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42
.LBB3_276:                              ; %.preheader55.i.i.6.i.i
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB3_277 Depth 2
                                        ;     Child Loop BB3_287 Depth 2
                                        ;       Child Loop BB3_288 Depth 3
	v_dual_mov_b32 v57, v49 :: v_dual_mov_b32 v56, v48
	v_dual_mov_b32 v59, v51 :: v_dual_mov_b32 v58, v50
	s_mov_b32 s84, 0
.LBB3_277:                              ;   Parent Loop BB3_276 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v38, v14, v59
	v_xor_b32_e32 v37, v13, v58
                                        ; implicit-def: $vgpr68
                                        ; implicit-def: $vgpr52_vgpr53
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v70, v38, v57
	v_lshrrev_b64 v[49:50], 19, v[37:38]
	v_lshlrev_b32_e32 v39, 13, v37
	v_xor_b32_e32 v69, v37, v56
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_or_b32_e32 v71, v39, v50
	v_add_co_u32 v37, s5, v49, v69
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v38, s5, v71, v70, s5
	v_lshrrev_b64 v[37:38], 11, v[37:38]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_u32_e32 v[38:39], v38
	v_cvt_f64_u32_e32 v[40:41], v37
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[37:38], v[38:39], 32
	v_add_f64 v[37:38], v[37:38], v[40:41]
                                        ; implicit-def: $vgpr41_vgpr42
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[37:38], v[37:38], 0xffffffcb
	v_mul_f64 v[37:38], v[37:38], s[12:13]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ngt_f64_e64 s5, 0x41d00000, v[37:38]
	v_trig_preop_f64 v[62:63], v[37:38], 0
	v_trig_preop_f64 v[60:61], v[37:38], 1
	v_ldexp_f64 v[64:65], v[37:38], 0xffffff80
	v_trig_preop_f64 v[50:51], v[37:38], 2
	s_and_saveexec_b32 s6, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s8, exec_lo, s6
	s_cbranch_execz .LBB3_279
; %bb.278:                              ;   in Loop: Header=BB3_277 Depth=2
	v_cmp_le_f64_e64 s6, 0x7b000000, v[37:38]
	s_mov_b32 s24, s12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v40, v38, v65, s6
	v_cndmask_b32_e64 v39, v37, v64, s6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_f64 v[41:42], v[62:63], v[39:40]
	v_mul_f64 v[52:53], v[60:61], v[39:40]
	v_mul_f64 v[78:79], v[50:51], v[39:40]
	v_fma_f64 v[54:55], v[62:63], v[39:40], -v[41:42]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[80:81], v[60:61], v[39:40], -v[52:53]
	v_fma_f64 v[39:40], v[50:51], v[39:40], -v[78:79]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[67:68], v[52:53], v[54:55]
	v_add_f64 v[72:73], v[67:68], -v[52:53]
	v_add_f64 v[76:77], v[41:42], v[67:68]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[74:75], v[67:68], -v[72:73]
	v_add_f64 v[54:55], v[54:55], -v[72:73]
	v_ldexp_f64 v[72:73], v[76:77], -2
	v_add_f64 v[41:42], v[76:77], -v[41:42]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[52:53], v[52:53], -v[74:75]
	v_add_f64 v[74:75], v[78:79], v[80:81]
	v_cmp_neq_f64_e64 s6, 0x7ff00000, |v[72:73]|
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[41:42], v[67:68], -v[41:42]
	v_add_f64 v[52:53], v[54:55], v[52:53]
	v_fract_f64_e32 v[54:55], v[72:73]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[67:68], v[74:75], v[52:53]
	v_cndmask_b32_e64 v55, 0, v55, s6
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v54, 0, v54, s6
	v_ldexp_f64 v[54:55], v[54:55], 2
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[72:73], v[41:42], v[67:68]
	v_add_f64 v[82:83], v[67:68], -v[74:75]
	v_add_f64 v[76:77], v[72:73], v[54:55]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[88:89], v[67:68], -v[82:83]
	v_add_f64 v[52:53], v[52:53], -v[82:83]
	v_add_f64 v[41:42], v[72:73], -v[41:42]
	v_cmp_gt_f64_e64 s6, 0, v[76:77]
	v_add_f64 v[76:77], v[74:75], -v[78:79]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[41:42], v[67:68], -v[41:42]
	v_cndmask_b32_e64 v48, 0, 0x40100000, s6
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[86:87], v[74:75], -v[76:77]
	v_add_f64 v[76:77], v[80:81], -v[76:77]
	v_add_f64 v[74:75], v[74:75], -v[88:89]
	v_add_f64 v[54:55], v[54:55], v[47:48]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[80:81], v[78:79], -v[86:87]
	v_add_f64 v[52:53], v[52:53], v[74:75]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[84:85], v[72:73], v[54:55]
	v_add_f64 v[76:77], v[76:77], v[80:81]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_i32_f64_e32 v48, v[84:85]
	v_add_f64 v[52:53], v[76:77], v[52:53]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_i32_e32 v[82:83], v48
	v_add_f64 v[39:40], v[39:40], v[52:53]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[54:55], v[54:55], -v[82:83]
	v_add_f64 v[39:40], v[41:42], v[39:40]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[74:75], v[72:73], v[54:55]
	v_add_f64 v[52:53], v[74:75], -v[54:55]
	v_cmp_le_f64_e64 s6, 0.5, v[74:75]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[41:42], v[72:73], -v[52:53]
	v_add_co_ci_u32_e64 v68, s7, 0, v48, s6
	v_cndmask_b32_e64 v48, 0, 0x3ff00000, s6
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[39:40], v[39:40], v[41:42]
	v_add_f64 v[41:42], v[74:75], -v[47:48]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[52:53], v[41:42], v[39:40]
	v_mul_f64 v[54:55], v[52:53], s[24:25]
	v_add_f64 v[41:42], v[52:53], -v[41:42]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[72:73], v[52:53], s[24:25], -v[54:55]
	v_add_f64 v[39:40], v[39:40], -v[41:42]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[41:42], v[52:53], s[26:27], v[72:73]
	v_fma_f64 v[39:40], v[39:40], s[24:25], v[41:42]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[41:42], v[54:55], v[39:40]
	v_add_f64 v[52:53], v[41:42], -v[54:55]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[52:53], v[39:40], -v[52:53]
.LBB3_279:                              ; %Flow1212
                                        ;   in Loop: Header=BB3_277 Depth=2
	s_and_not1_saveexec_b32 s6, s8
	s_cbranch_execz .LBB3_281
; %bb.280:                              ;   in Loop: Header=BB3_277 Depth=2
	v_mul_f64 v[39:40], v[37:38], s[28:29]
	s_mov_b32 s30, s12
	s_mov_b32 s8, s34
	s_mov_b32 s9, s27
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[39:40], v[39:40]
	v_fma_f64 v[41:42], v[39:40], s[30:31], v[37:38]
	v_mul_f64 v[52:53], v[39:40], s[34:35]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[67:68], v[39:40], s[34:35], v[41:42]
	v_add_f64 v[54:55], v[41:42], v[52:53]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[41:42], v[41:42], -v[54:55]
	v_add_f64 v[54:55], v[54:55], -v[67:68]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[41:42], v[41:42], v[52:53]
	v_fma_f64 v[52:53], v[39:40], s[8:9], v[52:53]
	v_add_f64 v[41:42], v[54:55], v[41:42]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[41:42], v[41:42], -v[52:53]
	v_fma_f64 v[52:53], v[39:40], s[36:37], v[41:42]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[41:42], v[67:68], v[52:53]
	v_add_f64 v[54:55], v[41:42], -v[67:68]
	v_cvt_i32_f64_e32 v68, v[39:40]
	s_delay_alu instid0(VALU_DEP_2)
	v_add_f64 v[52:53], v[52:53], -v[54:55]
.LBB3_281:                              ; %_ZL3cosd.exit.i.i.6.i.i
                                        ;   in Loop: Header=BB3_277 Depth=2
	s_or_b32 exec_lo, exec_lo, s6
                                        ; implicit-def: $vgpr67
                                        ; implicit-def: $vgpr39_vgpr40
                                        ; implicit-def: $vgpr54_vgpr55
	s_and_saveexec_b32 s6, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s7, exec_lo, s6
	s_cbranch_execz .LBB3_283
; %bb.282:                              ;   in Loop: Header=BB3_277 Depth=2
	v_cmp_le_f64_e64 s5, 0x7b000000, v[37:38]
	s_mov_b32 s24, s12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v40, v38, v65, s5
	v_cndmask_b32_e64 v39, v37, v64, s5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_f64 v[54:55], v[62:63], v[39:40]
	v_mul_f64 v[64:65], v[60:61], v[39:40]
	v_mul_f64 v[80:81], v[50:51], v[39:40]
	v_fma_f64 v[62:63], v[62:63], v[39:40], -v[54:55]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[60:61], v[60:61], v[39:40], -v[64:65]
	v_fma_f64 v[39:40], v[50:51], v[39:40], -v[80:81]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[72:73], v[64:65], v[62:63]
	v_add_f64 v[74:75], v[72:73], -v[64:65]
	v_add_f64 v[78:79], v[54:55], v[72:73]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[76:77], v[72:73], -v[74:75]
	v_add_f64 v[62:63], v[62:63], -v[74:75]
	v_ldexp_f64 v[74:75], v[78:79], -2
	v_add_f64 v[54:55], v[78:79], -v[54:55]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[64:65], v[64:65], -v[76:77]
	v_add_f64 v[76:77], v[80:81], v[60:61]
	v_cmp_neq_f64_e64 s5, 0x7ff00000, |v[74:75]|
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[54:55], v[72:73], -v[54:55]
	v_add_f64 v[62:63], v[62:63], v[64:65]
	v_fract_f64_e32 v[64:65], v[74:75]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[72:73], v[76:77], v[62:63]
	v_cndmask_b32_e64 v65, 0, v65, s5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v64, 0, v64, s5
	v_ldexp_f64 v[64:65], v[64:65], 2
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[74:75], v[54:55], v[72:73]
	v_add_f64 v[82:83], v[72:73], -v[76:77]
	v_add_f64 v[78:79], v[74:75], v[64:65]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[88:89], v[72:73], -v[82:83]
	v_add_f64 v[62:63], v[62:63], -v[82:83]
	v_add_f64 v[50:51], v[74:75], -v[54:55]
	v_cmp_gt_f64_e64 s5, 0, v[78:79]
	v_add_f64 v[78:79], v[76:77], -v[80:81]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[50:51], v[72:73], -v[50:51]
	v_cndmask_b32_e64 v48, 0, 0x40100000, s5
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[86:87], v[76:77], -v[78:79]
	v_add_f64 v[60:61], v[60:61], -v[78:79]
	v_add_f64 v[76:77], v[76:77], -v[88:89]
	v_add_f64 v[64:65], v[64:65], v[47:48]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[78:79], v[80:81], -v[86:87]
	v_add_f64 v[62:63], v[62:63], v[76:77]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[84:85], v[74:75], v[64:65]
	v_add_f64 v[60:61], v[60:61], v[78:79]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_i32_f64_e32 v48, v[84:85]
	v_add_f64 v[54:55], v[60:61], v[62:63]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_i32_e32 v[82:83], v48
	v_add_f64 v[39:40], v[39:40], v[54:55]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[64:65], v[64:65], -v[82:83]
	v_add_f64 v[39:40], v[50:51], v[39:40]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[60:61], v[74:75], v[64:65]
	v_add_f64 v[54:55], v[60:61], -v[64:65]
	v_cmp_le_f64_e64 s5, 0.5, v[60:61]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[50:51], v[74:75], -v[54:55]
	v_add_co_ci_u32_e64 v67, s6, 0, v48, s5
	v_cndmask_b32_e64 v48, 0, 0x3ff00000, s5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[39:40], v[39:40], v[50:51]
	v_add_f64 v[50:51], v[60:61], -v[47:48]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[54:55], v[50:51], v[39:40]
	v_mul_f64 v[60:61], v[54:55], s[24:25]
	v_add_f64 v[50:51], v[54:55], -v[50:51]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[62:63], v[54:55], s[24:25], -v[60:61]
	v_add_f64 v[39:40], v[39:40], -v[50:51]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[50:51], v[54:55], s[26:27], v[62:63]
	v_fma_f64 v[50:51], v[39:40], s[24:25], v[50:51]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[39:40], v[60:61], v[50:51]
	v_add_f64 v[54:55], v[39:40], -v[60:61]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[54:55], v[50:51], -v[54:55]
.LBB3_283:                              ; %Flow1211
                                        ;   in Loop: Header=BB3_277 Depth=2
	s_and_not1_saveexec_b32 s5, s7
	s_cbranch_execz .LBB3_285
; %bb.284:                              ;   in Loop: Header=BB3_277 Depth=2
	v_mul_f64 v[39:40], v[37:38], s[28:29]
	s_mov_b32 s30, s12
	s_mov_b32 s6, s34
	s_mov_b32 s7, s27
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[50:51], v[39:40]
	v_fma_f64 v[39:40], v[50:51], s[30:31], v[37:38]
	v_mul_f64 v[54:55], v[50:51], s[34:35]
	v_cvt_i32_f64_e32 v67, v[50:51]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[62:63], v[50:51], s[34:35], v[39:40]
	v_add_f64 v[60:61], v[39:40], v[54:55]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[39:40], v[39:40], -v[60:61]
	v_add_f64 v[60:61], v[60:61], -v[62:63]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[39:40], v[39:40], v[54:55]
	v_fma_f64 v[54:55], v[50:51], s[6:7], v[54:55]
	v_add_f64 v[39:40], v[60:61], v[39:40]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[39:40], v[39:40], -v[54:55]
	v_fma_f64 v[54:55], v[50:51], s[36:37], v[39:40]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[39:40], v[62:63], v[54:55]
	v_add_f64 v[60:61], v[39:40], -v[62:63]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[54:55], v[54:55], -v[60:61]
.LBB3_285:                              ; %_ZL3sind.exit.i.i.6.i.i
                                        ;   in Loop: Header=BB3_277 Depth=2
	s_or_b32 exec_lo, exec_lo, s5
	v_xor_b32_e32 v43, v43, v56
	v_add_co_u32 v56, s5, v58, v56
	v_xor_b32_e32 v44, v44, v57
	v_add_co_ci_u32_e64 v57, s5, v59, v57, s5
	v_lshlrev_b64 v[50:51], 17, v[13:14]
	v_xor_b32_e32 v13, v43, v13
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_xor_b32_e32 v14, v44, v14
	v_lshrrev_b64 v[56:57], 11, v[56:57]
	s_mov_b32 s77, s39
	s_mov_b32 s78, s38
	v_xor_b32_e32 v48, v44, v51
	v_xor_b32_e32 v50, v43, v50
	v_lshlrev_b64 v[43:44], 17, v[13:14]
	v_cvt_f64_u32_e32 v[57:58], v57
	v_xor_b32_e32 v61, v14, v71
	v_xor_b32_e32 v51, v48, v70
	v_xor_b32_e32 v50, v50, v69
	v_xor_b32_e32 v60, v13, v49
	s_mov_b32 s80, s38
	v_xor_b32_e32 v49, v61, v70
	v_xor_b32_e32 v14, v51, v14
	v_xor_b32_e32 v13, v50, v13
	v_xor_b32_e32 v44, v51, v44
	v_xor_b32_e32 v43, v50, v43
	v_lshrrev_b64 v[50:51], 19, v[60:61]
	v_xor_b32_e32 v48, v60, v69
	v_lshlrev_b32_e32 v60, 13, v60
	v_cmp_lg_f64_e64 s7, 0x7ff00000, v[37:38]
	s_cmp_eq_u32 s84, 4
	v_and_b32_e32 v37, 1, v67
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_or_b32_e32 v51, v60, v51
	v_cvt_f64_u32_e32 v[59:60], v56
	v_cmp_eq_u32_e64 s11, 0, v37
	v_ldexp_f64 v[57:58], v[57:58], 32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[56:57], v[57:58], v[59:60]
	v_ldexp_f64 v[56:57], v[56:57], 0xffffffcb
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_frexp_mant_f64_e32 v[58:59], v[56:57]
	v_cmp_gt_f64_e64 s5, s[38:39], v[58:59]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v60, 0, 1, s5
	v_ldexp_f64 v[58:59], v[58:59], v60
	v_frexp_exp_i32_f64_e32 v60, v[56:57]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[62:63], v[58:59], 1.0
	v_subrev_co_ci_u32_e64 v75, s5, 0, v60, s5
	v_add_f64 v[60:61], v[58:59], -1.0
	v_cmp_eq_f64_e64 s5, 0x7ff00000, v[56:57]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[64:65], v[62:63], -1.0
	v_add_f64 v[58:59], v[58:59], -v[64:65]
	v_rcp_f64_e32 v[64:65], v[62:63]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[69:70], -v[62:63], v[64:65], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[64:65], v[69:70], v[64:65], v[64:65]
	v_fma_f64 v[69:70], -v[62:63], v[64:65], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[64:65], v[69:70], v[64:65], v[64:65]
	v_mul_f64 v[69:70], v[60:61], v[64:65]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[71:72], v[62:63], v[69:70]
	v_fma_f64 v[62:63], v[69:70], v[62:63], -v[71:72]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[58:59], v[69:70], v[58:59], v[62:63]
	v_add_f64 v[62:63], v[71:72], v[58:59]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[73:74], v[60:61], -v[62:63]
	v_add_f64 v[71:72], v[62:63], -v[71:72]
	v_add_f64 v[60:61], v[60:61], -v[73:74]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[58:59], v[71:72], -v[58:59]
	v_add_f64 v[60:61], v[60:61], -v[62:63]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[58:59], v[58:59], v[60:61]
	v_add_f64 v[58:59], v[73:74], v[58:59]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[58:59], v[64:65], v[58:59]
	v_add_f64 v[60:61], v[69:70], v[58:59]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[62:63], v[60:61], -v[69:70]
	v_ldexp_f64 v[69:70], v[60:61], 1
	v_add_f64 v[58:59], v[58:59], -v[62:63]
	v_mul_f64 v[62:63], v[60:61], v[60:61]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[58:59], v[58:59], 1
	v_fma_f64 v[64:65], v[62:63], s[42:43], s[40:41]
	v_mul_f64 v[60:61], v[60:61], v[62:63]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[64:65], v[62:63], v[64:65], s[44:45]
	v_fma_f64 v[64:65], v[62:63], v[64:65], s[46:47]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[64:65], v[62:63], v[64:65], s[48:49]
	v_fma_f64 v[64:65], v[62:63], v[64:65], s[50:51]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[64:65], v[62:63], v[64:65], s[76:77]
	v_mul_f64 v[60:61], v[60:61], v[64:65]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[62:63], v[69:70], v[60:61]
	v_add_f64 v[64:65], v[62:63], -v[69:70]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[60:61], v[60:61], -v[64:65]
	v_add_f64 v[58:59], v[58:59], v[60:61]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[60:61], v[62:63], v[58:59]
	v_add_f64 v[62:63], v[60:61], -v[62:63]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[58:59], v[58:59], -v[62:63]
	v_cvt_f64_i32_e32 v[62:63], v75
	v_mul_f64 v[64:65], v[62:63], s[52:53]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[69:70], v[62:63], s[52:53], -v[64:65]
	v_fma_f64 v[62:63], v[62:63], s[54:55], v[69:70]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[69:70], v[64:65], v[62:63]
	v_add_f64 v[64:65], v[69:70], -v[64:65]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[62:63], v[62:63], -v[64:65]
	v_add_f64 v[64:65], v[69:70], v[60:61]
	v_add_f64 v[71:72], v[64:65], -v[69:70]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[73:74], v[64:65], -v[71:72]
	v_add_f64 v[60:61], v[60:61], -v[71:72]
	v_add_f64 v[69:70], v[69:70], -v[73:74]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[60:61], v[60:61], v[69:70]
	v_add_f64 v[69:70], v[62:63], v[58:59]
	v_add_f64 v[71:72], v[69:70], -v[62:63]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[60:61], v[69:70], v[60:61]
	v_add_f64 v[73:74], v[69:70], -v[71:72]
	v_add_f64 v[58:59], v[58:59], -v[71:72]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[62:63], v[62:63], -v[73:74]
	v_add_f64 v[58:59], v[58:59], v[62:63]
	v_add_f64 v[62:63], v[64:65], v[60:61]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[64:65], v[62:63], -v[64:65]
	v_add_f64 v[60:61], v[60:61], -v[64:65]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[58:59], v[58:59], v[60:61]
	v_add_f64 v[58:59], v[62:63], v[58:59]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v59, v59, v57, s5
	v_cndmask_b32_e64 v58, v58, v56, s5
	v_cmp_ngt_f64_e64 s5, 0, v[56:57]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[58:59], v[58:59], -2.0
	v_cndmask_b32_e64 v59, 0x7ff80000, v59, s5
	v_cmp_nge_f64_e64 s5, 0, v[56:57]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v58, 0, v58, s5
	v_cmp_neq_f64_e64 s5, 0, v[56:57]
	v_cndmask_b32_e64 v59, 0x7ff00000, v59, s5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_f64_e64 s5, 0x10000000, v[58:59]
	v_cndmask_b32_e64 v56, 0, 1, s5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v56, 8, v56
	v_ldexp_f64 v[56:57], v[58:59], v56
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_rsq_f64_e32 v[58:59], v[56:57]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[60:61], v[56:57], v[58:59]
	v_mul_f64 v[58:59], v[58:59], 0.5
	v_fma_f64 v[62:63], -v[58:59], v[60:61], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[60:61], v[60:61], v[62:63], v[60:61]
	v_fma_f64 v[58:59], v[58:59], v[62:63], v[58:59]
	v_fma_f64 v[64:65], -v[60:61], v[60:61], v[56:57]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[60:61], v[64:65], v[58:59], v[60:61]
	v_fma_f64 v[62:63], -v[60:61], v[60:61], v[56:57]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[58:59], v[62:63], v[58:59], v[60:61]
	v_cndmask_b32_e64 v60, 0, 0xffffff80, s5
	v_cmp_class_f64_e64 s5, v[56:57], 0x260
	v_ldexp_f64 v[58:59], v[58:59], v60
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v57, v59, v57, s5
	v_cndmask_b32_e64 v56, v58, v56, s5
	v_mul_f64 v[58:59], v[41:42], v[41:42]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[60:61], v[58:59], 0.5
	v_fma_f64 v[69:70], v[58:59], s[58:59], s[56:57]
	v_add_f64 v[62:63], -v[60:61], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[69:70], v[58:59], v[69:70], s[60:61]
	v_add_f64 v[64:65], -v[62:63], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[69:70], v[58:59], v[69:70], s[62:63]
	v_add_f64 v[60:61], v[64:65], -v[60:61]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[69:70], v[58:59], v[69:70], s[64:65]
	v_mul_f64 v[64:65], v[58:59], v[58:59]
	v_fma_f64 v[60:61], v[41:42], -v[52:53], v[60:61]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[69:70], v[58:59], v[69:70], s[78:79]
	v_fma_f64 v[60:61], v[64:65], v[69:70], v[60:61]
	v_mul_f64 v[64:65], v[41:42], -v[58:59]
	v_mul_f64 v[69:70], v[52:53], 0.5
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[60:61], v[62:63], v[60:61]
	v_fma_f64 v[62:63], v[58:59], s[68:69], s[66:67]
	v_fma_f64 v[62:63], v[58:59], v[62:63], s[70:71]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[62:63], v[58:59], v[62:63], s[72:73]
	v_fma_f64 v[62:63], v[58:59], v[62:63], s[74:75]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[62:63], v[64:65], v[62:63], v[69:70]
	v_fma_f64 v[52:53], v[58:59], v[62:63], -v[52:53]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[52:53], v[64:65], s[80:81], v[52:53]
	v_add_f64 v[41:42], v[41:42], -v[52:53]
	v_and_b32_e32 v52, 1, v68
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s5, 0, v52
	v_lshlrev_b32_e32 v52, 30, v68
	v_and_b32_e32 v52, 0x80000000, v52
	v_xor_b32_e32 v42, 0x80000000, v42
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v41, v41, v60, s5
	v_cndmask_b32_e64 v42, v42, v61, s5
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v41, 0, v41, s7
	s_cselect_b32 s5, -1, 0
	s_cmp_eq_u32 s84, 3
	v_xor_b32_e32 v42, v42, v52
	s_cselect_b32 s6, -1, 0
	s_cmp_eq_u32 s84, 2
	s_cselect_b32 s8, -1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v42, 0x7ff80000, v42, s7
	s_cmp_eq_u32 s84, 1
	s_cselect_b32 s9, -1, 0
	s_cmp_eq_u32 s84, 0
	v_mul_f64 v[41:42], v[56:57], v[41:42]
	s_cselect_b32 s10, -1, 0
	s_add_i32 s84, s84, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_cmp_lg_u32 s84, 5
	v_cndmask_b32_e64 v36, v36, v42, s5
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e64 v35, v35, v41, s5
	v_cndmask_b32_e64 v34, v34, v42, s6
	v_cndmask_b32_e64 v33, v33, v41, s6
	v_cndmask_b32_e64 v32, v32, v42, s8
	v_cndmask_b32_e64 v31, v31, v41, s8
	v_cndmask_b32_e64 v30, v30, v42, s9
	v_cndmask_b32_e64 v29, v29, v41, s9
	v_cndmask_b32_e64 v28, v28, v42, s10
	v_cndmask_b32_e64 v27, v27, v41, s10
	v_mul_f64 v[41:42], v[39:40], v[39:40]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[52:53], v[41:42], 0.5
	v_fma_f64 v[62:63], v[41:42], s[58:59], s[56:57]
	v_add_f64 v[58:59], -v[52:53], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[62:63], v[41:42], v[62:63], s[60:61]
	v_add_f64 v[60:61], -v[58:59], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[62:63], v[41:42], v[62:63], s[62:63]
	v_add_f64 v[52:53], v[60:61], -v[52:53]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[62:63], v[41:42], v[62:63], s[64:65]
	v_mul_f64 v[60:61], v[41:42], v[41:42]
	v_fma_f64 v[52:53], v[39:40], -v[54:55], v[52:53]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[62:63], v[41:42], v[62:63], s[78:79]
	v_fma_f64 v[52:53], v[60:61], v[62:63], v[52:53]
	v_mul_f64 v[60:61], v[39:40], -v[41:42]
	v_mul_f64 v[62:63], v[54:55], 0.5
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[52:53], v[58:59], v[52:53]
	v_fma_f64 v[58:59], v[41:42], s[68:69], s[66:67]
	v_fma_f64 v[58:59], v[41:42], v[58:59], s[70:71]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[58:59], v[41:42], v[58:59], s[72:73]
	v_fma_f64 v[58:59], v[41:42], v[58:59], s[74:75]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[58:59], v[60:61], v[58:59], v[62:63]
	v_fma_f64 v[41:42], v[41:42], v[58:59], -v[54:55]
	v_dual_mov_b32 v59, v51 :: v_dual_mov_b32 v58, v50
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[41:42], v[60:61], s[80:81], v[41:42]
	v_add_f64 v[39:40], v[39:40], -v[41:42]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v37, v52, v39, s11
	v_cndmask_b32_e64 v39, v53, v40, s11
	v_lshlrev_b32_e32 v40, 30, v67
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v37, 0, v37, s7
	v_xor_b32_e32 v38, v40, v38
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v38, 0x80000000, v38
	v_xor_b32_e32 v38, v39, v38
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v38, 0x7ff80000, v38, s7
	v_mul_f64 v[37:38], v[56:57], v[37:38]
	v_dual_mov_b32 v57, v49 :: v_dual_mov_b32 v56, v48
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v26, v26, v38, s5
	v_cndmask_b32_e64 v25, v25, v37, s5
	v_cndmask_b32_e64 v24, v24, v38, s6
	v_cndmask_b32_e64 v23, v23, v37, s6
	v_cndmask_b32_e64 v22, v22, v38, s8
	v_cndmask_b32_e64 v21, v21, v37, s8
	v_cndmask_b32_e64 v20, v20, v38, s9
	v_cndmask_b32_e64 v19, v19, v37, s9
	v_cndmask_b32_e64 v18, v18, v38, s10
	v_cndmask_b32_e64 v17, v17, v37, s10
	s_cbranch_scc1 .LBB3_277
; %bb.286:                              ; %.lr.ph.i.i.6.i.i.preheader
                                        ;   in Loop: Header=BB3_276 Depth=1
	v_mov_b32_e32 v37, 0
	v_mov_b32_e32 v38, 0
	s_mov_b32 s9, 0
.LBB3_287:                              ; %.lr.ph.i.i.6.i.i
                                        ;   Parent Loop BB3_276 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB3_288 Depth 3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s9, 1
	s_mov_b32 s10, s9
	s_cselect_b32 s5, -1, 0
	s_cmp_eq_u32 s9, 2
	v_cndmask_b32_e64 v39, v28, v30, s5
	v_cndmask_b32_e64 v40, v27, v29, s5
	v_cndmask_b32_e64 v41, v18, v20, s5
	v_cndmask_b32_e64 v42, v17, v19, s5
	s_cselect_b32 s5, -1, 0
	s_cmp_eq_u32 s9, 3
	v_cndmask_b32_e64 v39, v39, v32, s5
	v_cndmask_b32_e64 v40, v40, v31, s5
	v_cndmask_b32_e64 v41, v41, v22, s5
	v_cndmask_b32_e64 v42, v42, v21, s5
	s_cselect_b32 s5, -1, 0
	s_cmp_eq_u32 s9, 4
	v_cndmask_b32_e64 v39, v39, v34, s5
	v_cndmask_b32_e64 v52, v40, v33, s5
	v_cndmask_b32_e64 v41, v41, v24, s5
	v_cndmask_b32_e64 v53, v42, v23, s5
	s_cselect_b32 s5, -1, 0
	s_delay_alu instid0(SALU_CYCLE_1)
	v_cndmask_b32_e64 v40, v39, v36, s5
	v_cndmask_b32_e64 v39, v52, v35, s5
	v_cndmask_b32_e64 v42, v41, v26, s5
	v_cndmask_b32_e64 v41, v53, v25, s5
.LBB3_288:                              ;   Parent Loop BB3_276 Depth=1
                                        ;     Parent Loop BB3_287 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_add_i32 s10, s10, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s10, 1
	s_cselect_b32 s5, -1, 0
	s_cmp_eq_u32 s10, 2
	v_cndmask_b32_e64 v53, v18, v20, s5
	v_cndmask_b32_e64 v54, v17, v19, s5
	s_cselect_b32 s6, -1, 0
	s_cmp_eq_u32 s10, 3
	v_cndmask_b32_e64 v52, v28, v30, s5
	v_cndmask_b32_e64 v53, v53, v22, s6
	v_cndmask_b32_e64 v54, v54, v21, s6
	s_cselect_b32 s7, -1, 0
	s_cmp_eq_u32 s10, 4
	v_cndmask_b32_e64 v52, v52, v32, s6
	v_cndmask_b32_e64 v55, v53, v24, s7
	v_cndmask_b32_e64 v54, v54, v23, s7
	s_cselect_b32 s8, -1, 0
	s_cmp_lt_u32 s10, 4
	v_cndmask_b32_e64 v52, v52, v34, s7
	v_cndmask_b32_e64 v55, v55, v26, s8
	v_cndmask_b32_e64 v54, v54, v25, s8
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v53, v52, v36, s8
	v_cndmask_b32_e64 v52, v27, v29, s5
	v_add_f64 v[54:55], v[41:42], -v[54:55]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v52, v52, v31, s6
	v_cndmask_b32_e64 v52, v52, v33, s7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v52, v52, v35, s8
	v_add_f64 v[52:53], v[39:40], -v[52:53]
	v_mul_f64 v[54:55], v[54:55], v[54:55]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[52:53], v[52:53], v[52:53], v[54:55]
	v_cmp_lt_f64_e64 s5, v[37:38], v[52:53]
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e64 v38, v38, v53, s5
	v_cndmask_b32_e64 v37, v37, v52, s5
	s_cbranch_scc1 .LBB3_288
; %bb.289:                              ; %.loopexit.i.i.6.i.i
                                        ;   in Loop: Header=BB3_287 Depth=2
	s_add_i32 s9, s9, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s9, 4
	s_cbranch_scc1 .LBB3_287
; %bb.290:                              ;   in Loop: Header=BB3_276 Depth=1
	v_cmp_gt_f64_e64 s5, 0x10000000, v[37:38]
	s_add_i32 s83, s83, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_cmp_lg_u32 s83, 0x10000
	v_cndmask_b32_e64 v39, 0, 1, s5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v39, 8, v39
	v_ldexp_f64 v[37:38], v[37:38], v39
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_rsq_f64_e32 v[39:40], v[37:38]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[41:42], v[37:38], v[39:40]
	v_mul_f64 v[39:40], v[39:40], 0.5
	v_fma_f64 v[52:53], -v[39:40], v[41:42], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[41:42], v[41:42], v[52:53], v[41:42]
	v_fma_f64 v[39:40], v[39:40], v[52:53], v[39:40]
	v_fma_f64 v[52:53], -v[41:42], v[41:42], v[37:38]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[41:42], v[52:53], v[39:40], v[41:42]
	v_fma_f64 v[52:53], -v[41:42], v[41:42], v[37:38]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[39:40], v[52:53], v[39:40], v[41:42]
	v_cndmask_b32_e64 v41, 0, 0xffffff80, s5
	v_cmp_class_f64_e64 s5, v[37:38], 0x260
	v_ldexp_f64 v[39:40], v[39:40], v41
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v38, v40, v38, s5
	v_cndmask_b32_e64 v37, v39, v37, s5
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[45:46], v[45:46], v[37:38]
	s_cbranch_scc1 .LBB3_276
; %bb.291:                              ; %_ZNK6thrust11hip_rocprim26transform_input_iterator_tIdNS_17counting_iteratorIjNS_11use_defaultES3_S3_EE11estimate_esEixEl.exit.6.i.i
	s_delay_alu instid0(VALU_DEP_1)
	v_ldexp_f64 v[13:14], v[45:46], -16
.LBB3_292:                              ; %Flow1213
	s_or_b32 exec_lo, exec_lo, s82
	v_or_b32_e32 v17, 0x700, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s5, s33, v17
	s_and_saveexec_b32 s80, s5
	s_cbranch_execz .LBB3_312
; %bb.293:
	s_movk_i32 s6, 0x1001
	s_mov_b64 s[10:11], 0
	v_mad_u64_u32 v[15:16], null, v66, s6, 0x7f456416
                                        ; implicit-def: $vgpr48_vgpr49
                                        ; implicit-def: $vgpr41_vgpr42
                                        ; implicit-def: $vgpr43_vgpr44
                                        ; implicit-def: $vgpr50_vgpr51
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v16, 19, v15
	v_xor3_b32 v15, v15, v16, 0xc761c23c
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v15, v15, 5, v15
	v_add_nc_u32_e32 v16, 0xe9f8cc1d, v15
	v_lshl_add_u32 v15, v15, 9, 0xaccf6200
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v15, v16, v15
	v_lshlrev_b32_e32 v16, 3, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v15, v15, v16, 0xfd7046c5
	v_lshrrev_b32_e32 v16, 16, v15
	s_delay_alu instid0(VALU_DEP_1)
	v_xor3_b32 v15, v15, v16, 0xb55a4f09
.LBB3_294:                              ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v16, 12, v15
	s_cmp_eq_u32 s10, 0
	s_cselect_b32 s6, -1, 0
	s_cmp_eq_u32 s10, 1
	v_add3_u32 v15, v15, v16, 0x7ed55d16
	s_cselect_b32 s7, -1, 0
	s_cmp_eq_u32 s10, 2
	s_cselect_b32 s8, -1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v16, 19, v15
	s_cmp_eq_u32 s10, 3
	s_cselect_b32 s9, -1, 0
	s_add_u32 s10, s10, 1
	v_xor3_b32 v15, v15, v16, 0xc761c23c
	s_addc_u32 s11, s11, 0
	s_cmp_lg_u32 s10, 4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v15, v15, 5, v15
	v_add_nc_u32_e32 v16, 0xe9f8cc1d, v15
	v_lshl_add_u32 v15, v15, 9, 0xaccf6200
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v15, v16, v15
	v_lshlrev_b32_e32 v16, 3, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v15, v15, v16, 0xfd7046c5
	v_lshrrev_b32_e32 v16, 16, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor3_b32 v15, v15, v16, 0xb55a4f09
	v_lshlrev_b32_e32 v17, 12, v15
	v_xor_b32_e32 v16, s23, v15
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add3_u32 v15, v15, v17, 0x7ed55d16
	v_cndmask_b32_e64 v49, v49, v16, s6
	v_cndmask_b32_e64 v42, v42, v16, s7
	v_cndmask_b32_e64 v44, v44, v16, s8
	v_cndmask_b32_e64 v51, v51, v16, s9
	v_lshrrev_b32_e32 v17, 19, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor3_b32 v15, v15, v17, 0xc761c23c
	v_lshl_add_u32 v15, v15, 5, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v17, 0xe9f8cc1d, v15
	v_lshl_add_u32 v15, v15, 9, 0xaccf6200
	v_xor_b32_e32 v15, v17, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v17, 3, v15
	v_add3_u32 v15, v15, v17, 0xfd7046c5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v17, 16, v15
	v_xor3_b32 v15, v15, v17, 0xb55a4f09
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v16, s22, v15
	v_cndmask_b32_e64 v48, v48, v16, s6
	v_cndmask_b32_e64 v41, v41, v16, s7
	v_cndmask_b32_e64 v43, v43, v16, s8
	v_cndmask_b32_e64 v50, v50, v16, s9
	s_cbranch_scc1 .LBB3_294
; %bb.295:                              ; %.preheader55.i.i.7.i.i.preheader
	v_mov_b32_e32 v45, 0
	v_dual_mov_b32 v46, 0 :: v_dual_mov_b32 v47, 0
	s_mov_b32 s22, 0x54442d18
	s_mov_b32 s24, 0x33145c07
	s_mov_b32 s26, 0x6dc9c883
	s_mov_b32 s30, 0x33145c00
	s_mov_b32 s34, 0x252049c0
	s_mov_b32 s36, 0x55555555
	s_mov_b32 s38, 0x6b47b09a
	s_mov_b32 s40, 0xbf559e2b
	s_mov_b32 s42, 0xd7f4df2e
	s_mov_b32 s44, 0x16291751
	s_mov_b32 s46, 0x9b27acf1
	s_mov_b32 s48, 0x998ef7b6
	s_mov_b32 s50, 0xfefa39ef
	s_mov_b32 s52, 0x3b39803f
	s_mov_b32 s54, 0x9037ab78
	s_mov_b32 s56, 0x46cc5e42
	s_mov_b32 s58, 0xa17f65f6
	s_mov_b32 s60, 0x19f4ec90
	s_mov_b32 s62, 0x16c16967
	s_mov_b32 s64, 0xb42fdfa7
	s_mov_b32 s66, 0xf9a43bb8
	s_mov_b32 s68, 0x796cde01
	s_mov_b32 s70, 0x19e83e5c
	s_mov_b32 s72, 0x11110bb3
	s_mov_b32 s81, 0
	s_mov_b32 s23, 0x401921fb
	s_mov_b32 s13, 0x3ff921fb
	s_mov_b32 s25, 0x3c91a626
	s_mov_b32 s27, 0x3fe45f30
	s_mov_b32 s29, 0xbff921fb
	s_mov_b32 s31, 0xbc91a626
	s_mov_b32 s35, 0xb97b839a
	s_mov_b32 s37, 0x3fe55555
	s_mov_b32 s39, 0x3fc38538
	s_mov_b32 s41, 0x3fc3ab76
	s_mov_b32 s43, 0x3fc7474d
	s_mov_b32 s45, 0x3fcc71c0
	s_mov_b32 s47, 0x3fd24924
	s_mov_b32 s49, 0x3fd99999
	s_mov_b32 s51, 0x3fe62e42
	s_mov_b32 s53, 0x3c7abc9e
	s_mov_b32 s55, 0x3e21eeb6
	s_mov_b32 s57, 0xbda907db
	s_mov_b32 s59, 0xbe927e4f
	s_mov_b32 s61, 0x3efa01a0
	s_mov_b32 s63, 0xbf56c16c
	s_mov_b32 s65, 0xbe5ae600
	s_mov_b32 s67, 0x3de5e0b2
	s_mov_b32 s69, 0x3ec71de3
	s_mov_b32 s71, 0xbf2a01a0
	s_mov_b32 s73, 0x3f811111
	s_mov_b32 s74, 0x55555780
	s_mov_b32 s77, 0x3fa55555
	s_mov_b32 s79, 0xbfc55555
                                        ; implicit-def: $vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30
                                        ; implicit-def: $vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31_vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40
.LBB3_296:                              ; %.preheader55.i.i.7.i.i
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB3_297 Depth 2
                                        ;     Child Loop BB3_307 Depth 2
                                        ;       Child Loop BB3_308 Depth 3
	v_dual_mov_b32 v57, v49 :: v_dual_mov_b32 v56, v48
	v_dual_mov_b32 v59, v51 :: v_dual_mov_b32 v58, v50
	s_mov_b32 s82, 0
.LBB3_297:                              ;   Parent Loop BB3_296 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v36, v42, v59
	v_xor_b32_e32 v35, v41, v58
                                        ; implicit-def: $vgpr67
                                        ; implicit-def: $vgpr52_vgpr53
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v69, v36, v57
	v_lshrrev_b64 v[49:50], 19, v[35:36]
	v_lshlrev_b32_e32 v37, 13, v35
	v_xor_b32_e32 v68, v35, v56
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_or_b32_e32 v70, v37, v50
	v_add_co_u32 v35, s6, v49, v68
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v36, s6, v70, v69, s6
	v_lshrrev_b64 v[35:36], 11, v[35:36]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_u32_e32 v[36:37], v36
	v_cvt_f64_u32_e32 v[38:39], v35
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[35:36], v[36:37], 32
	v_add_f64 v[35:36], v[35:36], v[38:39]
                                        ; implicit-def: $vgpr39_vgpr40
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[35:36], v[35:36], 0xffffffcb
	v_mul_f64 v[35:36], v[35:36], s[22:23]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ngt_f64_e64 s6, 0x41d00000, v[35:36]
	v_trig_preop_f64 v[62:63], v[35:36], 0
	v_trig_preop_f64 v[60:61], v[35:36], 1
	v_ldexp_f64 v[64:65], v[35:36], 0xffffff80
	v_trig_preop_f64 v[50:51], v[35:36], 2
	s_and_saveexec_b32 s7, s6
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s9, exec_lo, s7
	s_cbranch_execz .LBB3_299
; %bb.298:                              ;   in Loop: Header=BB3_297 Depth=2
	v_cmp_le_f64_e64 s7, 0x7b000000, v[35:36]
	s_mov_b32 s12, s22
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v38, v36, v65, s7
	v_cndmask_b32_e64 v37, v35, v64, s7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_f64 v[39:40], v[62:63], v[37:38]
	v_mul_f64 v[52:53], v[60:61], v[37:38]
	v_mul_f64 v[77:78], v[50:51], v[37:38]
	v_fma_f64 v[54:55], v[62:63], v[37:38], -v[39:40]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[79:80], v[60:61], v[37:38], -v[52:53]
	v_fma_f64 v[37:38], v[50:51], v[37:38], -v[77:78]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[66:67], v[52:53], v[54:55]
	v_add_f64 v[71:72], v[66:67], -v[52:53]
	v_add_f64 v[75:76], v[39:40], v[66:67]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[73:74], v[66:67], -v[71:72]
	v_add_f64 v[54:55], v[54:55], -v[71:72]
	v_ldexp_f64 v[71:72], v[75:76], -2
	v_add_f64 v[39:40], v[75:76], -v[39:40]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[52:53], v[52:53], -v[73:74]
	v_add_f64 v[73:74], v[77:78], v[79:80]
	v_cmp_neq_f64_e64 s7, 0x7ff00000, |v[71:72]|
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[39:40], v[66:67], -v[39:40]
	v_add_f64 v[52:53], v[54:55], v[52:53]
	v_fract_f64_e32 v[54:55], v[71:72]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[66:67], v[73:74], v[52:53]
	v_cndmask_b32_e64 v55, 0, v55, s7
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v54, 0, v54, s7
	v_ldexp_f64 v[54:55], v[54:55], 2
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[71:72], v[39:40], v[66:67]
	v_add_f64 v[81:82], v[66:67], -v[73:74]
	v_add_f64 v[75:76], v[71:72], v[54:55]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[87:88], v[66:67], -v[81:82]
	v_add_f64 v[52:53], v[52:53], -v[81:82]
	v_add_f64 v[39:40], v[71:72], -v[39:40]
	v_cmp_gt_f64_e64 s7, 0, v[75:76]
	v_add_f64 v[75:76], v[73:74], -v[77:78]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[39:40], v[66:67], -v[39:40]
	v_cndmask_b32_e64 v48, 0, 0x40100000, s7
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[85:86], v[73:74], -v[75:76]
	v_add_f64 v[75:76], v[79:80], -v[75:76]
	v_add_f64 v[73:74], v[73:74], -v[87:88]
	v_add_f64 v[54:55], v[54:55], v[47:48]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[79:80], v[77:78], -v[85:86]
	v_add_f64 v[52:53], v[52:53], v[73:74]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[83:84], v[71:72], v[54:55]
	v_add_f64 v[75:76], v[75:76], v[79:80]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_i32_f64_e32 v48, v[83:84]
	v_add_f64 v[52:53], v[75:76], v[52:53]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_i32_e32 v[81:82], v48
	v_add_f64 v[37:38], v[37:38], v[52:53]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[54:55], v[54:55], -v[81:82]
	v_add_f64 v[37:38], v[39:40], v[37:38]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[73:74], v[71:72], v[54:55]
	v_add_f64 v[52:53], v[73:74], -v[54:55]
	v_cmp_le_f64_e64 s7, 0.5, v[73:74]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[39:40], v[71:72], -v[52:53]
	v_add_co_ci_u32_e64 v67, s8, 0, v48, s7
	v_cndmask_b32_e64 v48, 0, 0x3ff00000, s7
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[37:38], v[37:38], v[39:40]
	v_add_f64 v[39:40], v[73:74], -v[47:48]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[52:53], v[39:40], v[37:38]
	v_mul_f64 v[54:55], v[52:53], s[12:13]
	v_add_f64 v[39:40], v[52:53], -v[39:40]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[71:72], v[52:53], s[12:13], -v[54:55]
	v_add_f64 v[37:38], v[37:38], -v[39:40]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[39:40], v[52:53], s[24:25], v[71:72]
	v_fma_f64 v[37:38], v[37:38], s[12:13], v[39:40]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[39:40], v[54:55], v[37:38]
	v_add_f64 v[52:53], v[39:40], -v[54:55]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[52:53], v[37:38], -v[52:53]
.LBB3_299:                              ; %Flow1209
                                        ;   in Loop: Header=BB3_297 Depth=2
	s_and_not1_saveexec_b32 s7, s9
	s_cbranch_execz .LBB3_301
; %bb.300:                              ;   in Loop: Header=BB3_297 Depth=2
	v_mul_f64 v[37:38], v[35:36], s[26:27]
	s_mov_b32 s28, s22
	s_mov_b32 s8, s30
	s_mov_b32 s9, s25
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[37:38], v[37:38]
	v_fma_f64 v[39:40], v[37:38], s[28:29], v[35:36]
	v_mul_f64 v[52:53], v[37:38], s[30:31]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[66:67], v[37:38], s[30:31], v[39:40]
	v_add_f64 v[54:55], v[39:40], v[52:53]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[39:40], v[39:40], -v[54:55]
	v_add_f64 v[54:55], v[54:55], -v[66:67]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[39:40], v[39:40], v[52:53]
	v_fma_f64 v[52:53], v[37:38], s[8:9], v[52:53]
	v_add_f64 v[39:40], v[54:55], v[39:40]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[39:40], v[39:40], -v[52:53]
	v_fma_f64 v[52:53], v[37:38], s[34:35], v[39:40]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[39:40], v[66:67], v[52:53]
	v_add_f64 v[54:55], v[39:40], -v[66:67]
	v_cvt_i32_f64_e32 v67, v[37:38]
	s_delay_alu instid0(VALU_DEP_2)
	v_add_f64 v[52:53], v[52:53], -v[54:55]
.LBB3_301:                              ; %_ZL3cosd.exit.i.i.7.i.i
                                        ;   in Loop: Header=BB3_297 Depth=2
	s_or_b32 exec_lo, exec_lo, s7
                                        ; implicit-def: $vgpr66
                                        ; implicit-def: $vgpr37_vgpr38
                                        ; implicit-def: $vgpr54_vgpr55
	s_and_saveexec_b32 s7, s6
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s8, exec_lo, s7
	s_cbranch_execz .LBB3_303
; %bb.302:                              ;   in Loop: Header=BB3_297 Depth=2
	v_cmp_le_f64_e64 s6, 0x7b000000, v[35:36]
	s_mov_b32 s12, s22
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v38, v36, v65, s6
	v_cndmask_b32_e64 v37, v35, v64, s6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_f64 v[54:55], v[62:63], v[37:38]
	v_mul_f64 v[64:65], v[60:61], v[37:38]
	v_mul_f64 v[79:80], v[50:51], v[37:38]
	v_fma_f64 v[62:63], v[62:63], v[37:38], -v[54:55]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[60:61], v[60:61], v[37:38], -v[64:65]
	v_fma_f64 v[37:38], v[50:51], v[37:38], -v[79:80]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[71:72], v[64:65], v[62:63]
	v_add_f64 v[73:74], v[71:72], -v[64:65]
	v_add_f64 v[77:78], v[54:55], v[71:72]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[75:76], v[71:72], -v[73:74]
	v_add_f64 v[62:63], v[62:63], -v[73:74]
	v_ldexp_f64 v[73:74], v[77:78], -2
	v_add_f64 v[54:55], v[77:78], -v[54:55]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[64:65], v[64:65], -v[75:76]
	v_add_f64 v[75:76], v[79:80], v[60:61]
	v_cmp_neq_f64_e64 s6, 0x7ff00000, |v[73:74]|
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[54:55], v[71:72], -v[54:55]
	v_add_f64 v[62:63], v[62:63], v[64:65]
	v_fract_f64_e32 v[64:65], v[73:74]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[71:72], v[75:76], v[62:63]
	v_cndmask_b32_e64 v65, 0, v65, s6
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v64, 0, v64, s6
	v_ldexp_f64 v[64:65], v[64:65], 2
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[73:74], v[54:55], v[71:72]
	v_add_f64 v[81:82], v[71:72], -v[75:76]
	v_add_f64 v[77:78], v[73:74], v[64:65]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[87:88], v[71:72], -v[81:82]
	v_add_f64 v[62:63], v[62:63], -v[81:82]
	v_add_f64 v[50:51], v[73:74], -v[54:55]
	v_cmp_gt_f64_e64 s6, 0, v[77:78]
	v_add_f64 v[77:78], v[75:76], -v[79:80]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[50:51], v[71:72], -v[50:51]
	v_cndmask_b32_e64 v48, 0, 0x40100000, s6
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[85:86], v[75:76], -v[77:78]
	v_add_f64 v[60:61], v[60:61], -v[77:78]
	v_add_f64 v[75:76], v[75:76], -v[87:88]
	v_add_f64 v[64:65], v[64:65], v[47:48]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[77:78], v[79:80], -v[85:86]
	v_add_f64 v[62:63], v[62:63], v[75:76]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[83:84], v[73:74], v[64:65]
	v_add_f64 v[60:61], v[60:61], v[77:78]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_i32_f64_e32 v48, v[83:84]
	v_add_f64 v[54:55], v[60:61], v[62:63]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_i32_e32 v[81:82], v48
	v_add_f64 v[37:38], v[37:38], v[54:55]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[64:65], v[64:65], -v[81:82]
	v_add_f64 v[37:38], v[50:51], v[37:38]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[60:61], v[73:74], v[64:65]
	v_add_f64 v[54:55], v[60:61], -v[64:65]
	v_cmp_le_f64_e64 s6, 0.5, v[60:61]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[50:51], v[73:74], -v[54:55]
	v_add_co_ci_u32_e64 v66, s7, 0, v48, s6
	v_cndmask_b32_e64 v48, 0, 0x3ff00000, s6
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[37:38], v[37:38], v[50:51]
	v_add_f64 v[50:51], v[60:61], -v[47:48]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[54:55], v[50:51], v[37:38]
	v_mul_f64 v[60:61], v[54:55], s[12:13]
	v_add_f64 v[50:51], v[54:55], -v[50:51]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[62:63], v[54:55], s[12:13], -v[60:61]
	v_add_f64 v[37:38], v[37:38], -v[50:51]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[50:51], v[54:55], s[24:25], v[62:63]
	v_fma_f64 v[50:51], v[37:38], s[12:13], v[50:51]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[37:38], v[60:61], v[50:51]
	v_add_f64 v[54:55], v[37:38], -v[60:61]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[54:55], v[50:51], -v[54:55]
.LBB3_303:                              ; %Flow1208
                                        ;   in Loop: Header=BB3_297 Depth=2
	s_and_not1_saveexec_b32 s6, s8
	s_cbranch_execz .LBB3_305
; %bb.304:                              ;   in Loop: Header=BB3_297 Depth=2
	v_mul_f64 v[37:38], v[35:36], s[26:27]
	s_mov_b32 s28, s22
	s_mov_b32 s8, s30
	s_mov_b32 s9, s25
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[50:51], v[37:38]
	v_fma_f64 v[37:38], v[50:51], s[28:29], v[35:36]
	v_mul_f64 v[54:55], v[50:51], s[30:31]
	v_cvt_i32_f64_e32 v66, v[50:51]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[62:63], v[50:51], s[30:31], v[37:38]
	v_add_f64 v[60:61], v[37:38], v[54:55]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[37:38], v[37:38], -v[60:61]
	v_add_f64 v[60:61], v[60:61], -v[62:63]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[37:38], v[37:38], v[54:55]
	v_fma_f64 v[54:55], v[50:51], s[8:9], v[54:55]
	v_add_f64 v[37:38], v[60:61], v[37:38]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[37:38], v[37:38], -v[54:55]
	v_fma_f64 v[54:55], v[50:51], s[34:35], v[37:38]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[37:38], v[62:63], v[54:55]
	v_add_f64 v[60:61], v[37:38], -v[62:63]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[54:55], v[54:55], -v[60:61]
.LBB3_305:                              ; %_ZL3sind.exit.i.i.7.i.i
                                        ;   in Loop: Header=BB3_297 Depth=2
	s_or_b32 exec_lo, exec_lo, s6
	v_xor_b32_e32 v43, v43, v56
	v_add_co_u32 v56, s6, v58, v56
	v_xor_b32_e32 v44, v44, v57
	v_add_co_ci_u32_e64 v57, s6, v59, v57, s6
	v_lshlrev_b64 v[50:51], 17, v[41:42]
	v_xor_b32_e32 v41, v43, v41
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_xor_b32_e32 v42, v44, v42
	v_lshrrev_b64 v[56:57], 11, v[56:57]
	s_mov_b32 s75, s37
	s_mov_b32 s76, s36
	v_xor_b32_e32 v48, v44, v51
	v_xor_b32_e32 v50, v43, v50
	v_lshlrev_b64 v[43:44], 17, v[41:42]
	v_cvt_f64_u32_e32 v[57:58], v57
	v_xor_b32_e32 v61, v42, v70
	v_xor_b32_e32 v51, v48, v69
	v_xor_b32_e32 v50, v50, v68
	v_xor_b32_e32 v60, v41, v49
	s_mov_b32 s78, s36
	v_xor_b32_e32 v49, v61, v69
	v_xor_b32_e32 v42, v51, v42
	v_xor_b32_e32 v41, v50, v41
	v_xor_b32_e32 v44, v51, v44
	v_xor_b32_e32 v43, v50, v43
	v_lshrrev_b64 v[50:51], 19, v[60:61]
	v_xor_b32_e32 v48, v60, v68
	v_lshlrev_b32_e32 v60, 13, v60
	v_cmp_lg_f64_e64 s8, 0x7ff00000, v[35:36]
	s_cmp_eq_u32 s82, 4
	v_and_b32_e32 v35, 1, v66
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_or_b32_e32 v51, v60, v51
	v_cvt_f64_u32_e32 v[59:60], v56
	v_cmp_eq_u32_e64 s12, 0, v35
	v_ldexp_f64 v[57:58], v[57:58], 32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[56:57], v[57:58], v[59:60]
	v_ldexp_f64 v[56:57], v[56:57], 0xffffffcb
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_frexp_mant_f64_e32 v[58:59], v[56:57]
	v_cmp_gt_f64_e64 s6, s[36:37], v[58:59]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v60, 0, 1, s6
	v_ldexp_f64 v[58:59], v[58:59], v60
	v_frexp_exp_i32_f64_e32 v60, v[56:57]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[62:63], v[58:59], 1.0
	v_subrev_co_ci_u32_e64 v74, s6, 0, v60, s6
	v_add_f64 v[60:61], v[58:59], -1.0
	v_cmp_eq_f64_e64 s6, 0x7ff00000, v[56:57]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[64:65], v[62:63], -1.0
	v_add_f64 v[58:59], v[58:59], -v[64:65]
	v_rcp_f64_e32 v[64:65], v[62:63]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[68:69], -v[62:63], v[64:65], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[64:65], v[68:69], v[64:65], v[64:65]
	v_fma_f64 v[68:69], -v[62:63], v[64:65], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[64:65], v[68:69], v[64:65], v[64:65]
	v_mul_f64 v[68:69], v[60:61], v[64:65]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[70:71], v[62:63], v[68:69]
	v_fma_f64 v[62:63], v[68:69], v[62:63], -v[70:71]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[58:59], v[68:69], v[58:59], v[62:63]
	v_add_f64 v[62:63], v[70:71], v[58:59]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[72:73], v[60:61], -v[62:63]
	v_add_f64 v[70:71], v[62:63], -v[70:71]
	v_add_f64 v[60:61], v[60:61], -v[72:73]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[58:59], v[70:71], -v[58:59]
	v_add_f64 v[60:61], v[60:61], -v[62:63]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[58:59], v[58:59], v[60:61]
	v_add_f64 v[58:59], v[72:73], v[58:59]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[58:59], v[64:65], v[58:59]
	v_add_f64 v[60:61], v[68:69], v[58:59]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[62:63], v[60:61], -v[68:69]
	v_ldexp_f64 v[68:69], v[60:61], 1
	v_add_f64 v[58:59], v[58:59], -v[62:63]
	v_mul_f64 v[62:63], v[60:61], v[60:61]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[58:59], v[58:59], 1
	v_fma_f64 v[64:65], v[62:63], s[40:41], s[38:39]
	v_mul_f64 v[60:61], v[60:61], v[62:63]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[64:65], v[62:63], v[64:65], s[42:43]
	v_fma_f64 v[64:65], v[62:63], v[64:65], s[44:45]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[64:65], v[62:63], v[64:65], s[46:47]
	v_fma_f64 v[64:65], v[62:63], v[64:65], s[48:49]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[64:65], v[62:63], v[64:65], s[74:75]
	v_mul_f64 v[60:61], v[60:61], v[64:65]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[62:63], v[68:69], v[60:61]
	v_add_f64 v[64:65], v[62:63], -v[68:69]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[60:61], v[60:61], -v[64:65]
	v_add_f64 v[58:59], v[58:59], v[60:61]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[60:61], v[62:63], v[58:59]
	v_add_f64 v[62:63], v[60:61], -v[62:63]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[58:59], v[58:59], -v[62:63]
	v_cvt_f64_i32_e32 v[62:63], v74
	v_mul_f64 v[64:65], v[62:63], s[50:51]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[68:69], v[62:63], s[50:51], -v[64:65]
	v_fma_f64 v[62:63], v[62:63], s[52:53], v[68:69]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[68:69], v[64:65], v[62:63]
	v_add_f64 v[64:65], v[68:69], -v[64:65]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[62:63], v[62:63], -v[64:65]
	v_add_f64 v[64:65], v[68:69], v[60:61]
	v_add_f64 v[70:71], v[64:65], -v[68:69]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[72:73], v[64:65], -v[70:71]
	v_add_f64 v[60:61], v[60:61], -v[70:71]
	v_add_f64 v[68:69], v[68:69], -v[72:73]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[60:61], v[60:61], v[68:69]
	v_add_f64 v[68:69], v[62:63], v[58:59]
	v_add_f64 v[70:71], v[68:69], -v[62:63]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[60:61], v[68:69], v[60:61]
	v_add_f64 v[72:73], v[68:69], -v[70:71]
	v_add_f64 v[58:59], v[58:59], -v[70:71]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[62:63], v[62:63], -v[72:73]
	v_add_f64 v[58:59], v[58:59], v[62:63]
	v_add_f64 v[62:63], v[64:65], v[60:61]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[64:65], v[62:63], -v[64:65]
	v_add_f64 v[60:61], v[60:61], -v[64:65]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[58:59], v[58:59], v[60:61]
	v_add_f64 v[58:59], v[62:63], v[58:59]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v59, v59, v57, s6
	v_cndmask_b32_e64 v58, v58, v56, s6
	v_cmp_ngt_f64_e64 s6, 0, v[56:57]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[58:59], v[58:59], -2.0
	v_cndmask_b32_e64 v59, 0x7ff80000, v59, s6
	v_cmp_nge_f64_e64 s6, 0, v[56:57]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v58, 0, v58, s6
	v_cmp_neq_f64_e64 s6, 0, v[56:57]
	v_cndmask_b32_e64 v59, 0x7ff00000, v59, s6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_f64_e64 s6, 0x10000000, v[58:59]
	v_cndmask_b32_e64 v56, 0, 1, s6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v56, 8, v56
	v_ldexp_f64 v[56:57], v[58:59], v56
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_rsq_f64_e32 v[58:59], v[56:57]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[60:61], v[56:57], v[58:59]
	v_mul_f64 v[58:59], v[58:59], 0.5
	v_fma_f64 v[62:63], -v[58:59], v[60:61], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[60:61], v[60:61], v[62:63], v[60:61]
	v_fma_f64 v[58:59], v[58:59], v[62:63], v[58:59]
	v_fma_f64 v[64:65], -v[60:61], v[60:61], v[56:57]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[60:61], v[64:65], v[58:59], v[60:61]
	v_fma_f64 v[62:63], -v[60:61], v[60:61], v[56:57]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[58:59], v[62:63], v[58:59], v[60:61]
	v_cndmask_b32_e64 v60, 0, 0xffffff80, s6
	v_cmp_class_f64_e64 s6, v[56:57], 0x260
	v_ldexp_f64 v[58:59], v[58:59], v60
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v57, v59, v57, s6
	v_cndmask_b32_e64 v56, v58, v56, s6
	v_mul_f64 v[58:59], v[39:40], v[39:40]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[60:61], v[58:59], 0.5
	v_fma_f64 v[68:69], v[58:59], s[56:57], s[54:55]
	v_add_f64 v[62:63], -v[60:61], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[68:69], v[58:59], v[68:69], s[58:59]
	v_add_f64 v[64:65], -v[62:63], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[68:69], v[58:59], v[68:69], s[60:61]
	v_add_f64 v[60:61], v[64:65], -v[60:61]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[68:69], v[58:59], v[68:69], s[62:63]
	v_mul_f64 v[64:65], v[58:59], v[58:59]
	v_fma_f64 v[60:61], v[39:40], -v[52:53], v[60:61]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[68:69], v[58:59], v[68:69], s[76:77]
	v_fma_f64 v[60:61], v[64:65], v[68:69], v[60:61]
	v_mul_f64 v[64:65], v[39:40], -v[58:59]
	v_mul_f64 v[68:69], v[52:53], 0.5
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[60:61], v[62:63], v[60:61]
	v_fma_f64 v[62:63], v[58:59], s[66:67], s[64:65]
	v_fma_f64 v[62:63], v[58:59], v[62:63], s[68:69]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[62:63], v[58:59], v[62:63], s[70:71]
	v_fma_f64 v[62:63], v[58:59], v[62:63], s[72:73]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[62:63], v[64:65], v[62:63], v[68:69]
	v_fma_f64 v[52:53], v[58:59], v[62:63], -v[52:53]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[52:53], v[64:65], s[78:79], v[52:53]
	v_add_f64 v[39:40], v[39:40], -v[52:53]
	v_and_b32_e32 v52, 1, v67
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s6, 0, v52
	v_lshlrev_b32_e32 v52, 30, v67
	v_and_b32_e32 v52, 0x80000000, v52
	v_xor_b32_e32 v40, 0x80000000, v40
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v39, v39, v60, s6
	v_cndmask_b32_e64 v40, v40, v61, s6
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v39, 0, v39, s8
	s_cselect_b32 s6, -1, 0
	s_cmp_eq_u32 s82, 3
	v_xor_b32_e32 v40, v40, v52
	s_cselect_b32 s7, -1, 0
	s_cmp_eq_u32 s82, 2
	s_cselect_b32 s9, -1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v40, 0x7ff80000, v40, s8
	s_cmp_eq_u32 s82, 1
	s_cselect_b32 s10, -1, 0
	s_cmp_eq_u32 s82, 0
	v_mul_f64 v[39:40], v[56:57], v[39:40]
	s_cselect_b32 s11, -1, 0
	s_add_i32 s82, s82, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_cmp_lg_u32 s82, 5
	v_cndmask_b32_e64 v34, v34, v40, s6
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e64 v33, v33, v39, s6
	v_cndmask_b32_e64 v32, v32, v40, s7
	v_cndmask_b32_e64 v31, v31, v39, s7
	v_cndmask_b32_e64 v30, v30, v40, s9
	v_cndmask_b32_e64 v29, v29, v39, s9
	v_cndmask_b32_e64 v28, v28, v40, s10
	v_cndmask_b32_e64 v27, v27, v39, s10
	v_cndmask_b32_e64 v26, v26, v40, s11
	v_cndmask_b32_e64 v25, v25, v39, s11
	v_mul_f64 v[39:40], v[37:38], v[37:38]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[52:53], v[39:40], 0.5
	v_fma_f64 v[62:63], v[39:40], s[56:57], s[54:55]
	v_add_f64 v[58:59], -v[52:53], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[62:63], v[39:40], v[62:63], s[58:59]
	v_add_f64 v[60:61], -v[58:59], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[62:63], v[39:40], v[62:63], s[60:61]
	v_add_f64 v[52:53], v[60:61], -v[52:53]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[62:63], v[39:40], v[62:63], s[62:63]
	v_mul_f64 v[60:61], v[39:40], v[39:40]
	v_fma_f64 v[52:53], v[37:38], -v[54:55], v[52:53]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[62:63], v[39:40], v[62:63], s[76:77]
	v_fma_f64 v[52:53], v[60:61], v[62:63], v[52:53]
	v_mul_f64 v[60:61], v[37:38], -v[39:40]
	v_mul_f64 v[62:63], v[54:55], 0.5
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[52:53], v[58:59], v[52:53]
	v_fma_f64 v[58:59], v[39:40], s[66:67], s[64:65]
	v_fma_f64 v[58:59], v[39:40], v[58:59], s[68:69]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[58:59], v[39:40], v[58:59], s[70:71]
	v_fma_f64 v[58:59], v[39:40], v[58:59], s[72:73]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[58:59], v[60:61], v[58:59], v[62:63]
	v_fma_f64 v[39:40], v[39:40], v[58:59], -v[54:55]
	v_dual_mov_b32 v59, v51 :: v_dual_mov_b32 v58, v50
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[39:40], v[60:61], s[78:79], v[39:40]
	v_add_f64 v[37:38], v[37:38], -v[39:40]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v35, v52, v37, s12
	v_cndmask_b32_e64 v37, v53, v38, s12
	v_lshlrev_b32_e32 v38, 30, v66
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v35, 0, v35, s8
	v_xor_b32_e32 v36, v38, v36
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v36, 0x80000000, v36
	v_xor_b32_e32 v36, v37, v36
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v36, 0x7ff80000, v36, s8
	v_mul_f64 v[35:36], v[56:57], v[35:36]
	v_dual_mov_b32 v57, v49 :: v_dual_mov_b32 v56, v48
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v24, v24, v36, s6
	v_cndmask_b32_e64 v23, v23, v35, s6
	v_cndmask_b32_e64 v22, v22, v36, s7
	v_cndmask_b32_e64 v21, v21, v35, s7
	v_cndmask_b32_e64 v20, v20, v36, s9
	v_cndmask_b32_e64 v19, v19, v35, s9
	v_cndmask_b32_e64 v18, v18, v36, s10
	v_cndmask_b32_e64 v17, v17, v35, s10
	v_cndmask_b32_e64 v16, v16, v36, s11
	v_cndmask_b32_e64 v15, v15, v35, s11
	s_cbranch_scc1 .LBB3_297
; %bb.306:                              ; %.lr.ph.i.i.7.i.i.preheader
                                        ;   in Loop: Header=BB3_296 Depth=1
	v_mov_b32_e32 v35, 0
	v_mov_b32_e32 v36, 0
	s_mov_b32 s10, 0
.LBB3_307:                              ; %.lr.ph.i.i.7.i.i
                                        ;   Parent Loop BB3_296 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB3_308 Depth 3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s10, 1
	s_mov_b32 s11, s10
	s_cselect_b32 s6, -1, 0
	s_cmp_eq_u32 s10, 2
	v_cndmask_b32_e64 v37, v26, v28, s6
	v_cndmask_b32_e64 v38, v25, v27, s6
	v_cndmask_b32_e64 v39, v16, v18, s6
	v_cndmask_b32_e64 v40, v15, v17, s6
	s_cselect_b32 s6, -1, 0
	s_cmp_eq_u32 s10, 3
	v_cndmask_b32_e64 v37, v37, v30, s6
	v_cndmask_b32_e64 v38, v38, v29, s6
	v_cndmask_b32_e64 v39, v39, v20, s6
	v_cndmask_b32_e64 v40, v40, v19, s6
	s_cselect_b32 s6, -1, 0
	s_cmp_eq_u32 s10, 4
	v_cndmask_b32_e64 v37, v37, v32, s6
	v_cndmask_b32_e64 v52, v38, v31, s6
	v_cndmask_b32_e64 v39, v39, v22, s6
	v_cndmask_b32_e64 v53, v40, v21, s6
	s_cselect_b32 s6, -1, 0
	s_delay_alu instid0(SALU_CYCLE_1)
	v_cndmask_b32_e64 v38, v37, v34, s6
	v_cndmask_b32_e64 v37, v52, v33, s6
	v_cndmask_b32_e64 v40, v39, v24, s6
	v_cndmask_b32_e64 v39, v53, v23, s6
.LBB3_308:                              ;   Parent Loop BB3_296 Depth=1
                                        ;     Parent Loop BB3_307 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_add_i32 s11, s11, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s11, 1
	s_cselect_b32 s6, -1, 0
	s_cmp_eq_u32 s11, 2
	v_cndmask_b32_e64 v53, v16, v18, s6
	v_cndmask_b32_e64 v54, v15, v17, s6
	s_cselect_b32 s7, -1, 0
	s_cmp_eq_u32 s11, 3
	v_cndmask_b32_e64 v52, v26, v28, s6
	v_cndmask_b32_e64 v53, v53, v20, s7
	v_cndmask_b32_e64 v54, v54, v19, s7
	s_cselect_b32 s8, -1, 0
	s_cmp_eq_u32 s11, 4
	v_cndmask_b32_e64 v52, v52, v30, s7
	v_cndmask_b32_e64 v55, v53, v22, s8
	v_cndmask_b32_e64 v54, v54, v21, s8
	s_cselect_b32 s9, -1, 0
	s_cmp_lt_u32 s11, 4
	v_cndmask_b32_e64 v52, v52, v32, s8
	v_cndmask_b32_e64 v55, v55, v24, s9
	v_cndmask_b32_e64 v54, v54, v23, s9
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v53, v52, v34, s9
	v_cndmask_b32_e64 v52, v25, v27, s6
	v_add_f64 v[54:55], v[39:40], -v[54:55]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v52, v52, v29, s7
	v_cndmask_b32_e64 v52, v52, v31, s8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v52, v52, v33, s9
	v_add_f64 v[52:53], v[37:38], -v[52:53]
	v_mul_f64 v[54:55], v[54:55], v[54:55]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[52:53], v[52:53], v[52:53], v[54:55]
	v_cmp_lt_f64_e64 s6, v[35:36], v[52:53]
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e64 v36, v36, v53, s6
	v_cndmask_b32_e64 v35, v35, v52, s6
	s_cbranch_scc1 .LBB3_308
; %bb.309:                              ; %.loopexit.i.i.7.i.i
                                        ;   in Loop: Header=BB3_307 Depth=2
	s_add_i32 s10, s10, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s10, 4
	s_cbranch_scc1 .LBB3_307
; %bb.310:                              ;   in Loop: Header=BB3_296 Depth=1
	v_cmp_gt_f64_e64 s6, 0x10000000, v[35:36]
	s_add_i32 s81, s81, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_cmp_lg_u32 s81, 0x10000
	v_cndmask_b32_e64 v37, 0, 1, s6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v37, 8, v37
	v_ldexp_f64 v[35:36], v[35:36], v37
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_rsq_f64_e32 v[37:38], v[35:36]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[39:40], v[35:36], v[37:38]
	v_mul_f64 v[37:38], v[37:38], 0.5
	v_fma_f64 v[52:53], -v[37:38], v[39:40], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[39:40], v[39:40], v[52:53], v[39:40]
	v_fma_f64 v[37:38], v[37:38], v[52:53], v[37:38]
	v_fma_f64 v[52:53], -v[39:40], v[39:40], v[35:36]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[39:40], v[52:53], v[37:38], v[39:40]
	v_fma_f64 v[52:53], -v[39:40], v[39:40], v[35:36]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[37:38], v[52:53], v[37:38], v[39:40]
	v_cndmask_b32_e64 v39, 0, 0xffffff80, s6
	v_cmp_class_f64_e64 s6, v[35:36], 0x260
	v_ldexp_f64 v[37:38], v[37:38], v39
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v36, v38, v36, s6
	v_cndmask_b32_e64 v35, v37, v35, s6
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[45:46], v[45:46], v[35:36]
	s_cbranch_scc1 .LBB3_296
; %bb.311:                              ; %_ZNK6thrust11hip_rocprim26transform_input_iterator_tIdNS_17counting_iteratorIjNS_11use_defaultES3_S3_EE11estimate_esEixEl.exit.7.i.i
	s_delay_alu instid0(VALU_DEP_1)
	v_ldexp_f64 v[15:16], v[45:46], -16
.LBB3_312:                              ; %Flow1210
	s_or_b32 exec_lo, exec_lo, s80
	v_cndmask_b32_e32 v4, 0x80000000, v4, vcc_lo
	v_cndmask_b32_e32 v3, 0, v3, vcc_lo
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[1:2], v[1:2], v[3:4]
	v_cndmask_b32_e64 v4, 0x80000000, v6, s0
	v_and_b32_e32 v6, 0xe0, v0
	v_cndmask_b32_e64 v3, 0, v5, s0
	v_mbcnt_lo_u32_b32 v5, -1, 0
	s_min_u32 s0, s33, 0x100
	s_delay_alu instid0(VALU_DEP_3) | instid1(SALU_CYCLE_1)
	v_sub_nc_u32_e64 v6, s0, v6 clamp
	s_delay_alu instid0(VALU_DEP_2)
	v_cmp_ne_u32_e32 vcc_lo, 31, v5
	v_add_f64 v[1:2], v[3:4], v[1:2]
	v_cndmask_b32_e64 v4, 0x80000000, v8, s1
	v_cndmask_b32_e64 v3, 0, v7, s1
	v_add_nc_u32_e32 v7, 1, v5
	s_mov_b32 s1, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_f64 v[1:2], v[3:4], v[1:2]
	v_cndmask_b32_e64 v4, 0x80000000, v10, s2
	v_cndmask_b32_e64 v3, 0, v9, s2
	v_add_f64 v[1:2], v[3:4], v[1:2]
	v_cndmask_b32_e64 v4, 0x80000000, v12, s3
	v_cndmask_b32_e64 v3, 0, v11, s3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_f64 v[1:2], v[3:4], v[1:2]
	v_cndmask_b32_e64 v4, 0x80000000, v14, s4
	v_cndmask_b32_e64 v3, 0, v13, s4
	v_add_f64 v[1:2], v[3:4], v[1:2]
	v_cndmask_b32_e64 v4, 0x80000000, v16, s5
	v_cndmask_b32_e64 v3, 0, v15, s5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[1:2], v[3:4], v[1:2]
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v5, vcc_lo
	v_lshlrev_b32_e32 v4, 2, v3
	ds_bpermute_b32 v3, v4, v1
	ds_bpermute_b32 v4, v4, v2
	v_cmpx_lt_u32_e64 v7, v6
	s_cbranch_execz .LBB3_314
; %bb.313:
	s_waitcnt lgkmcnt(0)
	v_add_f64 v[1:2], v[1:2], v[3:4]
.LBB3_314:
	s_or_b32 exec_lo, exec_lo, s1
	v_cmp_gt_u32_e32 vcc_lo, 30, v5
	v_add_nc_u32_e32 v7, 2, v5
	s_mov_b32 s1, exec_lo
	s_waitcnt lgkmcnt(1)
	v_cndmask_b32_e64 v3, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v3, 1, v3
	s_waitcnt lgkmcnt(0)
	v_add_lshl_u32 v4, v3, v5, 2
	ds_bpermute_b32 v3, v4, v1
	ds_bpermute_b32 v4, v4, v2
	v_cmpx_lt_u32_e64 v7, v6
	s_cbranch_execz .LBB3_316
; %bb.315:
	s_waitcnt lgkmcnt(0)
	v_add_f64 v[1:2], v[1:2], v[3:4]
.LBB3_316:
	s_or_b32 exec_lo, exec_lo, s1
	v_cmp_gt_u32_e32 vcc_lo, 28, v5
	v_add_nc_u32_e32 v7, 4, v5
	s_mov_b32 s1, exec_lo
	s_waitcnt lgkmcnt(1)
	v_cndmask_b32_e64 v3, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v3, 2, v3
	s_waitcnt lgkmcnt(0)
	v_add_lshl_u32 v4, v3, v5, 2
	ds_bpermute_b32 v3, v4, v1
	ds_bpermute_b32 v4, v4, v2
	v_cmpx_lt_u32_e64 v7, v6
	s_cbranch_execz .LBB3_318
; %bb.317:
	s_waitcnt lgkmcnt(0)
	v_add_f64 v[1:2], v[1:2], v[3:4]
.LBB3_318:
	s_or_b32 exec_lo, exec_lo, s1
	v_cmp_gt_u32_e32 vcc_lo, 24, v5
	v_add_nc_u32_e32 v7, 8, v5
	s_mov_b32 s1, exec_lo
	s_waitcnt lgkmcnt(1)
	v_cndmask_b32_e64 v3, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v3, 3, v3
	s_waitcnt lgkmcnt(0)
	v_add_lshl_u32 v4, v3, v5, 2
	ds_bpermute_b32 v3, v4, v1
	ds_bpermute_b32 v4, v4, v2
	v_cmpx_lt_u32_e64 v7, v6
	s_cbranch_execz .LBB3_320
; %bb.319:
	s_waitcnt lgkmcnt(0)
	v_add_f64 v[1:2], v[1:2], v[3:4]
.LBB3_320:
	s_or_b32 exec_lo, exec_lo, s1
	v_cmp_gt_u32_e32 vcc_lo, 16, v5
	v_add_nc_u32_e32 v7, 16, v5
	s_mov_b32 s1, exec_lo
	s_waitcnt lgkmcnt(1)
	v_cndmask_b32_e64 v3, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v3, 4, v3
	s_waitcnt lgkmcnt(0)
	v_add_lshl_u32 v4, v3, v5, 2
	ds_bpermute_b32 v3, v4, v1
	ds_bpermute_b32 v4, v4, v2
	v_cmpx_lt_u32_e64 v7, v6
	s_cbranch_execz .LBB3_322
; %bb.321:
	s_waitcnt lgkmcnt(0)
	v_add_f64 v[1:2], v[1:2], v[3:4]
.LBB3_322:                              ; %_ZN7rocprim6detail15warp_reduce_dppIdLj32ELb0EE6reduceIN6thrust4plusIdEEEEvdRdjT_.exit.i.i.i.i.i
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s1, exec_lo
	v_cmpx_eq_u32_e32 0, v5
	s_cbranch_execz .LBB3_324
; %bb.323:
	s_waitcnt lgkmcnt(1)
	v_lshrrev_b32_e32 v3, 2, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v3, 56, v3
	ds_store_b64 v3, v[1:2] offset:64
.LBB3_324:
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s1, exec_lo
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmpx_gt_u32_e32 8, v0
	s_cbranch_execz .LBB3_332
; %bb.325:
	v_lshlrev_b32_e32 v1, 3, v5
	v_and_b32_e32 v6, 7, v5
	s_add_i32 s0, s0, 31
	s_mov_b32 s2, exec_lo
	s_lshr_b32 s0, s0, 5
	ds_load_b64 v[1:2], v1 offset:64
	v_cmp_ne_u32_e32 vcc_lo, 7, v6
	v_add_nc_u32_e32 v7, 1, v6
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_lshlrev_b32_e32 v4, 2, v3
	s_waitcnt lgkmcnt(0)
	ds_bpermute_b32 v3, v4, v1
	ds_bpermute_b32 v4, v4, v2
	v_cmpx_gt_u32_e64 s0, v7
	s_cbranch_execz .LBB3_327
; %bb.326:
	s_waitcnt lgkmcnt(0)
	v_add_f64 v[1:2], v[1:2], v[3:4]
.LBB3_327:
	s_or_b32 exec_lo, exec_lo, s2
	v_cmp_gt_u32_e32 vcc_lo, 6, v6
	v_add_nc_u32_e32 v7, 2, v6
	s_mov_b32 s2, exec_lo
	s_waitcnt lgkmcnt(1)
	v_cndmask_b32_e64 v3, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v3, 1, v3
	s_waitcnt lgkmcnt(0)
	v_add_lshl_u32 v4, v3, v5, 2
	ds_bpermute_b32 v3, v4, v1
	ds_bpermute_b32 v4, v4, v2
	v_cmpx_gt_u32_e64 s0, v7
	s_cbranch_execz .LBB3_329
; %bb.328:
	s_waitcnt lgkmcnt(0)
	v_add_f64 v[1:2], v[1:2], v[3:4]
.LBB3_329:
	s_or_b32 exec_lo, exec_lo, s2
	v_cmp_gt_u32_e32 vcc_lo, 4, v6
	s_waitcnt lgkmcnt(1)
	v_cndmask_b32_e64 v3, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v3, 2, v3
	s_waitcnt lgkmcnt(0)
	v_add_lshl_u32 v4, v3, v5, 2
	v_add_nc_u32_e32 v5, 4, v6
	ds_bpermute_b32 v3, v4, v1
	ds_bpermute_b32 v4, v4, v2
	v_cmp_gt_u32_e32 vcc_lo, s0, v5
	s_and_saveexec_b32 s0, vcc_lo
	s_cbranch_execz .LBB3_331
; %bb.330:
	s_waitcnt lgkmcnt(0)
	v_add_f64 v[1:2], v[1:2], v[3:4]
.LBB3_331:                              ; %Flow1206
	s_or_b32 exec_lo, exec_lo, s0
.LBB3_332:                              ; %Flow1207
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
.LBB3_333:                              ; %_ZN7rocprim12block_reduceIdLj256ELNS_22block_reduce_algorithmE0ELj1ELj1EE6reduceIN6thrust4plusIdEEEEvdRdjT_.exit.i
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB3_335
; %bb.334:
	s_lshl_b64 s[0:1], s[20:21], 3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	s_add_u32 s0, s16, s0
	s_addc_u32 s1, s17, s1
	s_cmp_lg_u64 s[14:15], 0
	s_cselect_b32 vcc_lo, -1, 0
	s_waitcnt lgkmcnt(0)
	v_cndmask_b32_e32 v2, 0x80000000, v2, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v1, 0, v1, vcc_lo
	v_add_f64 v[0:1], v[1:2], s[18:19]
	v_mov_b32_e32 v2, 0
	global_store_b64 v2, v[0:1], s[0:1]
.LBB3_335:                              ; %_ZN7rocprim6detail24block_reduce_kernel_implILb1ENS0_21wrapped_reduce_configINS_14default_configEdEEdN6thrust11hip_rocprim26transform_input_iterator_tIdNS5_17counting_iteratorIjNS5_11use_defaultES9_S9_EE11estimate_esEEPddNS5_4plusIdEEEEvT2_mT3_T4_T5_.exit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _ZN7rocprim6detail19block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEdEEdN6thrust11hip_rocprim26transform_input_iterator_tIdNS5_17counting_iteratorIjNS5_11use_defaultES9_S9_EE11estimate_esEEPddNS5_4plusIdEEEEvT2_mT3_T4_T5_
		.amdhsa_group_segment_fixed_size 128
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 36
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 95
		.amdhsa_next_free_sgpr 85
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._ZN7rocprim6detail19block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEdEEdN6thrust11hip_rocprim26transform_input_iterator_tIdNS5_17counting_iteratorIjNS5_11use_defaultES9_S9_EE11estimate_esEEPddNS5_4plusIdEEEEvT2_mT3_T4_T5_,"axG",@progbits,_ZN7rocprim6detail19block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEdEEdN6thrust11hip_rocprim26transform_input_iterator_tIdNS5_17counting_iteratorIjNS5_11use_defaultES9_S9_EE11estimate_esEEPddNS5_4plusIdEEEEvT2_mT3_T4_T5_,comdat
.Lfunc_end3:
	.size	_ZN7rocprim6detail19block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEdEEdN6thrust11hip_rocprim26transform_input_iterator_tIdNS5_17counting_iteratorIjNS5_11use_defaultES9_S9_EE11estimate_esEEPddNS5_4plusIdEEEEvT2_mT3_T4_T5_, .Lfunc_end3-_ZN7rocprim6detail19block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEdEEdN6thrust11hip_rocprim26transform_input_iterator_tIdNS5_17counting_iteratorIjNS5_11use_defaultES9_S9_EE11estimate_esEEPddNS5_4plusIdEEEEvT2_mT3_T4_T5_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 88204
; NumSgprs: 87
; NumVgprs: 95
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 128 bytes/workgroup (compile time only)
; SGPRBlocks: 10
; VGPRBlocks: 11
; NumSGPRsForWavesPerEU: 87
; NumVGPRsForWavesPerEU: 95
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.protected	g_seed                  ; @g_seed
	.type	g_seed,@object
	.section	.bss,"aw",@nobits
	.globl	g_seed
	.p2align	3, 0x0
g_seed:
	.zero	8
	.size	g_seed, 8

	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym g_seed
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           8
        .value_kind:     by_value
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           8
        .value_kind:     by_value
      - .offset:         32
        .size:           1
        .value_kind:     by_value
    .group_segment_fixed_size: 128
    .kernarg_segment_align: 8
    .kernarg_segment_size: 36
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 256
    .name:           _ZN7rocprim6detail19block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEdEEdPdS5_dN6thrust4plusIdEEEEvT2_mT3_T4_T5_
    .private_segment_fixed_size: 0
    .sgpr_count:     20
    .sgpr_spill_count: 0
    .symbol:         _ZN7rocprim6detail19block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEdEEdPdS5_dN6thrust4plusIdEEEEvT2_mT3_T4_T5_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     21
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           8
        .value_kind:     by_value
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           8
        .value_kind:     by_value
      - .offset:         32
        .size:           1
        .value_kind:     by_value
    .group_segment_fixed_size: 128
    .kernarg_segment_align: 8
    .kernarg_segment_size: 36
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 256
    .name:           _ZN7rocprim6detail19block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEdEEdPdS5_dN6thrust4plusIdEEEEvT2_mT3_T4_T5_
    .private_segment_fixed_size: 0
    .sgpr_count:     20
    .sgpr_spill_count: 0
    .symbol:         _ZN7rocprim6detail19block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEdEEdPdS5_dN6thrust4plusIdEEEEvT2_mT3_T4_T5_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     21
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .offset:         0
        .size:           8
        .value_kind:     by_value
      - .offset:         8
        .size:           8
        .value_kind:     by_value
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           8
        .value_kind:     by_value
      - .offset:         32
        .size:           1
        .value_kind:     by_value
    .group_segment_fixed_size: 128
    .kernarg_segment_align: 8
    .kernarg_segment_size: 36
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 256
    .name:           _ZN7rocprim6detail19block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEdEEdN6thrust11hip_rocprim26transform_input_iterator_tIdNS5_17counting_iteratorIjNS5_11use_defaultES9_S9_EE11estimate_esEEPddNS5_4plusIdEEEEvT2_mT3_T4_T5_
    .private_segment_fixed_size: 0
    .sgpr_count:     87
    .sgpr_spill_count: 0
    .symbol:         _ZN7rocprim6detail19block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEdEEdN6thrust11hip_rocprim26transform_input_iterator_tIdNS5_17counting_iteratorIjNS5_11use_defaultES9_S9_EE11estimate_esEEPddNS5_4plusIdEEEEvT2_mT3_T4_T5_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     95
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .offset:         0
        .size:           8
        .value_kind:     by_value
      - .offset:         8
        .size:           8
        .value_kind:     by_value
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           8
        .value_kind:     by_value
      - .offset:         32
        .size:           1
        .value_kind:     by_value
    .group_segment_fixed_size: 128
    .kernarg_segment_align: 8
    .kernarg_segment_size: 36
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 256
    .name:           _ZN7rocprim6detail19block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEdEEdN6thrust11hip_rocprim26transform_input_iterator_tIdNS5_17counting_iteratorIjNS5_11use_defaultES9_S9_EE11estimate_esEEPddNS5_4plusIdEEEEvT2_mT3_T4_T5_
    .private_segment_fixed_size: 0
    .sgpr_count:     87
    .sgpr_spill_count: 0
    .symbol:         _ZN7rocprim6detail19block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEdEEdN6thrust11hip_rocprim26transform_input_iterator_tIdNS5_17counting_iteratorIjNS5_11use_defaultES9_S9_EE11estimate_esEEPddNS5_4plusIdEEEEvT2_mT3_T4_T5_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     95
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
