/*
Francisco Rodriguez Jimenez
cazz@correo.ugr.es
nvcc - The NVIDIA CUDA Compiler
cuobjdump - The NVIDIA CUDA Object Utility
nvdisasm - The NVIDIA CUDA disassembler
nvprune - The NVIDIA CUDA Prune Tool
nsight - NVIDIA NSight, Eclipse Edition
nvvp - The NVIDIA CUDA Visual Profiler
nvprof - The NVIDIA CUDA Command-Line Profiler
cuda-memcheck - The NVIDIA CUDA Check Tool
*/

#include <iostream>
#include <stdio.h>
#include <stdlib.h>
#include <math.h>
#include <time.h>
#include <sys/time.h>
#include "cuda_runtime.h"

using namespace std;

__host__ void check_CUDA_Error(const char *mensaje){
    cudaError_t error;
    cudaDeviceSynchronize();
    error = cudaGetLastError();
    if(error != cudaSuccess){
        printf("ERROR %d: %s (%s)\n", error, cudaGetErrorString(error), mensaje);
        exit(EXIT_FAILURE);
    }
}

__global__ void reduceSum(int *d_V, int *Out, int N, int smen){
	extern __shared__ int sdata[];

	int tid = threadIdx.x;
    int i = blockIdx.x * (blockDim.x*2) + threadIdx.x;

    // printf("\nTAM MEMORIA: %d | tid: %d -> id: %d",smen, tid, i);

	sdata[tid] = ((i < N/2) ? d_V[i] + d_V[i+blockDim.x] : 0.0f);
    __syncthreads();
    
	for (int s = (blockDim.x/2); s > 0; s >>= 1) {
		if (tid < s) {
            sdata[tid] += sdata[tid + s];
		}
		__syncthreads();
    }

    if(tid == 0){
        Out[blockIdx.x] = sdata[0];
    }
}

int main(int argc, char** argv){
    if(argc != 2){
        cout << "Error de sintaxis: ejer8 <TAM>" << endl;
        return(EXIT_FAILURE);
    }

    const int TAM = atoi(argv[1]);
    //Punteros memoria host
    int *vector_entrada, *host_o;
    //Punteros memoria device
    int *device_i, *device_o;

    //Reserva de memoria host
    vector_entrada = new int[TAM];
    //Reserva de memoria device
    cudaMalloc((void **) &device_i, TAM * sizeof(int));
    check_CUDA_Error("Error en la reserva del device");
    
    //Inicialización vector
    for(int i = 0 ; i < TAM; ++i){
        vector_entrada[i] = 1;
    }
      
    cout << "VECTOR ENTRADA: " << endl;
    for(int i = 0 ; i < TAM; ++i){
        cout << vector_entrada[i] << " ";
    }

    //Copia de host a device
    cudaMemcpy(device_i, vector_entrada, sizeof(int)*TAM, cudaMemcpyHostToDevice);
    check_CUDA_Error("Errir en la copia del host al device");

    //Preparo y lanzo el kernel
    dim3 threadsPerBlock(TAM);
    dim3 numBlocks(ceil((float)TAM / threadsPerBlock.x));
    int smemSize = threadsPerBlock.x * sizeof(int);
    cudaMalloc((void **) &device_o, numBlocks.x * sizeof(int));
    host_o = new int[numBlocks.x];
    reduceSum<<<numBlocks, threadsPerBlock, smemSize>>>(device_i, device_o, TAM, threadsPerBlock.x);

    cudaDeviceSynchronize();

    //Copio el resultado de device a host
    cudaMemcpy(host_o, device_o, sizeof(int)*numBlocks.x, cudaMemcpyDeviceToHost);
    
    int suma = 0;
    cout << "\nVECTOR RESULTADO: " << endl;
    for(int i = 0 ; i < numBlocks.x; ++i){
        cout << host_o[i] << " ";
        suma += host_o[i];
    }

    cout << "\n.....................\nRESULTADO FINAL: " << suma << endl;


    delete [] vector_entrada;
    delete [] host_o;
    cudaFree(device_i);
    cudaFree(device_o);
	
	return EXIT_SUCCESS;
}

	.file	"tmpxft_0025baf1_00000000-6_ejercicio88.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3639:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3639:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"ERROR %d: %s (%s)\n"
	.text
	.globl	_Z16check_CUDA_ErrorPKc
	.type	_Z16check_CUDA_ErrorPKc, @function
_Z16check_CUDA_ErrorPKc:
.LFB3635:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movq	%rdi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	pushq	%rdx
	.cfi_def_cfa_offset 32
	call	cudaDeviceSynchronize@PLT
	call	cudaGetLastError@PLT
	testl	%eax, %eax
	je	.L2
	movl	%eax, %edi
	movl	%eax, %ebx
	call	cudaGetErrorString@PLT
	movl	$2, %edi
	movq	%rbp, %r8
	movl	%ebx, %edx
	movq	%rax, %rcx
	leaq	.LC0(%rip), %rsi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$1, %edi
	call	exit@PLT
.L2:
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3635:
	.size	_Z16check_CUDA_ErrorPKc, .-_Z16check_CUDA_ErrorPKc
	.globl	_Z32__device_stub__Z9reduceSumPiS_iiPiS_ii
	.type	_Z32__device_stub__Z9reduceSumPiS_iiPiS_ii, @function
_Z32__device_stub__Z9reduceSumPiS_iiPiS_ii:
.LFB3661:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L6
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z9reduceSumPiS_ii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L6:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L8
	call	__stack_chk_fail@PLT
.L8:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3661:
	.size	_Z32__device_stub__Z9reduceSumPiS_iiPiS_ii, .-_Z32__device_stub__Z9reduceSumPiS_iiPiS_ii
	.globl	_Z9reduceSumPiS_ii
	.type	_Z9reduceSumPiS_ii, @function
_Z9reduceSumPiS_ii:
.LFB3662:
	.cfi_startproc
	endbr64
	jmp	_Z32__device_stub__Z9reduceSumPiS_iiPiS_ii
	.cfi_endproc
.LFE3662:
	.size	_Z9reduceSumPiS_ii, .-_Z9reduceSumPiS_ii
	.section	.rodata.str1.1
.LC1:
	.string	"Error de sintaxis: ejer8 <TAM>"
.LC2:
	.string	"Error en la reserva del device"
.LC3:
	.string	"VECTOR ENTRADA: "
.LC4:
	.string	" "
.LC5:
	.string	"Errir en la copia del host al device"
.LC6:
	.string	"\nVECTOR RESULTADO: "
.LC7:
	.string	"\n.....................\nRESULTADO FINAL: "
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3636:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 40(%rsp)
	xorl	%eax, %eax
	cmpl	$2, %edi
	je	.L12
	leaq	.LC1(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	movl	$1, %eax
	jmp	.L11
.L12:
	movq	8(%rsi), %rdi
	call	atoi@PLT
	movslq	%eax, %rbp
	movabsq	$2305843009213693950, %rax
	movq	%rbp, %rbx
	cmpq	%rbp, %rax
	jb	.L14
	salq	$2, %rbp
	movq	%rbp, %rdi
	call	_Znam@PLT
	movq	%rsp, %rdi
	movq	%rbp, %rsi
	movq	%rax, %r12
	call	cudaMalloc@PLT
	leaq	.LC2(%rip), %rdi
	call	_Z16check_CUDA_ErrorPKc
	xorl	%eax, %eax
	jmp	.L15
.L14:
	movq	40(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L25
	call	__cxa_throw_bad_array_new_length@PLT
.L15:
	cmpl	%eax, %ebx
	jle	.L26
	movl	$1, (%r12,%rax,4)
	incq	%rax
	jmp	.L15
.L26:
	leaq	.LC3(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	xorl	%r14d, %r14d
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC4(%rip), %r15
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
.L18:
	cmpl	%r14d, %ebx
	jle	.L27
	movl	(%r12,%r14,4), %esi
	leaq	_ZSt4cout(%rip), %rdi
	incq	%r14
	call	_ZNSolsEi@PLT
	movq	%r15, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	jmp	.L18
.L27:
	movq	(%rsp), %rdi
	movq	%rbp, %rdx
	movl	$1, %ecx
	movq	%r12, %rsi
	call	cudaMemcpy@PLT
	leaq	.LC5(%rip), %rdi
	call	_Z16check_CUDA_ErrorPKc
	cvtsi2ssl	%ebx, %xmm0
	movabsq	$4294967297, %rax
	movq	%rax, 20(%rsp)
	divss	%xmm0, %xmm0
	call	ceilf@PLT
	leaq	8(%rsp), %rdi
	movl	$1, 32(%rsp)
	cvttss2siq	%xmm0, %r13
	movl	$1, 36(%rsp)
	movl	%r13d, %r15d
	movl	%r13d, %r14d
	salq	$2, %r15
	movq	%r15, %rsi
	call	cudaMalloc@PLT
	movq	%r15, %rdi
	call	_Znam@PLT
	movl	%ebx, 16(%rsp)
	movl	24(%rsp), %ecx
	xorl	%r9d, %r9d
	movl	%r13d, 28(%rsp)
	leal	0(,%rbx,4), %r8d
	movl	36(%rsp), %esi
	movq	%rax, %rbp
	movq	16(%rsp), %rdx
	movq	28(%rsp), %rdi
	movslq	%r8d, %r8
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L20
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdi
	movl	%ebx, %ecx
	movl	%ebx, %edx
	call	_Z32__device_stub__Z9reduceSumPiS_iiPiS_ii
.L20:
	call	cudaDeviceSynchronize@PLT
	movq	8(%rsp), %rsi
	movq	%r15, %rdx
	movq	%rbp, %rdi
	movl	$2, %ecx
	xorl	%r13d, %r13d
	xorl	%ebx, %ebx
	call	cudaMemcpy@PLT
	leaq	.LC6(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC4(%rip), %r15
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
.L21:
	cmpl	%r14d, %r13d
	jnb	.L28
	movl	0(%rbp,%r13,4), %esi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZNSolsEi@PLT
	movq	%r15, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	addl	0(%rbp,%r13,4), %ebx
	incq	%r13
	jmp	.L21
.L28:
	leaq	.LC7(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%ebx, %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	movq	%r12, %rdi
	call	_ZdaPv@PLT
	movq	%rbp, %rdi
	call	_ZdaPv@PLT
	movq	(%rsp), %rdi
	call	cudaFree@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	xorl	%eax, %eax
.L11:
	movq	40(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L23
.L25:
	call	__stack_chk_fail@PLT
.L23:
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3636:
	.size	main, .-main
	.section	.rodata.str1.1
.LC8:
	.string	"_Z9reduceSumPiS_ii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3664:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC8(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z9reduceSumPiS_ii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3664:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

/*
Francisco Rodriguez Jimenez
cazz@correo.ugr.es
nvcc - The NVIDIA CUDA Compiler
cuobjdump - The NVIDIA CUDA Object Utility
nvdisasm - The NVIDIA CUDA disassembler
nvprune - The NVIDIA CUDA Prune Tool
nsight - NVIDIA NSight, Eclipse Edition
nvvp - The NVIDIA CUDA Visual Profiler
nvprof - The NVIDIA CUDA Command-Line Profiler
cuda-memcheck - The NVIDIA CUDA Check Tool
*/

#include <iostream>
#include <stdio.h>
#include <stdlib.h>
#include <math.h>
#include <time.h>
#include <sys/time.h>
#include "hip/hip_runtime.h"

using namespace std;

__host__ void check_CUDA_Error(const char *mensaje){
    hipError_t error;
    hipDeviceSynchronize();
    error = hipGetLastError();
    if(error != hipSuccess){
        printf("ERROR %d: %s (%s)\n", error, hipGetErrorString(error), mensaje);
        exit(EXIT_FAILURE);
    }
}

__global__ void reduceSum(int *d_V, int *Out, int N, int smen){
	extern __shared__ int sdata[];

	int tid = threadIdx.x;
    int i = blockIdx.x * (blockDim.x*2) + threadIdx.x;

    // printf("\nTAM MEMORIA: %d | tid: %d -> id: %d",smen, tid, i);

	sdata[tid] = ((i < N/2) ? d_V[i] + d_V[i+blockDim.x] : 0.0f);
    __syncthreads();
    
	for (int s = (blockDim.x/2); s > 0; s >>= 1) {
		if (tid < s) {
            sdata[tid] += sdata[tid + s];
		}
		__syncthreads();
    }

    if(tid == 0){
        Out[blockIdx.x] = sdata[0];
    }
}

int main(int argc, char** argv){
    if(argc != 2){
        cout << "Error de sintaxis: ejer8 <TAM>" << endl;
        return(EXIT_FAILURE);
    }

    const int TAM = atoi(argv[1]);
    //Punteros memoria host
    int *vector_entrada, *host_o;
    //Punteros memoria device
    int *device_i, *device_o;

    //Reserva de memoria host
    vector_entrada = new int[TAM];
    //Reserva de memoria device
    hipMalloc((void **) &device_i, TAM * sizeof(int));
    check_CUDA_Error("Error en la reserva del device");
    
    //Inicialización vector
    for(int i = 0 ; i < TAM; ++i){
        vector_entrada[i] = 1;
    }
      
    cout << "VECTOR ENTRADA: " << endl;
    for(int i = 0 ; i < TAM; ++i){
        cout << vector_entrada[i] << " ";
    }

    //Copia de host a device
    hipMemcpy(device_i, vector_entrada, sizeof(int)*TAM, hipMemcpyHostToDevice);
    check_CUDA_Error("Errir en la copia del host al device");

    //Preparo y lanzo el kernel
    dim3 threadsPerBlock(TAM);
    dim3 numBlocks(ceil((float)TAM / threadsPerBlock.x));
    int smemSize = threadsPerBlock.x * sizeof(int);
    hipMalloc((void **) &device_o, numBlocks.x * sizeof(int));
    host_o = new int[numBlocks.x];
    reduceSum<<<numBlocks, threadsPerBlock, smemSize>>>(device_i, device_o, TAM, threadsPerBlock.x);

    hipDeviceSynchronize();

    //Copio el resultado de device a host
    hipMemcpy(host_o, device_o, sizeof(int)*numBlocks.x, hipMemcpyDeviceToHost);
    
    int suma = 0;
    cout << "\nVECTOR RESULTADO: " << endl;
    for(int i = 0 ; i < numBlocks.x; ++i){
        cout << host_o[i] << " ";
        suma += host_o[i];
    }

    cout << "\n.....................\nRESULTADO FINAL: " << suma << endl;


    delete [] vector_entrada;
    delete [] host_o;
    hipFree(device_i);
    hipFree(device_o);
	
	return EXIT_SUCCESS;
}

	.text
	.file	"ejercicio88.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z16check_CUDA_ErrorPKc         # -- Begin function _Z16check_CUDA_ErrorPKc
	.type	_Z16check_CUDA_ErrorPKc,@function
_Z16check_CUDA_ErrorPKc:                # @_Z16check_CUDA_ErrorPKc
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	pushq	%rax
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -24
	.cfi_offset %rbp, -16
	movq	%rdi, %rbx
	callq	hipDeviceSynchronize
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB0_2
# %bb.1:
	addq	$8, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB0_2:
	.cfi_def_cfa_offset 32
	movl	%eax, %ebp
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %edi
	movl	%ebp, %esi
	movq	%rax, %rdx
	movq	%rbx, %rcx
	xorl	%eax, %eax
	callq	printf
	movl	$1, %edi
	callq	exit
.Lfunc_end0:
	.size	_Z16check_CUDA_ErrorPKc, .Lfunc_end0-_Z16check_CUDA_ErrorPKc
	.cfi_endproc
                                        # -- End function
	.globl	_Z24__device_stub__reduceSumPiS_ii # -- Begin function _Z24__device_stub__reduceSumPiS_ii
	.type	_Z24__device_stub__reduceSumPiS_ii,@function
_Z24__device_stub__reduceSumPiS_ii:     # @_Z24__device_stub__reduceSumPiS_ii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9reduceSumPiS_ii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z24__device_stub__reduceSumPiS_ii, .Lfunc_end1-_Z24__device_stub__reduceSumPiS_ii
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	cmpl	$2, %edi
	jne	.LBB2_1
# %bb.2:
	movq	8(%rsi), %rdi
	callq	atoi
	movl	%eax, %r13d
	movslq	%eax, %r12
	leaq	(,%r12,4), %r15
	testl	%r12d, %r12d
	movq	$-1, %rdi
	cmovnsq	%r15, %rdi
	callq	_Znam
	movq	%rax, %rbx
	leaq	16(%rsp), %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	movl	$.L.str.2, %edi
	callq	_Z16check_CUDA_ErrorPKc
	movl	%r13d, %r14d
	testl	%r12d, %r12d
	jle	.LBB2_5
# %bb.3:                                # %.lr.ph.preheader
	xorl	%eax, %eax
.LBB2_4:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movl	$1, (%rbx,%rax,4)
	incq	%rax
	cmpq	%rax, %r14
	jne	.LBB2_4
.LBB2_5:                                # %._crit_edge
	movl	$_ZSt4cout, %r12d
	movl	$_ZSt4cout, %edi
	movl	$.L.str.3, %esi
	movl	$16, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%r12, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	testl	%r13d, %r13d
	jle	.LBB2_8
# %bb.6:                                # %.lr.ph59.preheader
	xorl	%r12d, %r12d
.LBB2_7:                                # %.lr.ph59
                                        # =>This Inner Loop Header: Depth=1
	movl	(%rbx,%r12,4), %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSolsEi
	movl	$.L.str.4, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	incq	%r12
	cmpq	%r12, %r14
	jne	.LBB2_7
.LBB2_8:                                # %._crit_edge60
	movq	16(%rsp), %rdi
	movq	%rbx, %rsi
	movq	%r15, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movl	$.L.str.5, %edi
	callq	_Z16check_CUDA_ErrorPKc
	movq	%r14, %rbp
	btsq	$32, %rbp
	cvtsi2ss	%r13d, %xmm0
	cvtsi2ss	%r14, %xmm1
	divss	%xmm1, %xmm0
	callq	ceilf@PLT
	cvttss2si	%xmm0, %rax
	movl	%eax, %r14d
	movq	%r13, %rax
	movq	%r14, %r13
	btsq	$32, %r13
	movq	%rax, 24(%rsp)                  # 8-byte Spill
	leal	(,%rax,4), %r12d
	leaq	(,%r14,4), %r15
	leaq	8(%rsp), %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	movq	%r15, 32(%rsp)                  # 8-byte Spill
	movq	%r15, %rdi
	callq	_Znam
	movq	%rax, %r15
	movslq	%r12d, %r8
	xorl	%r12d, %r12d
	movq	%r13, %rdi
	movl	$1, %esi
	movq	%rbp, %rdx
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_10
# %bb.9:
	movq	16(%rsp), %rdi
	movq	8(%rsp), %rsi
	movq	24(%rsp), %rcx                  # 8-byte Reload
	movl	%ecx, %edx
                                        # kill: def $ecx killed $ecx killed $rcx
	callq	_Z24__device_stub__reduceSumPiS_ii
.LBB2_10:
	callq	hipDeviceSynchronize
	movq	8(%rsp), %rsi
	movq	%r15, %rdi
	movq	32(%rsp), %rdx                  # 8-byte Reload
	movl	$2, %ecx
	callq	hipMemcpy
	movl	$_ZSt4cout, %r13d
	movl	$_ZSt4cout, %edi
	movl	$.L.str.6, %esi
	movl	$19, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%r13, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	testq	%r14, %r14
	je	.LBB2_13
# %bb.11:                               # %.lr.ph64.preheader
	xorl	%r13d, %r13d
	xorl	%r12d, %r12d
.LBB2_12:                               # %.lr.ph64
                                        # =>This Inner Loop Header: Depth=1
	movl	(%r15,%r13,4), %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSolsEi
	movl	$.L.str.4, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	addl	(%r15,%r13,4), %r12d
	incq	%r13
	cmpq	%r13, %r14
	jne	.LBB2_12
.LBB2_13:                               # %._crit_edge65
	movl	$_ZSt4cout, %edi
	movl	$.L.str.7, %esi
	movl	$40, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	%r12d, %esi
	callq	_ZNSolsEi
	movq	%rax, %r14
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%r14, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r14, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	%rbx, %rdi
	callq	_ZdaPv
	movq	%r15, %rdi
	callq	_ZdaPv
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	jmp	.LBB2_14
.LBB2_1:
	movl	$_ZSt4cout, %ebx
	movl	$_ZSt4cout, %edi
	movl	$.L.str.1, %esi
	movl	$30, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	$1, %eax
.LBB2_14:
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9reduceSumPiS_ii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"ERROR %d: %s (%s)\n"
	.size	.L.str, 19

	.type	_Z9reduceSumPiS_ii,@object      # @_Z9reduceSumPiS_ii
	.section	.rodata,"a",@progbits
	.globl	_Z9reduceSumPiS_ii
	.p2align	3, 0x0
_Z9reduceSumPiS_ii:
	.quad	_Z24__device_stub__reduceSumPiS_ii
	.size	_Z9reduceSumPiS_ii, 8

	.type	.L.str.1,@object                # @.str.1
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.1:
	.asciz	"Error de sintaxis: ejer8 <TAM>"
	.size	.L.str.1, 31

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Error en la reserva del device"
	.size	.L.str.2, 31

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"VECTOR ENTRADA: "
	.size	.L.str.3, 17

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	" "
	.size	.L.str.4, 2

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"Errir en la copia del host al device"
	.size	.L.str.5, 37

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"\nVECTOR RESULTADO: "
	.size	.L.str.6, 20

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"\n.....................\nRESULTADO FINAL: "
	.size	.L.str.7, 41

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z9reduceSumPiS_ii"
	.size	.L__unnamed_1, 19

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z24__device_stub__reduceSumPiS_ii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z9reduceSumPiS_ii
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z9reduceSumPiS_ii      ; -- Begin function _Z9reduceSumPiS_ii
	.globl	_Z9reduceSumPiS_ii
	.p2align	8
	.type	_Z9reduceSumPiS_ii,@function
_Z9reduceSumPiS_ii:                     ; @_Z9reduceSumPiS_ii
; %bb.0:
	s_clause 0x2
	s_load_b32 s5, s[0:1], 0x24
	s_load_b32 s6, s[0:1], 0x10
	s_load_b128 s[0:3], s[0:1], 0x0
	v_mov_b32_e32 v2, 0
	s_mov_b32 s4, s15
	s_waitcnt lgkmcnt(0)
	s_and_b32 s5, s5, 0xffff
	s_lshr_b32 s8, s6, 31
	s_mul_i32 s7, s15, s5
	s_add_i32 s6, s6, s8
	v_lshl_add_u32 v1, s7, 1, v0
	s_ashr_i32 s6, s6, 1
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_cmp_gt_i32_e32 vcc_lo, s6, v1
	s_and_saveexec_b32 s6, vcc_lo
	s_cbranch_execz .LBB0_2
; %bb.1:
	v_ashrrev_i32_e32 v2, 31, v1
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, s5, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v1, vcc_lo, s0, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v3, vcc_lo, s0, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
	s_clause 0x1
	global_load_b32 v1, v[1:2], off
	global_load_b32 v2, v[3:4], off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v1, v2, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f32_i32_e32 v1, v1
	v_cvt_i32_f32_e32 v2, v1
.LBB0_2:
	s_or_b32 exec_lo, exec_lo, s6
	v_lshl_add_u32 v1, v0, 2, 0
	s_cmp_lt_u32 s5, 2
	ds_store_b32 v1, v2
	s_waitcnt lgkmcnt(0)
	s_barrier
.LBB0_3:                                ; =>This Inner Loop Header: Depth=1
	buffer_gl0_inv
	s_cbranch_scc1 .LBB0_7
; %bb.4:                                ; %.lr.ph
                                        ;   in Loop: Header=BB0_3 Depth=1
	s_lshr_b32 s0, s5, 1
	s_mov_b32 s1, exec_lo
	v_cmpx_gt_u32_e64 s0, v0
	s_cbranch_execz .LBB0_6
; %bb.5:                                ;   in Loop: Header=BB0_3 Depth=1
	v_lshl_add_u32 v2, s0, 2, v1
	ds_load_b32 v2, v2
	ds_load_b32 v3, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v2, v3, v2
	ds_store_b32 v1, v2
.LBB0_6:                                ;   in Loop: Header=BB0_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_waitcnt lgkmcnt(0)
	s_barrier
	s_cmp_lt_u32 s5, 4
	s_mov_b32 s5, s0
	s_branch .LBB0_3
.LBB0_7:                                ; %._crit_edge
	s_mov_b32 s0, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB0_9
; %bb.8:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s5, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[0:1], s[4:5], 2
	s_add_u32 s0, s2, s0
	ds_load_b32 v1, v0
	s_addc_u32 s1, s3, s1
	s_waitcnt lgkmcnt(0)
	global_store_b32 v0, v1, s[0:1]
.LBB0_9:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9reduceSumPiS_ii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z9reduceSumPiS_ii, .Lfunc_end0-_Z9reduceSumPiS_ii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 388
; NumSgprs: 18
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         144
        .size:           4
        .value_kind:     hidden_dynamic_lds_size
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z9reduceSumPiS_ii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z9reduceSumPiS_ii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     5
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
