#include <stdio.h>

//static cudaArray* tex_array;
//m_q: Number of vertical interior grid points, k_q: Number of horizontal grid points
__global__
void k_advection_2D_f32(float dt, float dy, float dx, int m_q, int k_q, float2* U, int pitch_u, cudaTextureObject_t Q, float* C, int pitch_c){
	
	const int TILE_WIDTH=8; 
	const int TILE_HEIGHT=8;

	int idy=blockIdx.y*blockDim.y*TILE_HEIGHT+threadIdx.y*TILE_HEIGHT;
	int idx=blockIdx.x*blockDim.x*TILE_WIDTH+threadIdx.x*TILE_WIDTH;
	
	int i=0;

	float2 p;
	C=(float*) ((char*)C+idy*pitch_c);
	U=(float2*) ((char*)U+idy*pitch_u);
	float2* U_ptr=U;
	float* C_ptr=C;

	while (i<m_q){
		for (int i1=0;i1<TILE_HEIGHT;i1++){
			int fy=idy+i1;			
			if ((fy+i)<m_q){
				int j=0;
				while(j<k_q){
				//printf("y:%d\n",fy);	
					for (int i2=0;i2<TILE_WIDTH;i2++){
						int fx=idx+i2;
						if ((fx+j)<k_q){
							//printf("i: %d j: %d y: %d x:%d\n",i,j,fy,fx);
							float2 v=U_ptr[fx+j];
							p.x=(fx+j+1.5f)-(dt*v.x*dx);
							p.y=(fy+i+1.5f)-(dt*v.y*dx);
							float q=tex2D<float>(Q,p.x,p.y);
							C_ptr[fx+j]=q;					
						}		
						else{
							break;
						}
					}					
					j+=gridDim.x*blockDim.x*TILE_WIDTH;	
				}		
			}						
			C_ptr=(float*) ((char*)C_ptr+pitch_c);
			U_ptr=(float2*) ((char*)U_ptr+pitch_u);
		}	
		i+=gridDim.y*blockDim.y*TILE_HEIGHT;
		C_ptr=(float*) ((char*)C+i*pitch_c);
		U_ptr=(float2*) ((char*)U+i*pitch_u);		
	}
}

__global__
void k_advection_2d_f32(float dt, float dy, float dx, int m_q, int k_q, float2* U, int pitch_u, cudaTextureObject_t Q, float2* C, int pitch_c){
	const int TILE_WIDTH=8; 
	const int TILE_HEIGHT=8;

	int idy=blockIdx.y*blockDim.y*TILE_HEIGHT+threadIdx.y*TILE_HEIGHT;
	int idx=blockIdx.x*blockDim.x*TILE_WIDTH+threadIdx.x*TILE_WIDTH;
	
	int i=0;

	float2 p;
	C=(float2*) ((char*)C+idy*pitch_c);
	U=(float2*) ((char*)U+idy*pitch_u);	
	float2* U_ptr=U;
	float2* C_ptr=C;

	while (i<m_q){
		for (int i1=0;i1<TILE_HEIGHT;i1++){
			int fy=idy+i1;			
			if ((fy+i)<m_q){
				int j=0;			
				while(j<k_q){
				//printf("y:%d\n",fy);	
					for (int i2=0;i2<TILE_WIDTH;i2++){
								
						int fx=idx+i2;
						if ((fx+j)<k_q){
							//printf("i: %d j: %d y: %d x:%d\n",i,j,fy,fx);
							float2 v=U_ptr[fx+j];
							p.x=(fx+j+1.5f)-(dt*v.x*dx);// we add 1.5 because of boundary conditions offset, else it would be 0.5
							p.y=(fy+i+1.5f)-(dt*v.y*dx);// we add 1.5 because of boundary conditions offset, else it would be 0.5
							float2 q=tex2D<float2>(Q,p.x,p.y);
							C_ptr[fx+j]=q;					
						}		
						else{
							break;
						}
					}					
					j+=gridDim.x*blockDim.x*TILE_WIDTH;	
				}		
			}						
			C_ptr=(float2*) ((char*)C_ptr+pitch_c);
			U_ptr=(float2*) ((char*)U_ptr+pitch_u);
		}	
		i+=gridDim.y*blockDim.y*TILE_HEIGHT;
		C_ptr=(float2*) ((char*)C+i*pitch_c);
		U_ptr=(float2*) ((char*)U+i*pitch_u);		
	}
}


__host__
void advection_2D_f32_device(float dt, float dy, float dx,  int m_q,  int k_q, float2* U_d, int pitch_u, float* Q_d, int pitch_q, float* C_d, int pitch_c){
	if ((m_q<3) || (k_q<3)){
		return;
	}

	//Create Resource description
	cudaResourceDesc resDesc;
	memset(&resDesc,0,sizeof(resDesc));

	resDesc.resType = cudaResourceTypePitch2D;
	resDesc.res.pitch2D.devPtr=Q_d;
	resDesc.res.pitch2D.width=k_q;
	resDesc.res.pitch2D.height=m_q;
	resDesc.res.pitch2D.pitchInBytes=pitch_q;
	resDesc.res.pitch2D.desc=cudaCreateChannelDesc<float>(); //is equivalent to cudaCreateChannelDesc<float>()
	
	/*
	resDesc.res.pitch2D.desc=cudaCreateChannelDesc(32,32,0,0,cudaChannelFormatKindFloat); //is equivalent to cudaCreateChannelDesc<float2>()
*/
	//Create Texture description
	cudaTextureDesc texDesc;
	memset(&texDesc,0,sizeof(texDesc));
    texDesc.normalizedCoords = false;
	texDesc.filterMode = cudaFilterModeLinear;
	texDesc.readMode=cudaReadModeElementType;
    texDesc.addressMode[0] = cudaAddressModeClamp;

	//Create Texture Object
	cudaTextureObject_t Q_tex;
    cudaError_t error1=cudaCreateTextureObject(&Q_tex, &resDesc, &texDesc, NULL);
	if (error1 !=cudaSuccess){
		printf("Errorcode: %d\n",error1);
	}
	printf("w, h: %d,%d\n",k_q,m_q);
	float* C_ptr=(float*) ((char*)C_d+pitch_c)+1;
	float2* U_ptr=(float2*) ((char*)U_d+pitch_u)+1;
	k_advection_2D_f32<<<dim3(1,1,1),dim3(8,4,1)>>>(dt,dy,dy,m_q-2,k_q-2,U_ptr,pitch_u,Q_tex,C_ptr,pitch_c);


}



	.file	"tmpxft_003622f9_00000000-6_advection.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2030:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z54__device_stub__Z18k_advection_2D_f32fffiiP6float2iyPfifffiiP6float2iyPfi
	.type	_Z54__device_stub__Z18k_advection_2D_f32fffiiP6float2iyPfifffiiP6float2iyPfi, @function
_Z54__device_stub__Z18k_advection_2D_f32fffiiP6float2iyPfifffiiP6float2iyPfi:
.LFB2052:
	.cfi_startproc
	endbr64
	subq	$216, %rsp
	.cfi_def_cfa_offset 224
	movl	%edi, 32(%rsp)
	leaq	72(%rsp), %rdi
	movl	%esi, 28(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 16(%rsp)
	leaq	56(%rsp), %rdx
	movl	%ecx, 24(%rsp)
	leaq	64(%rsp), %rcx
	movq	%r8, 8(%rsp)
	movq	%r9, (%rsp)
	movss	%xmm0, 44(%rsp)
	movss	%xmm1, 40(%rsp)
	movss	%xmm2, 36(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 200(%rsp)
	xorl	%eax, %eax
	leaq	44(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	36(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	28(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 176(%rsp)
	movq	%rsp, %rax
	movq	%rax, 184(%rsp)
	leaq	224(%rsp), %rax
	movq	%rax, 192(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	64(%rsp)
	.cfi_def_cfa_offset 232
	leaq	_Z18k_advection_2D_f32fffiiP6float2iyPfi(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 240
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 232
	popq	%rdx
	.cfi_def_cfa_offset 224
.L2:
	movq	200(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$216, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2052:
	.size	_Z54__device_stub__Z18k_advection_2D_f32fffiiP6float2iyPfifffiiP6float2iyPfi, .-_Z54__device_stub__Z18k_advection_2D_f32fffiiP6float2iyPfifffiiP6float2iyPfi
	.globl	_Z18k_advection_2D_f32fffiiP6float2iyPfi
	.type	_Z18k_advection_2D_f32fffiiP6float2iyPfi, @function
_Z18k_advection_2D_f32fffiiP6float2iyPfi:
.LFB2053:
	.cfi_startproc
	endbr64
	jmp	_Z54__device_stub__Z18k_advection_2D_f32fffiiP6float2iyPfifffiiP6float2iyPfi
	.cfi_endproc
.LFE2053:
	.size	_Z18k_advection_2D_f32fffiiP6float2iyPfi, .-_Z18k_advection_2D_f32fffiiP6float2iyPfi
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"Errorcode: %d\n"
.LC1:
	.string	"w, h: %d,%d\n"
	.text
	.globl	_Z23advection_2D_f32_devicefffiiP6float2iPfiS1_i
	.type	_Z23advection_2D_f32_devicefffiiP6float2iPfiS1_i, @function
_Z23advection_2D_f32_devicefffiiP6float2iPfiS1_i:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$216, %rsp
	.cfi_def_cfa_offset 272
	movss	%xmm0, 12(%rsp)
	movq	272(%rsp), %r14
	movss	%xmm1, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 200(%rsp)
	xorl	%eax, %eax
	cmpl	$2, %edi
	jle	.L8
	movl	%esi, %ebp
	cmpl	$2, %esi
	jle	.L8
	movq	%rdx, %r13
	leaq	68(%rsp), %rdx
	movl	%edi, %ebx
	movl	%ecx, %r12d
	movq	%rdx, %rdi
	movl	$9, %ecx
	movslq	%esi, %rdx
	movslq	%r9d, %r9
	rep stosl
	movq	%rdx, 104(%rsp)
	movslq	%ebx, %rdx
	leaq	44(%rsp), %rdi
	movq	%r8, 72(%rsp)
	movl	$32, %esi
	xorl	%r8d, %r8d
	leaq	64(%rsp), %r15
	movq	%rdx, 112(%rsp)
	xorl	%edx, %edx
	movq	%r9, 120(%rsp)
	movl	$2, %r9d
	movl	$3, 64(%rsp)
	call	cudaCreateChannelDesc@PLT
	xorl	%eax, %eax
	movl	$17, %ecx
	movl	60(%rsp), %edx
	leaq	132(%rsp), %rsi
	movups	44(%rsp), %xmm3
	movl	$1, 128(%rsp)
	movq	%rsi, %rdi
	movl	%edx, 96(%rsp)
	movq	%r15, %rsi
	leaq	128(%rsp), %rdx
	rep stosl
	leaq	24(%rsp), %rdi
	movups	%xmm3, 80(%rsp)
	movl	$1, 140(%rsp)
	call	cudaCreateTextureObject@PLT
	movl	%eax, %edx
	testl	%eax, %eax
	je	.L10
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L10:
	movl	%ebx, %ecx
	movl	%ebp, %edx
	leaq	.LC1(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$2147483649, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$3, %rdx
	movl	$1, %ecx
	movabsq	$4294967297, %rdi
	movl	$1, %esi
	movq	%rdx, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	movslq	280(%rsp), %rax
	leal	-2(%rbx), %edi
	pushq	%rcx
	.cfi_def_cfa_offset 280
	movslq	%r12d, %rdx
	movl	288(%rsp), %ebx
	leal	-2(%rbp), %esi
	leaq	8(%r13,%rdx), %rdx
	movl	%r12d, %ecx
	leaq	4(%r14,%rax), %r9
	pushq	%rbx
	.cfi_def_cfa_offset 288
	movss	24(%rsp), %xmm2
	movq	40(%rsp), %r8
	movss	28(%rsp), %xmm0
	movaps	%xmm2, %xmm1
	call	_Z54__device_stub__Z18k_advection_2D_f32fffiiP6float2iyPfifffiiP6float2iyPfi
	popq	%rsi
	.cfi_def_cfa_offset 280
	popq	%rdi
	.cfi_def_cfa_offset 272
.L8:
	movq	200(%rsp), %rax
	subq	%fs:40, %rax
	je	.L12
	call	__stack_chk_fail@PLT
.L12:
	addq	$216, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z23advection_2D_f32_devicefffiiP6float2iPfiS1_i, .-_Z23advection_2D_f32_devicefffiiP6float2iPfiS1_i
	.globl	_Z55__device_stub__Z18k_advection_2d_f32fffiiP6float2iyS0_ifffiiP6float2iyS0_i
	.type	_Z55__device_stub__Z18k_advection_2d_f32fffiiP6float2iyS0_ifffiiP6float2iyS0_i, @function
_Z55__device_stub__Z18k_advection_2d_f32fffiiP6float2iyS0_ifffiiP6float2iyS0_i:
.LFB2054:
	.cfi_startproc
	endbr64
	subq	$216, %rsp
	.cfi_def_cfa_offset 224
	movl	%edi, 32(%rsp)
	leaq	72(%rsp), %rdi
	movl	%esi, 28(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 16(%rsp)
	leaq	56(%rsp), %rdx
	movl	%ecx, 24(%rsp)
	leaq	64(%rsp), %rcx
	movq	%r8, 8(%rsp)
	movq	%r9, (%rsp)
	movss	%xmm0, 44(%rsp)
	movss	%xmm1, 40(%rsp)
	movss	%xmm2, 36(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 200(%rsp)
	xorl	%eax, %eax
	leaq	44(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	36(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	28(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 176(%rsp)
	movq	%rsp, %rax
	movq	%rax, 184(%rsp)
	leaq	224(%rsp), %rax
	movq	%rax, 192(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L17
	pushq	64(%rsp)
	.cfi_def_cfa_offset 232
	leaq	_Z18k_advection_2d_f32fffiiP6float2iyS0_i(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 240
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 232
	popq	%rdx
	.cfi_def_cfa_offset 224
.L17:
	movq	200(%rsp), %rax
	subq	%fs:40, %rax
	je	.L19
	call	__stack_chk_fail@PLT
.L19:
	addq	$216, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2054:
	.size	_Z55__device_stub__Z18k_advection_2d_f32fffiiP6float2iyS0_ifffiiP6float2iyS0_i, .-_Z55__device_stub__Z18k_advection_2d_f32fffiiP6float2iyS0_ifffiiP6float2iyS0_i
	.globl	_Z18k_advection_2d_f32fffiiP6float2iyS0_i
	.type	_Z18k_advection_2d_f32fffiiP6float2iyS0_i, @function
_Z18k_advection_2d_f32fffiiP6float2iyS0_i:
.LFB2055:
	.cfi_startproc
	endbr64
	jmp	_Z55__device_stub__Z18k_advection_2d_f32fffiiP6float2iyS0_ifffiiP6float2iyS0_i
	.cfi_endproc
.LFE2055:
	.size	_Z18k_advection_2d_f32fffiiP6float2iyS0_i, .-_Z18k_advection_2d_f32fffiiP6float2iyS0_i
	.section	.rodata.str1.1
.LC2:
	.string	"_Z18k_advection_2d_f32fffiiP6float2iyS0_i"
.LC3:
	.string	"_Z18k_advection_2D_f32fffiiP6float2iyPfi"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2057:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC2(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z18k_advection_2d_f32fffiiP6float2iyS0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC3(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z18k_advection_2D_f32fffiiP6float2iyPfi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2057:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <stdio.h>

//static cudaArray* tex_array;
//m_q: Number of vertical interior grid points, k_q: Number of horizontal grid points
__global__
void k_advection_2D_f32(float dt, float dy, float dx, int m_q, int k_q, float2* U, int pitch_u, hipTextureObject_t Q, float* C, int pitch_c){
	
	const int TILE_WIDTH=8; 
	const int TILE_HEIGHT=8;

	int idy=blockIdx.y*blockDim.y*TILE_HEIGHT+threadIdx.y*TILE_HEIGHT;
	int idx=blockIdx.x*blockDim.x*TILE_WIDTH+threadIdx.x*TILE_WIDTH;
	
	int i=0;

	float2 p;
	C=(float*) ((char*)C+idy*pitch_c);
	U=(float2*) ((char*)U+idy*pitch_u);
	float2* U_ptr=U;
	float* C_ptr=C;

	while (i<m_q){
		for (int i1=0;i1<TILE_HEIGHT;i1++){
			int fy=idy+i1;			
			if ((fy+i)<m_q){
				int j=0;
				while(j<k_q){
				//printf("y:%d\n",fy);	
					for (int i2=0;i2<TILE_WIDTH;i2++){
						int fx=idx+i2;
						if ((fx+j)<k_q){
							//printf("i: %d j: %d y: %d x:%d\n",i,j,fy,fx);
							float2 v=U_ptr[fx+j];
							p.x=(fx+j+1.5f)-(dt*v.x*dx);
							p.y=(fy+i+1.5f)-(dt*v.y*dx);
							float q=tex2D<float>(Q,p.x,p.y);
							C_ptr[fx+j]=q;					
						}		
						else{
							break;
						}
					}					
					j+=gridDim.x*blockDim.x*TILE_WIDTH;	
				}		
			}						
			C_ptr=(float*) ((char*)C_ptr+pitch_c);
			U_ptr=(float2*) ((char*)U_ptr+pitch_u);
		}	
		i+=gridDim.y*blockDim.y*TILE_HEIGHT;
		C_ptr=(float*) ((char*)C+i*pitch_c);
		U_ptr=(float2*) ((char*)U+i*pitch_u);		
	}
}

__global__
void k_advection_2d_f32(float dt, float dy, float dx, int m_q, int k_q, float2* U, int pitch_u, hipTextureObject_t Q, float2* C, int pitch_c){
	const int TILE_WIDTH=8; 
	const int TILE_HEIGHT=8;

	int idy=blockIdx.y*blockDim.y*TILE_HEIGHT+threadIdx.y*TILE_HEIGHT;
	int idx=blockIdx.x*blockDim.x*TILE_WIDTH+threadIdx.x*TILE_WIDTH;
	
	int i=0;

	float2 p;
	C=(float2*) ((char*)C+idy*pitch_c);
	U=(float2*) ((char*)U+idy*pitch_u);	
	float2* U_ptr=U;
	float2* C_ptr=C;

	while (i<m_q){
		for (int i1=0;i1<TILE_HEIGHT;i1++){
			int fy=idy+i1;			
			if ((fy+i)<m_q){
				int j=0;			
				while(j<k_q){
				//printf("y:%d\n",fy);	
					for (int i2=0;i2<TILE_WIDTH;i2++){
								
						int fx=idx+i2;
						if ((fx+j)<k_q){
							//printf("i: %d j: %d y: %d x:%d\n",i,j,fy,fx);
							float2 v=U_ptr[fx+j];
							p.x=(fx+j+1.5f)-(dt*v.x*dx);// we add 1.5 because of boundary conditions offset, else it would be 0.5
							p.y=(fy+i+1.5f)-(dt*v.y*dx);// we add 1.5 because of boundary conditions offset, else it would be 0.5
							float2 q=tex2D<float2>(Q,p.x,p.y);
							C_ptr[fx+j]=q;					
						}		
						else{
							break;
						}
					}					
					j+=gridDim.x*blockDim.x*TILE_WIDTH;	
				}		
			}						
			C_ptr=(float2*) ((char*)C_ptr+pitch_c);
			U_ptr=(float2*) ((char*)U_ptr+pitch_u);
		}	
		i+=gridDim.y*blockDim.y*TILE_HEIGHT;
		C_ptr=(float2*) ((char*)C+i*pitch_c);
		U_ptr=(float2*) ((char*)U+i*pitch_u);		
	}
}


__host__
void advection_2D_f32_device(float dt, float dy, float dx,  int m_q,  int k_q, float2* U_d, int pitch_u, float* Q_d, int pitch_q, float* C_d, int pitch_c){
	if ((m_q<3) || (k_q<3)){
		return;
	}

	//Create Resource description
	hipResourceDesc resDesc;
	memset(&resDesc,0,sizeof(resDesc));

	resDesc.resType = hipResourceTypePitch2D;
	resDesc.res.pitch2D.devPtr=Q_d;
	resDesc.res.pitch2D.width=k_q;
	resDesc.res.pitch2D.height=m_q;
	resDesc.res.pitch2D.pitchInBytes=pitch_q;
	resDesc.res.pitch2D.desc=hipCreateChannelDesc<float>(); //is equivalent to cudaCreateChannelDesc<float>()
	
	/*
	resDesc.res.pitch2D.desc=cudaCreateChannelDesc(32,32,0,0,cudaChannelFormatKindFloat); //is equivalent to cudaCreateChannelDesc<float2>()
*/
	//Create Texture description
	hipTextureDesc texDesc;
	memset(&texDesc,0,sizeof(texDesc));
    texDesc.normalizedCoords = false;
	texDesc.filterMode = hipFilterModeLinear;
	texDesc.readMode=hipReadModeElementType;
    texDesc.addressMode[0] = hipAddressModeClamp;

	//Create Texture Object
	hipTextureObject_t Q_tex;
    hipError_t error1=hipCreateTextureObject(&Q_tex, &resDesc, &texDesc, NULL);
	if (error1 !=hipSuccess){
		printf("Errorcode: %d\n",error1);
	}
	printf("w, h: %d,%d\n",k_q,m_q);
	float* C_ptr=(float*) ((char*)C_d+pitch_c)+1;
	float2* U_ptr=(float2*) ((char*)U_d+pitch_u)+1;
	k_advection_2D_f32<<<dim3(1,1,1),dim3(8,4,1)>>>(dt,dy,dy,m_q-2,k_q-2,U_ptr,pitch_u,Q_tex,C_ptr,pitch_c);


}



	.text
	.file	"advection.hip"
	.globl	_Z33__device_stub__k_advection_2D_f32fffiiP15HIP_vector_typeIfLj2EEiP13__hip_texturePfi # -- Begin function _Z33__device_stub__k_advection_2D_f32fffiiP15HIP_vector_typeIfLj2EEiP13__hip_texturePfi
	.type	_Z33__device_stub__k_advection_2D_f32fffiiP15HIP_vector_typeIfLj2EEiP13__hip_texturePfi,@function
_Z33__device_stub__k_advection_2D_f32fffiiP15HIP_vector_typeIfLj2EEiP13__hip_texturePfi: # @_Z33__device_stub__k_advection_2D_f32fffiiP15HIP_vector_typeIfLj2EEiP13__hip_texturePfi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$176, %rsp
	.cfi_def_cfa_offset 224
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	20(%rsp), %rax
	movss	%xmm0, (%rax)
	leaq	16(%rsp), %r10
	movss	%xmm1, (%r10)
	leaq	12(%rsp), %r11
	movss	%xmm2, (%r11)
	leaq	8(%rsp), %r14
	movl	%edi, (%r14)
	leaq	4(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	56(%rsp), %rsi
	movq	%rdx, (%rsi)
	movq	%rsp, %rdx
	movl	%ecx, (%rdx)
	leaq	48(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	40(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%r10, 8(%rbx)
	movq	%r11, 16(%rbx)
	movq	%r14, 24(%rbx)
	movq	%rdi, 32(%rbx)
	movq	%rsi, 40(%rbx)
	movq	%rdx, 48(%rbx)
	movq	%rcx, 56(%rbx)
	movq	%r8, 64(%rbx)
	leaq	224(%rsp), %rax
	movq	%rax, 72(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z18k_advection_2D_f32fffiiP15HIP_vector_typeIfLj2EEiP13__hip_texturePfi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$192, %rsp
	.cfi_adjust_cfa_offset -192
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z33__device_stub__k_advection_2D_f32fffiiP15HIP_vector_typeIfLj2EEiP13__hip_texturePfi, .Lfunc_end0-_Z33__device_stub__k_advection_2D_f32fffiiP15HIP_vector_typeIfLj2EEiP13__hip_texturePfi
	.cfi_endproc
                                        # -- End function
	.globl	_Z33__device_stub__k_advection_2d_f32fffiiP15HIP_vector_typeIfLj2EEiP13__hip_textureS1_i # -- Begin function _Z33__device_stub__k_advection_2d_f32fffiiP15HIP_vector_typeIfLj2EEiP13__hip_textureS1_i
	.type	_Z33__device_stub__k_advection_2d_f32fffiiP15HIP_vector_typeIfLj2EEiP13__hip_textureS1_i,@function
_Z33__device_stub__k_advection_2d_f32fffiiP15HIP_vector_typeIfLj2EEiP13__hip_textureS1_i: # @_Z33__device_stub__k_advection_2d_f32fffiiP15HIP_vector_typeIfLj2EEiP13__hip_textureS1_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$176, %rsp
	.cfi_def_cfa_offset 224
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	20(%rsp), %rax
	movss	%xmm0, (%rax)
	leaq	16(%rsp), %r10
	movss	%xmm1, (%r10)
	leaq	12(%rsp), %r11
	movss	%xmm2, (%r11)
	leaq	8(%rsp), %r14
	movl	%edi, (%r14)
	leaq	4(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	56(%rsp), %rsi
	movq	%rdx, (%rsi)
	movq	%rsp, %rdx
	movl	%ecx, (%rdx)
	leaq	48(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	40(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%r10, 8(%rbx)
	movq	%r11, 16(%rbx)
	movq	%r14, 24(%rbx)
	movq	%rdi, 32(%rbx)
	movq	%rsi, 40(%rbx)
	movq	%rdx, 48(%rbx)
	movq	%rcx, 56(%rbx)
	movq	%r8, 64(%rbx)
	leaq	224(%rsp), %rax
	movq	%rax, 72(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z18k_advection_2d_f32fffiiP15HIP_vector_typeIfLj2EEiP13__hip_textureS1_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$192, %rsp
	.cfi_adjust_cfa_offset -192
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z33__device_stub__k_advection_2d_f32fffiiP15HIP_vector_typeIfLj2EEiP13__hip_textureS1_i, .Lfunc_end1-_Z33__device_stub__k_advection_2d_f32fffiiP15HIP_vector_typeIfLj2EEiP13__hip_textureS1_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z23advection_2D_f32_devicefffiiP15HIP_vector_typeIfLj2EEiPfiS2_i # -- Begin function _Z23advection_2D_f32_devicefffiiP15HIP_vector_typeIfLj2EEiPfiS2_i
	.type	_Z23advection_2D_f32_devicefffiiP15HIP_vector_typeIfLj2EEiPfiS2_i,@function
_Z23advection_2D_f32_devicefffiiP15HIP_vector_typeIfLj2EEiPfiS2_i: # @_Z23advection_2D_f32_devicefffiiP15HIP_vector_typeIfLj2EEiPfiS2_i
	.cfi_startproc
# %bb.0:
	cmpl	$3, %edi
	jl	.LBB2_7
# %bb.1:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$168, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%esi, %ebx
	cmpl	$3, %esi
	jl	.LBB2_6
# %bb.2:
	movl	%ecx, %r15d
	movq	%rdx, %r14
	movl	%edi, %ebp
	movss	%xmm0, 16(%rsp)                 # 4-byte Spill
	movss	%xmm1, 20(%rsp)                 # 4-byte Spill
	xorps	%xmm0, %xmm0
	leaq	48(%rsp), %rdi
	movaps	%xmm0, -16(%rdi)
	movaps	%xmm0, (%rdi)
	movq	$0, 16(%rdi)
	movl	$3, -16(%rdi)
	movq	%r8, -8(%rdi)
	movl	%ebx, %eax
	movq	%rax, 24(%rdi)
	movl	%ebp, %eax
	movq	%rax, 32(%rdi)
	movslq	%r9d, %rax
	movq	%rax, 40(%rdi)
	movl	$32, %esi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	xorl	%r8d, %r8d
	movl	$2, %r9d
	callq	hipCreateChannelDesc
	leaq	104(%rsp), %rdx
	xorps	%xmm0, %xmm0
	movups	%xmm0, 4(%rdx)
	movups	%xmm0, 48(%rdx)
	movups	%xmm0, 36(%rdx)
	movups	%xmm0, 20(%rdx)
	movl	$1, %eax
	movl	%eax, 12(%rdx)
	movl	%eax, (%rdx)
	leaq	24(%rsp), %rdi
	leaq	32(%rsp), %rsi
	xorl	%ecx, %ecx
	callq	hipCreateTextureObject
	testl	%eax, %eax
	je	.LBB2_4
# %bb.3:
	movl	$.L.str, %edi
	movl	%eax, %esi
	xorl	%eax, %eax
	callq	printf
.LBB2_4:
	movl	$.L.str.1, %edi
	movl	%ebx, %esi
	movl	%ebp, %edx
	xorl	%eax, %eax
	callq	printf
	movabsq	$4294967297, %rdi               # imm = 0x100000001
	movabsq	$17179869192, %rdx              # imm = 0x400000008
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_6
# %bb.5:
	movl	216(%rsp), %eax
	movq	208(%rsp), %rsi
	movslq	%r15d, %rcx
	leaq	(%r14,%rcx), %rdx
	addq	$8, %rdx
	cltq
	leaq	(%rsi,%rax), %r9
	addq	$4, %r9
	addl	$-2, %ebp
	addl	$-2, %ebx
	movq	24(%rsp), %r8
	movl	%eax, (%rsp)
	movss	16(%rsp), %xmm0                 # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	movss	20(%rsp), %xmm1                 # 4-byte Reload
                                        # xmm1 = mem[0],zero,zero,zero
	movaps	%xmm1, %xmm2
	movl	%ebp, %edi
	movl	%ebx, %esi
                                        # kill: def $ecx killed $ecx killed $rcx
	callq	_Z33__device_stub__k_advection_2D_f32fffiiP15HIP_vector_typeIfLj2EEiP13__hip_texturePfi
.LBB2_6:
	addq	$168, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r14
	.cfi_restore %r15
	.cfi_restore %rbp
.LBB2_7:
	retq
.Lfunc_end2:
	.size	_Z23advection_2D_f32_devicefffiiP15HIP_vector_typeIfLj2EEiPfiS2_i, .Lfunc_end2-_Z23advection_2D_f32_devicefffiiP15HIP_vector_typeIfLj2EEiPfiS2_i
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z18k_advection_2D_f32fffiiP15HIP_vector_typeIfLj2EEiP13__hip_texturePfi, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z18k_advection_2d_f32fffiiP15HIP_vector_typeIfLj2EEiP13__hip_textureS1_i, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z18k_advection_2D_f32fffiiP15HIP_vector_typeIfLj2EEiP13__hip_texturePfi,@object # @_Z18k_advection_2D_f32fffiiP15HIP_vector_typeIfLj2EEiP13__hip_texturePfi
	.section	.rodata,"a",@progbits
	.globl	_Z18k_advection_2D_f32fffiiP15HIP_vector_typeIfLj2EEiP13__hip_texturePfi
	.p2align	3, 0x0
_Z18k_advection_2D_f32fffiiP15HIP_vector_typeIfLj2EEiP13__hip_texturePfi:
	.quad	_Z33__device_stub__k_advection_2D_f32fffiiP15HIP_vector_typeIfLj2EEiP13__hip_texturePfi
	.size	_Z18k_advection_2D_f32fffiiP15HIP_vector_typeIfLj2EEiP13__hip_texturePfi, 8

	.type	_Z18k_advection_2d_f32fffiiP15HIP_vector_typeIfLj2EEiP13__hip_textureS1_i,@object # @_Z18k_advection_2d_f32fffiiP15HIP_vector_typeIfLj2EEiP13__hip_textureS1_i
	.globl	_Z18k_advection_2d_f32fffiiP15HIP_vector_typeIfLj2EEiP13__hip_textureS1_i
	.p2align	3, 0x0
_Z18k_advection_2d_f32fffiiP15HIP_vector_typeIfLj2EEiP13__hip_textureS1_i:
	.quad	_Z33__device_stub__k_advection_2d_f32fffiiP15HIP_vector_typeIfLj2EEiP13__hip_textureS1_i
	.size	_Z18k_advection_2d_f32fffiiP15HIP_vector_typeIfLj2EEiP13__hip_textureS1_i, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Errorcode: %d\n"
	.size	.L.str, 15

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"w, h: %d,%d\n"
	.size	.L.str.1, 13

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z18k_advection_2D_f32fffiiP15HIP_vector_typeIfLj2EEiP13__hip_texturePfi"
	.size	.L__unnamed_1, 73

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z18k_advection_2d_f32fffiiP15HIP_vector_typeIfLj2EEiP13__hip_textureS1_i"
	.size	.L__unnamed_2, 74

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z33__device_stub__k_advection_2D_f32fffiiP15HIP_vector_typeIfLj2EEiP13__hip_texturePfi
	.addrsig_sym _Z33__device_stub__k_advection_2d_f32fffiiP15HIP_vector_typeIfLj2EEiP13__hip_textureS1_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z18k_advection_2D_f32fffiiP15HIP_vector_typeIfLj2EEiP13__hip_texturePfi
	.addrsig_sym _Z18k_advection_2d_f32fffiiP15HIP_vector_typeIfLj2EEiP13__hip_textureS1_i
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z18k_advection_2D_f32fffiiP15HIP_vector_typeIfLj2EEiP13__hip_texturePfi ; -- Begin function _Z18k_advection_2D_f32fffiiP15HIP_vector_typeIfLj2EEiP13__hip_texturePfi
	.globl	_Z18k_advection_2D_f32fffiiP15HIP_vector_typeIfLj2EEiP13__hip_texturePfi
	.p2align	8
	.type	_Z18k_advection_2D_f32fffiiP15HIP_vector_typeIfLj2EEiP13__hip_texturePfi,@function
_Z18k_advection_2D_f32fffiiP15HIP_vector_typeIfLj2EEiP13__hip_texturePfi: ; @_Z18k_advection_2D_f32fffiiP15HIP_vector_typeIfLj2EEiP13__hip_texturePfi
; %bb.0:
	s_load_b128 s[4:7], s[0:1], 0x8
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s5, 1
	s_cbranch_scc1 .LBB0_12
; %bb.1:                                ; %.preheader76.lr.ph
	s_clause 0x4
	s_load_b32 s13, s[0:1], 0x4c
	s_load_b32 s7, s[0:1], 0x20
	s_load_b32 s12, s[0:1], 0x38
	s_load_b64 s[2:3], s[0:1], 0x40
	s_load_b64 s[16:17], s[0:1], 0x18
	v_bfe_u32 v1, v0, 10, 10
	s_load_b128 s[8:11], s[0:1], 0x28
	v_and_b32_e32 v4, 0x3ff, v0
	s_load_b32 s1, s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s18, s13, 16
	s_and_b32 s0, s13, 0xffff
	s_mul_i32 s15, s15, s18
	s_mul_i32 s14, s14, s0
	v_add_lshl_u32 v11, s15, v1, 3
	s_ashr_i32 s13, s12, 31
	s_ashr_i32 s15, s7, 31
	s_cmp_lt_i32 s6, 1
	s_mul_i32 s0, s2, s0
	v_mul_lo_u32 v0, v11, s7
	v_mul_lo_u32 v2, v11, s12
	s_mul_i32 s2, s3, s18
	s_cselect_b32 s3, -1, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v1, 31, v0
	v_ashrrev_i32_e32 v3, 31, v2
	v_add_co_u32 v0, vcc_lo, s16, v0
	s_xor_b32 s16, s3, -1
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v1, vcc_lo, s17, v1, vcc_lo
	v_add_co_u32 v2, vcc_lo, s10, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s11, v3, vcc_lo
	v_mov_b32_e32 v7, v1
	v_add_lshl_u32 v12, s14, v4, 3
	s_delay_alu instid0(VALU_DEP_3)
	v_dual_mov_b32 v6, v0 :: v_dual_mov_b32 v5, v3
	v_mov_b32_e32 v4, v2
	s_lshl_b32 s10, s0, 3
	s_lshl_b32 s11, s2, 3
	s_mov_b32 s14, 0
.LBB0_2:                                ; %.preheader76
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_3 Depth 2
                                        ;       Child Loop BB0_5 Depth 3
                                        ;         Child Loop BB0_6 Depth 4
	s_mov_b32 s17, 0
.LBB0_3:                                ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB0_5 Depth 3
                                        ;         Child Loop BB0_6 Depth 4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_or_b32_e32 v8, s17, v11
	v_add_nc_u32_e32 v8, s14, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_gt_i32_e32 vcc_lo, s5, v8
	s_and_b32 s0, vcc_lo, s16
	s_and_saveexec_b32 s18, s0
	s_cbranch_execz .LBB0_10
; %bb.4:                                ; %.preheader.lr.ph
                                        ;   in Loop: Header=BB0_3 Depth=2
	v_cvt_f32_i32_e32 v8, v8
	s_mov_b32 s19, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_add_f32 v13, 0x3fc00000, v8 :: v_dual_mov_b32 v8, v12
.LBB0_5:                                ; %.preheader
                                        ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_3 Depth=2
                                        ; =>    This Loop Header: Depth=3
                                        ;         Child Loop BB0_6 Depth 4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v9, 31, v8
	v_mov_b32_e32 v16, v8
	s_mov_b64 s[2:3], 0
	s_mov_b32 s20, 0
                                        ; implicit-def: $sgpr21
	v_lshlrev_b64 v[14:15], 3, v[8:9]
	v_lshlrev_b64 v[9:10], 2, v[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v14, vcc_lo, v6, v14
	v_add_co_ci_u32_e32 v15, vcc_lo, v7, v15, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v9, vcc_lo, v4, v9
	v_add_co_ci_u32_e32 v10, vcc_lo, v5, v10, vcc_lo
.LBB0_6:                                ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_3 Depth=2
                                        ;       Parent Loop BB0_5 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_or_b32 s21, s21, exec_lo
	s_mov_b32 s22, exec_lo
	v_cmpx_gt_i32_e64 s6, v16
	s_cbranch_execz .LBB0_8
; %bb.7:                                ;   in Loop: Header=BB0_6 Depth=4
	v_add_co_u32 v17, vcc_lo, v14, s2
	v_add_co_ci_u32_e32 v18, vcc_lo, s3, v15, vcc_lo
	v_cvt_f32_i32_e32 v19, v16
	v_add_nc_u32_e32 v16, 1, v16
	global_load_b64 v[17:18], v[17:18], off
	s_clause 0x2
	s_load_b128 s[36:39], s[8:9], 0x30
	s_load_b256 s[24:31], s[8:9], 0x0
	s_load_b32 s23, s[8:9], 0x28
	v_add_f32_e32 v19, 0x3fc00000, v19
	s_waitcnt lgkmcnt(0)
	s_bitcmp0_b32 s38, 20
	s_cselect_b32 vcc_lo, -1, 0
	s_bitcmp0_b32 s36, 15
	v_cvt_f32_u32_e32 v21, s23
	s_cselect_b32 s0, -1, 0
	s_bfe_u32 s33, s26, 0xe000e
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_add_i32 s33, s33, 1
	v_cndmask_b32_e64 v21, 1.0, v21, s0
	v_cvt_f32_u32_e32 v20, s33
	s_add_u32 s2, s2, 8
	s_addc_u32 s3, s3, 0
	s_cmp_eq_u32 s2, 64
	v_rcp_f32_e32 v22, v21
	v_cndmask_b32_e64 v20, 1.0, v20, s0
	s_cselect_b32 s0, -1, 0
	s_and_not1_b32 s21, s21, exec_lo
	s_and_b32 s0, s0, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_or_b32 s21, s21, s0
	s_waitcnt vmcnt(0)
	v_mul_f32_e32 v18, s1, v18
	v_fma_f32 v18, -v18, s4, v13
	v_mul_f32_e32 v17, s1, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f32 v17, -v17, s4, v19
	v_rcp_f32_e32 v19, v20
	v_mul_f32_e32 v20, v18, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_floor_f32_e32 v20, v20
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v19, v19, v20
	v_dual_mul_f32 v21, v17, v21 :: v_dual_cndmask_b32 v18, v18, v19
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_floor_f32_e32 v21, v21
	v_mul_f32_e32 v20, v22, v21
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e32 v17, v17, v20, vcc_lo
	image_sample_lz v17, v[17:18], s[24:31], s[36:39] dmask:0x1 dim:SQ_RSRC_IMG_2D
	s_waitcnt vmcnt(0)
	global_store_b32 v[9:10], v17, off
	v_add_co_u32 v9, vcc_lo, v9, 4
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v10, vcc_lo
.LBB0_8:                                ; %Flow
                                        ;   in Loop: Header=BB0_6 Depth=4
	s_or_b32 exec_lo, exec_lo, s22
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, exec_lo, s21
	s_or_b32 s20, s0, s20
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s20
	s_cbranch_execnz .LBB0_6
; %bb.9:                                ; %.critedge
                                        ;   in Loop: Header=BB0_5 Depth=3
	s_or_b32 exec_lo, exec_lo, s20
	v_add_nc_u32_e32 v8, s10, v8
	s_add_i32 s19, s19, s10
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lt_i32 s19, s6
	s_cbranch_scc1 .LBB0_5
.LBB0_10:                               ; %Flow124
                                        ;   in Loop: Header=BB0_3 Depth=2
	s_or_b32 exec_lo, exec_lo, s18
	v_add_co_u32 v4, vcc_lo, v4, s12
	v_add_co_ci_u32_e32 v5, vcc_lo, s13, v5, vcc_lo
	v_add_co_u32 v6, vcc_lo, v6, s7
	v_add_co_ci_u32_e32 v7, vcc_lo, s15, v7, vcc_lo
	s_add_i32 s17, s17, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s17, 8
	s_cbranch_scc0 .LBB0_3
; %bb.11:                               ;   in Loop: Header=BB0_2 Depth=1
	s_add_i32 s14, s14, s11
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mul_i32 s0, s14, s12
	s_mul_i32 s2, s14, s7
	s_ashr_i32 s3, s0, 31
	v_add_co_u32 v4, vcc_lo, v2, s0
	v_add_co_ci_u32_e32 v5, vcc_lo, s3, v3, vcc_lo
	s_ashr_i32 s0, s2, 31
	v_add_co_u32 v6, vcc_lo, v0, s2
	v_add_co_ci_u32_e32 v7, vcc_lo, s0, v1, vcc_lo
	s_cmp_ge_i32 s14, s5
	s_cbranch_scc0 .LBB0_2
.LBB0_12:                               ; %._crit_edge
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z18k_advection_2D_f32fffiiP15HIP_vector_typeIfLj2EEiP13__hip_texturePfi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 320
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 23
		.amdhsa_next_free_sgpr 40
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z18k_advection_2D_f32fffiiP15HIP_vector_typeIfLj2EEiP13__hip_texturePfi, .Lfunc_end0-_Z18k_advection_2D_f32fffiiP15HIP_vector_typeIfLj2EEiP13__hip_texturePfi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 840
; NumSgprs: 42
; NumVgprs: 23
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 5
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 42
; NumVGPRsForWavesPerEU: 23
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z18k_advection_2d_f32fffiiP15HIP_vector_typeIfLj2EEiP13__hip_textureS1_i ; -- Begin function _Z18k_advection_2d_f32fffiiP15HIP_vector_typeIfLj2EEiP13__hip_textureS1_i
	.globl	_Z18k_advection_2d_f32fffiiP15HIP_vector_typeIfLj2EEiP13__hip_textureS1_i
	.p2align	8
	.type	_Z18k_advection_2d_f32fffiiP15HIP_vector_typeIfLj2EEiP13__hip_textureS1_i,@function
_Z18k_advection_2d_f32fffiiP15HIP_vector_typeIfLj2EEiP13__hip_textureS1_i: ; @_Z18k_advection_2d_f32fffiiP15HIP_vector_typeIfLj2EEiP13__hip_textureS1_i
; %bb.0:
	s_load_b128 s[4:7], s[0:1], 0x8
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s5, 1
	s_cbranch_scc1 .LBB1_12
; %bb.1:                                ; %.preheader77.lr.ph
	s_clause 0x4
	s_load_b32 s7, s[0:1], 0x4c
	s_load_b32 s2, s[0:1], 0x38
	s_load_b32 s3, s[0:1], 0x20
	s_load_b64 s[16:17], s[0:1], 0x40
	s_load_b64 s[18:19], s[0:1], 0x18
	v_bfe_u32 v1, v0, 10, 10
	s_load_b128 s[8:11], s[0:1], 0x28
	v_and_b32_e32 v4, 0x3ff, v0
	s_load_b32 s1, s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s13, s7, 16
	s_and_b32 s0, s7, 0xffff
	s_mul_i32 s15, s15, s13
	s_ashr_i32 s7, s2, 31
	v_add_lshl_u32 v11, s15, v1, 3
	s_ashr_i32 s12, s3, 31
	s_mul_i32 s14, s14, s0
	s_cmp_lt_i32 s6, 1
	s_mul_i32 s0, s16, s0
	v_mul_lo_u32 v0, v11, s3
	v_mul_lo_u32 v2, v11, s2
	s_mul_i32 s13, s17, s13
	s_cselect_b32 s15, -1, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v1, 31, v0
	v_add_co_u32 v0, vcc_lo, s18, v0
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v1, vcc_lo, s19, v1, vcc_lo
	v_add_co_u32 v2, vcc_lo, s10, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s11, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_mov_b32_e32 v7, v1
	v_dual_mov_b32 v6, v0 :: v_dual_lshlrev_b32 v5, 3, v4
	v_add_lshl_u32 v12, s14, v4, 3
	s_lshl_b32 s10, s0, 3
	s_lshl_b32 s11, s13, 3
	v_lshl_add_u32 v13, s14, 3, v5
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_mov_b32 s13, 0
	s_xor_b32 s14, s15, -1
.LBB1_2:                                ; %.preheader77
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB1_3 Depth 2
                                        ;       Child Loop BB1_5 Depth 3
                                        ;         Child Loop BB1_6 Depth 4
	s_mov_b32 s15, 0
.LBB1_3:                                ;   Parent Loop BB1_2 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB1_5 Depth 3
                                        ;         Child Loop BB1_6 Depth 4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_or_b32_e32 v8, s15, v11
	v_add_nc_u32_e32 v8, s13, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_gt_i32_e32 vcc_lo, s5, v8
	s_and_b32 s0, vcc_lo, s14
	s_and_saveexec_b32 s16, s0
	s_cbranch_execz .LBB1_10
; %bb.4:                                ; %.preheader.lr.ph
                                        ;   in Loop: Header=BB1_3 Depth=2
	v_cvt_f32_i32_e32 v9, v8
	v_dual_mov_b32 v8, v12 :: v_dual_mov_b32 v15, v13
	s_mov_b32 s17, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_f32_e32 v14, 0x3fc00000, v9
.LBB1_5:                                ; %.preheader
                                        ;   Parent Loop BB1_2 Depth=1
                                        ;     Parent Loop BB1_3 Depth=2
                                        ; =>    This Loop Header: Depth=3
                                        ;         Child Loop BB1_6 Depth 4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v9, 31, v8
	s_mov_b32 s18, 0
	s_mov_b32 s19, 0
                                        ; implicit-def: $sgpr20
	v_lshlrev_b64 v[9:10], 3, v[8:9]
	s_delay_alu instid0(VALU_DEP_1)
	v_or_b32_e32 v9, 4, v9
.LBB1_6:                                ;   Parent Loop BB1_2 Depth=1
                                        ;     Parent Loop BB1_3 Depth=2
                                        ;       Parent Loop BB1_5 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	v_add_nc_u32_e32 v16, s19, v15
	s_or_b32 s20, s20, exec_lo
	s_mov_b32 s21, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s6, v16
	s_cbranch_execz .LBB1_8
; %bb.7:                                ;   in Loop: Header=BB1_6 Depth=4
	v_add_co_u32 v17, vcc_lo, v6, v9
	v_add_co_ci_u32_e32 v18, vcc_lo, v7, v10, vcc_lo
	v_cvt_f32_i32_e32 v16, v16
	global_load_b64 v[17:18], v[17:18], off offset:-4
	s_clause 0x2
	s_load_b128 s[36:39], s[8:9], 0x30
	s_load_b256 s[24:31], s[8:9], 0x0
	s_load_b32 s22, s[8:9], 0x28
	s_waitcnt lgkmcnt(0)
	s_bitcmp0_b32 s38, 20
	s_cselect_b32 vcc_lo, -1, 0
	s_bitcmp0_b32 s36, 15
	v_cvt_f32_u32_e32 v20, s22
	s_cselect_b32 s0, -1, 0
	s_bfe_u32 s23, s26, 0xe000e
	s_add_i32 s19, s19, 1
	s_add_i32 s23, s23, 1
	v_cndmask_b32_e64 v20, 1.0, v20, s0
	v_cvt_f32_u32_e32 v19, s23
	s_cmp_eq_u32 s19, 8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v21, v20
	v_cndmask_b32_e64 v19, 1.0, v19, s0
	s_cselect_b32 s0, -1, 0
	s_and_not1_b32 s20, s20, exec_lo
	s_and_b32 s0, s0, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_or_b32 s20, s20, s0
	s_waitcnt vmcnt(0)
	v_dual_mul_f32 v18, s1, v18 :: v_dual_mul_f32 v17, s1, v17
	v_fma_f32 v18, -v18, s4, v14
	v_add_f32_e32 v16, 0x3fc00000, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f32 v16, -v17, s4, v16
	v_rcp_f32_e32 v17, v19
	v_mul_f32_e32 v19, v18, v19
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_floor_f32_e32 v19, v19
	s_waitcnt_depctr 0xfff
	v_dual_mul_f32 v20, v16, v20 :: v_dual_mul_f32 v17, v17, v19
	v_floor_f32_e32 v20, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v19, v21, v20
	v_dual_cndmask_b32 v17, v18, v17 :: v_dual_cndmask_b32 v16, v16, v19
	v_add_co_u32 v18, vcc_lo, v4, v9
	v_add_co_ci_u32_e32 v19, vcc_lo, v5, v10, vcc_lo
	image_sample_lz v[16:17], v[16:17], s[24:31], s[36:39] dmask:0x3 dim:SQ_RSRC_IMG_2D
	v_add_co_u32 v9, vcc_lo, v9, 8
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v10, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b64 v[18:19], v[16:17], off offset:-4
.LBB1_8:                                ; %Flow
                                        ;   in Loop: Header=BB1_6 Depth=4
	s_or_b32 exec_lo, exec_lo, s21
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, exec_lo, s20
	s_or_b32 s18, s0, s18
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s18
	s_cbranch_execnz .LBB1_6
; %bb.9:                                ; %.critedge
                                        ;   in Loop: Header=BB1_5 Depth=3
	s_or_b32 exec_lo, exec_lo, s18
	v_add_nc_u32_e32 v15, s10, v15
	v_add_nc_u32_e32 v8, s10, v8
	s_add_i32 s17, s17, s10
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lt_i32 s17, s6
	s_cbranch_scc1 .LBB1_5
.LBB1_10:                               ; %Flow125
                                        ;   in Loop: Header=BB1_3 Depth=2
	s_or_b32 exec_lo, exec_lo, s16
	v_add_co_u32 v4, vcc_lo, v4, s2
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v5, vcc_lo
	v_add_co_u32 v6, vcc_lo, v6, s3
	v_add_co_ci_u32_e32 v7, vcc_lo, s12, v7, vcc_lo
	s_add_i32 s15, s15, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s15, 8
	s_cbranch_scc0 .LBB1_3
; %bb.11:                               ;   in Loop: Header=BB1_2 Depth=1
	s_add_i32 s13, s13, s11
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mul_i32 s0, s13, s2
	s_mul_i32 s15, s13, s3
	s_ashr_i32 s16, s0, 31
	v_add_co_u32 v4, vcc_lo, v2, s0
	v_add_co_ci_u32_e32 v5, vcc_lo, s16, v3, vcc_lo
	s_ashr_i32 s0, s15, 31
	v_add_co_u32 v6, vcc_lo, v0, s15
	v_add_co_ci_u32_e32 v7, vcc_lo, s0, v1, vcc_lo
	s_cmp_ge_i32 s13, s5
	s_cbranch_scc0 .LBB1_2
.LBB1_12:                               ; %._crit_edge
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z18k_advection_2d_f32fffiiP15HIP_vector_typeIfLj2EEiP13__hip_textureS1_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 320
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 22
		.amdhsa_next_free_sgpr 40
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z18k_advection_2d_f32fffiiP15HIP_vector_typeIfLj2EEiP13__hip_textureS1_i, .Lfunc_end1-_Z18k_advection_2d_f32fffiiP15HIP_vector_typeIfLj2EEiP13__hip_textureS1_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 832
; NumSgprs: 42
; NumVgprs: 22
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 5
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 42
; NumVGPRsForWavesPerEU: 22
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .offset:         4
        .size:           4
        .value_kind:     by_value
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .offset:         12
        .size:           4
        .value_kind:     by_value
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         48
        .size:           8
        .value_kind:     global_buffer
      - .offset:         56
        .size:           4
        .value_kind:     by_value
      - .offset:         64
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         68
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         72
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         76
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         78
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         80
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         82
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         84
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         86
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         112
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         120
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         128
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 320
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z18k_advection_2D_f32fffiiP15HIP_vector_typeIfLj2EEiP13__hip_texturePfi
    .private_segment_fixed_size: 0
    .sgpr_count:     42
    .sgpr_spill_count: 0
    .symbol:         _Z18k_advection_2D_f32fffiiP15HIP_vector_typeIfLj2EEiP13__hip_texturePfi.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     23
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .offset:         4
        .size:           4
        .value_kind:     by_value
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .offset:         12
        .size:           4
        .value_kind:     by_value
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         48
        .size:           8
        .value_kind:     global_buffer
      - .offset:         56
        .size:           4
        .value_kind:     by_value
      - .offset:         64
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         68
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         72
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         76
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         78
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         80
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         82
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         84
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         86
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         112
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         120
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         128
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 320
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z18k_advection_2d_f32fffiiP15HIP_vector_typeIfLj2EEiP13__hip_textureS1_i
    .private_segment_fixed_size: 0
    .sgpr_count:     42
    .sgpr_spill_count: 0
    .symbol:         _Z18k_advection_2d_f32fffiiP15HIP_vector_typeIfLj2EEiP13__hip_textureS1_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     22
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
