#include <iostream>
#include <fstream>
#include <string>

void printProduct(const int *part2ResultsBasicStride);

using namespace std;

__global__ void part1DeviceCodeBasicStride(int *foo, int *bar, int N) {

    int index = threadIdx.x;
    int stride = blockDim.x;

    for (int i = index ; i < N; i+= stride) {
        for (int x = i; x > -1; x--) { // no more duplicate compares.
            if (foo[i] + foo[x] == 2020) {
                bar[0] = foo[i] * foo[x];
                return; // break
            }
        }
    }
}


__global__ void part2DeviceCodeBasicStride(int *foo, int *bar, int N) {

    int index = threadIdx.x;
    int stride = blockDim.x;

    for (int i = index ; i < N; i+= stride) {
        for (int x = i; x > -1; x--) { // no more duplicate compares.
            for (int y = x; y > -1; y--) { // no more duplicate compares.
                    if (foo[i] + foo[x] + foo[y] == 2020) {
                        bar[0] = foo[i] * foo[x] * foo[y];
                        return; // break
                    }
            }
        }
    }
}

int main() {
    int *input;
    int *part1ResultsBasicStride;
    int *part2ResultsBasicStride;

    // shared memory allocation for both device and host.
    cudaMallocManaged(&input, (sizeof(int))); // input data
    cudaMallocManaged(&part1ResultsBasicStride, (sizeof(int))); // pt1 (stride)
    cudaMallocManaged(&part2ResultsBasicStride, (sizeof(int))); // pt2 (stride)

    // READ FILE
    ifstream inputFile("../input.txt");
    string line;
    int N = 0;
    while (getline(inputFile, line)) {
        // Output the text from the inputFile
        input[N] = stoi(line);
        N++;
    }
    inputFile.close();


    // GPU COMPUTE STARTS HERE:
    part1DeviceCodeBasicStride<<<1, 512>>>(input, part1ResultsBasicStride, N);
    part2DeviceCodeBasicStride<<<1, 512>>>(input, part2ResultsBasicStride, N);

    // Wait for GPU work to finish.
    cudaDeviceSynchronize();

    // ANSWERS -->
    printf("Part 1\n");
    printProduct(part1ResultsBasicStride);

    printf("Part 2\n");
    printProduct(part2ResultsBasicStride);

    cudaFree(input);
    cudaFree(part1ResultsBasicStride);
    cudaFree(part2ResultsBasicStride);
    return 0;
}

void printProduct(const int *results) {
    printf("Product: %d\n\n", results[0]);
}

	.file	"tmpxft_002faa8f_00000000-6_main.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3771:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3771:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"Product: %d\n\n"
	.text
	.globl	_Z12printProductPKi
	.type	_Z12printProductPKi, @function
_Z12printProductPKi:
.LFB3768:
	.cfi_startproc
	endbr64
	movl	(%rdi), %edx
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	jmp	__printf_chk@PLT
	.cfi_endproc
.LFE3768:
	.size	_Z12printProductPKi, .-_Z12printProductPKi
	.globl	_Z49__device_stub__Z26part1DeviceCodeBasicStridePiS_iPiS_i
	.type	_Z49__device_stub__Z26part1DeviceCodeBasicStridePiS_iPiS_i, @function
_Z49__device_stub__Z26part1DeviceCodeBasicStridePiS_iPiS_i:
.LFB3793:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L3
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z26part1DeviceCodeBasicStridePiS_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L3:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L5
	call	__stack_chk_fail@PLT
.L5:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3793:
	.size	_Z49__device_stub__Z26part1DeviceCodeBasicStridePiS_iPiS_i, .-_Z49__device_stub__Z26part1DeviceCodeBasicStridePiS_iPiS_i
	.globl	_Z26part1DeviceCodeBasicStridePiS_i
	.type	_Z26part1DeviceCodeBasicStridePiS_i, @function
_Z26part1DeviceCodeBasicStridePiS_i:
.LFB3794:
	.cfi_startproc
	endbr64
	jmp	_Z49__device_stub__Z26part1DeviceCodeBasicStridePiS_iPiS_i
	.cfi_endproc
.LFE3794:
	.size	_Z26part1DeviceCodeBasicStridePiS_i, .-_Z26part1DeviceCodeBasicStridePiS_i
	.globl	_Z49__device_stub__Z26part2DeviceCodeBasicStridePiS_iPiS_i
	.type	_Z49__device_stub__Z26part2DeviceCodeBasicStridePiS_iPiS_i, @function
_Z49__device_stub__Z26part2DeviceCodeBasicStridePiS_iPiS_i:
.LFB3795:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L9
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z26part2DeviceCodeBasicStridePiS_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L9:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L11
	call	__stack_chk_fail@PLT
.L11:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3795:
	.size	_Z49__device_stub__Z26part2DeviceCodeBasicStridePiS_iPiS_i, .-_Z49__device_stub__Z26part2DeviceCodeBasicStridePiS_iPiS_i
	.globl	_Z26part2DeviceCodeBasicStridePiS_i
	.type	_Z26part2DeviceCodeBasicStridePiS_i, @function
_Z26part2DeviceCodeBasicStridePiS_i:
.LFB3796:
	.cfi_startproc
	endbr64
	jmp	_Z49__device_stub__Z26part2DeviceCodeBasicStridePiS_iPiS_i
	.cfi_endproc
.LFE3796:
	.size	_Z26part2DeviceCodeBasicStridePiS_i, .-_Z26part2DeviceCodeBasicStridePiS_i
	.section	.rodata.str1.1
.LC1:
	.string	"_Z26part2DeviceCodeBasicStridePiS_i"
.LC2:
	.string	"_Z26part1DeviceCodeBasicStridePiS_i"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3798:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC1(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z26part2DeviceCodeBasicStridePiS_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC2(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z26part1DeviceCodeBasicStridePiS_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3798:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.text._ZZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD2Ev,"axG",@progbits,_ZZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD5Ev,comdat
	.align 2
	.weak	_ZZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD2Ev
	.type	_ZZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD2Ev, @function
_ZZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD2Ev:
.LFB3877:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movq	%rdi, %rbx
	call	__errno_location@PLT
	cmpl	$0, (%rax)
	jne	.L16
	movl	(%rbx), %edx
	movl	%edx, (%rax)
.L16:
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3877:
	.size	_ZZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD2Ev, .-_ZZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD2Ev
	.weak	_ZZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD1Ev
	.set	_ZZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD1Ev,_ZZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD2Ev
	.section	.rodata.str1.1
.LC3:
	.string	"../input.txt"
.LC4:
	.string	"stoi"
.LC5:
	.string	"Part 1\n"
.LC6:
	.string	"Part 2\n"
	.section	.text.startup
	.globl	main
	.type	main, @function
main:
.LFB3766:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA3766
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	$1, %edx
	movl	$4, %esi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	xorl	%ebx, %ebx
	subq	$648, %rsp
	.cfi_def_cfa_offset 704
	movq	%fs:40, %rax
	movq	%rax, 632(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rdi
	leaq	112(%rsp), %rbp
.LEHB0:
	call	cudaMallocManaged@PLT
	leaq	32(%rsp), %rdi
	movl	$1, %edx
	movl	$4, %esi
	call	cudaMallocManaged@PLT
	leaq	40(%rsp), %rdi
	movl	$1, %edx
	movl	$4, %esi
	call	cudaMallocManaged@PLT
	movl	$8, %edx
	movq	%rbp, %rdi
	leaq	.LC3(%rip), %rsi
	call	_ZNSt14basic_ifstreamIcSt11char_traitsIcEEC1EPKcSt13_Ios_Openmode@PLT
.LEHE0:
	leaq	96(%rsp), %rax
	xorl	%edx, %edx
	movb	$0, 96(%rsp)
	movq	%rax, 80(%rsp)
	leaq	80(%rsp), %r12
	movq	%rdx, 88(%rsp)
.L20:
	movq	%r12, %rsi
	movq	%rbp, %rdi
.LEHB1:
	call	_ZSt7getlineIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EE@PLT
.LEHE1:
	movq	(%rax), %rdx
	movq	-24(%rdx), %rdx
	testb	$5, 32(%rax,%rdx)
	jne	.L43
	movq	24(%rsp), %rax
	movq	80(%rsp), %r13
	leaq	(%rax,%rbx,4), %r15
	call	__errno_location@PLT
	movq	%r13, %rdi
	leaq	64(%rsp), %rsi
	movl	$10, %edx
	movq	%rax, %r14
	movl	(%rax), %eax
	movl	%eax, 52(%rsp)
	xorl	%eax, %eax
	movl	%eax, (%r14)
	call	__isoc23_strtol@PLT
	cmpq	64(%rsp), %r13
	leaq	52(%rsp), %r13
	jne	.L21
	movq	632(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L40
	leaq	.LC4(%rip), %rdi
.LEHB2:
	call	_ZSt24__throw_invalid_argumentPKc@PLT
.L21:
	cmpl	$34, (%r14)
	je	.L23
	movl	$2147483648, %edx
	movl	$4294967295, %ecx
	incq	%rbx
	addq	%rax, %rdx
	cmpq	%rdx, %rcx
	jnb	.L24
.L23:
	movq	632(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L40
	leaq	.LC4(%rip), %rdi
	call	_ZSt20__throw_out_of_rangePKc@PLT
.LEHE2:
.L24:
	movq	%r13, %rdi
	movq	%rax, 8(%rsp)
	call	_ZZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD1Ev
	movq	8(%rsp), %rax
	movl	%eax, (%r15)
	jmp	.L20
.L38:
	endbr64
	movq	%rax, %rbx
.L26:
	movq	%r13, %rdi
	call	_ZZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD1Ev
	jmp	.L27
.L43:
	movq	%rbp, %rdi
.LEHB3:
	call	_ZNSt14basic_ifstreamIcSt11char_traitsIcEE5closeEv@PLT
	movl	$8388609, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	salq	$9, %rdx
	movl	$1, %esi
	movabsq	$4294967297, %rdi
	movl	$1, 72(%rsp)
	movq	%rdx, 64(%rsp)
	movq	%rdi, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	je	.L29
.L31:
	movl	$8388609, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	salq	$9, %rdx
	movl	$1, %esi
	movabsq	$4294967297, %rdi
	movl	$1, 72(%rsp)
	movq	%rdx, 64(%rsp)
	movq	%rdi, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	je	.L32
	jmp	.L34
.L29:
	movq	32(%rsp), %rsi
	movq	24(%rsp), %rdi
	movl	%ebx, %edx
	call	_Z49__device_stub__Z26part1DeviceCodeBasicStridePiS_iPiS_i
	jmp	.L31
.L32:
	movq	40(%rsp), %rsi
	movq	24(%rsp), %rdi
	movl	%ebx, %edx
	call	_Z49__device_stub__Z26part2DeviceCodeBasicStridePiS_iPiS_i
.L34:
	call	cudaDeviceSynchronize@PLT
	leaq	.LC5(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	32(%rsp), %rdi
	call	_Z12printProductPKi
	leaq	.LC6(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	40(%rsp), %rdi
	call	_Z12printProductPKi
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
.LEHE3:
	movq	%r12, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	movq	%rbp, %rdi
	call	_ZNSt14basic_ifstreamIcSt11char_traitsIcEED1Ev@PLT
	movq	632(%rsp), %rax
	subq	%fs:40, %rax
	je	.L36
	jmp	.L40
.L37:
	endbr64
	movq	%rax, %rbx
.L27:
	movq	%r12, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	movq	%rbp, %rdi
	call	_ZNSt14basic_ifstreamIcSt11char_traitsIcEED1Ev@PLT
	movq	632(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L40
	movq	%rbx, %rdi
.LEHB4:
	call	_Unwind_Resume@PLT
.LEHE4:
.L40:
	call	__stack_chk_fail@PLT
.L36:
	addq	$648, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3766:
	.globl	__gxx_personality_v0
	.section	.gcc_except_table,"a",@progbits
.LLSDA3766:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE3766-.LLSDACSB3766
.LLSDACSB3766:
	.uleb128 .LEHB0-.LFB3766
	.uleb128 .LEHE0-.LEHB0
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB1-.LFB3766
	.uleb128 .LEHE1-.LEHB1
	.uleb128 .L37-.LFB3766
	.uleb128 0
	.uleb128 .LEHB2-.LFB3766
	.uleb128 .LEHE2-.LEHB2
	.uleb128 .L38-.LFB3766
	.uleb128 0
	.uleb128 .LEHB3-.LFB3766
	.uleb128 .LEHE3-.LEHB3
	.uleb128 .L37-.LFB3766
	.uleb128 0
	.uleb128 .LEHB4-.LFB3766
	.uleb128 .LEHE4-.LEHB4
	.uleb128 0
	.uleb128 0
.LLSDACSE3766:
	.section	.text.startup
	.size	main, .-main
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.hidden	DW.ref.__gxx_personality_v0
	.weak	DW.ref.__gxx_personality_v0
	.section	.data.rel.local.DW.ref.__gxx_personality_v0,"awG",@progbits,DW.ref.__gxx_personality_v0,comdat
	.align 8
	.type	DW.ref.__gxx_personality_v0, @object
	.size	DW.ref.__gxx_personality_v0, 8
DW.ref.__gxx_personality_v0:
	.quad	__gxx_personality_v0
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <iostream>
#include <fstream>
#include <string>

void printProduct(const int *part2ResultsBasicStride);

using namespace std;

__global__ void part1DeviceCodeBasicStride(int *foo, int *bar, int N) {

    int index = threadIdx.x;
    int stride = blockDim.x;

    for (int i = index ; i < N; i+= stride) {
        for (int x = i; x > -1; x--) { // no more duplicate compares.
            if (foo[i] + foo[x] == 2020) {
                bar[0] = foo[i] * foo[x];
                return; // break
            }
        }
    }
}


__global__ void part2DeviceCodeBasicStride(int *foo, int *bar, int N) {

    int index = threadIdx.x;
    int stride = blockDim.x;

    for (int i = index ; i < N; i+= stride) {
        for (int x = i; x > -1; x--) { // no more duplicate compares.
            for (int y = x; y > -1; y--) { // no more duplicate compares.
                    if (foo[i] + foo[x] + foo[y] == 2020) {
                        bar[0] = foo[i] * foo[x] * foo[y];
                        return; // break
                    }
            }
        }
    }
}

int main() {
    int *input;
    int *part1ResultsBasicStride;
    int *part2ResultsBasicStride;

    // shared memory allocation for both device and host.
    hipMallocManaged(&input, (sizeof(int))); // input data
    hipMallocManaged(&part1ResultsBasicStride, (sizeof(int))); // pt1 (stride)
    hipMallocManaged(&part2ResultsBasicStride, (sizeof(int))); // pt2 (stride)

    // READ FILE
    ifstream inputFile("../input.txt");
    string line;
    int N = 0;
    while (getline(inputFile, line)) {
        // Output the text from the inputFile
        input[N] = stoi(line);
        N++;
    }
    inputFile.close();


    // GPU COMPUTE STARTS HERE:
    part1DeviceCodeBasicStride<<<1, 512>>>(input, part1ResultsBasicStride, N);
    part2DeviceCodeBasicStride<<<1, 512>>>(input, part2ResultsBasicStride, N);

    // Wait for GPU work to finish.
    hipDeviceSynchronize();

    // ANSWERS -->
    printf("Part 1\n");
    printProduct(part1ResultsBasicStride);

    printf("Part 2\n");
    printProduct(part2ResultsBasicStride);

    hipFree(input);
    hipFree(part1ResultsBasicStride);
    hipFree(part2ResultsBasicStride);
    return 0;
}

void printProduct(const int *results) {
    printf("Product: %d\n\n", results[0]);
}

	.text
	.file	"main.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z41__device_stub__part1DeviceCodeBasicStridePiS_i # -- Begin function _Z41__device_stub__part1DeviceCodeBasicStridePiS_i
	.type	_Z41__device_stub__part1DeviceCodeBasicStridePiS_i,@function
_Z41__device_stub__part1DeviceCodeBasicStridePiS_i: # @_Z41__device_stub__part1DeviceCodeBasicStridePiS_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z26part1DeviceCodeBasicStridePiS_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z41__device_stub__part1DeviceCodeBasicStridePiS_i, .Lfunc_end0-_Z41__device_stub__part1DeviceCodeBasicStridePiS_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z41__device_stub__part2DeviceCodeBasicStridePiS_i # -- Begin function _Z41__device_stub__part2DeviceCodeBasicStridePiS_i
	.type	_Z41__device_stub__part2DeviceCodeBasicStridePiS_i,@function
_Z41__device_stub__part2DeviceCodeBasicStridePiS_i: # @_Z41__device_stub__part2DeviceCodeBasicStridePiS_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z26part2DeviceCodeBasicStridePiS_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z41__device_stub__part2DeviceCodeBasicStridePiS_i, .Lfunc_end1-_Z41__device_stub__part2DeviceCodeBasicStridePiS_i
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
.Lfunc_begin0:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception0
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$584, %rsp                      # imm = 0x248
	.cfi_def_cfa_offset 640
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsp, %rdi
	movl	$4, %esi
	movl	$1, %edx
	callq	hipMallocManaged
	leaq	16(%rsp), %rdi
	movl	$4, %esi
	movl	$1, %edx
	callq	hipMallocManaged
	leaq	8(%rsp), %rdi
	movl	$4, %esi
	movl	$1, %edx
	callq	hipMallocManaged
	leaq	64(%rsp), %r14
	movl	$.L.str, %esi
	movq	%r14, %rdi
	movl	$8, %edx
	callq	_ZNSt14basic_ifstreamIcSt11char_traitsIcEEC1EPKcSt13_Ios_Openmode
	leaq	40(%rsp), %rax
	movq	%rax, -16(%rax)
	movq	$0, -8(%rax)
	movb	$0, (%rax)
	xorl	%ebx, %ebx
	leaq	24(%rsp), %r15
.LBB2_1:                                # =>This Inner Loop Header: Depth=1
	movq	64(%rsp), %rax
	movq	-24(%rax), %rdi
	addq	%r14, %rdi
.Ltmp0:
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp1:
# %bb.2:                                # %.noexc
                                        #   in Loop: Header=BB2_1 Depth=1
.Ltmp2:
	movsbl	%al, %edx
	movq	%r14, %rdi
	movq	%r15, %rsi
	callq	_ZSt7getlineIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EES4_
.Ltmp3:
# %bb.3:                                #   in Loop: Header=BB2_1 Depth=1
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	testb	$5, 32(%rax,%rcx)
	jne	.LBB2_22
# %bb.4:                                #   in Loop: Header=BB2_1 Depth=1
	movq	24(%rsp), %rbp
	callq	__errno_location
	movq	%rax, %r13
	movl	(%rax), %r12d
	movl	$0, (%rax)
	movq	%rbp, %rdi
	leaq	56(%rsp), %rsi
	movl	$10, %edx
	callq	__isoc23_strtol
	cmpq	%rbp, 56(%rsp)
	je	.LBB2_5
# %bb.9:                                #   in Loop: Header=BB2_1 Depth=1
	movslq	%eax, %rcx
	cmpq	%rax, %rcx
	jne	.LBB2_11
# %bb.10:                               #   in Loop: Header=BB2_1 Depth=1
	movl	(%r13), %ecx
	cmpl	$34, %ecx
	je	.LBB2_11
# %bb.13:                               #   in Loop: Header=BB2_1 Depth=1
	testl	%ecx, %ecx
	jne	.LBB2_15
# %bb.14:                               #   in Loop: Header=BB2_1 Depth=1
	movl	%r12d, (%r13)
.LBB2_15:                               #   in Loop: Header=BB2_1 Depth=1
	movq	(%rsp), %rcx
	movl	%eax, (%rcx,%rbx,4)
	incq	%rbx
	jmp	.LBB2_1
.LBB2_22:
.Ltmp5:
	leaq	64(%rsp), %rdi
	callq	_ZNSt14basic_ifstreamIcSt11char_traitsIcEE5closeEv
.Ltmp6:
# %bb.23:
.Ltmp7:
	movabsq	$4294967297, %rdi               # imm = 0x100000001
	movabsq	$4294967808, %rdx               # imm = 0x100000200
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
.Ltmp8:
# %bb.24:
	testl	%eax, %eax
	jne	.LBB2_26
# %bb.25:
	movq	(%rsp), %rdi
	movq	16(%rsp), %rsi
.Ltmp9:
	movl	%ebx, %edx
	callq	_Z41__device_stub__part1DeviceCodeBasicStridePiS_i
.Ltmp10:
.LBB2_26:
.Ltmp11:
	movabsq	$4294967297, %rdi               # imm = 0x100000001
	movabsq	$4294967808, %rdx               # imm = 0x100000200
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
.Ltmp12:
# %bb.27:
	testl	%eax, %eax
	jne	.LBB2_29
# %bb.28:
	movq	(%rsp), %rdi
	movq	8(%rsp), %rsi
.Ltmp13:
	movl	%ebx, %edx
	callq	_Z41__device_stub__part2DeviceCodeBasicStridePiS_i
.Ltmp14:
.LBB2_29:
.Ltmp15:
	callq	hipDeviceSynchronize
.Ltmp16:
# %bb.30:
	movl	$.Lstr, %edi
	callq	puts@PLT
	movq	16(%rsp), %rax
	movl	(%rax), %esi
	movl	$.L.str.3, %edi
	xorl	%eax, %eax
	callq	printf
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	movq	8(%rsp), %rax
	movl	(%rax), %esi
	movl	$.L.str.3, %edi
	xorl	%eax, %eax
	callq	printf
	movq	(%rsp), %rdi
.Ltmp17:
	callq	hipFree
.Ltmp18:
# %bb.31:
	movq	16(%rsp), %rdi
.Ltmp19:
	callq	hipFree
.Ltmp20:
# %bb.32:
	movq	8(%rsp), %rdi
.Ltmp21:
	callq	hipFree
.Ltmp22:
# %bb.33:
	movq	24(%rsp), %rdi
	leaq	40(%rsp), %rax
	cmpq	%rax, %rdi
	je	.LBB2_35
# %bb.34:                               # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i15
	callq	_ZdlPv
.LBB2_35:                               # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit17
	leaq	64(%rsp), %rdi
	callq	_ZNSt14basic_ifstreamIcSt11char_traitsIcEED1Ev
	xorl	%eax, %eax
	addq	$584, %rsp                      # imm = 0x248
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB2_5:
	.cfi_def_cfa_offset 640
.Ltmp26:
	movl	$.L.str.4, %edi
	callq	_ZSt24__throw_invalid_argumentPKc
.Ltmp27:
# %bb.6:
.LBB2_11:                               # %.critedge.i.i
.Ltmp24:
	movl	$.L.str.4, %edi
	callq	_ZSt20__throw_out_of_rangePKc
.Ltmp25:
# %bb.12:
.LBB2_17:                               # %.loopexit.split-lp
.Ltmp23:
	jmp	.LBB2_18
.LBB2_7:
.Ltmp28:
	movq	%rax, %rbx
	cmpl	$0, (%r13)
	jne	.LBB2_19
# %bb.8:
	movl	%r12d, (%r13)
	jmp	.LBB2_19
.LBB2_16:                               # %.loopexit
.Ltmp4:
.LBB2_18:                               # %.body
	movq	%rax, %rbx
.LBB2_19:                               # %.body
	leaq	40(%rsp), %rax
	movq	24(%rsp), %rdi
	cmpq	%rax, %rdi
	je	.LBB2_21
# %bb.20:                               # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i
	callq	_ZdlPv
.LBB2_21:                               # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit
	leaq	64(%rsp), %rdi
	callq	_ZNSt14basic_ifstreamIcSt11char_traitsIcEED1Ev
	movq	%rbx, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
	.section	.gcc_except_table,"a",@progbits
	.p2align	2, 0x0
GCC_except_table2:
.Lexception0:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end0-.Lcst_begin0
.Lcst_begin0:
	.uleb128 .Lfunc_begin0-.Lfunc_begin0    # >> Call Site 1 <<
	.uleb128 .Ltmp0-.Lfunc_begin0           #   Call between .Lfunc_begin0 and .Ltmp0
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp0-.Lfunc_begin0           # >> Call Site 2 <<
	.uleb128 .Ltmp3-.Ltmp0                  #   Call between .Ltmp0 and .Ltmp3
	.uleb128 .Ltmp4-.Lfunc_begin0           #     jumps to .Ltmp4
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp5-.Lfunc_begin0           # >> Call Site 3 <<
	.uleb128 .Ltmp22-.Ltmp5                 #   Call between .Ltmp5 and .Ltmp22
	.uleb128 .Ltmp23-.Lfunc_begin0          #     jumps to .Ltmp23
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp26-.Lfunc_begin0          # >> Call Site 4 <<
	.uleb128 .Ltmp25-.Ltmp26                #   Call between .Ltmp26 and .Ltmp25
	.uleb128 .Ltmp28-.Lfunc_begin0          #     jumps to .Ltmp28
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp25-.Lfunc_begin0          # >> Call Site 5 <<
	.uleb128 .Lfunc_end2-.Ltmp25            #   Call between .Ltmp25 and .Lfunc_end2
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end0:
	.p2align	2, 0x0
                                        # -- End function
	.text
	.globl	_Z12printProductPKi             # -- Begin function _Z12printProductPKi
	.type	_Z12printProductPKi,@function
_Z12printProductPKi:                    # @_Z12printProductPKi
	.cfi_startproc
# %bb.0:
	movl	(%rdi), %esi
	movl	$.L.str.3, %edi
	xorl	%eax, %eax
	jmp	printf                          # TAILCALL
.Lfunc_end3:
	.size	_Z12printProductPKi, .Lfunc_end3-_Z12printProductPKi
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB4_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB4_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z26part1DeviceCodeBasicStridePiS_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z26part2DeviceCodeBasicStridePiS_i, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end4:
	.size	__hip_module_ctor, .Lfunc_end4-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB5_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB5_2:
	retq
.Lfunc_end5:
	.size	__hip_module_dtor, .Lfunc_end5-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z26part1DeviceCodeBasicStridePiS_i,@object # @_Z26part1DeviceCodeBasicStridePiS_i
	.section	.rodata,"a",@progbits
	.globl	_Z26part1DeviceCodeBasicStridePiS_i
	.p2align	3, 0x0
_Z26part1DeviceCodeBasicStridePiS_i:
	.quad	_Z41__device_stub__part1DeviceCodeBasicStridePiS_i
	.size	_Z26part1DeviceCodeBasicStridePiS_i, 8

	.type	_Z26part2DeviceCodeBasicStridePiS_i,@object # @_Z26part2DeviceCodeBasicStridePiS_i
	.globl	_Z26part2DeviceCodeBasicStridePiS_i
	.p2align	3, 0x0
_Z26part2DeviceCodeBasicStridePiS_i:
	.quad	_Z41__device_stub__part2DeviceCodeBasicStridePiS_i
	.size	_Z26part2DeviceCodeBasicStridePiS_i, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"../input.txt"
	.size	.L.str, 13

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"Product: %d\n\n"
	.size	.L.str.3, 14

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"stoi"
	.size	.L.str.4, 5

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z26part1DeviceCodeBasicStridePiS_i"
	.size	.L__unnamed_1, 36

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z26part2DeviceCodeBasicStridePiS_i"
	.size	.L__unnamed_2, 36

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"Part 1"
	.size	.Lstr, 7

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"Part 2"
	.size	.Lstr.1, 7

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z41__device_stub__part1DeviceCodeBasicStridePiS_i
	.addrsig_sym _Z41__device_stub__part2DeviceCodeBasicStridePiS_i
	.addrsig_sym __gxx_personality_v0
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Unwind_Resume
	.addrsig_sym _Z26part1DeviceCodeBasicStridePiS_i
	.addrsig_sym _Z26part2DeviceCodeBasicStridePiS_i
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z26part1DeviceCodeBasicStridePiS_i ; -- Begin function _Z26part1DeviceCodeBasicStridePiS_i
	.globl	_Z26part1DeviceCodeBasicStridePiS_i
	.p2align	8
	.type	_Z26part1DeviceCodeBasicStridePiS_i,@function
_Z26part1DeviceCodeBasicStridePiS_i:    ; @_Z26part1DeviceCodeBasicStridePiS_i
; %bb.0:
	s_load_b32 s4, s[0:1], 0x10
	s_mov_b32 s2, exec_lo
	s_waitcnt lgkmcnt(0)
	v_cmpx_gt_i32_e64 s4, v0
	s_cbranch_execz .LBB0_11
; %bb.1:                                ; %.preheader.preheader
	s_clause 0x1
	s_load_b32 s5, s[0:1], 0x24
	s_load_b128 s[0:3], s[0:1], 0x0
	v_mov_b32_e32 v2, 0
                                        ; implicit-def: $sgpr7
                                        ; implicit-def: $sgpr8
	s_waitcnt lgkmcnt(0)
	s_and_b32 s6, s5, 0xffff
	s_mov_b32 s5, 0
.LBB0_2:                                ; %.preheader
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_3 Depth 2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mov_b32_e32 v1, v2
	s_mov_b32 s10, 0
                                        ; implicit-def: $sgpr9
                                        ; implicit-def: $sgpr12
                                        ; implicit-def: $sgpr11
	v_lshlrev_b64 v[3:4], 2, v[0:1]
	v_mov_b32_e32 v1, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v3, vcc_lo, s0, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
	global_load_b32 v3, v[3:4], off
.LBB0_3:                                ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_lshlrev_b64 v[4:5], 2, v[1:2]
	s_or_b32 s11, s11, exec_lo
	s_or_b32 s12, s12, exec_lo
	s_mov_b32 s13, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, s0, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v5, vcc_lo
	global_load_b32 v4, v[4:5], off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v5, v4, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_ne_u32_e32 0x7e4, v5
; %bb.4:                                ;   in Loop: Header=BB0_3 Depth=2
	v_add_nc_u32_e32 v5, -1, v1
	v_cmp_gt_i32_e32 vcc_lo, 1, v1
	s_and_not1_b32 s12, s12, exec_lo
	s_and_not1_b32 s11, s11, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_mov_b32_e32 v1, v5
	s_and_b32 s14, vcc_lo, exec_lo
	s_or_b32 s12, s12, s14
; %bb.5:                                ; %Flow54
                                        ;   in Loop: Header=BB0_3 Depth=2
	s_or_b32 exec_lo, exec_lo, s13
	s_xor_b32 s13, s11, -1
	s_and_b32 s14, exec_lo, s12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_or_b32 s10, s14, s10
	s_and_not1_b32 s9, s9, exec_lo
	s_and_b32 s13, s13, exec_lo
	s_or_b32 s9, s9, s13
	s_and_not1_b32 exec_lo, exec_lo, s10
	s_cbranch_execnz .LBB0_3
; %bb.6:                                ; %loop.exit.guard52
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s10
	s_mov_b32 s10, -1
	s_or_b32 s8, s8, exec_lo
	s_and_saveexec_b32 s11, s9
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s9, exec_lo, s11
; %bb.7:                                ; %.critedge
                                        ;   in Loop: Header=BB0_2 Depth=1
	v_add_nc_u32_e32 v0, s6, v0
	s_and_not1_b32 s8, s8, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_le_i32_e32 vcc_lo, s4, v0
	s_or_not1_b32 s10, vcc_lo, exec_lo
; %bb.8:                                ; %Flow56
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s9
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s9, exec_lo, s10
	s_or_b32 s5, s9, s5
	s_and_not1_b32 s7, s7, exec_lo
	s_and_b32 s9, s8, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s7, s7, s9
	s_and_not1_b32 exec_lo, exec_lo, s5
	s_cbranch_execnz .LBB0_2
; %bb.9:                                ; %loop.exit.guard
	s_or_b32 exec_lo, exec_lo, s5
	s_and_saveexec_b32 s0, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s0, exec_lo, s0
	s_cbranch_execz .LBB0_11
; %bb.10:
	v_mul_lo_u32 v0, v4, v3
	v_mov_b32_e32 v1, 0
	global_store_b32 v1, v0, s[2:3]
.LBB0_11:                               ; %.loopexit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z26part1DeviceCodeBasicStridePiS_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 15
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z26part1DeviceCodeBasicStridePiS_i, .Lfunc_end0-_Z26part1DeviceCodeBasicStridePiS_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 388
; NumSgprs: 17
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 17
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z26part2DeviceCodeBasicStridePiS_i ; -- Begin function _Z26part2DeviceCodeBasicStridePiS_i
	.globl	_Z26part2DeviceCodeBasicStridePiS_i
	.p2align	8
	.type	_Z26part2DeviceCodeBasicStridePiS_i,@function
_Z26part2DeviceCodeBasicStridePiS_i:    ; @_Z26part2DeviceCodeBasicStridePiS_i
; %bb.0:
	s_load_b32 s4, s[0:1], 0x10
	s_mov_b32 s2, exec_lo
	s_waitcnt lgkmcnt(0)
	v_cmpx_gt_i32_e64 s4, v0
	s_cbranch_execz .LBB1_15
; %bb.1:                                ; %.preheader35.preheader
	s_clause 0x1
	s_load_b32 s5, s[0:1], 0x24
	s_load_b128 s[0:3], s[0:1], 0x0
	v_mov_b32_e32 v2, 0
                                        ; implicit-def: $sgpr7
                                        ; implicit-def: $sgpr8
	s_waitcnt lgkmcnt(0)
	s_and_b32 s6, s5, 0xffff
	s_mov_b32 s5, 0
.LBB1_2:                                ; %.preheader35
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB1_3 Depth 2
                                        ;       Child Loop BB1_4 Depth 3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mov_b32_e32 v1, v2
	s_mov_b32 s10, 0
                                        ; implicit-def: $sgpr9
                                        ; implicit-def: $sgpr11
	v_lshlrev_b64 v[3:4], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, s0, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
	global_load_b32 v5, v[3:4], off
	v_mov_b32_e32 v3, v0
.LBB1_3:                                ; %.preheader
                                        ;   Parent Loop BB1_2 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB1_4 Depth 3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v4, v2 :: v_dual_mov_b32 v1, v3
	s_mov_b32 s13, 0
                                        ; implicit-def: $sgpr12
                                        ; implicit-def: $sgpr15
                                        ; implicit-def: $sgpr14
	v_lshlrev_b64 v[6:7], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, s0, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v7, vcc_lo
	global_load_b32 v4, v[6:7], off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v7, v4, v5
.LBB1_4:                                ;   Parent Loop BB1_2 Depth=1
                                        ;     Parent Loop BB1_3 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	v_lshlrev_b64 v[8:9], 2, v[1:2]
	s_or_b32 s14, s14, exec_lo
	s_or_b32 s15, s15, exec_lo
	s_mov_b32 s16, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, s0, v8
	v_add_co_ci_u32_e32 v9, vcc_lo, s1, v9, vcc_lo
	global_load_b32 v6, v[8:9], off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v8, v7, v6
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_ne_u32_e32 0x7e4, v8
; %bb.5:                                ;   in Loop: Header=BB1_4 Depth=3
	v_add_nc_u32_e32 v8, -1, v1
	v_cmp_gt_i32_e32 vcc_lo, 1, v1
	s_and_not1_b32 s15, s15, exec_lo
	s_and_not1_b32 s14, s14, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_mov_b32_e32 v1, v8
	s_and_b32 s17, vcc_lo, exec_lo
	s_or_b32 s15, s15, s17
; %bb.6:                                ; %Flow86
                                        ;   in Loop: Header=BB1_4 Depth=3
	s_or_b32 exec_lo, exec_lo, s16
	s_xor_b32 s16, s14, -1
	s_and_b32 s17, exec_lo, s15
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_or_b32 s13, s17, s13
	s_and_not1_b32 s12, s12, exec_lo
	s_and_b32 s16, s16, exec_lo
	s_or_b32 s12, s12, s16
	s_and_not1_b32 exec_lo, exec_lo, s13
	s_cbranch_execnz .LBB1_4
; %bb.7:                                ; %loop.exit.guard84
                                        ;   in Loop: Header=BB1_3 Depth=2
	s_or_b32 exec_lo, exec_lo, s13
	s_mov_b32 s13, -1
	s_mov_b32 s14, -1
	s_and_saveexec_b32 s15, s12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s12, exec_lo, s15
; %bb.8:                                ; %.critedge
                                        ;   in Loop: Header=BB1_3 Depth=2
	v_add_nc_u32_e32 v1, -1, v3
	v_cmp_gt_i32_e32 vcc_lo, 1, v3
	s_xor_b32 s14, exec_lo, -1
	s_delay_alu instid0(VALU_DEP_2)
	v_mov_b32_e32 v3, v1
	s_or_not1_b32 s13, vcc_lo, exec_lo
; %bb.9:                                ; %Flow87
                                        ;   in Loop: Header=BB1_3 Depth=2
	s_or_b32 exec_lo, exec_lo, s12
	s_xor_b32 s12, s14, -1
	s_and_b32 s14, exec_lo, s13
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s10, s14, s10
	s_and_not1_b32 s11, s11, exec_lo
	s_and_b32 s13, s13, exec_lo
	s_and_not1_b32 s9, s9, exec_lo
	s_and_b32 s12, s12, exec_lo
	s_or_b32 s11, s11, s13
	s_or_b32 s9, s9, s12
	s_and_not1_b32 exec_lo, exec_lo, s10
	s_cbranch_execnz .LBB1_3
; %bb.10:                               ; %loop.exit.guard81
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s10
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
	s_and_not1_b32 s8, s8, exec_lo
	s_and_b32 s11, s11, exec_lo
	s_mov_b32 s10, -1
	s_or_b32 s8, s8, s11
	s_and_saveexec_b32 s11, s9
	s_xor_b32 s9, exec_lo, s11
; %bb.11:                               ; %.critedge34
                                        ;   in Loop: Header=BB1_2 Depth=1
	v_add_nc_u32_e32 v0, s6, v0
	s_and_not1_b32 s8, s8, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_le_i32_e32 vcc_lo, s4, v0
	s_or_not1_b32 s10, vcc_lo, exec_lo
; %bb.12:                               ; %Flow90
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s9
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s9, exec_lo, s10
	s_or_b32 s5, s9, s5
	s_and_not1_b32 s7, s7, exec_lo
	s_and_b32 s9, s8, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s7, s7, s9
	s_and_not1_b32 exec_lo, exec_lo, s5
	s_cbranch_execnz .LBB1_2
; %bb.13:                               ; %loop.exit.guard
	s_or_b32 exec_lo, exec_lo, s5
	s_and_saveexec_b32 s0, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s0, exec_lo, s0
	s_cbranch_execz .LBB1_15
; %bb.14:                               ; %._crit_edge41
	v_mul_lo_u32 v0, v4, v5
	v_mov_b32_e32 v1, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_mul_lo_u32 v0, v0, v6
	global_store_b32 v1, v0, s[2:3]
.LBB1_15:                               ; %._crit_edge
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z26part2DeviceCodeBasicStridePiS_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 18
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z26part2DeviceCodeBasicStridePiS_i, .Lfunc_end1-_Z26part2DeviceCodeBasicStridePiS_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 564
; NumSgprs: 20
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 20
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z26part1DeviceCodeBasicStridePiS_i
    .private_segment_fixed_size: 0
    .sgpr_count:     17
    .sgpr_spill_count: 0
    .symbol:         _Z26part1DeviceCodeBasicStridePiS_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     6
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z26part2DeviceCodeBasicStridePiS_i
    .private_segment_fixed_size: 0
    .sgpr_count:     20
    .sgpr_spill_count: 0
    .symbol:         _Z26part2DeviceCodeBasicStridePiS_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     10
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
