#include <stdio.h>
#include <stdlib.h>
#include <limits.h>
#include <time.h>
#include <assert.h>

__device__ int minDistance(int dist[], int sptSet[], int V)
{
	// Initialize min value
	int min = INT_MAX, min_index;
	for (int v = 0; v < V; v++)
		if (sptSet[v] == 0 && dist[v] <= min)
			min = dist[v], min_index = v;

	return min_index;
}
__global__ void dijkstra(int *graph, int V,int* ansArray)
{
	int nodes = blockDim.x * blockIdx.x + threadIdx.x;
	if(nodes<V)
	{	int dist[3000]; // The output array. dist[i] will hold the shortest
		// distance from src to i

		int sptSet[3000]; // sptSet[i] will be true if vertex i is included in shortest
		// path tree or shortest distance from src to i is finalized

		// Initialize all distances as INFINITE and stpSet[] as false
		for (int i = 0; i < V; i++)
			dist[i] = INT_MAX, sptSet[i] = 0;

		// Distance of source vertex from itself is always 0
		dist[nodes] = 0;

		// Find shortest path for all vertices
		for (int count = 0; count < V - 1; count++)
		{
			// Pick the minimum distance vertex from the set of vertices not
			// yet processed. u is always equal to src in the first iteration.

			int u = minDistance(dist, sptSet, V);

			// Mark the picked vertex as processed
			sptSet[u] = 1;

			// Update dist value of the adjacent vertices of the picked vertex.
			for (int v = 0; v < V; v++)

				// Update dist[v] only if is not in sptSet, there is an edge from
				// u to v, and total weight of path from src to v through u is
				// smaller than current value of dist[v]
				if (!sptSet[v] && graph[u*V+v] && dist[u] != INT_MAX && dist[u] + graph[u*V+v] < dist[v])
					dist[v] = dist[u] + graph[u*V+v];
		}
		for (int i = 0; i < V; i++)
		{
			ansArray[nodes*V+i] = dist[i];
		}
	}
}
__host__ int* initGraf(int n)
{
	srand(13517143);
	int random;
	int *graf=(int *)malloc(n*n* sizeof(int ));
	for (int i = 0; i < n; i++)
	{
		for (int j = i; j < n; j++)
		{
			random = rand() % 100;
			if (i == j)
			{
				graf[i*n + j] = 0;
			}
			else
			{
				graf[i*n + j] = random;
				graf[j*n + i] = random;
			}
		}
	}
	return graf;
}

int main(int argc, char *argv[])
{
	int thread_count = strtol(argv[1], NULL, 10);
	int node_count = strtol(argv[2],NULL,10);
	int *graf,*answerMatrix,*deviceGraf,*deviceResult;
	graf= initGraf(node_count);
	cudaEvent_t start, stop;
	cudaEventCreate(&start);
	cudaEventCreate(&stop);
	answerMatrix= (int *)malloc(node_count *node_count* sizeof(int));
	cudaMalloc(&deviceGraf,node_count*node_count*sizeof(int));
	cudaMalloc(&deviceResult,node_count*node_count*sizeof(int));
	cudaMemcpy(deviceGraf, graf, node_count*node_count*sizeof(int), cudaMemcpyHostToDevice);
	cudaEventRecord(start);

	dijkstra<<<(node_count/thread_count)+1,thread_count>>>(deviceGraf,node_count,deviceResult);
	cudaEventRecord(stop);


	cudaMemcpy(answerMatrix, deviceResult, node_count*node_count*sizeof(int), cudaMemcpyDeviceToHost);
	cudaEventSynchronize(stop);
	float milliseconds = 0;
	cudaEventElapsedTime(&milliseconds, start, stop);
	printf("Time elapsed = %f microseconds\n",milliseconds*100);
	printf("Answer Graf\n");

	for (int i = 0; i < node_count; i++) {
		for (int j = 0; j < node_count; j++) 
		  printf("%d\t", answerMatrix[i*node_count + j]);
		printf("\n");
	  }
	
	cudaFree(deviceResult);
	cudaFree(deviceGraf);


	
}

	.file	"tmpxft_002e94ae_00000000-6_dijkstra.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2032:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2032:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z11minDistancePiS_i
	.type	_Z11minDistancePiS_i, @function
_Z11minDistancePiS_i:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2027:
	.size	_Z11minDistancePiS_i, .-_Z11minDistancePiS_i
	.globl	_Z8initGrafi
	.type	_Z8initGrafi, @function
_Z8initGrafi:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	xorl	%r15d, %r15d
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	xorl	%r13d, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%edi, %ebx
	movl	$13517143, %edi
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	call	srand@PLT
	movl	%ebx, %edi
	imull	%ebx, %edi
	movslq	%edi, %rdi
	salq	$2, %rdi
	call	malloc@PLT
	leal	1(%rbx), %r8d
	xorl	%esi, %esi
	movq	%rax, %r12
.L5:
	movl	%r13d, %r9d
	cmpl	%r13d, %ebx
	jle	.L4
	movslq	%esi, %rax
	movl	%r15d, %r14d
	movq	%r13, %rbp
	leaq	(%r12,%rax,4), %rdi
.L10:
	cmpl	%ebp, %ebx
	jle	.L13
	movl	%r9d, 28(%rsp)
	movl	%esi, 24(%rsp)
	movl	%r8d, 20(%rsp)
	movq	%rdi, 8(%rsp)
	call	rand@PLT
	movl	28(%rsp), %r9d
	movl	$100, %ecx
	movq	8(%rsp), %rdi
	cltd
	movl	20(%rsp), %r8d
	movl	24(%rsp), %esi
	idivl	%ecx
	cmpl	%r9d, %ebp
	jne	.L6
	xorl	%eax, %eax
	movl	%eax, (%rdi,%rbp,4)
	jmp	.L7
.L6:
	movslq	%r14d, %rax
	movl	%edx, (%rdi,%rbp,4)
	movl	%edx, (%r12,%rax,4)
.L7:
	incq	%rbp
	addl	%ebx, %r14d
	jmp	.L10
.L13:
	incq	%r13
	addl	%r8d, %r15d
	addl	%ebx, %esi
	jmp	.L5
.L4:
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	movq	%r12, %rax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	_Z8initGrafi, .-_Z8initGrafi
	.globl	_Z30__device_stub__Z8dijkstraPiiS_PiiS_
	.type	_Z30__device_stub__Z8dijkstraPiiS_PiiS_, @function
_Z30__device_stub__Z8dijkstraPiiS_PiiS_:
.LFB2054:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movl	%esi, 20(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L14
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z8dijkstraPiiS_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L14:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L16
	call	__stack_chk_fail@PLT
.L16:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2054:
	.size	_Z30__device_stub__Z8dijkstraPiiS_PiiS_, .-_Z30__device_stub__Z8dijkstraPiiS_PiiS_
	.globl	_Z8dijkstraPiiS_
	.type	_Z8dijkstraPiiS_, @function
_Z8dijkstraPiiS_:
.LFB2055:
	.cfi_startproc
	endbr64
	jmp	_Z30__device_stub__Z8dijkstraPiiS_PiiS_
	.cfi_endproc
.LFE2055:
	.size	_Z8dijkstraPiiS_, .-_Z8dijkstraPiiS_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC2:
	.string	"Time elapsed = %f microseconds\n"
.LC3:
	.string	"Answer Graf\n"
.LC4:
	.string	"%d\t"
.LC5:
	.string	"\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	$10, %edx
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rsi, %rbx
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	movq	8(%rsi), %rdi
	xorl	%esi, %esi
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	call	__isoc23_strtol@PLT
	movq	16(%rbx), %rdi
	movl	$10, %edx
	xorl	%esi, %esi
	movq	%rax, %r14
	call	__isoc23_strtol@PLT
	movq	%rax, %rbx
	movl	%eax, %edi
	movl	%eax, %r12d
	call	_Z8initGrafi
	movl	%ebx, %ebp
	leaq	16(%rsp), %rdi
	imull	%ebx, %ebp
	movq	%rax, %r15
	call	cudaEventCreate@PLT
	leaq	24(%rsp), %rdi
	call	cudaEventCreate@PLT
	movslq	%ebp, %rbp
	leaq	0(,%rbp,4), %r13
	movq	%r13, %rdi
	call	malloc@PLT
	movq	%rsp, %rdi
	movq	%r13, %rsi
	movq	%rax, %rbp
	call	cudaMalloc@PLT
	leaq	8(%rsp), %rdi
	movq	%r13, %rsi
	call	cudaMalloc@PLT
	movq	(%rsp), %rdi
	movq	%r13, %rdx
	movq	%r15, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movl	%ebx, %eax
	movl	%r14d, 44(%rsp)
	xorl	%r9d, %r9d
	movabsq	$4294967297, %rcx
	cltd
	xorl	%r8d, %r8d
	idivl	%r14d
	movq	%rcx, 36(%rsp)
	movl	40(%rsp), %esi
	movq	%rcx, 48(%rsp)
	movl	52(%rsp), %ecx
	movq	44(%rsp), %rdx
	incl	%eax
	movl	%eax, 32(%rsp)
	movq	32(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L20
	movq	8(%rsp), %rdx
	movq	(%rsp), %rdi
	movl	%ebx, %esi
	call	_Z30__device_stub__Z8dijkstraPiiS_PiiS_
.L20:
	movq	24(%rsp), %rdi
	xorl	%esi, %esi
	movslq	%ebx, %rbx
	xorl	%r14d, %r14d
	salq	$2, %rbx
	leaq	.LC4(%rip), %r15
	call	cudaEventRecord@PLT
	movq	8(%rsp), %rsi
	movq	%r13, %rdx
	movq	%rbp, %rdi
	movl	$2, %ecx
	call	cudaMemcpy@PLT
	movq	24(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rsi
	leaq	44(%rsp), %rdi
	movl	$0x00000000, 44(%rsp)
	call	cudaEventElapsedTime@PLT
	movss	.LC1(%rip), %xmm0
	mulss	44(%rsp), %xmm0
	movb	$1, %al
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	cvtss2sd	%xmm0, %xmm0
	call	__printf_chk@PLT
	movl	$2, %edi
	xorl	%eax, %eax
	leaq	.LC3(%rip), %rsi
	call	__printf_chk@PLT
.L21:
	cmpl	%r12d, %r14d
	jge	.L27
	xorl	%r13d, %r13d
.L22:
	movl	0(%rbp,%r13,4), %edx
	movq	%r15, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	incq	%r13
	call	__printf_chk@PLT
	cmpl	%r13d, %r12d
	jg	.L22
	leaq	.LC5(%rip), %rsi
	xorl	%eax, %eax
	incl	%r14d
	addq	%rbx, %rbp
	movl	$2, %edi
	call	__printf_chk@PLT
	jmp	.L21
.L27:
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	(%rsp), %rdi
	call	cudaFree@PLT
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L23
	call	__stack_chk_fail@PLT
.L23:
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2029:
	.size	main, .-main
	.section	.rodata.str1.1
.LC6:
	.string	"_Z8dijkstraPiiS_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2057:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC6(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z8dijkstraPiiS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2057:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC1:
	.long	1120403456
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <limits.h>
#include <time.h>
#include <assert.h>

__device__ int minDistance(int dist[], int sptSet[], int V)
{
	// Initialize min value
	int min = INT_MAX, min_index;
	for (int v = 0; v < V; v++)
		if (sptSet[v] == 0 && dist[v] <= min)
			min = dist[v], min_index = v;

	return min_index;
}
__global__ void dijkstra(int *graph, int V,int* ansArray)
{
	int nodes = blockDim.x * blockIdx.x + threadIdx.x;
	if(nodes<V)
	{	int dist[3000]; // The output array. dist[i] will hold the shortest
		// distance from src to i

		int sptSet[3000]; // sptSet[i] will be true if vertex i is included in shortest
		// path tree or shortest distance from src to i is finalized

		// Initialize all distances as INFINITE and stpSet[] as false
		for (int i = 0; i < V; i++)
			dist[i] = INT_MAX, sptSet[i] = 0;

		// Distance of source vertex from itself is always 0
		dist[nodes] = 0;

		// Find shortest path for all vertices
		for (int count = 0; count < V - 1; count++)
		{
			// Pick the minimum distance vertex from the set of vertices not
			// yet processed. u is always equal to src in the first iteration.

			int u = minDistance(dist, sptSet, V);

			// Mark the picked vertex as processed
			sptSet[u] = 1;

			// Update dist value of the adjacent vertices of the picked vertex.
			for (int v = 0; v < V; v++)

				// Update dist[v] only if is not in sptSet, there is an edge from
				// u to v, and total weight of path from src to v through u is
				// smaller than current value of dist[v]
				if (!sptSet[v] && graph[u*V+v] && dist[u] != INT_MAX && dist[u] + graph[u*V+v] < dist[v])
					dist[v] = dist[u] + graph[u*V+v];
		}
		for (int i = 0; i < V; i++)
		{
			ansArray[nodes*V+i] = dist[i];
		}
	}
}
__host__ int* initGraf(int n)
{
	srand(13517143);
	int random;
	int *graf=(int *)malloc(n*n* sizeof(int ));
	for (int i = 0; i < n; i++)
	{
		for (int j = i; j < n; j++)
		{
			random = rand() % 100;
			if (i == j)
			{
				graf[i*n + j] = 0;
			}
			else
			{
				graf[i*n + j] = random;
				graf[j*n + i] = random;
			}
		}
	}
	return graf;
}

int main(int argc, char *argv[])
{
	int thread_count = strtol(argv[1], NULL, 10);
	int node_count = strtol(argv[2],NULL,10);
	int *graf,*answerMatrix,*deviceGraf,*deviceResult;
	graf= initGraf(node_count);
	hipEvent_t start, stop;
	hipEventCreate(&start);
	hipEventCreate(&stop);
	answerMatrix= (int *)malloc(node_count *node_count* sizeof(int));
	hipMalloc(&deviceGraf,node_count*node_count*sizeof(int));
	hipMalloc(&deviceResult,node_count*node_count*sizeof(int));
	hipMemcpy(deviceGraf, graf, node_count*node_count*sizeof(int), hipMemcpyHostToDevice);
	hipEventRecord(start);

	dijkstra<<<(node_count/thread_count)+1,thread_count>>>(deviceGraf,node_count,deviceResult);
	hipEventRecord(stop);


	hipMemcpy(answerMatrix, deviceResult, node_count*node_count*sizeof(int), hipMemcpyDeviceToHost);
	hipEventSynchronize(stop);
	float milliseconds = 0;
	hipEventElapsedTime(&milliseconds, start, stop);
	printf("Time elapsed = %f microseconds\n",milliseconds*100);
	printf("Answer Graf\n");

	for (int i = 0; i < node_count; i++) {
		for (int j = 0; j < node_count; j++) 
		  printf("%d\t", answerMatrix[i*node_count + j]);
		printf("\n");
	  }
	
	hipFree(deviceResult);
	hipFree(deviceGraf);


	
}

	.text
	.file	"dijkstra.hip"
	.globl	_Z23__device_stub__dijkstraPiiS_ # -- Begin function _Z23__device_stub__dijkstraPiiS_
	.type	_Z23__device_stub__dijkstraPiiS_,@function
_Z23__device_stub__dijkstraPiiS_:       # @_Z23__device_stub__dijkstraPiiS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	12(%rsp), %rcx
	movl	%esi, (%rcx)
	leaq	32(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z8dijkstraPiiS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z23__device_stub__dijkstraPiiS_, .Lfunc_end0-_Z23__device_stub__dijkstraPiiS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z8initGrafi                    # -- Begin function _Z8initGrafi
	.type	_Z8initGrafi,@function
_Z8initGrafi:                           # @_Z8initGrafi
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%edi, %r14d
	movl	$13517143, %edi                 # imm = 0xCE4157
	callq	srand
	movl	%r14d, %edi
	imull	%edi, %edi
	shlq	$2, %rdi
	callq	malloc
	movq	%rax, (%rsp)                    # 8-byte Spill
	testl	%r14d, %r14d
	jle	.LBB1_6
# %bb.1:                                # %.preheader.preheader
	movl	%r14d, %r15d
	leaq	(,%r15,4), %r12
	leaq	4(,%r15,4), %rax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	xorl	%ecx, %ecx
	movq	%r15, 24(%rsp)                  # 8-byte Spill
	movq	(%rsp), %rax                    # 8-byte Reload
	movq	%rax, %rdx
	movq	%rax, %rsi
	xorl	%edi, %edi
	movl	%r14d, 12(%rsp)                 # 4-byte Spill
.LBB1_2:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_3 Depth 2
	movq	%rcx, 56(%rsp)                  # 8-byte Spill
	movl	%ecx, %eax
	movq	%rsi, 40(%rsp)                  # 8-byte Spill
	leaq	(%rsi,%rax,4), %rbp
	movl	%edi, %ebx
	imull	%r14d, %ebx
	movq	(%rsp), %rax                    # 8-byte Reload
	movq	%rdi, 32(%rsp)                  # 8-byte Spill
	leaq	(%rax,%rdi,4), %rax
	movq	%rax, 64(%rsp)                  # 8-byte Spill
	movq	%rdx, 48(%rsp)                  # 8-byte Spill
	movq	%rdx, %r14
	xorl	%r13d, %r13d
.LBB1_3:                                #   Parent Loop BB1_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	callq	rand
	testq	%r13, %r13
	je	.LBB1_4
# %bb.7:                                #   in Loop: Header=BB1_3 Depth=2
	cltq
	imulq	$1374389535, %rax, %rcx         # imm = 0x51EB851F
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$37, %rcx
	addl	%edx, %ecx
	imull	$100, %ecx, %ecx
	subl	%ecx, %eax
	movl	%eax, (%rbp,%r13,4)
	movl	%eax, (%r14)
	jmp	.LBB1_8
.LBB1_4:                                #   in Loop: Header=BB1_3 Depth=2
	movq	64(%rsp), %rax                  # 8-byte Reload
	movl	$0, (%rax,%rbx,4)
.LBB1_8:                                #   in Loop: Header=BB1_3 Depth=2
	incq	%r13
	addq	%r12, %r14
	cmpq	%r13, %r15
	jne	.LBB1_3
# %bb.5:                                #   in Loop: Header=BB1_2 Depth=1
	movq	32(%rsp), %rdi                  # 8-byte Reload
	incq	%rdi
	movq	40(%rsp), %rsi                  # 8-byte Reload
	addq	$4, %rsi
	movl	12(%rsp), %r14d                 # 4-byte Reload
	movq	56(%rsp), %rcx                  # 8-byte Reload
	addl	%r14d, %ecx
	movq	48(%rsp), %rdx                  # 8-byte Reload
	addq	16(%rsp), %rdx                  # 8-byte Folded Reload
	decq	%r15
	cmpq	24(%rsp), %rdi                  # 8-byte Folded Reload
	jne	.LBB1_2
.LBB1_6:                                # %._crit_edge
	movq	(%rsp), %rax                    # 8-byte Reload
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z8initGrafi, .Lfunc_end1-_Z8initGrafi
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI2_0:
	.long	0x42c80000                      # float 100
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %rbx
	movq	8(%rsi), %rdi
	xorl	%esi, %esi
	movl	$10, %edx
	callq	__isoc23_strtol
	movq	%rax, %r12
	movq	16(%rbx), %rdi
	xorl	%esi, %esi
	movl	$10, %edx
	callq	__isoc23_strtol
	movq	%rax, %rbx
	movl	%ebx, %edi
	callq	_Z8initGrafi
	movq	%rax, %rbp
	leaq	24(%rsp), %rdi
	callq	hipEventCreate
	leaq	8(%rsp), %rdi
	callq	hipEventCreate
	movl	%ebx, %r15d
	imull	%r15d, %r15d
	shlq	$2, %r15
	movq	%r15, %rdi
	callq	malloc
	movq	%rax, %r14
	leaq	32(%rsp), %r13
	movq	%r13, %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	leaq	16(%rsp), %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	movq	(%r13), %rdi
	movq	%rbp, %rsi
	movq	%r15, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	24(%rsp), %rax
	movq	(%rax), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movl	%ebx, %eax
	cltd
	idivl	%r12d
                                        # kill: def $eax killed $eax def $rax
	leal	1(%rax), %edi
	btsq	$32, %rdi
	movl	%r12d, %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_2
# %bb.1:
	movq	32(%rsp), %rdi
	movq	16(%rsp), %rdx
	movl	%ebx, %esi
	callq	_Z23__device_stub__dijkstraPiiS_
.LBB2_2:
	movq	8(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	16(%rsp), %rsi
	movq	%r14, %rdi
	movq	%r15, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	8(%rsp), %rdi
	callq	hipEventSynchronize
	leaq	52(%rsp), %r15
	movl	$0, (%r15)
	movq	24(%rsp), %rsi
	movq	8(%rsp), %rdx
	movq	%r15, %rdi
	callq	hipEventElapsedTime
	movss	(%r15), %xmm0                   # xmm0 = mem[0],zero,zero,zero
	mulss	.LCPI2_0(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	movl	$.L.str, %edi
	movb	$1, %al
	callq	printf
	movl	$.Lstr, %edi
	callq	puts@PLT
	testl	%ebx, %ebx
	jle	.LBB2_7
# %bb.3:                                # %.preheader.lr.ph
	movl	%ebx, %r15d
	xorl	%ebp, %ebp
	xorl	%r12d, %r12d
	movq	%r14, 40(%rsp)                  # 8-byte Spill
.LBB2_4:                                # %.lr.ph
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_5 Depth 2
	movl	%ebp, %eax
	leaq	(%r14,%rax,4), %r13
	xorl	%r14d, %r14d
.LBB2_5:                                #   Parent Loop BB2_4 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	(%r13,%r14,4), %esi
	movl	$.L.str.2, %edi
	xorl	%eax, %eax
	callq	printf
	incq	%r14
	cmpq	%r14, %r15
	jne	.LBB2_5
# %bb.6:                                # %._crit_edge
                                        #   in Loop: Header=BB2_4 Depth=1
	movl	$10, %edi
	callq	putchar@PLT
	incq	%r12
	addl	%ebx, %ebp
	cmpq	%r15, %r12
	movq	40(%rsp), %r14                  # 8-byte Reload
	jne	.LBB2_4
.LBB2_7:                                # %._crit_edge38
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	32(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z8dijkstraPiiS_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z8dijkstraPiiS_,@object        # @_Z8dijkstraPiiS_
	.section	.rodata,"a",@progbits
	.globl	_Z8dijkstraPiiS_
	.p2align	3, 0x0
_Z8dijkstraPiiS_:
	.quad	_Z23__device_stub__dijkstraPiiS_
	.size	_Z8dijkstraPiiS_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Time elapsed = %f microseconds\n"
	.size	.L.str, 32

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"%d\t"
	.size	.L.str.2, 4

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z8dijkstraPiiS_"
	.size	.L__unnamed_1, 17

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"Answer Graf"
	.size	.Lstr, 12

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z23__device_stub__dijkstraPiiS_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z8dijkstraPiiS_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z8dijkstraPiiS_        ; -- Begin function _Z8dijkstraPiiS_
	.globl	_Z8dijkstraPiiS_
	.p2align	8
	.type	_Z8dijkstraPiiS_,@function
_Z8dijkstraPiiS_:                       ; @_Z8dijkstraPiiS_
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b32 s4, s[0:1], 0x8
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s4, v1
	s_cbranch_execz .LBB0_20
; %bb.1:
	s_cmp_gt_i32 s4, 0
	s_cselect_b32 s5, -1, 0
	s_cmp_lt_i32 s4, 1
	s_cbranch_scc1 .LBB0_4
; %bb.2:                                ; %.lr.ph.preheader
	v_mov_b32_e32 v0, 16
	v_mov_b32_e32 v2, 0x2ef0
	v_bfrev_b32_e32 v3, -2
	v_mov_b32_e32 v4, 0
	s_mov_b32 s2, s4
.LBB0_3:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	scratch_store_b32 v0, v3, off
	scratch_store_b32 v2, v4, off
	v_add_nc_u32_e32 v0, 4, v0
	v_add_nc_u32_e32 v2, 4, v2
	s_add_i32 s2, s2, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s2, 0
	s_cbranch_scc0 .LBB0_3
.LBB0_4:                                ; %._crit_edge
	v_lshl_add_u32 v0, v1, 2, 16
	v_mov_b32_e32 v2, 0
	s_cmp_lt_i32 s4, 2
	scratch_store_b32 v0, v2, off
	s_cbranch_scc1 .LBB0_17
; %bb.5:                                ; %.lr.ph59
	s_load_b64 s[2:3], s[0:1], 0x0
	v_mov_b32_e32 v0, 1
	s_add_i32 s6, s4, -2
	s_mov_b32 s7, 0
.LBB0_6:                                ; %.lr.ph.i.preheader
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_7 Depth 2
                                        ;     Child Loop BB0_11 Depth 2
	v_dual_mov_b32 v2, 16 :: v_dual_mov_b32 v3, 0x2ef0
	v_bfrev_b32_e32 v5, -2
	s_mov_b32 s8, 0
                                        ; implicit-def: $vgpr4
.LBB0_7:                                ; %.lr.ph.i
                                        ;   Parent Loop BB0_6 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	scratch_load_b32 v6, v3, off
	s_mov_b32 s9, exec_lo
	s_waitcnt vmcnt(0)
	v_cmpx_eq_u32_e32 0, v6
	s_cbranch_execz .LBB0_9
; %bb.8:                                ;   in Loop: Header=BB0_7 Depth=2
	scratch_load_b32 v6, v2, off
	s_waitcnt vmcnt(0)
	v_cmp_gt_i32_e32 vcc_lo, v6, v5
	v_min_i32_e32 v5, v6, v5
	v_cndmask_b32_e32 v4, s8, v4, vcc_lo
.LBB0_9:                                ;   in Loop: Header=BB0_7 Depth=2
	s_or_b32 exec_lo, exec_lo, s9
	v_add_nc_u32_e32 v2, 4, v2
	v_add_nc_u32_e32 v3, 4, v3
	s_add_i32 s8, s8, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s4, s8
	s_cbranch_scc1 .LBB0_7
; %bb.10:                               ; %_Z11minDistancePiS_i.exit
                                        ;   in Loop: Header=BB0_6 Depth=1
	v_dual_mov_b32 v6, 16 :: v_dual_lshlrev_b32 v3, 2, v4
	v_mul_lo_u32 v2, v4, s4
	s_mov_b32 s8, s4
	v_mov_b32_e32 v5, 0x2ef0
	s_delay_alu instid0(VALU_DEP_3)
	v_add_nc_u32_e32 v7, 0x2ef0, v3
	v_add_nc_u32_e32 v4, 16, v3
	scratch_store_b32 v7, v0, off
.LBB0_11:                               ;   Parent Loop BB0_6 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	scratch_load_b32 v3, v5, off
	s_mov_b32 s9, exec_lo
	s_waitcnt vmcnt(0)
	v_cmpx_eq_u32_e32 0, v3
	s_cbranch_execz .LBB0_15
; %bb.12:                               ;   in Loop: Header=BB0_11 Depth=2
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[7:8], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v7, vcc_lo, s2, v7
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v8, vcc_lo, s3, v8, vcc_lo
	global_load_b32 v3, v[7:8], off
	s_waitcnt vmcnt(0)
	v_cmp_ne_u32_e32 vcc_lo, 0, v3
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_15
; %bb.13:                               ;   in Loop: Header=BB0_11 Depth=2
	scratch_load_b32 v7, v4, off
	s_waitcnt vmcnt(0)
	v_cmp_ne_u32_e32 vcc_lo, 0x7fffffff, v7
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_15
; %bb.14:                               ;   in Loop: Header=BB0_11 Depth=2
	scratch_load_b32 v8, v6, off
	v_add_nc_u32_e32 v3, v7, v3
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_min_i32_e32 v3, v3, v8
	scratch_store_b32 v6, v3, off
.LBB0_15:                               ;   in Loop: Header=BB0_11 Depth=2
	s_or_b32 exec_lo, exec_lo, s9
	v_add_nc_u32_e32 v2, 1, v2
	v_add_nc_u32_e32 v5, 4, v5
	v_add_nc_u32_e32 v6, 4, v6
	s_add_i32 s8, s8, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s8, 0
	s_cbranch_scc0 .LBB0_11
; %bb.16:                               ; %._crit_edge56
                                        ;   in Loop: Header=BB0_6 Depth=1
	s_add_i32 s8, s7, 1
	s_cmp_eq_u32 s7, s6
	s_mov_b32 s7, s8
	s_cbranch_scc0 .LBB0_6
.LBB0_17:                               ; %.preheader
	s_and_not1_b32 vcc_lo, exec_lo, s5
	s_cbranch_vccnz .LBB0_20
; %bb.18:                               ; %.lr.ph61
	s_load_b64 s[0:1], s[0:1], 0x10
	v_mul_lo_u32 v0, v1, s4
	v_mov_b32_e32 v2, 16
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
.LBB0_19:                               ; =>This Inner Loop Header: Depth=1
	scratch_load_b32 v3, v2, off
	v_add_nc_u32_e32 v2, 4, v2
	s_add_i32 s4, s4, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s4, 0
	s_waitcnt vmcnt(0)
	global_store_b32 v[0:1], v3, off
	v_add_co_u32 v0, vcc_lo, v0, 4
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
	s_cbranch_scc0 .LBB0_19
.LBB0_20:
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z8dijkstraPiiS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 24016
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 1
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z8dijkstraPiiS_, .Lfunc_end0-_Z8dijkstraPiiS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 648
; NumSgprs: 18
; NumVgprs: 9
; ScratchSize: 24016
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 1
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z8dijkstraPiiS_
    .private_segment_fixed_size: 24016
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z8dijkstraPiiS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     9
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
