#include <iostream>
#include <stdio.h>
#include <stdlib.h>
#include <cuda.h>
#include <cuda_runtime.h>
#include <vector>
#include <algorithm>
#define num 10000000

__global__ void gpuSquare(int *d_a, int *d_b, int N=num)
{
	int tid = blockIdx.x;
	if(tid < N)
		d_b[tid] = d_a[tid] * d_a[tid];
}
void cpuSquare(std::vector<int> &h_a, std::vector<int> &h_b)
{
	for(int i=0; i<h_a.size(); i++)
		h_b[i] = h_a[i]*h_a[i];
}
int main(void)
{
//	int N;
//	std::cout << "N?";
//	std::cin >> N;
	int N=num;
	std::cout << "N is " << num << "\n";
	int *d_a, *d_b;//device pointer to store answer
	std::cout <<"Device allocate.. ";
	cudaMalloc((void**)&d_a, N*sizeof(int));
	cudaMalloc((void**)&d_b, N*sizeof(int));
	std::vector<int> h_a(N), h_b(N);
	std::cout << "Allocated\n";
	for(int i=0; i<N; i++)
	{
		h_a[i] = i;
	}
	std::cout << "Finished!!!\n";
	//copy host to device
	cudaMemcpy(&d_a, h_a.data(), N*sizeof(int), cudaMemcpyHostToDevice);
	std::cout << "Ported to device\n";
	clock_t start,end;
	start = clock();
	cpuSquare(h_a, h_b);
	end = clock();
	std:: cout << "CPU time: " << (double)(end-start)/ CLOCKS_PER_SEC << "\n";
	start = clock();
	gpuSquare <<<N, 1>>> (d_a, d_b);
//	cudaDeviceSynchronize();
	cudaThreadSynchronize();
	end = clock();
	std:: cout << "GPU time: " << (double)(end-start)/ CLOCKS_PER_SEC <<'\n';

//	free(h_a);
//	free(h_b);
//	free(h_c);
	cudaFree(d_a);
	cudaFree(d_b);
	return 0;
}

	.file	"tmpxft_0027f757_00000000-6_5_elementwise_squaring.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4256:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE4256:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z9cpuSquareRSt6vectorIiSaIiEES2_
	.type	_Z9cpuSquareRSt6vectorIiSaIiEES2_, @function
_Z9cpuSquareRSt6vectorIiSaIiEES2_:
.LFB4252:
	.cfi_startproc
	endbr64
	movq	(%rdi), %r8
	movq	8(%rdi), %rcx
	xorl	%eax, %eax
	subq	%r8, %rcx
.L3:
	cmpq	%rcx, %rax
	je	.L6
	movl	(%r8,%rax), %edx
	movq	(%rsi), %rdi
	imull	%edx, %edx
	movl	%edx, (%rdi,%rax)
	addq	$4, %rax
	jmp	.L3
.L6:
	ret
	.cfi_endproc
.LFE4252:
	.size	_Z9cpuSquareRSt6vectorIiSaIiEES2_, .-_Z9cpuSquareRSt6vectorIiSaIiEES2_
	.globl	_Z31__device_stub__Z9gpuSquarePiS_iPiS_i
	.type	_Z31__device_stub__Z9gpuSquarePiS_iPiS_i, @function
_Z31__device_stub__Z9gpuSquarePiS_iPiS_i:
.LFB4278:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L7
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z9gpuSquarePiS_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L7:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L9
	call	__stack_chk_fail@PLT
.L9:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4278:
	.size	_Z31__device_stub__Z9gpuSquarePiS_iPiS_i, .-_Z31__device_stub__Z9gpuSquarePiS_iPiS_i
	.globl	_Z9gpuSquarePiS_i
	.type	_Z9gpuSquarePiS_i, @function
_Z9gpuSquarePiS_i:
.LFB4279:
	.cfi_startproc
	endbr64
	jmp	_Z31__device_stub__Z9gpuSquarePiS_iPiS_i
	.cfi_endproc
.LFE4279:
	.size	_Z9gpuSquarePiS_i, .-_Z9gpuSquarePiS_i
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z9gpuSquarePiS_i"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB4281:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z9gpuSquarePiS_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE4281:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.text._ZNSt6vectorIiSaIiEED2Ev,"axG",@progbits,_ZNSt6vectorIiSaIiEED5Ev,comdat
	.align 2
	.weak	_ZNSt6vectorIiSaIiEED2Ev
	.type	_ZNSt6vectorIiSaIiEED2Ev, @function
_ZNSt6vectorIiSaIiEED2Ev:
.LFB4594:
	.cfi_startproc
	endbr64
	movq	(%rdi), %rax
	testq	%rax, %rax
	je	.L14
	movq	16(%rdi), %rsi
	movq	%rax, %rdi
	subq	%rax, %rsi
	jmp	_ZdlPvm@PLT
.L14:
	ret
	.cfi_endproc
.LFE4594:
	.size	_ZNSt6vectorIiSaIiEED2Ev, .-_ZNSt6vectorIiSaIiEED2Ev
	.weak	_ZNSt6vectorIiSaIiEED1Ev
	.set	_ZNSt6vectorIiSaIiEED1Ev,_ZNSt6vectorIiSaIiEED2Ev
	.section	.rodata.str1.1
.LC1:
	.string	"N is "
.LC2:
	.string	"\n"
.LC3:
	.string	"Device allocate.. "
.LC4:
	.string	"Allocated\n"
.LC5:
	.string	"Finished!!!\n"
.LC6:
	.string	"Ported to device\n"
.LC7:
	.string	"CPU time: "
.LC9:
	.string	"GPU time: "
	.section	.text.startup
	.globl	main
	.type	main, @function
main:
.LFB4253:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA4253
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	leaq	.LC1(%rip), %rsi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	leaq	.LC2(%rip), %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	leaq	_ZSt4cout(%rip), %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rbp, %rdi
	subq	$104, %rsp
	.cfi_def_cfa_offset 160
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	movq	%rsp, %r13
.LEHB0:
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	$10000000, %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	movq	%r12, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC3(%rip), %rsi
	movq	%rbp, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	$40000000, %esi
	movq	%r13, %rdi
	call	cudaMalloc@PLT
	leaq	8(%rsp), %rdi
	movl	$40000000, %esi
	call	cudaMalloc@PLT
	movl	$40000000, %edi
	call	_Znwm@PLT
.LEHE0:
	xorl	%r10d, %r10d
	leaq	40000000(%rax), %rdx
	movq	%rax, 40(%rsp)
	movq	%rax, %rbx
	movq	%rdx, 56(%rsp)
	movl	%r10d, (%rax)
	xorl	%eax, %eax
.L17:
	addq	$4, %rax
	cmpq	$40000000, %rax
	je	.L39
	xorl	%r9d, %r9d
	movl	%r9d, (%rbx,%rax)
	jmp	.L17
.L39:
	xorl	%r8d, %r8d
	movl	$40000000, %edi
	movq	%rdx, 48(%rsp)
	movq	%r8, 72(%rsp)
	movq	%r8, 80(%rsp)
.LEHB1:
	call	_Znwm@PLT
.LEHE1:
	leaq	40000000(%rax), %rcx
	xorl	%edi, %edi
	movq	%rax, 64(%rsp)
	xorl	%edx, %edx
	movq	%rcx, 80(%rsp)
	movl	%edi, (%rax)
.L19:
	addq	$4, %rdx
	cmpq	$40000000, %rdx
	je	.L40
	xorl	%esi, %esi
	movl	%esi, (%rax,%rdx)
	jmp	.L19
.L40:
	leaq	.LC4(%rip), %rsi
	movq	%rbp, %rdi
	movq	%rcx, 72(%rsp)
.LEHB2:
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	xorl	%eax, %eax
.L21:
	movl	%eax, (%rbx,%rax,4)
	incq	%rax
	cmpq	$10000000, %rax
	jne	.L21
	leaq	.LC5(%rip), %rsi
	movq	%rbp, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	$1, %ecx
	movl	$40000000, %edx
	movq	%rbx, %rsi
	movq	%r13, %rdi
	call	cudaMemcpy@PLT
	leaq	.LC6(%rip), %rsi
	movq	%rbp, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	call	clock@PLT
	leaq	64(%rsp), %r13
	leaq	40(%rsp), %rbx
	movq	%r13, %rsi
	movq	%rbx, %rdi
	movq	%rax, %r15
	call	_Z9cpuSquareRSt6vectorIiSaIiEES2_
	call	clock@PLT
	leaq	.LC7(%rip), %rsi
	movq	%rbp, %rdi
	movq	%rax, %r14
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	subq	%r15, %r14
	movq	%rax, %rdi
	cvtsi2sdq	%r14, %xmm0
	divsd	.LC8(%rip), %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%rax, %rdi
	movq	%r12, %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	call	clock@PLT
	movl	$33632557, %edi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$7, %rdi
	movl	$1, %ecx
	movq	%rax, %r14
	movabsq	$4294967297, %rdx
	movl	$1, %esi
	movq	%rdx, 28(%rsp)
	movl	$1, 36(%rsp)
	movq	%rdi, 16(%rsp)
	movl	$1, 24(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	je	.L22
.L24:
	call	cudaThreadSynchronize@PLT
	jmp	.L41
.L22:
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdi
	movl	$10000000, %edx
	call	_Z31__device_stub__Z9gpuSquarePiS_iPiS_i
	jmp	.L24
.L41:
	call	clock@PLT
	leaq	.LC9(%rip), %rsi
	movq	%rbp, %rdi
	movq	%rax, %r12
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	subq	%r14, %r12
	movq	%rax, %rdi
	cvtsi2sdq	%r12, %xmm0
	divsd	.LC8(%rip), %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movb	$10, 28(%rsp)
	movq	%rax, %rdi
	movq	(%rax), %rax
	movq	-24(%rax), %rax
	cmpq	$0, 16(%rdi,%rax)
	je	.L25
	leaq	28(%rsp), %rsi
	movl	$1, %edx
	call	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
.L27:
	movq	(%rsp), %rdi
	call	cudaFree@PLT
	jmp	.L42
.L25:
	movl	$10, %esi
	call	_ZNSo3putEc@PLT
	jmp	.L27
.L42:
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
.LEHE2:
	movq	%r13, %rdi
	call	_ZNSt6vectorIiSaIiEED1Ev
	movq	%rbx, %rdi
	call	_ZNSt6vectorIiSaIiEED1Ev
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L31
	jmp	.L37
.L33:
	endbr64
	movq	%rax, %rbx
.L28:
	leaq	64(%rsp), %rdi
	call	_ZNSt6vectorIiSaIiEED1Ev
	jmp	.L29
.L32:
	endbr64
	movq	%rax, %rbx
.L29:
	leaq	40(%rsp), %rdi
	call	_ZNSt6vectorIiSaIiEED1Ev
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L37
	movq	%rbx, %rdi
.LEHB3:
	call	_Unwind_Resume@PLT
.LEHE3:
.L37:
	call	__stack_chk_fail@PLT
.L31:
	addq	$104, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4253:
	.globl	__gxx_personality_v0
	.section	.gcc_except_table,"a",@progbits
.LLSDA4253:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE4253-.LLSDACSB4253
.LLSDACSB4253:
	.uleb128 .LEHB0-.LFB4253
	.uleb128 .LEHE0-.LEHB0
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB1-.LFB4253
	.uleb128 .LEHE1-.LEHB1
	.uleb128 .L32-.LFB4253
	.uleb128 0
	.uleb128 .LEHB2-.LFB4253
	.uleb128 .LEHE2-.LEHB2
	.uleb128 .L33-.LFB4253
	.uleb128 0
	.uleb128 .LEHB3-.LFB4253
	.uleb128 .LEHE3-.LEHB3
	.uleb128 0
	.uleb128 0
.LLSDACSE4253:
	.section	.text.startup
	.size	main, .-main
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC8:
	.long	0
	.long	1093567616
	.hidden	DW.ref.__gxx_personality_v0
	.weak	DW.ref.__gxx_personality_v0
	.section	.data.rel.local.DW.ref.__gxx_personality_v0,"awG",@progbits,DW.ref.__gxx_personality_v0,comdat
	.align 8
	.type	DW.ref.__gxx_personality_v0, @object
	.size	DW.ref.__gxx_personality_v0, 8
DW.ref.__gxx_personality_v0:
	.quad	__gxx_personality_v0
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <iostream>
#include <stdio.h>
#include <stdlib.h>
#include <hip/hip_runtime.h>

#include <vector>
#include <algorithm>
#define num 10000000

__global__ void gpuSquare(int *d_a, int *d_b, int N=num)
{
	int tid = blockIdx.x;
	if(tid < N)
		d_b[tid] = d_a[tid] * d_a[tid];
}
void cpuSquare(std::vector<int> &h_a, std::vector<int> &h_b)
{
	for(int i=0; i<h_a.size(); i++)
		h_b[i] = h_a[i]*h_a[i];
}
int main(void)
{
//	int N;
//	std::cout << "N?";
//	std::cin >> N;
	int N=num;
	std::cout << "N is " << num << "\n";
	int *d_a, *d_b;//device pointer to store answer
	std::cout <<"Device allocate.. ";
	hipMalloc((void**)&d_a, N*sizeof(int));
	hipMalloc((void**)&d_b, N*sizeof(int));
	std::vector<int> h_a(N), h_b(N);
	std::cout << "Allocated\n";
	for(int i=0; i<N; i++)
	{
		h_a[i] = i;
	}
	std::cout << "Finished!!!\n";
	//copy host to device
	hipMemcpy(&d_a, h_a.data(), N*sizeof(int), hipMemcpyHostToDevice);
	std::cout << "Ported to device\n";
	clock_t start,end;
	start = clock();
	cpuSquare(h_a, h_b);
	end = clock();
	std:: cout << "CPU time: " << (double)(end-start)/ CLOCKS_PER_SEC << "\n";
	start = clock();
	gpuSquare <<<N, 1>>> (d_a, d_b);
//	cudaDeviceSynchronize();
	hipDeviceSynchronize();
	end = clock();
	std:: cout << "GPU time: " << (double)(end-start)/ CLOCKS_PER_SEC <<'\n';

//	free(h_a);
//	free(h_b);
//	free(h_c);
	hipFree(d_a);
	hipFree(d_b);
	return 0;
}

	.text
	.file	"5_elementwise_squaring.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z24__device_stub__gpuSquarePiS_i # -- Begin function _Z24__device_stub__gpuSquarePiS_i
	.type	_Z24__device_stub__gpuSquarePiS_i,@function
_Z24__device_stub__gpuSquarePiS_i:      # @_Z24__device_stub__gpuSquarePiS_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9gpuSquarePiS_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z24__device_stub__gpuSquarePiS_i, .Lfunc_end0-_Z24__device_stub__gpuSquarePiS_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z9cpuSquareRSt6vectorIiSaIiEES2_ # -- Begin function _Z9cpuSquareRSt6vectorIiSaIiEES2_
	.type	_Z9cpuSquareRSt6vectorIiSaIiEES2_,@function
_Z9cpuSquareRSt6vectorIiSaIiEES2_:      # @_Z9cpuSquareRSt6vectorIiSaIiEES2_
	.cfi_startproc
# %bb.0:
	movq	(%rdi), %rax
	movq	8(%rdi), %rcx
	subq	%rax, %rcx
	je	.LBB1_3
# %bb.1:                                # %.lr.ph
	sarq	$2, %rcx
	movq	(%rsi), %rdx
	cmpq	$1, %rcx
	adcq	$0, %rcx
	xorl	%esi, %esi
.LBB1_2:                                # =>This Inner Loop Header: Depth=1
	movl	(%rax,%rsi,4), %edi
	imull	%edi, %edi
	movl	%edi, (%rdx,%rsi,4)
	incq	%rsi
	cmpq	%rsi, %rcx
	jne	.LBB1_2
.LBB1_3:                                # %._crit_edge
	retq
.Lfunc_end1:
	.size	_Z9cpuSquareRSt6vectorIiSaIiEES2_, .Lfunc_end1-_Z9cpuSquareRSt6vectorIiSaIiEES2_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI2_0:
	.quad	0x412e848000000000              # double 1.0E+6
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
.Lfunc_begin0:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception0
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$32, %rsp
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	$_ZSt4cout, %edi
	movl	$.L.str, %esi
	movl	$5, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$10000000, %esi                 # imm = 0x989680
	callq	_ZNSolsEi
	movl	$.L.str.1, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.2, %esi
	movl	$18, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	leaq	16(%rsp), %rdi
	movl	$40000000, %esi                 # imm = 0x2625A00
	callq	hipMalloc
	leaq	24(%rsp), %rdi
	movl	$40000000, %esi                 # imm = 0x2625A00
	callq	hipMalloc
	movl	$40000000, %edi                 # imm = 0x2625A00
	callq	_Znwm
	movq	%rax, %rbx
	movl	$40000000, %edx                 # imm = 0x2625A00
	movq	%rax, %rdi
	xorl	%esi, %esi
	callq	memset@PLT
.Ltmp0:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.3, %esi
	movl	$10, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp1:
# %bb.1:                                # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit.preheader
	xorl	%eax, %eax
.LBB2_2:                                # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit
                                        # =>This Inner Loop Header: Depth=1
	movl	%eax, (%rbx,%rax,4)
	incq	%rax
	cmpq	$10000000, %rax                 # imm = 0x989680
	jne	.LBB2_2
# %bb.3:
.Ltmp2:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.4, %esi
	movl	$12, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp3:
# %bb.4:                                # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit27
.Ltmp4:
	leaq	16(%rsp), %rdi
	movl	$40000000, %edx                 # imm = 0x2625A00
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
.Ltmp5:
# %bb.5:
.Ltmp6:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.5, %esi
	movl	$17, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp7:
# %bb.6:                                # %.lr.ph.i
	callq	clock
	movq	%rax, %r14
	callq	clock
	movq	%rax, %r15
.Ltmp9:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.6, %esi
	movl	$10, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp10:
# %bb.7:                                # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit29
	subq	%r14, %r15
	cvtsi2sd	%r15, %xmm0
	divsd	.LCPI2_0(%rip), %xmm0
.Ltmp11:
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
.Ltmp12:
# %bb.8:                                # %_ZNSolsEd.exit
.Ltmp13:
	movl	$.L.str.1, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp14:
# %bb.9:                                # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit30
	callq	clock
	movq	%rax, %r14
.Ltmp15:
	movabsq	$4304967296, %rdi               # imm = 0x100989680
	movabsq	$4294967297, %rdx               # imm = 0x100000001
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
.Ltmp16:
# %bb.10:
	testl	%eax, %eax
	jne	.LBB2_12
# %bb.11:
	movq	16(%rsp), %rdi
	movq	24(%rsp), %rsi
.Ltmp17:
	movl	$10000000, %edx                 # imm = 0x989680
	callq	_Z24__device_stub__gpuSquarePiS_i
.Ltmp18:
.LBB2_12:
.Ltmp19:
	callq	hipDeviceSynchronize
.Ltmp20:
# %bb.13:
	callq	clock
	movq	%rax, %r15
.Ltmp21:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.7, %esi
	movl	$10, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp22:
# %bb.14:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit31
	subq	%r14, %r15
	xorps	%xmm0, %xmm0
	cvtsi2sd	%r15, %xmm0
	divsd	.LCPI2_0(%rip), %xmm0
.Ltmp23:
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
.Ltmp24:
# %bb.15:                               # %_ZNSolsEd.exit32
	movb	$10, 15(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB2_17
# %bb.16:
.Ltmp25:
	leaq	15(%rsp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp26:
	jmp	.LBB2_18
.LBB2_17:
.Ltmp27:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.Ltmp28:
.LBB2_18:
	movq	16(%rsp), %rdi
.Ltmp29:
	callq	hipFree
.Ltmp30:
# %bb.19:
	movq	24(%rsp), %rdi
.Ltmp31:
	callq	hipFree
.Ltmp32:
# %bb.20:                               # %_ZNSt6vectorIiSaIiEED2Ev.exit36
	movq	%rbx, %rdi
	callq	_ZdlPv
	xorl	%eax, %eax
	addq	$32, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.LBB2_21:
	.cfi_def_cfa_offset 64
.Ltmp8:
	jmp	.LBB2_22
.LBB2_23:
.Ltmp33:
.LBB2_22:                               # %_ZNSt6vectorIiSaIiEED2Ev.exit40
	movq	%rax, %r14
	movq	%rbx, %rdi
	callq	_ZdlPv
	movq	%r14, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
	.section	.gcc_except_table,"a",@progbits
	.p2align	2, 0x0
GCC_except_table2:
.Lexception0:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end0-.Lcst_begin0
.Lcst_begin0:
	.uleb128 .Lfunc_begin0-.Lfunc_begin0    # >> Call Site 1 <<
	.uleb128 .Ltmp0-.Lfunc_begin0           #   Call between .Lfunc_begin0 and .Ltmp0
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp0-.Lfunc_begin0           # >> Call Site 2 <<
	.uleb128 .Ltmp7-.Ltmp0                  #   Call between .Ltmp0 and .Ltmp7
	.uleb128 .Ltmp8-.Lfunc_begin0           #     jumps to .Ltmp8
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp9-.Lfunc_begin0           # >> Call Site 3 <<
	.uleb128 .Ltmp32-.Ltmp9                 #   Call between .Ltmp9 and .Ltmp32
	.uleb128 .Ltmp33-.Lfunc_begin0          #     jumps to .Ltmp33
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp32-.Lfunc_begin0          # >> Call Site 4 <<
	.uleb128 .Lfunc_end2-.Ltmp32            #   Call between .Ltmp32 and .Lfunc_end2
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end0:
	.p2align	2, 0x0
                                        # -- End function
	.text
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9gpuSquarePiS_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z9gpuSquarePiS_i,@object       # @_Z9gpuSquarePiS_i
	.section	.rodata,"a",@progbits
	.globl	_Z9gpuSquarePiS_i
	.p2align	3, 0x0
_Z9gpuSquarePiS_i:
	.quad	_Z24__device_stub__gpuSquarePiS_i
	.size	_Z9gpuSquarePiS_i, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"N is "
	.size	.L.str, 6

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"\n"
	.size	.L.str.1, 2

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Device allocate.. "
	.size	.L.str.2, 19

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"Allocated\n"
	.size	.L.str.3, 11

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"Finished!!!\n"
	.size	.L.str.4, 13

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"Ported to device\n"
	.size	.L.str.5, 18

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"CPU time: "
	.size	.L.str.6, 11

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"GPU time: "
	.size	.L.str.7, 11

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z9gpuSquarePiS_i"
	.size	.L__unnamed_1, 18

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z24__device_stub__gpuSquarePiS_i
	.addrsig_sym __gxx_personality_v0
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Unwind_Resume
	.addrsig_sym _Z9gpuSquarePiS_i
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z9gpuSquarePiS_i       ; -- Begin function _Z9gpuSquarePiS_i
	.globl	_Z9gpuSquarePiS_i
	.p2align	8
	.type	_Z9gpuSquarePiS_i,@function
_Z9gpuSquarePiS_i:                      ; @_Z9gpuSquarePiS_i
; %bb.0:
	s_load_b32 s3, s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_cmp_ge_i32 s15, s3
	s_cbranch_scc1 .LBB0_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	s_mov_b32 s2, s15
	s_ashr_i32 s3, s15, 31
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b64 s[0:1], s[2:3], 2
	s_waitcnt lgkmcnt(0)
	s_add_u32 s2, s6, s0
	s_addc_u32 s3, s7, s1
	s_add_u32 s0, s4, s0
	s_addc_u32 s1, s5, s1
	s_load_b32 s0, s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s0, s0, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s0
	global_store_b32 v0, v1, s[2:3]
.LBB0_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9gpuSquarePiS_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 20
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 2
		.amdhsa_next_free_sgpr 16
		.amdhsa_reserve_vcc 0
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z9gpuSquarePiS_i, .Lfunc_end0-_Z9gpuSquarePiS_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 112
; NumSgprs: 16
; NumVgprs: 2
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 1
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 16
; NumVGPRsForWavesPerEU: 2
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 20
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z9gpuSquarePiS_i
    .private_segment_fixed_size: 0
    .sgpr_count:     16
    .sgpr_spill_count: 0
    .symbol:         _Z9gpuSquarePiS_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     2
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
