#define BLOCK_SIZE 256

__global__ void apspKernel(const int N, const int k, int *global_mat) {
    const int ij = blockIdx.x * BLOCK_SIZE + threadIdx.x;
    const int i = ij / N;
    const int ik = i * N + k;
    const int kj = ij + (k - i) * N;
    const int dik = global_mat[ik];
    const int dkj = global_mat[kj];

    if (dik != -1 && dkj != -1) {
        const int sum = dik + dkj;
        int& dij = global_mat[ij];
        if (dij == -1 || dij > sum)
            dij = sum;
    }
}

void par_apsp(int N, int *mat) {
    int *global_mat, size = sizeof(int) * N * N;
    cudaMalloc(&global_mat, size);
    cudaMemcpy(global_mat, mat, size, cudaMemcpyHostToDevice);

    dim3 dimGrid(N * N / BLOCK_SIZE, 1, 1);
    dim3 dimBlock(BLOCK_SIZE, 1, 1);

    for (int k = 0; k < N; k++)
        apspKernel<<<dimGrid, dimBlock>>>(N, k, global_mat);

    cudaMemcpy(mat, global_mat, size, cudaMemcpyDeviceToHost);
}

// __global__ void apspKernel(int N, int k, int *g_idata, int *g_odata) {
//     // access thread id
//     const unsigned int tid = threadIdx.x;
//     // access block id
//     const unsigned int bid = blockIdx.x;
//     // access number of threads in this block
//     const unsigned int bdim = blockDim.x;

//     const unsigned int i = (bid * bdim + tid)/N;
//     const unsigned int j = (bid * bdim + tid)%N;

//     if (g_idata[i*N+k] == -1 || g_idata[k*N+j] == -1) g_odata[i*N+j] = g_idata[i*N+j];
//     else if (g_idata[i*N+j] == -1) g_odata[i*N+j] = g_idata[i*N+k]+g_idata[k*N+j];
//     else g_odata[i*N+j] = min(g_idata[i*N+j], g_idata[i*N+k]+g_idata[k*N+j]);
// }

// void par_apsp(int N, int *mat) {
//     //copy mat from host to device memory d_mat
//     int* d_mat;
//     int* d_mat_out;
//     int size = sizeof(int) * N * N;
//     cudaMalloc((void**) &d_mat, size);
//     cudaMemcpy(d_mat, mat, size, cudaMemcpyHostToDevice);
//     //allocate matrix to hold temporary result of each iteration to avoid race condition.
//     cudaMalloc((void**) &d_mat_out, size);

//     for (int k = 0; k < N; k++) {
//         apspKernel<<<ceil(N*N/256), 256>>>(N, k, d_mat, d_mat_out);
//         //copy the temporary result back to the matrix
//         cudaMemcpy(d_mat, d_mat_out, size, cudaMemcpyDeviceToDevice);
//     }

//     cudaMemcpy(mat, d_mat, size, cudaMemcpyDeviceToHost);
// }

// __global__ void apspKernel(int N, int k, int *g_data) {
//     const int tid = threadIdx.x;
//     const int bid = blockIdx.x;
//     const int bdim = blockDim.x;

//     const int ij = bid * bdim + tid;
    
//     const int i = ij / N;
//     const int j = ij % N;

//     const int ik = i * N + k;
//     const int kj = k * N + j;
//     const int dik = g_data[ik];
//     const int dkj = g_data[kj];
    
//     if (dik != -1 && dkj != -1) {
//         const int sum = dik + dkj;
//         int& dij = g_data[ij];
//         if (dij == -1 || dij > sum)
//             dij = sum;
//     }
// }

// void par_apsp(int N, int *mat) {
//     int* d_mat;
//     int size = sizeof(int) * N * N;
//     cudaMalloc((void**) &d_mat, size);
//     cudaMemcpy(d_mat, mat, size, cudaMemcpyHostToDevice);
    
//     for (int k = 0; k < N; k++)
//         apspKernel<<<ceil(N*N/256), 256>>>(N, k, d_mat);

//     cudaMemcpy(mat, d_mat, size, cudaMemcpyDeviceToHost);
// }
	.file	"tmpxft_002f75a6_00000000-6_par_apsp_naive.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2011:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2011:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z32__device_stub__Z10apspKerneliiPiiiPi
	.type	_Z32__device_stub__Z10apspKerneliiPiiiPi, @function
_Z32__device_stub__Z10apspKerneliiPiiiPi:
.LFB2033:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movl	%edi, 12(%rsp)
	leaq	24(%rsp), %rcx
	leaq	32(%rsp), %rdi
	movl	%esi, 8(%rsp)
	leaq	44(%rsp), %rsi
	movq	%rdx, (%rsp)
	leaq	16(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	12(%rsp), %rax
	movl	$1, 40(%rsp)
	movq	%rax, 80(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	24(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z10apspKerneliiPi(%rip), %rdi
	pushq	24(%rsp)
	.cfi_def_cfa_offset 144
	movq	60(%rsp), %rcx
	movl	68(%rsp), %r8d
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	leaq	96(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L2:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2033:
	.size	_Z32__device_stub__Z10apspKerneliiPiiiPi, .-_Z32__device_stub__Z10apspKerneliiPiiiPi
	.globl	_Z10apspKerneliiPi
	.type	_Z10apspKerneliiPi, @function
_Z10apspKerneliiPi:
.LFB2034:
	.cfi_startproc
	endbr64
	jmp	_Z32__device_stub__Z10apspKerneliiPiiiPi
	.cfi_endproc
.LFE2034:
	.size	_Z10apspKerneliiPi, .-_Z10apspKerneliiPi
	.globl	_Z8par_apspiPi
	.type	_Z8par_apspiPi, @function
_Z8par_apspiPi:
.LFB2008:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	%edi, %r13d
	imull	%edi, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%rsi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movl	%edi, %ebx
	leal	0(,%r13,4), %ebp
	sarl	$8, %r13d
	movslq	%ebp, %rbp
	subq	$56, %rsp
	.cfi_def_cfa_offset 96
	movq	%rbp, %rsi
	movq	%fs:40, %rax
	movq	%rax, 40(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rdi
	movq	%rbp, %rdx
	movq	%r12, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movl	$1, 36(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 20(%rsp)
	addq	$255, %rax
	movq	%rax, 28(%rsp)
	movl	%r13d, 16(%rsp)
	xorl	%r13d, %r13d
.L9:
	cmpl	%ebx, %r13d
	jge	.L14
	movl	36(%rsp), %ecx
	movq	28(%rsp), %rdx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	16(%rsp), %rdi
	movl	24(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L10
	movq	8(%rsp), %rdx
	movl	%r13d, %esi
	movl	%ebx, %edi
	call	_Z32__device_stub__Z10apspKerneliiPiiiPi
.L10:
	incl	%r13d
	jmp	.L9
.L14:
	movq	8(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbp, %rdx
	movq	%r12, %rdi
	call	cudaMemcpy@PLT
	movq	40(%rsp), %rax
	subq	%fs:40, %rax
	je	.L12
	call	__stack_chk_fail@PLT
.L12:
	addq	$56, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2008:
	.size	_Z8par_apspiPi, .-_Z8par_apspiPi
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z10apspKerneliiPi"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2036:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z10apspKerneliiPi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2036:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#define BLOCK_SIZE 256

__global__ void apspKernel(const int N, const int k, int *global_mat) {
    const int ij = blockIdx.x * BLOCK_SIZE + threadIdx.x;
    const int i = ij / N;
    const int ik = i * N + k;
    const int kj = ij + (k - i) * N;
    const int dik = global_mat[ik];
    const int dkj = global_mat[kj];

    if (dik != -1 && dkj != -1) {
        const int sum = dik + dkj;
        int& dij = global_mat[ij];
        if (dij == -1 || dij > sum)
            dij = sum;
    }
}

void par_apsp(int N, int *mat) {
    int *global_mat, size = sizeof(int) * N * N;
    hipMalloc(&global_mat, size);
    hipMemcpy(global_mat, mat, size, hipMemcpyHostToDevice);

    dim3 dimGrid(N * N / BLOCK_SIZE, 1, 1);
    dim3 dimBlock(BLOCK_SIZE, 1, 1);

    for (int k = 0; k < N; k++)
        apspKernel<<<dimGrid, dimBlock>>>(N, k, global_mat);

    hipMemcpy(mat, global_mat, size, hipMemcpyDeviceToHost);
}

// __global__ void apspKernel(int N, int k, int *g_idata, int *g_odata) {
//     // access thread id
//     const unsigned int tid = threadIdx.x;
//     // access block id
//     const unsigned int bid = blockIdx.x;
//     // access number of threads in this block
//     const unsigned int bdim = blockDim.x;

//     const unsigned int i = (bid * bdim + tid)/N;
//     const unsigned int j = (bid * bdim + tid)%N;

//     if (g_idata[i*N+k] == -1 || g_idata[k*N+j] == -1) g_odata[i*N+j] = g_idata[i*N+j];
//     else if (g_idata[i*N+j] == -1) g_odata[i*N+j] = g_idata[i*N+k]+g_idata[k*N+j];
//     else g_odata[i*N+j] = min(g_idata[i*N+j], g_idata[i*N+k]+g_idata[k*N+j]);
// }

// void par_apsp(int N, int *mat) {
//     //copy mat from host to device memory d_mat
//     int* d_mat;
//     int* d_mat_out;
//     int size = sizeof(int) * N * N;
//     cudaMalloc((void**) &d_mat, size);
//     cudaMemcpy(d_mat, mat, size, cudaMemcpyHostToDevice);
//     //allocate matrix to hold temporary result of each iteration to avoid race condition.
//     cudaMalloc((void**) &d_mat_out, size);

//     for (int k = 0; k < N; k++) {
//         apspKernel<<<ceil(N*N/256), 256>>>(N, k, d_mat, d_mat_out);
//         //copy the temporary result back to the matrix
//         cudaMemcpy(d_mat, d_mat_out, size, cudaMemcpyDeviceToDevice);
//     }

//     cudaMemcpy(mat, d_mat, size, cudaMemcpyDeviceToHost);
// }

// __global__ void apspKernel(int N, int k, int *g_data) {
//     const int tid = threadIdx.x;
//     const int bid = blockIdx.x;
//     const int bdim = blockDim.x;

//     const int ij = bid * bdim + tid;
    
//     const int i = ij / N;
//     const int j = ij % N;

//     const int ik = i * N + k;
//     const int kj = k * N + j;
//     const int dik = g_data[ik];
//     const int dkj = g_data[kj];
    
//     if (dik != -1 && dkj != -1) {
//         const int sum = dik + dkj;
//         int& dij = g_data[ij];
//         if (dij == -1 || dij > sum)
//             dij = sum;
//     }
// }

// void par_apsp(int N, int *mat) {
//     int* d_mat;
//     int size = sizeof(int) * N * N;
//     cudaMalloc((void**) &d_mat, size);
//     cudaMemcpy(d_mat, mat, size, cudaMemcpyHostToDevice);
    
//     for (int k = 0; k < N; k++)
//         apspKernel<<<ceil(N*N/256), 256>>>(N, k, d_mat);

//     cudaMemcpy(mat, d_mat, size, cudaMemcpyDeviceToHost);
// }
	.text
	.file	"par_apsp_naive.hip"
	.globl	_Z25__device_stub__apspKerneliiPi # -- Begin function _Z25__device_stub__apspKerneliiPi
	.type	_Z25__device_stub__apspKerneliiPi,@function
_Z25__device_stub__apspKerneliiPi:      # @_Z25__device_stub__apspKerneliiPi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$96, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	4(%rsp), %rax
	movl	%edi, (%rax)
	movq	%rsp, %rcx
	movl	%esi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10apspKerneliiPi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$112, %rsp
	.cfi_adjust_cfa_offset -112
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z25__device_stub__apspKerneliiPi, .Lfunc_end0-_Z25__device_stub__apspKerneliiPi
	.cfi_endproc
                                        # -- End function
	.globl	_Z8par_apspiPi                  # -- Begin function _Z8par_apspiPi
	.type	_Z8par_apspiPi,@function
_Z8par_apspiPi:                         # @_Z8par_apspiPi
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %rbx
	movl	%edi, %ebp
	movl	%edi, %r15d
	imull	%r15d, %r15d
	leal	(,%r15,4), %eax
	movslq	%eax, %r14
	movq	%rsp, %r12
	movq	%r12, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movq	(%r12), %rdi
	movq	%rbx, %rsi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%ebp, %ebp
	jle	.LBB1_5
# %bb.1:                                # %.lr.ph.preheader
	movabsq	$4294967296, %r12               # imm = 0x100000000
	shrl	$8, %r15d
	btsq	$32, %r15
	xorl	%r13d, %r13d
	addq	$256, %r12                      # imm = 0x100
.LBB1_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movq	%r15, %rdi
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_4
# %bb.3:                                #   in Loop: Header=BB1_2 Depth=1
	movq	(%rsp), %rdx
	movl	%ebp, %edi
	movl	%r13d, %esi
	callq	_Z25__device_stub__apspKerneliiPi
.LBB1_4:                                #   in Loop: Header=BB1_2 Depth=1
	incl	%r13d
	cmpl	%r13d, %ebp
	jne	.LBB1_2
.LBB1_5:                                # %._crit_edge
	movq	(%rsp), %rsi
	movq	%rbx, %rdi
	movq	%r14, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z8par_apspiPi, .Lfunc_end1-_Z8par_apspiPi
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10apspKerneliiPi, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z10apspKerneliiPi,@object      # @_Z10apspKerneliiPi
	.section	.rodata,"a",@progbits
	.globl	_Z10apspKerneliiPi
	.p2align	3, 0x0
_Z10apspKerneliiPi:
	.quad	_Z25__device_stub__apspKerneliiPi
	.size	_Z10apspKerneliiPi, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z10apspKerneliiPi"
	.size	.L__unnamed_1, 19

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z25__device_stub__apspKerneliiPi
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z10apspKerneliiPi
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z10apspKerneliiPi      ; -- Begin function _Z10apspKerneliiPi
	.globl	_Z10apspKerneliiPi
	.p2align	8
	.type	_Z10apspKerneliiPi,@function
_Z10apspKerneliiPi:                     ; @_Z10apspKerneliiPi
; %bb.0:
	s_load_b128 s[0:3], s[0:1], 0x0
	v_lshl_add_u32 v0, s15, 8, v0
	s_waitcnt lgkmcnt(0)
	s_ashr_i32 s4, s0, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s5, s0, s4
	s_xor_b32 s5, s5, s4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cvt_f32_u32_e32 v1, s5
	s_sub_i32 s6, 0, s5
	v_rcp_iflag_f32_e32 v1, v1
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v1, 0x4f7ffffe, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cvt_u32_f32_e32 v2, v1
	v_ashrrev_i32_e32 v1, 31, v0
	v_mul_lo_u32 v3, s6, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v4, v0, v1
	v_xor_b32_e32 v4, v4, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v3, v2, v3
	v_add_nc_u32_e32 v2, v2, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v2, v4, v2
	v_mul_lo_u32 v3, v2, s5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v3, v4, v3
	v_subrev_nc_u32_e32 v5, s5, v3
	v_cmp_le_u32_e32 vcc_lo, s5, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v3, v3, v5 :: v_dual_add_nc_u32 v4, 1, v2
	v_cndmask_b32_e32 v2, v2, v4, vcc_lo
	v_xor_b32_e32 v5, s4, v1
	s_mov_b32 s4, s1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_le_u32_e32 vcc_lo, s5, v3
	v_add_nc_u32_e32 v4, 1, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v2, v2, v4, vcc_lo
	v_xor_b32_e32 v2, v2, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v4, v2, v5
	v_sub_nc_u32_e32 v6, s1, v4
	v_mad_u64_u32 v[2:3], null, v4, s0, s[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[4:5], null, v6, s0, v[0:1]
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v5, 31, v4
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	v_add_co_u32 v2, vcc_lo, s2, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
	v_add_co_u32 v4, vcc_lo, s2, v4
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v5, vcc_lo, s3, v5, vcc_lo
	s_clause 0x1
	global_load_b32 v2, v[2:3], off
	global_load_b32 v3, v[4:5], off
	s_waitcnt vmcnt(1)
	v_cmp_ne_u32_e32 vcc_lo, -1, v2
	s_waitcnt vmcnt(0)
	v_cmp_ne_u32_e64 s0, -1, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, vcc_lo, s0
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB0_3
; %bb.1:
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	v_add_nc_u32_e32 v2, v3, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	global_load_b32 v4, v[0:1], off
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, -1, v4
	v_cmp_gt_i32_e64 s0, v4, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s0, vcc_lo, s0
	s_and_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB0_3
; %bb.2:
	global_store_b32 v[0:1], v2, off
.LBB0_3:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10apspKerneliiPi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 16
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z10apspKerneliiPi, .Lfunc_end0-_Z10apspKerneliiPi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 436
; NumSgprs: 18
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .offset:         4
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 16
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z10apspKerneliiPi
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z10apspKerneliiPi.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     7
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
