#include <stdio.h>
#include <stdlib.h>
#include <math.h>
#include <float.h>
#include <string.h>
// Kernel function to add the elements of two arrays

#define ALPHA 5.1
#define BETA 0.15
#define RHO 0.6
#define Q 5.0

__global__
void calcDenom(int N, float *p, float *tau, float *dist,float *denominator, int *connections)
{
  int index = blockIdx.x * blockDim.x + threadIdx.x;
  int stride = blockDim.x * gridDim.x;

  for(int r = index; r < N; r += stride)
  {
    //probability denominator
    denominator[r] = 0;
    for(int s = 0; s < N; s++)
    {
        denominator[r] += pow(tau[r*N + s], ALPHA)*pow((1/dist[r*N + s]), BETA)*connections[r*N + s];
    }
  }
}
__global__
void calcProb(int N, float *p, float *tau, float *dist,float *denominator, int *connections)
{
  int index = blockIdx.x * blockDim.x + threadIdx.x;
  int stride = blockDim.x * gridDim.x;

  for(int r = index; r < N*N; r += stride)
  {
    if(denominator[(int) r/N] != 0)
    {
      p[r] = (pow(tau[r], ALPHA)*pow((1/dist[r]), BETA)*connections[r])/denominator[(int) r/N];
    }
    else
    {
      p[r] = -1;
    }

  }
}
__global__
void setZeros(int N, float *p, float *tau,float *dtau, float *dist,float *denominator, int *connections)
{
  int index = blockIdx.x * blockDim.x + threadIdx.x;
  int stride = blockDim.x * gridDim.x;

  for(int r = index; r < N*N; r += stride)
  {
    connections[r] = 0;
    tau[r] = 1.0;
    dtau[r] = 0;
    dist[r] = 1.0;
    p[r] = 0;
  }
}

__global__
void clearTau(int N, float *tau,float *dtau)
{
  int index = blockIdx.x * blockDim.x + threadIdx.x;
  int stride = blockDim.x * gridDim.x;

  for(int r = index; r < N*N; r += stride)
  {
    tau[r] = dtau[r] + (1-RHO)*tau[r] +1;
    dtau[r] = 0;
  }
}

void read_csv(int row, int col, char *filename, double **data){
	FILE *file;
	file = fopen(filename, "r");

	int i = 0;
  char line[100];

	while (fgets(line, 4098, file) && (i < row))
	  {
	    char* tmp = strdup(line);
	    int j = 0;

	    char *token;

	    /* get the first token */
	    token = strtok(line, " ");

	    /* walk through other tokens */
	    while( token != NULL ) {
	      data[i][j] = atof(token);
	      token = strtok(NULL, " ");
	      j++;
	    }
	    free(tmp);
	    i++;
	  }

}

void readEdges(int N, int row, int col, char *filename, int *connections, float *dist){
  double **dataEdges;
  dataEdges = (double **)malloc(row * sizeof(double *));
  for (int i = 0; i < row; ++i){
    dataEdges[i] = (double *)malloc(col * sizeof(double));
  }

  read_csv(row, col, filename, dataEdges);

  for(int i = 0; i < row; i++)
  {
      connections[((int) dataEdges[i][1])*N + (int) dataEdges[i][2]] = 1;
      dist[(int) dataEdges[i][1] *N + (int) dataEdges[i][2]] = dataEdges[i][3];
  }

  free(dataEdges);

}

int main(void)
{
  //CONSTANTS
  const int NR_OF_DATAPOINTS = 1363;
  const int NR_OF_EDGES = 3977;
  const int NR_OF_ITERATIONS = 5;
  const int NR_OF_ANTS = 20;

  const int NR_OF_BLOCKS = 4096;
  const int NR_OF_THREADS = 512;
  const int start = 1;
  const int destination = 250;

  //MEMORY ALLOCATION
  float *tau, *dtau, *dist, *p;
  int *connections, *numOfConnections;
  float *denominator;
  cudaMallocManaged(&tau, NR_OF_DATAPOINTS*NR_OF_DATAPOINTS*sizeof(float));
  cudaMallocManaged(&dtau, NR_OF_DATAPOINTS*NR_OF_DATAPOINTS*sizeof(float));
  cudaMallocManaged(&dist, NR_OF_DATAPOINTS*NR_OF_DATAPOINTS*sizeof(float));
  cudaMallocManaged(&p, NR_OF_DATAPOINTS*NR_OF_DATAPOINTS*sizeof(float));
  cudaMallocManaged(&connections, NR_OF_DATAPOINTS*NR_OF_DATAPOINTS*sizeof(int));
  cudaMallocManaged(&denominator, NR_OF_DATAPOINTS*sizeof(float));
  cudaMallocManaged(&numOfConnections, NR_OF_DATAPOINTS*sizeof(int));

  setZeros<<<NR_OF_BLOCKS, NR_OF_THREADS>>>(NR_OF_DATAPOINTS, p, tau, dtau, dist,denominator, connections);
  cudaDeviceSynchronize();

  int route [NR_OF_ANTS][200];
  float length [NR_OF_ANTS];
  float lengthMin [NR_OF_ANTS];
  //READ EDGES
  int col     = 6;
  char fname[256] = "dist.csv";

  readEdges(NR_OF_DATAPOINTS, NR_OF_EDGES, col, fname, connections, dist);

  //count the connections of nodes
  for(int r = 0; r < NR_OF_DATAPOINTS; r++)
  {
      numOfConnections[r] = 0;
      for(int s = 0; s < NR_OF_DATAPOINTS; s++)
      {
          numOfConnections[r] += connections[NR_OF_DATAPOINTS*r + s];
      }
  }

  //iteration
  float roulette = 0;
  float sumP = 0;
  int selection = 0;
  int current = 0;
  int step = 0;


  for(int i = 0; i < NR_OF_ITERATIONS; i++)
  {
    clearTau<<<NR_OF_BLOCKS, NR_OF_THREADS>>>(NR_OF_DATAPOINTS, tau, dtau);
    cudaDeviceSynchronize();
    //"create ants"
    for(int ant = 0; ant < NR_OF_ANTS; ant++)
    {
        route[ant][0] = start;
        length[ant] = 0;
        lengthMin[ant] = FLT_MAX;

        calcDenom<<<NR_OF_BLOCKS, NR_OF_THREADS>>>(NR_OF_DATAPOINTS, p, tau, dist,denominator, connections);
        cudaDeviceSynchronize();

        //calculate probabilities
        calcProb<<<NR_OF_BLOCKS, NR_OF_THREADS>>>(NR_OF_DATAPOINTS, p, tau, dist,denominator, connections);
        cudaDeviceSynchronize();

        //start an ant
        step = 0;
        while(step < 200)
        {
            //ROULETTE
            current = route[ant][step];

            do
            {
              roulette = (double) rand() / (double) RAND_MAX;
              sumP = 0;
              selection = -1;
              for(int s = 0; s < NR_OF_DATAPOINTS; s++)
              {

                  sumP += p[route[ant][step]*NR_OF_DATAPOINTS + s];
                if(roulette < sumP)
                  {
                      selection = s;
                      break;
                  }
              }
            }while (selection == route[ant][step - 1] && numOfConnections[current] != 1);

            if(selection == destination)
            {
                printf("\ntalalat\n");

                for(int ii = 0; ii <=step ; ii++)
                {
                  printf("-> %d ", route[ant][ii]);
                }
                printf("\n\n");
                step++;
                route[ant][step] = selection;
                length[ant] += dist[route[ant][step - 1]*NR_OF_DATAPOINTS + route[ant][step]];
                break;
            }

            if(numOfConnections[selection] <= 1)
            {
                connections[current*NR_OF_DATAPOINTS + selection] = 0;
                connections[selection*NR_OF_DATAPOINTS + current] = 0;
                numOfConnections[current] = numOfConnections[current] - numOfConnections[selection];
                numOfConnections[selection] = 0;
            }
            else
            {
                //step forward
                step++;
                route[ant][step] = selection;
                length[ant] += dist[route[ant][step - 1]*NR_OF_DATAPOINTS + route[ant][step]];
                //feromon
                dtau[current*NR_OF_DATAPOINTS + selection] += Q/length[ant];

            }
        }
    }
  }

  cudaFree(denominator);
  cudaFree(tau);
  cudaFree(dtau);
  cudaFree(dist);
  cudaFree(p);
  cudaFree(connections);
  cudaFree(numOfConnections);

}

	.file	"tmpxft_0024a0b5_00000000-6_maincuda.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2032:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2032:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"r"
.LC1:
	.string	" "
	.text
	.globl	_Z8read_csviiPcPPd
	.type	_Z8read_csviiPcPPd, @function
_Z8read_csviiPcPPd:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	leaq	.LC0(%rip), %rsi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rcx, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movl	%edi, %r13d
	movq	%rdx, %rdi
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	xorl	%ebx, %ebx
	subq	$136, %rsp
	.cfi_def_cfa_offset 192
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	call	fopen@PLT
	movq	%rax, %r12
.L3:
	leaq	20(%rsp), %r15
	movq	%r12, %rcx
	movl	$4098, %edx
	movl	$100, %esi
	movq	%r15, %rdi
	call	__fgets_chk@PLT
	cmpl	%ebx, %r13d
	jle	.L2
	testq	%rax, %rax
	je	.L2
	movq	%r15, %rdi
	xorl	%ebp, %ebp
	call	strdup@PLT
	leaq	.LC1(%rip), %rsi
	movq	%r15, %rdi
	movq	%rax, 8(%rsp)
	call	strtok@PLT
.L6:
	testq	%rax, %rax
	je	.L16
	movq	(%r14,%rbx,8), %r15
	movq	%rax, %rdi
	call	atof@PLT
	leaq	.LC1(%rip), %rsi
	xorl	%edi, %edi
	addq	%rbp, %r15
	addq	$8, %rbp
	movsd	%xmm0, (%r15)
	call	strtok@PLT
	jmp	.L6
.L16:
	movq	8(%rsp), %rdi
	incq	%rbx
	call	free@PLT
	jmp	.L3
.L2:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L7
	call	__stack_chk_fail@PLT
.L7:
	addq	$136, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z8read_csviiPcPPd, .-_Z8read_csviiPcPPd
	.globl	_Z9readEdgesiiiPcPiPf
	.type	_Z9readEdgesiiiPcPiPf, @function
_Z9readEdgesiiiPcPiPf:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%r9, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%r8, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%edi, %r12d
	movslq	%esi, %rdi
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	xorl	%ebp, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rdi, %rbx
	salq	$3, %rdi
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	movl	%edx, 12(%rsp)
	movq	%rcx, 24(%rsp)
	call	malloc@PLT
	movq	%rax, %r15
	movslq	12(%rsp), %rax
	salq	$3, %rax
	movq	%rax, 16(%rsp)
.L18:
	cmpl	%ebp, %ebx
	jle	.L23
	movq	16(%rsp), %rdi
	call	malloc@PLT
	movq	%rax, (%r15,%rbp,8)
	incq	%rbp
	jmp	.L18
.L23:
	movq	24(%rsp), %rdx
	movl	12(%rsp), %esi
	movq	%r15, %rcx
	movl	%ebx, %edi
	call	_Z8read_csviiPcPPd
	xorl	%edx, %edx
.L20:
	cmpl	%edx, %ebx
	jle	.L24
	movq	(%r15,%rdx,8), %rsi
	incq	%rdx
	cvttsd2sil	8(%rsi), %eax
	cvtsd2ss	24(%rsi), %xmm0
	cvttsd2sil	16(%rsi), %edi
	imull	%r12d, %eax
	addl	%edi, %eax
	cltq
	movl	$1, 0(%r13,%rax,4)
	movss	%xmm0, (%r14,%rax,4)
	jmp	.L20
.L24:
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	movq	%r15, %rdi
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	free@PLT
	.cfi_endproc
.LFE2028:
	.size	_Z9readEdgesiiiPcPiPf, .-_Z9readEdgesiiiPcPiPf
	.globl	_Z37__device_stub__Z9calcDenomiPfS_S_S_PiiPfS_S_S_Pi
	.type	_Z37__device_stub__Z9calcDenomiPfS_S_S_PiiPfS_S_S_Pi, @function
_Z37__device_stub__Z9calcDenomiPfS_S_S_PiiPfS_S_S_Pi:
.LFB2054:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movl	%edi, 44(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	64(%rsp), %rcx
	movq	%r8, 8(%rsp)
	movq	%r9, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	44(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 152(%rsp)
	movq	%rsp, %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L25
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z9calcDenomiPfS_S_S_Pi(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L25:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L27
	call	__stack_chk_fail@PLT
.L27:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2054:
	.size	_Z37__device_stub__Z9calcDenomiPfS_S_S_PiiPfS_S_S_Pi, .-_Z37__device_stub__Z9calcDenomiPfS_S_S_PiiPfS_S_S_Pi
	.globl	_Z9calcDenomiPfS_S_S_Pi
	.type	_Z9calcDenomiPfS_S_S_Pi, @function
_Z9calcDenomiPfS_S_S_Pi:
.LFB2055:
	.cfi_startproc
	endbr64
	jmp	_Z37__device_stub__Z9calcDenomiPfS_S_S_PiiPfS_S_S_Pi
	.cfi_endproc
.LFE2055:
	.size	_Z9calcDenomiPfS_S_S_Pi, .-_Z9calcDenomiPfS_S_S_Pi
	.globl	_Z36__device_stub__Z8calcProbiPfS_S_S_PiiPfS_S_S_Pi
	.type	_Z36__device_stub__Z8calcProbiPfS_S_S_PiiPfS_S_S_Pi, @function
_Z36__device_stub__Z8calcProbiPfS_S_S_PiiPfS_S_S_Pi:
.LFB2056:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movl	%edi, 44(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	64(%rsp), %rcx
	movq	%r8, 8(%rsp)
	movq	%r9, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	44(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 152(%rsp)
	movq	%rsp, %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L30
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z8calcProbiPfS_S_S_Pi(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L30:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L32
	call	__stack_chk_fail@PLT
.L32:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2056:
	.size	_Z36__device_stub__Z8calcProbiPfS_S_S_PiiPfS_S_S_Pi, .-_Z36__device_stub__Z8calcProbiPfS_S_S_PiiPfS_S_S_Pi
	.globl	_Z8calcProbiPfS_S_S_Pi
	.type	_Z8calcProbiPfS_S_S_Pi, @function
_Z8calcProbiPfS_S_S_Pi:
.LFB2057:
	.cfi_startproc
	endbr64
	jmp	_Z36__device_stub__Z8calcProbiPfS_S_S_PiiPfS_S_S_Pi
	.cfi_endproc
.LFE2057:
	.size	_Z8calcProbiPfS_S_S_Pi, .-_Z8calcProbiPfS_S_S_Pi
	.globl	_Z38__device_stub__Z8setZerosiPfS_S_S_S_PiiPfS_S_S_S_Pi
	.type	_Z38__device_stub__Z8setZerosiPfS_S_S_S_PiiPfS_S_S_S_Pi, @function
_Z38__device_stub__Z8setZerosiPfS_S_S_S_PiiPfS_S_S_S_Pi:
.LFB2058:
	.cfi_startproc
	endbr64
	subq	$200, %rsp
	.cfi_def_cfa_offset 208
	movq	208(%rsp), %rax
	movl	%edi, 60(%rsp)
	leaq	80(%rsp), %rdi
	movq	%rsi, 48(%rsp)
	leaq	92(%rsp), %rsi
	movq	%rdx, 40(%rsp)
	leaq	64(%rsp), %rdx
	movq	%rcx, 32(%rsp)
	leaq	72(%rsp), %rcx
	movq	%r8, 24(%rsp)
	movq	%r9, 16(%rsp)
	movq	%rax, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 184(%rsp)
	xorl	%eax, %eax
	leaq	60(%rsp), %rax
	movl	$1, 88(%rsp)
	movq	%rax, 128(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 176(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 80(%rsp)
	movq	%rax, 92(%rsp)
	movl	$1, 100(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L35
	pushq	72(%rsp)
	.cfi_def_cfa_offset 216
	leaq	_Z8setZerosiPfS_S_S_S_Pi(%rip), %rdi
	pushq	72(%rsp)
	.cfi_def_cfa_offset 224
	movq	108(%rsp), %rcx
	movl	116(%rsp), %r8d
	movq	96(%rsp), %rsi
	movl	104(%rsp), %edx
	leaq	144(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 216
	popq	%rdx
	.cfi_def_cfa_offset 208
.L35:
	movq	184(%rsp), %rax
	subq	%fs:40, %rax
	je	.L37
	call	__stack_chk_fail@PLT
.L37:
	addq	$200, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2058:
	.size	_Z38__device_stub__Z8setZerosiPfS_S_S_S_PiiPfS_S_S_S_Pi, .-_Z38__device_stub__Z8setZerosiPfS_S_S_S_PiiPfS_S_S_S_Pi
	.globl	_Z8setZerosiPfS_S_S_S_Pi
	.type	_Z8setZerosiPfS_S_S_S_Pi, @function
_Z8setZerosiPfS_S_S_S_Pi:
.LFB2059:
	.cfi_startproc
	endbr64
	jmp	_Z38__device_stub__Z8setZerosiPfS_S_S_S_PiiPfS_S_S_S_Pi
	.cfi_endproc
.LFE2059:
	.size	_Z8setZerosiPfS_S_S_S_Pi, .-_Z8setZerosiPfS_S_S_S_Pi
	.globl	_Z30__device_stub__Z8clearTauiPfS_iPfS_
	.type	_Z30__device_stub__Z8clearTauiPfS_iPfS_, @function
_Z30__device_stub__Z8clearTauiPfS_iPfS_:
.LFB2060:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movl	%edi, 28(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	28(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L40
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z8clearTauiPfS_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L40:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L42
	call	__stack_chk_fail@PLT
.L42:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2060:
	.size	_Z30__device_stub__Z8clearTauiPfS_iPfS_, .-_Z30__device_stub__Z8clearTauiPfS_iPfS_
	.globl	_Z8clearTauiPfS_
	.type	_Z8clearTauiPfS_, @function
_Z8clearTauiPfS_:
.LFB2061:
	.cfi_startproc
	endbr64
	jmp	_Z30__device_stub__Z8clearTauiPfS_iPfS_
	.cfi_endproc
.LFE2061:
	.size	_Z8clearTauiPfS_, .-_Z8clearTauiPfS_
	.section	.rodata.str1.1
.LC4:
	.string	"\ntalalat\n"
.LC5:
	.string	"-> %d "
.LC6:
	.string	"\n\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	leaq	-16384(%rsp), %r11
	.cfi_def_cfa 11, 16440
.LPSRL0:
	subq	$4096, %rsp
	orq	$0, (%rsp)
	cmpq	%r11, %rsp
	jne	.LPSRL0
	.cfi_def_cfa_register 7
	subq	$104, %rsp
	.cfi_def_cfa_offset 16544
	movl	$1, %edx
	movl	$7431076, %esi
	movq	%fs:40, %rax
	movq	%rax, 16472(%rsp)
	xorl	%eax, %eax
	leaq	56(%rsp), %rdi
	call	cudaMallocManaged@PLT
	leaq	64(%rsp), %rdi
	movl	$1, %edx
	movl	$7431076, %esi
	call	cudaMallocManaged@PLT
	leaq	72(%rsp), %rdi
	movl	$1, %edx
	movl	$7431076, %esi
	call	cudaMallocManaged@PLT
	leaq	80(%rsp), %rdi
	movl	$1, %edx
	movl	$7431076, %esi
	call	cudaMallocManaged@PLT
	leaq	88(%rsp), %rdi
	movl	$1, %edx
	movl	$7431076, %esi
	call	cudaMallocManaged@PLT
	leaq	104(%rsp), %rdi
	movl	$1, %edx
	movl	$5452, %esi
	call	cudaMallocManaged@PLT
	leaq	96(%rsp), %rdi
	movl	$1, %edx
	movl	$5452, %esi
	call	cudaMallocManaged@PLT
	movl	$8388609, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1048577, %edi
	salq	$9, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	salq	$12, %rdi
	movq	%rdx, 124(%rsp)
	movl	$1, 132(%rsp)
	movq	%rdi, 112(%rsp)
	movl	$1, 120(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L46
	pushq	%rcx
	.cfi_def_cfa_offset 16552
	movl	$1363, %edi
	pushq	96(%rsp)
	.cfi_def_cfa_offset 16560
	movq	120(%rsp), %r9
	movq	88(%rsp), %r8
	movq	80(%rsp), %rcx
	movq	72(%rsp), %rdx
	movq	96(%rsp), %rsi
	call	_Z38__device_stub__Z8setZerosiPfS_S_S_S_PiiPfS_S_S_S_Pi
	popq	%rsi
	.cfi_def_cfa_offset 16552
	popq	%rdi
	.cfi_def_cfa_offset 16544
.L46:
	call	cudaDeviceSynchronize@PLT
	xorl	%edx, %edx
	movabsq	$8535274769970588004, %rax
	movq	72(%rsp), %r9
	movq	88(%rsp), %r8
	movl	$60, %ecx
	movq	%rax, 16216(%rsp)
	xorl	%eax, %eax
	leaq	16232(%rsp), %rdi
	movq	%rdx, 16224(%rsp)
	movl	$3977, %esi
	movl	$6, %edx
	rep stosl
	leaq	16216(%rsp), %rcx
	movl	$1363, %edi
	call	_Z9readEdgesiiiPcPiPf
	movq	96(%rsp), %rcx
	movq	88(%rsp), %rdi
	xorl	%eax, %eax
.L48:
	imulq	$5452, %rax, %rsi
	xorl	%edx, %edx
	movl	%edx, (%rcx,%rax,4)
	xorl	%edx, %edx
	addq	%rdi, %rsi
.L47:
	movl	(%rsi,%rdx,4), %r8d
	incq	%rdx
	addl	%r8d, (%rcx,%rax,4)
	cmpq	$1363, %rdx
	jne	.L47
	incq	%rax
	cmpq	$1363, %rax
	jne	.L48
	movl	$5, 4(%rsp)
	movabsq	$4294971392, %r12
.L65:
	movl	$8388609, %eax
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	salq	$9, %rax
	movq	%r12, %rdi
	movl	$1, %esi
	movl	$1, 132(%rsp)
	movq	%rax, %rdx
	movq	%rax, 124(%rsp)
	movq	%r12, 112(%rsp)
	movl	$1, 120(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L49
	movq	64(%rsp), %rdx
	movq	56(%rsp), %rsi
	movl	$1363, %edi
	call	_Z30__device_stub__Z8clearTauiPfS_iPfS_
.L49:
	call	cudaDeviceSynchronize@PLT
	leaq	216(%rsp), %r13
	xorl	%ebp, %ebp
.L64:
	movl	$8388609, %eax
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	salq	$9, %rax
	movq	%r12, %rdi
	movl	$1, %esi
	movslq	%ebp, %r15
	leaq	136(%rsp), %r14
	movl	$1, 0(%r13)
	movq	%rax, %rdx
	movl	$0x00000000, (%r14,%rbp,4)
	movq	%rax, 124(%rsp)
	movl	$1, 132(%rsp)
	movq	%r12, 112(%rsp)
	movl	$1, 120(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L50
	movq	88(%rsp), %r9
	movq	104(%rsp), %r8
	movl	$1363, %edi
	movq	72(%rsp), %rcx
	movq	56(%rsp), %rdx
	movq	80(%rsp), %rsi
	call	_Z37__device_stub__Z9calcDenomiPfS_S_S_PiiPfS_S_S_Pi
.L50:
	call	cudaDeviceSynchronize@PLT
	movl	$8388609, %eax
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$9, %rax
	movl	$1, %ecx
	movq	%r12, %rdi
	movl	$1, %esi
	movq	%rax, %rdx
	movq	%rax, 124(%rsp)
	movl	$1, 132(%rsp)
	movq	%r12, 112(%rsp)
	movl	$1, 120(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L51
	movq	88(%rsp), %r9
	movq	104(%rsp), %r8
	movl	$1363, %edi
	movq	72(%rsp), %rcx
	movq	56(%rsp), %rdx
	movq	80(%rsp), %rsi
	call	_Z36__device_stub__Z8calcProbiPfS_S_S_PiiPfS_S_S_Pi
.L51:
	call	cudaDeviceSynchronize@PLT
	xorl	%ebx, %ebx
.L63:
	imulq	$200, %r15, %rsi
	movslq	%ebx, %r8
	leaq	(%rsi,%r8), %rax
	movslq	216(%rsp,%rax,4), %rcx
	imull	$1363, %ecx, %edx
	movq	%rcx, %rdi
	salq	$2, %rcx
	movslq	%edx, %rax
	salq	$2, %rax
	movq	%rax, 8(%rsp)
	leal	-1(%rbx), %eax
	cltq
	addq	%rsi, %rax
	movq	%rax, 16(%rsp)
.L56:
	movq	%r8, 40(%rsp)
	movl	%edi, 36(%rsp)
	movq	%rcx, 24(%rsp)
	movl	%edx, 32(%rsp)
	call	rand@PLT
	movl	36(%rsp), %edi
	movl	32(%rsp), %edx
	xorps	%xmm1, %xmm1
	movq	40(%rsp), %r8
	movq	24(%rsp), %rcx
	cvtsi2sdl	%eax, %xmm0
	xorl	%eax, %eax
	movq	8(%rsp), %rsi
	addq	80(%rsp), %rsi
	divsd	.LC3(%rip), %xmm0
	cvtsd2ss	%xmm0, %xmm0
.L53:
	addss	(%rsi,%rax,4), %xmm1
	comiss	%xmm0, %xmm1
	ja	.L54
	incq	%rax
	cmpq	$1363, %rax
	jne	.L53
	orl	$-1, %eax
.L54:
	movq	16(%rsp), %rsi
	cmpl	%eax, 216(%rsp,%rsi,4)
	jne	.L55
	movq	96(%rsp), %rsi
	cmpl	$1, (%rsi,%rcx)
	jne	.L56
.L55:
	cmpl	$250, %eax
	jne	.L57
	leaq	.LC4(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	xorl	%r14d, %r14d
	call	__printf_chk@PLT
.L58:
	cmpl	%r14d, %ebx
	jl	.L77
	movl	0(%r13,%r14,4), %edx
	leaq	.LC5(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	incq	%r14
	call	__printf_chk@PLT
	jmp	.L58
.L77:
	leaq	.LC6(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	incl	%ebx
	call	__printf_chk@PLT
	imulq	$200, %r15, %rax
	movslq	%ebx, %rbx
	addq	%rbx, %rax
	movl	$250, 216(%rsp,%rax,4)
	jmp	.L60
.L57:
	movq	96(%rsp), %r9
	movslq	%eax, %rsi
	addl	%eax, %edx
	movslq	%edx, %rdx
	leaq	(%r9,%rsi,4), %rsi
	leaq	0(,%rdx,4), %r10
	cmpl	$1, (%rsi)
	jg	.L61
	imull	$1363, %eax, %eax
	movq	88(%rsp), %r8
	xorl	%r10d, %r10d
	xorl	%r11d, %r11d
	movl	%r10d, (%r8,%rdx,4)
	addl	%edi, %eax
	cltq
	movl	%r11d, (%r8,%rax,4)
	movl	(%rsi), %eax
	subl	%eax, (%r9,%rcx)
	xorl	%eax, %eax
	movl	%eax, (%rsi)
	jmp	.L63
.L61:
	imulq	$200, %r15, %rdx
	incl	%ebx
	addq	64(%rsp), %r10
	movsd	.LC7(%rip), %xmm2
	movslq	%ebx, %rcx
	cvtss2sd	(%r10), %xmm1
	addq	%rdx, %rcx
	addq	%r8, %rdx
	movl	%eax, 216(%rsp,%rcx,4)
	imull	$1363, 216(%rsp,%rdx,4), %edx
	addl	%edx, %eax
	movq	72(%rsp), %rdx
	cltq
	movss	(%rdx,%rax,4), %xmm0
	addss	(%r14,%rbp,4), %xmm0
	movss	%xmm0, (%r14,%rbp,4)
	cvtss2sd	%xmm0, %xmm0
	divsd	%xmm0, %xmm2
	addsd	%xmm2, %xmm1
	cvtsd2ss	%xmm1, %xmm1
	movss	%xmm1, (%r10)
	cmpl	$200, %ebx
	jne	.L63
.L60:
	incq	%rbp
	addq	$800, %r13
	cmpq	$20, %rbp
	jne	.L64
	decl	4(%rsp)
	jne	.L65
	movq	104(%rsp), %rdi
	call	cudaFree@PLT
	movq	56(%rsp), %rdi
	call	cudaFree@PLT
	movq	64(%rsp), %rdi
	call	cudaFree@PLT
	movq	72(%rsp), %rdi
	call	cudaFree@PLT
	movq	80(%rsp), %rdi
	call	cudaFree@PLT
	movq	88(%rsp), %rdi
	call	cudaFree@PLT
	movq	96(%rsp), %rdi
	call	cudaFree@PLT
	movq	16472(%rsp), %rax
	subq	%fs:40, %rax
	je	.L66
	call	__stack_chk_fail@PLT
.L66:
	addq	$16488, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2029:
	.size	main, .-main
	.section	.rodata.str1.1
.LC8:
	.string	"_Z8clearTauiPfS_"
.LC9:
	.string	"_Z8setZerosiPfS_S_S_S_Pi"
.LC10:
	.string	"_Z8calcProbiPfS_S_S_Pi"
.LC11:
	.string	"_Z9calcDenomiPfS_S_S_Pi"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2063:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC8(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z8clearTauiPfS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC9(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z8setZerosiPfS_S_S_S_Pi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC10(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z8calcProbiPfS_S_S_Pi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC11(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z9calcDenomiPfS_S_S_Pi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2063:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC3:
	.long	-4194304
	.long	1105199103
	.align 8
.LC7:
	.long	0
	.long	1075052544
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <math.h>
#include <float.h>
#include <string.h>
// Kernel function to add the elements of two arrays

#define ALPHA 5.1
#define BETA 0.15
#define RHO 0.6
#define Q 5.0

__global__
void calcDenom(int N, float *p, float *tau, float *dist,float *denominator, int *connections)
{
  int index = blockIdx.x * blockDim.x + threadIdx.x;
  int stride = blockDim.x * gridDim.x;

  for(int r = index; r < N; r += stride)
  {
    //probability denominator
    denominator[r] = 0;
    for(int s = 0; s < N; s++)
    {
        denominator[r] += pow(tau[r*N + s], ALPHA)*pow((1/dist[r*N + s]), BETA)*connections[r*N + s];
    }
  }
}
__global__
void calcProb(int N, float *p, float *tau, float *dist,float *denominator, int *connections)
{
  int index = blockIdx.x * blockDim.x + threadIdx.x;
  int stride = blockDim.x * gridDim.x;

  for(int r = index; r < N*N; r += stride)
  {
    if(denominator[(int) r/N] != 0)
    {
      p[r] = (pow(tau[r], ALPHA)*pow((1/dist[r]), BETA)*connections[r])/denominator[(int) r/N];
    }
    else
    {
      p[r] = -1;
    }

  }
}
__global__
void setZeros(int N, float *p, float *tau,float *dtau, float *dist,float *denominator, int *connections)
{
  int index = blockIdx.x * blockDim.x + threadIdx.x;
  int stride = blockDim.x * gridDim.x;

  for(int r = index; r < N*N; r += stride)
  {
    connections[r] = 0;
    tau[r] = 1.0;
    dtau[r] = 0;
    dist[r] = 1.0;
    p[r] = 0;
  }
}

__global__
void clearTau(int N, float *tau,float *dtau)
{
  int index = blockIdx.x * blockDim.x + threadIdx.x;
  int stride = blockDim.x * gridDim.x;

  for(int r = index; r < N*N; r += stride)
  {
    tau[r] = dtau[r] + (1-RHO)*tau[r] +1;
    dtau[r] = 0;
  }
}

void read_csv(int row, int col, char *filename, double **data){
	FILE *file;
	file = fopen(filename, "r");

	int i = 0;
  char line[100];

	while (fgets(line, 4098, file) && (i < row))
	  {
	    char* tmp = strdup(line);
	    int j = 0;

	    char *token;

	    /* get the first token */
	    token = strtok(line, " ");

	    /* walk through other tokens */
	    while( token != NULL ) {
	      data[i][j] = atof(token);
	      token = strtok(NULL, " ");
	      j++;
	    }
	    free(tmp);
	    i++;
	  }

}

void readEdges(int N, int row, int col, char *filename, int *connections, float *dist){
  double **dataEdges;
  dataEdges = (double **)malloc(row * sizeof(double *));
  for (int i = 0; i < row; ++i){
    dataEdges[i] = (double *)malloc(col * sizeof(double));
  }

  read_csv(row, col, filename, dataEdges);

  for(int i = 0; i < row; i++)
  {
      connections[((int) dataEdges[i][1])*N + (int) dataEdges[i][2]] = 1;
      dist[(int) dataEdges[i][1] *N + (int) dataEdges[i][2]] = dataEdges[i][3];
  }

  free(dataEdges);

}

int main(void)
{
  //CONSTANTS
  const int NR_OF_DATAPOINTS = 1363;
  const int NR_OF_EDGES = 3977;
  const int NR_OF_ITERATIONS = 5;
  const int NR_OF_ANTS = 20;

  const int NR_OF_BLOCKS = 4096;
  const int NR_OF_THREADS = 512;
  const int start = 1;
  const int destination = 250;

  //MEMORY ALLOCATION
  float *tau, *dtau, *dist, *p;
  int *connections, *numOfConnections;
  float *denominator;
  hipMallocManaged(&tau, NR_OF_DATAPOINTS*NR_OF_DATAPOINTS*sizeof(float));
  hipMallocManaged(&dtau, NR_OF_DATAPOINTS*NR_OF_DATAPOINTS*sizeof(float));
  hipMallocManaged(&dist, NR_OF_DATAPOINTS*NR_OF_DATAPOINTS*sizeof(float));
  hipMallocManaged(&p, NR_OF_DATAPOINTS*NR_OF_DATAPOINTS*sizeof(float));
  hipMallocManaged(&connections, NR_OF_DATAPOINTS*NR_OF_DATAPOINTS*sizeof(int));
  hipMallocManaged(&denominator, NR_OF_DATAPOINTS*sizeof(float));
  hipMallocManaged(&numOfConnections, NR_OF_DATAPOINTS*sizeof(int));

  setZeros<<<NR_OF_BLOCKS, NR_OF_THREADS>>>(NR_OF_DATAPOINTS, p, tau, dtau, dist,denominator, connections);
  hipDeviceSynchronize();

  int route [NR_OF_ANTS][200];
  float length [NR_OF_ANTS];
  float lengthMin [NR_OF_ANTS];
  //READ EDGES
  int col     = 6;
  char fname[256] = "dist.csv";

  readEdges(NR_OF_DATAPOINTS, NR_OF_EDGES, col, fname, connections, dist);

  //count the connections of nodes
  for(int r = 0; r < NR_OF_DATAPOINTS; r++)
  {
      numOfConnections[r] = 0;
      for(int s = 0; s < NR_OF_DATAPOINTS; s++)
      {
          numOfConnections[r] += connections[NR_OF_DATAPOINTS*r + s];
      }
  }

  //iteration
  float roulette = 0;
  float sumP = 0;
  int selection = 0;
  int current = 0;
  int step = 0;


  for(int i = 0; i < NR_OF_ITERATIONS; i++)
  {
    clearTau<<<NR_OF_BLOCKS, NR_OF_THREADS>>>(NR_OF_DATAPOINTS, tau, dtau);
    hipDeviceSynchronize();
    //"create ants"
    for(int ant = 0; ant < NR_OF_ANTS; ant++)
    {
        route[ant][0] = start;
        length[ant] = 0;
        lengthMin[ant] = FLT_MAX;

        calcDenom<<<NR_OF_BLOCKS, NR_OF_THREADS>>>(NR_OF_DATAPOINTS, p, tau, dist,denominator, connections);
        hipDeviceSynchronize();

        //calculate probabilities
        calcProb<<<NR_OF_BLOCKS, NR_OF_THREADS>>>(NR_OF_DATAPOINTS, p, tau, dist,denominator, connections);
        hipDeviceSynchronize();

        //start an ant
        step = 0;
        while(step < 200)
        {
            //ROULETTE
            current = route[ant][step];

            do
            {
              roulette = (double) rand() / (double) RAND_MAX;
              sumP = 0;
              selection = -1;
              for(int s = 0; s < NR_OF_DATAPOINTS; s++)
              {

                  sumP += p[route[ant][step]*NR_OF_DATAPOINTS + s];
                if(roulette < sumP)
                  {
                      selection = s;
                      break;
                  }
              }
            }while (selection == route[ant][step - 1] && numOfConnections[current] != 1);

            if(selection == destination)
            {
                printf("\ntalalat\n");

                for(int ii = 0; ii <=step ; ii++)
                {
                  printf("-> %d ", route[ant][ii]);
                }
                printf("\n\n");
                step++;
                route[ant][step] = selection;
                length[ant] += dist[route[ant][step - 1]*NR_OF_DATAPOINTS + route[ant][step]];
                break;
            }

            if(numOfConnections[selection] <= 1)
            {
                connections[current*NR_OF_DATAPOINTS + selection] = 0;
                connections[selection*NR_OF_DATAPOINTS + current] = 0;
                numOfConnections[current] = numOfConnections[current] - numOfConnections[selection];
                numOfConnections[selection] = 0;
            }
            else
            {
                //step forward
                step++;
                route[ant][step] = selection;
                length[ant] += dist[route[ant][step - 1]*NR_OF_DATAPOINTS + route[ant][step]];
                //feromon
                dtau[current*NR_OF_DATAPOINTS + selection] += Q/length[ant];

            }
        }
    }
  }

  hipFree(denominator);
  hipFree(tau);
  hipFree(dtau);
  hipFree(dist);
  hipFree(p);
  hipFree(connections);
  hipFree(numOfConnections);

}

	.text
	.file	"maincuda.hip"
	.globl	_Z24__device_stub__calcDenomiPfS_S_S_Pi # -- Begin function _Z24__device_stub__calcDenomiPfS_S_S_Pi
	.type	_Z24__device_stub__calcDenomiPfS_S_S_Pi,@function
_Z24__device_stub__calcDenomiPfS_S_S_Pi: # @_Z24__device_stub__calcDenomiPfS_S_S_Pi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	4(%rsp), %rax
	movl	%edi, (%rax)
	leaq	56(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	48(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	32(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	24(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9calcDenomiPfS_S_S_Pi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z24__device_stub__calcDenomiPfS_S_S_Pi, .Lfunc_end0-_Z24__device_stub__calcDenomiPfS_S_S_Pi
	.cfi_endproc
                                        # -- End function
	.globl	_Z23__device_stub__calcProbiPfS_S_S_Pi # -- Begin function _Z23__device_stub__calcProbiPfS_S_S_Pi
	.type	_Z23__device_stub__calcProbiPfS_S_S_Pi,@function
_Z23__device_stub__calcProbiPfS_S_S_Pi: # @_Z23__device_stub__calcProbiPfS_S_S_Pi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	4(%rsp), %rax
	movl	%edi, (%rax)
	leaq	56(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	48(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	32(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	24(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z8calcProbiPfS_S_S_Pi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z23__device_stub__calcProbiPfS_S_S_Pi, .Lfunc_end1-_Z23__device_stub__calcProbiPfS_S_S_Pi
	.cfi_endproc
                                        # -- End function
	.globl	_Z23__device_stub__setZerosiPfS_S_S_S_Pi # -- Begin function _Z23__device_stub__setZerosiPfS_S_S_S_Pi
	.type	_Z23__device_stub__setZerosiPfS_S_S_S_Pi,@function
_Z23__device_stub__setZerosiPfS_S_S_S_Pi: # @_Z23__device_stub__setZerosiPfS_S_S_S_Pi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	4(%rsp), %rax
	movl	%edi, (%rax)
	leaq	56(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	48(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	32(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	24(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z8setZerosiPfS_S_S_S_Pi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z23__device_stub__setZerosiPfS_S_S_S_Pi, .Lfunc_end2-_Z23__device_stub__setZerosiPfS_S_S_S_Pi
	.cfi_endproc
                                        # -- End function
	.globl	_Z23__device_stub__clearTauiPfS_ # -- Begin function _Z23__device_stub__clearTauiPfS_
	.type	_Z23__device_stub__clearTauiPfS_,@function
_Z23__device_stub__clearTauiPfS_:       # @_Z23__device_stub__clearTauiPfS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rax
	movl	%edi, (%rax)
	leaq	40(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	32(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z8clearTauiPfS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z23__device_stub__clearTauiPfS_, .Lfunc_end3-_Z23__device_stub__clearTauiPfS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z8read_csviiPcPPd              # -- Begin function _Z8read_csviiPcPPd
	.type	_Z8read_csviiPcPPd,@function
_Z8read_csviiPcPPd:                     # @_Z8read_csviiPcPPd
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$104, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rcx, %rbx
	movl	%edi, %ebp
	movl	$.L.str, %esi
	movq	%rdx, %rdi
	callq	fopen
	movq	%rax, %r14
	movq	%rsp, %rdi
	movl	$4098, %esi                     # imm = 0x1002
	movq	%rax, %rdx
	callq	fgets
	testq	%rax, %rax
	je	.LBB4_8
# %bb.1:
	testl	%ebp, %ebp
	jle	.LBB4_8
# %bb.2:                                # %.lr.ph18.preheader
	movl	%ebp, %r12d
	xorl	%r13d, %r13d
	movq	%rsp, %r15
.LBB4_3:                                # %.lr.ph18
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB4_5 Depth 2
	movl	$.L.str.1, %esi
	movq	%r15, %rdi
	callq	strtok
	testq	%rax, %rax
	je	.LBB4_6
# %bb.4:                                # %.lr.ph
                                        #   in Loop: Header=BB4_3 Depth=1
	xorl	%ebp, %ebp
.LBB4_5:                                #   Parent Loop BB4_3 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movq	%rax, %rdi
	callq	atof
	movq	(%rbx,%r13,8), %rax
	movsd	%xmm0, (%rax,%rbp)
	movl	$.L.str.1, %esi
	xorl	%edi, %edi
	callq	strtok
	addq	$8, %rbp
	testq	%rax, %rax
	jne	.LBB4_5
.LBB4_6:                                # %._crit_edge
                                        #   in Loop: Header=BB4_3 Depth=1
	movq	%r15, %rdi
	movl	$4098, %esi                     # imm = 0x1002
	movq	%r14, %rdx
	callq	fgets
	testq	%rax, %rax
	je	.LBB4_8
# %bb.7:                                # %._crit_edge
                                        #   in Loop: Header=BB4_3 Depth=1
	incq	%r13
	cmpq	%r12, %r13
	jb	.LBB4_3
.LBB4_8:                                # %._crit_edge19
	addq	$104, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z8read_csviiPcPPd, .Lfunc_end4-_Z8read_csviiPcPPd
	.cfi_endproc
                                        # -- End function
	.globl	_Z9readEdgesiiiPcPiPf           # -- Begin function _Z9readEdgesiiiPcPiPf
	.type	_Z9readEdgesiiiPcPiPf,@function
_Z9readEdgesiiiPcPiPf:                  # @_Z9readEdgesiiiPcPiPf
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, 16(%rsp)                   # 8-byte Spill
	movq	%r8, %r14
	movq	%rcx, %r13
	movl	%edx, 4(%rsp)                   # 4-byte Spill
	movl	%esi, %r12d
	movl	%edi, %ebp
	movslq	%esi, %rbx
	leaq	(,%rbx,8), %rdi
	callq	malloc
	movq	%rax, %r15
	testl	%ebx, %ebx
	jle	.LBB5_1
# %bb.6:                                # %.lr.ph
	movq	%r13, 8(%rsp)                   # 8-byte Spill
	movslq	4(%rsp), %r13                   # 4-byte Folded Reload
	shlq	$3, %r13
	movl	%r12d, 4(%rsp)                  # 4-byte Spill
	movl	%r12d, %r12d
	xorl	%ebx, %ebx
.LBB5_7:                                # =>This Inner Loop Header: Depth=1
	movq	%r13, %rdi
	callq	malloc
	movq	%rax, (%r15,%rbx,8)
	incq	%rbx
	cmpq	%rbx, %r12
	jne	.LBB5_7
# %bb.3:                                # %._crit_edge
	movl	4(%rsp), %ebx                   # 4-byte Reload
	movl	%ebx, %edi
	movq	8(%rsp), %rdx                   # 8-byte Reload
	movq	%r15, %rcx
	callq	_Z8read_csviiPcPPd
	testl	%ebx, %ebx
	movq	16(%rsp), %rdi                  # 8-byte Reload
	jle	.LBB5_2
# %bb.4:                                # %.lr.ph33.preheader
	xorl	%eax, %eax
.LBB5_5:                                # %.lr.ph33
                                        # =>This Inner Loop Header: Depth=1
	movq	(%r15,%rax,8), %rcx
	cvttsd2si	8(%rcx), %edx
	cvttsd2si	16(%rcx), %esi
	imull	%ebp, %edx
	addl	%edx, %esi
	movslq	%esi, %rdx
	movl	$1, (%r14,%rdx,4)
	xorps	%xmm0, %xmm0
	cvtsd2ss	24(%rcx), %xmm0
	movss	%xmm0, (%rdi,%rdx,4)
	incq	%rax
	cmpq	%rax, %r12
	jne	.LBB5_5
	jmp	.LBB5_2
.LBB5_1:                                # %._crit_edge.thread
	movl	%r12d, %edi
	movq	%r13, %rdx
	movq	%r15, %rcx
	callq	_Z8read_csviiPcPPd
.LBB5_2:                                # %._crit_edge34
	movq	%r15, %rdi
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	free                            # TAILCALL
.Lfunc_end5:
	.size	_Z9readEdgesiiiPcPiPf, .Lfunc_end5-_Z9readEdgesiiiPcPiPf
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI6_0:
	.quad	0x41dfffffffc00000              # double 2147483647
.LCPI6_1:
	.quad	0x4014000000000000              # double 5
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$16120, %rsp                    # imm = 0x3EF8
	.cfi_def_cfa_offset 16176
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movabsq	$4294967808, %rbx               # imm = 0x100000200
	leaq	32(%rsp), %rdi
	movl	$7431076, %esi                  # imm = 0x7163A4
	movl	$1, %edx
	callq	hipMallocManaged
	leaq	64(%rsp), %rdi
	movl	$7431076, %esi                  # imm = 0x7163A4
	movl	$1, %edx
	callq	hipMallocManaged
	leaq	16(%rsp), %rdi
	movl	$7431076, %esi                  # imm = 0x7163A4
	movl	$1, %edx
	callq	hipMallocManaged
	leaq	24(%rsp), %rdi
	movl	$7431076, %esi                  # imm = 0x7163A4
	movl	$1, %edx
	callq	hipMallocManaged
	leaq	8(%rsp), %rdi
	movl	$7431076, %esi                  # imm = 0x7163A4
	movl	$1, %edx
	callq	hipMallocManaged
	leaq	48(%rsp), %rdi
	movl	$5452, %esi                     # imm = 0x154C
	movl	$1, %edx
	callq	hipMallocManaged
	leaq	56(%rsp), %rdi
	movl	$5452, %esi                     # imm = 0x154C
	movl	$1, %edx
	callq	hipMallocManaged
	leaq	3584(%rbx), %r15
	movq	%r15, %rdi
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB6_2
# %bb.1:
	movq	24(%rsp), %rsi
	movq	32(%rsp), %rdx
	movq	64(%rsp), %rcx
	movq	16(%rsp), %r8
	movq	48(%rsp), %r9
	movq	8(%rsp), %rax
	movq	%rax, (%rsp)
	movl	$1363, %edi                     # imm = 0x553
	callq	_Z23__device_stub__setZerosiPfS_S_S_S_Pi
.LBB6_2:
	callq	hipDeviceSynchronize
	movq	8(%rsp), %r8
	movq	16(%rsp), %r9
	movl	$.L__const.main.fname, %ecx
	movl	$1363, %edi                     # imm = 0x553
	movl	$3977, %esi                     # imm = 0xF89
	movl	$6, %edx
	callq	_Z9readEdgesiiiPcPiPf
	movq	56(%rsp), %rax
	xorl	%ecx, %ecx
	movq	8(%rsp), %rdx
.LBB6_3:                                # =>This Loop Header: Depth=1
                                        #     Child Loop BB6_4 Depth 2
	movl	$0, (%rax,%rcx,4)
	xorl	%esi, %esi
	xorl	%edi, %edi
.LBB6_4:                                #   Parent Loop BB6_3 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	addl	(%rdx,%rsi,4), %edi
	movl	%edi, (%rax,%rcx,4)
	incq	%rsi
	cmpq	$1363, %rsi                     # imm = 0x553
	jne	.LBB6_4
# %bb.5:                                #   in Loop: Header=BB6_3 Depth=1
	incq	%rcx
	addq	$5452, %rdx                     # imm = 0x154C
	cmpq	$1363, %rcx                     # imm = 0x553
	jne	.LBB6_3
# %bb.6:                                # %.preheader.preheader
	xorl	%eax, %eax
	movq	%r15, 96(%rsp)                  # 8-byte Spill
.LBB6_7:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB6_10 Depth 2
                                        #       Child Loop BB6_15 Depth 3
                                        #         Child Loop BB6_16 Depth 4
                                        #           Child Loop BB6_17 Depth 5
                                        #       Child Loop BB6_25 Depth 3
	movl	%eax, 84(%rsp)                  # 4-byte Spill
	movq	%r15, %rdi
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB6_9
# %bb.8:                                #   in Loop: Header=BB6_7 Depth=1
	movq	32(%rsp), %rsi
	movq	64(%rsp), %rdx
	movl	$1363, %edi                     # imm = 0x553
	callq	_Z23__device_stub__clearTauiPfS_
.LBB6_9:                                #   in Loop: Header=BB6_7 Depth=1
	callq	hipDeviceSynchronize
	leaq	112(%rsp), %rax
	xorl	%ecx, %ecx
.LBB6_10:                               #   Parent Loop BB6_7 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB6_15 Depth 3
                                        #         Child Loop BB6_16 Depth 4
                                        #           Child Loop BB6_17 Depth 5
                                        #       Child Loop BB6_25 Depth 3
	movq	%rax, 88(%rsp)                  # 8-byte Spill
	movq	%rcx, 104(%rsp)                 # 8-byte Spill
	imulq	$800, %rcx, %r14                # imm = 0x320
	movl	$1, 112(%rsp,%r14)
	movq	%r15, %rdi
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB6_12
# %bb.11:                               #   in Loop: Header=BB6_10 Depth=2
	movq	24(%rsp), %rsi
	movq	32(%rsp), %rdx
	movq	16(%rsp), %rcx
	movq	48(%rsp), %r8
	movq	8(%rsp), %r9
	movl	$1363, %edi                     # imm = 0x553
	callq	_Z24__device_stub__calcDenomiPfS_S_S_Pi
.LBB6_12:                               #   in Loop: Header=BB6_10 Depth=2
	callq	hipDeviceSynchronize
	movq	%r15, %rdi
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB6_14
# %bb.13:                               #   in Loop: Header=BB6_10 Depth=2
	movq	24(%rsp), %rsi
	movq	32(%rsp), %rdx
	movq	16(%rsp), %rcx
	movq	48(%rsp), %r8
	movq	8(%rsp), %r9
	movl	$1363, %edi                     # imm = 0x553
	callq	_Z23__device_stub__calcProbiPfS_S_S_Pi
.LBB6_14:                               #   in Loop: Header=BB6_10 Depth=2
	callq	hipDeviceSynchronize
	xorl	%ebx, %ebx
	xorps	%xmm0, %xmm0
	movss	%xmm0, 44(%rsp)                 # 4-byte Spill
	leaq	(%rsp,%r14), %rax
	addq	$112, %rax
	movq	%rax, 72(%rsp)                  # 8-byte Spill
.LBB6_15:                               #   Parent Loop BB6_7 Depth=1
                                        #     Parent Loop BB6_10 Depth=2
                                        # =>    This Loop Header: Depth=3
                                        #         Child Loop BB6_16 Depth 4
                                        #           Child Loop BB6_17 Depth 5
	movslq	%ebx, %r15
	movq	72(%rsp), %rax                  # 8-byte Reload
	leaq	(%rax,%r15,4), %r13
	addq	$-4, %r13
	movslq	4(%r13), %r14
	imulq	$1363, %r14, %rbp               # imm = 0x553
	movq	%rbp, %r12
	shlq	$2, %r12
.LBB6_16:                               #   Parent Loop BB6_7 Depth=1
                                        #     Parent Loop BB6_10 Depth=2
                                        #       Parent Loop BB6_15 Depth=3
                                        # =>      This Loop Header: Depth=4
                                        #           Child Loop BB6_17 Depth 5
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2sd	%eax, %xmm0
	divsd	.LCPI6_0(%rip), %xmm0
	cvtsd2ss	%xmm0, %xmm0
	movq	24(%rsp), %rcx
	addq	%r12, %rcx
	xorps	%xmm1, %xmm1
	xorl	%eax, %eax
.LBB6_17:                               #   Parent Loop BB6_7 Depth=1
                                        #     Parent Loop BB6_10 Depth=2
                                        #       Parent Loop BB6_15 Depth=3
                                        #         Parent Loop BB6_16 Depth=4
                                        # =>        This Inner Loop Header: Depth=5
	addss	(%rcx,%rax,4), %xmm1
	ucomiss	%xmm0, %xmm1
	ja	.LBB6_20
# %bb.18:                               #   in Loop: Header=BB6_17 Depth=5
	incq	%rax
	cmpq	$1363, %rax                     # imm = 0x553
	jne	.LBB6_17
# %bb.19:                               #   in Loop: Header=BB6_16 Depth=4
	movl	$-1, %eax
.LBB6_20:                               # %.split.loop.exit149
                                        #   in Loop: Header=BB6_16 Depth=4
	cmpl	(%r13), %eax
	jne	.LBB6_22
# %bb.21:                               #   in Loop: Header=BB6_16 Depth=4
	movq	56(%rsp), %rcx
	cmpl	$1, (%rcx,%r14,4)
	jne	.LBB6_16
.LBB6_22:                               # %.critedge
                                        #   in Loop: Header=BB6_15 Depth=3
	cmpl	$250, %eax
	je	.LBB6_23
# %bb.29:                               #   in Loop: Header=BB6_15 Depth=3
	movq	56(%rsp), %rcx
	movslq	%eax, %rdx
	cmpl	$1, (%rcx,%rdx,4)
	jg	.LBB6_31
# %bb.30:                               #   in Loop: Header=BB6_15 Depth=3
	movq	8(%rsp), %rsi
	leal	(%rax,%rbp), %edi
	movslq	%edi, %rdi
	xorl	%r8d, %r8d
	movl	%r8d, (%rsi,%rdi,4)
	imull	$1363, %eax, %eax               # imm = 0x553
	addl	%r14d, %eax
	cltq
	movl	%r8d, (%rsi,%rax,4)
	movl	(%rcx,%rdx,4), %eax
	subl	%eax, (%rcx,%r14,4)
	movl	%r8d, (%rcx,%rdx,4)
	jmp	.LBB6_32
.LBB6_31:                               #   in Loop: Header=BB6_15 Depth=3
	leal	1(%r15), %ebx
	movq	72(%rsp), %rcx                  # 8-byte Reload
	movl	%eax, 4(%rcx,%r15,4)
	movq	16(%rsp), %rcx
	addl	%ebp, %eax
	cltq
	movss	44(%rsp), %xmm0                 # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	addss	(%rcx,%rax,4), %xmm0
	movss	%xmm0, 44(%rsp)                 # 4-byte Spill
	cvtss2sd	%xmm0, %xmm0
	movsd	.LCPI6_1(%rip), %xmm1           # xmm1 = mem[0],zero
	divsd	%xmm0, %xmm1
	movq	64(%rsp), %rcx
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rcx,%rax,4), %xmm0
	addsd	%xmm1, %xmm0
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, (%rcx,%rax,4)
.LBB6_32:                               #   in Loop: Header=BB6_15 Depth=3
	cmpl	$200, %ebx
	jl	.LBB6_15
	jmp	.LBB6_33
.LBB6_23:                               #   in Loop: Header=BB6_10 Depth=2
	movl	$.Lstr, %edi
	callq	puts@PLT
	leal	1(%rbx), %ebp
	testl	%ebx, %ebx
	movq	88(%rsp), %r15                  # 8-byte Reload
	js	.LBB6_26
# %bb.24:                               # %.lr.ph.preheader
                                        #   in Loop: Header=BB6_10 Depth=2
	movl	%ebp, %ebx
	xorl	%r14d, %r14d
.LBB6_25:                               # %.lr.ph
                                        #   Parent Loop BB6_7 Depth=1
                                        #     Parent Loop BB6_10 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movl	(%r15,%r14,4), %esi
	movl	$.L.str.3, %edi
	xorl	%eax, %eax
	callq	printf
	incq	%r14
	cmpq	%r14, %rbx
	jne	.LBB6_25
.LBB6_26:                               # %._crit_edge
                                        #   in Loop: Header=BB6_10 Depth=2
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	movslq	%ebp, %rax
	movq	72(%rsp), %rcx                  # 8-byte Reload
	movl	$250, (%rcx,%rax,4)
.LBB6_33:                               # %.loopexit
                                        #   in Loop: Header=BB6_10 Depth=2
	movq	104(%rsp), %rcx                 # 8-byte Reload
	incq	%rcx
	movq	88(%rsp), %rax                  # 8-byte Reload
	addq	$800, %rax                      # imm = 0x320
	cmpq	$20, %rcx
	movabsq	$4294967808, %rbx               # imm = 0x100000200
	movq	96(%rsp), %r15                  # 8-byte Reload
	jne	.LBB6_10
# %bb.27:                               #   in Loop: Header=BB6_7 Depth=1
	movl	84(%rsp), %eax                  # 4-byte Reload
	incl	%eax
	cmpl	$5, %eax
	jne	.LBB6_7
# %bb.28:
	movq	48(%rsp), %rdi
	callq	hipFree
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	64(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	56(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$16120, %rsp                    # imm = 0x3EF8
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	main, .Lfunc_end6-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB7_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB7_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9calcDenomiPfS_S_S_Pi, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z8calcProbiPfS_S_S_Pi, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z8setZerosiPfS_S_S_S_Pi, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z8clearTauiPfS_, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end7:
	.size	__hip_module_ctor, .Lfunc_end7-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB8_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB8_2:
	retq
.Lfunc_end8:
	.size	__hip_module_dtor, .Lfunc_end8-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z9calcDenomiPfS_S_S_Pi,@object # @_Z9calcDenomiPfS_S_S_Pi
	.section	.rodata,"a",@progbits
	.globl	_Z9calcDenomiPfS_S_S_Pi
	.p2align	3, 0x0
_Z9calcDenomiPfS_S_S_Pi:
	.quad	_Z24__device_stub__calcDenomiPfS_S_S_Pi
	.size	_Z9calcDenomiPfS_S_S_Pi, 8

	.type	_Z8calcProbiPfS_S_S_Pi,@object  # @_Z8calcProbiPfS_S_S_Pi
	.globl	_Z8calcProbiPfS_S_S_Pi
	.p2align	3, 0x0
_Z8calcProbiPfS_S_S_Pi:
	.quad	_Z23__device_stub__calcProbiPfS_S_S_Pi
	.size	_Z8calcProbiPfS_S_S_Pi, 8

	.type	_Z8setZerosiPfS_S_S_S_Pi,@object # @_Z8setZerosiPfS_S_S_S_Pi
	.globl	_Z8setZerosiPfS_S_S_S_Pi
	.p2align	3, 0x0
_Z8setZerosiPfS_S_S_S_Pi:
	.quad	_Z23__device_stub__setZerosiPfS_S_S_S_Pi
	.size	_Z8setZerosiPfS_S_S_S_Pi, 8

	.type	_Z8clearTauiPfS_,@object        # @_Z8clearTauiPfS_
	.globl	_Z8clearTauiPfS_
	.p2align	3, 0x0
_Z8clearTauiPfS_:
	.quad	_Z23__device_stub__clearTauiPfS_
	.size	_Z8clearTauiPfS_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"r"
	.size	.L.str, 2

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	" "
	.size	.L.str.1, 2

	.type	.L__const.main.fname,@object    # @__const.main.fname
	.section	.rodata,"a",@progbits
	.p2align	4, 0x0
.L__const.main.fname:
	.asciz	"dist.csv\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000"
	.size	.L__const.main.fname, 256

	.type	.L.str.3,@object                # @.str.3
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.3:
	.asciz	"-> %d "
	.size	.L.str.3, 7

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z9calcDenomiPfS_S_S_Pi"
	.size	.L__unnamed_1, 24

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z8calcProbiPfS_S_S_Pi"
	.size	.L__unnamed_2, 23

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z8setZerosiPfS_S_S_S_Pi"
	.size	.L__unnamed_3, 25

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"_Z8clearTauiPfS_"
	.size	.L__unnamed_4, 17

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"\ntalalat"
	.size	.Lstr, 9

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"\n"
	.size	.Lstr.1, 2

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z24__device_stub__calcDenomiPfS_S_S_Pi
	.addrsig_sym _Z23__device_stub__calcProbiPfS_S_S_Pi
	.addrsig_sym _Z23__device_stub__setZerosiPfS_S_S_S_Pi
	.addrsig_sym _Z23__device_stub__clearTauiPfS_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z9calcDenomiPfS_S_S_Pi
	.addrsig_sym _Z8calcProbiPfS_S_S_Pi
	.addrsig_sym _Z8setZerosiPfS_S_S_S_Pi
	.addrsig_sym _Z8clearTauiPfS_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z9calcDenomiPfS_S_S_Pi ; -- Begin function _Z9calcDenomiPfS_S_S_Pi
	.globl	_Z9calcDenomiPfS_S_S_Pi
	.p2align	8
	.type	_Z9calcDenomiPfS_S_S_Pi,@function
_Z9calcDenomiPfS_S_S_Pi:                ; @_Z9calcDenomiPfS_S_S_Pi
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x3c
	s_load_b32 s33, s[0:1], 0x0
	s_add_u32 s2, s0, 48
	s_addc_u32 s3, s1, 0
	s_mov_b32 s5, exec_lo
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	v_cmpx_gt_i32_e64 s33, v1
	s_cbranch_execz .LBB0_6
; %bb.1:                                ; %.lr.ph33
	s_load_b32 s75, s[2:3], 0x0
	s_load_b256 s[12:19], s[0:1], 0x10
	v_mul_lo_u32 v3, s33, v1
	v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v21, 0x3ff00000
	s_cmp_gt_i32 s33, 0
	s_mov_b32 s10, 0x55555555
	s_mov_b32 s20, 0x968915a9
	s_mov_b32 s22, 0x4222de17
	s_mov_b32 s24, 0x3abe935a
	s_mov_b32 s26, 0x47e6c9c2
	s_mov_b32 s28, 0xcfa74449
	s_mov_b32 s30, 0x71bf3c30
	s_mov_b32 s34, 0x1c7792ce
	s_mov_b32 s36, 0x924920da
	s_mov_b32 s38, 0x9999999c
	s_mov_b32 s40, 0xfefa39ef
	s_mov_b32 s42, 0x3b39803f
	s_mov_b32 s44, 0xd5df274d
	s_mov_b32 s46, 0x652b82fe
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s75, s75, s4
	s_mov_b32 s48, 0xfca7ab0c
	s_mov_b32 s50, 0x6a5dcb37
	s_mov_b32 s52, 0x623fde64
	s_mov_b32 s54, 0x7c89e6b0
	s_mov_b32 s56, 0x14761f6e
	s_mov_b32 s58, 0x1852b7b0
	s_mov_b32 s60, 0x11122322
	s_mov_b32 s62, 0x555502a1
	s_mov_b32 s64, 0x55555511
	s_mov_b32 s66, 11
	s_mov_b32 s74, 0
	s_mov_b32 s11, 0x3fe55555
	s_mov_b32 s21, 0x3fba6564
	s_mov_b32 s23, 0x3fbdee67
	s_mov_b32 s25, 0x3fbe25e4
	s_mov_b32 s27, 0x3fc110ef
	s_mov_b32 s29, 0x3fc3b13b
	s_cselect_b32 s76, -1, 0
	s_mul_i32 s77, s75, s33
	s_mov_b32 s31, 0x3fc745d1
	s_mov_b32 s35, 0x3fcc71c7
	s_mov_b32 s37, 0x3fd24924
	s_mov_b32 s39, 0x3fd99999
	s_mov_b32 s41, 0x3fe62e42
	s_mov_b32 s43, 0x3c7abc9e
	s_mov_b32 s45, 0x3c8543b0
	s_mov_b32 s47, 0x3ff71547
	s_mov_b32 s49, 0x3e928af3
	s_mov_b32 s51, 0x3e5ade15
	s_mov_b32 s53, 0x3ec71dee
	s_mov_b32 s55, 0x3efa0199
	s_mov_b32 s57, 0x3f2a01a0
	s_mov_b32 s59, 0x3f56c16c
	s_mov_b32 s61, 0x3f811111
	s_mov_b32 s63, 0x3fa55555
	s_mov_b32 s65, 0x3fc55555
	s_mov_b32 s67, 0x3fe00000
	s_mov_b32 s69, 0xbfe55555
	s_mov_b32 s71, 0xbfe62e42
	s_mov_b32 s73, 0xbc7abc9e
.LBB0_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_4 Depth 2
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], 2, v[1:2]
	v_add_co_u32 v5, vcc_lo, s16, v5
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v6, vcc_lo, s17, v6, vcc_lo
	s_and_not1_b32 vcc_lo, exec_lo, s76
	global_store_b32 v[5:6], v0, off
	s_cbranch_vccnz .LBB0_5
; %bb.3:                                ; %.lr.ph
                                        ;   in Loop: Header=BB0_2 Depth=1
	v_ashrrev_i32_e32 v4, 31, v3
	v_mov_b32_e32 v2, 0
	s_mov_b32 s78, s33
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[11:12], 2, v[3:4]
	v_add_co_u32 v7, vcc_lo, s12, v11
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v8, vcc_lo, s13, v12, vcc_lo
	v_add_co_u32 v9, vcc_lo, s14, v11
	v_add_co_ci_u32_e32 v10, vcc_lo, s15, v12, vcc_lo
	v_add_co_u32 v11, vcc_lo, s18, v11
	v_add_co_ci_u32_e32 v12, vcc_lo, s19, v12, vcc_lo
.LBB0_4:                                ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	global_load_b32 v13, v[9:10], off
	global_load_b32 v4, v[7:8], off
	s_mov_b32 s68, s10
	s_mov_b32 s70, s40
	s_mov_b32 s72, s42
	s_add_i32 s78, s78, -1
	s_waitcnt vmcnt(1)
	v_div_scale_f32 v14, null, v13, v13, 1.0
	s_waitcnt vmcnt(0)
	v_cvt_f64_f32_e32 v[15:16], v4
	v_div_scale_f32 v19, s0, 1.0, v13, 1.0
	s_delay_alu instid0(VALU_DEP_3)
	v_rcp_f32_e32 v20, v14
	v_cmp_eq_f32_e32 vcc_lo, 1.0, v4
	v_cndmask_b32_e32 v18, 0x40146666, v21, vcc_lo
	v_cndmask_b32_e64 v17, 0x66666666, 0, vcc_lo
	s_mov_b32 vcc_lo, s0
	s_waitcnt_depctr 0xfff
	v_fma_f32 v22, -v14, v20, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v20, v22, v20
	v_mul_f32_e32 v22, v19, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v23, -v14, v22, v19
	v_fmac_f32_e32 v22, v23, v20
	v_frexp_mant_f64_e64 v[23:24], |v[15:16]|
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f32 v14, -v14, v22, v19
	v_frexp_exp_i32_f64_e32 v27, v[15:16]
	v_div_fmas_f32 v14, v14, v20, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f32 v22, v14, v13, 1.0
	v_cmp_eq_f32_e32 vcc_lo, 1.0, v22
	v_cvt_f64_f32_e32 v[13:14], v22
	v_cmp_eq_f32_e64 s1, 0, v22
	v_cndmask_b32_e32 v20, 0x3fc33333, v21, vcc_lo
	v_cndmask_b32_e64 v19, 0x33333333, 0, vcc_lo
	v_cmp_gt_f64_e32 vcc_lo, s[10:11], v[23:24]
	v_frexp_exp_i32_f64_e32 v39, v[13:14]
	v_cndmask_b32_e64 v25, 0, 1, vcc_lo
	v_subrev_co_ci_u32_e32 v31, vcc_lo, 0, v27, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_ldexp_f64 v[23:24], v[23:24], v25
	v_frexp_mant_f64_e64 v[25:26], |v[13:14]|
	v_cvt_f64_i32_e32 v[31:32], v31
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[29:30], v[23:24], 1.0
	v_cmp_gt_f64_e32 vcc_lo, s[10:11], v[25:26]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_mul_f64 v[37:38], v[31:32], s[40:41]
	v_add_f64 v[27:28], v[23:24], -1.0
	v_rcp_f64_e32 v[35:36], v[29:30]
	v_cndmask_b32_e64 v33, 0, 1, vcc_lo
	v_subrev_co_ci_u32_e32 v41, vcc_lo, 0, v39, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_ldexp_f64 v[25:26], v[25:26], v33
	v_add_f64 v[33:34], v[29:30], -1.0
	v_cvt_f64_i32_e32 v[41:42], v41
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[45:46], -v[29:30], v[35:36], 1.0
	v_add_f64 v[39:40], v[25:26], 1.0
	v_add_f64 v[23:24], v[23:24], -v[33:34]
	v_fma_f64 v[33:34], v[31:32], s[40:41], -v[37:38]
	v_mul_f64 v[51:52], v[41:42], s[40:41]
	v_add_f64 v[43:44], v[25:26], -1.0
	v_rcp_f64_e32 v[49:50], v[39:40]
	v_add_f64 v[47:48], v[39:40], -1.0
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_fma_f64 v[31:32], v[31:32], s[42:43], v[33:34]
	v_fma_f64 v[33:34], v[45:46], v[35:36], v[35:36]
	v_fma_f64 v[35:36], v[41:42], s[40:41], -v[51:52]
	v_add_f64 v[25:26], v[25:26], -v[47:48]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[45:46], -v[39:40], v[49:50], 1.0
	v_add_f64 v[47:48], v[37:38], v[31:32]
	v_fma_f64 v[53:54], -v[29:30], v[33:34], 1.0
	v_fma_f64 v[35:36], v[41:42], s[42:43], v[35:36]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[41:42], v[45:46], v[49:50], v[49:50]
	v_add_f64 v[37:38], v[47:48], -v[37:38]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[33:34], v[53:54], v[33:34], v[33:34]
	v_add_f64 v[45:46], v[51:52], v[35:36]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[49:50], -v[39:40], v[41:42], 1.0
	v_add_f64 v[31:32], v[31:32], -v[37:38]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_f64 v[37:38], v[27:28], v[33:34]
	v_add_f64 v[51:52], v[45:46], -v[51:52]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[41:42], v[49:50], v[41:42], v[41:42]
	v_mul_f64 v[49:50], v[29:30], v[37:38]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[35:36], v[35:36], -v[51:52]
	v_mul_f64 v[51:52], v[43:44], v[41:42]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[29:30], v[37:38], v[29:30], -v[49:50]
	v_mul_f64 v[53:54], v[39:40], v[51:52]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[23:24], v[37:38], v[23:24], v[29:30]
	v_fma_f64 v[29:30], v[51:52], v[39:40], -v[53:54]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[39:40], v[49:50], v[23:24]
	v_fma_f64 v[25:26], v[51:52], v[25:26], v[29:30]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[29:30], v[27:28], -v[39:40]
	v_add_f64 v[49:50], v[39:40], -v[49:50]
	v_add_f64 v[55:56], v[53:54], v[25:26]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[27:28], v[27:28], -v[29:30]
	v_add_f64 v[23:24], v[49:50], -v[23:24]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[49:50], v[43:44], -v[55:56]
	v_add_f64 v[53:54], v[55:56], -v[53:54]
	v_add_f64 v[27:28], v[27:28], -v[39:40]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[39:40], v[43:44], -v[49:50]
	v_add_f64 v[25:26], v[53:54], -v[25:26]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[23:24], v[23:24], v[27:28]
	v_add_f64 v[27:28], v[39:40], -v[55:56]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[23:24], v[29:30], v[23:24]
	v_add_f64 v[25:26], v[25:26], v[27:28]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[23:24], v[33:34], v[23:24]
	v_add_f64 v[25:26], v[49:50], v[25:26]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[27:28], v[37:38], v[23:24]
	v_mul_f64 v[25:26], v[41:42], v[25:26]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[29:30], v[27:28], -v[37:38]
	v_mul_f64 v[33:34], v[27:28], v[27:28]
	v_ldexp_f64 v[37:38], v[27:28], 1
	v_add_f64 v[39:40], v[51:52], v[25:26]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[23:24], v[23:24], -v[29:30]
	v_fma_f64 v[29:30], v[27:28], v[27:28], -v[33:34]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[41:42], v[39:40], -v[51:52]
	v_mul_f64 v[43:44], v[39:40], v[39:40]
	v_add_f64 v[51:52], v[23:24], v[23:24]
	v_ldexp_f64 v[53:54], v[23:24], 1
	v_ldexp_f64 v[49:50], v[39:40], 1
	v_add_f64 v[25:26], v[25:26], -v[41:42]
	v_fma_f64 v[41:42], v[39:40], v[39:40], -v[43:44]
	v_fma_f64 v[29:30], v[27:28], v[51:52], v[29:30]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[51:52], v[25:26], v[25:26]
	v_ldexp_f64 v[55:56], v[25:26], 1
	v_add_f64 v[57:58], v[33:34], v[29:30]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[41:42], v[39:40], v[51:52], v[41:42]
	v_fma_f64 v[51:52], v[57:58], s[22:23], s[20:21]
	v_add_f64 v[33:34], v[57:58], -v[33:34]
	v_mul_f64 v[59:60], v[27:28], v[57:58]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[61:62], v[43:44], v[41:42]
	v_fma_f64 v[51:52], v[57:58], v[51:52], s[24:25]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[29:30], v[29:30], -v[33:34]
	v_fma_f64 v[33:34], v[57:58], v[27:28], -v[59:60]
	s_delay_alu instid0(VALU_DEP_4)
	v_fma_f64 v[63:64], v[61:62], s[22:23], s[20:21]
	v_add_f64 v[43:44], v[61:62], -v[43:44]
	v_mul_f64 v[65:66], v[39:40], v[61:62]
	v_fma_f64 v[51:52], v[57:58], v[51:52], s[26:27]
	v_fma_f64 v[23:24], v[57:58], v[23:24], v[33:34]
	v_fma_f64 v[33:34], v[61:62], v[63:64], s[24:25]
	v_add_f64 v[41:42], v[41:42], -v[43:44]
	v_fma_f64 v[43:44], v[61:62], v[39:40], -v[65:66]
	v_fma_f64 v[51:52], v[57:58], v[51:52], s[28:29]
	v_fma_f64 v[23:24], v[29:30], v[27:28], v[23:24]
	v_fma_f64 v[27:28], v[61:62], v[33:34], s[26:27]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[25:26], v[61:62], v[25:26], v[43:44]
	v_fma_f64 v[33:34], v[57:58], v[51:52], s[30:31]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[43:44], v[59:60], v[23:24]
	v_fma_f64 v[27:28], v[61:62], v[27:28], s[28:29]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[25:26], v[41:42], v[39:40], v[25:26]
	v_fma_f64 v[33:34], v[57:58], v[33:34], s[34:35]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[39:40], v[43:44], -v[59:60]
	v_fma_f64 v[27:28], v[61:62], v[27:28], s[30:31]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[51:52], v[65:66], v[25:26]
	v_fma_f64 v[33:34], v[57:58], v[33:34], s[36:37]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[23:24], v[23:24], -v[39:40]
	v_fma_f64 v[27:28], v[61:62], v[27:28], s[34:35]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[39:40], v[51:52], -v[65:66]
	v_fma_f64 v[33:34], v[57:58], v[33:34], s[38:39]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[27:28], v[61:62], v[27:28], s[36:37]
	v_add_f64 v[25:26], v[25:26], -v[39:40]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[39:40], v[57:58], v[33:34]
	v_fma_f64 v[27:28], v[61:62], v[27:28], s[38:39]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[57:58], v[57:58], v[33:34], -v[39:40]
	v_mul_f64 v[59:60], v[61:62], v[27:28]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[29:30], v[29:30], v[33:34], v[57:58]
	v_fma_f64 v[33:34], v[61:62], v[27:28], -v[59:60]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[57:58], v[39:40], v[29:30]
	v_fma_f64 v[27:28], v[41:42], v[27:28], v[33:34]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[33:34], v[57:58], s[10:11]
	v_add_f64 v[39:40], v[57:58], -v[39:40]
	v_add_f64 v[41:42], v[59:60], v[27:28]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[61:62], v[33:34], s[68:69]
	v_add_f64 v[29:30], v[29:30], -v[39:40]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[39:40], v[41:42], s[10:11]
	v_add_f64 v[59:60], v[41:42], -v[59:60]
	v_add_f64 v[57:58], v[57:58], -v[61:62]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[29:30], v[29:30], s[44:45]
	v_add_f64 v[61:62], v[39:40], s[68:69]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[27:28], v[27:28], -v[59:60]
	v_cmp_class_f64_e64 s68, v[15:16], 0x204
	v_add_f64 v[29:30], v[29:30], v[57:58]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[41:42], v[41:42], -v[61:62]
	v_add_f64 v[27:28], v[27:28], s[44:45]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[57:58], v[33:34], v[29:30]
	v_add_f64 v[27:28], v[27:28], v[41:42]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[33:34], v[33:34], -v[57:58]
	v_mul_f64 v[41:42], v[43:44], v[57:58]
	v_add_f64 v[59:60], v[39:40], v[27:28]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[29:30], v[29:30], v[33:34]
	v_fma_f64 v[33:34], v[43:44], v[57:58], -v[41:42]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[39:40], v[39:40], -v[59:60]
	v_mul_f64 v[61:62], v[51:52], v[59:60]
	v_fma_f64 v[29:30], v[43:44], v[29:30], v[33:34]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[27:28], v[27:28], v[39:40]
	v_fma_f64 v[33:34], v[51:52], v[59:60], -v[61:62]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	v_fma_f64 v[23:24], v[23:24], v[57:58], v[29:30]
	global_load_b32 v57, v[11:12], off
	v_fma_f64 v[27:28], v[51:52], v[27:28], v[33:34]
	v_mul_f64 v[51:52], v[17:18], 0.5
	v_add_f64 v[29:30], v[41:42], v[23:24]
	v_fma_f64 v[25:26], v[25:26], v[59:60], v[27:28]
	v_cndmask_b32_e64 v59, 0x7ff00000, 0, s1
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[27:28], v[37:38], v[29:30]
	v_add_f64 v[33:34], v[29:30], -v[41:42]
	v_add_f64 v[39:40], v[61:62], v[25:26]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[37:38], v[27:28], -v[37:38]
	v_add_f64 v[23:24], v[23:24], -v[33:34]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[33:34], v[49:50], v[39:40]
	v_add_f64 v[41:42], v[39:40], -v[61:62]
	v_add_f64 v[29:30], v[29:30], -v[37:38]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_add_f64 v[23:24], v[53:54], v[23:24]
	v_trunc_f64_e32 v[53:54], v[17:18]
	v_add_f64 v[37:38], v[33:34], -v[49:50]
	v_add_f64 v[25:26], v[25:26], -v[41:42]
	v_add_f64 v[23:24], v[23:24], v[29:30]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[29:30], v[39:40], -v[37:38]
	v_add_f64 v[25:26], v[55:56], v[25:26]
	v_trunc_f64_e32 v[55:56], v[51:52]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[37:38], v[27:28], v[23:24]
	v_add_f64 v[25:26], v[25:26], v[29:30]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_neq_f64_e64 s2, v[55:56], v[51:52]
	v_add_f64 v[29:30], v[47:48], v[37:38]
	v_add_f64 v[27:28], v[37:38], -v[27:28]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[39:40], v[33:34], v[25:26]
	v_add_f64 v[41:42], v[29:30], -v[47:48]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[23:24], v[23:24], -v[27:28]
	v_add_f64 v[27:28], v[45:46], v[39:40]
	v_add_f64 v[33:34], v[39:40], -v[33:34]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[43:44], v[29:30], -v[41:42]
	v_add_f64 v[49:50], v[31:32], v[23:24]
	v_add_f64 v[37:38], v[37:38], -v[41:42]
	v_add_f64 v[41:42], v[27:28], -v[45:46]
	v_add_f64 v[25:26], v[25:26], -v[33:34]
	v_add_f64 v[33:34], v[47:48], -v[43:44]
	v_add_f64 v[43:44], v[49:50], -v[31:32]
	s_delay_alu instid0(VALU_DEP_4)
	v_add_f64 v[47:48], v[27:28], -v[41:42]
	v_add_f64 v[39:40], v[39:40], -v[41:42]
	v_add_f64 v[41:42], v[35:36], v[25:26]
	v_add_f64 v[33:34], v[37:38], v[33:34]
	v_add_f64 v[37:38], v[49:50], -v[43:44]
	v_add_f64 v[23:24], v[23:24], -v[43:44]
	v_add_f64 v[43:44], v[45:46], -v[47:48]
	v_add_f64 v[45:46], v[41:42], -v[35:36]
	v_add_f64 v[33:34], v[49:50], v[33:34]
	v_add_f64 v[31:32], v[31:32], -v[37:38]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[37:38], v[39:40], v[43:44]
	v_add_f64 v[39:40], v[41:42], -v[45:46]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[43:44], v[29:30], v[33:34]
	v_add_f64 v[23:24], v[23:24], v[31:32]
	v_add_f64 v[25:26], v[25:26], -v[45:46]
	v_add_f64 v[31:32], v[41:42], v[37:38]
	v_add_f64 v[35:36], v[35:36], -v[39:40]
	v_add_f64 v[29:30], v[43:44], -v[29:30]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[37:38], v[27:28], v[31:32]
	v_add_f64 v[25:26], v[25:26], v[35:36]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[29:30], v[33:34], -v[29:30]
	v_add_f64 v[27:28], v[37:38], -v[27:28]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[23:24], v[23:24], v[29:30]
	v_add_f64 v[27:28], v[31:32], -v[27:28]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[29:30], v[43:44], v[23:24]
	v_add_f64 v[25:26], v[25:26], v[27:28]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[27:28], v[29:30], -v[43:44]
	v_mul_f64 v[31:32], v[17:18], v[29:30]
	v_add_f64 v[33:34], v[37:38], v[25:26]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[23:24], v[23:24], -v[27:28]
	v_fma_f64 v[27:28], v[17:18], v[29:30], -v[31:32]
	v_cmp_class_f64_e64 vcc_lo, v[31:32], 0x204
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[29:30], v[33:34], -v[37:38]
	v_mul_f64 v[35:36], v[19:20], v[33:34]
	v_fma_f64 v[23:24], v[17:18], v[23:24], v[27:28]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[25:26], v[25:26], -v[29:30]
	v_fma_f64 v[29:30], v[19:20], v[33:34], -v[35:36]
	v_cmp_class_f64_e64 s0, v[35:36], 0x204
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[27:28], v[31:32], v[23:24]
	v_fma_f64 v[25:26], v[19:20], v[25:26], v[29:30]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_dual_cndmask_b32 v30, v28, v32 :: v_dual_cndmask_b32 v29, v27, v31
	v_add_f64 v[27:28], v[27:28], -v[31:32]
	v_cmp_eq_f32_e32 vcc_lo, 0, v4
	v_mul_f64 v[37:38], v[29:30], s[46:47]
	v_cmp_nlt_f64_e64 s5, 0x40900000, v[29:30]
	v_cmp_ngt_f64_e64 s6, 0xc090cc00, v[29:30]
	v_cndmask_b32_e64 v58, 0x7ff00000, 0, vcc_lo
	s_or_b32 vcc_lo, vcc_lo, s68
	v_add_f64 v[33:34], v[35:36], v[25:26]
	v_rndne_f64_e32 v[37:38], v[37:38]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v40, v34, v36, s0
	v_cndmask_b32_e64 v39, v33, v35, s0
	v_cmp_eq_f64_e64 s0, v[53:54], v[17:18]
	v_mul_f64 v[53:54], v[19:20], 0.5
	v_add_f64 v[31:32], v[33:34], -v[35:36]
	s_delay_alu instid0(VALU_DEP_4)
	v_mul_f64 v[41:42], v[39:40], s[46:47]
	v_cmp_neq_f64_e64 s4, 0x7ff00000, |v[39:40]|
	v_cmp_nlt_f64_e64 s7, 0x40900000, v[39:40]
	v_fma_f64 v[43:44], v[37:38], s[70:71], v[29:30]
	v_cmp_ngt_f64_e64 s8, 0xc090cc00, v[39:40]
	s_and_b32 s2, s0, s2
	v_rndne_f64_e32 v[41:42], v[41:42]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[43:44], v[37:38], s[72:73], v[43:44]
	v_fma_f64 v[45:46], v[41:42], s[70:71], v[39:40]
	v_cmp_class_f64_e64 s70, v[13:14], 0x204
	v_cvt_i32_f64_e32 v13, v[37:38]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_fma_f64 v[47:48], v[43:44], s[50:51], s[48:49]
	v_cvt_i32_f64_e32 v15, v[41:42]
	v_fma_f64 v[45:46], v[41:42], s[72:73], v[45:46]
	v_cndmask_b32_e64 v41, 0x3ff00000, v16, s2
	v_fma_f64 v[47:48], v[43:44], v[47:48], s[52:53]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[49:50], v[45:46], s[50:51], s[48:49]
	v_fma_f64 v[47:48], v[43:44], v[47:48], s[54:55]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[49:50], v[45:46], v[49:50], s[52:53]
	v_fma_f64 v[47:48], v[43:44], v[47:48], s[56:57]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[49:50], v[45:46], v[49:50], s[54:55]
	v_fma_f64 v[47:48], v[43:44], v[47:48], s[58:59]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[49:50], v[45:46], v[49:50], s[56:57]
	v_fma_f64 v[47:48], v[43:44], v[47:48], s[60:61]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[49:50], v[45:46], v[49:50], s[58:59]
	v_fma_f64 v[47:48], v[43:44], v[47:48], s[62:63]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[49:50], v[45:46], v[49:50], s[60:61]
	v_fma_f64 v[47:48], v[43:44], v[47:48], s[64:65]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[49:50], v[45:46], v[49:50], s[62:63]
	v_fma_f64 v[17:18], v[43:44], v[47:48], s[66:67]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[49:50], v[45:46], v[49:50], s[64:65]
	v_fma_f64 v[17:18], v[43:44], v[17:18], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[47:48], v[45:46], v[49:50], s[66:67]
	v_trunc_f64_e32 v[49:50], v[19:20]
	v_fma_f64 v[17:18], v[43:44], v[17:18], 1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[47:48], v[45:46], v[47:48], 1.0
	v_cmp_eq_f64_e64 s3, v[49:50], v[19:20]
	v_trunc_f64_e32 v[19:20], v[53:54]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[17:18], v[17:18], v13
	v_cndmask_b32_e64 v13, 0, v16, s2
	v_cmp_neq_f64_e64 s2, 0x7ff00000, |v[29:30]|
	v_bfi_b32 v13, 0x7fffffff, v58, v13
	v_fma_f64 v[37:38], v[45:46], v[47:48], 1.0
	v_cmp_neq_f64_e64 s9, v[19:20], v[53:54]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[33:34], v[37:38], v15
	v_add_f64 v[15:16], v[23:24], -v[27:28]
	v_add_f64 v[23:24], v[25:26], -v[31:32]
	v_cndmask_b32_e64 v25, 0x7ff00000, v18, s5
	v_cndmask_b32_e64 v26, 0x7ff00000, v34, s7
	s_delay_alu instid0(VALU_DEP_4)
	v_cndmask_b32_e64 v16, 0, v16, s2
	v_cndmask_b32_e64 v15, 0, v15, s2
	s_and_b32 s2, s6, s5
	v_cndmask_b32_e64 v19, 0, v24, s4
	v_cndmask_b32_e64 v18, 0, v23, s4
	v_cndmask_b32_e64 v24, 0, v25, s6
	v_cndmask_b32_e64 v23, 0, v17, s2
	s_and_b32 s4, s8, s7
	v_cndmask_b32_e64 v26, 0, v26, s8
	v_cndmask_b32_e64 v25, 0, v33, s4
	s_and_b32 s5, s3, s9
	v_fma_f64 v[15:16], v[23:24], v[15:16], v[23:24]
	v_cmp_class_f64_e64 s2, v[23:24], 0x204
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_fma_f64 v[17:18], v[25:26], v[18:19], v[25:26]
	v_cmp_class_f64_e64 s4, v[25:26], 0x204
	v_cndmask_b32_e64 v19, 0x3ff00000, v14, s5
	v_cndmask_b32_e64 v14, 0, v14, s5
	v_bfi_b32 v14, 0x7fffffff, v59, v14
	v_cndmask_b32_e64 v16, v16, v24, s2
	v_cndmask_b32_e64 v15, v15, v23, s2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_bfi_b32 v16, 0x7fffffff, v16, v41
	v_cndmask_b32_e64 v23, 0, v15, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v20, 0x7ff80000, v16, s0
	v_cmp_gt_f32_e64 s0, 0, v4
	v_cndmask_b32_e64 v16, v16, v20, s0
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v15, v15, v23, s0
	v_cmp_gt_f32_e64 s0, 0, v22
	v_cndmask_b32_e32 v16, v16, v13, vcc_lo
	v_cndmask_b32_e64 v13, v17, v25, s4
	v_cndmask_b32_e64 v17, v18, v26, s4
	v_cndmask_b32_e64 v15, v15, 0, vcc_lo
	v_cmp_o_f32_e32 vcc_lo, v4, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_bfi_b32 v17, 0x7fffffff, v17, v19
	v_cndmask_b32_e64 v19, 0, v13, s3
	v_cndmask_b32_e64 v18, 0x7ff80000, v17, s3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v13, v13, v19, s0
	s_waitcnt vmcnt(0)
	v_cvt_f64_i32_e32 v[19:20], v57
	v_cndmask_b32_e64 v17, v17, v18, s0
	s_or_b32 s0, s1, s70
	s_cmp_eq_u32 s78, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e64 v4, v17, v14, s0
	v_cndmask_b32_e64 v17, v13, 0, s0
	v_cndmask_b32_e32 v13, 0, v15, vcc_lo
	v_cmp_o_f32_e64 s0, v22, v22
	v_cndmask_b32_e32 v14, 0x7ff80000, v16, vcc_lo
	v_add_co_u32 v7, vcc_lo, v7, 4
	v_add_co_ci_u32_e32 v8, vcc_lo, 0, v8, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v15, 0, v17, s0
	v_cndmask_b32_e64 v16, 0x7ff80000, v4, s0
	v_cvt_f64_f32_e32 v[17:18], v2
	v_add_co_u32 v9, vcc_lo, v9, 4
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v10, vcc_lo
	v_mul_f64 v[13:14], v[13:14], v[15:16]
	v_add_co_u32 v11, vcc_lo, v11, 4
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[13:14], v[13:14], v[19:20], v[17:18]
	v_cvt_f32_f64_e32 v2, v[13:14]
	global_store_b32 v[5:6], v2, off
	s_cbranch_scc0 .LBB0_4
.LBB0_5:                                ; %._crit_edge
                                        ;   in Loop: Header=BB0_2 Depth=1
	v_add_nc_u32_e32 v1, s75, v1
	v_add_nc_u32_e32 v3, s77, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_le_i32_e32 vcc_lo, s33, v1
	s_or_b32 s74, vcc_lo, s74
	s_and_not1_b32 exec_lo, exec_lo, s74
	s_cbranch_execnz .LBB0_2
.LBB0_6:                                ; %Flow60
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9calcDenomiPfS_S_S_Pi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 67
		.amdhsa_next_free_sgpr 79
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z9calcDenomiPfS_S_S_Pi, .Lfunc_end0-_Z9calcDenomiPfS_S_S_Pi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 4156
; NumSgprs: 81
; NumVgprs: 67
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 10
; VGPRBlocks: 8
; NumSGPRsForWavesPerEU: 81
; NumVGPRsForWavesPerEU: 67
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z8calcProbiPfS_S_S_Pi  ; -- Begin function _Z8calcProbiPfS_S_S_Pi
	.globl	_Z8calcProbiPfS_S_S_Pi
	.p2align	8
	.type	_Z8calcProbiPfS_S_S_Pi,@function
_Z8calcProbiPfS_S_S_Pi:                 ; @_Z8calcProbiPfS_S_S_Pi
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x3c
	s_load_b32 s5, s[0:1], 0x0
	s_add_u32 s2, s0, 48
	s_addc_u32 s3, s1, 0
	s_mov_b32 s6, exec_lo
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_mul_i32 s33, s5, s5
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s33, v1
	s_cbranch_execz .LBB1_5
; %bb.1:                                ; %.lr.ph.preheader
	s_ashr_i32 s78, s5, 31
	s_clause 0x1
	s_load_b256 s[8:15], s[0:1], 0x8
	s_load_b64 s[16:17], s[0:1], 0x28
	s_load_b32 s0, s[2:3], 0x0
	s_add_i32 s5, s5, s78
	v_ashrrev_i32_e32 v2, 31, v1
	s_xor_b32 s79, s5, s78
	v_mov_b32_e32 v8, 0x3ff00000
	v_cvt_f32_u32_e32 v0, s79
	s_sub_i32 s1, 0, s79
	s_mov_b32 s18, 0x55555555
	s_mov_b32 s20, 0x968915a9
	s_mov_b32 s22, 0x4222de17
	v_rcp_iflag_f32_e32 v0, v0
	s_mov_b32 s24, 0x3abe935a
	s_mov_b32 s26, 0x47e6c9c2
	s_mov_b32 s28, 0xcfa74449
	s_mov_b32 s30, 0x71bf3c30
	s_mov_b32 s34, 0x1c7792ce
	s_mov_b32 s36, 0x924920da
	s_mov_b32 s38, 0x9999999c
	s_mov_b32 s40, 0xfefa39ef
	s_mov_b32 s42, 0x3b39803f
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v0, 0x4f7ffffe, v0
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s46, s0, s4
	s_mov_b32 s44, 0xd5df274d
	s_ashr_i32 s47, s46, 31
	s_mov_b32 s48, 0x652b82fe
	v_cvt_u32_f32_e32 v0, v0
	s_mov_b32 s52, 0xfca7ab0c
	s_mov_b32 s54, 0x6a5dcb37
	s_mov_b32 s56, 0x623fde64
	s_mov_b32 s58, 0x7c89e6b0
	v_mul_lo_u32 v3, s1, v0
	s_mov_b32 s60, 0x14761f6e
	s_mov_b32 s62, 0x1852b7b0
	s_mov_b32 s64, 0x11122322
	s_mov_b32 s66, 0x555502a1
	s_mov_b32 s68, 0x55555511
	s_mov_b32 s70, 11
	s_mov_b32 s80, 0
	v_mul_hi_u32 v4, v0, v3
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	s_mov_b32 s19, 0x3fe55555
	s_mov_b32 s21, 0x3fba6564
	s_mov_b32 s23, 0x3fbdee67
	s_mov_b32 s25, 0x3fbe25e4
	s_mov_b32 s27, 0x3fc110ef
	s_mov_b32 s29, 0x3fc3b13b
	v_add_nc_u32_e32 v0, v0, v4
	s_mov_b32 s31, 0x3fc745d1
	s_mov_b32 s35, 0x3fcc71c7
	s_mov_b32 s37, 0x3fd24924
	s_mov_b32 s39, 0x3fd99999
	s_mov_b32 s41, 0x3fe62e42
	s_mov_b32 s43, 0x3c7abc9e
	s_mov_b32 s45, 0x3c8543b0
	s_mov_b32 s49, 0x3ff71547
	s_lshl_b64 s[50:51], s[46:47], 2
	s_mov_b32 s53, 0x3e928af3
	s_mov_b32 s55, 0x3e5ade15
	s_mov_b32 s57, 0x3ec71dee
	s_mov_b32 s59, 0x3efa0199
	s_mov_b32 s61, 0x3f2a01a0
	s_mov_b32 s63, 0x3f56c16c
	s_mov_b32 s65, 0x3f811111
	s_mov_b32 s67, 0x3fa55555
	s_mov_b32 s69, 0x3fc55555
	s_mov_b32 s71, 0x3fe00000
	s_mov_b32 s73, 0xbfe55555
	s_mov_b32 s75, 0xbfe62e42
	s_mov_b32 s77, 0xbc7abc9e
.LBB1_2:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	v_ashrrev_i32_e32 v4, 31, v1
	s_mov_b32 s47, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v5, v1, v4
	v_xor_b32_e32 v5, v5, v4
	v_xor_b32_e32 v4, s78, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v6, v5, v0
	v_mul_lo_u32 v7, v6, s79
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v5, v5, v7
	v_add_nc_u32_e32 v7, 1, v6
	v_subrev_nc_u32_e32 v9, s79, v5
	v_cmp_le_u32_e32 vcc_lo, s79, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v6, v6, v7 :: v_dual_cndmask_b32 v5, v5, v9
	v_add_nc_u32_e32 v7, 1, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_le_u32_e32 vcc_lo, s79, v5
	v_cndmask_b32_e32 v5, v6, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v5, v5, v4
	v_sub_nc_u32_e32 v4, v5, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v5, 31, v4
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, s14, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s15, v5, vcc_lo
	global_load_b32 v9, v[4:5], off
	v_mov_b32_e32 v4, -1.0
	s_waitcnt vmcnt(0)
	v_cmpx_neq_f32_e32 0, v9
	s_cbranch_execz .LBB1_4
; %bb.3:                                ;   in Loop: Header=BB1_2 Depth=1
	v_add_co_u32 v4, vcc_lo, s12, v2
	v_add_co_ci_u32_e32 v5, vcc_lo, s13, v3, vcc_lo
	s_mov_b32 s72, s18
	s_mov_b32 s74, s40
	s_mov_b32 s76, s42
	global_load_b32 v6, v[4:5], off
	v_add_co_u32 v4, vcc_lo, s10, v2
	v_add_co_ci_u32_e32 v5, vcc_lo, s11, v3, vcc_lo
	global_load_b32 v10, v[4:5], off
	s_waitcnt vmcnt(1)
	v_div_scale_f32 v4, null, v6, v6, 1.0
	v_div_scale_f32 v11, vcc_lo, 1.0, v6, 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v5, v4
	s_waitcnt_depctr 0xfff
	v_fma_f32 v7, -v4, v5, 1.0
	v_fmac_f32_e32 v5, v7, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v7, v11, v5
	v_fma_f32 v12, -v4, v7, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v7, v12, v5
	v_fma_f32 v4, -v4, v7, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v4, v4, v5, v7
	v_div_fixup_f32 v11, v4, v6, 1.0
	s_waitcnt vmcnt(0)
	v_cvt_f64_f32_e32 v[6:7], v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_f32_e32 v[4:5], v11
	v_frexp_mant_f64_e64 v[12:13], |v[6:7]|
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_frexp_mant_f64_e64 v[14:15], |v[4:5]|
	v_cmp_gt_f64_e32 vcc_lo, s[18:19], v[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cmp_gt_f64_e64 s0, s[18:19], v[14:15]
	v_cndmask_b32_e64 v16, 0, 1, vcc_lo
	v_cndmask_b32_e64 v17, 0, 1, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[12:13], v[12:13], v16
	v_ldexp_f64 v[14:15], v[14:15], v17
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[16:17], v[12:13], 1.0
	v_add_f64 v[28:29], v[12:13], -1.0
	v_add_f64 v[18:19], v[14:15], 1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_rcp_f64_e32 v[20:21], v[16:17]
	v_add_f64 v[32:33], v[16:17], -1.0
	v_rcp_f64_e32 v[22:23], v[18:19]
	v_add_f64 v[36:37], v[18:19], -1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_add_f64 v[12:13], v[12:13], -v[32:33]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[24:25], -v[16:17], v[20:21], 1.0
	v_fma_f64 v[26:27], -v[18:19], v[22:23], 1.0
	v_fma_f64 v[20:21], v[24:25], v[20:21], v[20:21]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[22:23], v[26:27], v[22:23], v[22:23]
	v_fma_f64 v[24:25], -v[16:17], v[20:21], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[26:27], -v[18:19], v[22:23], 1.0
	v_fma_f64 v[20:21], v[24:25], v[20:21], v[20:21]
	v_add_f64 v[24:25], v[14:15], -1.0
	v_add_f64 v[14:15], v[14:15], -v[36:37]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[22:23], v[26:27], v[22:23], v[22:23]
	v_mul_f64 v[26:27], v[28:29], v[20:21]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[30:31], v[24:25], v[22:23]
	v_mul_f64 v[34:35], v[16:17], v[26:27]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[38:39], v[18:19], v[30:31]
	v_fma_f64 v[16:17], v[26:27], v[16:17], -v[34:35]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[18:19], v[30:31], v[18:19], -v[38:39]
	v_fma_f64 v[12:13], v[26:27], v[12:13], v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[14:15], v[30:31], v[14:15], v[18:19]
	v_add_f64 v[16:17], v[34:35], v[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[18:19], v[38:39], v[14:15]
	v_add_f64 v[32:33], v[28:29], -v[16:17]
	v_add_f64 v[34:35], v[16:17], -v[34:35]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[36:37], v[24:25], -v[18:19]
	v_add_f64 v[38:39], v[18:19], -v[38:39]
	v_add_f64 v[28:29], v[28:29], -v[32:33]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[12:13], v[34:35], -v[12:13]
	v_add_f64 v[24:25], v[24:25], -v[36:37]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[14:15], v[38:39], -v[14:15]
	v_add_f64 v[16:17], v[28:29], -v[16:17]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[18:19], v[24:25], -v[18:19]
	v_add_f64 v[12:13], v[12:13], v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[14:15], v[14:15], v[18:19]
	v_add_f64 v[12:13], v[32:33], v[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[14:15], v[36:37], v[14:15]
	v_mul_f64 v[12:13], v[20:21], v[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[14:15], v[22:23], v[14:15]
	v_add_f64 v[16:17], v[26:27], v[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[18:19], v[30:31], v[14:15]
	v_add_f64 v[20:21], v[16:17], -v[26:27]
	v_mul_f64 v[24:25], v[16:17], v[16:17]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[22:23], v[18:19], -v[30:31]
	v_add_f64 v[12:13], v[12:13], -v[20:21]
	v_mul_f64 v[20:21], v[18:19], v[18:19]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[14:15], v[14:15], -v[22:23]
	v_fma_f64 v[22:23], v[16:17], v[16:17], -v[24:25]
	v_add_f64 v[26:27], v[12:13], v[12:13]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[28:29], v[18:19], v[18:19], -v[20:21]
	v_add_f64 v[30:31], v[14:15], v[14:15]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[22:23], v[16:17], v[26:27], v[22:23]
	v_fma_f64 v[26:27], v[18:19], v[30:31], v[28:29]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[28:29], v[24:25], v[22:23]
	v_add_f64 v[30:31], v[20:21], v[26:27]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_fma_f64 v[32:33], v[28:29], s[22:23], s[20:21]
	v_add_f64 v[24:25], v[28:29], -v[24:25]
	v_mul_f64 v[42:43], v[16:17], v[28:29]
	v_fma_f64 v[34:35], v[30:31], s[22:23], s[20:21]
	v_add_f64 v[20:21], v[30:31], -v[20:21]
	v_mul_f64 v[46:47], v[18:19], v[30:31]
	v_fma_f64 v[32:33], v[28:29], v[32:33], s[24:25]
	v_add_f64 v[22:23], v[22:23], -v[24:25]
	v_fma_f64 v[34:35], v[30:31], v[34:35], s[24:25]
	v_add_f64 v[20:21], v[26:27], -v[20:21]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[32:33], v[28:29], v[32:33], s[26:27]
	v_fma_f64 v[34:35], v[30:31], v[34:35], s[26:27]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[32:33], v[28:29], v[32:33], s[28:29]
	v_fma_f64 v[34:35], v[30:31], v[34:35], s[28:29]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[32:33], v[28:29], v[32:33], s[30:31]
	v_fma_f64 v[34:35], v[30:31], v[34:35], s[30:31]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[32:33], v[28:29], v[32:33], s[34:35]
	v_fma_f64 v[34:35], v[30:31], v[34:35], s[34:35]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[32:33], v[28:29], v[32:33], s[36:37]
	v_fma_f64 v[34:35], v[30:31], v[34:35], s[36:37]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[32:33], v[28:29], v[32:33], s[38:39]
	v_fma_f64 v[34:35], v[30:31], v[34:35], s[38:39]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[36:37], v[28:29], v[32:33]
	v_mul_f64 v[38:39], v[30:31], v[34:35]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[24:25], v[28:29], v[32:33], -v[36:37]
	v_fma_f64 v[26:27], v[30:31], v[34:35], -v[38:39]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[24:25], v[22:23], v[32:33], v[24:25]
	v_fma_f64 v[26:27], v[20:21], v[34:35], v[26:27]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[32:33], v[36:37], v[24:25]
	v_add_f64 v[34:35], v[38:39], v[26:27]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[40:41], v[32:33], s[18:19]
	v_add_f64 v[36:37], v[32:33], -v[36:37]
	v_add_f64 v[44:45], v[34:35], s[18:19]
	v_add_f64 v[38:39], v[34:35], -v[38:39]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[48:49], v[40:41], s[72:73]
	v_add_f64 v[24:25], v[24:25], -v[36:37]
	v_fma_f64 v[36:37], v[28:29], v[16:17], -v[42:43]
	v_add_f64 v[50:51], v[44:45], s[72:73]
	v_add_f64 v[26:27], v[26:27], -v[38:39]
	v_fma_f64 v[38:39], v[30:31], v[18:19], -v[46:47]
	v_cmp_class_f64_e64 s72, v[4:5], 0x204
	v_add_f64 v[32:33], v[32:33], -v[48:49]
	v_add_f64 v[24:25], v[24:25], s[44:45]
	v_fma_f64 v[28:29], v[28:29], v[12:13], v[36:37]
	v_ldexp_f64 v[12:13], v[12:13], 1
	v_add_f64 v[34:35], v[34:35], -v[50:51]
	v_add_f64 v[26:27], v[26:27], s[44:45]
	v_fma_f64 v[30:31], v[30:31], v[14:15], v[38:39]
	v_ldexp_f64 v[14:15], v[14:15], 1
	v_add_f64 v[24:25], v[24:25], v[32:33]
	v_fma_f64 v[22:23], v[22:23], v[16:17], v[28:29]
	v_ldexp_f64 v[16:17], v[16:17], 1
	v_add_f64 v[26:27], v[26:27], v[34:35]
	v_fma_f64 v[20:21], v[20:21], v[18:19], v[30:31]
	v_ldexp_f64 v[18:19], v[18:19], 1
	v_add_f64 v[28:29], v[40:41], v[24:25]
	v_add_f64 v[30:31], v[42:43], v[22:23]
	v_add_f64 v[32:33], v[44:45], v[26:27]
	v_add_f64 v[34:35], v[46:47], v[20:21]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[36:37], v[40:41], -v[28:29]
	v_mul_f64 v[38:39], v[30:31], v[28:29]
	v_add_f64 v[42:43], v[30:31], -v[42:43]
	v_add_f64 v[40:41], v[44:45], -v[32:33]
	v_mul_f64 v[44:45], v[34:35], v[32:33]
	v_add_f64 v[46:47], v[34:35], -v[46:47]
	v_add_f64 v[24:25], v[24:25], v[36:37]
	v_fma_f64 v[36:37], v[30:31], v[28:29], -v[38:39]
	v_add_f64 v[22:23], v[22:23], -v[42:43]
	v_add_f64 v[26:27], v[26:27], v[40:41]
	v_fma_f64 v[40:41], v[34:35], v[32:33], -v[44:45]
	v_add_f64 v[20:21], v[20:21], -v[46:47]
	v_fma_f64 v[24:25], v[30:31], v[24:25], v[36:37]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[26:27], v[34:35], v[26:27], v[40:41]
	v_fma_f64 v[22:23], v[22:23], v[28:29], v[24:25]
	v_frexp_exp_i32_f64_e32 v28, v[6:7]
	v_frexp_exp_i32_f64_e32 v29, v[4:5]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[20:21], v[20:21], v[32:33], v[26:27]
	v_add_f64 v[24:25], v[38:39], v[22:23]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_subrev_co_ci_u32_e32 v28, vcc_lo, 0, v28, vcc_lo
	v_subrev_co_ci_u32_e64 v34, vcc_lo, 0, v29, s0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[26:27], v[44:45], v[20:21]
	v_cvt_f64_i32_e32 v[28:29], v28
	v_cmp_eq_f32_e32 vcc_lo, 1.0, v10
	s_delay_alu instid0(VALU_DEP_4)
	v_cvt_f64_i32_e32 v[34:35], v34
	v_cmp_eq_f32_e64 s0, 1.0, v11
	v_add_f64 v[30:31], v[16:17], v[24:25]
	v_add_f64 v[32:33], v[24:25], -v[38:39]
	v_add_f64 v[36:37], v[18:19], v[26:27]
	v_add_f64 v[38:39], v[26:27], -v[44:45]
	v_mul_f64 v[40:41], v[28:29], s[40:41]
	v_add_f64 v[16:17], v[30:31], -v[16:17]
	v_add_f64 v[22:23], v[22:23], -v[32:33]
	v_mul_f64 v[32:33], v[34:35], s[40:41]
	v_add_f64 v[18:19], v[36:37], -v[18:19]
	v_add_f64 v[20:21], v[20:21], -v[38:39]
	v_fma_f64 v[38:39], v[28:29], s[40:41], -v[40:41]
	v_add_f64 v[16:17], v[24:25], -v[16:17]
	v_add_f64 v[12:13], v[12:13], v[22:23]
	v_fma_f64 v[22:23], v[34:35], s[40:41], -v[32:33]
	v_add_f64 v[18:19], v[26:27], -v[18:19]
	v_add_f64 v[14:15], v[14:15], v[20:21]
	v_fma_f64 v[20:21], v[28:29], s[42:43], v[38:39]
	v_add_f64 v[12:13], v[12:13], v[16:17]
	v_fma_f64 v[16:17], v[34:35], s[42:43], v[22:23]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[14:15], v[14:15], v[18:19]
	v_add_f64 v[18:19], v[40:41], v[20:21]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[22:23], v[30:31], v[12:13]
	v_add_f64 v[24:25], v[32:33], v[16:17]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[26:27], v[36:37], v[14:15]
	v_add_f64 v[40:41], v[18:19], -v[40:41]
	s_delay_alu instid0(VALU_DEP_4)
	v_add_f64 v[28:29], v[18:19], v[22:23]
	v_add_f64 v[30:31], v[22:23], -v[30:31]
	v_add_f64 v[32:33], v[24:25], -v[32:33]
	v_add_f64 v[34:35], v[24:25], v[26:27]
	v_add_f64 v[36:37], v[26:27], -v[36:37]
	v_add_f64 v[20:21], v[20:21], -v[40:41]
	v_add_f64 v[38:39], v[28:29], -v[18:19]
	v_add_f64 v[12:13], v[12:13], -v[30:31]
	v_add_f64 v[16:17], v[16:17], -v[32:33]
	v_add_f64 v[42:43], v[34:35], -v[24:25]
	v_add_f64 v[14:15], v[14:15], -v[36:37]
	v_add_f64 v[44:45], v[28:29], -v[38:39]
	v_add_f64 v[22:23], v[22:23], -v[38:39]
	v_add_f64 v[30:31], v[20:21], v[12:13]
	v_add_f64 v[46:47], v[34:35], -v[42:43]
	v_add_f64 v[26:27], v[26:27], -v[42:43]
	v_add_f64 v[18:19], v[18:19], -v[44:45]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[24:25], v[24:25], -v[46:47]
	v_add_f64 v[18:19], v[22:23], v[18:19]
	v_add_f64 v[22:23], v[16:17], v[14:15]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[24:25], v[26:27], v[24:25]
	v_add_f64 v[26:27], v[30:31], -v[20:21]
	v_add_f64 v[18:19], v[30:31], v[18:19]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[32:33], v[22:23], -v[16:17]
	v_add_f64 v[24:25], v[22:23], v[24:25]
	s_delay_alu instid0(VALU_DEP_4)
	v_add_f64 v[30:31], v[30:31], -v[26:27]
	v_add_f64 v[12:13], v[12:13], -v[26:27]
	v_add_f64 v[36:37], v[28:29], v[18:19]
	v_add_f64 v[22:23], v[22:23], -v[32:33]
	v_add_f64 v[14:15], v[14:15], -v[32:33]
	v_add_f64 v[38:39], v[34:35], v[24:25]
	v_add_f64 v[20:21], v[20:21], -v[30:31]
	v_add_f64 v[26:27], v[36:37], -v[28:29]
	v_add_f64 v[16:17], v[16:17], -v[22:23]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[22:23], v[38:39], -v[34:35]
	v_add_f64 v[12:13], v[12:13], v[20:21]
	v_cndmask_b32_e32 v21, 0x40146666, v8, vcc_lo
	v_cndmask_b32_e64 v20, 0x66666666, 0, vcc_lo
	v_add_f64 v[18:19], v[18:19], -v[26:27]
	v_add_f64 v[14:15], v[14:15], v[16:17]
	v_add_f64 v[16:17], v[24:25], -v[22:23]
	v_cndmask_b32_e64 v23, 0x3fc33333, v8, s0
	v_cndmask_b32_e64 v22, 0x33333333, 0, s0
	v_add_f64 v[12:13], v[12:13], v[18:19]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[14:15], v[14:15], v[16:17]
	v_add_f64 v[16:17], v[36:37], v[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[18:19], v[38:39], v[14:15]
	v_add_f64 v[24:25], v[16:17], -v[36:37]
	v_mul_f64 v[26:27], v[20:21], v[16:17]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[28:29], v[18:19], -v[38:39]
	v_mul_f64 v[30:31], v[22:23], v[18:19]
	v_add_f64 v[12:13], v[12:13], -v[24:25]
	s_delay_alu instid0(VALU_DEP_4)
	v_fma_f64 v[16:17], v[20:21], v[16:17], -v[26:27]
	v_cmp_class_f64_e64 vcc_lo, v[26:27], 0x204
	v_add_f64 v[14:15], v[14:15], -v[28:29]
	v_fma_f64 v[18:19], v[22:23], v[18:19], -v[30:31]
	v_cmp_class_f64_e64 s0, v[30:31], 0x204
	v_fma_f64 v[12:13], v[20:21], v[12:13], v[16:17]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[14:15], v[22:23], v[14:15], v[18:19]
	v_add_f64 v[16:17], v[26:27], v[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[18:19], v[30:31], v[14:15]
	v_dual_cndmask_b32 v25, v17, v27 :: v_dual_cndmask_b32 v24, v16, v26
	v_add_co_u32 v44, vcc_lo, s16, v2
	v_add_co_ci_u32_e32 v45, vcc_lo, s17, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_mul_f64 v[32:33], v[24:25], s[48:49]
	v_cndmask_b32_e64 v29, v19, v31, s0
	v_cndmask_b32_e64 v28, v18, v30, s0
	global_load_b32 v44, v[44:45], off
	v_add_f64 v[16:17], v[16:17], -v[26:27]
	v_add_f64 v[18:19], v[18:19], -v[30:31]
	v_cmp_nlt_f64_e64 s0, 0x40900000, v[24:25]
	v_mul_f64 v[34:35], v[28:29], s[48:49]
	v_cmp_nlt_f64_e64 s3, 0x40900000, v[28:29]
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[24:25]|
	v_cmp_ngt_f64_e64 s1, 0xc090cc00, v[24:25]
	v_cmp_ngt_f64_e64 s4, 0xc090cc00, v[28:29]
	v_cmp_neq_f64_e64 s2, 0x7ff00000, |v[28:29]|
	v_rndne_f64_e32 v[32:33], v[32:33]
	v_add_f64 v[12:13], v[12:13], -v[16:17]
	v_add_f64 v[14:15], v[14:15], -v[18:19]
	v_rndne_f64_e32 v[34:35], v[34:35]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_fma_f64 v[36:37], v[32:33], s[74:75], v[24:25]
	v_cvt_i32_f64_e32 v45, v[32:33]
	v_dual_cndmask_b32 v13, 0, v13 :: v_dual_cndmask_b32 v12, 0, v12
	s_and_b32 vcc_lo, s1, s0
	v_fma_f64 v[38:39], v[34:35], s[74:75], v[28:29]
	v_cndmask_b32_e64 v15, 0, v15, s2
	v_cndmask_b32_e64 v14, 0, v14, s2
	v_cmp_eq_f32_e64 s2, 0, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v4, 0x7ff00000, 0, s2
	v_fma_f64 v[36:37], v[32:33], s[76:77], v[36:37]
	v_fma_f64 v[38:39], v[34:35], s[76:77], v[38:39]
	v_fma_f64 v[40:41], v[36:37], s[54:55], s[52:53]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[42:43], v[38:39], s[54:55], s[52:53]
	v_fma_f64 v[40:41], v[36:37], v[40:41], s[56:57]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[42:43], v[38:39], v[42:43], s[56:57]
	v_fma_f64 v[40:41], v[36:37], v[40:41], s[58:59]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[42:43], v[38:39], v[42:43], s[58:59]
	v_fma_f64 v[40:41], v[36:37], v[40:41], s[60:61]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[42:43], v[38:39], v[42:43], s[60:61]
	v_fma_f64 v[40:41], v[36:37], v[40:41], s[62:63]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[42:43], v[38:39], v[42:43], s[62:63]
	v_fma_f64 v[40:41], v[36:37], v[40:41], s[64:65]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[42:43], v[38:39], v[42:43], s[64:65]
	v_fma_f64 v[40:41], v[36:37], v[40:41], s[66:67]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[42:43], v[38:39], v[42:43], s[66:67]
	v_fma_f64 v[40:41], v[36:37], v[40:41], s[68:69]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[42:43], v[38:39], v[42:43], s[68:69]
	v_fma_f64 v[40:41], v[36:37], v[40:41], s[70:71]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[42:43], v[38:39], v[42:43], s[70:71]
	v_fma_f64 v[40:41], v[36:37], v[40:41], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[42:43], v[38:39], v[42:43], 1.0
	v_fma_f64 v[32:33], v[36:37], v[40:41], 1.0
	v_cvt_i32_f64_e32 v40, v[34:35]
	v_mul_f64 v[36:37], v[20:21], 0.5
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[34:35], v[38:39], v[42:43], 1.0
	v_ldexp_f64 v[26:27], v[32:33], v45
	v_mul_f64 v[32:33], v[22:23], 0.5
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_trunc_f64_e32 v[38:39], v[36:37]
	v_ldexp_f64 v[30:31], v[34:35], v40
	v_trunc_f64_e32 v[34:35], v[20:21]
	v_trunc_f64_e32 v[40:41], v[22:23]
	v_cndmask_b32_e64 v18, 0x7ff00000, v27, s0
	v_trunc_f64_e32 v[16:17], v[32:33]
	v_cmp_neq_f64_e64 s6, v[38:39], v[36:37]
	s_delay_alu instid0(VALU_DEP_3)
	v_cndmask_b32_e64 v19, 0, v18, s1
	v_cndmask_b32_e32 v18, 0, v26, vcc_lo
	v_cndmask_b32_e64 v24, 0x7ff00000, v31, s3
	s_and_b32 vcc_lo, s4, s3
	v_cmp_eq_f64_e64 s5, v[34:35], v[20:21]
	v_cndmask_b32_e32 v20, 0, v30, vcc_lo
	v_cmp_eq_f64_e64 s7, v[40:41], v[22:23]
	v_cndmask_b32_e64 v21, 0, v24, s4
	v_fma_f64 v[12:13], v[18:19], v[12:13], v[18:19]
	v_cmp_class_f64_e64 vcc_lo, v[18:19], 0x204
	v_cmp_class_f64_e64 s4, v[6:7], 0x204
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[14:15], v[20:21], v[14:15], v[20:21]
	v_cmp_class_f64_e64 s1, v[20:21], 0x204
	v_cmp_neq_f64_e64 s0, v[16:17], v[32:33]
	s_and_b32 s3, s5, s6
	v_cndmask_b32_e64 v6, 0x3ff00000, v7, s3
	v_cndmask_b32_e64 v7, 0, v7, s3
	v_dual_cndmask_b32 v12, v12, v18 :: v_dual_cndmask_b32 v13, v13, v19
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_bfi_b32 v4, 0x7fffffff, v4, v7
	v_cndmask_b32_e64 v15, v15, v21, s1
	v_cndmask_b32_e64 v14, v14, v20, s1
	v_cmp_gt_f32_e64 s1, 0, v11
	v_cndmask_b32_e64 v18, 0, v14, s7
	s_and_b32 vcc_lo, s7, s0
	v_cmp_eq_f32_e64 s0, 0, v11
	v_cndmask_b32_e32 v16, 0x3ff00000, v5, vcc_lo
	v_cndmask_b32_e32 v5, 0, v5, vcc_lo
	v_cmp_gt_f32_e32 vcc_lo, 0, v10
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_bfi_b32 v7, 0x7fffffff, v15, v16
	v_cndmask_b32_e64 v16, 0, v12, s5
	v_cndmask_b32_e64 v17, 0x7ff80000, v7, s7
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_cndmask_b32_e32 v12, v12, v16, vcc_lo
	v_bfi_b32 v6, 0x7fffffff, v13, v6
	v_cndmask_b32_e64 v13, 0x7ff00000, 0, s0
	v_cndmask_b32_e64 v7, v7, v17, s1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v15, 0x7ff80000, v6, s5
	v_cndmask_b32_e32 v6, v6, v15, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_bfi_b32 v5, 0x7fffffff, v13, v5
	v_cndmask_b32_e64 v13, v14, v18, s1
	s_or_b32 vcc_lo, s2, s4
	v_cndmask_b32_e32 v6, v6, v4, vcc_lo
	v_cndmask_b32_e64 v4, v12, 0, vcc_lo
	s_or_b32 vcc_lo, s0, s72
	v_cmp_o_f32_e64 s0, v10, v10
	v_cndmask_b32_e32 v7, v7, v5, vcc_lo
	v_cndmask_b32_e64 v10, v13, 0, vcc_lo
	v_cmp_o_f32_e32 vcc_lo, v11, v11
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v4, 0, v4, s0
	v_cndmask_b32_e64 v5, 0x7ff80000, v6, s0
	v_cndmask_b32_e32 v6, 0, v10, vcc_lo
	v_cndmask_b32_e32 v7, 0x7ff80000, v7, vcc_lo
	s_waitcnt vmcnt(0)
	v_cvt_f64_i32_e32 v[10:11], v44
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[4:5], v[4:5], v[6:7]
	v_cvt_f64_f32_e32 v[6:7], v9
	v_mul_f64 v[4:5], v[4:5], v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_scale_f64 v[9:10], null, v[6:7], v[6:7], v[4:5]
	v_rcp_f64_e32 v[11:12], v[9:10]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[13:14], -v[9:10], v[11:12], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[11:12], v[11:12], v[13:14], v[11:12]
	v_fma_f64 v[13:14], -v[9:10], v[11:12], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[11:12], v[11:12], v[13:14], v[11:12]
	v_div_scale_f64 v[13:14], vcc_lo, v[4:5], v[6:7], v[4:5]
	v_mul_f64 v[15:16], v[13:14], v[11:12]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[9:10], -v[9:10], v[15:16], v[13:14]
	v_div_fmas_f64 v[9:10], v[9:10], v[11:12], v[15:16]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f64 v[4:5], v[9:10], v[6:7], v[4:5]
	v_cvt_f32_f64_e32 v4, v[4:5]
.LBB1_4:                                ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s47
	v_add_nc_u32_e32 v1, s46, v1
	v_add_co_u32 v5, vcc_lo, s8, v2
	v_add_co_ci_u32_e32 v6, vcc_lo, s9, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_le_i32_e32 vcc_lo, s33, v1
	v_add_co_u32 v2, s0, v2, s50
	v_add_co_ci_u32_e64 v3, s0, s51, v3, s0
	s_or_b32 s80, vcc_lo, s80
	global_store_b32 v[5:6], v4, off
	s_and_not1_b32 exec_lo, exec_lo, s80
	s_cbranch_execnz .LBB1_2
.LBB1_5:                                ; %Flow47
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z8calcProbiPfS_S_S_Pi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 52
		.amdhsa_next_free_sgpr 81
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z8calcProbiPfS_S_S_Pi, .Lfunc_end1-_Z8calcProbiPfS_S_S_Pi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 4292
; NumSgprs: 83
; NumVgprs: 52
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 10
; VGPRBlocks: 6
; NumSGPRsForWavesPerEU: 83
; NumVGPRsForWavesPerEU: 52
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z8setZerosiPfS_S_S_S_Pi ; -- Begin function _Z8setZerosiPfS_S_S_S_Pi
	.globl	_Z8setZerosiPfS_S_S_S_Pi
	.p2align	8
	.type	_Z8setZerosiPfS_S_S_S_Pi,@function
_Z8setZerosiPfS_S_S_S_Pi:               ; @_Z8setZerosiPfS_S_S_S_Pi
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x44
	s_load_b32 s16, s[0:1], 0x0
	s_add_u32 s2, s0, 56
	s_addc_u32 s3, s1, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s12, s4, 0xffff
	s_mul_i32 s16, s16, s16
	v_mad_u64_u32 v[1:2], null, s15, s12, v[0:1]
	s_mov_b32 s4, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s16, v1
	s_cbranch_execz .LBB2_3
; %bb.1:                                ; %.lr.ph.preheader
	s_load_b32 s13, s[2:3], 0x0
	s_clause 0x1
	s_load_b256 s[4:11], s[0:1], 0x8
	s_load_b64 s[2:3], s[0:1], 0x30
	v_ashrrev_i32_e32 v2, 31, v1
	v_mov_b32_e32 v0, 0
	v_mov_b32_e32 v4, 1.0
	s_mov_b32 s1, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s12, s13, s12
	s_ashr_i32 s13, s12, 31
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b64 s[14:15], s[12:13], 2
.LBB2_2:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_u32 v5, vcc_lo, s2, v2
	v_add_co_ci_u32_e32 v6, vcc_lo, s3, v3, vcc_lo
	v_add_co_u32 v7, vcc_lo, s6, v2
	v_add_co_ci_u32_e32 v8, vcc_lo, s7, v3, vcc_lo
	v_add_co_u32 v9, vcc_lo, s8, v2
	v_add_co_ci_u32_e32 v10, vcc_lo, s9, v3, vcc_lo
	v_add_co_u32 v11, vcc_lo, s10, v2
	v_add_nc_u32_e32 v1, s12, v1
	v_add_co_ci_u32_e32 v12, vcc_lo, s11, v3, vcc_lo
	v_add_co_u32 v13, vcc_lo, s4, v2
	v_add_co_ci_u32_e32 v14, vcc_lo, s5, v3, vcc_lo
	v_add_co_u32 v2, vcc_lo, v2, s14
	v_cmp_le_i32_e64 s0, s16, v1
	v_add_co_ci_u32_e32 v3, vcc_lo, s15, v3, vcc_lo
	global_store_b32 v[5:6], v0, off
	global_store_b32 v[7:8], v4, off
	global_store_b32 v[9:10], v0, off
	global_store_b32 v[11:12], v4, off
	global_store_b32 v[13:14], v0, off
	s_or_b32 s1, s0, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB2_2
.LBB2_3:                                ; %Flow41
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z8setZerosiPfS_S_S_S_Pi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 312
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 15
		.amdhsa_next_free_sgpr 17
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z8setZerosiPfS_S_S_S_Pi, .Lfunc_end2-_Z8setZerosiPfS_S_S_S_Pi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 304
; NumSgprs: 19
; NumVgprs: 15
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 19
; NumVGPRsForWavesPerEU: 15
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z8clearTauiPfS_        ; -- Begin function _Z8clearTauiPfS_
	.globl	_Z8clearTauiPfS_
	.p2align	8
	.type	_Z8clearTauiPfS_,@function
_Z8clearTauiPfS_:                       ; @_Z8clearTauiPfS_
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x24
	s_load_b32 s12, s[0:1], 0x0
	s_add_u32 s2, s0, 24
	s_addc_u32 s3, s1, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s8, s4, 0xffff
	s_mul_i32 s12, s12, s12
	v_mad_u64_u32 v[1:2], null, s15, s8, v[0:1]
	s_mov_b32 s4, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s12, v1
	s_cbranch_execz .LBB3_3
; %bb.1:                                ; %.lr.ph.preheader
	s_load_b32 s9, s[2:3], 0x0
	s_load_b128 s[4:7], s[0:1], 0x8
	v_ashrrev_i32_e32 v2, 31, v1
	v_mov_b32_e32 v0, 0
	s_mov_b32 s2, 0x9999999a
	s_mov_b32 s3, 0x3fd99999
	s_mov_b32 s1, 0
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s8, s9, s8
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_ashr_i32 s9, s8, 31
	s_lshl_b64 s[10:11], s[8:9], 2
.LBB3_2:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_u32 v4, vcc_lo, s6, v2
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v3, vcc_lo
	v_add_co_u32 v6, vcc_lo, s4, v2
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v3, vcc_lo
	v_add_nc_u32_e32 v1, s8, v1
	global_load_b32 v8, v[4:5], off
	global_load_b32 v10, v[6:7], off
	v_add_co_u32 v2, s0, v2, s10
	v_cmp_le_i32_e32 vcc_lo, s12, v1
	v_add_co_ci_u32_e64 v3, s0, s11, v3, s0
	s_or_b32 s1, vcc_lo, s1
	s_waitcnt vmcnt(1)
	v_cvt_f64_f32_e32 v[8:9], v8
	s_waitcnt vmcnt(0)
	v_cvt_f64_f32_e32 v[10:11], v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[8:9], v[10:11], s[2:3], v[8:9]
	v_add_f64 v[8:9], v[8:9], 1.0
	s_delay_alu instid0(VALU_DEP_1)
	v_cvt_f32_f64_e32 v8, v[8:9]
	global_store_b32 v[6:7], v8, off
	global_store_b32 v[4:5], v0, off
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB3_2
.LBB3_3:                                ; %Flow24
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z8clearTauiPfS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 12
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end3:
	.size	_Z8clearTauiPfS_, .Lfunc_end3-_Z8clearTauiPfS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 296
; NumSgprs: 18
; NumVgprs: 12
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 12
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         52
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         60
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         62
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         64
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         66
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         68
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         70
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         112
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 304
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z9calcDenomiPfS_S_S_Pi
    .private_segment_fixed_size: 0
    .sgpr_count:     81
    .sgpr_spill_count: 0
    .symbol:         _Z9calcDenomiPfS_S_S_Pi.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     67
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         52
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         60
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         62
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         64
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         66
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         68
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         70
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         112
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 304
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z8calcProbiPfS_S_S_Pi
    .private_segment_fixed_size: 0
    .sgpr_count:     83
    .sgpr_spill_count: 0
    .symbol:         _Z8calcProbiPfS_S_S_Pi.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     52
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         48
        .size:           8
        .value_kind:     global_buffer
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         60
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         64
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         68
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         70
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         72
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         74
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         76
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         78
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         112
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         120
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 312
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z8setZerosiPfS_S_S_S_Pi
    .private_segment_fixed_size: 0
    .sgpr_count:     19
    .sgpr_spill_count: 0
    .symbol:         _Z8setZerosiPfS_S_S_S_Pi.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     15
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z8clearTauiPfS_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z8clearTauiPfS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     12
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
