#include <stdio.h>

#define N 8192
#define THREAD_PER_BLOCK_SIDE_X 8
#define THREAD_PER_BLOCK_SIDE_Y 16
#define THREAD_PER_BLOCK THREAD_PER_BLOCK_SIDE_X *THREAD_PER_BLOCK_SIDE_Y
#define TYPE int
#define TYPE_S "int"

__global__ void transpose(TYPE *in, TYPE *out, int size) {
  // int temp_side = THREAD_PER_BLOCK;
  __shared__ TYPE temp_matrix[THREAD_PER_BLOCK_SIDE_X][THREAD_PER_BLOCK_SIDE_Y];

  int col = blockIdx.x * blockDim.x + threadIdx.x;
  int row = blockIdx.y * blockDim.y + threadIdx.y;

  // copy submatrix (transposed) in shared memory
  temp_matrix[threadIdx.x][threadIdx.y] = in[row * size + col];

  __syncthreads();

  // copy submatrix in main memory
  out[col * size + row] = temp_matrix[threadIdx.x][threadIdx.y];
}

int correct(TYPE *a, TYPE *b, int side) {
  int i;
  for (i = 0; i < side * side; i++)
    if (a[i] != b[(i % side) * side + i / side])
      return 0;
  return 1;
}

int main() {

  TYPE *h_in, *h_out;
  TYPE *d_in, *d_out;
  int size = N * N;
  int size_in_memory = size * sizeof(TYPE);
  int i;

  // timing
  cudaEvent_t start, stop;
  cudaEventCreate(&start);
  cudaEventCreate(&stop);

  // allocate memory in host and device
  h_in = (TYPE *)malloc(size_in_memory);
  h_out = (TYPE *)malloc(size_in_memory);

  cudaMalloc((void **)&d_in, size_in_memory);
  cudaMalloc((void **)&d_out, size_in_memory);

  // fill matrix in host
  for (i = 0; i < size; i++)
    h_in[i] = i;

  // transfer matrix from host to device
  cudaMemcpy(d_in, h_in, size_in_memory, cudaMemcpyHostToDevice);

  // transpose matrix in device
  dim3 grid, block;
  block.x = THREAD_PER_BLOCK_SIDE_X;
  block.y = THREAD_PER_BLOCK_SIDE_Y;
  grid.x = N / block.x;
  grid.y = N / block.y;

  cudaEventRecord(start);
  transpose<<<grid, block>>>(d_in, d_out, N);
  cudaEventRecord(stop);

  // transfer matrix from device to host
  cudaMemcpy(h_out, d_out, size_in_memory, cudaMemcpyDeviceToHost);

  // correctness test
  printf("\ncorrecteness: %d \n", correct(h_in, h_out, N));

  // free memory
  free(h_in);
  free(h_out);
  cudaFree(d_in);
  cudaFree(d_out);

  // showing Bandwidth
  cudaEventSynchronize(stop);
  float milliseconds = 0;
  cudaEventElapsedTime(&milliseconds, start, stop);

  printf("\nmatrix type: %s", TYPE_S);
  printf("\nblock: %d x %d", block.y, block.x);
  printf("\nmilliseconds: %f", milliseconds);
  printf("\nBandwidth: %f GB/s \n", 2 * size_in_memory / milliseconds / 1e6);

  return 0;
}

	.file	"tmpxft_0031e99a_00000000-6_fast_transpose_int.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2031:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2031:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z7correctPiS_i
	.type	_Z7correctPiS_i, @function
_Z7correctPiS_i:
.LFB2027:
	.cfi_startproc
	endbr64
	movl	%edx, %r9d
	movq	%rdi, %r8
	movl	%edx, %ecx
	xorl	%edi, %edi
	imull	%edx, %r9d
.L3:
	movl	%edi, %eax
	cmpl	%edi, %r9d
	jle	.L8
	cltd
	movl	(%r8,%rdi,4), %r10d
	incq	%rdi
	idivl	%ecx
	imull	%ecx, %edx
	addl	%eax, %edx
	movslq	%edx, %rdx
	cmpl	(%rsi,%rdx,4), %r10d
	je	.L3
	xorl	%eax, %eax
	ret
.L8:
	movl	$1, %eax
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z7correctPiS_i, .-_Z7correctPiS_i
	.globl	_Z31__device_stub__Z9transposePiS_iPiS_i
	.type	_Z31__device_stub__Z9transposePiS_iPiS_i, @function
_Z31__device_stub__Z9transposePiS_iPiS_i:
.LFB2053:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L9
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z9transposePiS_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L9:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L11
	call	__stack_chk_fail@PLT
.L11:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2053:
	.size	_Z31__device_stub__Z9transposePiS_iPiS_i, .-_Z31__device_stub__Z9transposePiS_iPiS_i
	.globl	_Z9transposePiS_i
	.type	_Z9transposePiS_i, @function
_Z9transposePiS_i:
.LFB2054:
	.cfi_startproc
	endbr64
	jmp	_Z31__device_stub__Z9transposePiS_iPiS_i
	.cfi_endproc
.LFE2054:
	.size	_Z9transposePiS_i, .-_Z9transposePiS_i
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"\ncorrecteness: %d \n"
.LC2:
	.string	"int"
.LC3:
	.string	"\nmatrix type: %s"
.LC4:
	.string	"\nblock: %d x %d"
.LC5:
	.string	"\nmilliseconds: %f"
.LC8:
	.string	"\nBandwidth: %f GB/s \n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	subq	$88, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	leaq	32(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	40(%rsp), %rdi
	call	cudaEventCreate@PLT
	movl	$268435456, %edi
	call	malloc@PLT
	movl	$268435456, %edi
	movq	%rax, %rbx
	call	malloc@PLT
	leaq	16(%rsp), %rdi
	movl	$268435456, %esi
	movq	%rax, %rbp
	call	cudaMalloc@PLT
	leaq	24(%rsp), %rdi
	movl	$268435456, %esi
	call	cudaMalloc@PLT
	xorl	%eax, %eax
.L15:
	movl	%eax, (%rbx,%rax,4)
	incq	%rax
	cmpq	$67108864, %rax
	jne	.L15
	movq	16(%rsp), %rdi
	movl	$1, %ecx
	movl	$268435456, %edx
	movq	%rbx, %rsi
	call	cudaMemcpy@PLT
	movq	32(%rsp), %rdi
	xorl	%esi, %esi
	movl	$2147483649, %eax
	salq	$10, %rax
	movl	$1, 56(%rsp)
	movq	%rax, 48(%rsp)
	call	cudaEventRecord@PLT
	movq	48(%rsp), %rdi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	56(%rsp), %esi
	movl	$1, %ecx
	movabsq	$68719476744, %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L16
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdi
	movl	$8192, %edx
	call	_Z31__device_stub__Z9transposePiS_iPiS_i
.L16:
	movq	40(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	24(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbp, %rdi
	movl	$268435456, %edx
	call	cudaMemcpy@PLT
	movl	$8192, %edx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_Z7correctPiS_i
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	movl	%eax, %edx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	%rbx, %rdi
	call	free@PLT
	movq	%rbp, %rdi
	call	free@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	40(%rsp), %rdx
	movq	32(%rsp), %rsi
	leaq	12(%rsp), %rdi
	movl	$0x00000000, 12(%rsp)
	call	cudaEventElapsedTime@PLT
	leaq	.LC2(%rip), %rdx
	leaq	.LC3(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	$8, %ecx
	movl	$16, %edx
	xorl	%eax, %eax
	leaq	.LC4(%rip), %rsi
	movl	$2, %edi
	call	__printf_chk@PLT
	leaq	.LC5(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	12(%rsp), %xmm0
	call	__printf_chk@PLT
	movl	$2, %edi
	movb	$1, %al
	leaq	.LC8(%rip), %rsi
	movss	.LC6(%rip), %xmm0
	divss	12(%rsp), %xmm0
	cvtss2sd	%xmm0, %xmm0
	divsd	.LC7(%rip), %xmm0
	call	__printf_chk@PLT
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L17
	call	__stack_chk_fail@PLT
.L17:
	addq	$88, %rsp
	.cfi_def_cfa_offset 24
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	main, .-main
	.section	.rodata.str1.1
.LC9:
	.string	"_Z9transposePiS_i"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2056:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC9(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z9transposePiS_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2056:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC6:
	.long	1308622848
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC7:
	.long	0
	.long	1093567616
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <stdio.h>

#define N 8192
#define THREAD_PER_BLOCK_SIDE_X 8
#define THREAD_PER_BLOCK_SIDE_Y 16
#define THREAD_PER_BLOCK THREAD_PER_BLOCK_SIDE_X *THREAD_PER_BLOCK_SIDE_Y
#define TYPE int
#define TYPE_S "int"

__global__ void transpose(TYPE *in, TYPE *out, int size) {
  // int temp_side = THREAD_PER_BLOCK;
  __shared__ TYPE temp_matrix[THREAD_PER_BLOCK_SIDE_X][THREAD_PER_BLOCK_SIDE_Y];

  int col = blockIdx.x * blockDim.x + threadIdx.x;
  int row = blockIdx.y * blockDim.y + threadIdx.y;

  // copy submatrix (transposed) in shared memory
  temp_matrix[threadIdx.x][threadIdx.y] = in[row * size + col];

  __syncthreads();

  // copy submatrix in main memory
  out[col * size + row] = temp_matrix[threadIdx.x][threadIdx.y];
}

int correct(TYPE *a, TYPE *b, int side) {
  int i;
  for (i = 0; i < side * side; i++)
    if (a[i] != b[(i % side) * side + i / side])
      return 0;
  return 1;
}

int main() {

  TYPE *h_in, *h_out;
  TYPE *d_in, *d_out;
  int size = N * N;
  int size_in_memory = size * sizeof(TYPE);
  int i;

  // timing
  hipEvent_t start, stop;
  hipEventCreate(&start);
  hipEventCreate(&stop);

  // allocate memory in host and device
  h_in = (TYPE *)malloc(size_in_memory);
  h_out = (TYPE *)malloc(size_in_memory);

  hipMalloc((void **)&d_in, size_in_memory);
  hipMalloc((void **)&d_out, size_in_memory);

  // fill matrix in host
  for (i = 0; i < size; i++)
    h_in[i] = i;

  // transfer matrix from host to device
  hipMemcpy(d_in, h_in, size_in_memory, hipMemcpyHostToDevice);

  // transpose matrix in device
  dim3 grid, block;
  block.x = THREAD_PER_BLOCK_SIDE_X;
  block.y = THREAD_PER_BLOCK_SIDE_Y;
  grid.x = N / block.x;
  grid.y = N / block.y;

  hipEventRecord(start);
  transpose<<<grid, block>>>(d_in, d_out, N);
  hipEventRecord(stop);

  // transfer matrix from device to host
  hipMemcpy(h_out, d_out, size_in_memory, hipMemcpyDeviceToHost);

  // correctness test
  printf("\ncorrecteness: %d \n", correct(h_in, h_out, N));

  // free memory
  free(h_in);
  free(h_out);
  hipFree(d_in);
  hipFree(d_out);

  // showing Bandwidth
  hipEventSynchronize(stop);
  float milliseconds = 0;
  hipEventElapsedTime(&milliseconds, start, stop);

  printf("\nmatrix type: %s", TYPE_S);
  printf("\nblock: %d x %d", block.y, block.x);
  printf("\nmilliseconds: %f", milliseconds);
  printf("\nBandwidth: %f GB/s \n", 2 * size_in_memory / milliseconds / 1e6);

  return 0;
}

	.text
	.file	"fast_transpose_int.hip"
	.globl	_Z24__device_stub__transposePiS_i # -- Begin function _Z24__device_stub__transposePiS_i
	.type	_Z24__device_stub__transposePiS_i,@function
_Z24__device_stub__transposePiS_i:      # @_Z24__device_stub__transposePiS_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9transposePiS_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z24__device_stub__transposePiS_i, .Lfunc_end0-_Z24__device_stub__transposePiS_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z7correctPiS_i                 # -- Begin function _Z7correctPiS_i
	.type	_Z7correctPiS_i,@function
_Z7correctPiS_i:                        # @_Z7correctPiS_i
	.cfi_startproc
# %bb.0:
	movl	$1, %ecx
	testl	%edx, %edx
	je	.LBB1_5
# %bb.1:                                # %.lr.ph.preheader
	movl	%edx, %r8d
	movl	%edx, %r10d
	imull	%r10d, %r10d
	cmpl	$1, %r10d
	adcl	$0, %r10d
	xorl	%r9d, %r9d
.LBB1_3:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movl	(%rdi,%r9,4), %r11d
	movl	%r9d, %eax
	cltd
	idivl	%r8d
	imull	%r8d, %edx
	addl	%eax, %edx
	movslq	%edx, %rax
	cmpl	(%rsi,%rax,4), %r11d
	jne	.LBB1_4
# %bb.2:                                #   in Loop: Header=BB1_3 Depth=1
	incq	%r9
	cmpq	%r9, %r10
	jne	.LBB1_3
	jmp	.LBB1_5
.LBB1_4:
	xorl	%ecx, %ecx
.LBB1_5:                                # %._crit_edge
	movl	%ecx, %eax
	retq
.Lfunc_end1:
	.size	_Z7correctPiS_i, .Lfunc_end1-_Z7correctPiS_i
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI2_0:
	.long	0x4e000000                      # float 536870912
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0
.LCPI2_1:
	.quad	0x412e848000000000              # double 1.0E+6
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$48, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	32(%rsp), %rdi
	callq	hipEventCreate
	leaq	8(%rsp), %rdi
	callq	hipEventCreate
	movl	$268435456, %edi                # imm = 0x10000000
	callq	malloc
	movq	%rax, %rbx
	movl	$268435456, %edi                # imm = 0x10000000
	callq	malloc
	movq	%rax, %r14
	leaq	24(%rsp), %rdi
	movl	$268435456, %esi                # imm = 0x10000000
	callq	hipMalloc
	leaq	16(%rsp), %rdi
	movl	$268435456, %esi                # imm = 0x10000000
	callq	hipMalloc
	xorl	%eax, %eax
.LBB2_1:                                # =>This Inner Loop Header: Depth=1
	movl	%eax, (%rbx,%rax,4)
	incq	%rax
	cmpq	$67108864, %rax                 # imm = 0x4000000
	jne	.LBB2_1
# %bb.2:
	movq	24(%rsp), %rdi
	movl	$268435456, %edx                # imm = 0x10000000
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	32(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movabsq	$2199023256576, %rdi            # imm = 0x20000000400
	movabsq	$68719476744, %rdx              # imm = 0x1000000008
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_4
# %bb.3:
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rsi
	movl	$8192, %edx                     # imm = 0x2000
	callq	_Z24__device_stub__transposePiS_i
.LBB2_4:
	movq	8(%rsp), %rdi
	xorl	%r15d, %r15d
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	16(%rsp), %rsi
	movl	$268435456, %edx                # imm = 0x10000000
	movq	%r14, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	xorl	%eax, %eax
.LBB2_5:                                # %.lr.ph.i
                                        # =>This Inner Loop Header: Depth=1
	movl	(%rbx,%rax,4), %ecx
	leal	8191(%rax), %edx
	testl	%eax, %eax
	cmovnsl	%eax, %edx
	movl	%edx, %esi
	andl	$-8192, %esi                    # imm = 0xE000
	movl	%eax, %edi
	subl	%esi, %edi
	shll	$13, %edi
	sarl	$13, %edx
	addl	%edi, %edx
	movslq	%edx, %rdx
	cmpl	(%r14,%rdx,4), %ecx
	jne	.LBB2_8
# %bb.6:                                #   in Loop: Header=BB2_5 Depth=1
	incq	%rax
	cmpq	$67108864, %rax                 # imm = 0x4000000
	jne	.LBB2_5
# %bb.7:
	movl	$1, %r15d
.LBB2_8:                                # %_Z7correctPiS_i.exit
	movl	$.L.str, %edi
	movl	%r15d, %esi
	xorl	%eax, %eax
	callq	printf
	movq	%rbx, %rdi
	callq	free
	movq	%r14, %rdi
	callq	free
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipEventSynchronize
	leaq	44(%rsp), %rbx
	movl	$0, (%rbx)
	movq	32(%rsp), %rsi
	movq	8(%rsp), %rdx
	movq	%rbx, %rdi
	callq	hipEventElapsedTime
	movl	$.L.str.1, %edi
	movl	$.L.str.2, %esi
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.3, %edi
	movl	$16, %esi
	movl	$8, %edx
	xorl	%eax, %eax
	callq	printf
	cvtss2sd	(%rbx), %xmm0
	movl	$.L.str.4, %edi
	movb	$1, %al
	callq	printf
	movss	.LCPI2_0(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	divss	(%rbx), %xmm0
	cvtss2sd	%xmm0, %xmm0
	divsd	.LCPI2_1(%rip), %xmm0
	movl	$.L.str.5, %edi
	movb	$1, %al
	callq	printf
	xorl	%eax, %eax
	addq	$48, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9transposePiS_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z9transposePiS_i,@object       # @_Z9transposePiS_i
	.section	.rodata,"a",@progbits
	.globl	_Z9transposePiS_i
	.p2align	3, 0x0
_Z9transposePiS_i:
	.quad	_Z24__device_stub__transposePiS_i
	.size	_Z9transposePiS_i, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"\ncorrecteness: %d \n"
	.size	.L.str, 20

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"\nmatrix type: %s"
	.size	.L.str.1, 17

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"int"
	.size	.L.str.2, 4

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"\nblock: %d x %d"
	.size	.L.str.3, 16

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"\nmilliseconds: %f"
	.size	.L.str.4, 18

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"\nBandwidth: %f GB/s \n"
	.size	.L.str.5, 22

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z9transposePiS_i"
	.size	.L__unnamed_1, 18

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z24__device_stub__transposePiS_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z9transposePiS_i
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z9transposePiS_i       ; -- Begin function _Z9transposePiS_i
	.globl	_Z9transposePiS_i
	.p2align	8
	.type	_Z9transposePiS_i,@function
_Z9transposePiS_i:                      ; @_Z9transposePiS_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b32 s4, s[0:1], 0x10
	v_and_b32_e32 v1, 0x3ff, v0
	v_bfe_u32 v0, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[2:3], null, s14, s2, v[1:2]
	v_mad_u64_u32 v[3:4], null, s15, s3, v[0:1]
	s_load_b128 s[0:3], s[0:1], 0x0
	v_lshlrev_b32_e32 v0, 2, v0
	v_mad_u64_u32 v[4:5], null, v3, s4, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v5, 31, v4
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, s0, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v5, vcc_lo
	global_load_b32 v4, v[4:5], off
	v_lshl_add_u32 v5, v1, 6, v0
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[0:1], null, v2, s4, v[3:4]
	ds_store_b32 v5, v4
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_b32 v2, v5
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	v_add_co_u32 v0, vcc_lo, s2, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[0:1], v2, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9transposePiS_i
		.amdhsa_group_segment_fixed_size 512
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z9transposePiS_i, .Lfunc_end0-_Z9transposePiS_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 244
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 512 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 512
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z9transposePiS_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z9transposePiS_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     6
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
