#include "includes.h"
__global__ void dist_calc ( float *coord, int *close_num, int *close_flag, int *close_idx, int num_atom, int num_atom2) {

// close_flag is a 1024 x num_atom2 int matrix initialized to 0.
// close_idx: A num_atom x 200 int matrix, row i of which only the first close_num[i] elements are defined. (Otherwise it's -1).
__shared__ float x_ref, y_ref, z_ref;
__shared__ int idz;
__shared__ int temp[2048];
// Calc distance
for (int ii = blockIdx.x; ii < num_atom; ii += gridDim.x) {
if (threadIdx.x == 0) {
x_ref = coord[3*ii  ];
y_ref = coord[3*ii+1];
z_ref = coord[3*ii+2];
}
int idy = ii % gridDim.x; // This will be what row of close_flag this block is putting its value in.
__syncthreads();
for (int jj = threadIdx.x; jj < num_atom; jj += blockDim.x) {
float r2t = (coord[3*jj  ] - x_ref) * (coord[3*jj  ] - x_ref) +
(coord[3*jj+1] - y_ref) * (coord[3*jj+1] - y_ref) +
(coord[3*jj+2] - z_ref) * (coord[3*jj+2] - z_ref);

if (r2t < 34.0) {
close_flag[idy*num_atom2+jj] = 1; // roughly 2 A + 2 A vdW + 2 * 1.8 A probe
} else {
close_flag[idy*num_atom2+jj] = 0;
}
if (ii == jj) close_flag[idy*num_atom2+jj] = 0;
}
__syncthreads();
// Do pre scan
idz = 0;
int temp_sum = 0;
for (int jj = threadIdx.x; jj < num_atom2; jj += 2 * blockDim.x) {
int idx = jj % blockDim.x;
int offset = 1;
temp[2 * idx]     = close_flag[idy * num_atom2 + 2 * blockDim.x * idz + 2 * idx];
temp[2 * idx + 1] = close_flag[idy * num_atom2 + 2 * blockDim.x * idz + 2 * idx + 1];
for (int d = 2 * blockDim.x>>1; d > 0; d >>= 1) { // up-sweep
__syncthreads();
if (idx < d) {
int ai = offset * (2 * idx + 1) - 1;
int bi = offset * (2 * idx + 2) - 1;
temp[bi] += temp[ai];
}
offset *= 2;
}
__syncthreads();
temp_sum = close_num[ii];
__syncthreads();
if (idx == 0) {
close_num[ii] += temp[2 * blockDim.x - 1]; // log the total number of 1's in this blockDim
temp[2 * blockDim.x - 1] = 0;
}
__syncthreads();
for (int d = 1; d < blockDim.x * 2; d *= 2) { //down-sweep
offset >>= 1;
__syncthreads();
if (idx < d) {
int ai = offset * (2 * idx + 1) - 1;
int bi = offset * (2 * idx + 2) - 1;
int t    = temp[ai];
temp[ai] = temp[bi];
temp[bi] += t;
}
}

__syncthreads();

// Finally assign the indices
if (close_flag[idy * num_atom2 + 2 * blockDim.x * idz + 2 * idx] == 1) {
close_idx[ii * 1024 + temp[2*idx] + temp_sum] = 2 * idx + 2 * blockDim.x * idz;
}
if (close_flag[idy * num_atom2 + 2 * blockDim.x * idz + 2 * idx + 1] == 1) {
close_idx[ii * 1024 + temp[2*idx+1] + temp_sum] = 2*idx+1 + 2 * blockDim.x * idz;
}
idz++;
__syncthreads();
}
}
}
	.file	"tmpxft_0037ec78_00000000-6_dist_calc.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2010:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2010:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z38__device_stub__Z9dist_calcPfPiS0_S0_iiPfPiS0_S0_ii
	.type	_Z38__device_stub__Z9dist_calcPfPiS0_S0_iiPfPiS0_S0_ii, @function
_Z38__device_stub__Z9dist_calcPfPiS0_S0_iiPfPiS0_S0_ii:
.LFB2032:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 12(%rsp)
	movl	%r9d, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z9dist_calcPfPiS0_S0_ii(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L2:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2032:
	.size	_Z38__device_stub__Z9dist_calcPfPiS0_S0_iiPfPiS0_S0_ii, .-_Z38__device_stub__Z9dist_calcPfPiS0_S0_iiPfPiS0_S0_ii
	.globl	_Z9dist_calcPfPiS0_S0_ii
	.type	_Z9dist_calcPfPiS0_S0_ii, @function
_Z9dist_calcPfPiS0_S0_ii:
.LFB2033:
	.cfi_startproc
	endbr64
	jmp	_Z38__device_stub__Z9dist_calcPfPiS0_S0_iiPfPiS0_S0_ii
	.cfi_endproc
.LFE2033:
	.size	_Z9dist_calcPfPiS0_S0_ii, .-_Z9dist_calcPfPiS0_S0_ii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z9dist_calcPfPiS0_S0_ii"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2035:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z9dist_calcPfPiS0_S0_ii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2035:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include "includes.h"
__global__ void dist_calc ( float *coord, int *close_num, int *close_flag, int *close_idx, int num_atom, int num_atom2) {

// close_flag is a 1024 x num_atom2 int matrix initialized to 0.
// close_idx: A num_atom x 200 int matrix, row i of which only the first close_num[i] elements are defined. (Otherwise it's -1).
__shared__ float x_ref, y_ref, z_ref;
__shared__ int idz;
__shared__ int temp[2048];
// Calc distance
for (int ii = blockIdx.x; ii < num_atom; ii += gridDim.x) {
if (threadIdx.x == 0) {
x_ref = coord[3*ii  ];
y_ref = coord[3*ii+1];
z_ref = coord[3*ii+2];
}
int idy = ii % gridDim.x; // This will be what row of close_flag this block is putting its value in.
__syncthreads();
for (int jj = threadIdx.x; jj < num_atom; jj += blockDim.x) {
float r2t = (coord[3*jj  ] - x_ref) * (coord[3*jj  ] - x_ref) +
(coord[3*jj+1] - y_ref) * (coord[3*jj+1] - y_ref) +
(coord[3*jj+2] - z_ref) * (coord[3*jj+2] - z_ref);

if (r2t < 34.0) {
close_flag[idy*num_atom2+jj] = 1; // roughly 2 A + 2 A vdW + 2 * 1.8 A probe
} else {
close_flag[idy*num_atom2+jj] = 0;
}
if (ii == jj) close_flag[idy*num_atom2+jj] = 0;
}
__syncthreads();
// Do pre scan
idz = 0;
int temp_sum = 0;
for (int jj = threadIdx.x; jj < num_atom2; jj += 2 * blockDim.x) {
int idx = jj % blockDim.x;
int offset = 1;
temp[2 * idx]     = close_flag[idy * num_atom2 + 2 * blockDim.x * idz + 2 * idx];
temp[2 * idx + 1] = close_flag[idy * num_atom2 + 2 * blockDim.x * idz + 2 * idx + 1];
for (int d = 2 * blockDim.x>>1; d > 0; d >>= 1) { // up-sweep
__syncthreads();
if (idx < d) {
int ai = offset * (2 * idx + 1) - 1;
int bi = offset * (2 * idx + 2) - 1;
temp[bi] += temp[ai];
}
offset *= 2;
}
__syncthreads();
temp_sum = close_num[ii];
__syncthreads();
if (idx == 0) {
close_num[ii] += temp[2 * blockDim.x - 1]; // log the total number of 1's in this blockDim
temp[2 * blockDim.x - 1] = 0;
}
__syncthreads();
for (int d = 1; d < blockDim.x * 2; d *= 2) { //down-sweep
offset >>= 1;
__syncthreads();
if (idx < d) {
int ai = offset * (2 * idx + 1) - 1;
int bi = offset * (2 * idx + 2) - 1;
int t    = temp[ai];
temp[ai] = temp[bi];
temp[bi] += t;
}
}

__syncthreads();

// Finally assign the indices
if (close_flag[idy * num_atom2 + 2 * blockDim.x * idz + 2 * idx] == 1) {
close_idx[ii * 1024 + temp[2*idx] + temp_sum] = 2 * idx + 2 * blockDim.x * idz;
}
if (close_flag[idy * num_atom2 + 2 * blockDim.x * idz + 2 * idx + 1] == 1) {
close_idx[ii * 1024 + temp[2*idx+1] + temp_sum] = 2*idx+1 + 2 * blockDim.x * idz;
}
idz++;
__syncthreads();
}
}
}
	.text
	.file	"dist_calc.hip"
	.globl	_Z24__device_stub__dist_calcPfPiS0_S0_ii # -- Begin function _Z24__device_stub__dist_calcPfPiS0_S0_ii
	.type	_Z24__device_stub__dist_calcPfPiS0_S0_ii,@function
_Z24__device_stub__dist_calcPfPiS0_S0_ii: # @_Z24__device_stub__dist_calcPfPiS0_S0_ii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	12(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	8(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9dist_calcPfPiS0_S0_ii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z24__device_stub__dist_calcPfPiS0_S0_ii, .Lfunc_end0-_Z24__device_stub__dist_calcPfPiS0_S0_ii
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB1_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB1_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9dist_calcPfPiS0_S0_ii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end1:
	.size	__hip_module_ctor, .Lfunc_end1-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB2_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB2_2:
	retq
.Lfunc_end2:
	.size	__hip_module_dtor, .Lfunc_end2-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z9dist_calcPfPiS0_S0_ii,@object # @_Z9dist_calcPfPiS0_S0_ii
	.section	.rodata,"a",@progbits
	.globl	_Z9dist_calcPfPiS0_S0_ii
	.p2align	3, 0x0
_Z9dist_calcPfPiS0_S0_ii:
	.quad	_Z24__device_stub__dist_calcPfPiS0_S0_ii
	.size	_Z9dist_calcPfPiS0_S0_ii, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z9dist_calcPfPiS0_S0_ii"
	.size	.L__unnamed_1, 25

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z24__device_stub__dist_calcPfPiS0_S0_ii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z9dist_calcPfPiS0_S0_ii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z9dist_calcPfPiS0_S0_ii ; -- Begin function _Z9dist_calcPfPiS0_S0_ii
	.globl	_Z9dist_calcPfPiS0_S0_ii
	.p2align	8
	.type	_Z9dist_calcPfPiS0_S0_ii,@function
_Z9dist_calcPfPiS0_S0_ii:               ; @_Z9dist_calcPfPiS0_S0_ii
; %bb.0:
	s_mov_b32 s12, s15
	s_load_b64 s[14:15], s[0:1], 0x20
	s_waitcnt lgkmcnt(0)
	s_cmp_ge_i32 s12, s14
	s_cbranch_scc1 .LBB0_30
; %bb.1:                                ; %.lr.ph126
	s_clause 0x1
	s_load_b32 s20, s[0:1], 0x28
	s_load_b256 s[4:11], s[0:1], 0x0
	s_add_u32 s16, s0, 40
	s_addc_u32 s17, s1, 0
	v_cmp_eq_u32_e64 s2, 0, v0
	v_cmp_gt_i32_e64 s0, s14, v0
	v_cmp_gt_i32_e64 s3, s15, v0
	v_mul_u32_u24_e32 v7, 3, v0
	v_mov_b32_e32 v8, 0x2004
	v_mov_b32_e32 v2, 0
	s_waitcnt lgkmcnt(0)
	v_cvt_f32_u32_e32 v1, s20
	s_sub_i32 s1, 0, s20
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v1, v1
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v1, 0x4f7ffffe, v1
	v_cvt_u32_f32_e32 v1, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s13, v1
	s_mul_i32 s1, s1, s13
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_hi_u32 s1, s13, s1
	s_add_i32 s1, s13, s1
.LBB0_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_6 Depth 2
                                        ;     Child Loop BB0_11 Depth 2
                                        ;       Child Loop BB0_12 Depth 3
                                        ;       Child Loop BB0_20 Depth 3
	s_and_saveexec_b32 s13, s2
	s_cbranch_execz .LBB0_4
; %bb.3:                                ;   in Loop: Header=BB0_2 Depth=1
	s_mul_i32 s18, s12, 3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_ashr_i32 s19, s18, 31
	s_lshl_b64 s[18:19], s[18:19], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s18, s4, s18
	s_addc_u32 s19, s5, s19
	global_load_b96 v[3:5], v2, s[18:19]
	s_waitcnt vmcnt(0)
	ds_store_2addr_b32 v8, v3, v4 offset1:1
	ds_store_b32 v2, v5 offset:8204
.LBB0_4:                                ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s13
	s_mul_hi_u32 s13, s12, s1
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s13, s13, s20
	s_barrier
	s_sub_i32 s13, s12, s13
	buffer_gl0_inv
	s_sub_i32 s18, s13, s20
	s_cmp_ge_u32 s13, s20
	s_cselect_b32 s13, s18, s13
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_sub_i32 s18, s13, s20
	s_cmp_ge_u32 s13, s20
	s_cselect_b32 s21, s18, s13
	s_mul_i32 s21, s21, s15
	s_and_saveexec_b32 s13, s0
	s_cbranch_execz .LBB0_9
; %bb.5:                                ; %.lr.ph
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_load_b32 s22, s[16:17], 0xc
	ds_load_2addr_b32 v[3:4], v8 offset1:1
	ds_load_b32 v1, v2 offset:8204
	s_add_i32 s18, s12, s21
	v_mov_b32_e32 v5, v7
	s_ashr_i32 s19, s18, 31
	v_mov_b32_e32 v9, v0
	s_lshl_b64 s[18:19], s[18:19], 2
	s_mov_b32 s24, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s22, s22, 0xffff
	s_add_u32 s18, s8, s18
	s_addc_u32 s19, s9, s19
	s_mul_i32 s23, s22, 3
.LBB0_6:                                ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_ashrrev_i32_e32 v6, 31, v5
	s_mov_b32 s25, exec_lo
	v_add_nc_u32_e32 v13, s21, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[10:11], 2, v[5:6]
	v_ashrrev_i32_e32 v14, 31, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v10, vcc_lo, s4, v10
	v_add_co_ci_u32_e32 v11, vcc_lo, s5, v11, vcc_lo
	global_load_b96 v[10:12], v[10:11], off
	s_waitcnt vmcnt(0)
	v_sub_f32_e32 v6, v11, v4
	v_sub_f32_e32 v10, v10, v3
	v_sub_f32_e32 v12, v12, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v6, v6, v6
	v_fmac_f32_e32 v6, v10, v10
	v_lshlrev_b64 v[10:11], 2, v[13:14]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v6, v12, v12
	v_add_co_u32 v10, vcc_lo, s8, v10
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v11, vcc_lo, s9, v11, vcc_lo
	v_cmp_gt_f32_e32 vcc_lo, 0x42080000, v6
	v_cndmask_b32_e64 v6, 0, 1, vcc_lo
	global_store_b32 v[10:11], v6, off
	v_cmpx_eq_u32_e64 s12, v9
	s_cbranch_execz .LBB0_8
; %bb.7:                                ;   in Loop: Header=BB0_6 Depth=2
	global_store_b32 v2, v2, s[18:19]
.LBB0_8:                                ;   in Loop: Header=BB0_6 Depth=2
	s_or_b32 exec_lo, exec_lo, s25
	v_add_nc_u32_e32 v9, s22, v9
	v_add_nc_u32_e32 v5, s23, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_le_i32_e32 vcc_lo, s14, v9
	s_or_b32 s24, vcc_lo, s24
	s_and_not1_b32 exec_lo, exec_lo, s24
	s_cbranch_execnz .LBB0_6
.LBB0_9:                                ; %Flow154
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s13
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	ds_store_b32 v2, v2 offset:8192
	s_and_saveexec_b32 s22, s3
	s_cbranch_execz .LBB0_28
; %bb.10:                               ; %.lr.ph122
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_load_b32 s13, s[16:17], 0xc
	v_mov_b32_e32 v5, v0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s23, s13, 0xffff
	s_ashr_i32 s13, s12, 31
	v_cvt_f32_u32_e32 v1, s23
	s_lshl_b64 s[18:19], s[12:13], 2
	s_lshl_b32 s13, s23, 1
	s_add_u32 s18, s6, s18
	s_addc_u32 s19, s7, s19
	v_rcp_iflag_f32_e32 v1, v1
	s_lshl_b32 s24, s23, 3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_i32 s24, s24, -4
	s_cmp_lg_u32 s23, 0
	s_cselect_b32 s25, -1, 0
	s_sub_i32 s26, 0, s23
	s_lshl_b32 s27, s12, 10
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v1, 0x4f7ffffe, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_u32_f32_e32 v1, v1
	v_mul_lo_u32 v3, s26, v1
	s_mov_b32 s26, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v3, v1, v3
	v_add_nc_u32_e32 v4, v1, v3
.LBB0_11:                               ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB0_12 Depth 3
                                        ;       Child Loop BB0_20 Depth 3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v1, v5, v4
	ds_load_b32 v6, v2 offset:8192
	s_mov_b32 s28, 1
	s_mov_b32 s29, s23
	v_mul_lo_u32 v1, v1, s23
	v_sub_nc_u32_e32 v1, v5, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_subrev_nc_u32_e32 v3, s23, v1
	v_cmp_le_u32_e32 vcc_lo, s23, v1
	v_cndmask_b32_e32 v1, v1, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_subrev_nc_u32_e32 v3, s23, v1
	v_cmp_le_u32_e32 vcc_lo, s23, v1
	v_cndmask_b32_e32 v11, v1, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v9, 1, v11
	v_lshlrev_b32_e32 v10, 3, v11
	v_add_nc_u32_e32 v3, s21, v9
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mad_u64_u32 v[12:13], null, s13, v6, v[3:4]
	v_mov_b32_e32 v13, v2
	v_or_b32_e32 v6, 1, v9
	v_add_nc_u32_e32 v1, 1, v12
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[12:13], 2, v[12:13]
	v_lshlrev_b64 v[14:15], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v12, vcc_lo, s8, v12
	v_add_co_ci_u32_e32 v13, vcc_lo, s9, v13, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v14, vcc_lo, s8, v14
	v_add_co_ci_u32_e32 v15, vcc_lo, s9, v15, vcc_lo
	s_clause 0x1
	global_load_b32 v12, v[12:13], off
	global_load_b32 v13, v[14:15], off
	s_waitcnt vmcnt(0)
	ds_store_b64 v10, v[12:13]
.LBB0_12:                               ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_11 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_mov_b32 s30, exec_lo
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmpx_gt_u32_e64 s29, v11
	s_cbranch_execz .LBB0_14
; %bb.13:                               ;   in Loop: Header=BB0_12 Depth=3
	v_mul_lo_u32 v1, s28, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v1, v1, 2, -4
	v_lshl_add_u32 v12, s28, 2, v1
	ds_load_b32 v1, v1
	ds_load_b32 v13, v12
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v13, v1
	ds_store_b32 v12, v1
.LBB0_14:                               ;   in Loop: Header=BB0_12 Depth=3
	s_or_b32 exec_lo, exec_lo, s30
	s_lshl_b32 s28, s28, 1
	s_lshr_b32 s30, s29, 1
	s_cmp_lt_u32 s29, 2
	s_cbranch_scc1 .LBB0_16
; %bb.15:                               ;   in Loop: Header=BB0_12 Depth=3
	s_mov_b32 s29, s30
	s_branch .LBB0_12
.LBB0_16:                               ;   in Loop: Header=BB0_11 Depth=2
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	global_load_b32 v12, v2, s[18:19]
	s_mov_b32 s29, exec_lo
	s_waitcnt vmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmpx_eq_u32_e32 0, v11
	s_cbranch_execz .LBB0_18
; %bb.17:                               ;   in Loop: Header=BB0_11 Depth=2
	global_load_b32 v1, v2, s[18:19]
	v_mov_b32_e32 v13, s24
	ds_load_b32 v14, v13
	ds_store_b32 v13, v2
	s_waitcnt vmcnt(0) lgkmcnt(1)
	v_add_nc_u32_e32 v1, v1, v14
	global_store_b32 v2, v1, s[18:19]
.LBB0_18:                               ;   in Loop: Header=BB0_11 Depth=2
	s_or_b32 exec_lo, exec_lo, s29
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s25
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_cbranch_vccnz .LBB0_23
; %bb.19:                               ; %.lr.ph118.preheader
                                        ;   in Loop: Header=BB0_11 Depth=2
	s_mov_b32 s29, 1
.LBB0_20:                               ; %.lr.ph118
                                        ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_11 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_lshr_b32 s28, s28, 1
	s_mov_b32 s30, exec_lo
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmpx_gt_u32_e64 s29, v11
	s_cbranch_execz .LBB0_22
; %bb.21:                               ;   in Loop: Header=BB0_20 Depth=3
	v_mul_lo_u32 v1, s28, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v1, v1, 2, -4
	v_lshl_add_u32 v13, s28, 2, v1
	ds_load_b32 v14, v1
	ds_load_b32 v15, v13
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v14, v15, v14
	ds_store_b32 v1, v15
	ds_store_b32 v13, v14
.LBB0_22:                               ;   in Loop: Header=BB0_20 Depth=3
	s_or_b32 exec_lo, exec_lo, s30
	s_lshl_b32 s29, s29, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_ge_u32 s29, s13
	s_cbranch_scc0 .LBB0_20
.LBB0_23:                               ; %._crit_edge119
                                        ;   in Loop: Header=BB0_11 Depth=2
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_b32 v11, v2 offset:8192
	s_mov_b32 s28, exec_lo
	s_waitcnt lgkmcnt(0)
	v_mul_lo_u32 v13, v11, s13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v1, v3, v13
	v_lshlrev_b64 v[14:15], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v14, vcc_lo, s8, v14
	v_add_co_ci_u32_e32 v15, vcc_lo, s9, v15, vcc_lo
	global_load_b32 v3, v[14:15], off
	s_waitcnt vmcnt(0)
	v_cmpx_eq_u32_e32 1, v3
	s_cbranch_execz .LBB0_25
; %bb.24:                               ;   in Loop: Header=BB0_11 Depth=2
	ds_load_b32 v3, v10
	s_waitcnt lgkmcnt(0)
	v_add3_u32 v14, v12, s27, v3
	v_add_nc_u32_e32 v3, v13, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v15, 31, v14
	v_lshlrev_b64 v[14:15], 2, v[14:15]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v14, vcc_lo, s10, v14
	v_add_co_ci_u32_e32 v15, vcc_lo, s11, v15, vcc_lo
	global_store_b32 v[14:15], v3, off
.LBB0_25:                               ;   in Loop: Header=BB0_11 Depth=2
	s_or_b32 exec_lo, exec_lo, s28
	v_add_nc_u32_e32 v1, 1, v1
	s_mov_b32 s28, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[14:15], 2, v[1:2]
	v_add_co_u32 v14, vcc_lo, s8, v14
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v15, vcc_lo, s9, v15, vcc_lo
	global_load_b32 v1, v[14:15], off
	s_waitcnt vmcnt(0)
	v_cmpx_eq_u32_e32 1, v1
	s_cbranch_execz .LBB0_27
; %bb.26:                               ;   in Loop: Header=BB0_11 Depth=2
	ds_load_b32 v1, v10 offset:4
	s_waitcnt lgkmcnt(0)
	v_add3_u32 v9, v12, s27, v1
	v_add_nc_u32_e32 v1, v13, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v10, 31, v9
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v9, vcc_lo, s10, v9
	v_add_co_ci_u32_e32 v10, vcc_lo, s11, v10, vcc_lo
	global_store_b32 v[9:10], v1, off
.LBB0_27:                               ;   in Loop: Header=BB0_11 Depth=2
	s_or_b32 exec_lo, exec_lo, s28
	v_add_nc_u32_e32 v5, s13, v5
	v_add_nc_u32_e32 v1, 1, v11
	s_delay_alu instid0(VALU_DEP_2)
	v_cmp_le_i32_e32 vcc_lo, s15, v5
	ds_store_b32 v2, v1 offset:8192
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_or_b32 s26, vcc_lo, s26
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s26
	s_cbranch_execnz .LBB0_11
.LBB0_28:                               ; %Flow152
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s22
; %bb.29:                               ; %._crit_edge123
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_add_i32 s12, s12, s20
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_ge_i32 s12, s14
	s_cbranch_scc0 .LBB0_2
.LBB0_30:                               ; %._crit_edge127
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9dist_calcPfPiS0_S0_ii
		.amdhsa_group_segment_fixed_size 8208
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 16
		.amdhsa_next_free_sgpr 31
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z9dist_calcPfPiS0_S0_ii, .Lfunc_end0-_Z9dist_calcPfPiS0_S0_ii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1660
; NumSgprs: 33
; NumVgprs: 16
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 8208 bytes/workgroup (compile time only)
; SGPRBlocks: 4
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 33
; NumVGPRsForWavesPerEU: 16
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         36
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         44
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         52
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         54
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         56
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         58
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         60
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         62
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         104
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 8208
    .kernarg_segment_align: 8
    .kernarg_segment_size: 296
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z9dist_calcPfPiS0_S0_ii
    .private_segment_fixed_size: 0
    .sgpr_count:     33
    .sgpr_spill_count: 0
    .symbol:         _Z9dist_calcPfPiS0_S0_ii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     16
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
