#include "global_defines.cuh"

__global__
void redistribute_kernel(const int lx, const int ly, const int lz,
		FLOATING reynolds, FLOATING nu, FLOATING r_small,
		FLOATING t_0, FLOATING t_1, FLOATING t_2, FLOATING c_squ,

		FLOATING *Q0, FLOATING *Q1, FLOATING *Q2, FLOATING *Q3,
		FLOATING *Q4, FLOATING *Q5, FLOATING *Q6, FLOATING *Q7,
		FLOATING *Q8, FLOATING *Q9, FLOATING *Q10, FLOATING *Q11,
		FLOATING *Q12, FLOATING *Q13, FLOATING *Q14, FLOATING *Q15,
		FLOATING *Q16, FLOATING *Q17, FLOATING *Q18){

	/************************************************************************
	 *                                                                      *
	 *     density redistribution in first lattice column                   *
	 *                                                                      *
	 *                                                                      *
	 *     Last change: 04/05/2003                                          *
	 *                                                                      *
	 ************************************************************************/
	/*
				c
				c.......directed flow is induced by density redistribution in the first
				c       lattice column. This is not too clever, since the resulting
				c       reynolds number can not be controlled and reaching steady state
				c       takes quite some time, but it is simple and it works ...
				c       use this to start with no initial field
	 */

	/*
	creates u_n, u_squ and assigns the values in node[]

	 */

	int tid=blockIdx.x*blockDim.x+threadIdx.x;
	//int end_of_memory=lz*ly*(lx);
	int z=(int) (tid/(ly*lx));
	int	y=(tid-z*(ly*lx))/lx;
	int	x=tid-z*(ly*lx)-y*lx;

	int R_big;
	int baffle_position=59;

	FLOATING    mass_flow;

	//.....local variables

	int   yc, zc, yr, zr;


	FLOATING   rho/*local density*/, u_avg,A_out,A_inn,A_anu,pi,u_xa,u_xs;
	FLOATING   u_x,u_y, u_z, u_n[19] , u_squ;


	yc= (ly+1)/2 -1;//CHANGED! ORIGINALLY IT WAS yc= (ly +1)/2; AND zc= (ly +1)/2;
	zc= (ly+1)/2 -1;
	R_big=35;
	mass_flow=0.05;
	pi = acos(0.0);
	u_avg =reynolds*nu/(2*R_big);
	u_xa= (R_big*R_big) / (R_big*R_big-r_small*r_small)*u_avg/(1+mass_flow);
	A_out=pi*R_big*R_big;
	A_inn=pi*r_small*r_small;
	A_anu=A_out-A_inn;
	u_xs=A_anu*u_xa*mass_flow/A_inn;



	//.....compute weighting factors (depending on lattice geometry) for
	//     increasing/decreasing inlet densities


	//8etei se olo to domain thn idia taxuthta, thn opoia 8a allaksei meta
	//gia ton eswteriko swlhna

	//todo: vale sto katw for, to x na paizei metaksu timwn pou prosdiorizontai apo to rank!
	//px. gia x=0...1/rank... 1/rank+margin... 2/rank.... etc!

	//	int end_of_memory=lz*ly*(baffle_position+1);





	zr=z-zc;
	yr=y-yc;

	if(x< (baffle_position+1) and yr*yr+zr*zr < r_small*r_small and tid<lx*ly*lz){
		// id = z*+y+x


		//		for( z = 0; z< lz ; ++z){
		//			for( y = 0; y< ly ; ++y){
		//				for( x = 0; x< baffle_position+1 ; ++x){



		//		rho=0.0;
		rho=Q0[index(z,y,x)]+Q1[index(z,y,x)]+Q2[index(z,y,x)]+Q3[index(z,y,x)]+
				Q4[index(z,y,x)]+Q5[index(z,y,x)]+Q6[index(z,y,x)]+Q7[index(z,y,x)]+
				Q8[index(z,y,x)]+Q9[index(z,y,x)]+Q10[index(z,y,x)]+Q11[index(z,y,x)]+
				Q12[index(z,y,x)]+Q13[index(z,y,x)]+Q14[index(z,y,x)]+Q15[index(z,y,x)]+
				Q16[index(z,y,x)]+Q17[index(z,y,x)]+Q18[index(z,y,x)];


		u_x = u_xs;
		u_y =  0.0;
		u_z =  0.0;

		u_n[0]= 0.0; //SHOULD NEVER USED!
		u_n[1] =   u_x; //u_xa
		u_n[2] =         u_y;
		u_n[3] = - u_x;
		u_n[4] =       - u_y;
		u_n[5] =   u_z;
		u_n[6] =       - u_z;
		u_n[7] =   u_x + u_y;
		u_n[8] = - u_x + u_y;
		u_n[9] = - u_x - u_y;
		u_n[10] =   u_x - u_y;
		u_n[11] =   u_x - u_z;
		u_n[12] = - u_x - u_z;
		u_n[13] = - u_x + u_z;
		u_n[14] =   u_x + u_z;
		u_n[15] =   u_z + u_y;
		u_n[16] = - u_z + u_y;
		u_n[17] = - u_z - u_y;
		u_n[18] =   u_z - u_y;

		u_squ = u_x*u_x + u_y*u_y + u_z*u_z;


		Q0[index(z,y,x)]=(FLOATING) (t_0  * rho *(1.0  - u_squ / (2.0  * c_squ)));

		//...........axis speeds (factor: t_1)

		Q1[index(z,y,x)]=(FLOATING) (t_1 * rho *	 (1.0+ ( u_n[1]/c_squ ) +  0.5* ( (u_n[1]*u_n[1])/(c_squ*c_squ) ) - 0.5 * ( u_squ/c_squ ) ));;
		Q2[index(z,y,x)]=(FLOATING) (t_1 * rho *	 (1.0+ ( u_n[2]/c_squ ) +  0.5* ( (u_n[2]*u_n[2])/(c_squ*c_squ) ) - 0.5 * ( u_squ/c_squ ) ));;
		Q3[index(z,y,x)]=(FLOATING) (t_1 * rho *	 (1.0+ ( u_n[3]/c_squ ) +  0.5* ( (u_n[3]*u_n[3])/(c_squ*c_squ) ) - 0.5 * ( u_squ/c_squ ) ));;
		Q4[index(z,y,x)]=(FLOATING) (t_1 * rho *	 (1.0+ ( u_n[4]/c_squ ) +  0.5* ( (u_n[4]*u_n[4])/(c_squ*c_squ) ) - 0.5 * ( u_squ/c_squ ) ));;
		Q5[index(z,y,x)]=(FLOATING) (t_1 * rho *	 (1.0+ ( u_n[5]/c_squ ) +  0.5* ( (u_n[5]*u_n[5])/(c_squ*c_squ) ) - 0.5 * ( u_squ/c_squ ) ));;
		Q6[index(z,y,x)]=(FLOATING) (t_1 * rho *	 (1.0+ ( u_n[6]/c_squ ) +  0.5* ( (u_n[6]*u_n[6])/(c_squ*c_squ) ) - 0.5 * ( u_squ/c_squ ) ));;

		//...........diagonal speeds (factor: t_2)
		Q7[index(z,y,x)]=(FLOATING) (t_2 * rho *	 (1.0+ ( u_n[7]/c_squ ) +  0.5* ( (u_n[7]*u_n[7])/(c_squ*c_squ) ) - 0.5 * ( u_squ/c_squ ) ));;
		Q8[index(z,y,x)]=(FLOATING) (t_2  * rho * (1.0+ ( u_n[8]/c_squ ) +  0.5* ( (u_n[8]*u_n[8])/(c_squ*c_squ) ) - 0.5 * ( u_squ/c_squ ) ));
		Q9[index(z,y,x)]=(FLOATING) (t_2  * rho * (1.0+ ( u_n[9]/c_squ ) +  0.5* ( (u_n[9]*u_n[9])/(c_squ*c_squ) ) - 0.5 * ( u_squ/c_squ ) ));
		Q10[index(z,y,x)]=(FLOATING) (t_2  * rho * (1.0+ ( u_n[10]/c_squ ) +  0.5* ( (u_n[10]*u_n[10])/(c_squ*c_squ) ) - 0.5 * ( u_squ/c_squ ) ));
		Q11[index(z,y,x)]=(FLOATING) (t_2  * rho * (1.0+ ( u_n[11]/c_squ ) +  0.5* ( (u_n[11]*u_n[11])/(c_squ*c_squ) ) - 0.5 * ( u_squ/c_squ ) ));
		Q12[index(z,y,x)]=(FLOATING) (t_2  * rho * (1.0+ ( u_n[12]/c_squ ) +  0.5* ( (u_n[12]*u_n[12])/(c_squ*c_squ) ) - 0.5 * ( u_squ/c_squ ) ));
		Q13[index(z,y,x)]=(FLOATING) (t_2  * rho * (1.0+ ( u_n[13]/c_squ ) +  0.5* ( (u_n[13]*u_n[13])/(c_squ*c_squ) ) - 0.5 * ( u_squ/c_squ ) ));
		Q14[index(z,y,x)]=(FLOATING) (t_2  * rho * (1.0+ ( u_n[14]/c_squ ) +  0.5* ( (u_n[14]*u_n[14])/(c_squ*c_squ) ) - 0.5 * ( u_squ/c_squ ) ));
		Q15[index(z,y,x)]=(FLOATING) (t_2  * rho * (1.0+ ( u_n[15]/c_squ ) +  0.5* ( (u_n[15]*u_n[15])/(c_squ*c_squ) ) - 0.5 * ( u_squ/c_squ ) ));
		Q16[index(z,y,x)]=(FLOATING) (t_2  * rho * (1.0+ ( u_n[16]/c_squ ) +  0.5* ( (u_n[16]*u_n[16])/(c_squ*c_squ) ) - 0.5 * ( u_squ/c_squ ) ));
		Q17[index(z,y,x)]=(FLOATING) (t_2  * rho * (1.0+ ( u_n[17]/c_squ ) +  0.5* ( (u_n[17]*u_n[17])/(c_squ*c_squ) ) - 0.5 * ( u_squ/c_squ ) ));
		Q18[index(z,y,x)]=(FLOATING) (t_2  * rho * (1.0+ ( u_n[18]/c_squ ) +  0.5* ( (u_n[18]*u_n[18])/(c_squ*c_squ) ) - 0.5 * ( u_squ/c_squ ) ));


		//				}
		//			}
		//		}
	}


}


void LBM::cuda_redistribute(){

	if(data_location==CPU)
		copy_data_from_host_to_device();

//	int lattice_nodes=lz*ly*lx;
//
//	int n_of_threads=128;
//	int n_of_blocks=ceil((lattice_nodes*1.0)/n_of_threads);
//	dim3 threads_type2(n_of_threads,1,1);
//	dim3 grid_type2(n_of_blocks,1,1);
//#ifdef REPORT
//	cout << "redistribute kernel with:" << lattice_nodes << " lattice nodes" << endl;
//	cout << "\tthreads:" << n_of_threads << endl;
//	cout << "\tblocks:" << n_of_blocks << endl;
//#endif

	dim3 threads_type2(threads_for_streaming_collision_and_relaxation,1,1);
		dim3 grid_type2(blocks_for_streaming_collision_and_relaxation,1,1);


	redistribute_kernel<<<grid_type2, threads_type2>>>(lx, ly, lz, reynolds, nu, r_small,
			t_0, t_1, t_2, c_squ,
			D3_d.Q0, D3_d.Q1, D3_d.Q2, D3_d.Q3,
			D3_d.Q4, D3_d.Q5, D3_d.Q6, D3_d.Q7,
			D3_d.Q8, D3_d.Q9, D3_d.Q10, D3_d.Q11,
			D3_d.Q12, D3_d.Q13, D3_d.Q14, D3_d.Q15,
			D3_d.Q16, D3_d.Q17, D3_d.Q18);

	cudaDeviceSynchronize();

}

	.file	"tmpxft_002c4354_00000000-6_redistribute.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4563:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE4563:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z85__device_stub__Z19redistribute_kerneliiifffffffPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_iiifffffffPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_
	.type	_Z85__device_stub__Z19redistribute_kerneliiifffffffPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_iiifffffffPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_, @function
_Z85__device_stub__Z19redistribute_kerneliiifffffffPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_iiifffffffPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_:
.LFB4585:
	.cfi_startproc
	endbr64
	subq	$504, %rsp
	.cfi_def_cfa_offset 512
	movq	512(%rsp), %rax
	movl	%edi, 188(%rsp)
	leaq	208(%rsp), %rdi
	movl	%esi, 184(%rsp)
	leaq	220(%rsp), %rsi
	movq	%rax, 120(%rsp)
	movq	520(%rsp), %rax
	movl	%edx, 180(%rsp)
	leaq	192(%rsp), %rdx
	movq	%rax, 112(%rsp)
	movq	528(%rsp), %rax
	movq	%rcx, 144(%rsp)
	leaq	200(%rsp), %rcx
	movq	%rax, 104(%rsp)
	movq	536(%rsp), %rax
	movq	%r8, 136(%rsp)
	movq	%rax, 96(%rsp)
	movq	544(%rsp), %rax
	movq	%r9, 128(%rsp)
	movq	%rax, 88(%rsp)
	movq	552(%rsp), %rax
	movss	%xmm0, 176(%rsp)
	movq	%rax, 80(%rsp)
	movq	560(%rsp), %rax
	movss	%xmm1, 172(%rsp)
	movq	%rax, 72(%rsp)
	movq	568(%rsp), %rax
	movss	%xmm2, 168(%rsp)
	movq	%rax, 64(%rsp)
	movq	576(%rsp), %rax
	movss	%xmm3, 164(%rsp)
	movss	%xmm4, 160(%rsp)
	movss	%xmm5, 156(%rsp)
	movss	%xmm6, 152(%rsp)
	movq	%rax, 56(%rsp)
	movq	584(%rsp), %rax
	movq	%rax, 48(%rsp)
	movq	592(%rsp), %rax
	movq	%rax, 40(%rsp)
	movq	600(%rsp), %rax
	movq	%rax, 32(%rsp)
	movq	608(%rsp), %rax
	movq	%rax, 24(%rsp)
	movq	616(%rsp), %rax
	movq	%rax, 16(%rsp)
	movq	624(%rsp), %rax
	movq	%rax, 8(%rsp)
	movq	632(%rsp), %rax
	movq	%rax, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 488(%rsp)
	xorl	%eax, %eax
	leaq	188(%rsp), %rax
	movq	%rax, 256(%rsp)
	leaq	184(%rsp), %rax
	movq	%rax, 264(%rsp)
	leaq	180(%rsp), %rax
	movq	%rax, 272(%rsp)
	leaq	176(%rsp), %rax
	movq	%rax, 280(%rsp)
	leaq	172(%rsp), %rax
	movq	%rax, 288(%rsp)
	leaq	168(%rsp), %rax
	movq	%rax, 296(%rsp)
	leaq	164(%rsp), %rax
	movq	%rax, 304(%rsp)
	leaq	160(%rsp), %rax
	movq	%rax, 312(%rsp)
	leaq	156(%rsp), %rax
	movq	%rax, 320(%rsp)
	leaq	152(%rsp), %rax
	movq	%rax, 328(%rsp)
	leaq	144(%rsp), %rax
	movq	%rax, 336(%rsp)
	leaq	136(%rsp), %rax
	movq	%rax, 344(%rsp)
	leaq	128(%rsp), %rax
	movq	%rax, 352(%rsp)
	leaq	120(%rsp), %rax
	movq	%rax, 360(%rsp)
	leaq	112(%rsp), %rax
	movq	%rax, 368(%rsp)
	leaq	104(%rsp), %rax
	movq	%rax, 376(%rsp)
	leaq	96(%rsp), %rax
	movq	%rax, 384(%rsp)
	leaq	88(%rsp), %rax
	movq	%rax, 392(%rsp)
	leaq	80(%rsp), %rax
	movq	%rax, 400(%rsp)
	leaq	72(%rsp), %rax
	movq	%rax, 408(%rsp)
	leaq	64(%rsp), %rax
	movq	%rax, 416(%rsp)
	leaq	56(%rsp), %rax
	movq	%rax, 424(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 432(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 440(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 448(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 456(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 464(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 472(%rsp)
	movq	%rsp, %rax
	movq	%rax, 480(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 208(%rsp)
	movl	$1, 216(%rsp)
	movq	%rax, 220(%rsp)
	movl	$1, 228(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	200(%rsp)
	.cfi_def_cfa_offset 520
	leaq	_Z19redistribute_kerneliiifffffffPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_(%rip), %rdi
	pushq	200(%rsp)
	.cfi_def_cfa_offset 528
	movq	236(%rsp), %rcx
	movl	244(%rsp), %r8d
	movq	224(%rsp), %rsi
	movl	232(%rsp), %edx
	leaq	272(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 520
	popq	%rdx
	.cfi_def_cfa_offset 512
.L2:
	movq	488(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$504, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4585:
	.size	_Z85__device_stub__Z19redistribute_kerneliiifffffffPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_iiifffffffPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_, .-_Z85__device_stub__Z19redistribute_kerneliiifffffffPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_iiifffffffPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_
	.globl	_Z19redistribute_kerneliiifffffffPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_
	.type	_Z19redistribute_kerneliiifffffffPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_, @function
_Z19redistribute_kerneliiifffffffPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_:
.LFB4586:
	.cfi_startproc
	endbr64
	jmp	_Z85__device_stub__Z19redistribute_kerneliiifffffffPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_iiifffffffPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_
	.cfi_endproc
.LFE4586:
	.size	_Z19redistribute_kerneliiifffffffPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_, .-_Z19redistribute_kerneliiifffffffPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_
	.align 2
	.globl	_ZN3LBM17cuda_redistributeEv
	.type	_ZN3LBM17cuda_redistributeEv, @function
_ZN3LBM17cuda_redistributeEv:
.LFB4560:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movq	%rdi, %rbx
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	cmpl	$0, 784(%rdi)
	jne	.L9
	call	_ZN3LBM29copy_data_from_host_to_deviceEv@PLT
.L9:
	movl	48(%rbx), %eax
	movl	52(%rbx), %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movl	16(%rsp), %ecx
	movl	%edx, 20(%rsp)
	movq	8(%rsp), %rdx
	movq	%rax, 24(%rsp)
	movq	20(%rsp), %rdi
	movl	28(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L10
	movq	824(%rbx), %rcx
	movss	72(%rbx), %xmm0
	movl	36(%rbx), %edx
	movl	32(%rbx), %esi
	movl	28(%rbx), %edi
	pushq	968(%rbx)
	.cfi_def_cfa_offset 56
	pushq	960(%rbx)
	.cfi_def_cfa_offset 64
	pushq	952(%rbx)
	.cfi_def_cfa_offset 72
	pushq	944(%rbx)
	.cfi_def_cfa_offset 80
	pushq	936(%rbx)
	.cfi_def_cfa_offset 88
	pushq	928(%rbx)
	.cfi_def_cfa_offset 96
	pushq	920(%rbx)
	.cfi_def_cfa_offset 104
	pushq	912(%rbx)
	.cfi_def_cfa_offset 112
	pushq	904(%rbx)
	.cfi_def_cfa_offset 120
	pushq	896(%rbx)
	.cfi_def_cfa_offset 128
	pushq	888(%rbx)
	.cfi_def_cfa_offset 136
	pushq	880(%rbx)
	.cfi_def_cfa_offset 144
	pushq	872(%rbx)
	.cfi_def_cfa_offset 152
	pushq	864(%rbx)
	.cfi_def_cfa_offset 160
	pushq	856(%rbx)
	.cfi_def_cfa_offset 168
	pushq	848(%rbx)
	.cfi_def_cfa_offset 176
	movq	840(%rbx), %r9
	movq	832(%rbx), %r8
	movss	96(%rbx), %xmm6
	movss	92(%rbx), %xmm5
	movss	88(%rbx), %xmm4
	movss	84(%rbx), %xmm3
	movss	68(%rbx), %xmm2
	movss	64(%rbx), %xmm1
	call	_Z85__device_stub__Z19redistribute_kerneliiifffffffPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_iiifffffffPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_
	subq	$-128, %rsp
	.cfi_def_cfa_offset 48
.L10:
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	cudaDeviceSynchronize@PLT
	.cfi_endproc
.LFE4560:
	.size	_ZN3LBM17cuda_redistributeEv, .-_ZN3LBM17cuda_redistributeEv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z19redistribute_kerneliiifffffffPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB4588:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z19redistribute_kerneliiifffffffPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE4588:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include "global_defines.cuh"

__global__
void redistribute_kernel(const int lx, const int ly, const int lz,
		FLOATING reynolds, FLOATING nu, FLOATING r_small,
		FLOATING t_0, FLOATING t_1, FLOATING t_2, FLOATING c_squ,

		FLOATING *Q0, FLOATING *Q1, FLOATING *Q2, FLOATING *Q3,
		FLOATING *Q4, FLOATING *Q5, FLOATING *Q6, FLOATING *Q7,
		FLOATING *Q8, FLOATING *Q9, FLOATING *Q10, FLOATING *Q11,
		FLOATING *Q12, FLOATING *Q13, FLOATING *Q14, FLOATING *Q15,
		FLOATING *Q16, FLOATING *Q17, FLOATING *Q18){

	/************************************************************************
	 *                                                                      *
	 *     density redistribution in first lattice column                   *
	 *                                                                      *
	 *                                                                      *
	 *     Last change: 04/05/2003                                          *
	 *                                                                      *
	 ************************************************************************/
	/*
				c
				c.......directed flow is induced by density redistribution in the first
				c       lattice column. This is not too clever, since the resulting
				c       reynolds number can not be controlled and reaching steady state
				c       takes quite some time, but it is simple and it works ...
				c       use this to start with no initial field
	 */

	/*
	creates u_n, u_squ and assigns the values in node[]

	 */

	int tid=blockIdx.x*blockDim.x+threadIdx.x;
	//int end_of_memory=lz*ly*(lx);
	int z=(int) (tid/(ly*lx));
	int	y=(tid-z*(ly*lx))/lx;
	int	x=tid-z*(ly*lx)-y*lx;

	int R_big;
	int baffle_position=59;

	FLOATING    mass_flow;

	//.....local variables

	int   yc, zc, yr, zr;


	FLOATING   rho/*local density*/, u_avg,A_out,A_inn,A_anu,pi,u_xa,u_xs;
	FLOATING   u_x,u_y, u_z, u_n[19] , u_squ;


	yc= (ly+1)/2 -1;//CHANGED! ORIGINALLY IT WAS yc= (ly +1)/2; AND zc= (ly +1)/2;
	zc= (ly+1)/2 -1;
	R_big=35;
	mass_flow=0.05;
	pi = acos(0.0);
	u_avg =reynolds*nu/(2*R_big);
	u_xa= (R_big*R_big) / (R_big*R_big-r_small*r_small)*u_avg/(1+mass_flow);
	A_out=pi*R_big*R_big;
	A_inn=pi*r_small*r_small;
	A_anu=A_out-A_inn;
	u_xs=A_anu*u_xa*mass_flow/A_inn;



	//.....compute weighting factors (depending on lattice geometry) for
	//     increasing/decreasing inlet densities


	//8etei se olo to domain thn idia taxuthta, thn opoia 8a allaksei meta
	//gia ton eswteriko swlhna

	//todo: vale sto katw for, to x na paizei metaksu timwn pou prosdiorizontai apo to rank!
	//px. gia x=0...1/rank... 1/rank+margin... 2/rank.... etc!

	//	int end_of_memory=lz*ly*(baffle_position+1);





	zr=z-zc;
	yr=y-yc;

	if(x< (baffle_position+1) and yr*yr+zr*zr < r_small*r_small and tid<lx*ly*lz){
		// id = z*+y+x


		//		for( z = 0; z< lz ; ++z){
		//			for( y = 0; y< ly ; ++y){
		//				for( x = 0; x< baffle_position+1 ; ++x){



		//		rho=0.0;
		rho=Q0[index(z,y,x)]+Q1[index(z,y,x)]+Q2[index(z,y,x)]+Q3[index(z,y,x)]+
				Q4[index(z,y,x)]+Q5[index(z,y,x)]+Q6[index(z,y,x)]+Q7[index(z,y,x)]+
				Q8[index(z,y,x)]+Q9[index(z,y,x)]+Q10[index(z,y,x)]+Q11[index(z,y,x)]+
				Q12[index(z,y,x)]+Q13[index(z,y,x)]+Q14[index(z,y,x)]+Q15[index(z,y,x)]+
				Q16[index(z,y,x)]+Q17[index(z,y,x)]+Q18[index(z,y,x)];


		u_x = u_xs;
		u_y =  0.0;
		u_z =  0.0;

		u_n[0]= 0.0; //SHOULD NEVER USED!
		u_n[1] =   u_x; //u_xa
		u_n[2] =         u_y;
		u_n[3] = - u_x;
		u_n[4] =       - u_y;
		u_n[5] =   u_z;
		u_n[6] =       - u_z;
		u_n[7] =   u_x + u_y;
		u_n[8] = - u_x + u_y;
		u_n[9] = - u_x - u_y;
		u_n[10] =   u_x - u_y;
		u_n[11] =   u_x - u_z;
		u_n[12] = - u_x - u_z;
		u_n[13] = - u_x + u_z;
		u_n[14] =   u_x + u_z;
		u_n[15] =   u_z + u_y;
		u_n[16] = - u_z + u_y;
		u_n[17] = - u_z - u_y;
		u_n[18] =   u_z - u_y;

		u_squ = u_x*u_x + u_y*u_y + u_z*u_z;


		Q0[index(z,y,x)]=(FLOATING) (t_0  * rho *(1.0  - u_squ / (2.0  * c_squ)));

		//...........axis speeds (factor: t_1)

		Q1[index(z,y,x)]=(FLOATING) (t_1 * rho *	 (1.0+ ( u_n[1]/c_squ ) +  0.5* ( (u_n[1]*u_n[1])/(c_squ*c_squ) ) - 0.5 * ( u_squ/c_squ ) ));;
		Q2[index(z,y,x)]=(FLOATING) (t_1 * rho *	 (1.0+ ( u_n[2]/c_squ ) +  0.5* ( (u_n[2]*u_n[2])/(c_squ*c_squ) ) - 0.5 * ( u_squ/c_squ ) ));;
		Q3[index(z,y,x)]=(FLOATING) (t_1 * rho *	 (1.0+ ( u_n[3]/c_squ ) +  0.5* ( (u_n[3]*u_n[3])/(c_squ*c_squ) ) - 0.5 * ( u_squ/c_squ ) ));;
		Q4[index(z,y,x)]=(FLOATING) (t_1 * rho *	 (1.0+ ( u_n[4]/c_squ ) +  0.5* ( (u_n[4]*u_n[4])/(c_squ*c_squ) ) - 0.5 * ( u_squ/c_squ ) ));;
		Q5[index(z,y,x)]=(FLOATING) (t_1 * rho *	 (1.0+ ( u_n[5]/c_squ ) +  0.5* ( (u_n[5]*u_n[5])/(c_squ*c_squ) ) - 0.5 * ( u_squ/c_squ ) ));;
		Q6[index(z,y,x)]=(FLOATING) (t_1 * rho *	 (1.0+ ( u_n[6]/c_squ ) +  0.5* ( (u_n[6]*u_n[6])/(c_squ*c_squ) ) - 0.5 * ( u_squ/c_squ ) ));;

		//...........diagonal speeds (factor: t_2)
		Q7[index(z,y,x)]=(FLOATING) (t_2 * rho *	 (1.0+ ( u_n[7]/c_squ ) +  0.5* ( (u_n[7]*u_n[7])/(c_squ*c_squ) ) - 0.5 * ( u_squ/c_squ ) ));;
		Q8[index(z,y,x)]=(FLOATING) (t_2  * rho * (1.0+ ( u_n[8]/c_squ ) +  0.5* ( (u_n[8]*u_n[8])/(c_squ*c_squ) ) - 0.5 * ( u_squ/c_squ ) ));
		Q9[index(z,y,x)]=(FLOATING) (t_2  * rho * (1.0+ ( u_n[9]/c_squ ) +  0.5* ( (u_n[9]*u_n[9])/(c_squ*c_squ) ) - 0.5 * ( u_squ/c_squ ) ));
		Q10[index(z,y,x)]=(FLOATING) (t_2  * rho * (1.0+ ( u_n[10]/c_squ ) +  0.5* ( (u_n[10]*u_n[10])/(c_squ*c_squ) ) - 0.5 * ( u_squ/c_squ ) ));
		Q11[index(z,y,x)]=(FLOATING) (t_2  * rho * (1.0+ ( u_n[11]/c_squ ) +  0.5* ( (u_n[11]*u_n[11])/(c_squ*c_squ) ) - 0.5 * ( u_squ/c_squ ) ));
		Q12[index(z,y,x)]=(FLOATING) (t_2  * rho * (1.0+ ( u_n[12]/c_squ ) +  0.5* ( (u_n[12]*u_n[12])/(c_squ*c_squ) ) - 0.5 * ( u_squ/c_squ ) ));
		Q13[index(z,y,x)]=(FLOATING) (t_2  * rho * (1.0+ ( u_n[13]/c_squ ) +  0.5* ( (u_n[13]*u_n[13])/(c_squ*c_squ) ) - 0.5 * ( u_squ/c_squ ) ));
		Q14[index(z,y,x)]=(FLOATING) (t_2  * rho * (1.0+ ( u_n[14]/c_squ ) +  0.5* ( (u_n[14]*u_n[14])/(c_squ*c_squ) ) - 0.5 * ( u_squ/c_squ ) ));
		Q15[index(z,y,x)]=(FLOATING) (t_2  * rho * (1.0+ ( u_n[15]/c_squ ) +  0.5* ( (u_n[15]*u_n[15])/(c_squ*c_squ) ) - 0.5 * ( u_squ/c_squ ) ));
		Q16[index(z,y,x)]=(FLOATING) (t_2  * rho * (1.0+ ( u_n[16]/c_squ ) +  0.5* ( (u_n[16]*u_n[16])/(c_squ*c_squ) ) - 0.5 * ( u_squ/c_squ ) ));
		Q17[index(z,y,x)]=(FLOATING) (t_2  * rho * (1.0+ ( u_n[17]/c_squ ) +  0.5* ( (u_n[17]*u_n[17])/(c_squ*c_squ) ) - 0.5 * ( u_squ/c_squ ) ));
		Q18[index(z,y,x)]=(FLOATING) (t_2  * rho * (1.0+ ( u_n[18]/c_squ ) +  0.5* ( (u_n[18]*u_n[18])/(c_squ*c_squ) ) - 0.5 * ( u_squ/c_squ ) ));


		//				}
		//			}
		//		}
	}


}


void LBM::cuda_redistribute(){

	if(data_location==CPU)
		copy_data_from_host_to_device();

//	int lattice_nodes=lz*ly*lx;
//
//	int n_of_threads=128;
//	int n_of_blocks=ceil((lattice_nodes*1.0)/n_of_threads);
//	dim3 threads_type2(n_of_threads,1,1);
//	dim3 grid_type2(n_of_blocks,1,1);
//#ifdef REPORT
//	cout << "redistribute kernel with:" << lattice_nodes << " lattice nodes" << endl;
//	cout << "\tthreads:" << n_of_threads << endl;
//	cout << "\tblocks:" << n_of_blocks << endl;
//#endif

	dim3 threads_type2(threads_for_streaming_collision_and_relaxation,1,1);
		dim3 grid_type2(blocks_for_streaming_collision_and_relaxation,1,1);


	redistribute_kernel<<<grid_type2, threads_type2>>>(lx, ly, lz, reynolds, nu, r_small,
			t_0, t_1, t_2, c_squ,
			D3_d.Q0, D3_d.Q1, D3_d.Q2, D3_d.Q3,
			D3_d.Q4, D3_d.Q5, D3_d.Q6, D3_d.Q7,
			D3_d.Q8, D3_d.Q9, D3_d.Q10, D3_d.Q11,
			D3_d.Q12, D3_d.Q13, D3_d.Q14, D3_d.Q15,
			D3_d.Q16, D3_d.Q17, D3_d.Q18);

	hipDeviceSynchronize();

}

	.text
	.file	"redistribute.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z34__device_stub__redistribute_kerneliiifffffffPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_ # -- Begin function _Z34__device_stub__redistribute_kerneliiifffffffPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_
	.type	_Z34__device_stub__redistribute_kerneliiifffffffPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_,@function
_Z34__device_stub__redistribute_kerneliiifffffffPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_: # @_Z34__device_stub__redistribute_kerneliiifffffffPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$344, %rsp                      # imm = 0x158
	.cfi_def_cfa_offset 400
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	leaq	36(%rsp), %rax
	movl	%edi, (%rax)
	leaq	32(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	28(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	24(%rsp), %rdx
	movss	%xmm0, (%rdx)
	leaq	20(%rsp), %r10
	movss	%xmm1, (%r10)
	leaq	16(%rsp), %r11
	movss	%xmm2, (%r11)
	leaq	12(%rsp), %r14
	movss	%xmm3, (%r14)
	leaq	8(%rsp), %r15
	movss	%xmm4, (%r15)
	leaq	4(%rsp), %r12
	movss	%xmm5, (%r12)
	movq	%rsp, %r13
	movss	%xmm6, (%r13)
	leaq	72(%rsp), %rbp
	movq	%rcx, (%rbp)
	leaq	64(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	56(%rsp), %r8
	movq	%r9, (%r8)
	leaq	112(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%r10, 32(%rbx)
	movq	%r11, 40(%rbx)
	movq	%r14, 48(%rbx)
	movq	%r15, 56(%rbx)
	movq	%r12, 64(%rbx)
	movq	%r13, 72(%rbx)
	movq	%rbp, 80(%rbx)
	movq	%rcx, 88(%rbx)
	movq	%r8, 96(%rbx)
	leaq	400(%rsp), %rax
	movq	%rax, 104(%rbx)
	leaq	408(%rsp), %rax
	movq	%rax, 112(%rbx)
	leaq	416(%rsp), %rax
	movq	%rax, 120(%rbx)
	leaq	424(%rsp), %rax
	movq	%rax, 128(%rbx)
	leaq	432(%rsp), %rax
	movq	%rax, 136(%rbx)
	leaq	440(%rsp), %rax
	movq	%rax, 144(%rbx)
	leaq	448(%rsp), %rax
	movq	%rax, 152(%rbx)
	leaq	456(%rsp), %rax
	movq	%rax, 160(%rbx)
	leaq	464(%rsp), %rax
	movq	%rax, 168(%rbx)
	leaq	472(%rsp), %rax
	movq	%rax, 176(%rbx)
	leaq	480(%rsp), %rax
	movq	%rax, 184(%rbx)
	leaq	488(%rsp), %rax
	movq	%rax, 192(%rbx)
	leaq	496(%rsp), %rax
	movq	%rax, 200(%rbx)
	leaq	504(%rsp), %rax
	movq	%rax, 208(%rbx)
	leaq	512(%rsp), %rax
	movq	%rax, 216(%rbx)
	leaq	520(%rsp), %rax
	movq	%rax, 224(%rbx)
	leaq	96(%rsp), %r14
	leaq	80(%rsp), %r15
	leaq	48(%rsp), %r12
	leaq	40(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z19redistribute_kerneliiifffffffPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$360, %rsp                      # imm = 0x168
	.cfi_adjust_cfa_offset -360
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z34__device_stub__redistribute_kerneliiifffffffPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_, .Lfunc_end0-_Z34__device_stub__redistribute_kerneliiifffffffPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_
	.cfi_endproc
                                        # -- End function
	.globl	_ZN3LBM17cuda_redistributeEv    # -- Begin function _ZN3LBM17cuda_redistributeEv
	.p2align	1, 0x90
	.type	_ZN3LBM17cuda_redistributeEv,@function
_ZN3LBM17cuda_redistributeEv:           # @_ZN3LBM17cuda_redistributeEv
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$128, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -16
	movq	%rdi, %rbx
	cmpl	$0, 784(%rdi)
	jne	.LBB1_2
# %bb.1:
	movq	%rbx, %rdi
	callq	_ZN3LBM29copy_data_from_host_to_deviceEv
.LBB1_2:
	movl	48(%rbx), %edx
	movl	52(%rbx), %edi
	btsq	$32, %rdx
	btsq	$32, %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_4
# %bb.3:
	movl	28(%rbx), %edi
	movl	32(%rbx), %esi
	movl	36(%rbx), %edx
	movss	72(%rbx), %xmm0                 # xmm0 = mem[0],zero,zero,zero
	movss	64(%rbx), %xmm1                 # xmm1 = mem[0],zero,zero,zero
	movss	68(%rbx), %xmm2                 # xmm2 = mem[0],zero,zero,zero
	movss	84(%rbx), %xmm3                 # xmm3 = mem[0],zero,zero,zero
	movss	88(%rbx), %xmm4                 # xmm4 = mem[0],zero,zero,zero
	movss	92(%rbx), %xmm5                 # xmm5 = mem[0],zero,zero,zero
	movss	96(%rbx), %xmm6                 # xmm6 = mem[0],zero,zero,zero
	movq	824(%rbx), %rcx
	movq	832(%rbx), %r8
	movq	840(%rbx), %r9
	movups	848(%rbx), %xmm7
	movups	864(%rbx), %xmm8
	movups	880(%rbx), %xmm9
	movups	896(%rbx), %xmm10
	movups	912(%rbx), %xmm11
	movups	928(%rbx), %xmm12
	movups	944(%rbx), %xmm13
	movups	960(%rbx), %xmm14
	movups	%xmm14, 112(%rsp)
	movups	%xmm13, 96(%rsp)
	movups	%xmm12, 80(%rsp)
	movups	%xmm11, 64(%rsp)
	movups	%xmm10, 48(%rsp)
	movups	%xmm9, 32(%rsp)
	movups	%xmm8, 16(%rsp)
	movups	%xmm7, (%rsp)
	callq	_Z34__device_stub__redistribute_kerneliiifffffffPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_
.LBB1_4:
	addq	$128, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	hipDeviceSynchronize            # TAILCALL
.Lfunc_end1:
	.size	_ZN3LBM17cuda_redistributeEv, .Lfunc_end1-_ZN3LBM17cuda_redistributeEv
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z19redistribute_kerneliiifffffffPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z19redistribute_kerneliiifffffffPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_,@object # @_Z19redistribute_kerneliiifffffffPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_
	.section	.rodata,"a",@progbits
	.globl	_Z19redistribute_kerneliiifffffffPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_
	.p2align	3, 0x0
_Z19redistribute_kerneliiifffffffPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_:
	.quad	_Z34__device_stub__redistribute_kerneliiifffffffPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_
	.size	_Z19redistribute_kerneliiifffffffPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z19redistribute_kerneliiifffffffPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_"
	.size	.L__unnamed_1, 72

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z34__device_stub__redistribute_kerneliiifffffffPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z19redistribute_kerneliiifffffffPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z19redistribute_kerneliiifffffffPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_ ; -- Begin function _Z19redistribute_kerneliiifffffffPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_
	.globl	_Z19redistribute_kerneliiifffffffPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_
	.p2align	8
	.type	_Z19redistribute_kerneliiifffffffPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_,@function
_Z19redistribute_kerneliiifffffffPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_: ; @_Z19redistribute_kerneliiifffffffPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_
; %bb.0:
	s_clause 0x1
	s_load_b256 s[24:31], s[0:1], 0x0
	s_load_b32 s5, s[0:1], 0xcc
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s2, s25, s24
	s_and_b32 s5, s5, 0xffff
	s_ashr_i32 s3, s2, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s4, s2, s3
	s_xor_b32 s4, s4, s3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f32_u32_e32 v1, s4
	v_rcp_iflag_f32_e32 v1, v1
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v1, 0x4f7ffffe, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_u32_f32_e32 v1, v1
	v_mad_u64_u32 v[4:5], null, s15, s5, v[0:1]
	s_sub_i32 s5, 0, s4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_mul_lo_u32 v0, s5, v1
	s_ashr_i32 s5, s24, 31
	s_add_i32 s6, s24, s5
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v2, 31, v4
	s_xor_b32 s6, s6, s5
	v_mul_hi_u32 v0, v1, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v3, v4, v2
	v_xor_b32_e32 v3, v3, v2
	v_xor_b32_e32 v2, s3, v2
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v0, v1, v0
	s_sub_i32 s3, 0, s6
	v_mul_hi_u32 v0, v3, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v1, v0, s4
	v_sub_nc_u32_e32 v1, v3, v1
	v_add_nc_u32_e32 v3, 1, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cmp_le_u32_e32 vcc_lo, s4, v1
	v_subrev_nc_u32_e32 v5, s4, v1
	v_cndmask_b32_e32 v0, v0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v3, 1, v0
	v_cndmask_b32_e32 v1, v1, v5, vcc_lo
	v_cvt_f32_u32_e32 v5, s6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_le_u32_e32 vcc_lo, s4, v1
	v_rcp_iflag_f32_e32 v1, v5
	v_cndmask_b32_e32 v0, v0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v0, v0, v2
	v_sub_nc_u32_e32 v2, v0, v2
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v0, 0x4f7ffffe, v1
	v_mul_lo_u32 v1, v2, s2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cvt_u32_f32_e32 v0, v0
	s_mul_i32 s2, s2, s26
	v_cmp_gt_i32_e64 s2, s2, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_mul_lo_u32 v3, s3, v0
	s_add_i32 s3, s25, 1
	v_sub_nc_u32_e32 v7, v4, v1
	s_lshr_b32 s4, s3, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_add_i32 s3, s3, s4
	v_ashrrev_i32_e32 v1, 31, v7
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_mul_hi_u32 v3, v0, v3
	s_ashr_i32 s3, s3, 1
	s_add_i32 s3, s3, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v5, v7, v1
	v_add_nc_u32_e32 v0, v0, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v3, v5, v1
	v_xor_b32_e32 v1, s5, v1
	v_mul_hi_u32 v0, v3, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v5, v0, s6
	v_sub_nc_u32_e32 v3, v3, v5
	v_add_nc_u32_e32 v5, 1, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_subrev_nc_u32_e32 v6, s6, v3
	v_cmp_le_u32_e32 vcc_lo, s6, v3
	v_dual_cndmask_b32 v0, v0, v5 :: v_dual_cndmask_b32 v3, v3, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v5, 1, v0
	v_cmp_le_u32_e32 vcc_lo, s6, v3
	v_subrev_nc_u32_e32 v3, s3, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v0, v0, v5, vcc_lo
	v_xor_b32_e32 v0, v0, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_sub_nc_u32_e32 v0, v0, v1
	v_mul_lo_u32 v1, v3, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_subrev_nc_u32_e32 v3, s3, v0
	v_mul_lo_u32 v8, v0, s24
	v_mad_u64_u32 v[5:6], null, v3, v3, v[1:2]
	v_mul_f32_e64 v3, s29, s29
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_nc_u32_e32 v1, v7, v8
	v_cvt_f32_i32_e32 v5, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e32 vcc_lo, 60, v1
	v_cmp_gt_f32_e64 s3, v3, v5
	s_and_b32 s2, s2, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_2
; %bb.1:
	v_mul_f32_e64 v4, s27, s28
	v_sub_f32_e32 v3, 0x44992000, v3
	s_clause 0x1
	s_load_b64 s[26:27], s[0:1], 0x20
	s_load_b512 s[8:23], s[0:1], 0x28
	v_div_scale_f32 v5, null, 0x428c0000, 0x428c0000, v4
	v_div_scale_f32 v6, null, v3, v3, 0x44992000
	v_div_scale_f32 v11, vcc_lo, v4, 0x428c0000, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_rcp_f32_e32 v7, v5
	v_rcp_f32_e32 v8, v6
	s_waitcnt_depctr 0xfff
	v_fma_f32 v9, -v5, v7, 1.0
	v_fma_f32 v10, -v6, v8, 1.0
	s_waitcnt lgkmcnt(0)
	v_div_scale_f32 v60, null, s27, s27, 0
	v_div_scale_f32 v61, null, s27, s27, 0x80000000
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_dual_fmac_f32 v8, v10, v8 :: v_dual_fmac_f32 v7, v9, v7
	v_div_scale_f32 v9, s2, 0x44992000, v3, 0x44992000
	v_rcp_f32_e32 v62, v60
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_rcp_f32_e32 v63, v61
	v_mul_f32_e64 v64, s27, s27
	v_mul_f32_e32 v12, v9, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_scale_f32 v78, null, v64, v64, 0
	v_fma_f32 v14, -v6, v12, v9
	s_waitcnt_depctr 0xfff
	v_fma_f32 v76, -v60, v62, 1.0
	v_fma_f32 v79, -v61, v63, 1.0
	v_rcp_f32_e32 v80, v78
	v_fmac_f32_e32 v12, v14, v8
	v_mul_f32_e32 v10, v11, v7
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_fmac_f32 v62, v76, v62 :: v_dual_fmac_f32 v63, v79, v63
	v_fma_f32 v6, -v6, v12, v9
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_fma_f32 v13, -v5, v10, v11
	s_waitcnt_depctr 0xfff
	v_fma_f32 v83, -v78, v80, 1.0
	v_fmac_f32_e32 v10, v13, v7
	v_fma_f32 v5, -v5, v10, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_div_fmas_f32 v5, v5, v7, v10
	s_mov_b32 vcc_lo, s2
	v_div_scale_f32 v86, s2, 0, v64, 0
	v_div_fmas_f32 v6, v6, v8, v12
	v_div_fixup_f32 v4, v5, 0x428c0000, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f32 v3, v6, v3, 0x44992000
	v_mul_f32_e32 v3, v4, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_scale_f32 v4, null, 0x3f866666, 0x3f866666, v3
	v_div_scale_f32 v7, vcc_lo, v3, 0x3f866666, v3
	v_rcp_f32_e32 v5, v4
	s_waitcnt_depctr 0xfff
	v_fma_f32 v6, -v4, v5, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v5, v6, v5
	v_mul_f32_e32 v6, v7, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v8, -v4, v6, v7
	v_fmac_f32_e32 v6, v8, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f32 v4, -v4, v6, v7
	v_mul_f32_e64 v7, 0x3fc90fdb, s29
	v_div_fmas_f32 v4, v4, v5, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v5, -v7, s29, 0x44f08738
	v_div_fixup_f32 v3, v4, 0x3f866666, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v3, v5, v3
	v_mul_f32_e32 v5, s29, v7
	v_mul_f32_e32 v6, 0x3d4ccccd, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_scale_f32 v7, null, v5, v5, v6
	v_div_scale_f32 v9, vcc_lo, v6, v5, v6
	v_rcp_f32_e32 v8, v7
	s_waitcnt_depctr 0xfff
	v_fma_f32 v3, -v7, v8, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v8, v3, v8
	v_cvt_f64_f32_e32 v[3:4], s27
	v_mul_f32_e32 v10, v9, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v11, -v7, v10, v9
	v_fmac_f32_e32 v10, v11, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v7, -v7, v10, v9
	v_div_fmas_f32 v7, v7, v8, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f32 v51, v7, v5, v6
	v_mul_f32_e32 v42, v51, v51
	v_div_scale_f32 v81, null, s27, s27, v51
	v_add_f64 v[38:39], v[3:4], v[3:4]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_cvt_f64_f32_e32 v[40:41], v42
	v_mad_u64_u32 v[3:4], null, v2, s25, v[0:1]
	v_div_scale_f32 v82, null, v64, v64, v42
	v_rcp_f32_e32 v85, v82
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[4:5], null, v3, s24, v[1:2]
	v_ashrrev_i32_e32 v5, 31, v4
	s_waitcnt_depctr 0xfff
	v_fma_f32 v87, -v82, v85, 1.0
	v_lshlrev_b64 v[36:37], 2, v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v85, v87, v85
	v_add_co_u32 v0, vcc_lo, s8, v36
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v1, vcc_lo, s9, v37, vcc_lo
	v_add_co_u32 v2, vcc_lo, s10, v36
	v_add_co_ci_u32_e32 v3, vcc_lo, s11, v37, vcc_lo
	global_load_b32 v52, v[0:1], off
	global_load_b32 v53, v[2:3], off
	v_div_scale_f64 v[43:44], null, v[38:39], v[38:39], v[40:41]
	v_add_co_u32 v4, vcc_lo, s12, v36
	v_add_co_ci_u32_e32 v5, vcc_lo, s13, v37, vcc_lo
	v_add_co_u32 v6, vcc_lo, s14, v36
	v_add_co_ci_u32_e32 v7, vcc_lo, s15, v37, vcc_lo
	global_load_b32 v54, v[4:5], off
	v_add_co_u32 v8, vcc_lo, s16, v36
	v_add_co_ci_u32_e32 v9, vcc_lo, s17, v37, vcc_lo
	global_load_b32 v55, v[6:7], off
	v_add_co_u32 v10, vcc_lo, s18, v36
	v_add_co_ci_u32_e32 v11, vcc_lo, s19, v37, vcc_lo
	global_load_b32 v56, v[8:9], off
	v_add_co_u32 v12, vcc_lo, s20, v36
	s_load_b512 s[4:19], s[0:1], 0x68
	v_add_co_ci_u32_e32 v13, vcc_lo, s21, v37, vcc_lo
	global_load_b32 v57, v[10:11], off
	global_load_b32 v58, v[12:13], off
	v_rcp_f64_e32 v[14:15], v[43:44]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[16:17], -v[43:44], v[14:15], 1.0
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[45:46], v[14:15], v[16:17], v[14:15]
	v_add_co_u32 v14, vcc_lo, s22, v36
	v_add_co_ci_u32_e32 v15, vcc_lo, s23, v37, vcc_lo
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v16, vcc_lo, s4, v36
	v_add_co_ci_u32_e32 v17, vcc_lo, s5, v37, vcc_lo
	global_load_b32 v59, v[14:15], off
	v_add_co_u32 v18, vcc_lo, s6, v36
	v_add_co_ci_u32_e32 v19, vcc_lo, s7, v37, vcc_lo
	global_load_b32 v65, v[16:17], off
	v_add_co_u32 v20, vcc_lo, s8, v36
	v_add_co_ci_u32_e32 v21, vcc_lo, s9, v37, vcc_lo
	global_load_b32 v66, v[18:19], off
	v_add_co_u32 v22, vcc_lo, s10, v36
	v_add_co_ci_u32_e32 v23, vcc_lo, s11, v37, vcc_lo
	global_load_b32 v67, v[20:21], off
	v_add_co_u32 v24, vcc_lo, s12, v36
	s_load_b128 s[20:23], s[0:1], 0xa8
	v_add_co_ci_u32_e32 v25, vcc_lo, s13, v37, vcc_lo
	global_load_b32 v68, v[22:23], off
	v_add_co_u32 v26, vcc_lo, s14, v36
	v_add_co_ci_u32_e32 v27, vcc_lo, s15, v37, vcc_lo
	global_load_b32 v69, v[24:25], off
	s_load_b64 s[0:1], s[0:1], 0xb8
	v_add_co_u32 v28, vcc_lo, s16, v36
	v_fma_f64 v[47:48], -v[43:44], v[45:46], 1.0
	global_load_b32 v70, v[26:27], off
	v_add_co_ci_u32_e32 v29, vcc_lo, s17, v37, vcc_lo
	v_add_co_u32 v30, vcc_lo, s18, v36
	v_add_co_ci_u32_e32 v31, vcc_lo, s19, v37, vcc_lo
	global_load_b32 v71, v[28:29], off
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v32, vcc_lo, s20, v36
	v_add_co_ci_u32_e32 v33, vcc_lo, s21, v37, vcc_lo
	global_load_b32 v72, v[30:31], off
	v_add_co_u32 v34, vcc_lo, s22, v36
	v_add_co_ci_u32_e32 v35, vcc_lo, s23, v37, vcc_lo
	global_load_b32 v73, v[32:33], off
	v_add_co_u32 v36, vcc_lo, s0, v36
	v_add_co_ci_u32_e32 v37, vcc_lo, s1, v37, vcc_lo
	global_load_b32 v74, v[34:35], off
	global_load_b32 v75, v[36:37], off
	v_div_scale_f64 v[49:50], vcc_lo, v[40:41], v[38:39], v[40:41]
	v_div_scale_f32 v77, s0, 0, s27, 0
	s_brev_b32 s1, 1
	v_div_scale_f32 v88, s4, v42, v64, v42
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mul_f32_e32 v79, v77, v62
	v_div_scale_f32 v76, s1, s1, s27, s1
	v_mul_f32_e32 v91, v88, v85
	v_div_scale_f32 v89, null, s27, s27, v42
	v_fma_f64 v[45:46], v[45:46], v[47:48], v[45:46]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v87, v89
	v_mul_f64 v[47:48], v[49:50], v[45:46]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[43:44], -v[43:44], v[47:48], v[49:50]
	v_fma_f32 v50, -v60, v79, v77
	v_mul_f32_e32 v49, v76, v63
	v_fmac_f32_e32 v79, v50, v62
	v_rcp_f32_e32 v50, v81
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v84, -v61, v49, v76
	v_fma_f32 v60, -v60, v79, v77
	v_add_f32_e32 v77, 0, v51
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v49, v84, v63
	s_waitcnt_depctr 0xfff
	v_fma_f32 v84, -v81, v50, 1.0
	v_fma_f32 v61, -v61, v49, v76
	v_fmac_f32_e32 v50, v84, v50
	v_div_scale_f32 v84, null, s27, s27, -v51
	v_div_fmas_f64 v[43:44], v[43:44], v[45:46], v[47:48]
	v_fma_f32 v48, -v89, v87, 1.0
	v_fmac_f32_e32 v80, v83, v80
	v_div_scale_f32 v83, s3, v51, s27, v51
	v_div_scale_f32 v46, s5, v42, s27, v42
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_dual_fmac_f32 v87, v48, v87 :: v_dual_mul_f32 v90, v83, v50
	v_fma_f32 v47, -v82, v91, v88
	s_mov_b32 vcc_lo, s3
	v_fma_f32 v45, -v81, v90, v83
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v91, v47, v85
	v_rcp_f32_e32 v47, v84
	v_fmac_f32_e32 v90, v45, v50
	v_div_scale_f32 v45, null, s27, s27, v77
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f32 v82, -v82, v91, v88
	v_fma_f32 v48, -v81, v90, v83
	v_mul_f32_e32 v83, v46, v87
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_rcp_f32_e32 v81, v45
	v_div_fmas_f32 v48, v48, v50, v90
	s_delay_alu instid0(TRANS32_DEP_2)
	v_fma_f32 v50, -v84, v47, 1.0
	v_mul_f32_e32 v92, v77, v77
	s_mov_b32 vcc_lo, s4
	v_fma_f32 v88, -v89, v83, v46
	v_div_fmas_f32 v82, v82, v85, v91
	v_fmac_f32_e32 v47, v50, v47
	v_div_scale_f32 v85, null, v64, v64, v92
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_dual_mul_f32 v50, v86, v80 :: v_dual_fmac_f32 v83, v88, v87
	v_fma_f32 v90, -v45, v81, 1.0
	v_rcp_f32_e32 v88, v85
	s_mov_b32 vcc_lo, s5
	v_div_fixup_f32 v48, v48, s27, v51
	v_fma_f32 v46, -v89, v83, v46
	v_div_scale_f32 v89, s3, -v51, s27, -v51
	v_fmac_f32_e32 v81, v90, v81
	v_fma_f32 v90, -v78, v50, v86
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(TRANS32_DEP_1)
	v_div_fmas_f32 v83, v46, v87, v83
	v_div_scale_f32 v87, s4, v77, s27, v77
	v_fma_f32 v46, -v85, v88, 1.0
	s_delay_alu instid0(VALU_DEP_4)
	v_fmac_f32_e32 v50, v90, v80
	v_mul_f32_e32 v90, v89, v47
	s_mov_b32 vcc_lo, s0
	v_div_fixup_f64 v[38:39], v[43:44], v[38:39], v[40:41]
	v_fmac_f32_e32 v88, v46, v88
	v_mul_f32_e32 v46, v87, v81
	v_div_fmas_f32 v60, v60, v62, v79
	v_fma_f32 v62, -v84, v90, v89
	v_div_scale_f32 v79, s0, v92, v64, v92
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_fma_f32 v76, -v45, v46, v87
	v_fma_f32 v78, -v78, v50, v86
	v_mul_f32_e64 v86, -v51, -v51
	s_mov_b32 vcc_lo, s2
	v_fmac_f32_e32 v46, v76, v81
	s_delay_alu instid0(VALU_DEP_3)
	v_div_fmas_f32 v78, v78, v80, v50
	s_mov_b32 vcc_lo, s1
	v_div_fixup_f32 v50, v60, s27, 0
	v_div_fmas_f32 v49, v61, v63, v49
	v_fma_f32 v45, -v45, v46, v87
	v_div_scale_f32 v87, s5, v86, v64, v86
	v_fmac_f32_e32 v90, v62, v47
	v_mul_f32_e32 v62, v79, v88
	s_mov_b32 vcc_lo, s4
	v_div_fixup_f32 v49, v49, s27, 0x80000000
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f32 v84, -v84, v90, v89
	v_fma_f32 v76, -v85, v62, v79
	v_div_scale_f32 v89, null, v64, v64, v86
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v62, v76, v88
	v_rcp_f32_e32 v76, v89
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_fma_f32 v79, -v85, v62, v79
	v_add_f64 v[38:39], -v[38:39], 1.0
	s_waitcnt_depctr 0xfff
	v_fma_f32 v85, -v89, v76, 1.0
	v_fmac_f32_e32 v76, v85, v76
	s_waitcnt vmcnt(17)
	v_add_f32_e32 v52, v52, v53
	v_div_fmas_f32 v53, v45, v81, v46
	s_mov_b32 vcc_lo, s0
	v_cvt_f64_f32_e32 v[45:46], v48
	v_div_fmas_f32 v60, v79, v88, v62
	s_mov_b32 vcc_lo, s3
	v_div_fixup_f32 v53, v53, s27, v77
	v_div_fmas_f32 v61, v84, v47, v90
	v_cvt_f64_f32_e32 v[47:48], v50
	v_cvt_f64_f32_e32 v[49:50], v49
	s_waitcnt vmcnt(16)
	v_add_f32_e32 v62, v52, v54
	s_mov_b32 vcc_lo, s5
	v_div_fixup_f32 v61, v61, s27, -v51
	v_cvt_f64_f32_e32 v[51:52], v53
	s_waitcnt vmcnt(15)
	v_add_f32_e32 v55, v62, v55
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cvt_f64_f32_e32 v[53:54], v61
	v_mul_f32_e32 v61, v87, v76
	s_waitcnt vmcnt(14)
	v_add_f32_e32 v55, v55, v56
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f32 v62, -v89, v61, v87
	s_waitcnt vmcnt(13)
	v_add_f32_e32 v55, v55, v57
	v_div_fixup_f32 v57, v82, v64, v42
	v_div_fixup_f32 v42, v83, s27, v42
	v_fmac_f32_e32 v61, v62, v76
	v_div_fixup_f32 v62, v60, v64, v92
	s_waitcnt vmcnt(12)
	v_add_f32_e32 v55, v55, v58
	v_div_fixup_f32 v58, v78, v64, 0
	v_fma_f32 v56, -v89, v61, v87
	s_delay_alu instid0(VALU_DEP_1)
	v_div_fmas_f32 v61, v56, v76, v61
	s_waitcnt vmcnt(11)
	v_add_f32_e32 v76, v55, v59
	v_cvt_f64_f32_e32 v[55:56], v57
	v_add_f64 v[59:60], v[45:46], 1.0
	v_cvt_f64_f32_e32 v[57:58], v58
	v_div_fixup_f32 v63, v61, v64, v86
	v_add_f64 v[45:46], -v[45:46], 1.0
	v_cvt_f64_f32_e32 v[61:62], v62
	v_add_f64 v[47:48], v[47:48], 1.0
	v_add_f64 v[49:50], v[49:50], 1.0
	v_cvt_f64_f32_e32 v[63:64], v63
	s_waitcnt vmcnt(10)
	v_add_f32_e32 v65, v76, v65
	v_add_f64 v[51:52], v[51:52], 1.0
	s_waitcnt vmcnt(9)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_add_f32_e32 v65, v65, v66
	v_add_f64 v[53:54], v[53:54], 1.0
	s_waitcnt vmcnt(8)
	v_add_f32_e32 v65, v65, v67
	s_waitcnt vmcnt(7)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f32_e32 v65, v65, v68
	s_waitcnt vmcnt(6)
	v_add_f32_e32 v65, v65, v69
	s_waitcnt vmcnt(5)
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f32_e32 v67, v65, v70
	v_cvt_f64_f32_e32 v[65:66], v42
	v_fma_f64 v[40:41], v[55:56], 0.5, v[59:60]
	v_fma_f64 v[44:45], v[55:56], 0.5, v[45:46]
	s_waitcnt vmcnt(4)
	v_add_f32_e32 v55, v67, v71
	v_fma_f64 v[42:43], v[57:58], 0.5, v[47:48]
	v_fma_f64 v[46:47], v[57:58], 0.5, v[49:50]
	v_fma_f64 v[48:49], v[61:62], 0.5, v[51:52]
	s_waitcnt vmcnt(3)
	v_add_f32_e32 v52, v55, v72
	v_fma_f64 v[50:51], v[63:64], 0.5, v[53:54]
	s_waitcnt vmcnt(2)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f32_e32 v52, v52, v73
	s_waitcnt vmcnt(1)
	v_add_f32_e32 v52, v52, v74
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v52, v52, v75
	v_mul_f32_e32 v53, s30, v52
	v_mul_f32_e32 v54, s31, v52
	v_mul_f32_e32 v56, s26, v52
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cvt_f64_f32_e32 v[52:53], v53
	v_cvt_f64_f32_e32 v[54:55], v54
	v_fma_f64 v[40:41], v[65:66], -0.5, v[40:41]
	s_delay_alu instid0(VALU_DEP_4)
	v_cvt_f64_f32_e32 v[56:57], v56
	v_fma_f64 v[44:45], v[65:66], -0.5, v[44:45]
	v_fma_f64 v[42:43], v[65:66], -0.5, v[42:43]
	v_fma_f64 v[46:47], v[65:66], -0.5, v[46:47]
	v_fma_f64 v[48:49], v[65:66], -0.5, v[48:49]
	v_fma_f64 v[50:51], v[65:66], -0.5, v[50:51]
	v_mul_f64 v[38:39], v[38:39], v[52:53]
	v_mul_f64 v[52:53], v[40:41], v[54:55]
	v_mul_f64 v[40:41], v[40:41], v[56:57]
	v_mul_f64 v[60:61], v[44:45], v[54:55]
	v_mul_f64 v[44:45], v[44:45], v[56:57]
	v_mul_f64 v[58:59], v[42:43], v[54:55]
	v_mul_f64 v[54:55], v[46:47], v[54:55]
	v_mul_f64 v[42:43], v[42:43], v[56:57]
	v_mul_f64 v[46:47], v[46:47], v[56:57]
	v_mul_f64 v[48:49], v[48:49], v[56:57]
	v_mul_f64 v[50:51], v[50:51], v[56:57]
	v_cvt_f32_f64_e32 v38, v[38:39]
	v_cvt_f32_f64_e32 v39, v[52:53]
	v_cvt_f32_f64_e32 v40, v[40:41]
	v_cvt_f32_f64_e32 v53, v[60:61]
	v_cvt_f32_f64_e32 v44, v[44:45]
	v_cvt_f32_f64_e32 v52, v[58:59]
	v_cvt_f32_f64_e32 v54, v[54:55]
	v_cvt_f32_f64_e32 v41, v[42:43]
	v_cvt_f32_f64_e32 v42, v[46:47]
	v_cvt_f32_f64_e32 v48, v[48:49]
	v_cvt_f32_f64_e32 v49, v[50:51]
	global_store_b32 v[0:1], v38, off
	global_store_b32 v[2:3], v39, off
	global_store_b32 v[4:5], v52, off
	global_store_b32 v[6:7], v53, off
	global_store_b32 v[8:9], v54, off
	global_store_b32 v[10:11], v52, off
	global_store_b32 v[12:13], v54, off
	global_store_b32 v[14:15], v48, off
	global_store_b32 v[16:17], v49, off
	global_store_b32 v[18:19], v44, off
	global_store_b32 v[20:21], v40, off
	global_store_b32 v[22:23], v40, off
	global_store_b32 v[24:25], v44, off
	global_store_b32 v[26:27], v49, off
	global_store_b32 v[28:29], v48, off
	global_store_b32 v[30:31], v41, off
	global_store_b32 v[32:33], v41, off
	global_store_b32 v[34:35], v42, off
	global_store_b32 v[36:37], v41, off
.LBB0_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z19redistribute_kerneliiifffffffPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 448
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 93
		.amdhsa_next_free_sgpr 32
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z19redistribute_kerneliiifffffffPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_, .Lfunc_end0-_Z19redistribute_kerneliiifffffffPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 3200
; NumSgprs: 34
; NumVgprs: 93
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 4
; VGPRBlocks: 11
; NumSGPRsForWavesPerEU: 34
; NumVGPRsForWavesPerEU: 93
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .offset:         4
        .size:           4
        .value_kind:     by_value
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .offset:         12
        .size:           4
        .value_kind:     by_value
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         36
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         48
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         56
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         64
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         72
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         80
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         88
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         96
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         104
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         112
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         120
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         128
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         136
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         144
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         152
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         160
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         168
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         176
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         184
        .size:           8
        .value_kind:     global_buffer
      - .offset:         192
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         196
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         200
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         204
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         206
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         208
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         210
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         212
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         214
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         232
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         240
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         248
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         256
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 448
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z19redistribute_kerneliiifffffffPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     34
    .sgpr_spill_count: 0
    .symbol:         _Z19redistribute_kerneliiifffffffPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     93
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
